1 #include <linux/dma-mapping.h>
2 #include <linux/dma-debug.h>
3 #include <linux/dmar.h>
4 #include <linux/export.h>
5 #include <linux/bootmem.h>
8 #include <linux/kmemleak.h>
10 #include <asm/proto.h>
12 #include <asm/iommu.h>
14 #include <asm/calgary.h>
15 #include <asm/x86_init.h>
16 #include <asm/iommu_table.h>
18 static int forbid_dac __read_mostly;
20 struct dma_map_ops *dma_ops = &nommu_dma_ops;
21 EXPORT_SYMBOL(dma_ops);
23 static int iommu_sac_force __read_mostly;
25 #ifdef CONFIG_IOMMU_DEBUG
26 int panic_on_overflow __read_mostly = 1;
27 int force_iommu __initdata = 1;
29 int panic_on_overflow __read_mostly = 0;
30 int force_iommu __initdata = 0;
33 int iommu_merge __initdata;
35 int no_iommu __initdata;
37 /* Set this to 1 if there is a HW IOMMU in the system */
38 int iommu_detected __read_mostly = 0;
41 * This variable becomes 1 if iommu=pt is passed on the kernel command line.
42 * If this variable is 1, IOMMU implementations do no DMA translation for
43 * devices and allow every device to access to whole physical memory. This is
44 * useful if a user wants to use an IOMMU only for KVM device assignment to
45 * guests and not for driver dma translation.
47 int iommu_pass_through __read_mostly;
50 * Group multi-function PCI devices into a single device-group for the
51 * iommu_device_group interface. This tells the iommu driver to pretend
52 * it cannot distinguish between functions of a device, exposing only one
53 * group for the device. Useful for disallowing use of individual PCI
54 * functions from userspace drivers.
56 int iommu_group_mf __read_mostly;
59 extern struct iommu_table_entry __iommu_table[], __iommu_table_end[];
61 /* Dummy device used for NULL arguments (normally ISA). */
62 struct device x86_dma_fallback_dev = {
63 .init_name = "fallback device",
64 .coherent_dma_mask = ISA_DMA_BIT_MASK,
65 .dma_mask = &x86_dma_fallback_dev.coherent_dma_mask,
67 EXPORT_SYMBOL(x86_dma_fallback_dev);
69 /* Number of entries preallocated for DMA-API debugging */
70 #define PREALLOC_DMA_DEBUG_ENTRIES 32768
72 int dma_set_mask(struct device *dev, u64 mask)
74 if (!dev->dma_mask || !dma_supported(dev, mask))
77 *dev->dma_mask = mask;
81 EXPORT_SYMBOL(dma_set_mask);
83 static struct dma_map_ops swiotlb_dma_ops = {
84 .alloc_coherent = dma_generic_alloc_coherent,
85 .free_coherent = dma_generic_free_coherent,
86 .mapping_error = swiotlb_dma_mapping_error,
87 .map_page = swiotlb_map_page,
88 .unmap_page = swiotlb_unmap_page,
89 .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
90 .sync_single_for_device = swiotlb_sync_single_for_device,
91 .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
92 .sync_sg_for_device = swiotlb_sync_sg_for_device,
93 .map_sg = swiotlb_map_sg_attrs,
94 .unmap_sg = swiotlb_unmap_sg_attrs,
95 .dma_supported = swiotlb_dma_supported
98 static int __init pci_xen_swiotlb_detect(void)
103 static void __init pci_xen_swiotlb_init(void)
107 printk(KERN_INFO "PCI-DMA: Using software bounce buffering for IO (SWIOTLB)\n");
108 dma_ops = &swiotlb_dma_ops;
112 IOMMU_INIT_FINISH(pci_xen_swiotlb_detect, NULL, pci_xen_swiotlb_init, NULL);
114 void __init pci_iommu_alloc(void)
116 struct iommu_table_entry *p;
118 sort_iommu_table(__iommu_table, __iommu_table_end);
119 check_iommu_entries(__iommu_table, __iommu_table_end);
121 for (p = __iommu_table; p < __iommu_table_end; p++) {
122 if (p && p->detect && p->detect() > 0) {
123 p->flags |= IOMMU_DETECTED;
126 if (p->flags & IOMMU_FINISH_IF_DETECTED)
131 void *dma_generic_alloc_coherent(struct device *dev, size_t size,
132 dma_addr_t *dma_addr, gfp_t flag)
134 unsigned long dma_mask;
141 unsigned int order = get_order(size);
143 dma_mask = dma_alloc_coherent_mask(dev, flag);
149 flag &= ~(__GFP_DMA | __GFP_DMA32);
151 page = alloc_pages_node(dev_to_node(dev), flag, order);
156 addr = page_to_phys(page);
157 if (addr + size > dma_mask) {
158 __free_pages(page, order);
160 if (dma_mask < DMA_BIT_MASK(32) && !(flag & GFP_DMA)) {
161 flag = (flag & ~GFP_DMA32) | GFP_DMA;
169 return page_address(page);
171 memory = page_address(page);
172 if (xen_create_contiguous_region((unsigned long)memory, order,
174 __free_pages(page, order);
178 *dma_addr = virt_to_bus(memory);
179 return memset(memory, 0, size);
184 void dma_generic_free_coherent(struct device *dev, size_t size, void *vaddr,
187 unsigned int order = get_order(size);
188 unsigned long va = (unsigned long)vaddr;
190 xen_destroy_contiguous_region(va, order);
191 free_pages(va, order);
196 * See <Documentation/x86/x86_64/boot-options.txt> for the iommu kernel
197 * parameter documentation.
199 static __init int iommu_setup(char *p)
207 if (!strncmp(p, "off", 3))
209 /* gart_parse_options has more force support */
210 if (!strncmp(p, "force", 5))
212 if (!strncmp(p, "noforce", 7)) {
217 if (!strncmp(p, "biomerge", 8)) {
221 if (!strncmp(p, "panic", 5))
222 panic_on_overflow = 1;
223 if (!strncmp(p, "nopanic", 7))
224 panic_on_overflow = 0;
225 if (!strncmp(p, "merge", 5)) {
229 if (!strncmp(p, "nomerge", 7))
231 if (!strncmp(p, "forcesac", 8))
233 if (!strncmp(p, "allowdac", 8))
235 if (!strncmp(p, "nodac", 5))
237 if (!strncmp(p, "usedac", 6)) {
241 #ifdef CONFIG_SWIOTLB
242 if (!strncmp(p, "soft", 4))
246 if (!strncmp(p, "pt", 2))
247 iommu_pass_through = 1;
248 if (!strncmp(p, "group_mf", 8))
252 gart_parse_options(p);
254 #ifdef CONFIG_CALGARY_IOMMU
255 if (!strncmp(p, "calgary", 7))
257 #endif /* CONFIG_CALGARY_IOMMU */
259 p += strcspn(p, ",");
265 early_param("iommu", iommu_setup);
267 static int check_pages_physically_contiguous(unsigned long pfn,
271 unsigned long next_mfn;
275 next_mfn = pfn_to_mfn(pfn);
276 nr_pages = (offset + length + PAGE_SIZE-1) >> PAGE_SHIFT;
278 for (i = 1; i < nr_pages; i++) {
279 if (pfn_to_mfn(++pfn) != ++next_mfn)
285 int range_straddles_page_boundary(paddr_t p, size_t size)
287 unsigned long pfn = p >> PAGE_SHIFT;
288 unsigned int offset = p & ~PAGE_MASK;
290 return ((offset + size > PAGE_SIZE) &&
291 !check_pages_physically_contiguous(pfn, offset, size));
294 int dma_supported(struct device *dev, u64 mask)
296 struct dma_map_ops *ops = get_dma_ops(dev);
299 if (mask > 0xffffffff && forbid_dac > 0) {
300 dev_info(dev, "PCI: Disallowing DAC for device\n");
305 if (ops->dma_supported)
306 return ops->dma_supported(dev, mask);
308 /* Copied from i386. Doesn't make much sense, because it will
309 only work for pci_alloc_coherent.
310 The caller just has to use GFP_DMA in this case. */
311 if (mask < DMA_BIT_MASK(24))
314 /* Tell the device to use SAC when IOMMU force is on. This
315 allows the driver to use cheaper accesses in some cases.
317 Problem with this is that if we overflow the IOMMU area and
318 return DAC as fallback address the device may not handle it
321 As a special case some controllers have a 39bit address
322 mode that is as efficient as 32bit (aic79xx). Don't force
323 SAC for these. Assume all masks <= 40 bits are of this
324 type. Normally this doesn't make any difference, but gives
325 more gentle handling of IOMMU overflow. */
326 if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
327 dev_info(dev, "Force SAC with mask %Lx\n", mask);
333 EXPORT_SYMBOL(dma_supported);
335 static int __init pci_iommu_init(void)
337 struct iommu_table_entry *p;
338 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
341 dma_debug_add_bus(&pci_bus_type);
343 x86_init.iommu.iommu_init();
345 for (p = __iommu_table; p < __iommu_table_end; p++) {
346 if (p && (p->flags & IOMMU_DETECTED) && p->late_init)
352 /* Must execute after PCI subsystem */
353 rootfs_initcall(pci_iommu_init);
356 /* Many VIA bridges seem to corrupt data for DAC. Disable it here */
358 static __devinit void via_no_dac(struct pci_dev *dev)
360 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
361 dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n");
365 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, via_no_dac);