1 #include <linux/dma-mapping.h>
2 #include <linux/dma-debug.h>
3 #include <linux/export.h>
4 #include <linux/bootmem.h>
7 #include <linux/kmemleak.h>
11 #include <asm/iommu.h>
12 #include <asm/x86_init.h>
13 #include <asm/iommu_table.h>
15 static int forbid_dac __read_mostly;
17 struct dma_map_ops *dma_ops = &nommu_dma_ops;
18 EXPORT_SYMBOL(dma_ops);
20 static int iommu_sac_force __read_mostly;
22 #ifdef CONFIG_IOMMU_DEBUG
23 int panic_on_overflow __read_mostly = 1;
24 int force_iommu __initdata = 1;
26 int panic_on_overflow __read_mostly = 0;
27 int force_iommu __initdata = 0;
30 int iommu_merge __initdata;
32 int no_iommu __initdata;
34 /* Set this to 1 if there is a HW IOMMU in the system */
35 int iommu_detected __read_mostly = 0;
38 * This variable becomes 1 if iommu=pt is passed on the kernel command line.
39 * If this variable is 1, IOMMU implementations do no DMA translation for
40 * devices and allow every device to access to whole physical memory. This is
41 * useful if a user wants to use an IOMMU only for KVM device assignment to
42 * guests and not for driver dma translation.
44 int iommu_pass_through __read_mostly;
47 * Group multi-function PCI devices into a single device-group for the
48 * iommu_device_group interface. This tells the iommu driver to pretend
49 * it cannot distinguish between functions of a device, exposing only one
50 * group for the device. Useful for disallowing use of individual PCI
51 * functions from userspace drivers.
53 int iommu_group_mf __read_mostly;
56 extern struct iommu_table_entry __iommu_table[], __iommu_table_end[];
58 /* Dummy device used for NULL arguments (normally ISA). */
59 struct device x86_dma_fallback_dev = {
60 .init_name = "fallback device",
61 .coherent_dma_mask = ISA_DMA_BIT_MASK,
62 .dma_mask = &x86_dma_fallback_dev.coherent_dma_mask,
64 EXPORT_SYMBOL(x86_dma_fallback_dev);
66 /* Number of entries preallocated for DMA-API debugging */
67 #define PREALLOC_DMA_DEBUG_ENTRIES 32768
69 int dma_set_mask(struct device *dev, u64 mask)
71 if (!dev->dma_mask || !dma_supported(dev, mask))
74 *dev->dma_mask = mask;
78 EXPORT_SYMBOL(dma_set_mask);
80 static struct dma_map_ops swiotlb_dma_ops = {
81 .alloc = dma_generic_alloc_coherent,
82 .free = dma_generic_free_coherent,
83 .mapping_error = swiotlb_dma_mapping_error,
84 .map_page = swiotlb_map_page,
85 .unmap_page = swiotlb_unmap_page,
86 .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
87 .sync_single_for_device = swiotlb_sync_single_for_device,
88 .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
89 .sync_sg_for_device = swiotlb_sync_sg_for_device,
90 .map_sg = swiotlb_map_sg_attrs,
91 .unmap_sg = swiotlb_unmap_sg_attrs,
92 .dma_supported = swiotlb_dma_supported
95 static int __init pci_xen_swiotlb_detect(void)
100 static void __init pci_xen_swiotlb_init(void)
104 printk(KERN_INFO "PCI-DMA: Using software bounce buffering for IO (SWIOTLB)\n");
105 dma_ops = &swiotlb_dma_ops;
109 IOMMU_INIT_FINISH(pci_xen_swiotlb_detect, NULL, pci_xen_swiotlb_init, NULL);
111 void __init pci_iommu_alloc(void)
113 struct iommu_table_entry *p;
115 sort_iommu_table(__iommu_table, __iommu_table_end);
116 check_iommu_entries(__iommu_table, __iommu_table_end);
118 for (p = __iommu_table; p < __iommu_table_end; p++) {
119 if (p && p->detect && p->detect() > 0) {
120 p->flags |= IOMMU_DETECTED;
123 if (p->flags & IOMMU_FINISH_IF_DETECTED)
128 void *dma_generic_alloc_coherent(struct device *dev, size_t size,
129 dma_addr_t *dma_addr, gfp_t flag,
130 struct dma_attrs *attrs)
132 unsigned long dma_mask;
139 unsigned int order = get_order(size);
141 dma_mask = dma_alloc_coherent_mask(dev, flag);
147 flag &= ~(__GFP_DMA | __GFP_DMA32);
149 page = alloc_pages_node(dev_to_node(dev), flag, order);
154 addr = page_to_phys(page);
155 if (addr + size > dma_mask) {
156 __free_pages(page, order);
158 if (dma_mask < DMA_BIT_MASK(32) && !(flag & GFP_DMA)) {
159 flag = (flag & ~GFP_DMA32) | GFP_DMA;
167 return page_address(page);
169 memory = page_address(page);
170 if (xen_create_contiguous_region((unsigned long)memory, order,
172 __free_pages(page, order);
176 *dma_addr = virt_to_bus(memory);
177 return memset(memory, 0, size);
182 void dma_generic_free_coherent(struct device *dev, size_t size, void *vaddr,
183 dma_addr_t dma_addr, struct dma_attrs *attrs)
185 unsigned int order = get_order(size);
186 unsigned long va = (unsigned long)vaddr;
188 xen_destroy_contiguous_region(va, order);
189 free_pages(va, order);
194 * See <Documentation/x86/x86_64/boot-options.txt> for the iommu kernel
195 * parameter documentation.
197 static __init int iommu_setup(char *p)
205 if (!strncmp(p, "off", 3))
207 /* gart_parse_options has more force support */
208 if (!strncmp(p, "force", 5))
210 if (!strncmp(p, "noforce", 7)) {
215 if (!strncmp(p, "biomerge", 8)) {
219 if (!strncmp(p, "panic", 5))
220 panic_on_overflow = 1;
221 if (!strncmp(p, "nopanic", 7))
222 panic_on_overflow = 0;
223 if (!strncmp(p, "merge", 5)) {
227 if (!strncmp(p, "nomerge", 7))
229 if (!strncmp(p, "forcesac", 8))
231 if (!strncmp(p, "allowdac", 8))
233 if (!strncmp(p, "nodac", 5))
235 if (!strncmp(p, "usedac", 6)) {
239 #ifdef CONFIG_SWIOTLB
240 if (!strncmp(p, "soft", 4))
244 if (!strncmp(p, "pt", 2))
245 iommu_pass_through = 1;
246 if (!strncmp(p, "group_mf", 8))
249 gart_parse_options(p);
252 #ifdef CONFIG_CALGARY_IOMMU
253 if (!strncmp(p, "calgary", 7))
255 #endif /* CONFIG_CALGARY_IOMMU */
257 p += strcspn(p, ",");
263 early_param("iommu", iommu_setup);
265 static int check_pages_physically_contiguous(unsigned long pfn,
269 unsigned long next_mfn;
273 next_mfn = pfn_to_mfn(pfn);
274 nr_pages = (offset + length + PAGE_SIZE-1) >> PAGE_SHIFT;
276 for (i = 1; i < nr_pages; i++) {
277 if (pfn_to_mfn(++pfn) != ++next_mfn)
283 int range_straddles_page_boundary(paddr_t p, size_t size)
285 unsigned long pfn = p >> PAGE_SHIFT;
286 unsigned int offset = p & ~PAGE_MASK;
288 return ((offset + size > PAGE_SIZE) &&
289 !check_pages_physically_contiguous(pfn, offset, size));
292 int dma_supported(struct device *dev, u64 mask)
294 struct dma_map_ops *ops = get_dma_ops(dev);
297 if (mask > 0xffffffff && forbid_dac > 0) {
298 dev_info(dev, "PCI: Disallowing DAC for device\n");
303 if (ops->dma_supported)
304 return ops->dma_supported(dev, mask);
306 /* Copied from i386. Doesn't make much sense, because it will
307 only work for pci_alloc_coherent.
308 The caller just has to use GFP_DMA in this case. */
309 if (mask < DMA_BIT_MASK(24))
312 /* Tell the device to use SAC when IOMMU force is on. This
313 allows the driver to use cheaper accesses in some cases.
315 Problem with this is that if we overflow the IOMMU area and
316 return DAC as fallback address the device may not handle it
319 As a special case some controllers have a 39bit address
320 mode that is as efficient as 32bit (aic79xx). Don't force
321 SAC for these. Assume all masks <= 40 bits are of this
322 type. Normally this doesn't make any difference, but gives
323 more gentle handling of IOMMU overflow. */
324 if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
325 dev_info(dev, "Force SAC with mask %Lx\n", mask);
331 EXPORT_SYMBOL(dma_supported);
333 static int __init pci_iommu_init(void)
335 struct iommu_table_entry *p;
336 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
339 dma_debug_add_bus(&pci_bus_type);
341 x86_init.iommu.iommu_init();
343 for (p = __iommu_table; p < __iommu_table_end; p++) {
344 if (p && (p->flags & IOMMU_DETECTED) && p->late_init)
350 /* Must execute after PCI subsystem */
351 rootfs_initcall(pci_iommu_init);
354 /* Many VIA bridges seem to corrupt data for DAC. Disable it here */
356 static __devinit void via_no_dac(struct pci_dev *dev)
358 if (forbid_dac == 0) {
359 dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n");
363 DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID,
364 PCI_CLASS_BRIDGE_PCI, 8, via_no_dac);