x86/amd: Add missing feature flag for fam15h models 10h-1fh processors
authorAndreas Herrmann <andreas.herrmann3@amd.com>
Fri, 20 Jan 2012 16:38:23 +0000 (17:38 +0100)
committerLeann Ogasawara <leann.ogasawara@canonical.com>
Mon, 2 Apr 2012 20:23:20 +0000 (13:23 -0700)
BugLink: http://bugs.launchpad.net/bugs/960461

That is the last one missing for those CPUs.

Others were recently added with commits

 fb215366b3c7320ac25dca766a0152df16534932
 (KVM: expose latest Intel cpu new features (BMI1/BMI2/FMA/AVX2) to guest)

and

 commit 969df4b82904a30fef19a67398a0c854d223ea67
 (x86: Report cpb and eff_freq_ro flags correctly)

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Link: http://lkml.kernel.org/r/20120120163823.GC24508@alberich.amd.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
(cherry picked from commit 652847aa449cfe364d40018849223f57f31a38e2)

Signed-off-by: Tim Gardner <tim.gardner@canonical.com>

arch/x86/include/asm/cpufeature.h

index f3444f7..742226d 100644 (file)
 #define X86_FEATURE_WDT                (6*32+13) /* Watchdog timer */
 #define X86_FEATURE_LWP                (6*32+15) /* Light Weight Profiling */
 #define X86_FEATURE_FMA4       (6*32+16) /* 4 operands MAC instructions */
+#define X86_FEATURE_TCE                (6*32+17) /* translation cache extension */
 #define X86_FEATURE_NODEID_MSR (6*32+19) /* NodeId MSR */
 #define X86_FEATURE_TBM                (6*32+21) /* trailing bit manipulations */
 #define X86_FEATURE_TOPOEXT    (6*32+22) /* topology extensions CPUID leafs */