f0b76f086105b27569e86f9c0a9bd8dfa64b241a
[linux-flexiantxendom0.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29
30 #include "xhci.h"
31
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
34
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
39
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
41 /*
42  * handshake - spin reading hc until handshake completes or fails
43  * @ptr: address of hc register to be read
44  * @mask: bits to look at in result of read
45  * @done: value of those bits when handshake succeeds
46  * @usec: timeout in microseconds
47  *
48  * Returns negative errno, or zero on success
49  *
50  * Success happens when the "mask" bits have the specified value (hardware
51  * handshake done).  There are two failure modes:  "usec" have passed (major
52  * hardware flakeout), or the register reads as all-ones (hardware removed).
53  */
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55                       u32 mask, u32 done, int usec)
56 {
57         u32     result;
58
59         do {
60                 result = xhci_readl(xhci, ptr);
61                 if (result == ~(u32)0)          /* card removed */
62                         return -ENODEV;
63                 result &= mask;
64                 if (result == done)
65                         return 0;
66                 udelay(1);
67                 usec--;
68         } while (usec > 0);
69         return -ETIMEDOUT;
70 }
71
72 /*
73  * Disable interrupts and begin the xHCI halting process.
74  */
75 void xhci_quiesce(struct xhci_hcd *xhci)
76 {
77         u32 halted;
78         u32 cmd;
79         u32 mask;
80
81         mask = ~(XHCI_IRQS);
82         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83         if (!halted)
84                 mask &= ~CMD_RUN;
85
86         cmd = xhci_readl(xhci, &xhci->op_regs->command);
87         cmd &= mask;
88         xhci_writel(xhci, cmd, &xhci->op_regs->command);
89 }
90
91 /*
92  * Force HC into halt state.
93  *
94  * Disable any IRQs and clear the run/stop bit.
95  * HC will complete any current and actively pipelined transactions, and
96  * should halt within 16 ms of the run/stop bit being cleared.
97  * Read HC Halted bit in the status register to see when the HC is finished.
98  */
99 int xhci_halt(struct xhci_hcd *xhci)
100 {
101         int ret;
102         xhci_dbg(xhci, "// Halt the HC\n");
103         xhci_quiesce(xhci);
104
105         ret = handshake(xhci, &xhci->op_regs->status,
106                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107         if (!ret)
108                 xhci->xhc_state |= XHCI_STATE_HALTED;
109         return ret;
110 }
111
112 /*
113  * Set the run bit and wait for the host to be running.
114  */
115 static int xhci_start(struct xhci_hcd *xhci)
116 {
117         u32 temp;
118         int ret;
119
120         temp = xhci_readl(xhci, &xhci->op_regs->command);
121         temp |= (CMD_RUN);
122         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
123                         temp);
124         xhci_writel(xhci, temp, &xhci->op_regs->command);
125
126         /*
127          * Wait for the HCHalted Status bit to be 0 to indicate the host is
128          * running.
129          */
130         ret = handshake(xhci, &xhci->op_regs->status,
131                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
132         if (ret == -ETIMEDOUT)
133                 xhci_err(xhci, "Host took too long to start, "
134                                 "waited %u microseconds.\n",
135                                 XHCI_MAX_HALT_USEC);
136         if (!ret)
137                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
138         return ret;
139 }
140
141 /*
142  * Reset a halted HC.
143  *
144  * This resets pipelines, timers, counters, state machines, etc.
145  * Transactions will be terminated immediately, and operational registers
146  * will be set to their defaults.
147  */
148 int xhci_reset(struct xhci_hcd *xhci)
149 {
150         u32 command;
151         u32 state;
152         int ret;
153
154         state = xhci_readl(xhci, &xhci->op_regs->status);
155         if ((state & STS_HALT) == 0) {
156                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
157                 return 0;
158         }
159
160         xhci_dbg(xhci, "// Reset the HC\n");
161         command = xhci_readl(xhci, &xhci->op_regs->command);
162         command |= CMD_RESET;
163         xhci_writel(xhci, command, &xhci->op_regs->command);
164
165         ret = handshake(xhci, &xhci->op_regs->command,
166                         CMD_RESET, 0, 250 * 1000);
167         if (ret)
168                 return ret;
169
170         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
171         /*
172          * xHCI cannot write to any doorbells or operational registers other
173          * than status until the "Controller Not Ready" flag is cleared.
174          */
175         return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
176 }
177
178 #ifdef CONFIG_PCI
179 static int xhci_free_msi(struct xhci_hcd *xhci)
180 {
181         int i;
182
183         if (!xhci->msix_entries)
184                 return -EINVAL;
185
186         for (i = 0; i < xhci->msix_count; i++)
187                 if (xhci->msix_entries[i].vector)
188                         free_irq(xhci->msix_entries[i].vector,
189                                         xhci_to_hcd(xhci));
190         return 0;
191 }
192
193 /*
194  * Set up MSI
195  */
196 static int xhci_setup_msi(struct xhci_hcd *xhci)
197 {
198         int ret;
199         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
200
201         ret = pci_enable_msi(pdev);
202         if (ret) {
203                 xhci_dbg(xhci, "failed to allocate MSI entry\n");
204                 return ret;
205         }
206
207         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
208                                 0, "xhci_hcd", xhci_to_hcd(xhci));
209         if (ret) {
210                 xhci_dbg(xhci, "disable MSI interrupt\n");
211                 pci_disable_msi(pdev);
212         }
213
214         return ret;
215 }
216
217 /*
218  * Free IRQs
219  * free all IRQs request
220  */
221 static void xhci_free_irq(struct xhci_hcd *xhci)
222 {
223         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
224         int ret;
225
226         /* return if using legacy interrupt */
227         if (xhci_to_hcd(xhci)->irq >= 0)
228                 return;
229
230         ret = xhci_free_msi(xhci);
231         if (!ret)
232                 return;
233         if (pdev->irq >= 0)
234                 free_irq(pdev->irq, xhci_to_hcd(xhci));
235
236         return;
237 }
238
239 /*
240  * Set up MSI-X
241  */
242 static int xhci_setup_msix(struct xhci_hcd *xhci)
243 {
244         int i, ret = 0;
245         struct usb_hcd *hcd = xhci_to_hcd(xhci);
246         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
247
248         /*
249          * calculate number of msi-x vectors supported.
250          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
251          *   with max number of interrupters based on the xhci HCSPARAMS1.
252          * - num_online_cpus: maximum msi-x vectors per CPUs core.
253          *   Add additional 1 vector to ensure always available interrupt.
254          */
255         xhci->msix_count = min(num_online_cpus() + 1,
256                                 HCS_MAX_INTRS(xhci->hcs_params1));
257
258         xhci->msix_entries =
259                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
260                                 GFP_KERNEL);
261         if (!xhci->msix_entries) {
262                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
263                 return -ENOMEM;
264         }
265
266         for (i = 0; i < xhci->msix_count; i++) {
267                 xhci->msix_entries[i].entry = i;
268                 xhci->msix_entries[i].vector = 0;
269         }
270
271         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
272         if (ret) {
273                 xhci_dbg(xhci, "Failed to enable MSI-X\n");
274                 goto free_entries;
275         }
276
277         for (i = 0; i < xhci->msix_count; i++) {
278                 ret = request_irq(xhci->msix_entries[i].vector,
279                                 (irq_handler_t)xhci_msi_irq,
280                                 0, "xhci_hcd", xhci_to_hcd(xhci));
281                 if (ret)
282                         goto disable_msix;
283         }
284
285         hcd->msix_enabled = 1;
286         return ret;
287
288 disable_msix:
289         xhci_dbg(xhci, "disable MSI-X interrupt\n");
290         xhci_free_irq(xhci);
291         pci_disable_msix(pdev);
292 free_entries:
293         kfree(xhci->msix_entries);
294         xhci->msix_entries = NULL;
295         return ret;
296 }
297
298 /* Free any IRQs and disable MSI-X */
299 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
300 {
301         struct usb_hcd *hcd = xhci_to_hcd(xhci);
302         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
303
304         xhci_free_irq(xhci);
305
306         if (xhci->msix_entries) {
307                 pci_disable_msix(pdev);
308                 kfree(xhci->msix_entries);
309                 xhci->msix_entries = NULL;
310         } else {
311                 pci_disable_msi(pdev);
312         }
313
314         hcd->msix_enabled = 0;
315         return;
316 }
317
318 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
319 {
320         int i;
321
322         if (xhci->msix_entries) {
323                 for (i = 0; i < xhci->msix_count; i++)
324                         synchronize_irq(xhci->msix_entries[i].vector);
325         }
326 }
327
328 static int xhci_try_enable_msi(struct usb_hcd *hcd)
329 {
330         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
331         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
332         int ret;
333
334         /*
335          * Some Fresco Logic host controllers advertise MSI, but fail to
336          * generate interrupts.  Don't even try to enable MSI.
337          */
338         if (xhci->quirks & XHCI_BROKEN_MSI)
339                 return 0;
340
341         /* unregister the legacy interrupt */
342         if (hcd->irq)
343                 free_irq(hcd->irq, hcd);
344         hcd->irq = -1;
345
346         ret = xhci_setup_msix(xhci);
347         if (ret)
348                 /* fall back to msi*/
349                 ret = xhci_setup_msi(xhci);
350
351         if (!ret)
352                 /* hcd->irq is -1, we have MSI */
353                 return 0;
354
355         if (!pdev->irq) {
356                 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
357                 return -EINVAL;
358         }
359
360         /* fall back to legacy interrupt*/
361         ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
362                         hcd->irq_descr, hcd);
363         if (ret) {
364                 xhci_err(xhci, "request interrupt %d failed\n",
365                                 pdev->irq);
366                 return ret;
367         }
368         hcd->irq = pdev->irq;
369         return 0;
370 }
371
372 #else
373
374 static int xhci_try_enable_msi(struct usb_hcd *hcd)
375 {
376         return 0;
377 }
378
379 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
380 {
381 }
382
383 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
384 {
385 }
386
387 #endif
388
389 /*
390  * Initialize memory for HCD and xHC (one-time init).
391  *
392  * Program the PAGESIZE register, initialize the device context array, create
393  * device contexts (?), set up a command ring segment (or two?), create event
394  * ring (one for now).
395  */
396 int xhci_init(struct usb_hcd *hcd)
397 {
398         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
399         int retval = 0;
400
401         xhci_dbg(xhci, "xhci_init\n");
402         spin_lock_init(&xhci->lock);
403         if (xhci->hci_version == 0x95 && link_quirk) {
404                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
405                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
406         } else {
407                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
408         }
409         retval = xhci_mem_init(xhci, GFP_KERNEL);
410         xhci_dbg(xhci, "Finished xhci_init\n");
411
412         return retval;
413 }
414
415 /*-------------------------------------------------------------------------*/
416
417
418 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
419 static void xhci_event_ring_work(unsigned long arg)
420 {
421         unsigned long flags;
422         int temp;
423         u64 temp_64;
424         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
425         int i, j;
426
427         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
428
429         spin_lock_irqsave(&xhci->lock, flags);
430         temp = xhci_readl(xhci, &xhci->op_regs->status);
431         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
432         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
433                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
434                 xhci_dbg(xhci, "HW died, polling stopped.\n");
435                 spin_unlock_irqrestore(&xhci->lock, flags);
436                 return;
437         }
438
439         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
440         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
441         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
442         xhci->error_bitmask = 0;
443         xhci_dbg(xhci, "Event ring:\n");
444         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
445         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
446         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
447         temp_64 &= ~ERST_PTR_MASK;
448         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
449         xhci_dbg(xhci, "Command ring:\n");
450         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
451         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
452         xhci_dbg_cmd_ptrs(xhci);
453         for (i = 0; i < MAX_HC_SLOTS; ++i) {
454                 if (!xhci->devs[i])
455                         continue;
456                 for (j = 0; j < 31; ++j) {
457                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
458                 }
459         }
460         spin_unlock_irqrestore(&xhci->lock, flags);
461
462         if (!xhci->zombie)
463                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
464         else
465                 xhci_dbg(xhci, "Quit polling the event ring.\n");
466 }
467 #endif
468
469 static int xhci_run_finished(struct xhci_hcd *xhci)
470 {
471         if (xhci_start(xhci)) {
472                 xhci_halt(xhci);
473                 return -ENODEV;
474         }
475         xhci->shared_hcd->state = HC_STATE_RUNNING;
476
477         if (xhci->quirks & XHCI_NEC_HOST)
478                 xhci_ring_cmd_db(xhci);
479
480         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
481         return 0;
482 }
483
484 /*
485  * Start the HC after it was halted.
486  *
487  * This function is called by the USB core when the HC driver is added.
488  * Its opposite is xhci_stop().
489  *
490  * xhci_init() must be called once before this function can be called.
491  * Reset the HC, enable device slot contexts, program DCBAAP, and
492  * set command ring pointer and event ring pointer.
493  *
494  * Setup MSI-X vectors and enable interrupts.
495  */
496 int xhci_run(struct usb_hcd *hcd)
497 {
498         u32 temp;
499         u64 temp_64;
500         int ret;
501         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
502
503         /* Start the xHCI host controller running only after the USB 2.0 roothub
504          * is setup.
505          */
506
507         hcd->uses_new_polling = 1;
508         if (!usb_hcd_is_primary_hcd(hcd))
509                 return xhci_run_finished(xhci);
510
511         xhci_dbg(xhci, "xhci_run\n");
512
513         ret = xhci_try_enable_msi(hcd);
514         if (ret)
515                 return ret;
516
517 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
518         init_timer(&xhci->event_ring_timer);
519         xhci->event_ring_timer.data = (unsigned long) xhci;
520         xhci->event_ring_timer.function = xhci_event_ring_work;
521         /* Poll the event ring */
522         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
523         xhci->zombie = 0;
524         xhci_dbg(xhci, "Setting event ring polling timer\n");
525         add_timer(&xhci->event_ring_timer);
526 #endif
527
528         xhci_dbg(xhci, "Command ring memory map follows:\n");
529         xhci_debug_ring(xhci, xhci->cmd_ring);
530         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
531         xhci_dbg_cmd_ptrs(xhci);
532
533         xhci_dbg(xhci, "ERST memory map follows:\n");
534         xhci_dbg_erst(xhci, &xhci->erst);
535         xhci_dbg(xhci, "Event ring:\n");
536         xhci_debug_ring(xhci, xhci->event_ring);
537         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
538         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
539         temp_64 &= ~ERST_PTR_MASK;
540         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
541
542         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
543         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
544         temp &= ~ER_IRQ_INTERVAL_MASK;
545         temp |= (u32) 160;
546         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
547
548         /* Set the HCD state before we enable the irqs */
549         temp = xhci_readl(xhci, &xhci->op_regs->command);
550         temp |= (CMD_EIE);
551         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
552                         temp);
553         xhci_writel(xhci, temp, &xhci->op_regs->command);
554
555         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
556         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
557                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
558         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
559                         &xhci->ir_set->irq_pending);
560         xhci_print_ir_set(xhci, 0);
561
562         if (xhci->quirks & XHCI_NEC_HOST)
563                 xhci_queue_vendor_command(xhci, 0, 0, 0,
564                                 TRB_TYPE(TRB_NEC_GET_FW));
565
566         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
567         return 0;
568 }
569
570 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
571 {
572         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
573
574         spin_lock_irq(&xhci->lock);
575         xhci_halt(xhci);
576
577         /* The shared_hcd is going to be deallocated shortly (the USB core only
578          * calls this function when allocation fails in usb_add_hcd(), or
579          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
580          */
581         xhci->shared_hcd = NULL;
582         spin_unlock_irq(&xhci->lock);
583 }
584
585 /*
586  * Stop xHCI driver.
587  *
588  * This function is called by the USB core when the HC driver is removed.
589  * Its opposite is xhci_run().
590  *
591  * Disable device contexts, disable IRQs, and quiesce the HC.
592  * Reset the HC, finish any completed transactions, and cleanup memory.
593  */
594 void xhci_stop(struct usb_hcd *hcd)
595 {
596         u32 temp;
597         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
598
599         if (!usb_hcd_is_primary_hcd(hcd)) {
600                 xhci_only_stop_hcd(xhci->shared_hcd);
601                 return;
602         }
603
604         spin_lock_irq(&xhci->lock);
605         /* Make sure the xHC is halted for a USB3 roothub
606          * (xhci_stop() could be called as part of failed init).
607          */
608         xhci_halt(xhci);
609         xhci_reset(xhci);
610         spin_unlock_irq(&xhci->lock);
611
612         xhci_cleanup_msix(xhci);
613
614 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
615         /* Tell the event ring poll function not to reschedule */
616         xhci->zombie = 1;
617         del_timer_sync(&xhci->event_ring_timer);
618 #endif
619
620         if (xhci->quirks & XHCI_AMD_PLL_FIX)
621                 usb_amd_dev_put();
622
623         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
624         temp = xhci_readl(xhci, &xhci->op_regs->status);
625         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
626         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
627         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
628                         &xhci->ir_set->irq_pending);
629         xhci_print_ir_set(xhci, 0);
630
631         xhci_dbg(xhci, "cleaning up memory\n");
632         xhci_mem_cleanup(xhci);
633         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
634                     xhci_readl(xhci, &xhci->op_regs->status));
635 }
636
637 /*
638  * Shutdown HC (not bus-specific)
639  *
640  * This is called when the machine is rebooting or halting.  We assume that the
641  * machine will be powered off, and the HC's internal state will be reset.
642  * Don't bother to free memory.
643  *
644  * This will only ever be called with the main usb_hcd (the USB3 roothub).
645  */
646 void xhci_shutdown(struct usb_hcd *hcd)
647 {
648         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
649
650         spin_lock_irq(&xhci->lock);
651         xhci_halt(xhci);
652         spin_unlock_irq(&xhci->lock);
653
654         xhci_cleanup_msix(xhci);
655
656         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
657                     xhci_readl(xhci, &xhci->op_regs->status));
658 }
659
660 #ifdef CONFIG_PM
661 static void xhci_save_registers(struct xhci_hcd *xhci)
662 {
663         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
664         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
665         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
666         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
667         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
668         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
669         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
670         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
671         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
672 }
673
674 static void xhci_restore_registers(struct xhci_hcd *xhci)
675 {
676         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
677         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
678         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
679         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
680         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
681         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
682         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
683         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
684 }
685
686 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
687 {
688         u64     val_64;
689
690         /* step 2: initialize command ring buffer */
691         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
692         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
693                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
694                                       xhci->cmd_ring->dequeue) &
695                  (u64) ~CMD_RING_RSVD_BITS) |
696                 xhci->cmd_ring->cycle_state;
697         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
698                         (long unsigned long) val_64);
699         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
700 }
701
702 /*
703  * The whole command ring must be cleared to zero when we suspend the host.
704  *
705  * The host doesn't save the command ring pointer in the suspend well, so we
706  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
707  * aligned, because of the reserved bits in the command ring dequeue pointer
708  * register.  Therefore, we can't just set the dequeue pointer back in the
709  * middle of the ring (TRBs are 16-byte aligned).
710  */
711 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
712 {
713         struct xhci_ring *ring;
714         struct xhci_segment *seg;
715
716         ring = xhci->cmd_ring;
717         seg = ring->deq_seg;
718         do {
719                 memset(seg->trbs, 0,
720                         sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
721                 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
722                         cpu_to_le32(~TRB_CYCLE);
723                 seg = seg->next;
724         } while (seg != ring->deq_seg);
725
726         /* Reset the software enqueue and dequeue pointers */
727         ring->deq_seg = ring->first_seg;
728         ring->dequeue = ring->first_seg->trbs;
729         ring->enq_seg = ring->deq_seg;
730         ring->enqueue = ring->dequeue;
731
732         /*
733          * Ring is now zeroed, so the HW should look for change of ownership
734          * when the cycle bit is set to 1.
735          */
736         ring->cycle_state = 1;
737
738         /*
739          * Reset the hardware dequeue pointer.
740          * Yes, this will need to be re-written after resume, but we're paranoid
741          * and want to make sure the hardware doesn't access bogus memory
742          * because, say, the BIOS or an SMI started the host without changing
743          * the command ring pointers.
744          */
745         xhci_set_cmd_ring_deq(xhci);
746 }
747
748 /*
749  * Stop HC (not bus-specific)
750  *
751  * This is called when the machine transition into S3/S4 mode.
752  *
753  */
754 int xhci_suspend(struct xhci_hcd *xhci)
755 {
756         int                     rc = 0;
757         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
758         u32                     command;
759
760         spin_lock_irq(&xhci->lock);
761         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
762         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
763         /* step 1: stop endpoint */
764         /* skipped assuming that port suspend has done */
765
766         /* step 2: clear Run/Stop bit */
767         command = xhci_readl(xhci, &xhci->op_regs->command);
768         command &= ~CMD_RUN;
769         xhci_writel(xhci, command, &xhci->op_regs->command);
770         if (handshake(xhci, &xhci->op_regs->status,
771                       STS_HALT, STS_HALT, 100*100)) {
772                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
773                 spin_unlock_irq(&xhci->lock);
774                 return -ETIMEDOUT;
775         }
776         xhci_clear_command_ring(xhci);
777
778         /* step 3: save registers */
779         xhci_save_registers(xhci);
780
781         /* step 4: set CSS flag */
782         command = xhci_readl(xhci, &xhci->op_regs->command);
783         command |= CMD_CSS;
784         xhci_writel(xhci, command, &xhci->op_regs->command);
785         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
786                 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
787                 spin_unlock_irq(&xhci->lock);
788                 return -ETIMEDOUT;
789         }
790         spin_unlock_irq(&xhci->lock);
791
792         /* step 5: remove core well power */
793         /* synchronize irq when using MSI-X */
794         xhci_msix_sync_irqs(xhci);
795
796         return rc;
797 }
798
799 /*
800  * start xHC (not bus-specific)
801  *
802  * This is called when the machine transition from S3/S4 mode.
803  *
804  */
805 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
806 {
807         u32                     command, temp = 0;
808         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
809         struct usb_hcd          *secondary_hcd;
810         int                     retval = 0;
811
812         /* Wait a bit if either of the roothubs need to settle from the
813          * transition into bus suspend.
814          */
815         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
816                         time_before(jiffies,
817                                 xhci->bus_state[1].next_statechange))
818                 msleep(100);
819
820         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
821         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
822
823         spin_lock_irq(&xhci->lock);
824         if (xhci->quirks & XHCI_RESET_ON_RESUME)
825                 hibernated = true;
826
827         if (!hibernated) {
828                 /* step 1: restore register */
829                 xhci_restore_registers(xhci);
830                 /* step 2: initialize command ring buffer */
831                 xhci_set_cmd_ring_deq(xhci);
832                 /* step 3: restore state and start state*/
833                 /* step 3: set CRS flag */
834                 command = xhci_readl(xhci, &xhci->op_regs->command);
835                 command |= CMD_CRS;
836                 xhci_writel(xhci, command, &xhci->op_regs->command);
837                 if (handshake(xhci, &xhci->op_regs->status,
838                               STS_RESTORE, 0, 10*100)) {
839                         xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
840                         spin_unlock_irq(&xhci->lock);
841                         return -ETIMEDOUT;
842                 }
843                 temp = xhci_readl(xhci, &xhci->op_regs->status);
844         }
845
846         /* If restore operation fails, re-initialize the HC during resume */
847         if ((temp & STS_SRE) || hibernated) {
848                 /* Let the USB core know _both_ roothubs lost power. */
849                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
850                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
851
852                 xhci_dbg(xhci, "Stop HCD\n");
853                 xhci_halt(xhci);
854                 xhci_reset(xhci);
855                 spin_unlock_irq(&xhci->lock);
856                 xhci_cleanup_msix(xhci);
857
858 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
859                 /* Tell the event ring poll function not to reschedule */
860                 xhci->zombie = 1;
861                 del_timer_sync(&xhci->event_ring_timer);
862 #endif
863
864                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
865                 temp = xhci_readl(xhci, &xhci->op_regs->status);
866                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
867                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
868                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
869                                 &xhci->ir_set->irq_pending);
870                 xhci_print_ir_set(xhci, 0);
871
872                 xhci_dbg(xhci, "cleaning up memory\n");
873                 xhci_mem_cleanup(xhci);
874                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
875                             xhci_readl(xhci, &xhci->op_regs->status));
876
877                 /* USB core calls the PCI reinit and start functions twice:
878                  * first with the primary HCD, and then with the secondary HCD.
879                  * If we don't do the same, the host will never be started.
880                  */
881                 if (!usb_hcd_is_primary_hcd(hcd))
882                         secondary_hcd = hcd;
883                 else
884                         secondary_hcd = xhci->shared_hcd;
885
886                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
887                 retval = xhci_init(hcd->primary_hcd);
888                 if (retval)
889                         return retval;
890                 xhci_dbg(xhci, "Start the primary HCD\n");
891                 retval = xhci_run(hcd->primary_hcd);
892                 if (!retval) {
893                         xhci_dbg(xhci, "Start the secondary HCD\n");
894                         retval = xhci_run(secondary_hcd);
895                 }
896                 hcd->state = HC_STATE_SUSPENDED;
897                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
898                 goto done;
899         }
900
901         /* step 4: set Run/Stop bit */
902         command = xhci_readl(xhci, &xhci->op_regs->command);
903         command |= CMD_RUN;
904         xhci_writel(xhci, command, &xhci->op_regs->command);
905         handshake(xhci, &xhci->op_regs->status, STS_HALT,
906                   0, 250 * 1000);
907
908         /* step 5: walk topology and initialize portsc,
909          * portpmsc and portli
910          */
911         /* this is done in bus_resume */
912
913         /* step 6: restart each of the previously
914          * Running endpoints by ringing their doorbells
915          */
916
917         spin_unlock_irq(&xhci->lock);
918
919  done:
920         if (retval == 0) {
921                 usb_hcd_resume_root_hub(hcd);
922                 usb_hcd_resume_root_hub(xhci->shared_hcd);
923         }
924         return retval;
925 }
926 #endif  /* CONFIG_PM */
927
928 /*-------------------------------------------------------------------------*/
929
930 /**
931  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
932  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
933  * value to right shift 1 for the bitmask.
934  *
935  * Index  = (epnum * 2) + direction - 1,
936  * where direction = 0 for OUT, 1 for IN.
937  * For control endpoints, the IN index is used (OUT index is unused), so
938  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
939  */
940 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
941 {
942         unsigned int index;
943         if (usb_endpoint_xfer_control(desc))
944                 index = (unsigned int) (usb_endpoint_num(desc)*2);
945         else
946                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
947                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
948         return index;
949 }
950
951 /* Find the flag for this endpoint (for use in the control context).  Use the
952  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
953  * bit 1, etc.
954  */
955 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
956 {
957         return 1 << (xhci_get_endpoint_index(desc) + 1);
958 }
959
960 /* Find the flag for this endpoint (for use in the control context).  Use the
961  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
962  * bit 1, etc.
963  */
964 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
965 {
966         return 1 << (ep_index + 1);
967 }
968
969 /* Compute the last valid endpoint context index.  Basically, this is the
970  * endpoint index plus one.  For slot contexts with more than valid endpoint,
971  * we find the most significant bit set in the added contexts flags.
972  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
973  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
974  */
975 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
976 {
977         return fls(added_ctxs) - 1;
978 }
979
980 /* Returns 1 if the arguments are OK;
981  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
982  */
983 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
984                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
985                 const char *func) {
986         struct xhci_hcd *xhci;
987         struct xhci_virt_device *virt_dev;
988
989         if (!hcd || (check_ep && !ep) || !udev) {
990                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
991                                 func);
992                 return -EINVAL;
993         }
994         if (!udev->parent) {
995                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
996                                 func);
997                 return 0;
998         }
999
1000         xhci = hcd_to_xhci(hcd);
1001         if (xhci->xhc_state & XHCI_STATE_HALTED)
1002                 return -ENODEV;
1003
1004         if (check_virt_dev) {
1005                 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1006                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
1007                                                 "device\n", func);
1008                         return -EINVAL;
1009                 }
1010
1011                 virt_dev = xhci->devs[udev->slot_id];
1012                 if (virt_dev->udev != udev) {
1013                         printk(KERN_DEBUG "xHCI %s called with udev and "
1014                                           "virt_dev does not match\n", func);
1015                         return -EINVAL;
1016                 }
1017         }
1018
1019         return 1;
1020 }
1021
1022 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1023                 struct usb_device *udev, struct xhci_command *command,
1024                 bool ctx_change, bool must_succeed);
1025
1026 /*
1027  * Full speed devices may have a max packet size greater than 8 bytes, but the
1028  * USB core doesn't know that until it reads the first 8 bytes of the
1029  * descriptor.  If the usb_device's max packet size changes after that point,
1030  * we need to issue an evaluate context command and wait on it.
1031  */
1032 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1033                 unsigned int ep_index, struct urb *urb)
1034 {
1035         struct xhci_container_ctx *in_ctx;
1036         struct xhci_container_ctx *out_ctx;
1037         struct xhci_input_control_ctx *ctrl_ctx;
1038         struct xhci_ep_ctx *ep_ctx;
1039         int max_packet_size;
1040         int hw_max_packet_size;
1041         int ret = 0;
1042
1043         out_ctx = xhci->devs[slot_id]->out_ctx;
1044         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1045         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1046         max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1047         if (hw_max_packet_size != max_packet_size) {
1048                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1049                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1050                                 max_packet_size);
1051                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1052                                 hw_max_packet_size);
1053                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1054
1055                 /* Set up the modified control endpoint 0 */
1056                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1057                                 xhci->devs[slot_id]->out_ctx, ep_index);
1058                 in_ctx = xhci->devs[slot_id]->in_ctx;
1059                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1060                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1061                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1062
1063                 /* Set up the input context flags for the command */
1064                 /* FIXME: This won't work if a non-default control endpoint
1065                  * changes max packet sizes.
1066                  */
1067                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1068                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1069                 ctrl_ctx->drop_flags = 0;
1070
1071                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1072                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1073                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1074                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1075
1076                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1077                                 true, false);
1078
1079                 /* Clean up the input context for later use by bandwidth
1080                  * functions.
1081                  */
1082                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1083         }
1084         return ret;
1085 }
1086
1087 /*
1088  * non-error returns are a promise to giveback() the urb later
1089  * we drop ownership so next owner (or urb unlink) can get it
1090  */
1091 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1092 {
1093         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1094         struct xhci_td *buffer;
1095         unsigned long flags;
1096         int ret = 0;
1097         unsigned int slot_id, ep_index;
1098         struct urb_priv *urb_priv;
1099         int size, i;
1100
1101         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1102                                         true, true, __func__) <= 0)
1103                 return -EINVAL;
1104
1105         slot_id = urb->dev->slot_id;
1106         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1107
1108         if (!HCD_HW_ACCESSIBLE(hcd)) {
1109                 if (!in_interrupt())
1110                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1111                 ret = -ESHUTDOWN;
1112                 goto exit;
1113         }
1114
1115         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1116                 size = urb->number_of_packets;
1117         else
1118                 size = 1;
1119
1120         urb_priv = kzalloc(sizeof(struct urb_priv) +
1121                                   size * sizeof(struct xhci_td *), mem_flags);
1122         if (!urb_priv)
1123                 return -ENOMEM;
1124
1125         buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1126         if (!buffer) {
1127                 kfree(urb_priv);
1128                 return -ENOMEM;
1129         }
1130
1131         for (i = 0; i < size; i++) {
1132                 urb_priv->td[i] = buffer;
1133                 buffer++;
1134         }
1135
1136         urb_priv->length = size;
1137         urb_priv->td_cnt = 0;
1138         urb->hcpriv = urb_priv;
1139
1140         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1141                 /* Check to see if the max packet size for the default control
1142                  * endpoint changed during FS device enumeration
1143                  */
1144                 if (urb->dev->speed == USB_SPEED_FULL) {
1145                         ret = xhci_check_maxpacket(xhci, slot_id,
1146                                         ep_index, urb);
1147                         if (ret < 0) {
1148                                 xhci_urb_free_priv(xhci, urb_priv);
1149                                 urb->hcpriv = NULL;
1150                                 return ret;
1151                         }
1152                 }
1153
1154                 /* We have a spinlock and interrupts disabled, so we must pass
1155                  * atomic context to this function, which may allocate memory.
1156                  */
1157                 spin_lock_irqsave(&xhci->lock, flags);
1158                 if (xhci->xhc_state & XHCI_STATE_DYING)
1159                         goto dying;
1160                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1161                                 slot_id, ep_index);
1162                 if (ret)
1163                         goto free_priv;
1164                 spin_unlock_irqrestore(&xhci->lock, flags);
1165         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1166                 spin_lock_irqsave(&xhci->lock, flags);
1167                 if (xhci->xhc_state & XHCI_STATE_DYING)
1168                         goto dying;
1169                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1170                                 EP_GETTING_STREAMS) {
1171                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1172                                         "is transitioning to using streams.\n");
1173                         ret = -EINVAL;
1174                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1175                                 EP_GETTING_NO_STREAMS) {
1176                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1177                                         "is transitioning to "
1178                                         "not having streams.\n");
1179                         ret = -EINVAL;
1180                 } else {
1181                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1182                                         slot_id, ep_index);
1183                 }
1184                 if (ret)
1185                         goto free_priv;
1186                 spin_unlock_irqrestore(&xhci->lock, flags);
1187         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1188                 spin_lock_irqsave(&xhci->lock, flags);
1189                 if (xhci->xhc_state & XHCI_STATE_DYING)
1190                         goto dying;
1191                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1192                                 slot_id, ep_index);
1193                 if (ret)
1194                         goto free_priv;
1195                 spin_unlock_irqrestore(&xhci->lock, flags);
1196         } else {
1197                 spin_lock_irqsave(&xhci->lock, flags);
1198                 if (xhci->xhc_state & XHCI_STATE_DYING)
1199                         goto dying;
1200                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1201                                 slot_id, ep_index);
1202                 if (ret)
1203                         goto free_priv;
1204                 spin_unlock_irqrestore(&xhci->lock, flags);
1205         }
1206 exit:
1207         return ret;
1208 dying:
1209         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1210                         "non-responsive xHCI host.\n",
1211                         urb->ep->desc.bEndpointAddress, urb);
1212         ret = -ESHUTDOWN;
1213 free_priv:
1214         xhci_urb_free_priv(xhci, urb_priv);
1215         urb->hcpriv = NULL;
1216         spin_unlock_irqrestore(&xhci->lock, flags);
1217         return ret;
1218 }
1219
1220 /* Get the right ring for the given URB.
1221  * If the endpoint supports streams, boundary check the URB's stream ID.
1222  * If the endpoint doesn't support streams, return the singular endpoint ring.
1223  */
1224 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1225                 struct urb *urb)
1226 {
1227         unsigned int slot_id;
1228         unsigned int ep_index;
1229         unsigned int stream_id;
1230         struct xhci_virt_ep *ep;
1231
1232         slot_id = urb->dev->slot_id;
1233         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1234         stream_id = urb->stream_id;
1235         ep = &xhci->devs[slot_id]->eps[ep_index];
1236         /* Common case: no streams */
1237         if (!(ep->ep_state & EP_HAS_STREAMS))
1238                 return ep->ring;
1239
1240         if (stream_id == 0) {
1241                 xhci_warn(xhci,
1242                                 "WARN: Slot ID %u, ep index %u has streams, "
1243                                 "but URB has no stream ID.\n",
1244                                 slot_id, ep_index);
1245                 return NULL;
1246         }
1247
1248         if (stream_id < ep->stream_info->num_streams)
1249                 return ep->stream_info->stream_rings[stream_id];
1250
1251         xhci_warn(xhci,
1252                         "WARN: Slot ID %u, ep index %u has "
1253                         "stream IDs 1 to %u allocated, "
1254                         "but stream ID %u is requested.\n",
1255                         slot_id, ep_index,
1256                         ep->stream_info->num_streams - 1,
1257                         stream_id);
1258         return NULL;
1259 }
1260
1261 /*
1262  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1263  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1264  * should pick up where it left off in the TD, unless a Set Transfer Ring
1265  * Dequeue Pointer is issued.
1266  *
1267  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1268  * the ring.  Since the ring is a contiguous structure, they can't be physically
1269  * removed.  Instead, there are two options:
1270  *
1271  *  1) If the HC is in the middle of processing the URB to be canceled, we
1272  *     simply move the ring's dequeue pointer past those TRBs using the Set
1273  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1274  *     when drivers timeout on the last submitted URB and attempt to cancel.
1275  *
1276  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1277  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1278  *     HC will need to invalidate the any TRBs it has cached after the stop
1279  *     endpoint command, as noted in the xHCI 0.95 errata.
1280  *
1281  *  3) The TD may have completed by the time the Stop Endpoint Command
1282  *     completes, so software needs to handle that case too.
1283  *
1284  * This function should protect against the TD enqueueing code ringing the
1285  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1286  * It also needs to account for multiple cancellations on happening at the same
1287  * time for the same endpoint.
1288  *
1289  * Note that this function can be called in any context, or so says
1290  * usb_hcd_unlink_urb()
1291  */
1292 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1293 {
1294         unsigned long flags;
1295         int ret, i;
1296         u32 temp;
1297         struct xhci_hcd *xhci;
1298         struct urb_priv *urb_priv;
1299         struct xhci_td *td;
1300         unsigned int ep_index;
1301         struct xhci_ring *ep_ring;
1302         struct xhci_virt_ep *ep;
1303
1304         xhci = hcd_to_xhci(hcd);
1305         spin_lock_irqsave(&xhci->lock, flags);
1306         /* Make sure the URB hasn't completed or been unlinked already */
1307         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1308         if (ret || !urb->hcpriv)
1309                 goto done;
1310         temp = xhci_readl(xhci, &xhci->op_regs->status);
1311         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1312                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1313                 urb_priv = urb->hcpriv;
1314                 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1315                         td = urb_priv->td[i];
1316                         if (!list_empty(&td->td_list))
1317                                 list_del_init(&td->td_list);
1318                         if (!list_empty(&td->cancelled_td_list))
1319                                 list_del_init(&td->cancelled_td_list);
1320                 }
1321
1322                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1323                 spin_unlock_irqrestore(&xhci->lock, flags);
1324                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1325                 xhci_urb_free_priv(xhci, urb_priv);
1326                 return ret;
1327         }
1328         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1329                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1330                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1331                                 "non-responsive xHCI host.\n",
1332                                 urb->ep->desc.bEndpointAddress, urb);
1333                 /* Let the stop endpoint command watchdog timer (which set this
1334                  * state) finish cleaning up the endpoint TD lists.  We must
1335                  * have caught it in the middle of dropping a lock and giving
1336                  * back an URB.
1337                  */
1338                 goto done;
1339         }
1340
1341         xhci_dbg(xhci, "Cancel URB %p\n", urb);
1342         xhci_dbg(xhci, "Event ring:\n");
1343         xhci_debug_ring(xhci, xhci->event_ring);
1344         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1345         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1346         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1347         if (!ep_ring) {
1348                 ret = -EINVAL;
1349                 goto done;
1350         }
1351
1352         xhci_dbg(xhci, "Endpoint ring:\n");
1353         xhci_debug_ring(xhci, ep_ring);
1354
1355         urb_priv = urb->hcpriv;
1356
1357         for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1358                 td = urb_priv->td[i];
1359                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1360         }
1361
1362         /* Queue a stop endpoint command, but only if this is
1363          * the first cancellation to be handled.
1364          */
1365         if (!(ep->ep_state & EP_HALT_PENDING)) {
1366                 ep->ep_state |= EP_HALT_PENDING;
1367                 ep->stop_cmds_pending++;
1368                 ep->stop_cmd_timer.expires = jiffies +
1369                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1370                 add_timer(&ep->stop_cmd_timer);
1371                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1372                 xhci_ring_cmd_db(xhci);
1373         }
1374 done:
1375         spin_unlock_irqrestore(&xhci->lock, flags);
1376         return ret;
1377 }
1378
1379 /* Drop an endpoint from a new bandwidth configuration for this device.
1380  * Only one call to this function is allowed per endpoint before
1381  * check_bandwidth() or reset_bandwidth() must be called.
1382  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1383  * add the endpoint to the schedule with possibly new parameters denoted by a
1384  * different endpoint descriptor in usb_host_endpoint.
1385  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1386  * not allowed.
1387  *
1388  * The USB core will not allow URBs to be queued to an endpoint that is being
1389  * disabled, so there's no need for mutual exclusion to protect
1390  * the xhci->devs[slot_id] structure.
1391  */
1392 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1393                 struct usb_host_endpoint *ep)
1394 {
1395         struct xhci_hcd *xhci;
1396         struct xhci_container_ctx *in_ctx, *out_ctx;
1397         struct xhci_input_control_ctx *ctrl_ctx;
1398         struct xhci_slot_ctx *slot_ctx;
1399         unsigned int last_ctx;
1400         unsigned int ep_index;
1401         struct xhci_ep_ctx *ep_ctx;
1402         u32 drop_flag;
1403         u32 new_add_flags, new_drop_flags, new_slot_info;
1404         int ret;
1405
1406         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1407         if (ret <= 0)
1408                 return ret;
1409         xhci = hcd_to_xhci(hcd);
1410         if (xhci->xhc_state & XHCI_STATE_DYING)
1411                 return -ENODEV;
1412
1413         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1414         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1415         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1416                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1417                                 __func__, drop_flag);
1418                 return 0;
1419         }
1420
1421         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1422         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1423         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1424         ep_index = xhci_get_endpoint_index(&ep->desc);
1425         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1426         /* If the HC already knows the endpoint is disabled,
1427          * or the HCD has noted it is disabled, ignore this request
1428          */
1429         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1430              cpu_to_le32(EP_STATE_DISABLED)) ||
1431             le32_to_cpu(ctrl_ctx->drop_flags) &
1432             xhci_get_endpoint_flag(&ep->desc)) {
1433                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1434                                 __func__, ep);
1435                 return 0;
1436         }
1437
1438         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1439         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1440
1441         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1442         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1443
1444         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1445         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1446         /* Update the last valid endpoint context, if we deleted the last one */
1447         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1448             LAST_CTX(last_ctx)) {
1449                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1450                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1451         }
1452         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1453
1454         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1455
1456         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1457                         (unsigned int) ep->desc.bEndpointAddress,
1458                         udev->slot_id,
1459                         (unsigned int) new_drop_flags,
1460                         (unsigned int) new_add_flags,
1461                         (unsigned int) new_slot_info);
1462         return 0;
1463 }
1464
1465 /* Add an endpoint to a new possible bandwidth configuration for this device.
1466  * Only one call to this function is allowed per endpoint before
1467  * check_bandwidth() or reset_bandwidth() must be called.
1468  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1469  * add the endpoint to the schedule with possibly new parameters denoted by a
1470  * different endpoint descriptor in usb_host_endpoint.
1471  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1472  * not allowed.
1473  *
1474  * The USB core will not allow URBs to be queued to an endpoint until the
1475  * configuration or alt setting is installed in the device, so there's no need
1476  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1477  */
1478 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1479                 struct usb_host_endpoint *ep)
1480 {
1481         struct xhci_hcd *xhci;
1482         struct xhci_container_ctx *in_ctx, *out_ctx;
1483         unsigned int ep_index;
1484         struct xhci_ep_ctx *ep_ctx;
1485         struct xhci_slot_ctx *slot_ctx;
1486         struct xhci_input_control_ctx *ctrl_ctx;
1487         u32 added_ctxs;
1488         unsigned int last_ctx;
1489         u32 new_add_flags, new_drop_flags, new_slot_info;
1490         struct xhci_virt_device *virt_dev;
1491         int ret = 0;
1492
1493         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1494         if (ret <= 0) {
1495                 /* So we won't queue a reset ep command for a root hub */
1496                 ep->hcpriv = NULL;
1497                 return ret;
1498         }
1499         xhci = hcd_to_xhci(hcd);
1500         if (xhci->xhc_state & XHCI_STATE_DYING)
1501                 return -ENODEV;
1502
1503         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1504         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1505         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1506                 /* FIXME when we have to issue an evaluate endpoint command to
1507                  * deal with ep0 max packet size changing once we get the
1508                  * descriptors
1509                  */
1510                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1511                                 __func__, added_ctxs);
1512                 return 0;
1513         }
1514
1515         virt_dev = xhci->devs[udev->slot_id];
1516         in_ctx = virt_dev->in_ctx;
1517         out_ctx = virt_dev->out_ctx;
1518         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1519         ep_index = xhci_get_endpoint_index(&ep->desc);
1520         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1521
1522         /* If this endpoint is already in use, and the upper layers are trying
1523          * to add it again without dropping it, reject the addition.
1524          */
1525         if (virt_dev->eps[ep_index].ring &&
1526                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1527                                 xhci_get_endpoint_flag(&ep->desc))) {
1528                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1529                                 "without dropping it.\n",
1530                                 (unsigned int) ep->desc.bEndpointAddress);
1531                 return -EINVAL;
1532         }
1533
1534         /* If the HCD has already noted the endpoint is enabled,
1535          * ignore this request.
1536          */
1537         if (le32_to_cpu(ctrl_ctx->add_flags) &
1538             xhci_get_endpoint_flag(&ep->desc)) {
1539                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1540                                 __func__, ep);
1541                 return 0;
1542         }
1543
1544         /*
1545          * Configuration and alternate setting changes must be done in
1546          * process context, not interrupt context (or so documenation
1547          * for usb_set_interface() and usb_set_configuration() claim).
1548          */
1549         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1550                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1551                                 __func__, ep->desc.bEndpointAddress);
1552                 return -ENOMEM;
1553         }
1554
1555         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1556         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1557
1558         /* If xhci_endpoint_disable() was called for this endpoint, but the
1559          * xHC hasn't been notified yet through the check_bandwidth() call,
1560          * this re-adds a new state for the endpoint from the new endpoint
1561          * descriptors.  We must drop and re-add this endpoint, so we leave the
1562          * drop flags alone.
1563          */
1564         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1565
1566         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1567         /* Update the last valid endpoint context, if we just added one past */
1568         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1569             LAST_CTX(last_ctx)) {
1570                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1571                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1572         }
1573         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1574
1575         /* Store the usb_device pointer for later use */
1576         ep->hcpriv = udev;
1577
1578         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1579                         (unsigned int) ep->desc.bEndpointAddress,
1580                         udev->slot_id,
1581                         (unsigned int) new_drop_flags,
1582                         (unsigned int) new_add_flags,
1583                         (unsigned int) new_slot_info);
1584         return 0;
1585 }
1586
1587 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1588 {
1589         struct xhci_input_control_ctx *ctrl_ctx;
1590         struct xhci_ep_ctx *ep_ctx;
1591         struct xhci_slot_ctx *slot_ctx;
1592         int i;
1593
1594         /* When a device's add flag and drop flag are zero, any subsequent
1595          * configure endpoint command will leave that endpoint's state
1596          * untouched.  Make sure we don't leave any old state in the input
1597          * endpoint contexts.
1598          */
1599         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1600         ctrl_ctx->drop_flags = 0;
1601         ctrl_ctx->add_flags = 0;
1602         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1603         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1604         /* Endpoint 0 is always valid */
1605         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1606         for (i = 1; i < 31; ++i) {
1607                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1608                 ep_ctx->ep_info = 0;
1609                 ep_ctx->ep_info2 = 0;
1610                 ep_ctx->deq = 0;
1611                 ep_ctx->tx_info = 0;
1612         }
1613 }
1614
1615 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1616                 struct usb_device *udev, u32 *cmd_status)
1617 {
1618         int ret;
1619
1620         switch (*cmd_status) {
1621         case COMP_ENOMEM:
1622                 dev_warn(&udev->dev, "Not enough host controller resources "
1623                                 "for new device state.\n");
1624                 ret = -ENOMEM;
1625                 /* FIXME: can we allocate more resources for the HC? */
1626                 break;
1627         case COMP_BW_ERR:
1628         case COMP_2ND_BW_ERR:
1629                 dev_warn(&udev->dev, "Not enough bandwidth "
1630                                 "for new device state.\n");
1631                 ret = -ENOSPC;
1632                 /* FIXME: can we go back to the old state? */
1633                 break;
1634         case COMP_TRB_ERR:
1635                 /* the HCD set up something wrong */
1636                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1637                                 "add flag = 1, "
1638                                 "and endpoint is not disabled.\n");
1639                 ret = -EINVAL;
1640                 break;
1641         case COMP_DEV_ERR:
1642                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1643                                 "configure command.\n");
1644                 ret = -ENODEV;
1645                 break;
1646         case COMP_SUCCESS:
1647                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1648                 ret = 0;
1649                 break;
1650         default:
1651                 xhci_err(xhci, "ERROR: unexpected command completion "
1652                                 "code 0x%x.\n", *cmd_status);
1653                 ret = -EINVAL;
1654                 break;
1655         }
1656         return ret;
1657 }
1658
1659 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1660                 struct usb_device *udev, u32 *cmd_status)
1661 {
1662         int ret;
1663         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1664
1665         switch (*cmd_status) {
1666         case COMP_EINVAL:
1667                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1668                                 "context command.\n");
1669                 ret = -EINVAL;
1670                 break;
1671         case COMP_EBADSLT:
1672                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1673                                 "evaluate context command.\n");
1674         case COMP_CTX_STATE:
1675                 dev_warn(&udev->dev, "WARN: invalid context state for "
1676                                 "evaluate context command.\n");
1677                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1678                 ret = -EINVAL;
1679                 break;
1680         case COMP_DEV_ERR:
1681                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1682                                 "context command.\n");
1683                 ret = -ENODEV;
1684                 break;
1685         case COMP_MEL_ERR:
1686                 /* Max Exit Latency too large error */
1687                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1688                 ret = -EINVAL;
1689                 break;
1690         case COMP_SUCCESS:
1691                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1692                 ret = 0;
1693                 break;
1694         default:
1695                 xhci_err(xhci, "ERROR: unexpected command completion "
1696                                 "code 0x%x.\n", *cmd_status);
1697                 ret = -EINVAL;
1698                 break;
1699         }
1700         return ret;
1701 }
1702
1703 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1704                 struct xhci_container_ctx *in_ctx)
1705 {
1706         struct xhci_input_control_ctx *ctrl_ctx;
1707         u32 valid_add_flags;
1708         u32 valid_drop_flags;
1709
1710         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1711         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1712          * (bit 1).  The default control endpoint is added during the Address
1713          * Device command and is never removed until the slot is disabled.
1714          */
1715         valid_add_flags = ctrl_ctx->add_flags >> 2;
1716         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1717
1718         /* Use hweight32 to count the number of ones in the add flags, or
1719          * number of endpoints added.  Don't count endpoints that are changed
1720          * (both added and dropped).
1721          */
1722         return hweight32(valid_add_flags) -
1723                 hweight32(valid_add_flags & valid_drop_flags);
1724 }
1725
1726 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1727                 struct xhci_container_ctx *in_ctx)
1728 {
1729         struct xhci_input_control_ctx *ctrl_ctx;
1730         u32 valid_add_flags;
1731         u32 valid_drop_flags;
1732
1733         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1734         valid_add_flags = ctrl_ctx->add_flags >> 2;
1735         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1736
1737         return hweight32(valid_drop_flags) -
1738                 hweight32(valid_add_flags & valid_drop_flags);
1739 }
1740
1741 /*
1742  * We need to reserve the new number of endpoints before the configure endpoint
1743  * command completes.  We can't subtract the dropped endpoints from the number
1744  * of active endpoints until the command completes because we can oversubscribe
1745  * the host in this case:
1746  *
1747  *  - the first configure endpoint command drops more endpoints than it adds
1748  *  - a second configure endpoint command that adds more endpoints is queued
1749  *  - the first configure endpoint command fails, so the config is unchanged
1750  *  - the second command may succeed, even though there isn't enough resources
1751  *
1752  * Must be called with xhci->lock held.
1753  */
1754 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1755                 struct xhci_container_ctx *in_ctx)
1756 {
1757         u32 added_eps;
1758
1759         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1760         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1761                 xhci_dbg(xhci, "Not enough ep ctxs: "
1762                                 "%u active, need to add %u, limit is %u.\n",
1763                                 xhci->num_active_eps, added_eps,
1764                                 xhci->limit_active_eps);
1765                 return -ENOMEM;
1766         }
1767         xhci->num_active_eps += added_eps;
1768         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1769                         xhci->num_active_eps);
1770         return 0;
1771 }
1772
1773 /*
1774  * The configure endpoint was failed by the xHC for some other reason, so we
1775  * need to revert the resources that failed configuration would have used.
1776  *
1777  * Must be called with xhci->lock held.
1778  */
1779 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1780                 struct xhci_container_ctx *in_ctx)
1781 {
1782         u32 num_failed_eps;
1783
1784         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1785         xhci->num_active_eps -= num_failed_eps;
1786         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1787                         num_failed_eps,
1788                         xhci->num_active_eps);
1789 }
1790
1791 /*
1792  * Now that the command has completed, clean up the active endpoint count by
1793  * subtracting out the endpoints that were dropped (but not changed).
1794  *
1795  * Must be called with xhci->lock held.
1796  */
1797 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1798                 struct xhci_container_ctx *in_ctx)
1799 {
1800         u32 num_dropped_eps;
1801
1802         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1803         xhci->num_active_eps -= num_dropped_eps;
1804         if (num_dropped_eps)
1805                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1806                                 num_dropped_eps,
1807                                 xhci->num_active_eps);
1808 }
1809
1810 unsigned int xhci_get_block_size(struct usb_device *udev)
1811 {
1812         switch (udev->speed) {
1813         case USB_SPEED_LOW:
1814         case USB_SPEED_FULL:
1815                 return FS_BLOCK;
1816         case USB_SPEED_HIGH:
1817                 return HS_BLOCK;
1818         case USB_SPEED_SUPER:
1819                 return SS_BLOCK;
1820         case USB_SPEED_UNKNOWN:
1821         case USB_SPEED_WIRELESS:
1822         default:
1823                 /* Should never happen */
1824                 return 1;
1825         }
1826 }
1827
1828 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1829 {
1830         if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1831                 return LS_OVERHEAD;
1832         if (interval_bw->overhead[FS_OVERHEAD_TYPE])
1833                 return FS_OVERHEAD;
1834         return HS_OVERHEAD;
1835 }
1836
1837 /* If we are changing a LS/FS device under a HS hub,
1838  * make sure (if we are activating a new TT) that the HS bus has enough
1839  * bandwidth for this new TT.
1840  */
1841 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
1842                 struct xhci_virt_device *virt_dev,
1843                 int old_active_eps)
1844 {
1845         struct xhci_interval_bw_table *bw_table;
1846         struct xhci_tt_bw_info *tt_info;
1847
1848         /* Find the bandwidth table for the root port this TT is attached to. */
1849         bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
1850         tt_info = virt_dev->tt_info;
1851         /* If this TT already had active endpoints, the bandwidth for this TT
1852          * has already been added.  Removing all periodic endpoints (and thus
1853          * making the TT enactive) will only decrease the bandwidth used.
1854          */
1855         if (old_active_eps)
1856                 return 0;
1857         if (old_active_eps == 0 && tt_info->active_eps != 0) {
1858                 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
1859                         return -ENOMEM;
1860                 return 0;
1861         }
1862         /* Not sure why we would have no new active endpoints...
1863          *
1864          * Maybe because of an Evaluate Context change for a hub update or a
1865          * control endpoint 0 max packet size change?
1866          * FIXME: skip the bandwidth calculation in that case.
1867          */
1868         return 0;
1869 }
1870
1871 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
1872                 struct xhci_virt_device *virt_dev)
1873 {
1874         unsigned int bw_reserved;
1875
1876         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
1877         if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
1878                 return -ENOMEM;
1879
1880         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
1881         if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
1882                 return -ENOMEM;
1883
1884         return 0;
1885 }
1886
1887 /*
1888  * This algorithm is a very conservative estimate of the worst-case scheduling
1889  * scenario for any one interval.  The hardware dynamically schedules the
1890  * packets, so we can't tell which microframe could be the limiting factor in
1891  * the bandwidth scheduling.  This only takes into account periodic endpoints.
1892  *
1893  * Obviously, we can't solve an NP complete problem to find the minimum worst
1894  * case scenario.  Instead, we come up with an estimate that is no less than
1895  * the worst case bandwidth used for any one microframe, but may be an
1896  * over-estimate.
1897  *
1898  * We walk the requirements for each endpoint by interval, starting with the
1899  * smallest interval, and place packets in the schedule where there is only one
1900  * possible way to schedule packets for that interval.  In order to simplify
1901  * this algorithm, we record the largest max packet size for each interval, and
1902  * assume all packets will be that size.
1903  *
1904  * For interval 0, we obviously must schedule all packets for each interval.
1905  * The bandwidth for interval 0 is just the amount of data to be transmitted
1906  * (the sum of all max ESIT payload sizes, plus any overhead per packet times
1907  * the number of packets).
1908  *
1909  * For interval 1, we have two possible microframes to schedule those packets
1910  * in.  For this algorithm, if we can schedule the same number of packets for
1911  * each possible scheduling opportunity (each microframe), we will do so.  The
1912  * remaining number of packets will be saved to be transmitted in the gaps in
1913  * the next interval's scheduling sequence.
1914  *
1915  * As we move those remaining packets to be scheduled with interval 2 packets,
1916  * we have to double the number of remaining packets to transmit.  This is
1917  * because the intervals are actually powers of 2, and we would be transmitting
1918  * the previous interval's packets twice in this interval.  We also have to be
1919  * sure that when we look at the largest max packet size for this interval, we
1920  * also look at the largest max packet size for the remaining packets and take
1921  * the greater of the two.
1922  *
1923  * The algorithm continues to evenly distribute packets in each scheduling
1924  * opportunity, and push the remaining packets out, until we get to the last
1925  * interval.  Then those packets and their associated overhead are just added
1926  * to the bandwidth used.
1927  */
1928 static int xhci_check_bw_table(struct xhci_hcd *xhci,
1929                 struct xhci_virt_device *virt_dev,
1930                 int old_active_eps)
1931 {
1932         unsigned int bw_reserved;
1933         unsigned int max_bandwidth;
1934         unsigned int bw_used;
1935         unsigned int block_size;
1936         struct xhci_interval_bw_table *bw_table;
1937         unsigned int packet_size = 0;
1938         unsigned int overhead = 0;
1939         unsigned int packets_transmitted = 0;
1940         unsigned int packets_remaining = 0;
1941         unsigned int i;
1942
1943         if (virt_dev->udev->speed == USB_SPEED_SUPER)
1944                 return xhci_check_ss_bw(xhci, virt_dev);
1945
1946         if (virt_dev->udev->speed == USB_SPEED_HIGH) {
1947                 max_bandwidth = HS_BW_LIMIT;
1948                 /* Convert percent of bus BW reserved to blocks reserved */
1949                 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
1950         } else {
1951                 max_bandwidth = FS_BW_LIMIT;
1952                 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
1953         }
1954
1955         bw_table = virt_dev->bw_table;
1956         /* We need to translate the max packet size and max ESIT payloads into
1957          * the units the hardware uses.
1958          */
1959         block_size = xhci_get_block_size(virt_dev->udev);
1960
1961         /* If we are manipulating a LS/FS device under a HS hub, double check
1962          * that the HS bus has enough bandwidth if we are activing a new TT.
1963          */
1964         if (virt_dev->tt_info) {
1965                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1966                                 virt_dev->real_port);
1967                 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
1968                         xhci_warn(xhci, "Not enough bandwidth on HS bus for "
1969                                         "newly activated TT.\n");
1970                         return -ENOMEM;
1971                 }
1972                 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
1973                                 virt_dev->tt_info->slot_id,
1974                                 virt_dev->tt_info->ttport);
1975         } else {
1976                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1977                                 virt_dev->real_port);
1978         }
1979
1980         /* Add in how much bandwidth will be used for interval zero, or the
1981          * rounded max ESIT payload + number of packets * largest overhead.
1982          */
1983         bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
1984                 bw_table->interval_bw[0].num_packets *
1985                 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
1986
1987         for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
1988                 unsigned int bw_added;
1989                 unsigned int largest_mps;
1990                 unsigned int interval_overhead;
1991
1992                 /*
1993                  * How many packets could we transmit in this interval?
1994                  * If packets didn't fit in the previous interval, we will need
1995                  * to transmit that many packets twice within this interval.
1996                  */
1997                 packets_remaining = 2 * packets_remaining +
1998                         bw_table->interval_bw[i].num_packets;
1999
2000                 /* Find the largest max packet size of this or the previous
2001                  * interval.
2002                  */
2003                 if (list_empty(&bw_table->interval_bw[i].endpoints))
2004                         largest_mps = 0;
2005                 else {
2006                         struct xhci_virt_ep *virt_ep;
2007                         struct list_head *ep_entry;
2008
2009                         ep_entry = bw_table->interval_bw[i].endpoints.next;
2010                         virt_ep = list_entry(ep_entry,
2011                                         struct xhci_virt_ep, bw_endpoint_list);
2012                         /* Convert to blocks, rounding up */
2013                         largest_mps = DIV_ROUND_UP(
2014                                         virt_ep->bw_info.max_packet_size,
2015                                         block_size);
2016                 }
2017                 if (largest_mps > packet_size)
2018                         packet_size = largest_mps;
2019
2020                 /* Use the larger overhead of this or the previous interval. */
2021                 interval_overhead = xhci_get_largest_overhead(
2022                                 &bw_table->interval_bw[i]);
2023                 if (interval_overhead > overhead)
2024                         overhead = interval_overhead;
2025
2026                 /* How many packets can we evenly distribute across
2027                  * (1 << (i + 1)) possible scheduling opportunities?
2028                  */
2029                 packets_transmitted = packets_remaining >> (i + 1);
2030
2031                 /* Add in the bandwidth used for those scheduled packets */
2032                 bw_added = packets_transmitted * (overhead + packet_size);
2033
2034                 /* How many packets do we have remaining to transmit? */
2035                 packets_remaining = packets_remaining % (1 << (i + 1));
2036
2037                 /* What largest max packet size should those packets have? */
2038                 /* If we've transmitted all packets, don't carry over the
2039                  * largest packet size.
2040                  */
2041                 if (packets_remaining == 0) {
2042                         packet_size = 0;
2043                         overhead = 0;
2044                 } else if (packets_transmitted > 0) {
2045                         /* Otherwise if we do have remaining packets, and we've
2046                          * scheduled some packets in this interval, take the
2047                          * largest max packet size from endpoints with this
2048                          * interval.
2049                          */
2050                         packet_size = largest_mps;
2051                         overhead = interval_overhead;
2052                 }
2053                 /* Otherwise carry over packet_size and overhead from the last
2054                  * time we had a remainder.
2055                  */
2056                 bw_used += bw_added;
2057                 if (bw_used > max_bandwidth) {
2058                         xhci_warn(xhci, "Not enough bandwidth. "
2059                                         "Proposed: %u, Max: %u\n",
2060                                 bw_used, max_bandwidth);
2061                         return -ENOMEM;
2062                 }
2063         }
2064         /*
2065          * Ok, we know we have some packets left over after even-handedly
2066          * scheduling interval 15.  We don't know which microframes they will
2067          * fit into, so we over-schedule and say they will be scheduled every
2068          * microframe.
2069          */
2070         if (packets_remaining > 0)
2071                 bw_used += overhead + packet_size;
2072
2073         if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2074                 unsigned int port_index = virt_dev->real_port - 1;
2075
2076                 /* OK, we're manipulating a HS device attached to a
2077                  * root port bandwidth domain.  Include the number of active TTs
2078                  * in the bandwidth used.
2079                  */
2080                 bw_used += TT_HS_OVERHEAD *
2081                         xhci->rh_bw[port_index].num_active_tts;
2082         }
2083
2084         xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2085                 "Available: %u " "percent\n",
2086                 bw_used, max_bandwidth, bw_reserved,
2087                 (max_bandwidth - bw_used - bw_reserved) * 100 /
2088                 max_bandwidth);
2089
2090         bw_used += bw_reserved;
2091         if (bw_used > max_bandwidth) {
2092                 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2093                                 bw_used, max_bandwidth);
2094                 return -ENOMEM;
2095         }
2096
2097         bw_table->bw_used = bw_used;
2098         return 0;
2099 }
2100
2101 static bool xhci_is_async_ep(unsigned int ep_type)
2102 {
2103         return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2104                                         ep_type != ISOC_IN_EP &&
2105                                         ep_type != INT_IN_EP);
2106 }
2107
2108 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2109 {
2110         return (ep_type == ISOC_IN_EP || ep_type != INT_IN_EP);
2111 }
2112
2113 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2114 {
2115         unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2116
2117         if (ep_bw->ep_interval == 0)
2118                 return SS_OVERHEAD_BURST +
2119                         (ep_bw->mult * ep_bw->num_packets *
2120                                         (SS_OVERHEAD + mps));
2121         return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2122                                 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2123                                 1 << ep_bw->ep_interval);
2124
2125 }
2126
2127 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2128                 struct xhci_bw_info *ep_bw,
2129                 struct xhci_interval_bw_table *bw_table,
2130                 struct usb_device *udev,
2131                 struct xhci_virt_ep *virt_ep,
2132                 struct xhci_tt_bw_info *tt_info)
2133 {
2134         struct xhci_interval_bw *interval_bw;
2135         int normalized_interval;
2136
2137         if (xhci_is_async_ep(ep_bw->type))
2138                 return;
2139
2140         if (udev->speed == USB_SPEED_SUPER) {
2141                 if (xhci_is_sync_in_ep(ep_bw->type))
2142                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2143                                 xhci_get_ss_bw_consumed(ep_bw);
2144                 else
2145                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2146                                 xhci_get_ss_bw_consumed(ep_bw);
2147                 return;
2148         }
2149
2150         /* SuperSpeed endpoints never get added to intervals in the table, so
2151          * this check is only valid for HS/FS/LS devices.
2152          */
2153         if (list_empty(&virt_ep->bw_endpoint_list))
2154                 return;
2155         /* For LS/FS devices, we need to translate the interval expressed in
2156          * microframes to frames.
2157          */
2158         if (udev->speed == USB_SPEED_HIGH)
2159                 normalized_interval = ep_bw->ep_interval;
2160         else
2161                 normalized_interval = ep_bw->ep_interval - 3;
2162
2163         if (normalized_interval == 0)
2164                 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2165         interval_bw = &bw_table->interval_bw[normalized_interval];
2166         interval_bw->num_packets -= ep_bw->num_packets;
2167         switch (udev->speed) {
2168         case USB_SPEED_LOW:
2169                 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2170                 break;
2171         case USB_SPEED_FULL:
2172                 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2173                 break;
2174         case USB_SPEED_HIGH:
2175                 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2176                 break;
2177         case USB_SPEED_SUPER:
2178         case USB_SPEED_UNKNOWN:
2179         case USB_SPEED_WIRELESS:
2180                 /* Should never happen because only LS/FS/HS endpoints will get
2181                  * added to the endpoint list.
2182                  */
2183                 return;
2184         }
2185         if (tt_info)
2186                 tt_info->active_eps -= 1;
2187         list_del_init(&virt_ep->bw_endpoint_list);
2188 }
2189
2190 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2191                 struct xhci_bw_info *ep_bw,
2192                 struct xhci_interval_bw_table *bw_table,
2193                 struct usb_device *udev,
2194                 struct xhci_virt_ep *virt_ep,
2195                 struct xhci_tt_bw_info *tt_info)
2196 {
2197         struct xhci_interval_bw *interval_bw;
2198         struct xhci_virt_ep *smaller_ep;
2199         int normalized_interval;
2200
2201         if (xhci_is_async_ep(ep_bw->type))
2202                 return;
2203
2204         if (udev->speed == USB_SPEED_SUPER) {
2205                 if (xhci_is_sync_in_ep(ep_bw->type))
2206                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2207                                 xhci_get_ss_bw_consumed(ep_bw);
2208                 else
2209                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2210                                 xhci_get_ss_bw_consumed(ep_bw);
2211                 return;
2212         }
2213
2214         /* For LS/FS devices, we need to translate the interval expressed in
2215          * microframes to frames.
2216          */
2217         if (udev->speed == USB_SPEED_HIGH)
2218                 normalized_interval = ep_bw->ep_interval;
2219         else
2220                 normalized_interval = ep_bw->ep_interval - 3;
2221
2222         if (normalized_interval == 0)
2223                 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2224         interval_bw = &bw_table->interval_bw[normalized_interval];
2225         interval_bw->num_packets += ep_bw->num_packets;
2226         switch (udev->speed) {
2227         case USB_SPEED_LOW:
2228                 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2229                 break;
2230         case USB_SPEED_FULL:
2231                 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2232                 break;
2233         case USB_SPEED_HIGH:
2234                 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2235                 break;
2236         case USB_SPEED_SUPER:
2237         case USB_SPEED_UNKNOWN:
2238         case USB_SPEED_WIRELESS:
2239                 /* Should never happen because only LS/FS/HS endpoints will get
2240                  * added to the endpoint list.
2241                  */
2242                 return;
2243         }
2244
2245         if (tt_info)
2246                 tt_info->active_eps += 1;
2247         /* Insert the endpoint into the list, largest max packet size first. */
2248         list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2249                         bw_endpoint_list) {
2250                 if (ep_bw->max_packet_size >=
2251                                 smaller_ep->bw_info.max_packet_size) {
2252                         /* Add the new ep before the smaller endpoint */
2253                         list_add_tail(&virt_ep->bw_endpoint_list,
2254                                         &smaller_ep->bw_endpoint_list);
2255                         return;
2256                 }
2257         }
2258         /* Add the new endpoint at the end of the list. */
2259         list_add_tail(&virt_ep->bw_endpoint_list,
2260                         &interval_bw->endpoints);
2261 }
2262
2263 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2264                 struct xhci_virt_device *virt_dev,
2265                 int old_active_eps)
2266 {
2267         struct xhci_root_port_bw_info *rh_bw_info;
2268         if (!virt_dev->tt_info)
2269                 return;
2270
2271         rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2272         if (old_active_eps == 0 &&
2273                                 virt_dev->tt_info->active_eps != 0) {
2274                 rh_bw_info->num_active_tts += 1;
2275                 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2276         } else if (old_active_eps != 0 &&
2277                                 virt_dev->tt_info->active_eps == 0) {
2278                 rh_bw_info->num_active_tts -= 1;
2279                 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2280         }
2281 }
2282
2283 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2284                 struct xhci_virt_device *virt_dev,
2285                 struct xhci_container_ctx *in_ctx)
2286 {
2287         struct xhci_bw_info ep_bw_info[31];
2288         int i;
2289         struct xhci_input_control_ctx *ctrl_ctx;
2290         int old_active_eps = 0;
2291
2292         if (virt_dev->tt_info)
2293                 old_active_eps = virt_dev->tt_info->active_eps;
2294
2295         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2296
2297         for (i = 0; i < 31; i++) {
2298                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2299                         continue;
2300
2301                 /* Make a copy of the BW info in case we need to revert this */
2302                 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2303                                 sizeof(ep_bw_info[i]));
2304                 /* Drop the endpoint from the interval table if the endpoint is
2305                  * being dropped or changed.
2306                  */
2307                 if (EP_IS_DROPPED(ctrl_ctx, i))
2308                         xhci_drop_ep_from_interval_table(xhci,
2309                                         &virt_dev->eps[i].bw_info,
2310                                         virt_dev->bw_table,
2311                                         virt_dev->udev,
2312                                         &virt_dev->eps[i],
2313                                         virt_dev->tt_info);
2314         }
2315         /* Overwrite the information stored in the endpoints' bw_info */
2316         xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2317         for (i = 0; i < 31; i++) {
2318                 /* Add any changed or added endpoints to the interval table */
2319                 if (EP_IS_ADDED(ctrl_ctx, i))
2320                         xhci_add_ep_to_interval_table(xhci,
2321                                         &virt_dev->eps[i].bw_info,
2322                                         virt_dev->bw_table,
2323                                         virt_dev->udev,
2324                                         &virt_dev->eps[i],
2325                                         virt_dev->tt_info);
2326         }
2327
2328         if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2329                 /* Ok, this fits in the bandwidth we have.
2330                  * Update the number of active TTs.
2331                  */
2332                 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2333                 return 0;
2334         }
2335
2336         /* We don't have enough bandwidth for this, revert the stored info. */
2337         for (i = 0; i < 31; i++) {
2338                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2339                         continue;
2340
2341                 /* Drop the new copies of any added or changed endpoints from
2342                  * the interval table.
2343                  */
2344                 if (EP_IS_ADDED(ctrl_ctx, i)) {
2345                         xhci_drop_ep_from_interval_table(xhci,
2346                                         &virt_dev->eps[i].bw_info,
2347                                         virt_dev->bw_table,
2348                                         virt_dev->udev,
2349                                         &virt_dev->eps[i],
2350                                         virt_dev->tt_info);
2351                 }
2352                 /* Revert the endpoint back to its old information */
2353                 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2354                                 sizeof(ep_bw_info[i]));
2355                 /* Add any changed or dropped endpoints back into the table */
2356                 if (EP_IS_DROPPED(ctrl_ctx, i))
2357                         xhci_add_ep_to_interval_table(xhci,
2358                                         &virt_dev->eps[i].bw_info,
2359                                         virt_dev->bw_table,
2360                                         virt_dev->udev,
2361                                         &virt_dev->eps[i],
2362                                         virt_dev->tt_info);
2363         }
2364         return -ENOMEM;
2365 }
2366
2367
2368 /* Issue a configure endpoint command or evaluate context command
2369  * and wait for it to finish.
2370  */
2371 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2372                 struct usb_device *udev,
2373                 struct xhci_command *command,
2374                 bool ctx_change, bool must_succeed)
2375 {
2376         int ret;
2377         int timeleft;
2378         unsigned long flags;
2379         struct xhci_container_ctx *in_ctx;
2380         struct completion *cmd_completion;
2381         u32 *cmd_status;
2382         struct xhci_virt_device *virt_dev;
2383
2384         spin_lock_irqsave(&xhci->lock, flags);
2385         virt_dev = xhci->devs[udev->slot_id];
2386
2387         if (command)
2388                 in_ctx = command->in_ctx;
2389         else
2390                 in_ctx = virt_dev->in_ctx;
2391
2392         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2393                         xhci_reserve_host_resources(xhci, in_ctx)) {
2394                 spin_unlock_irqrestore(&xhci->lock, flags);
2395                 xhci_warn(xhci, "Not enough host resources, "
2396                                 "active endpoint contexts = %u\n",
2397                                 xhci->num_active_eps);
2398                 return -ENOMEM;
2399         }
2400         if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2401                         xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2402                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2403                         xhci_free_host_resources(xhci, in_ctx);
2404                 spin_unlock_irqrestore(&xhci->lock, flags);
2405                 xhci_warn(xhci, "Not enough bandwidth\n");
2406                 return -ENOMEM;
2407         }
2408
2409         if (command) {
2410                 cmd_completion = command->completion;
2411                 cmd_status = &command->status;
2412                 command->command_trb = xhci->cmd_ring->enqueue;
2413
2414                 /* Enqueue pointer can be left pointing to the link TRB,
2415                  * we must handle that
2416                  */
2417                 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2418                         command->command_trb =
2419                                 xhci->cmd_ring->enq_seg->next->trbs;
2420
2421                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2422         } else {
2423                 cmd_completion = &virt_dev->cmd_completion;
2424                 cmd_status = &virt_dev->cmd_status;
2425         }
2426         init_completion(cmd_completion);
2427
2428         if (!ctx_change)
2429                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2430                                 udev->slot_id, must_succeed);
2431         else
2432                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2433                                 udev->slot_id);
2434         if (ret < 0) {
2435                 if (command)
2436                         list_del(&command->cmd_list);
2437                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2438                         xhci_free_host_resources(xhci, in_ctx);
2439                 spin_unlock_irqrestore(&xhci->lock, flags);
2440                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2441                 return -ENOMEM;
2442         }
2443         xhci_ring_cmd_db(xhci);
2444         spin_unlock_irqrestore(&xhci->lock, flags);
2445
2446         /* Wait for the configure endpoint command to complete */
2447         timeleft = wait_for_completion_interruptible_timeout(
2448                         cmd_completion,
2449                         USB_CTRL_SET_TIMEOUT);
2450         if (timeleft <= 0) {
2451                 xhci_warn(xhci, "%s while waiting for %s command\n",
2452                                 timeleft == 0 ? "Timeout" : "Signal",
2453                                 ctx_change == 0 ?
2454                                         "configure endpoint" :
2455                                         "evaluate context");
2456                 /* FIXME cancel the configure endpoint command */
2457                 return -ETIME;
2458         }
2459
2460         if (!ctx_change)
2461                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2462         else
2463                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2464
2465         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2466                 spin_lock_irqsave(&xhci->lock, flags);
2467                 /* If the command failed, remove the reserved resources.
2468                  * Otherwise, clean up the estimate to include dropped eps.
2469                  */
2470                 if (ret)
2471                         xhci_free_host_resources(xhci, in_ctx);
2472                 else
2473                         xhci_finish_resource_reservation(xhci, in_ctx);
2474                 spin_unlock_irqrestore(&xhci->lock, flags);
2475         }
2476         return ret;
2477 }
2478
2479 /* Called after one or more calls to xhci_add_endpoint() or
2480  * xhci_drop_endpoint().  If this call fails, the USB core is expected
2481  * to call xhci_reset_bandwidth().
2482  *
2483  * Since we are in the middle of changing either configuration or
2484  * installing a new alt setting, the USB core won't allow URBs to be
2485  * enqueued for any endpoint on the old config or interface.  Nothing
2486  * else should be touching the xhci->devs[slot_id] structure, so we
2487  * don't need to take the xhci->lock for manipulating that.
2488  */
2489 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2490 {
2491         int i;
2492         int ret = 0;
2493         struct xhci_hcd *xhci;
2494         struct xhci_virt_device *virt_dev;
2495         struct xhci_input_control_ctx *ctrl_ctx;
2496         struct xhci_slot_ctx *slot_ctx;
2497
2498         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2499         if (ret <= 0)
2500                 return ret;
2501         xhci = hcd_to_xhci(hcd);
2502         if (xhci->xhc_state & XHCI_STATE_DYING)
2503                 return -ENODEV;
2504
2505         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2506         virt_dev = xhci->devs[udev->slot_id];
2507
2508         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2509         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2510         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2511         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2512         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2513
2514         /* Don't issue the command if there's no endpoints to update. */
2515         if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2516                         ctrl_ctx->drop_flags == 0)
2517                 return 0;
2518
2519         xhci_dbg(xhci, "New Input Control Context:\n");
2520         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2521         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2522                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2523
2524         ret = xhci_configure_endpoint(xhci, udev, NULL,
2525                         false, false);
2526         if (ret) {
2527                 /* Callee should call reset_bandwidth() */
2528                 return ret;
2529         }
2530
2531         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2532         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2533                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2534
2535         /* Free any rings that were dropped, but not changed. */
2536         for (i = 1; i < 31; ++i) {
2537                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2538                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2539                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2540         }
2541         xhci_zero_in_ctx(xhci, virt_dev);
2542         /*
2543          * Install any rings for completely new endpoints or changed endpoints,
2544          * and free or cache any old rings from changed endpoints.
2545          */
2546         for (i = 1; i < 31; ++i) {
2547                 if (!virt_dev->eps[i].new_ring)
2548                         continue;
2549                 /* Only cache or free the old ring if it exists.
2550                  * It may not if this is the first add of an endpoint.
2551                  */
2552                 if (virt_dev->eps[i].ring) {
2553                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2554                 }
2555                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2556                 virt_dev->eps[i].new_ring = NULL;
2557         }
2558
2559         return ret;
2560 }
2561
2562 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2563 {
2564         struct xhci_hcd *xhci;
2565         struct xhci_virt_device *virt_dev;
2566         int i, ret;
2567
2568         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2569         if (ret <= 0)
2570                 return;
2571         xhci = hcd_to_xhci(hcd);
2572
2573         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2574         virt_dev = xhci->devs[udev->slot_id];
2575         /* Free any rings allocated for added endpoints */
2576         for (i = 0; i < 31; ++i) {
2577                 if (virt_dev->eps[i].new_ring) {
2578                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2579                         virt_dev->eps[i].new_ring = NULL;
2580                 }
2581         }
2582         xhci_zero_in_ctx(xhci, virt_dev);
2583 }
2584
2585 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2586                 struct xhci_container_ctx *in_ctx,
2587                 struct xhci_container_ctx *out_ctx,
2588                 u32 add_flags, u32 drop_flags)
2589 {
2590         struct xhci_input_control_ctx *ctrl_ctx;
2591         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2592         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2593         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2594         xhci_slot_copy(xhci, in_ctx, out_ctx);
2595         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2596
2597         xhci_dbg(xhci, "Input Context:\n");
2598         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2599 }
2600
2601 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2602                 unsigned int slot_id, unsigned int ep_index,
2603                 struct xhci_dequeue_state *deq_state)
2604 {
2605         struct xhci_container_ctx *in_ctx;
2606         struct xhci_ep_ctx *ep_ctx;
2607         u32 added_ctxs;
2608         dma_addr_t addr;
2609
2610         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2611                         xhci->devs[slot_id]->out_ctx, ep_index);
2612         in_ctx = xhci->devs[slot_id]->in_ctx;
2613         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2614         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2615                         deq_state->new_deq_ptr);
2616         if (addr == 0) {
2617                 xhci_warn(xhci, "WARN Cannot submit config ep after "
2618                                 "reset ep command\n");
2619                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2620                                 deq_state->new_deq_seg,
2621                                 deq_state->new_deq_ptr);
2622                 return;
2623         }
2624         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2625
2626         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2627         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2628                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2629 }
2630
2631 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2632                 struct usb_device *udev, unsigned int ep_index)
2633 {
2634         struct xhci_dequeue_state deq_state;
2635         struct xhci_virt_ep *ep;
2636
2637         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2638         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2639         /* We need to move the HW's dequeue pointer past this TD,
2640          * or it will attempt to resend it on the next doorbell ring.
2641          */
2642         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2643                         ep_index, ep->stopped_stream, ep->stopped_td,
2644                         &deq_state);
2645
2646         /* HW with the reset endpoint quirk will use the saved dequeue state to
2647          * issue a configure endpoint command later.
2648          */
2649         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2650                 xhci_dbg(xhci, "Queueing new dequeue state\n");
2651                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2652                                 ep_index, ep->stopped_stream, &deq_state);
2653         } else {
2654                 /* Better hope no one uses the input context between now and the
2655                  * reset endpoint completion!
2656                  * XXX: No idea how this hardware will react when stream rings
2657                  * are enabled.
2658                  */
2659                 xhci_dbg(xhci, "Setting up input context for "
2660                                 "configure endpoint command\n");
2661                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2662                                 ep_index, &deq_state);
2663         }
2664 }
2665
2666 /* Deal with stalled endpoints.  The core should have sent the control message
2667  * to clear the halt condition.  However, we need to make the xHCI hardware
2668  * reset its sequence number, since a device will expect a sequence number of
2669  * zero after the halt condition is cleared.
2670  * Context: in_interrupt
2671  */
2672 void xhci_endpoint_reset(struct usb_hcd *hcd,
2673                 struct usb_host_endpoint *ep)
2674 {
2675         struct xhci_hcd *xhci;
2676         struct usb_device *udev;
2677         unsigned int ep_index;
2678         unsigned long flags;
2679         int ret;
2680         struct xhci_virt_ep *virt_ep;
2681
2682         xhci = hcd_to_xhci(hcd);
2683         udev = (struct usb_device *) ep->hcpriv;
2684         /* Called with a root hub endpoint (or an endpoint that wasn't added
2685          * with xhci_add_endpoint()
2686          */
2687         if (!ep->hcpriv)
2688                 return;
2689         ep_index = xhci_get_endpoint_index(&ep->desc);
2690         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2691         if (!virt_ep->stopped_td) {
2692                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2693                                 ep->desc.bEndpointAddress);
2694                 return;
2695         }
2696         if (usb_endpoint_xfer_control(&ep->desc)) {
2697                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2698                 return;
2699         }
2700
2701         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2702         spin_lock_irqsave(&xhci->lock, flags);
2703         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2704         /*
2705          * Can't change the ring dequeue pointer until it's transitioned to the
2706          * stopped state, which is only upon a successful reset endpoint
2707          * command.  Better hope that last command worked!
2708          */
2709         if (!ret) {
2710                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2711                 kfree(virt_ep->stopped_td);
2712                 xhci_ring_cmd_db(xhci);
2713         }
2714         virt_ep->stopped_td = NULL;
2715         virt_ep->stopped_trb = NULL;
2716         virt_ep->stopped_stream = 0;
2717         spin_unlock_irqrestore(&xhci->lock, flags);
2718
2719         if (ret)
2720                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2721 }
2722
2723 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2724                 struct usb_device *udev, struct usb_host_endpoint *ep,
2725                 unsigned int slot_id)
2726 {
2727         int ret;
2728         unsigned int ep_index;
2729         unsigned int ep_state;
2730
2731         if (!ep)
2732                 return -EINVAL;
2733         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2734         if (ret <= 0)
2735                 return -EINVAL;
2736         if (ep->ss_ep_comp.bmAttributes == 0) {
2737                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2738                                 " descriptor for ep 0x%x does not support streams\n",
2739                                 ep->desc.bEndpointAddress);
2740                 return -EINVAL;
2741         }
2742
2743         ep_index = xhci_get_endpoint_index(&ep->desc);
2744         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2745         if (ep_state & EP_HAS_STREAMS ||
2746                         ep_state & EP_GETTING_STREAMS) {
2747                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2748                                 "already has streams set up.\n",
2749                                 ep->desc.bEndpointAddress);
2750                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2751                                 "dynamic stream context array reallocation.\n");
2752                 return -EINVAL;
2753         }
2754         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2755                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2756                                 "endpoint 0x%x; URBs are pending.\n",
2757                                 ep->desc.bEndpointAddress);
2758                 return -EINVAL;
2759         }
2760         return 0;
2761 }
2762
2763 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2764                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2765 {
2766         unsigned int max_streams;
2767
2768         /* The stream context array size must be a power of two */
2769         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2770         /*
2771          * Find out how many primary stream array entries the host controller
2772          * supports.  Later we may use secondary stream arrays (similar to 2nd
2773          * level page entries), but that's an optional feature for xHCI host
2774          * controllers. xHCs must support at least 4 stream IDs.
2775          */
2776         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2777         if (*num_stream_ctxs > max_streams) {
2778                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2779                                 max_streams);
2780                 *num_stream_ctxs = max_streams;
2781                 *num_streams = max_streams;
2782         }
2783 }
2784
2785 /* Returns an error code if one of the endpoint already has streams.
2786  * This does not change any data structures, it only checks and gathers
2787  * information.
2788  */
2789 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2790                 struct usb_device *udev,
2791                 struct usb_host_endpoint **eps, unsigned int num_eps,
2792                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2793 {
2794         unsigned int max_streams;
2795         unsigned int endpoint_flag;
2796         int i;
2797         int ret;
2798
2799         for (i = 0; i < num_eps; i++) {
2800                 ret = xhci_check_streams_endpoint(xhci, udev,
2801                                 eps[i], udev->slot_id);
2802                 if (ret < 0)
2803                         return ret;
2804
2805                 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2806                 if (max_streams < (*num_streams - 1)) {
2807                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2808                                         eps[i]->desc.bEndpointAddress,
2809                                         max_streams);
2810                         *num_streams = max_streams+1;
2811                 }
2812
2813                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2814                 if (*changed_ep_bitmask & endpoint_flag)
2815                         return -EINVAL;
2816                 *changed_ep_bitmask |= endpoint_flag;
2817         }
2818         return 0;
2819 }
2820
2821 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2822                 struct usb_device *udev,
2823                 struct usb_host_endpoint **eps, unsigned int num_eps)
2824 {
2825         u32 changed_ep_bitmask = 0;
2826         unsigned int slot_id;
2827         unsigned int ep_index;
2828         unsigned int ep_state;
2829         int i;
2830
2831         slot_id = udev->slot_id;
2832         if (!xhci->devs[slot_id])
2833                 return 0;
2834
2835         for (i = 0; i < num_eps; i++) {
2836                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2837                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2838                 /* Are streams already being freed for the endpoint? */
2839                 if (ep_state & EP_GETTING_NO_STREAMS) {
2840                         xhci_warn(xhci, "WARN Can't disable streams for "
2841                                         "endpoint 0x%x\n, "
2842                                         "streams are being disabled already.",
2843                                         eps[i]->desc.bEndpointAddress);
2844                         return 0;
2845                 }
2846                 /* Are there actually any streams to free? */
2847                 if (!(ep_state & EP_HAS_STREAMS) &&
2848                                 !(ep_state & EP_GETTING_STREAMS)) {
2849                         xhci_warn(xhci, "WARN Can't disable streams for "
2850                                         "endpoint 0x%x\n, "
2851                                         "streams are already disabled!",
2852                                         eps[i]->desc.bEndpointAddress);
2853                         xhci_warn(xhci, "WARN xhci_free_streams() called "
2854                                         "with non-streams endpoint\n");
2855                         return 0;
2856                 }
2857                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2858         }
2859         return changed_ep_bitmask;
2860 }
2861
2862 /*
2863  * The USB device drivers use this function (though the HCD interface in USB
2864  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
2865  * coordinate mass storage command queueing across multiple endpoints (basically
2866  * a stream ID == a task ID).
2867  *
2868  * Setting up streams involves allocating the same size stream context array
2869  * for each endpoint and issuing a configure endpoint command for all endpoints.
2870  *
2871  * Don't allow the call to succeed if one endpoint only supports one stream
2872  * (which means it doesn't support streams at all).
2873  *
2874  * Drivers may get less stream IDs than they asked for, if the host controller
2875  * hardware or endpoints claim they can't support the number of requested
2876  * stream IDs.
2877  */
2878 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2879                 struct usb_host_endpoint **eps, unsigned int num_eps,
2880                 unsigned int num_streams, gfp_t mem_flags)
2881 {
2882         int i, ret;
2883         struct xhci_hcd *xhci;
2884         struct xhci_virt_device *vdev;
2885         struct xhci_command *config_cmd;
2886         unsigned int ep_index;
2887         unsigned int num_stream_ctxs;
2888         unsigned long flags;
2889         u32 changed_ep_bitmask = 0;
2890
2891         if (!eps)
2892                 return -EINVAL;
2893
2894         /* Add one to the number of streams requested to account for
2895          * stream 0 that is reserved for xHCI usage.
2896          */
2897         num_streams += 1;
2898         xhci = hcd_to_xhci(hcd);
2899         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2900                         num_streams);
2901
2902         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2903         if (!config_cmd) {
2904                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2905                 return -ENOMEM;
2906         }
2907
2908         /* Check to make sure all endpoints are not already configured for
2909          * streams.  While we're at it, find the maximum number of streams that
2910          * all the endpoints will support and check for duplicate endpoints.
2911          */
2912         spin_lock_irqsave(&xhci->lock, flags);
2913         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2914                         num_eps, &num_streams, &changed_ep_bitmask);
2915         if (ret < 0) {
2916                 xhci_free_command(xhci, config_cmd);
2917                 spin_unlock_irqrestore(&xhci->lock, flags);
2918                 return ret;
2919         }
2920         if (num_streams <= 1) {
2921                 xhci_warn(xhci, "WARN: endpoints can't handle "
2922                                 "more than one stream.\n");
2923                 xhci_free_command(xhci, config_cmd);
2924                 spin_unlock_irqrestore(&xhci->lock, flags);
2925                 return -EINVAL;
2926         }
2927         vdev = xhci->devs[udev->slot_id];
2928         /* Mark each endpoint as being in transition, so
2929          * xhci_urb_enqueue() will reject all URBs.
2930          */
2931         for (i = 0; i < num_eps; i++) {
2932                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2933                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2934         }
2935         spin_unlock_irqrestore(&xhci->lock, flags);
2936
2937         /* Setup internal data structures and allocate HW data structures for
2938          * streams (but don't install the HW structures in the input context
2939          * until we're sure all memory allocation succeeded).
2940          */
2941         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2942         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2943                         num_stream_ctxs, num_streams);
2944
2945         for (i = 0; i < num_eps; i++) {
2946                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2947                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2948                                 num_stream_ctxs,
2949                                 num_streams, mem_flags);
2950                 if (!vdev->eps[ep_index].stream_info)
2951                         goto cleanup;
2952                 /* Set maxPstreams in endpoint context and update deq ptr to
2953                  * point to stream context array. FIXME
2954                  */
2955         }
2956
2957         /* Set up the input context for a configure endpoint command. */
2958         for (i = 0; i < num_eps; i++) {
2959                 struct xhci_ep_ctx *ep_ctx;
2960
2961                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2962                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2963
2964                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2965                                 vdev->out_ctx, ep_index);
2966                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2967                                 vdev->eps[ep_index].stream_info);
2968         }
2969         /* Tell the HW to drop its old copy of the endpoint context info
2970          * and add the updated copy from the input context.
2971          */
2972         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2973                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2974
2975         /* Issue and wait for the configure endpoint command */
2976         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2977                         false, false);
2978
2979         /* xHC rejected the configure endpoint command for some reason, so we
2980          * leave the old ring intact and free our internal streams data
2981          * structure.
2982          */
2983         if (ret < 0)
2984                 goto cleanup;
2985
2986         spin_lock_irqsave(&xhci->lock, flags);
2987         for (i = 0; i < num_eps; i++) {
2988                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2989                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2990                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2991                          udev->slot_id, ep_index);
2992                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2993         }
2994         xhci_free_command(xhci, config_cmd);
2995         spin_unlock_irqrestore(&xhci->lock, flags);
2996
2997         /* Subtract 1 for stream 0, which drivers can't use */
2998         return num_streams - 1;
2999
3000 cleanup:
3001         /* If it didn't work, free the streams! */
3002         for (i = 0; i < num_eps; i++) {
3003                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3004                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3005                 vdev->eps[ep_index].stream_info = NULL;
3006                 /* FIXME Unset maxPstreams in endpoint context and
3007                  * update deq ptr to point to normal string ring.
3008                  */
3009                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3010                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3011                 xhci_endpoint_zero(xhci, vdev, eps[i]);
3012         }
3013         xhci_free_command(xhci, config_cmd);
3014         return -ENOMEM;
3015 }
3016
3017 /* Transition the endpoint from using streams to being a "normal" endpoint
3018  * without streams.
3019  *
3020  * Modify the endpoint context state, submit a configure endpoint command,
3021  * and free all endpoint rings for streams if that completes successfully.
3022  */
3023 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3024                 struct usb_host_endpoint **eps, unsigned int num_eps,
3025                 gfp_t mem_flags)
3026 {
3027         int i, ret;
3028         struct xhci_hcd *xhci;
3029         struct xhci_virt_device *vdev;
3030         struct xhci_command *command;
3031         unsigned int ep_index;
3032         unsigned long flags;
3033         u32 changed_ep_bitmask;
3034
3035         xhci = hcd_to_xhci(hcd);
3036         vdev = xhci->devs[udev->slot_id];
3037
3038         /* Set up a configure endpoint command to remove the streams rings */
3039         spin_lock_irqsave(&xhci->lock, flags);
3040         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3041                         udev, eps, num_eps);
3042         if (changed_ep_bitmask == 0) {
3043                 spin_unlock_irqrestore(&xhci->lock, flags);
3044                 return -EINVAL;
3045         }
3046
3047         /* Use the xhci_command structure from the first endpoint.  We may have
3048          * allocated too many, but the driver may call xhci_free_streams() for
3049          * each endpoint it grouped into one call to xhci_alloc_streams().
3050          */
3051         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3052         command = vdev->eps[ep_index].stream_info->free_streams_command;
3053         for (i = 0; i < num_eps; i++) {
3054                 struct xhci_ep_ctx *ep_ctx;
3055
3056                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3057                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3058                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3059                         EP_GETTING_NO_STREAMS;
3060
3061                 xhci_endpoint_copy(xhci, command->in_ctx,
3062                                 vdev->out_ctx, ep_index);
3063                 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3064                                 &vdev->eps[ep_index]);
3065         }
3066         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3067                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3068         spin_unlock_irqrestore(&xhci->lock, flags);
3069
3070         /* Issue and wait for the configure endpoint command,
3071          * which must succeed.
3072          */
3073         ret = xhci_configure_endpoint(xhci, udev, command,
3074                         false, true);
3075
3076         /* xHC rejected the configure endpoint command for some reason, so we
3077          * leave the streams rings intact.
3078          */
3079         if (ret < 0)
3080                 return ret;
3081
3082         spin_lock_irqsave(&xhci->lock, flags);
3083         for (i = 0; i < num_eps; i++) {
3084                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3085                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3086                 vdev->eps[ep_index].stream_info = NULL;
3087                 /* FIXME Unset maxPstreams in endpoint context and
3088                  * update deq ptr to point to normal string ring.
3089                  */
3090                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3091                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3092         }
3093         spin_unlock_irqrestore(&xhci->lock, flags);
3094
3095         return 0;
3096 }
3097
3098 /*
3099  * Deletes endpoint resources for endpoints that were active before a Reset
3100  * Device command, or a Disable Slot command.  The Reset Device command leaves
3101  * the control endpoint intact, whereas the Disable Slot command deletes it.
3102  *
3103  * Must be called with xhci->lock held.
3104  */
3105 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3106         struct xhci_virt_device *virt_dev, bool drop_control_ep)
3107 {
3108         int i;
3109         unsigned int num_dropped_eps = 0;
3110         unsigned int drop_flags = 0;
3111
3112         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3113                 if (virt_dev->eps[i].ring) {
3114                         drop_flags |= 1 << i;
3115                         num_dropped_eps++;
3116                 }
3117         }
3118         xhci->num_active_eps -= num_dropped_eps;
3119         if (num_dropped_eps)
3120                 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3121                                 "%u now active.\n",
3122                                 num_dropped_eps, drop_flags,
3123                                 xhci->num_active_eps);
3124 }
3125
3126 /*
3127  * This submits a Reset Device Command, which will set the device state to 0,
3128  * set the device address to 0, and disable all the endpoints except the default
3129  * control endpoint.  The USB core should come back and call
3130  * xhci_address_device(), and then re-set up the configuration.  If this is
3131  * called because of a usb_reset_and_verify_device(), then the old alternate
3132  * settings will be re-installed through the normal bandwidth allocation
3133  * functions.
3134  *
3135  * Wait for the Reset Device command to finish.  Remove all structures
3136  * associated with the endpoints that were disabled.  Clear the input device
3137  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
3138  *
3139  * If the virt_dev to be reset does not exist or does not match the udev,
3140  * it means the device is lost, possibly due to the xHC restore error and
3141  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3142  * re-allocate the device.
3143  */
3144 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3145 {
3146         int ret, i;
3147         unsigned long flags;
3148         struct xhci_hcd *xhci;
3149         unsigned int slot_id;
3150         struct xhci_virt_device *virt_dev;
3151         struct xhci_command *reset_device_cmd;
3152         int timeleft;
3153         int last_freed_endpoint;
3154         struct xhci_slot_ctx *slot_ctx;
3155         int old_active_eps = 0;
3156
3157         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3158         if (ret <= 0)
3159                 return ret;
3160         xhci = hcd_to_xhci(hcd);
3161         slot_id = udev->slot_id;
3162         virt_dev = xhci->devs[slot_id];
3163         if (!virt_dev) {
3164                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3165                                 "not exist. Re-allocate the device\n", slot_id);
3166                 ret = xhci_alloc_dev(hcd, udev);
3167                 if (ret == 1)
3168                         return 0;
3169                 else
3170                         return -EINVAL;
3171         }
3172
3173         if (virt_dev->udev != udev) {
3174                 /* If the virt_dev and the udev does not match, this virt_dev
3175                  * may belong to another udev.
3176                  * Re-allocate the device.
3177                  */
3178                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3179                                 "not match the udev. Re-allocate the device\n",
3180                                 slot_id);
3181                 ret = xhci_alloc_dev(hcd, udev);
3182                 if (ret == 1)
3183                         return 0;
3184                 else
3185                         return -EINVAL;
3186         }
3187
3188         /* If device is not setup, there is no point in resetting it */
3189         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3190         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3191                                                 SLOT_STATE_DISABLED)
3192                 return 0;
3193
3194         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3195         /* Allocate the command structure that holds the struct completion.
3196          * Assume we're in process context, since the normal device reset
3197          * process has to wait for the device anyway.  Storage devices are
3198          * reset as part of error handling, so use GFP_NOIO instead of
3199          * GFP_KERNEL.
3200          */
3201         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3202         if (!reset_device_cmd) {
3203                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3204                 return -ENOMEM;
3205         }
3206
3207         /* Attempt to submit the Reset Device command to the command ring */
3208         spin_lock_irqsave(&xhci->lock, flags);
3209         reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3210
3211         /* Enqueue pointer can be left pointing to the link TRB,
3212          * we must handle that
3213          */
3214         if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3215                 reset_device_cmd->command_trb =
3216                         xhci->cmd_ring->enq_seg->next->trbs;
3217
3218         list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3219         ret = xhci_queue_reset_device(xhci, slot_id);
3220         if (ret) {
3221                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3222                 list_del(&reset_device_cmd->cmd_list);
3223                 spin_unlock_irqrestore(&xhci->lock, flags);
3224                 goto command_cleanup;
3225         }
3226         xhci_ring_cmd_db(xhci);
3227         spin_unlock_irqrestore(&xhci->lock, flags);
3228
3229         /* Wait for the Reset Device command to finish */
3230         timeleft = wait_for_completion_interruptible_timeout(
3231                         reset_device_cmd->completion,
3232                         USB_CTRL_SET_TIMEOUT);
3233         if (timeleft <= 0) {
3234                 xhci_warn(xhci, "%s while waiting for reset device command\n",
3235                                 timeleft == 0 ? "Timeout" : "Signal");
3236                 spin_lock_irqsave(&xhci->lock, flags);
3237                 /* The timeout might have raced with the event ring handler, so
3238                  * only delete from the list if the item isn't poisoned.
3239                  */
3240                 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3241                         list_del(&reset_device_cmd->cmd_list);
3242                 spin_unlock_irqrestore(&xhci->lock, flags);
3243                 ret = -ETIME;
3244                 goto command_cleanup;
3245         }
3246
3247         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3248          * unless we tried to reset a slot ID that wasn't enabled,
3249          * or the device wasn't in the addressed or configured state.
3250          */
3251         ret = reset_device_cmd->status;
3252         switch (ret) {
3253         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3254         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3255                 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3256                                 slot_id,
3257                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3258                 xhci_info(xhci, "Not freeing device rings.\n");
3259                 /* Don't treat this as an error.  May change my mind later. */
3260                 ret = 0;
3261                 goto command_cleanup;
3262         case COMP_SUCCESS:
3263                 xhci_dbg(xhci, "Successful reset device command.\n");
3264                 break;
3265         default:
3266                 if (xhci_is_vendor_info_code(xhci, ret))
3267                         break;
3268                 xhci_warn(xhci, "Unknown completion code %u for "
3269                                 "reset device command.\n", ret);
3270                 ret = -EINVAL;
3271                 goto command_cleanup;
3272         }
3273
3274         /* Free up host controller endpoint resources */
3275         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3276                 spin_lock_irqsave(&xhci->lock, flags);
3277                 /* Don't delete the default control endpoint resources */
3278                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3279                 spin_unlock_irqrestore(&xhci->lock, flags);
3280         }
3281
3282         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3283         last_freed_endpoint = 1;
3284         for (i = 1; i < 31; ++i) {
3285                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3286
3287                 if (ep->ep_state & EP_HAS_STREAMS) {
3288                         xhci_free_stream_info(xhci, ep->stream_info);
3289                         ep->stream_info = NULL;
3290                         ep->ep_state &= ~EP_HAS_STREAMS;
3291                 }
3292
3293                 if (ep->ring) {
3294                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3295                         last_freed_endpoint = i;
3296                 }
3297                 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3298                         xhci_drop_ep_from_interval_table(xhci,
3299                                         &virt_dev->eps[i].bw_info,
3300                                         virt_dev->bw_table,
3301                                         udev,
3302                                         &virt_dev->eps[i],
3303                                         virt_dev->tt_info);
3304                 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3305         }
3306         /* If necessary, update the number of active TTs on this root port */
3307         xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3308
3309         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3310         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3311         ret = 0;
3312
3313 command_cleanup:
3314         xhci_free_command(xhci, reset_device_cmd);
3315         return ret;
3316 }
3317
3318 /*
3319  * At this point, the struct usb_device is about to go away, the device has
3320  * disconnected, and all traffic has been stopped and the endpoints have been
3321  * disabled.  Free any HC data structures associated with that device.
3322  */
3323 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3324 {
3325         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3326         struct xhci_virt_device *virt_dev;
3327         unsigned long flags;
3328         u32 state;
3329         int i, ret;
3330
3331         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3332         /* If the host is halted due to driver unload, we still need to free the
3333          * device.
3334          */
3335         if (ret <= 0 && ret != -ENODEV)
3336                 return;
3337
3338         virt_dev = xhci->devs[udev->slot_id];
3339
3340         /* Stop any wayward timer functions (which may grab the lock) */
3341         for (i = 0; i < 31; ++i) {
3342                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3343                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3344         }
3345
3346         if (udev->usb2_hw_lpm_enabled) {
3347                 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3348                 udev->usb2_hw_lpm_enabled = 0;
3349         }
3350
3351         spin_lock_irqsave(&xhci->lock, flags);
3352         /* Don't disable the slot if the host controller is dead. */
3353         state = xhci_readl(xhci, &xhci->op_regs->status);
3354         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3355                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
3356                 xhci_free_virt_device(xhci, udev->slot_id);
3357                 spin_unlock_irqrestore(&xhci->lock, flags);
3358                 return;
3359         }
3360
3361         if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3362                 spin_unlock_irqrestore(&xhci->lock, flags);
3363                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3364                 return;
3365         }
3366         xhci_ring_cmd_db(xhci);
3367         spin_unlock_irqrestore(&xhci->lock, flags);
3368         /*
3369          * Event command completion handler will free any data structures
3370          * associated with the slot.  XXX Can free sleep?
3371          */
3372 }
3373
3374 /*
3375  * Checks if we have enough host controller resources for the default control
3376  * endpoint.
3377  *
3378  * Must be called with xhci->lock held.
3379  */
3380 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3381 {
3382         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3383                 xhci_dbg(xhci, "Not enough ep ctxs: "
3384                                 "%u active, need to add 1, limit is %u.\n",
3385                                 xhci->num_active_eps, xhci->limit_active_eps);
3386                 return -ENOMEM;
3387         }
3388         xhci->num_active_eps += 1;
3389         xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3390                         xhci->num_active_eps);
3391         return 0;
3392 }
3393
3394
3395 /*
3396  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3397  * timed out, or allocating memory failed.  Returns 1 on success.
3398  */
3399 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3400 {
3401         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3402         unsigned long flags;
3403         int timeleft;
3404         int ret;
3405
3406         spin_lock_irqsave(&xhci->lock, flags);
3407         ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3408         if (ret) {
3409                 spin_unlock_irqrestore(&xhci->lock, flags);
3410                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3411                 return 0;
3412         }
3413         xhci_ring_cmd_db(xhci);
3414         spin_unlock_irqrestore(&xhci->lock, flags);
3415
3416         /* XXX: how much time for xHC slot assignment? */
3417         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3418                         USB_CTRL_SET_TIMEOUT);
3419         if (timeleft <= 0) {
3420                 xhci_warn(xhci, "%s while waiting for a slot\n",
3421                                 timeleft == 0 ? "Timeout" : "Signal");
3422                 /* FIXME cancel the enable slot request */
3423                 return 0;
3424         }
3425
3426         if (!xhci->slot_id) {
3427                 xhci_err(xhci, "Error while assigning device slot ID\n");
3428                 return 0;
3429         }
3430
3431         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3432                 spin_lock_irqsave(&xhci->lock, flags);
3433                 ret = xhci_reserve_host_control_ep_resources(xhci);
3434                 if (ret) {
3435                         spin_unlock_irqrestore(&xhci->lock, flags);
3436                         xhci_warn(xhci, "Not enough host resources, "
3437                                         "active endpoint contexts = %u\n",
3438                                         xhci->num_active_eps);
3439                         goto disable_slot;
3440                 }
3441                 spin_unlock_irqrestore(&xhci->lock, flags);
3442         }
3443         /* Use GFP_NOIO, since this function can be called from
3444          * xhci_discover_or_reset_device(), which may be called as part of
3445          * mass storage driver error handling.
3446          */
3447         if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3448                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3449                 goto disable_slot;
3450         }
3451         udev->slot_id = xhci->slot_id;
3452         /* Is this a LS or FS device under a HS hub? */
3453         /* Hub or peripherial? */
3454         return 1;
3455
3456 disable_slot:
3457         /* Disable slot, if we can do it without mem alloc */
3458         spin_lock_irqsave(&xhci->lock, flags);
3459         if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3460                 xhci_ring_cmd_db(xhci);
3461         spin_unlock_irqrestore(&xhci->lock, flags);
3462         return 0;
3463 }
3464
3465 /*
3466  * Issue an Address Device command (which will issue a SetAddress request to
3467  * the device).
3468  * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3469  * we should only issue and wait on one address command at the same time.
3470  *
3471  * We add one to the device address issued by the hardware because the USB core
3472  * uses address 1 for the root hubs (even though they're not really devices).
3473  */
3474 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3475 {
3476         unsigned long flags;
3477         int timeleft;
3478         struct xhci_virt_device *virt_dev;
3479         int ret = 0;
3480         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3481         struct xhci_slot_ctx *slot_ctx;
3482         struct xhci_input_control_ctx *ctrl_ctx;
3483         u64 temp_64;
3484
3485         if (!udev->slot_id) {
3486                 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3487                 return -EINVAL;
3488         }
3489
3490         virt_dev = xhci->devs[udev->slot_id];
3491
3492         if (WARN_ON(!virt_dev)) {
3493                 /*
3494                  * In plug/unplug torture test with an NEC controller,
3495                  * a zero-dereference was observed once due to virt_dev = 0.
3496                  * Print useful debug rather than crash if it is observed again!
3497                  */
3498                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3499                         udev->slot_id);
3500                 return -EINVAL;
3501         }
3502
3503         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3504         /*
3505          * If this is the first Set Address since device plug-in or
3506          * virt_device realloaction after a resume with an xHCI power loss,
3507          * then set up the slot context.
3508          */
3509         if (!slot_ctx->dev_info)
3510                 xhci_setup_addressable_virt_dev(xhci, udev);
3511         /* Otherwise, update the control endpoint ring enqueue pointer. */
3512         else
3513                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3514         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3515         ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3516         ctrl_ctx->drop_flags = 0;
3517
3518         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3519         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3520
3521         spin_lock_irqsave(&xhci->lock, flags);
3522         ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3523                                         udev->slot_id);
3524         if (ret) {
3525                 spin_unlock_irqrestore(&xhci->lock, flags);
3526                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3527                 return ret;
3528         }
3529         xhci_ring_cmd_db(xhci);
3530         spin_unlock_irqrestore(&xhci->lock, flags);
3531
3532         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3533         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3534                         USB_CTRL_SET_TIMEOUT);
3535         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3536          * the SetAddress() "recovery interval" required by USB and aborting the
3537          * command on a timeout.
3538          */
3539         if (timeleft <= 0) {
3540                 xhci_warn(xhci, "%s while waiting for address device command\n",
3541                                 timeleft == 0 ? "Timeout" : "Signal");
3542                 /* FIXME cancel the address device command */
3543                 return -ETIME;
3544         }
3545
3546         switch (virt_dev->cmd_status) {
3547         case COMP_CTX_STATE:
3548         case COMP_EBADSLT:
3549                 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3550                                 udev->slot_id);
3551                 ret = -EINVAL;
3552                 break;
3553         case COMP_TX_ERR:
3554                 dev_warn(&udev->dev, "Device not responding to set address.\n");
3555                 ret = -EPROTO;
3556                 break;
3557         case COMP_DEV_ERR:
3558                 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3559                                 "device command.\n");
3560                 ret = -ENODEV;
3561                 break;
3562         case COMP_SUCCESS:
3563                 xhci_dbg(xhci, "Successful Address Device command\n");
3564                 break;
3565         default:
3566                 xhci_err(xhci, "ERROR: unexpected command completion "
3567                                 "code 0x%x.\n", virt_dev->cmd_status);
3568                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3569                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3570                 ret = -EINVAL;
3571                 break;
3572         }
3573         if (ret) {
3574                 return ret;
3575         }
3576         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3577         xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3578         xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3579                  udev->slot_id,
3580                  &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3581                  (unsigned long long)
3582                  le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3583         xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3584                         (unsigned long long)virt_dev->out_ctx->dma);
3585         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3586         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3587         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3588         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3589         /*
3590          * USB core uses address 1 for the roothubs, so we add one to the
3591          * address given back to us by the HC.
3592          */
3593         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3594         /* Use kernel assigned address for devices; store xHC assigned
3595          * address locally. */
3596         virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3597                 + 1;
3598         /* Zero the input context control for later use */
3599         ctrl_ctx->add_flags = 0;
3600         ctrl_ctx->drop_flags = 0;
3601
3602         xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3603
3604         return 0;
3605 }
3606
3607 #ifdef CONFIG_USB_SUSPEND
3608
3609 /* BESL to HIRD Encoding array for USB2 LPM */
3610 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3611         3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3612
3613 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3614 static int xhci_calculate_hird_besl(int u2del, bool use_besl)
3615 {
3616         int hird;
3617
3618         if (use_besl) {
3619                 for (hird = 0; hird < 16; hird++) {
3620                         if (xhci_besl_encoding[hird] >= u2del)
3621                                 break;
3622                 }
3623         } else {
3624                 if (u2del <= 50)
3625                         hird = 0;
3626                 else
3627                         hird = (u2del - 51) / 75 + 1;
3628
3629                 if (hird > 15)
3630                         hird = 15;
3631         }
3632
3633         return hird;
3634 }
3635
3636 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
3637                                         struct usb_device *udev)
3638 {
3639         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3640         struct dev_info *dev_info;
3641         __le32 __iomem  **port_array;
3642         __le32 __iomem  *addr, *pm_addr;
3643         u32             temp, dev_id;
3644         unsigned int    port_num;
3645         unsigned long   flags;
3646         int             u2del, hird;
3647         int             ret;
3648
3649         if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
3650                         !udev->lpm_capable)
3651                 return -EINVAL;
3652
3653         /* we only support lpm for non-hub device connected to root hub yet */
3654         if (!udev->parent || udev->parent->parent ||
3655                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3656                 return -EINVAL;
3657
3658         spin_lock_irqsave(&xhci->lock, flags);
3659
3660         /* Look for devices in lpm_failed_devs list */
3661         dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
3662                         le16_to_cpu(udev->descriptor.idProduct);
3663         list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
3664                 if (dev_info->dev_id == dev_id) {
3665                         ret = -EINVAL;
3666                         goto finish;
3667                 }
3668         }
3669
3670         port_array = xhci->usb2_ports;
3671         port_num = udev->portnum - 1;
3672
3673         if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
3674                 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
3675                 ret = -EINVAL;
3676                 goto finish;
3677         }
3678
3679         /*
3680          * Test USB 2.0 software LPM.
3681          * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3682          * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3683          * in the June 2011 errata release.
3684          */
3685         xhci_dbg(xhci, "test port %d software LPM\n", port_num);
3686         /*
3687          * Set L1 Device Slot and HIRD/BESL.
3688          * Check device's USB 2.0 extension descriptor to determine whether
3689          * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3690          */
3691         pm_addr = port_array[port_num] + 1;
3692         u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3693         if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3694                 hird = xhci_calculate_hird_besl(u2del, 1);
3695         else
3696                 hird = xhci_calculate_hird_besl(u2del, 0);
3697
3698         temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
3699         xhci_writel(xhci, temp, pm_addr);
3700
3701         /* Set port link state to U2(L1) */
3702         addr = port_array[port_num];
3703         xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
3704
3705         /* wait for ACK */
3706         spin_unlock_irqrestore(&xhci->lock, flags);
3707         msleep(10);
3708         spin_lock_irqsave(&xhci->lock, flags);
3709
3710         /* Check L1 Status */
3711         ret = handshake(xhci, pm_addr, PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
3712         if (ret != -ETIMEDOUT) {
3713                 /* enter L1 successfully */
3714                 temp = xhci_readl(xhci, addr);
3715                 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
3716                                 port_num, temp);
3717                 ret = 0;
3718         } else {
3719                 temp = xhci_readl(xhci, pm_addr);
3720                 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
3721                                 port_num, temp & PORT_L1S_MASK);
3722                 ret = -EINVAL;
3723         }
3724
3725         /* Resume the port */
3726         xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
3727
3728         spin_unlock_irqrestore(&xhci->lock, flags);
3729         msleep(10);
3730         spin_lock_irqsave(&xhci->lock, flags);
3731
3732         /* Clear PLC */
3733         xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
3734
3735         /* Check PORTSC to make sure the device is in the right state */
3736         if (!ret) {
3737                 temp = xhci_readl(xhci, addr);
3738                 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
3739                 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
3740                                 (temp & PORT_PLS_MASK) != XDEV_U0) {
3741                         xhci_dbg(xhci, "port L1 resume fail\n");
3742                         ret = -EINVAL;
3743                 }
3744         }
3745
3746         if (ret) {
3747                 /* Insert dev to lpm_failed_devs list */
3748                 xhci_warn(xhci, "device LPM test failed, may disconnect and "
3749                                 "re-enumerate\n");
3750                 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
3751                 if (!dev_info) {
3752                         ret = -ENOMEM;
3753                         goto finish;
3754                 }
3755                 dev_info->dev_id = dev_id;
3756                 INIT_LIST_HEAD(&dev_info->list);
3757                 list_add(&dev_info->list, &xhci->lpm_failed_devs);
3758         } else {
3759                 xhci_ring_device(xhci, udev->slot_id);
3760         }
3761
3762 finish:
3763         spin_unlock_irqrestore(&xhci->lock, flags);
3764         return ret;
3765 }
3766
3767 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3768                         struct usb_device *udev, int enable)
3769 {
3770         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3771         __le32 __iomem  **port_array;
3772         __le32 __iomem  *pm_addr;
3773         u32             temp;
3774         unsigned int    port_num;
3775         unsigned long   flags;
3776         int             u2del, hird;
3777
3778         if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
3779                         !udev->lpm_capable)
3780                 return -EPERM;
3781
3782         if (!udev->parent || udev->parent->parent ||
3783                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3784                 return -EPERM;
3785
3786         if (udev->usb2_hw_lpm_capable != 1)
3787                 return -EPERM;
3788
3789         spin_lock_irqsave(&xhci->lock, flags);
3790
3791         port_array = xhci->usb2_ports;
3792         port_num = udev->portnum - 1;
3793         pm_addr = port_array[port_num] + 1;
3794         temp = xhci_readl(xhci, pm_addr);
3795
3796         xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
3797                         enable ? "enable" : "disable", port_num);
3798
3799         u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3800         if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3801                 hird = xhci_calculate_hird_besl(u2del, 1);
3802         else
3803                 hird = xhci_calculate_hird_besl(u2del, 0);
3804
3805         if (enable) {
3806                 temp &= ~PORT_HIRD_MASK;
3807                 temp |= PORT_HIRD(hird) | PORT_RWE;
3808                 xhci_writel(xhci, temp, pm_addr);
3809                 temp = xhci_readl(xhci, pm_addr);
3810                 temp |= PORT_HLE;
3811                 xhci_writel(xhci, temp, pm_addr);
3812         } else {
3813                 temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
3814                 xhci_writel(xhci, temp, pm_addr);
3815         }
3816
3817         spin_unlock_irqrestore(&xhci->lock, flags);
3818         return 0;
3819 }
3820
3821 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3822 {
3823         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3824         int             ret;
3825
3826         ret = xhci_usb2_software_lpm_test(hcd, udev);
3827         if (!ret) {
3828                 xhci_dbg(xhci, "software LPM test succeed\n");
3829                 if (xhci->hw_lpm_support == 1) {
3830                         udev->usb2_hw_lpm_capable = 1;
3831                         ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
3832                         if (!ret)
3833                                 udev->usb2_hw_lpm_enabled = 1;
3834                 }
3835         }
3836
3837         return 0;
3838 }
3839
3840 #else
3841
3842 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3843                                 struct usb_device *udev, int enable)
3844 {
3845         return 0;
3846 }
3847
3848 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3849 {
3850         return 0;
3851 }
3852
3853 #endif /* CONFIG_USB_SUSPEND */
3854
3855 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
3856  * internal data structures for the device.
3857  */
3858 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
3859                         struct usb_tt *tt, gfp_t mem_flags)
3860 {
3861         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3862         struct xhci_virt_device *vdev;
3863         struct xhci_command *config_cmd;
3864         struct xhci_input_control_ctx *ctrl_ctx;
3865         struct xhci_slot_ctx *slot_ctx;
3866         unsigned long flags;
3867         unsigned think_time;
3868         int ret;
3869
3870         /* Ignore root hubs */
3871         if (!hdev->parent)
3872                 return 0;
3873
3874         vdev = xhci->devs[hdev->slot_id];
3875         if (!vdev) {
3876                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
3877                 return -EINVAL;
3878         }
3879         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3880         if (!config_cmd) {
3881                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3882                 return -ENOMEM;
3883         }
3884
3885         spin_lock_irqsave(&xhci->lock, flags);
3886         if (hdev->speed == USB_SPEED_HIGH &&
3887                         xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
3888                 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
3889                 xhci_free_command(xhci, config_cmd);
3890                 spin_unlock_irqrestore(&xhci->lock, flags);
3891                 return -ENOMEM;
3892         }
3893
3894         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
3895         ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3896         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3897         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
3898         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
3899         if (tt->multi)
3900                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
3901         if (xhci->hci_version > 0x95) {
3902                 xhci_dbg(xhci, "xHCI version %x needs hub "
3903                                 "TT think time and number of ports\n",
3904                                 (unsigned int) xhci->hci_version);
3905                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
3906                 /* Set TT think time - convert from ns to FS bit times.
3907                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
3908                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
3909                  *
3910                  * xHCI 1.0: this field shall be 0 if the device is not a
3911                  * High-spped hub.
3912                  */
3913                 think_time = tt->think_time;
3914                 if (think_time != 0)
3915                         think_time = (think_time / 666) - 1;
3916                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
3917                         slot_ctx->tt_info |=
3918                                 cpu_to_le32(TT_THINK_TIME(think_time));
3919         } else {
3920                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
3921                                 "TT think time or number of ports\n",
3922                                 (unsigned int) xhci->hci_version);
3923         }
3924         slot_ctx->dev_state = 0;
3925         spin_unlock_irqrestore(&xhci->lock, flags);
3926
3927         xhci_dbg(xhci, "Set up %s for hub device.\n",
3928                         (xhci->hci_version > 0x95) ?
3929                         "configure endpoint" : "evaluate context");
3930         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
3931         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
3932
3933         /* Issue and wait for the configure endpoint or
3934          * evaluate context command.
3935          */
3936         if (xhci->hci_version > 0x95)
3937                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3938                                 false, false);
3939         else
3940                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3941                                 true, false);
3942
3943         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
3944         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
3945
3946         xhci_free_command(xhci, config_cmd);
3947         return ret;
3948 }
3949
3950 int xhci_get_frame(struct usb_hcd *hcd)
3951 {
3952         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3953         /* EHCI mods by the periodic size.  Why? */
3954         return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
3955 }
3956
3957 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
3958 {
3959         struct xhci_hcd         *xhci;
3960         struct device           *dev = hcd->self.controller;
3961         int                     retval;
3962         u32                     temp;
3963
3964         hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
3965
3966         if (usb_hcd_is_primary_hcd(hcd)) {
3967                 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
3968                 if (!xhci)
3969                         return -ENOMEM;
3970                 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
3971                 xhci->main_hcd = hcd;
3972                 /* Mark the first roothub as being USB 2.0.
3973                  * The xHCI driver will register the USB 3.0 roothub.
3974                  */
3975                 hcd->speed = HCD_USB2;
3976                 hcd->self.root_hub->speed = USB_SPEED_HIGH;
3977                 /*
3978                  * USB 2.0 roothub under xHCI has an integrated TT,
3979                  * (rate matching hub) as opposed to having an OHCI/UHCI
3980                  * companion controller.
3981                  */
3982                 hcd->has_tt = 1;
3983         } else {
3984                 /* xHCI private pointer was set in xhci_pci_probe for the second
3985                  * registered roothub.
3986                  */
3987                 xhci = hcd_to_xhci(hcd);
3988                 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
3989                 if (HCC_64BIT_ADDR(temp)) {
3990                         xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
3991                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
3992                 } else {
3993                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
3994                 }
3995                 return 0;
3996         }
3997
3998         xhci->cap_regs = hcd->regs;
3999         xhci->op_regs = hcd->regs +
4000                 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4001         xhci->run_regs = hcd->regs +
4002                 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4003         /* Cache read-only capability registers */
4004         xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4005         xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4006         xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4007         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4008         xhci->hci_version = HC_VERSION(xhci->hcc_params);
4009         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4010         xhci_print_registers(xhci);
4011
4012         get_quirks(dev, xhci);
4013
4014         /* Make sure the HC is halted. */
4015         retval = xhci_halt(xhci);
4016         if (retval)
4017                 goto error;
4018
4019         xhci_dbg(xhci, "Resetting HCD\n");
4020         /* Reset the internal HC memory state and registers. */
4021         retval = xhci_reset(xhci);
4022         if (retval)
4023                 goto error;
4024         xhci_dbg(xhci, "Reset complete\n");
4025
4026         temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4027         if (HCC_64BIT_ADDR(temp)) {
4028                 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4029                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4030         } else {
4031                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4032         }
4033
4034         xhci_dbg(xhci, "Calling HCD init\n");
4035         /* Initialize HCD and host controller data structures. */
4036         retval = xhci_init(hcd);
4037         if (retval)
4038                 goto error;
4039         xhci_dbg(xhci, "Called HCD init\n");
4040         return 0;
4041 error:
4042         kfree(xhci);
4043         return retval;
4044 }
4045
4046 MODULE_DESCRIPTION(DRIVER_DESC);
4047 MODULE_AUTHOR(DRIVER_AUTHOR);
4048 MODULE_LICENSE("GPL");
4049
4050 static int __init xhci_hcd_init(void)
4051 {
4052         int retval;
4053
4054         retval = xhci_register_pci();
4055         if (retval < 0) {
4056                 printk(KERN_DEBUG "Problem registering PCI driver.");
4057                 return retval;
4058         }
4059         /*
4060          * Check the compiler generated sizes of structures that must be laid
4061          * out in specific ways for hardware access.
4062          */
4063         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4064         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4065         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4066         /* xhci_device_control has eight fields, and also
4067          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4068          */
4069         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4070         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4071         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4072         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4073         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4074         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4075         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4076         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4077         return 0;
4078 }
4079 module_init(xhci_hcd_init);
4080
4081 static void __exit xhci_hcd_cleanup(void)
4082 {
4083         xhci_unregister_pci();
4084 }
4085 module_exit(xhci_hcd_cleanup);