2 * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
17 #include <linux/kernel.h>
18 #include <linux/pci.h>
19 #include <linux/gpio.h>
39 OKISEMI_ML7223m_IOH, /* OKISEMI ML7223 IOH PCIe Bus-m */
40 OKISEMI_ML7223n_IOH /* OKISEMI ML7223 IOH PCIe Bus-n */
43 /* Specifies number of GPIO PINS */
44 static int gpio_pins[] = {
45 [INTEL_EG20T_PCH] = 12,
46 [OKISEMI_ML7223m_IOH] = 8,
47 [OKISEMI_ML7223n_IOH] = 8,
51 * struct pch_gpio_reg_data - The register store data.
52 * @po_reg: To store contents of PO register.
53 * @pm_reg: To store contents of PM register.
55 struct pch_gpio_reg_data {
61 * struct pch_gpio - GPIO private data structure.
62 * @base: PCI base address of Memory mapped I/O register.
63 * @reg: Memory mapped PCH GPIO register list.
64 * @dev: Pointer to device structure.
65 * @gpio: Data for GPIO infrastructure.
66 * @pch_gpio_reg: Memory mapped Register data is saved here
69 * @spinlock: Used for register access protection in
70 * interrupt context pch_irq_mask,
71 * pch_irq_unmask and pch_irq_type;
75 struct pch_regs __iomem *reg;
77 struct gpio_chip gpio;
78 struct pch_gpio_reg_data pch_gpio_reg;
84 static void pch_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)
87 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio);
89 mutex_lock(&chip->lock);
90 reg_val = ioread32(&chip->reg->po);
94 reg_val &= ~(1 << nr);
96 iowrite32(reg_val, &chip->reg->po);
97 mutex_unlock(&chip->lock);
100 static int pch_gpio_get(struct gpio_chip *gpio, unsigned nr)
102 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio);
104 return ioread32(&chip->reg->pi) & (1 << nr);
107 static int pch_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
110 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio);
114 mutex_lock(&chip->lock);
115 pm = ioread32(&chip->reg->pm) & ((1 << gpio_pins[chip->ioh]) - 1);
117 iowrite32(pm, &chip->reg->pm);
119 reg_val = ioread32(&chip->reg->po);
121 reg_val |= (1 << nr);
123 reg_val &= ~(1 << nr);
124 iowrite32(reg_val, &chip->reg->po);
126 mutex_unlock(&chip->lock);
131 static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
133 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio);
136 mutex_lock(&chip->lock);
137 pm = ioread32(&chip->reg->pm) & ((1 << gpio_pins[chip->ioh]) - 1);
139 iowrite32(pm, &chip->reg->pm);
140 mutex_unlock(&chip->lock);
146 * Save register configuration and disable interrupts.
148 static void pch_gpio_save_reg_conf(struct pch_gpio *chip)
150 chip->pch_gpio_reg.po_reg = ioread32(&chip->reg->po);
151 chip->pch_gpio_reg.pm_reg = ioread32(&chip->reg->pm);
155 * This function restores the register configuration of the GPIO device.
157 static void pch_gpio_restore_reg_conf(struct pch_gpio *chip)
159 /* to store contents of PO register */
160 iowrite32(chip->pch_gpio_reg.po_reg, &chip->reg->po);
161 /* to store contents of PM register */
162 iowrite32(chip->pch_gpio_reg.pm_reg, &chip->reg->pm);
165 static void pch_gpio_setup(struct pch_gpio *chip)
167 struct gpio_chip *gpio = &chip->gpio;
169 gpio->label = dev_name(chip->dev);
170 gpio->owner = THIS_MODULE;
171 gpio->direction_input = pch_gpio_direction_input;
172 gpio->get = pch_gpio_get;
173 gpio->direction_output = pch_gpio_direction_output;
174 gpio->set = pch_gpio_set;
175 gpio->dbg_show = NULL;
177 gpio->ngpio = gpio_pins[chip->ioh];
181 static int __devinit pch_gpio_probe(struct pci_dev *pdev,
182 const struct pci_device_id *id)
185 struct pch_gpio *chip;
187 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
191 chip->dev = &pdev->dev;
192 ret = pci_enable_device(pdev);
194 dev_err(&pdev->dev, "%s : pci_enable_device FAILED", __func__);
198 ret = pci_request_regions(pdev, KBUILD_MODNAME);
200 dev_err(&pdev->dev, "pci_request_regions FAILED-%d", ret);
201 goto err_request_regions;
204 chip->base = pci_iomap(pdev, 1, 0);
205 if (chip->base == 0) {
206 dev_err(&pdev->dev, "%s : pci_iomap FAILED", __func__);
211 if (pdev->device == 0x8803)
212 chip->ioh = INTEL_EG20T_PCH;
213 else if (pdev->device == 0x8014)
214 chip->ioh = OKISEMI_ML7223m_IOH;
215 else if (pdev->device == 0x8043)
216 chip->ioh = OKISEMI_ML7223n_IOH;
218 chip->reg = chip->base;
219 pci_set_drvdata(pdev, chip);
220 mutex_init(&chip->lock);
221 pch_gpio_setup(chip);
222 ret = gpiochip_add(&chip->gpio);
224 dev_err(&pdev->dev, "PCH gpio: Failed to register GPIO\n");
225 goto err_gpiochip_add;
231 pci_iounmap(pdev, chip->base);
234 pci_release_regions(pdev);
237 pci_disable_device(pdev);
241 dev_err(&pdev->dev, "%s Failed returns %d\n", __func__, ret);
245 static void __devexit pch_gpio_remove(struct pci_dev *pdev)
248 struct pch_gpio *chip = pci_get_drvdata(pdev);
250 err = gpiochip_remove(&chip->gpio);
252 dev_err(&pdev->dev, "Failed gpiochip_remove\n");
254 pci_iounmap(pdev, chip->base);
255 pci_release_regions(pdev);
256 pci_disable_device(pdev);
261 static int pch_gpio_suspend(struct pci_dev *pdev, pm_message_t state)
264 struct pch_gpio *chip = pci_get_drvdata(pdev);
267 spin_lock_irqsave(&chip->spinlock, flags);
268 pch_gpio_save_reg_conf(chip);
269 spin_unlock_irqrestore(&chip->spinlock, flags);
271 ret = pci_save_state(pdev);
273 dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret);
276 pci_disable_device(pdev);
277 pci_set_power_state(pdev, PCI_D0);
278 ret = pci_enable_wake(pdev, PCI_D0, 1);
280 dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret);
285 static int pch_gpio_resume(struct pci_dev *pdev)
288 struct pch_gpio *chip = pci_get_drvdata(pdev);
291 ret = pci_enable_wake(pdev, PCI_D0, 0);
293 pci_set_power_state(pdev, PCI_D0);
294 ret = pci_enable_device(pdev);
296 dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret);
299 pci_restore_state(pdev);
301 spin_lock_irqsave(&chip->spinlock, flags);
302 iowrite32(0x01, &chip->reg->reset);
303 iowrite32(0x00, &chip->reg->reset);
304 pch_gpio_restore_reg_conf(chip);
305 spin_unlock_irqrestore(&chip->spinlock, flags);
310 #define pch_gpio_suspend NULL
311 #define pch_gpio_resume NULL
314 #define PCI_VENDOR_ID_ROHM 0x10DB
315 static DEFINE_PCI_DEVICE_TABLE(pch_gpio_pcidev_id) = {
316 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8803) },
317 { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8014) },
318 { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8043) },
321 MODULE_DEVICE_TABLE(pci, pch_gpio_pcidev_id);
323 static struct pci_driver pch_gpio_driver = {
325 .id_table = pch_gpio_pcidev_id,
326 .probe = pch_gpio_probe,
327 .remove = __devexit_p(pch_gpio_remove),
328 .suspend = pch_gpio_suspend,
329 .resume = pch_gpio_resume
332 static int __init pch_gpio_pci_init(void)
334 return pci_register_driver(&pch_gpio_driver);
336 module_init(pch_gpio_pci_init);
338 static void __exit pch_gpio_pci_exit(void)
340 pci_unregister_driver(&pch_gpio_driver);
342 module_exit(pch_gpio_pci_exit);
344 MODULE_DESCRIPTION("PCH GPIO PCI Driver");
345 MODULE_LICENSE("GPL");