arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define CR0_RESERVED_BITS                                               \
  64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  67 #define CR4_RESERVED_BITS                                               \
  68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  71                           | X86_CR4_OSXSAVE \
  72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  73
  74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  75
  76 #define KVM_MAX_MCE_BANKS 32
  77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  94                                     struct kvm_cpuid_entry2 __user *entries);
  95
  96 struct kvm_x86_ops *kvm_x86_ops;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 int ignore_msrs = 0;
 100 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 #define KVM_NR_SHARED_MSRS 16
 103
 104 struct kvm_shared_msrs_global {
 105         int nr;
 106         u32 msrs[KVM_NR_SHARED_MSRS];
 107 };
 108
 109 struct kvm_shared_msrs {
 110         struct user_return_notifier urn;
 111         bool registered;
 112         struct kvm_shared_msr_values {
 113                 u64 host;
 114                 u64 curr;
 115         } values[KVM_NR_SHARED_MSRS];
 116 };
 117
 118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 119 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 120
 121 struct kvm_stats_debugfs_item debugfs_entries[] = {
 122         { "pf_fixed", VCPU_STAT(pf_fixed) },
 123         { "pf_guest", VCPU_STAT(pf_guest) },
 124         { "tlb_flush", VCPU_STAT(tlb_flush) },
 125         { "invlpg", VCPU_STAT(invlpg) },
 126         { "exits", VCPU_STAT(exits) },
 127         { "io_exits", VCPU_STAT(io_exits) },
 128         { "mmio_exits", VCPU_STAT(mmio_exits) },
 129         { "signal_exits", VCPU_STAT(signal_exits) },
 130         { "irq_window", VCPU_STAT(irq_window_exits) },
 131         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 132         { "halt_exits", VCPU_STAT(halt_exits) },
 133         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 134         { "hypercalls", VCPU_STAT(hypercalls) },
 135         { "request_irq", VCPU_STAT(request_irq_exits) },
 136         { "irq_exits", VCPU_STAT(irq_exits) },
 137         { "host_state_reload", VCPU_STAT(host_state_reload) },
 138         { "efer_reload", VCPU_STAT(efer_reload) },
 139         { "fpu_reload", VCPU_STAT(fpu_reload) },
 140         { "insn_emulation", VCPU_STAT(insn_emulation) },
 141         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 142         { "irq_injections", VCPU_STAT(irq_injections) },
 143         { "nmi_injections", VCPU_STAT(nmi_injections) },
 144         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 145         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 146         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 147         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 148         { "mmu_flooded", VM_STAT(mmu_flooded) },
 149         { "mmu_recycled", VM_STAT(mmu_recycled) },
 150         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 151         { "mmu_unsync", VM_STAT(mmu_unsync) },
 152         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 153         { "largepages", VM_STAT(lpages) },
 154         { NULL }
 155 };
 156
 157 u64 __read_mostly host_xcr0;
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 338 {
 339         if (err)
 340                 kvm_inject_gp(vcpu, 0);
 341         else
 342                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 345
 346 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 347 {
 348         ++vcpu->stat.pf_guest;
 349         vcpu->arch.cr2 = fault->address;
 350         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 351 }
 352
 353 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 354 {
 355         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 356                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 357         else
 358                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 359 }
 360
 361 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 362 {
 363         kvm_make_request(KVM_REQ_NMI, vcpu);
 364         kvm_make_request(KVM_REQ_EVENT, vcpu);
 365 }
 366 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 367
 368 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 369 {
 370         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 371 }
 372 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 373
 374 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 375 {
 376         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 377 }
 378 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 379
 380 /*
 381  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 382  * a #GP and return false.
 383  */
 384 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 385 {
 386         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 387                 return true;
 388         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 389         return false;
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 392
 393 /*
 394  * This function will be used to read from the physical memory of the currently
 395  * running guest. The difference to kvm_read_guest_page is that this function
 396  * can read from guest physical or from the guest's guest physical memory.
 397  */
 398 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 399                             gfn_t ngfn, void *data, int offset, int len,
 400                             u32 access)
 401 {
 402         gfn_t real_gfn;
 403         gpa_t ngpa;
 404
 405         ngpa     = gfn_to_gpa(ngfn);
 406         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 407         if (real_gfn == UNMAPPED_GVA)
 408                 return -EFAULT;
 409
 410         real_gfn = gpa_to_gfn(real_gfn);
 411
 412         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 413 }
 414 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 415
 416 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 417                                void *data, int offset, int len, u32 access)
 418 {
 419         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 420                                        data, offset, len, access);
 421 }
 422
 423 /*
 424  * Load the pae pdptrs.  Return true is they are all valid.
 425  */
 426 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 427 {
 428         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 429         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 430         int i;
 431         int ret;
 432         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 433
 434         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 435                                       offset * sizeof(u64), sizeof(pdpte),
 436                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 437         if (ret < 0) {
 438                 ret = 0;
 439                 goto out;
 440         }
 441         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 442                 if (is_present_gpte(pdpte[i]) &&
 443                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 444                         ret = 0;
 445                         goto out;
 446                 }
 447         }
 448         ret = 1;
 449
 450         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 451         __set_bit(VCPU_EXREG_PDPTR,
 452                   (unsigned long *)&vcpu->arch.regs_avail);
 453         __set_bit(VCPU_EXREG_PDPTR,
 454                   (unsigned long *)&vcpu->arch.regs_dirty);
 455 out:
 456
 457         return ret;
 458 }
 459 EXPORT_SYMBOL_GPL(load_pdptrs);
 460
 461 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 462 {
 463         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 464         bool changed = true;
 465         int offset;
 466         gfn_t gfn;
 467         int r;
 468
 469         if (is_long_mode(vcpu) || !is_pae(vcpu))
 470                 return false;
 471
 472         if (!test_bit(VCPU_EXREG_PDPTR,
 473                       (unsigned long *)&vcpu->arch.regs_avail))
 474                 return true;
 475
 476         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 477         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 478         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 479                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 480         if (r < 0)
 481                 goto out;
 482         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 483 out:
 484
 485         return changed;
 486 }
 487
 488 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 489 {
 490         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 491         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 492                                     X86_CR0_CD | X86_CR0_NW;
 493
 494         cr0 |= X86_CR0_ET;
 495
 496 #ifdef CONFIG_X86_64
 497         if (cr0 & 0xffffffff00000000UL)
 498                 return 1;
 499 #endif
 500
 501         cr0 &= ~CR0_RESERVED_BITS;
 502
 503         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 504                 return 1;
 505
 506         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 507                 return 1;
 508
 509         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 510 #ifdef CONFIG_X86_64
 511                 if ((vcpu->arch.efer & EFER_LME)) {
 512                         int cs_db, cs_l;
 513
 514                         if (!is_pae(vcpu))
 515                                 return 1;
 516                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 517                         if (cs_l)
 518                                 return 1;
 519                 } else
 520 #endif
 521                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 522                                                  kvm_read_cr3(vcpu)))
 523                         return 1;
 524         }
 525
 526         kvm_x86_ops->set_cr0(vcpu, cr0);
 527
 528         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 529                 kvm_clear_async_pf_completion_queue(vcpu);
 530                 kvm_async_pf_hash_reset(vcpu);
 531         }
 532
 533         if ((cr0 ^ old_cr0) & update_bits)
 534                 kvm_mmu_reset_context(vcpu);
 535         return 0;
 536 }
 537 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 538
 539 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 540 {
 541         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 542 }
 543 EXPORT_SYMBOL_GPL(kvm_lmsw);
 544
 545 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 546 {
 547         u64 xcr0;
 548
 549         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 550         if (index != XCR_XFEATURE_ENABLED_MASK)
 551                 return 1;
 552         xcr0 = xcr;
 553         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 554                 return 1;
 555         if (!(xcr0 & XSTATE_FP))
 556                 return 1;
 557         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 558                 return 1;
 559         if (xcr0 & ~host_xcr0)
 560                 return 1;
 561         vcpu->arch.xcr0 = xcr0;
 562         vcpu->guest_xcr0_loaded = 0;
 563         return 0;
 564 }
 565
 566 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 567 {
 568         if (__kvm_set_xcr(vcpu, index, xcr)) {
 569                 kvm_inject_gp(vcpu, 0);
 570                 return 1;
 571         }
 572         return 0;
 573 }
 574 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 575
 576 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 577 {
 578         struct kvm_cpuid_entry2 *best;
 579
 580         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 581         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 582 }
 583
 584 static void update_cpuid(struct kvm_vcpu *vcpu)
 585 {
 586         struct kvm_cpuid_entry2 *best;
 587
 588         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 589         if (!best)
 590                 return;
 591
 592         /* Update OSXSAVE bit */
 593         if (cpu_has_xsave && best->function == 0x1) {
 594                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 595                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 596                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 597         }
 598 }
 599
 600 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 601 {
 602         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 603         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 604
 605         if (cr4 & CR4_RESERVED_BITS)
 606                 return 1;
 607
 608         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 609                 return 1;
 610
 611         if (is_long_mode(vcpu)) {
 612                 if (!(cr4 & X86_CR4_PAE))
 613                         return 1;
 614         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 615                    && ((cr4 ^ old_cr4) & pdptr_bits)
 616                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 617                                    kvm_read_cr3(vcpu)))
 618                 return 1;
 619
 620         if (cr4 & X86_CR4_VMXE)
 621                 return 1;
 622
 623         kvm_x86_ops->set_cr4(vcpu, cr4);
 624
 625         if ((cr4 ^ old_cr4) & pdptr_bits)
 626                 kvm_mmu_reset_context(vcpu);
 627
 628         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 629                 update_cpuid(vcpu);
 630
 631         return 0;
 632 }
 633 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 634
 635 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 636 {
 637         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 638                 kvm_mmu_sync_roots(vcpu);
 639                 kvm_mmu_flush_tlb(vcpu);
 640                 return 0;
 641         }
 642
 643         if (is_long_mode(vcpu)) {
 644                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 645                         return 1;
 646         } else {
 647                 if (is_pae(vcpu)) {
 648                         if (cr3 & CR3_PAE_RESERVED_BITS)
 649                                 return 1;
 650                         if (is_paging(vcpu) &&
 651                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 652                                 return 1;
 653                 }
 654                 /*
 655                  * We don't check reserved bits in nonpae mode, because
 656                  * this isn't enforced, and VMware depends on this.
 657                  */
 658         }
 659
 660         /*
 661          * Does the new cr3 value map to physical memory? (Note, we
 662          * catch an invalid cr3 even in real-mode, because it would
 663          * cause trouble later on when we turn on paging anyway.)
 664          *
 665          * A real CPU would silently accept an invalid cr3 and would
 666          * attempt to use it - with largely undefined (and often hard
 667          * to debug) behavior on the guest side.
 668          */
 669         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 670                 return 1;
 671         vcpu->arch.cr3 = cr3;
 672         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 673         vcpu->arch.mmu.new_cr3(vcpu);
 674         return 0;
 675 }
 676 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 677
 678 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 679 {
 680         if (cr8 & CR8_RESERVED_BITS)
 681                 return 1;
 682         if (irqchip_in_kernel(vcpu->kvm))
 683                 kvm_lapic_set_tpr(vcpu, cr8);
 684         else
 685                 vcpu->arch.cr8 = cr8;
 686         return 0;
 687 }
 688 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 689
 690 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 691 {
 692         if (irqchip_in_kernel(vcpu->kvm))
 693                 return kvm_lapic_get_cr8(vcpu);
 694         else
 695                 return vcpu->arch.cr8;
 696 }
 697 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 698
 699 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 700 {
 701         switch (dr) {
 702         case 0 ... 3:
 703                 vcpu->arch.db[dr] = val;
 704                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 705                         vcpu->arch.eff_db[dr] = val;
 706                 break;
 707         case 4:
 708                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 709                         return 1; /* #UD */
 710                 /* fall through */
 711         case 6:
 712                 if (val & 0xffffffff00000000ULL)
 713                         return -1; /* #GP */
 714                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 715                 break;
 716         case 5:
 717                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 718                         return 1; /* #UD */
 719                 /* fall through */
 720         default: /* 7 */
 721                 if (val & 0xffffffff00000000ULL)
 722                         return -1; /* #GP */
 723                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 724                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 725                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 726                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 727                 }
 728                 break;
 729         }
 730
 731         return 0;
 732 }
 733
 734 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 735 {
 736         int res;
 737
 738         res = __kvm_set_dr(vcpu, dr, val);
 739         if (res > 0)
 740                 kvm_queue_exception(vcpu, UD_VECTOR);
 741         else if (res < 0)
 742                 kvm_inject_gp(vcpu, 0);
 743
 744         return res;
 745 }
 746 EXPORT_SYMBOL_GPL(kvm_set_dr);
 747
 748 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 749 {
 750         switch (dr) {
 751         case 0 ... 3:
 752                 *val = vcpu->arch.db[dr];
 753                 break;
 754         case 4:
 755                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 756                         return 1;
 757                 /* fall through */
 758         case 6:
 759                 *val = vcpu->arch.dr6;
 760                 break;
 761         case 5:
 762                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 763                         return 1;
 764                 /* fall through */
 765         default: /* 7 */
 766                 *val = vcpu->arch.dr7;
 767                 break;
 768         }
 769
 770         return 0;
 771 }
 772
 773 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 774 {
 775         if (_kvm_get_dr(vcpu, dr, val)) {
 776                 kvm_queue_exception(vcpu, UD_VECTOR);
 777                 return 1;
 778         }
 779         return 0;
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_get_dr);
 782
 783 /*
 784  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 785  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 786  *
 787  * This list is modified at module load time to reflect the
 788  * capabilities of the host cpu. This capabilities test skips MSRs that are
 789  * kvm-specific. Those are put in the beginning of the list.
 790  */
 791
 792 #define KVM_SAVE_MSRS_BEGIN     8
 793 static u32 msrs_to_save[] = {
 794         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 795         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 796         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 797         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 798         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 799         MSR_STAR,
 800 #ifdef CONFIG_X86_64
 801         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 802 #endif
 803         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 804 };
 805
 806 static unsigned num_msrs_to_save;
 807
 808 static u32 emulated_msrs[] = {
 809         MSR_IA32_MISC_ENABLE,
 810         MSR_IA32_MCG_STATUS,
 811         MSR_IA32_MCG_CTL,
 812 };
 813
 814 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 815 {
 816         u64 old_efer = vcpu->arch.efer;
 817
 818         if (efer & efer_reserved_bits)
 819                 return 1;
 820
 821         if (is_paging(vcpu)
 822             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 823                 return 1;
 824
 825         if (efer & EFER_FFXSR) {
 826                 struct kvm_cpuid_entry2 *feat;
 827
 828                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 829                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 830                         return 1;
 831         }
 832
 833         if (efer & EFER_SVME) {
 834                 struct kvm_cpuid_entry2 *feat;
 835
 836                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 837                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 838                         return 1;
 839         }
 840
 841         efer &= ~EFER_LMA;
 842         efer |= vcpu->arch.efer & EFER_LMA;
 843
 844         kvm_x86_ops->set_efer(vcpu, efer);
 845
 846         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 847
 848         /* Update reserved bits */
 849         if ((efer ^ old_efer) & EFER_NX)
 850                 kvm_mmu_reset_context(vcpu);
 851
 852         return 0;
 853 }
 854
 855 void kvm_enable_efer_bits(u64 mask)
 856 {
 857        efer_reserved_bits &= ~mask;
 858 }
 859 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 860
 861
 862 /*
 863  * Writes msr value into into the appropriate "register".
 864  * Returns 0 on success, non-0 otherwise.
 865  * Assumes vcpu_load() was already called.
 866  */
 867 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 868 {
 869         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 870 }
 871
 872 /*
 873  * Adapt set_msr() to msr_io()'s calling convention
 874  */
 875 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 876 {
 877         return kvm_set_msr(vcpu, index, *data);
 878 }
 879
 880 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 881 {
 882         int version;
 883         int r;
 884         struct pvclock_wall_clock wc;
 885         struct timespec boot;
 886
 887         if (!wall_clock)
 888                 return;
 889
 890         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 891         if (r)
 892                 return;
 893
 894         if (version & 1)
 895                 ++version;  /* first time write, random junk */
 896
 897         ++version;
 898
 899         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 900
 901         /*
 902          * The guest calculates current wall clock time by adding
 903          * system time (updated by kvm_guest_time_update below) to the
 904          * wall clock specified here.  guest system time equals host
 905          * system time for us, thus we must fill in host boot time here.
 906          */
 907         getboottime(&boot);
 908
 909         wc.sec = boot.tv_sec;
 910         wc.nsec = boot.tv_nsec;
 911         wc.version = version;
 912
 913         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 914
 915         version++;
 916         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 917 }
 918
 919 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 920 {
 921         uint32_t quotient, remainder;
 922
 923         /* Don't try to replace with do_div(), this one calculates
 924          * "(dividend << 32) / divisor" */
 925         __asm__ ( "divl %4"
 926                   : "=a" (quotient), "=d" (remainder)
 927                   : "0" (0), "1" (dividend), "r" (divisor) );
 928         return quotient;
 929 }
 930
 931 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 932                                s8 *pshift, u32 *pmultiplier)
 933 {
 934         uint64_t scaled64;
 935         int32_t  shift = 0;
 936         uint64_t tps64;
 937         uint32_t tps32;
 938
 939         tps64 = base_khz * 1000LL;
 940         scaled64 = scaled_khz * 1000LL;
 941         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 942                 tps64 >>= 1;
 943                 shift--;
 944         }
 945
 946         tps32 = (uint32_t)tps64;
 947         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 948                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 949                         scaled64 >>= 1;
 950                 else
 951                         tps32 <<= 1;
 952                 shift++;
 953         }
 954
 955         *pshift = shift;
 956         *pmultiplier = div_frac(scaled64, tps32);
 957
 958         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 959                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 960 }
 961
 962 static inline u64 get_kernel_ns(void)
 963 {
 964         struct timespec ts;
 965
 966         WARN_ON(preemptible());
 967         ktime_get_ts(&ts);
 968         monotonic_to_bootbased(&ts);
 969         return timespec_to_ns(&ts);
 970 }
 971
 972 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 973 unsigned long max_tsc_khz;
 974
 975 static inline int kvm_tsc_changes_freq(void)
 976 {
 977         int cpu = get_cpu();
 978         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 979                   cpufreq_quick_get(cpu) != 0;
 980         put_cpu();
 981         return ret;
 982 }
 983
 984 static inline u64 nsec_to_cycles(u64 nsec)
 985 {
 986         u64 ret;
 987
 988         WARN_ON(preemptible());
 989         if (kvm_tsc_changes_freq())
 990                 printk_once(KERN_WARNING
 991                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 992         ret = nsec * __this_cpu_read(cpu_tsc_khz);
 993         do_div(ret, USEC_PER_SEC);
 994         return ret;
 995 }
 996
 997 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 998 {
 999         /* Compute a scale to convert nanoseconds in TSC cycles */
1000         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1001                            &kvm->arch.virtual_tsc_shift,
1002                            &kvm->arch.virtual_tsc_mult);
1003         kvm->arch.virtual_tsc_khz = this_tsc_khz;
1004 }
1005
1006 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1007 {
1008         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1009                                       vcpu->kvm->arch.virtual_tsc_mult,
1010                                       vcpu->kvm->arch.virtual_tsc_shift);
1011         tsc += vcpu->arch.last_tsc_write;
1012         return tsc;
1013 }
1014
1015 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1016 {
1017         struct kvm *kvm = vcpu->kvm;
1018         u64 offset, ns, elapsed;
1019         unsigned long flags;
1020         s64 sdiff;
1021
1022         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1023         offset = data - native_read_tsc();
1024         ns = get_kernel_ns();
1025         elapsed = ns - kvm->arch.last_tsc_nsec;
1026         sdiff = data - kvm->arch.last_tsc_write;
1027         if (sdiff < 0)
1028                 sdiff = -sdiff;
1029
1030         /*
1031          * Special case: close write to TSC within 5 seconds of
1032          * another CPU is interpreted as an attempt to synchronize
1033          * The 5 seconds is to accomodate host load / swapping as
1034          * well as any reset of TSC during the boot process.
1035          *
1036          * In that case, for a reliable TSC, we can match TSC offsets,
1037          * or make a best guest using elapsed value.
1038          */
1039         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1040             elapsed < 5ULL * NSEC_PER_SEC) {
1041                 if (!check_tsc_unstable()) {
1042                         offset = kvm->arch.last_tsc_offset;
1043                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1044                 } else {
1045                         u64 delta = nsec_to_cycles(elapsed);
1046                         offset += delta;
1047                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1048                 }
1049                 ns = kvm->arch.last_tsc_nsec;
1050         }
1051         kvm->arch.last_tsc_nsec = ns;
1052         kvm->arch.last_tsc_write = data;
1053         kvm->arch.last_tsc_offset = offset;
1054         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1055         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1056
1057         /* Reset of TSC must disable overshoot protection below */
1058         vcpu->arch.hv_clock.tsc_timestamp = 0;
1059         vcpu->arch.last_tsc_write = data;
1060         vcpu->arch.last_tsc_nsec = ns;
1061 }
1062 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1063
1064 static int kvm_guest_time_update(struct kvm_vcpu *v)
1065 {
1066         unsigned long flags;
1067         struct kvm_vcpu_arch *vcpu = &v->arch;
1068         void *shared_kaddr;
1069         unsigned long this_tsc_khz;
1070         s64 kernel_ns, max_kernel_ns;
1071         u64 tsc_timestamp;
1072
1073         /* Keep irq disabled to prevent changes to the clock */
1074         local_irq_save(flags);
1075         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1076         kernel_ns = get_kernel_ns();
1077         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1078
1079         if (unlikely(this_tsc_khz == 0)) {
1080                 local_irq_restore(flags);
1081                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1082                 return 1;
1083         }
1084
1085         /*
1086          * We may have to catch up the TSC to match elapsed wall clock
1087          * time for two reasons, even if kvmclock is used.
1088          *   1) CPU could have been running below the maximum TSC rate
1089          *   2) Broken TSC compensation resets the base at each VCPU
1090          *      entry to avoid unknown leaps of TSC even when running
1091          *      again on the same CPU.  This may cause apparent elapsed
1092          *      time to disappear, and the guest to stand still or run
1093          *      very slowly.
1094          */
1095         if (vcpu->tsc_catchup) {
1096                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1097                 if (tsc > tsc_timestamp) {
1098                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1099                         tsc_timestamp = tsc;
1100                 }
1101         }
1102
1103         local_irq_restore(flags);
1104
1105         if (!vcpu->time_page)
1106                 return 0;
1107
1108         /*
1109          * Time as measured by the TSC may go backwards when resetting the base
1110          * tsc_timestamp.  The reason for this is that the TSC resolution is
1111          * higher than the resolution of the other clock scales.  Thus, many
1112          * possible measurments of the TSC correspond to one measurement of any
1113          * other clock, and so a spread of values is possible.  This is not a
1114          * problem for the computation of the nanosecond clock; with TSC rates
1115          * around 1GHZ, there can only be a few cycles which correspond to one
1116          * nanosecond value, and any path through this code will inevitably
1117          * take longer than that.  However, with the kernel_ns value itself,
1118          * the precision may be much lower, down to HZ granularity.  If the
1119          * first sampling of TSC against kernel_ns ends in the low part of the
1120          * range, and the second in the high end of the range, we can get:
1121          *
1122          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1123          *
1124          * As the sampling errors potentially range in the thousands of cycles,
1125          * it is possible such a time value has already been observed by the
1126          * guest.  To protect against this, we must compute the system time as
1127          * observed by the guest and ensure the new system time is greater.
1128          */
1129         max_kernel_ns = 0;
1130         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1131                 max_kernel_ns = vcpu->last_guest_tsc -
1132                                 vcpu->hv_clock.tsc_timestamp;
1133                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1134                                     vcpu->hv_clock.tsc_to_system_mul,
1135                                     vcpu->hv_clock.tsc_shift);
1136                 max_kernel_ns += vcpu->last_kernel_ns;
1137         }
1138
1139         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1140                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1141                                    &vcpu->hv_clock.tsc_shift,
1142                                    &vcpu->hv_clock.tsc_to_system_mul);
1143                 vcpu->hw_tsc_khz = this_tsc_khz;
1144         }
1145
1146         if (max_kernel_ns > kernel_ns)
1147                 kernel_ns = max_kernel_ns;
1148
1149         /* With all the info we got, fill in the values */
1150         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1151         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1152         vcpu->last_kernel_ns = kernel_ns;
1153         vcpu->last_guest_tsc = tsc_timestamp;
1154         vcpu->hv_clock.flags = 0;
1155
1156         /*
1157          * The interface expects us to write an even number signaling that the
1158          * update is finished. Since the guest won't see the intermediate
1159          * state, we just increase by 2 at the end.
1160          */
1161         vcpu->hv_clock.version += 2;
1162
1163         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1164
1165         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1166                sizeof(vcpu->hv_clock));
1167
1168         kunmap_atomic(shared_kaddr, KM_USER0);
1169
1170         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1171         return 0;
1172 }
1173
1174 static bool msr_mtrr_valid(unsigned msr)
1175 {
1176         switch (msr) {
1177         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1178         case MSR_MTRRfix64K_00000:
1179         case MSR_MTRRfix16K_80000:
1180         case MSR_MTRRfix16K_A0000:
1181         case MSR_MTRRfix4K_C0000:
1182         case MSR_MTRRfix4K_C8000:
1183         case MSR_MTRRfix4K_D0000:
1184         case MSR_MTRRfix4K_D8000:
1185         case MSR_MTRRfix4K_E0000:
1186         case MSR_MTRRfix4K_E8000:
1187         case MSR_MTRRfix4K_F0000:
1188         case MSR_MTRRfix4K_F8000:
1189         case MSR_MTRRdefType:
1190         case MSR_IA32_CR_PAT:
1191                 return true;
1192         case 0x2f8:
1193                 return true;
1194         }
1195         return false;
1196 }
1197
1198 static bool valid_pat_type(unsigned t)
1199 {
1200         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1201 }
1202
1203 static bool valid_mtrr_type(unsigned t)
1204 {
1205         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1206 }
1207
1208 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1209 {
1210         int i;
1211
1212         if (!msr_mtrr_valid(msr))
1213                 return false;
1214
1215         if (msr == MSR_IA32_CR_PAT) {
1216                 for (i = 0; i < 8; i++)
1217                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1218                                 return false;
1219                 return true;
1220         } else if (msr == MSR_MTRRdefType) {
1221                 if (data & ~0xcff)
1222                         return false;
1223                 return valid_mtrr_type(data & 0xff);
1224         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1225                 for (i = 0; i < 8 ; i++)
1226                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1227                                 return false;
1228                 return true;
1229         }
1230
1231         /* variable MTRRs */
1232         return valid_mtrr_type(data & 0xff);
1233 }
1234
1235 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1236 {
1237         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1238
1239         if (!mtrr_valid(vcpu, msr, data))
1240                 return 1;
1241
1242         if (msr == MSR_MTRRdefType) {
1243                 vcpu->arch.mtrr_state.def_type = data;
1244                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1245         } else if (msr == MSR_MTRRfix64K_00000)
1246                 p[0] = data;
1247         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1248                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1249         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1250                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1251         else if (msr == MSR_IA32_CR_PAT)
1252                 vcpu->arch.pat = data;
1253         else {  /* Variable MTRRs */
1254                 int idx, is_mtrr_mask;
1255                 u64 *pt;
1256
1257                 idx = (msr - 0x200) / 2;
1258                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1259                 if (!is_mtrr_mask)
1260                         pt =
1261                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1262                 else
1263                         pt =
1264                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1265                 *pt = data;
1266         }
1267
1268         kvm_mmu_reset_context(vcpu);
1269         return 0;
1270 }
1271
1272 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1273 {
1274         u64 mcg_cap = vcpu->arch.mcg_cap;
1275         unsigned bank_num = mcg_cap & 0xff;
1276
1277         switch (msr) {
1278         case MSR_IA32_MCG_STATUS:
1279                 vcpu->arch.mcg_status = data;
1280                 break;
1281         case MSR_IA32_MCG_CTL:
1282                 if (!(mcg_cap & MCG_CTL_P))
1283                         return 1;
1284                 if (data != 0 && data != ~(u64)0)
1285                         return -1;
1286                 vcpu->arch.mcg_ctl = data;
1287                 break;
1288         default:
1289                 if (msr >= MSR_IA32_MC0_CTL &&
1290                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1291                         u32 offset = msr - MSR_IA32_MC0_CTL;
1292                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1293                          * some Linux kernels though clear bit 10 in bank 4 to
1294                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1295                          * this to avoid an uncatched #GP in the guest
1296                          */
1297                         if ((offset & 0x3) == 0 &&
1298                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1299                                 return -1;
1300                         vcpu->arch.mce_banks[offset] = data;
1301                         break;
1302                 }
1303                 return 1;
1304         }
1305         return 0;
1306 }
1307
1308 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1309 {
1310         struct kvm *kvm = vcpu->kvm;
1311         int lm = is_long_mode(vcpu);
1312         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1313                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1314         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1315                 : kvm->arch.xen_hvm_config.blob_size_32;
1316         u32 page_num = data & ~PAGE_MASK;
1317         u64 page_addr = data & PAGE_MASK;
1318         u8 *page;
1319         int r;
1320
1321         r = -E2BIG;
1322         if (page_num >= blob_size)
1323                 goto out;
1324         r = -ENOMEM;
1325         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1326         if (!page)
1327                 goto out;
1328         r = -EFAULT;
1329         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1330                 goto out_free;
1331         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1332                 goto out_free;
1333         r = 0;
1334 out_free:
1335         kfree(page);
1336 out:
1337         return r;
1338 }
1339
1340 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1341 {
1342         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1343 }
1344
1345 static bool kvm_hv_msr_partition_wide(u32 msr)
1346 {
1347         bool r = false;
1348         switch (msr) {
1349         case HV_X64_MSR_GUEST_OS_ID:
1350         case HV_X64_MSR_HYPERCALL:
1351                 r = true;
1352                 break;
1353         }
1354
1355         return r;
1356 }
1357
1358 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1359 {
1360         struct kvm *kvm = vcpu->kvm;
1361
1362         switch (msr) {
1363         case HV_X64_MSR_GUEST_OS_ID:
1364                 kvm->arch.hv_guest_os_id = data;
1365                 /* setting guest os id to zero disables hypercall page */
1366                 if (!kvm->arch.hv_guest_os_id)
1367                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1368                 break;
1369         case HV_X64_MSR_HYPERCALL: {
1370                 u64 gfn;
1371                 unsigned long addr;
1372                 u8 instructions[4];
1373
1374                 /* if guest os id is not set hypercall should remain disabled */
1375                 if (!kvm->arch.hv_guest_os_id)
1376                         break;
1377                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1378                         kvm->arch.hv_hypercall = data;
1379                         break;
1380                 }
1381                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1382                 addr = gfn_to_hva(kvm, gfn);
1383                 if (kvm_is_error_hva(addr))
1384                         return 1;
1385                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1386                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1387                 if (copy_to_user((void __user *)addr, instructions, 4))
1388                         return 1;
1389                 kvm->arch.hv_hypercall = data;
1390                 break;
1391         }
1392         default:
1393                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1394                           "data 0x%llx\n", msr, data);
1395                 return 1;
1396         }
1397         return 0;
1398 }
1399
1400 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1401 {
1402         switch (msr) {
1403         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1404                 unsigned long addr;
1405
1406                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1407                         vcpu->arch.hv_vapic = data;
1408                         break;
1409                 }
1410                 addr = gfn_to_hva(vcpu->kvm, data >>
1411                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1412                 if (kvm_is_error_hva(addr))
1413                         return 1;
1414                 if (clear_user((void __user *)addr, PAGE_SIZE))
1415                         return 1;
1416                 vcpu->arch.hv_vapic = data;
1417                 break;
1418         }
1419         case HV_X64_MSR_EOI:
1420                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1421         case HV_X64_MSR_ICR:
1422                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1423         case HV_X64_MSR_TPR:
1424                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1425         default:
1426                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1427                           "data 0x%llx\n", msr, data);
1428                 return 1;
1429         }
1430
1431         return 0;
1432 }
1433
1434 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1435 {
1436         gpa_t gpa = data & ~0x3f;
1437
1438         /* Bits 2:5 are resrved, Should be zero */
1439         if (data & 0x3c)
1440                 return 1;
1441
1442         vcpu->arch.apf.msr_val = data;
1443
1444         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1445                 kvm_clear_async_pf_completion_queue(vcpu);
1446                 kvm_async_pf_hash_reset(vcpu);
1447                 return 0;
1448         }
1449
1450         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1451                 return 1;
1452
1453         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1454         kvm_async_pf_wakeup_all(vcpu);
1455         return 0;
1456 }
1457
1458 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1459 {
1460         if (vcpu->arch.time_page) {
1461                 kvm_release_page_dirty(vcpu->arch.time_page);
1462                 vcpu->arch.time_page = NULL;
1463         }
1464 }
1465
1466 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1467 {
1468         switch (msr) {
1469         case MSR_EFER:
1470                 return set_efer(vcpu, data);
1471         case MSR_K7_HWCR:
1472                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1473                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1474                 if (data != 0) {
1475                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1476                                 data);
1477                         return 1;
1478                 }
1479                 break;
1480         case MSR_FAM10H_MMIO_CONF_BASE:
1481                 if (data != 0) {
1482                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1483                                 "0x%llx\n", data);
1484                         return 1;
1485                 }
1486                 break;
1487         case MSR_AMD64_NB_CFG:
1488                 break;
1489         case MSR_IA32_DEBUGCTLMSR:
1490                 if (!data) {
1491                         /* We support the non-activated case already */
1492                         break;
1493                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1494                         /* Values other than LBR and BTF are vendor-specific,
1495                            thus reserved and should throw a #GP */
1496                         return 1;
1497                 }
1498                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1499                         __func__, data);
1500                 break;
1501         case MSR_IA32_UCODE_REV:
1502         case MSR_IA32_UCODE_WRITE:
1503         case MSR_VM_HSAVE_PA:
1504         case MSR_AMD64_PATCH_LOADER:
1505                 break;
1506         case 0x200 ... 0x2ff:
1507                 return set_msr_mtrr(vcpu, msr, data);
1508         case MSR_IA32_APICBASE:
1509                 kvm_set_apic_base(vcpu, data);
1510                 break;
1511         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1512                 return kvm_x2apic_msr_write(vcpu, msr, data);
1513         case MSR_IA32_MISC_ENABLE:
1514                 vcpu->arch.ia32_misc_enable_msr = data;
1515                 break;
1516         case MSR_KVM_WALL_CLOCK_NEW:
1517         case MSR_KVM_WALL_CLOCK:
1518                 vcpu->kvm->arch.wall_clock = data;
1519                 kvm_write_wall_clock(vcpu->kvm, data);
1520                 break;
1521         case MSR_KVM_SYSTEM_TIME_NEW:
1522         case MSR_KVM_SYSTEM_TIME: {
1523                 kvmclock_reset(vcpu);
1524
1525                 vcpu->arch.time = data;
1526                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1527
1528                 /* we verify if the enable bit is set... */
1529                 if (!(data & 1))
1530                         break;
1531
1532                 /* ...but clean it before doing the actual write */
1533                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1534
1535                 vcpu->arch.time_page =
1536                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1537
1538                 if (is_error_page(vcpu->arch.time_page)) {
1539                         kvm_release_page_clean(vcpu->arch.time_page);
1540                         vcpu->arch.time_page = NULL;
1541                 }
1542                 break;
1543         }
1544         case MSR_KVM_ASYNC_PF_EN:
1545                 if (kvm_pv_enable_async_pf(vcpu, data))
1546                         return 1;
1547                 break;
1548         case MSR_IA32_MCG_CTL:
1549         case MSR_IA32_MCG_STATUS:
1550         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1551                 return set_msr_mce(vcpu, msr, data);
1552
1553         /* Performance counters are not protected by a CPUID bit,
1554          * so we should check all of them in the generic path for the sake of
1555          * cross vendor migration.
1556          * Writing a zero into the event select MSRs disables them,
1557          * which we perfectly emulate ;-). Any other value should be at least
1558          * reported, some guests depend on them.
1559          */
1560         case MSR_P6_EVNTSEL0:
1561         case MSR_P6_EVNTSEL1:
1562         case MSR_K7_EVNTSEL0:
1563         case MSR_K7_EVNTSEL1:
1564         case MSR_K7_EVNTSEL2:
1565         case MSR_K7_EVNTSEL3:
1566                 if (data != 0)
1567                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1568                                 "0x%x data 0x%llx\n", msr, data);
1569                 break;
1570         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1571          * so we ignore writes to make it happy.
1572          */
1573         case MSR_P6_PERFCTR0:
1574         case MSR_P6_PERFCTR1:
1575         case MSR_K7_PERFCTR0:
1576         case MSR_K7_PERFCTR1:
1577         case MSR_K7_PERFCTR2:
1578         case MSR_K7_PERFCTR3:
1579                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1580                         "0x%x data 0x%llx\n", msr, data);
1581                 break;
1582         case MSR_K7_CLK_CTL:
1583                 /*
1584                  * Ignore all writes to this no longer documented MSR.
1585                  * Writes are only relevant for old K7 processors,
1586                  * all pre-dating SVM, but a recommended workaround from
1587                  * AMD for these chips. It is possible to speicify the
1588                  * affected processor models on the command line, hence
1589                  * the need to ignore the workaround.
1590                  */
1591                 break;
1592         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1593                 if (kvm_hv_msr_partition_wide(msr)) {
1594                         int r;
1595                         mutex_lock(&vcpu->kvm->lock);
1596                         r = set_msr_hyperv_pw(vcpu, msr, data);
1597                         mutex_unlock(&vcpu->kvm->lock);
1598                         return r;
1599                 } else
1600                         return set_msr_hyperv(vcpu, msr, data);
1601                 break;
1602         case MSR_IA32_BBL_CR_CTL3:
1603                 /* Drop writes to this legacy MSR -- see rdmsr
1604                  * counterpart for further detail.
1605                  */
1606                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1607                 break;
1608         default:
1609                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1610                         return xen_hvm_config(vcpu, data);
1611                 if (!ignore_msrs) {
1612                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1613                                 msr, data);
1614                         return 1;
1615                 } else {
1616                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1617                                 msr, data);
1618                         break;
1619                 }
1620         }
1621         return 0;
1622 }
1623 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1624
1625
1626 /*
1627  * Reads an msr value (of 'msr_index') into 'pdata'.
1628  * Returns 0 on success, non-0 otherwise.
1629  * Assumes vcpu_load() was already called.
1630  */
1631 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1632 {
1633         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1634 }
1635
1636 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1637 {
1638         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1639
1640         if (!msr_mtrr_valid(msr))
1641                 return 1;
1642
1643         if (msr == MSR_MTRRdefType)
1644                 *pdata = vcpu->arch.mtrr_state.def_type +
1645                          (vcpu->arch.mtrr_state.enabled << 10);
1646         else if (msr == MSR_MTRRfix64K_00000)
1647                 *pdata = p[0];
1648         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1649                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1650         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1651                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1652         else if (msr == MSR_IA32_CR_PAT)
1653                 *pdata = vcpu->arch.pat;
1654         else {  /* Variable MTRRs */
1655                 int idx, is_mtrr_mask;
1656                 u64 *pt;
1657
1658                 idx = (msr - 0x200) / 2;
1659                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1660                 if (!is_mtrr_mask)
1661                         pt =
1662                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1663                 else
1664                         pt =
1665                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1666                 *pdata = *pt;
1667         }
1668
1669         return 0;
1670 }
1671
1672 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1673 {
1674         u64 data;
1675         u64 mcg_cap = vcpu->arch.mcg_cap;
1676         unsigned bank_num = mcg_cap & 0xff;
1677
1678         switch (msr) {
1679         case MSR_IA32_P5_MC_ADDR:
1680         case MSR_IA32_P5_MC_TYPE:
1681                 data = 0;
1682                 break;
1683         case MSR_IA32_MCG_CAP:
1684                 data = vcpu->arch.mcg_cap;
1685                 break;
1686         case MSR_IA32_MCG_CTL:
1687                 if (!(mcg_cap & MCG_CTL_P))
1688                         return 1;
1689                 data = vcpu->arch.mcg_ctl;
1690                 break;
1691         case MSR_IA32_MCG_STATUS:
1692                 data = vcpu->arch.mcg_status;
1693                 break;
1694         default:
1695                 if (msr >= MSR_IA32_MC0_CTL &&
1696                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1697                         u32 offset = msr - MSR_IA32_MC0_CTL;
1698                         data = vcpu->arch.mce_banks[offset];
1699                         break;
1700                 }
1701                 return 1;
1702         }
1703         *pdata = data;
1704         return 0;
1705 }
1706
1707 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1708 {
1709         u64 data = 0;
1710         struct kvm *kvm = vcpu->kvm;
1711
1712         switch (msr) {
1713         case HV_X64_MSR_GUEST_OS_ID:
1714                 data = kvm->arch.hv_guest_os_id;
1715                 break;
1716         case HV_X64_MSR_HYPERCALL:
1717                 data = kvm->arch.hv_hypercall;
1718                 break;
1719         default:
1720                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1721                 return 1;
1722         }
1723
1724         *pdata = data;
1725         return 0;
1726 }
1727
1728 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1729 {
1730         u64 data = 0;
1731
1732         switch (msr) {
1733         case HV_X64_MSR_VP_INDEX: {
1734                 int r;
1735                 struct kvm_vcpu *v;
1736                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1737                         if (v == vcpu)
1738                                 data = r;
1739                 break;
1740         }
1741         case HV_X64_MSR_EOI:
1742                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1743         case HV_X64_MSR_ICR:
1744                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1745         case HV_X64_MSR_TPR:
1746                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1747         default:
1748                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1749                 return 1;
1750         }
1751         *pdata = data;
1752         return 0;
1753 }
1754
1755 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1756 {
1757         u64 data;
1758
1759         switch (msr) {
1760         case MSR_IA32_PLATFORM_ID:
1761         case MSR_IA32_UCODE_REV:
1762         case MSR_IA32_EBL_CR_POWERON:
1763         case MSR_IA32_DEBUGCTLMSR:
1764         case MSR_IA32_LASTBRANCHFROMIP:
1765         case MSR_IA32_LASTBRANCHTOIP:
1766         case MSR_IA32_LASTINTFROMIP:
1767         case MSR_IA32_LASTINTTOIP:
1768         case MSR_K8_SYSCFG:
1769         case MSR_K7_HWCR:
1770         case MSR_VM_HSAVE_PA:
1771         case MSR_P6_PERFCTR0:
1772         case MSR_P6_PERFCTR1:
1773         case MSR_P6_EVNTSEL0:
1774         case MSR_P6_EVNTSEL1:
1775         case MSR_K7_EVNTSEL0:
1776         case MSR_K7_PERFCTR0:
1777         case MSR_K8_INT_PENDING_MSG:
1778         case MSR_AMD64_NB_CFG:
1779         case MSR_FAM10H_MMIO_CONF_BASE:
1780                 data = 0;
1781                 break;
1782         case MSR_MTRRcap:
1783                 data = 0x500 | KVM_NR_VAR_MTRR;
1784                 break;
1785         case 0x200 ... 0x2ff:
1786                 return get_msr_mtrr(vcpu, msr, pdata);
1787         case 0xcd: /* fsb frequency */
1788                 data = 3;
1789                 break;
1790                 /*
1791                  * MSR_EBC_FREQUENCY_ID
1792                  * Conservative value valid for even the basic CPU models.
1793                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1794                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1795                  * and 266MHz for model 3, or 4. Set Core Clock
1796                  * Frequency to System Bus Frequency Ratio to 1 (bits
1797                  * 31:24) even though these are only valid for CPU
1798                  * models > 2, however guests may end up dividing or
1799                  * multiplying by zero otherwise.
1800                  */
1801         case MSR_EBC_FREQUENCY_ID:
1802                 data = 1 << 24;
1803                 break;
1804         case MSR_IA32_APICBASE:
1805                 data = kvm_get_apic_base(vcpu);
1806                 break;
1807         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1808                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1809                 break;
1810         case MSR_IA32_MISC_ENABLE:
1811                 data = vcpu->arch.ia32_misc_enable_msr;
1812                 break;
1813         case MSR_IA32_PERF_STATUS:
1814                 /* TSC increment by tick */
1815                 data = 1000ULL;
1816                 /* CPU multiplier */
1817                 data |= (((uint64_t)4ULL) << 40);
1818                 break;
1819         case MSR_EFER:
1820                 data = vcpu->arch.efer;
1821                 break;
1822         case MSR_KVM_WALL_CLOCK:
1823         case MSR_KVM_WALL_CLOCK_NEW:
1824                 data = vcpu->kvm->arch.wall_clock;
1825                 break;
1826         case MSR_KVM_SYSTEM_TIME:
1827         case MSR_KVM_SYSTEM_TIME_NEW:
1828                 data = vcpu->arch.time;
1829                 break;
1830         case MSR_KVM_ASYNC_PF_EN:
1831                 data = vcpu->arch.apf.msr_val;
1832                 break;
1833         case MSR_IA32_P5_MC_ADDR:
1834         case MSR_IA32_P5_MC_TYPE:
1835         case MSR_IA32_MCG_CAP:
1836         case MSR_IA32_MCG_CTL:
1837         case MSR_IA32_MCG_STATUS:
1838         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1839                 return get_msr_mce(vcpu, msr, pdata);
1840         case MSR_K7_CLK_CTL:
1841                 /*
1842                  * Provide expected ramp-up count for K7. All other
1843                  * are set to zero, indicating minimum divisors for
1844                  * every field.
1845                  *
1846                  * This prevents guest kernels on AMD host with CPU
1847                  * type 6, model 8 and higher from exploding due to
1848                  * the rdmsr failing.
1849                  */
1850                 data = 0x20000000;
1851                 break;
1852         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1853                 if (kvm_hv_msr_partition_wide(msr)) {
1854                         int r;
1855                         mutex_lock(&vcpu->kvm->lock);
1856                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1857                         mutex_unlock(&vcpu->kvm->lock);
1858                         return r;
1859                 } else
1860                         return get_msr_hyperv(vcpu, msr, pdata);
1861                 break;
1862         case MSR_IA32_BBL_CR_CTL3:
1863                 /* This legacy MSR exists but isn't fully documented in current
1864                  * silicon.  It is however accessed by winxp in very narrow
1865                  * scenarios where it sets bit #19, itself documented as
1866                  * a "reserved" bit.  Best effort attempt to source coherent
1867                  * read data here should the balance of the register be
1868                  * interpreted by the guest:
1869                  *
1870                  * L2 cache control register 3: 64GB range, 256KB size,
1871                  * enabled, latency 0x1, configured
1872                  */
1873                 data = 0xbe702111;
1874                 break;
1875         default:
1876                 if (!ignore_msrs) {
1877                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1878                         return 1;
1879                 } else {
1880                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1881                         data = 0;
1882                 }
1883                 break;
1884         }
1885         *pdata = data;
1886         return 0;
1887 }
1888 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1889
1890 /*
1891  * Read or write a bunch of msrs. All parameters are kernel addresses.
1892  *
1893  * @return number of msrs set successfully.
1894  */
1895 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1896                     struct kvm_msr_entry *entries,
1897                     int (*do_msr)(struct kvm_vcpu *vcpu,
1898                                   unsigned index, u64 *data))
1899 {
1900         int i, idx;
1901
1902         idx = srcu_read_lock(&vcpu->kvm->srcu);
1903         for (i = 0; i < msrs->nmsrs; ++i)
1904                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1905                         break;
1906         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1907
1908         return i;
1909 }
1910
1911 /*
1912  * Read or write a bunch of msrs. Parameters are user addresses.
1913  *
1914  * @return number of msrs set successfully.
1915  */
1916 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1917                   int (*do_msr)(struct kvm_vcpu *vcpu,
1918                                 unsigned index, u64 *data),
1919                   int writeback)
1920 {
1921         struct kvm_msrs msrs;
1922         struct kvm_msr_entry *entries;
1923         int r, n;
1924         unsigned size;
1925
1926         r = -EFAULT;
1927         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1928                 goto out;
1929
1930         r = -E2BIG;
1931         if (msrs.nmsrs >= MAX_IO_MSRS)
1932                 goto out;
1933
1934         r = -ENOMEM;
1935         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1936         entries = kmalloc(size, GFP_KERNEL);
1937         if (!entries)
1938                 goto out;
1939
1940         r = -EFAULT;
1941         if (copy_from_user(entries, user_msrs->entries, size))
1942                 goto out_free;
1943
1944         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1945         if (r < 0)
1946                 goto out_free;
1947
1948         r = -EFAULT;
1949         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1950                 goto out_free;
1951
1952         r = n;
1953
1954 out_free:
1955         kfree(entries);
1956 out:
1957         return r;
1958 }
1959
1960 int kvm_dev_ioctl_check_extension(long ext)
1961 {
1962         int r;
1963
1964         switch (ext) {
1965         case KVM_CAP_IRQCHIP:
1966         case KVM_CAP_HLT:
1967         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1968         case KVM_CAP_SET_TSS_ADDR:
1969         case KVM_CAP_EXT_CPUID:
1970         case KVM_CAP_CLOCKSOURCE:
1971         case KVM_CAP_PIT:
1972         case KVM_CAP_NOP_IO_DELAY:
1973         case KVM_CAP_MP_STATE:
1974         case KVM_CAP_SYNC_MMU:
1975         case KVM_CAP_USER_NMI:
1976         case KVM_CAP_REINJECT_CONTROL:
1977         case KVM_CAP_IRQ_INJECT_STATUS:
1978         case KVM_CAP_ASSIGN_DEV_IRQ:
1979         case KVM_CAP_IRQFD:
1980         case KVM_CAP_IOEVENTFD:
1981         case KVM_CAP_PIT2:
1982         case KVM_CAP_PIT_STATE2:
1983         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1984         case KVM_CAP_XEN_HVM:
1985         case KVM_CAP_ADJUST_CLOCK:
1986         case KVM_CAP_VCPU_EVENTS:
1987         case KVM_CAP_HYPERV:
1988         case KVM_CAP_HYPERV_VAPIC:
1989         case KVM_CAP_HYPERV_SPIN:
1990         case KVM_CAP_PCI_SEGMENT:
1991         case KVM_CAP_DEBUGREGS:
1992         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1993         case KVM_CAP_XSAVE:
1994         case KVM_CAP_ASYNC_PF:
1995                 r = 1;
1996                 break;
1997         case KVM_CAP_COALESCED_MMIO:
1998                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1999                 break;
2000         case KVM_CAP_VAPIC:
2001                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2002                 break;
2003         case KVM_CAP_NR_VCPUS:
2004                 r = KVM_MAX_VCPUS;
2005                 break;
2006         case KVM_CAP_NR_MEMSLOTS:
2007                 r = KVM_MEMORY_SLOTS;
2008                 break;
2009         case KVM_CAP_PV_MMU:    /* obsolete */
2010                 r = 0;
2011                 break;
2012         case KVM_CAP_IOMMU:
2013                 r = iommu_found();
2014                 break;
2015         case KVM_CAP_MCE:
2016                 r = KVM_MAX_MCE_BANKS;
2017                 break;
2018         case KVM_CAP_XCRS:
2019                 r = cpu_has_xsave;
2020                 break;
2021         default:
2022                 r = 0;
2023                 break;
2024         }
2025         return r;
2026
2027 }
2028
2029 long kvm_arch_dev_ioctl(struct file *filp,
2030                         unsigned int ioctl, unsigned long arg)
2031 {
2032         void __user *argp = (void __user *)arg;
2033         long r;
2034
2035         switch (ioctl) {
2036         case KVM_GET_MSR_INDEX_LIST: {
2037                 struct kvm_msr_list __user *user_msr_list = argp;
2038                 struct kvm_msr_list msr_list;
2039                 unsigned n;
2040
2041                 r = -EFAULT;
2042                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2043                         goto out;
2044                 n = msr_list.nmsrs;
2045                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2046                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2047                         goto out;
2048                 r = -E2BIG;
2049                 if (n < msr_list.nmsrs)
2050                         goto out;
2051                 r = -EFAULT;
2052                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2053                                  num_msrs_to_save * sizeof(u32)))
2054                         goto out;
2055                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2056                                  &emulated_msrs,
2057                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2058                         goto out;
2059                 r = 0;
2060                 break;
2061         }
2062         case KVM_GET_SUPPORTED_CPUID: {
2063                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2064                 struct kvm_cpuid2 cpuid;
2065
2066                 r = -EFAULT;
2067                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2068                         goto out;
2069                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2070                                                       cpuid_arg->entries);
2071                 if (r)
2072                         goto out;
2073
2074                 r = -EFAULT;
2075                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2076                         goto out;
2077                 r = 0;
2078                 break;
2079         }
2080         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2081                 u64 mce_cap;
2082
2083                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2084                 r = -EFAULT;
2085                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2086                         goto out;
2087                 r = 0;
2088                 break;
2089         }
2090         default:
2091                 r = -EINVAL;
2092         }
2093 out:
2094         return r;
2095 }
2096
2097 static void wbinvd_ipi(void *garbage)
2098 {
2099         wbinvd();
2100 }
2101
2102 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2103 {
2104         return vcpu->kvm->arch.iommu_domain &&
2105                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2106 }
2107
2108 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2109 {
2110         /* Address WBINVD may be executed by guest */
2111         if (need_emulate_wbinvd(vcpu)) {
2112                 if (kvm_x86_ops->has_wbinvd_exit())
2113                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2114                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2115                         smp_call_function_single(vcpu->cpu,
2116                                         wbinvd_ipi, NULL, 1);
2117         }
2118
2119         kvm_x86_ops->vcpu_load(vcpu, cpu);
2120         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2121                 /* Make sure TSC doesn't go backwards */
2122                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2123                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2124                 if (tsc_delta < 0)
2125                         mark_tsc_unstable("KVM discovered backwards TSC");
2126                 if (check_tsc_unstable()) {
2127                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2128                         vcpu->arch.tsc_catchup = 1;
2129                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2130                 }
2131                 if (vcpu->cpu != cpu)
2132                         kvm_migrate_timers(vcpu);
2133                 vcpu->cpu = cpu;
2134         }
2135 }
2136
2137 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2138 {
2139         kvm_x86_ops->vcpu_put(vcpu);
2140         kvm_put_guest_fpu(vcpu);
2141         vcpu->arch.last_host_tsc = native_read_tsc();
2142 }
2143
2144 static int is_efer_nx(void)
2145 {
2146         unsigned long long efer = 0;
2147
2148         rdmsrl_safe(MSR_EFER, &efer);
2149         return efer & EFER_NX;
2150 }
2151
2152 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2153 {
2154         int i;
2155         struct kvm_cpuid_entry2 *e, *entry;
2156
2157         entry = NULL;
2158         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2159                 e = &vcpu->arch.cpuid_entries[i];
2160                 if (e->function == 0x80000001) {
2161                         entry = e;
2162                         break;
2163                 }
2164         }
2165         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2166                 entry->edx &= ~(1 << 20);
2167                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2168         }
2169 }
2170
2171 /* when an old userspace process fills a new kernel module */
2172 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2173                                     struct kvm_cpuid *cpuid,
2174                                     struct kvm_cpuid_entry __user *entries)
2175 {
2176         int r, i;
2177         struct kvm_cpuid_entry *cpuid_entries;
2178
2179         r = -E2BIG;
2180         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2181                 goto out;
2182         r = -ENOMEM;
2183         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2184         if (!cpuid_entries)
2185                 goto out;
2186         r = -EFAULT;
2187         if (copy_from_user(cpuid_entries, entries,
2188                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2189                 goto out_free;
2190         for (i = 0; i < cpuid->nent; i++) {
2191                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2192                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2193                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2194                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2195                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2196                 vcpu->arch.cpuid_entries[i].index = 0;
2197                 vcpu->arch.cpuid_entries[i].flags = 0;
2198                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2199                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2200                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2201         }
2202         vcpu->arch.cpuid_nent = cpuid->nent;
2203         cpuid_fix_nx_cap(vcpu);
2204         r = 0;
2205         kvm_apic_set_version(vcpu);
2206         kvm_x86_ops->cpuid_update(vcpu);
2207         update_cpuid(vcpu);
2208
2209 out_free:
2210         vfree(cpuid_entries);
2211 out:
2212         return r;
2213 }
2214
2215 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2216                                      struct kvm_cpuid2 *cpuid,
2217                                      struct kvm_cpuid_entry2 __user *entries)
2218 {
2219         int r;
2220
2221         r = -E2BIG;
2222         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2223                 goto out;
2224         r = -EFAULT;
2225         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2226                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2227                 goto out;
2228         vcpu->arch.cpuid_nent = cpuid->nent;
2229         kvm_apic_set_version(vcpu);
2230         kvm_x86_ops->cpuid_update(vcpu);
2231         update_cpuid(vcpu);
2232         return 0;
2233
2234 out:
2235         return r;
2236 }
2237
2238 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2239                                      struct kvm_cpuid2 *cpuid,
2240                                      struct kvm_cpuid_entry2 __user *entries)
2241 {
2242         int r;
2243
2244         r = -E2BIG;
2245         if (cpuid->nent < vcpu->arch.cpuid_nent)
2246                 goto out;
2247         r = -EFAULT;
2248         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2249                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2250                 goto out;
2251         return 0;
2252
2253 out:
2254         cpuid->nent = vcpu->arch.cpuid_nent;
2255         return r;
2256 }
2257
2258 static void cpuid_mask(u32 *word, int wordnum)
2259 {
2260         *word &= boot_cpu_data.x86_capability[wordnum];
2261 }
2262
2263 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2264                            u32 index)
2265 {
2266         entry->function = function;
2267         entry->index = index;
2268         cpuid_count(entry->function, entry->index,
2269                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2270         entry->flags = 0;
2271 }
2272
2273 #define F(x) bit(X86_FEATURE_##x)
2274
2275 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2276                          u32 index, int *nent, int maxnent)
2277 {
2278         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2279 #ifdef CONFIG_X86_64
2280         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2281                                 ? F(GBPAGES) : 0;
2282         unsigned f_lm = F(LM);
2283 #else
2284         unsigned f_gbpages = 0;
2285         unsigned f_lm = 0;
2286 #endif
2287         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2288
2289         /* cpuid 1.edx */
2290         const u32 kvm_supported_word0_x86_features =
2291                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2292                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2293                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2294                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2295                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2296                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2297                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2298                 0 /* HTT, TM, Reserved, PBE */;
2299         /* cpuid 0x80000001.edx */
2300         const u32 kvm_supported_word1_x86_features =
2301                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2302                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2303                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2304                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2305                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2306                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2307                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2308                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2309         /* cpuid 1.ecx */
2310         const u32 kvm_supported_word4_x86_features =
2311                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2312                 0 /* DS-CPL, VMX, SMX, EST */ |
2313                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2314                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2315                 0 /* Reserved, DCA */ | F(XMM4_1) |
2316                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2317                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2318                 F(F16C);
2319         /* cpuid 0x80000001.ecx */
2320         const u32 kvm_supported_word6_x86_features =
2321                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2322                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2323                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2324                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2325
2326         /* all calls to cpuid_count() should be made on the same cpu */
2327         get_cpu();
2328         do_cpuid_1_ent(entry, function, index);
2329         ++*nent;
2330
2331         switch (function) {
2332         case 0:
2333                 entry->eax = min(entry->eax, (u32)0xd);
2334                 break;
2335         case 1:
2336                 entry->edx &= kvm_supported_word0_x86_features;
2337                 cpuid_mask(&entry->edx, 0);
2338                 entry->ecx &= kvm_supported_word4_x86_features;
2339                 cpuid_mask(&entry->ecx, 4);
2340                 /* we support x2apic emulation even if host does not support
2341                  * it since we emulate x2apic in software */
2342                 entry->ecx |= F(X2APIC);
2343                 break;
2344         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2345          * may return different values. This forces us to get_cpu() before
2346          * issuing the first command, and also to emulate this annoying behavior
2347          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2348         case 2: {
2349                 int t, times = entry->eax & 0xff;
2350
2351                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2352                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2353                 for (t = 1; t < times && *nent < maxnent; ++t) {
2354                         do_cpuid_1_ent(&entry[t], function, 0);
2355                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2356                         ++*nent;
2357                 }
2358                 break;
2359         }
2360         /* function 4 and 0xb have additional index. */
2361         case 4: {
2362                 int i, cache_type;
2363
2364                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2365                 /* read more entries until cache_type is zero */
2366                 for (i = 1; *nent < maxnent; ++i) {
2367                         cache_type = entry[i - 1].eax & 0x1f;
2368                         if (!cache_type)
2369                                 break;
2370                         do_cpuid_1_ent(&entry[i], function, i);
2371                         entry[i].flags |=
2372                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2373                         ++*nent;
2374                 }
2375                 break;
2376         }
2377         case 0xb: {
2378                 int i, level_type;
2379
2380                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2381                 /* read more entries until level_type is zero */
2382                 for (i = 1; *nent < maxnent; ++i) {
2383                         level_type = entry[i - 1].ecx & 0xff00;
2384                         if (!level_type)
2385                                 break;
2386                         do_cpuid_1_ent(&entry[i], function, i);
2387                         entry[i].flags |=
2388                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2389                         ++*nent;
2390                 }
2391                 break;
2392         }
2393         case 0xd: {
2394                 int i;
2395
2396                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2397                 for (i = 1; *nent < maxnent; ++i) {
2398                         if (entry[i - 1].eax == 0 && i != 2)
2399                                 break;
2400                         do_cpuid_1_ent(&entry[i], function, i);
2401                         entry[i].flags |=
2402                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2403                         ++*nent;
2404                 }
2405                 break;
2406         }
2407         case KVM_CPUID_SIGNATURE: {
2408                 char signature[12] = "KVMKVMKVM\0\0";
2409                 u32 *sigptr = (u32 *)signature;
2410                 entry->eax = 0;
2411                 entry->ebx = sigptr[0];
2412                 entry->ecx = sigptr[1];
2413                 entry->edx = sigptr[2];
2414                 break;
2415         }
2416         case KVM_CPUID_FEATURES:
2417                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2418                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2419                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2420                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2421                 entry->ebx = 0;
2422                 entry->ecx = 0;
2423                 entry->edx = 0;
2424                 break;
2425         case 0x80000000:
2426                 entry->eax = min(entry->eax, 0x8000001a);
2427                 break;
2428         case 0x80000001:
2429                 entry->edx &= kvm_supported_word1_x86_features;
2430                 cpuid_mask(&entry->edx, 1);
2431                 entry->ecx &= kvm_supported_word6_x86_features;
2432                 cpuid_mask(&entry->ecx, 6);
2433                 break;
2434         }
2435
2436         kvm_x86_ops->set_supported_cpuid(function, entry);
2437
2438         put_cpu();
2439 }
2440
2441 #undef F
2442
2443 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2444                                      struct kvm_cpuid_entry2 __user *entries)
2445 {
2446         struct kvm_cpuid_entry2 *cpuid_entries;
2447         int limit, nent = 0, r = -E2BIG;
2448         u32 func;
2449
2450         if (cpuid->nent < 1)
2451                 goto out;
2452         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2453                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2454         r = -ENOMEM;
2455         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2456         if (!cpuid_entries)
2457                 goto out;
2458
2459         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2460         limit = cpuid_entries[0].eax;
2461         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2462                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2463                              &nent, cpuid->nent);
2464         r = -E2BIG;
2465         if (nent >= cpuid->nent)
2466                 goto out_free;
2467
2468         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2469         limit = cpuid_entries[nent - 1].eax;
2470         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2471                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2472                              &nent, cpuid->nent);
2473
2474
2475
2476         r = -E2BIG;
2477         if (nent >= cpuid->nent)
2478                 goto out_free;
2479
2480         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2481                      cpuid->nent);
2482
2483         r = -E2BIG;
2484         if (nent >= cpuid->nent)
2485                 goto out_free;
2486
2487         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2488                      cpuid->nent);
2489
2490         r = -E2BIG;
2491         if (nent >= cpuid->nent)
2492                 goto out_free;
2493
2494         r = -EFAULT;
2495         if (copy_to_user(entries, cpuid_entries,
2496                          nent * sizeof(struct kvm_cpuid_entry2)))
2497                 goto out_free;
2498         cpuid->nent = nent;
2499         r = 0;
2500
2501 out_free:
2502         vfree(cpuid_entries);
2503 out:
2504         return r;
2505 }
2506
2507 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2508                                     struct kvm_lapic_state *s)
2509 {
2510         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2511
2512         return 0;
2513 }
2514
2515 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2516                                     struct kvm_lapic_state *s)
2517 {
2518         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2519         kvm_apic_post_state_restore(vcpu);
2520         update_cr8_intercept(vcpu);
2521
2522         return 0;
2523 }
2524
2525 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2526                                     struct kvm_interrupt *irq)
2527 {
2528         if (irq->irq < 0 || irq->irq >= 256)
2529                 return -EINVAL;
2530         if (irqchip_in_kernel(vcpu->kvm))
2531                 return -ENXIO;
2532
2533         kvm_queue_interrupt(vcpu, irq->irq, false);
2534         kvm_make_request(KVM_REQ_EVENT, vcpu);
2535
2536         return 0;
2537 }
2538
2539 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2540 {
2541         kvm_inject_nmi(vcpu);
2542
2543         return 0;
2544 }
2545
2546 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2547                                            struct kvm_tpr_access_ctl *tac)
2548 {
2549         if (tac->flags)
2550                 return -EINVAL;
2551         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2552         return 0;
2553 }
2554
2555 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2556                                         u64 mcg_cap)
2557 {
2558         int r;
2559         unsigned bank_num = mcg_cap & 0xff, bank;
2560
2561         r = -EINVAL;
2562         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2563                 goto out;
2564         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2565                 goto out;
2566         r = 0;
2567         vcpu->arch.mcg_cap = mcg_cap;
2568         /* Init IA32_MCG_CTL to all 1s */
2569         if (mcg_cap & MCG_CTL_P)
2570                 vcpu->arch.mcg_ctl = ~(u64)0;
2571         /* Init IA32_MCi_CTL to all 1s */
2572         for (bank = 0; bank < bank_num; bank++)
2573                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2574 out:
2575         return r;
2576 }
2577
2578 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2579                                       struct kvm_x86_mce *mce)
2580 {
2581         u64 mcg_cap = vcpu->arch.mcg_cap;
2582         unsigned bank_num = mcg_cap & 0xff;
2583         u64 *banks = vcpu->arch.mce_banks;
2584
2585         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2586                 return -EINVAL;
2587         /*
2588          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2589          * reporting is disabled
2590          */
2591         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2592             vcpu->arch.mcg_ctl != ~(u64)0)
2593                 return 0;
2594         banks += 4 * mce->bank;
2595         /*
2596          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2597          * reporting is disabled for the bank
2598          */
2599         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2600                 return 0;
2601         if (mce->status & MCI_STATUS_UC) {
2602                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2603                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2604                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2605                         return 0;
2606                 }
2607                 if (banks[1] & MCI_STATUS_VAL)
2608                         mce->status |= MCI_STATUS_OVER;
2609                 banks[2] = mce->addr;
2610                 banks[3] = mce->misc;
2611                 vcpu->arch.mcg_status = mce->mcg_status;
2612                 banks[1] = mce->status;
2613                 kvm_queue_exception(vcpu, MC_VECTOR);
2614         } else if (!(banks[1] & MCI_STATUS_VAL)
2615                    || !(banks[1] & MCI_STATUS_UC)) {
2616                 if (banks[1] & MCI_STATUS_VAL)
2617                         mce->status |= MCI_STATUS_OVER;
2618                 banks[2] = mce->addr;
2619                 banks[3] = mce->misc;
2620                 banks[1] = mce->status;
2621         } else
2622                 banks[1] |= MCI_STATUS_OVER;
2623         return 0;
2624 }
2625
2626 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2627                                                struct kvm_vcpu_events *events)
2628 {
2629         events->exception.injected =
2630                 vcpu->arch.exception.pending &&
2631                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2632         events->exception.nr = vcpu->arch.exception.nr;
2633         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2634         events->exception.pad = 0;
2635         events->exception.error_code = vcpu->arch.exception.error_code;
2636
2637         events->interrupt.injected =
2638                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2639         events->interrupt.nr = vcpu->arch.interrupt.nr;
2640         events->interrupt.soft = 0;
2641         events->interrupt.shadow =
2642                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2643                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2644
2645         events->nmi.injected = vcpu->arch.nmi_injected;
2646         events->nmi.pending = vcpu->arch.nmi_pending;
2647         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2648         events->nmi.pad = 0;
2649
2650         events->sipi_vector = vcpu->arch.sipi_vector;
2651
2652         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2653                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2654                          | KVM_VCPUEVENT_VALID_SHADOW);
2655         memset(&events->reserved, 0, sizeof(events->reserved));
2656 }
2657
2658 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2659                                               struct kvm_vcpu_events *events)
2660 {
2661         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2662                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2663                               | KVM_VCPUEVENT_VALID_SHADOW))
2664                 return -EINVAL;
2665
2666         vcpu->arch.exception.pending = events->exception.injected;
2667         vcpu->arch.exception.nr = events->exception.nr;
2668         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2669         vcpu->arch.exception.error_code = events->exception.error_code;
2670
2671         vcpu->arch.interrupt.pending = events->interrupt.injected;
2672         vcpu->arch.interrupt.nr = events->interrupt.nr;
2673         vcpu->arch.interrupt.soft = events->interrupt.soft;
2674         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2675                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2676                                                   events->interrupt.shadow);
2677
2678         vcpu->arch.nmi_injected = events->nmi.injected;
2679         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2680                 vcpu->arch.nmi_pending = events->nmi.pending;
2681         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2682
2683         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2684                 vcpu->arch.sipi_vector = events->sipi_vector;
2685
2686         kvm_make_request(KVM_REQ_EVENT, vcpu);
2687
2688         return 0;
2689 }
2690
2691 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2692                                              struct kvm_debugregs *dbgregs)
2693 {
2694         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2695         dbgregs->dr6 = vcpu->arch.dr6;
2696         dbgregs->dr7 = vcpu->arch.dr7;
2697         dbgregs->flags = 0;
2698         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2699 }
2700
2701 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2702                                             struct kvm_debugregs *dbgregs)
2703 {
2704         if (dbgregs->flags)
2705                 return -EINVAL;
2706
2707         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2708         vcpu->arch.dr6 = dbgregs->dr6;
2709         vcpu->arch.dr7 = dbgregs->dr7;
2710
2711         return 0;
2712 }
2713
2714 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2715                                          struct kvm_xsave *guest_xsave)
2716 {
2717         if (cpu_has_xsave)
2718                 memcpy(guest_xsave->region,
2719                         &vcpu->arch.guest_fpu.state->xsave,
2720                         xstate_size);
2721         else {
2722                 memcpy(guest_xsave->region,
2723                         &vcpu->arch.guest_fpu.state->fxsave,
2724                         sizeof(struct i387_fxsave_struct));
2725                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2726                         XSTATE_FPSSE;
2727         }
2728 }
2729
2730 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2731                                         struct kvm_xsave *guest_xsave)
2732 {
2733         u64 xstate_bv =
2734                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2735
2736         if (cpu_has_xsave)
2737                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2738                         guest_xsave->region, xstate_size);
2739         else {
2740                 if (xstate_bv & ~XSTATE_FPSSE)
2741                         return -EINVAL;
2742                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2743                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2744         }
2745         return 0;
2746 }
2747
2748 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2749                                         struct kvm_xcrs *guest_xcrs)
2750 {
2751         if (!cpu_has_xsave) {
2752                 guest_xcrs->nr_xcrs = 0;
2753                 return;
2754         }
2755
2756         guest_xcrs->nr_xcrs = 1;
2757         guest_xcrs->flags = 0;
2758         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2759         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2760 }
2761
2762 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2763                                        struct kvm_xcrs *guest_xcrs)
2764 {
2765         int i, r = 0;
2766
2767         if (!cpu_has_xsave)
2768                 return -EINVAL;
2769
2770         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2771                 return -EINVAL;
2772
2773         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2774                 /* Only support XCR0 currently */
2775                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2776                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2777                                 guest_xcrs->xcrs[0].value);
2778                         break;
2779                 }
2780         if (r)
2781                 r = -EINVAL;
2782         return r;
2783 }
2784
2785 long kvm_arch_vcpu_ioctl(struct file *filp,
2786                          unsigned int ioctl, unsigned long arg)
2787 {
2788         struct kvm_vcpu *vcpu = filp->private_data;
2789         void __user *argp = (void __user *)arg;
2790         int r;
2791         union {
2792                 struct kvm_lapic_state *lapic;
2793                 struct kvm_xsave *xsave;
2794                 struct kvm_xcrs *xcrs;
2795                 void *buffer;
2796         } u;
2797
2798         u.buffer = NULL;
2799         switch (ioctl) {
2800         case KVM_GET_LAPIC: {
2801                 r = -EINVAL;
2802                 if (!vcpu->arch.apic)
2803                         goto out;
2804                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2805
2806                 r = -ENOMEM;
2807                 if (!u.lapic)
2808                         goto out;
2809                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2810                 if (r)
2811                         goto out;
2812                 r = -EFAULT;
2813                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2814                         goto out;
2815                 r = 0;
2816                 break;
2817         }
2818         case KVM_SET_LAPIC: {
2819                 r = -EINVAL;
2820                 if (!vcpu->arch.apic)
2821                         goto out;
2822                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2823                 r = -ENOMEM;
2824                 if (!u.lapic)
2825                         goto out;
2826                 r = -EFAULT;
2827                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2828                         goto out;
2829                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2830                 if (r)
2831                         goto out;
2832                 r = 0;
2833                 break;
2834         }
2835         case KVM_INTERRUPT: {
2836                 struct kvm_interrupt irq;
2837
2838                 r = -EFAULT;
2839                 if (copy_from_user(&irq, argp, sizeof irq))
2840                         goto out;
2841                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2842                 if (r)
2843                         goto out;
2844                 r = 0;
2845                 break;
2846         }
2847         case KVM_NMI: {
2848                 r = kvm_vcpu_ioctl_nmi(vcpu);
2849                 if (r)
2850                         goto out;
2851                 r = 0;
2852                 break;
2853         }
2854         case KVM_SET_CPUID: {
2855                 struct kvm_cpuid __user *cpuid_arg = argp;
2856                 struct kvm_cpuid cpuid;
2857
2858                 r = -EFAULT;
2859                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2860                         goto out;
2861                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2862                 if (r)
2863                         goto out;
2864                 break;
2865         }
2866         case KVM_SET_CPUID2: {
2867                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2868                 struct kvm_cpuid2 cpuid;
2869
2870                 r = -EFAULT;
2871                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2872                         goto out;
2873                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2874                                               cpuid_arg->entries);
2875                 if (r)
2876                         goto out;
2877                 break;
2878         }
2879         case KVM_GET_CPUID2: {
2880                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2881                 struct kvm_cpuid2 cpuid;
2882
2883                 r = -EFAULT;
2884                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2885                         goto out;
2886                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2887                                               cpuid_arg->entries);
2888                 if (r)
2889                         goto out;
2890                 r = -EFAULT;
2891                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2892                         goto out;
2893                 r = 0;
2894                 break;
2895         }
2896         case KVM_GET_MSRS:
2897                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2898                 break;
2899         case KVM_SET_MSRS:
2900                 r = msr_io(vcpu, argp, do_set_msr, 0);
2901                 break;
2902         case KVM_TPR_ACCESS_REPORTING: {
2903                 struct kvm_tpr_access_ctl tac;
2904
2905                 r = -EFAULT;
2906                 if (copy_from_user(&tac, argp, sizeof tac))
2907                         goto out;
2908                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2909                 if (r)
2910                         goto out;
2911                 r = -EFAULT;
2912                 if (copy_to_user(argp, &tac, sizeof tac))
2913                         goto out;
2914                 r = 0;
2915                 break;
2916         };
2917         case KVM_SET_VAPIC_ADDR: {
2918                 struct kvm_vapic_addr va;
2919
2920                 r = -EINVAL;
2921                 if (!irqchip_in_kernel(vcpu->kvm))
2922                         goto out;
2923                 r = -EFAULT;
2924                 if (copy_from_user(&va, argp, sizeof va))
2925                         goto out;
2926                 r = 0;
2927                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2928                 break;
2929         }
2930         case KVM_X86_SETUP_MCE: {
2931                 u64 mcg_cap;
2932
2933                 r = -EFAULT;
2934                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2935                         goto out;
2936                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2937                 break;
2938         }
2939         case KVM_X86_SET_MCE: {
2940                 struct kvm_x86_mce mce;
2941
2942                 r = -EFAULT;
2943                 if (copy_from_user(&mce, argp, sizeof mce))
2944                         goto out;
2945                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2946                 break;
2947         }
2948         case KVM_GET_VCPU_EVENTS: {
2949                 struct kvm_vcpu_events events;
2950
2951                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2952
2953                 r = -EFAULT;
2954                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2955                         break;
2956                 r = 0;
2957                 break;
2958         }
2959         case KVM_SET_VCPU_EVENTS: {
2960                 struct kvm_vcpu_events events;
2961
2962                 r = -EFAULT;
2963                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2964                         break;
2965
2966                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2967                 break;
2968         }
2969         case KVM_GET_DEBUGREGS: {
2970                 struct kvm_debugregs dbgregs;
2971
2972                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2973
2974                 r = -EFAULT;
2975                 if (copy_to_user(argp, &dbgregs,
2976                                  sizeof(struct kvm_debugregs)))
2977                         break;
2978                 r = 0;
2979                 break;
2980         }
2981         case KVM_SET_DEBUGREGS: {
2982                 struct kvm_debugregs dbgregs;
2983
2984                 r = -EFAULT;
2985                 if (copy_from_user(&dbgregs, argp,
2986                                    sizeof(struct kvm_debugregs)))
2987                         break;
2988
2989                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2990                 break;
2991         }
2992         case KVM_GET_XSAVE: {
2993                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2994                 r = -ENOMEM;
2995                 if (!u.xsave)
2996                         break;
2997
2998                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2999
3000                 r = -EFAULT;
3001                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3002                         break;
3003                 r = 0;
3004                 break;
3005         }
3006         case KVM_SET_XSAVE: {
3007                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3008                 r = -ENOMEM;
3009                 if (!u.xsave)
3010                         break;
3011
3012                 r = -EFAULT;
3013                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3014                         break;
3015
3016                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3017                 break;
3018         }
3019         case KVM_GET_XCRS: {
3020                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3021                 r = -ENOMEM;
3022                 if (!u.xcrs)
3023                         break;
3024
3025                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3026
3027                 r = -EFAULT;
3028                 if (copy_to_user(argp, u.xcrs,
3029                                  sizeof(struct kvm_xcrs)))
3030                         break;
3031                 r = 0;
3032                 break;
3033         }
3034         case KVM_SET_XCRS: {
3035                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3036                 r = -ENOMEM;
3037                 if (!u.xcrs)
3038                         break;
3039
3040                 r = -EFAULT;
3041                 if (copy_from_user(u.xcrs, argp,
3042                                    sizeof(struct kvm_xcrs)))
3043                         break;
3044
3045                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3046                 break;
3047         }
3048         default:
3049                 r = -EINVAL;
3050         }
3051 out:
3052         kfree(u.buffer);
3053         return r;
3054 }
3055
3056 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3057 {
3058         int ret;
3059
3060         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3061                 return -1;
3062         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3063         return ret;
3064 }
3065
3066 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3067                                               u64 ident_addr)
3068 {
3069         kvm->arch.ept_identity_map_addr = ident_addr;
3070         return 0;
3071 }
3072
3073 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3074                                           u32 kvm_nr_mmu_pages)
3075 {
3076         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3077                 return -EINVAL;
3078
3079         mutex_lock(&kvm->slots_lock);
3080         spin_lock(&kvm->mmu_lock);
3081
3082         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3083         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3084
3085         spin_unlock(&kvm->mmu_lock);
3086         mutex_unlock(&kvm->slots_lock);
3087         return 0;
3088 }
3089
3090 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3091 {
3092         return kvm->arch.n_max_mmu_pages;
3093 }
3094
3095 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3096 {
3097         int r;
3098
3099         r = 0;
3100         switch (chip->chip_id) {
3101         case KVM_IRQCHIP_PIC_MASTER:
3102                 memcpy(&chip->chip.pic,
3103                         &pic_irqchip(kvm)->pics[0],
3104                         sizeof(struct kvm_pic_state));
3105                 break;
3106         case KVM_IRQCHIP_PIC_SLAVE:
3107                 memcpy(&chip->chip.pic,
3108                         &pic_irqchip(kvm)->pics[1],
3109                         sizeof(struct kvm_pic_state));
3110                 break;
3111         case KVM_IRQCHIP_IOAPIC:
3112                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3113                 break;
3114         default:
3115                 r = -EINVAL;
3116                 break;
3117         }
3118         return r;
3119 }
3120
3121 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3122 {
3123         int r;
3124
3125         r = 0;
3126         switch (chip->chip_id) {
3127         case KVM_IRQCHIP_PIC_MASTER:
3128                 spin_lock(&pic_irqchip(kvm)->lock);
3129                 memcpy(&pic_irqchip(kvm)->pics[0],
3130                         &chip->chip.pic,
3131                         sizeof(struct kvm_pic_state));
3132                 spin_unlock(&pic_irqchip(kvm)->lock);
3133                 break;
3134         case KVM_IRQCHIP_PIC_SLAVE:
3135                 spin_lock(&pic_irqchip(kvm)->lock);
3136                 memcpy(&pic_irqchip(kvm)->pics[1],
3137                         &chip->chip.pic,
3138                         sizeof(struct kvm_pic_state));
3139                 spin_unlock(&pic_irqchip(kvm)->lock);
3140                 break;
3141         case KVM_IRQCHIP_IOAPIC:
3142                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3143                 break;
3144         default:
3145                 r = -EINVAL;
3146                 break;
3147         }
3148         kvm_pic_update_irq(pic_irqchip(kvm));
3149         return r;
3150 }
3151
3152 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3153 {
3154         int r = 0;
3155
3156         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3157         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3158         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3159         return r;
3160 }
3161
3162 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3163 {
3164         int r = 0;
3165
3166         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3167         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3168         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3169         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3170         return r;
3171 }
3172
3173 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3174 {
3175         int r = 0;
3176
3177         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3178         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3179                 sizeof(ps->channels));
3180         ps->flags = kvm->arch.vpit->pit_state.flags;
3181         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3182         memset(&ps->reserved, 0, sizeof(ps->reserved));
3183         return r;
3184 }
3185
3186 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3187 {
3188         int r = 0, start = 0;
3189         u32 prev_legacy, cur_legacy;
3190         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3191         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3192         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3193         if (!prev_legacy && cur_legacy)
3194                 start = 1;
3195         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3196                sizeof(kvm->arch.vpit->pit_state.channels));
3197         kvm->arch.vpit->pit_state.flags = ps->flags;
3198         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3199         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3200         return r;
3201 }
3202
3203 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3204                                  struct kvm_reinject_control *control)
3205 {
3206         if (!kvm->arch.vpit)
3207                 return -ENXIO;
3208         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3209         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3210         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3211         return 0;
3212 }
3213
3214 /*
3215  * Get (and clear) the dirty memory log for a memory slot.
3216  */
3217 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3218                                       struct kvm_dirty_log *log)
3219 {
3220         int r, i;
3221         struct kvm_memory_slot *memslot;
3222         unsigned long n;
3223         unsigned long is_dirty = 0;
3224
3225         mutex_lock(&kvm->slots_lock);
3226
3227         r = -EINVAL;
3228         if (log->slot >= KVM_MEMORY_SLOTS)
3229                 goto out;
3230
3231         memslot = &kvm->memslots->memslots[log->slot];
3232         r = -ENOENT;
3233         if (!memslot->dirty_bitmap)
3234                 goto out;
3235
3236         n = kvm_dirty_bitmap_bytes(memslot);
3237
3238         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3239                 is_dirty = memslot->dirty_bitmap[i];
3240
3241         /* If nothing is dirty, don't bother messing with page tables. */
3242         if (is_dirty) {
3243                 struct kvm_memslots *slots, *old_slots;
3244                 unsigned long *dirty_bitmap;
3245
3246                 dirty_bitmap = memslot->dirty_bitmap_head;
3247                 if (memslot->dirty_bitmap == dirty_bitmap)
3248                         dirty_bitmap += n / sizeof(long);
3249                 memset(dirty_bitmap, 0, n);
3250
3251                 r = -ENOMEM;
3252                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3253                 if (!slots)
3254                         goto out;
3255                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3256                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3257                 slots->generation++;
3258
3259                 old_slots = kvm->memslots;
3260                 rcu_assign_pointer(kvm->memslots, slots);
3261                 synchronize_srcu_expedited(&kvm->srcu);
3262                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3263                 kfree(old_slots);
3264
3265                 spin_lock(&kvm->mmu_lock);
3266                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3267                 spin_unlock(&kvm->mmu_lock);
3268
3269                 r = -EFAULT;
3270                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3271                         goto out;
3272         } else {
3273                 r = -EFAULT;
3274                 if (clear_user(log->dirty_bitmap, n))
3275                         goto out;
3276         }
3277
3278         r = 0;
3279 out:
3280         mutex_unlock(&kvm->slots_lock);
3281         return r;
3282 }
3283
3284 long kvm_arch_vm_ioctl(struct file *filp,
3285                        unsigned int ioctl, unsigned long arg)
3286 {
3287         struct kvm *kvm = filp->private_data;
3288         void __user *argp = (void __user *)arg;
3289         int r = -ENOTTY;
3290         /*
3291          * This union makes it completely explicit to gcc-3.x
3292          * that these two variables' stack usage should be
3293          * combined, not added together.
3294          */
3295         union {
3296                 struct kvm_pit_state ps;
3297                 struct kvm_pit_state2 ps2;
3298                 struct kvm_pit_config pit_config;
3299         } u;
3300
3301         switch (ioctl) {
3302         case KVM_SET_TSS_ADDR:
3303                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3304                 if (r < 0)
3305                         goto out;
3306                 break;
3307         case KVM_SET_IDENTITY_MAP_ADDR: {
3308                 u64 ident_addr;
3309
3310                 r = -EFAULT;
3311                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3312                         goto out;
3313                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3314                 if (r < 0)
3315                         goto out;
3316                 break;
3317         }
3318         case KVM_SET_NR_MMU_PAGES:
3319                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3320                 if (r)
3321                         goto out;
3322                 break;
3323         case KVM_GET_NR_MMU_PAGES:
3324                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3325                 break;
3326         case KVM_CREATE_IRQCHIP: {
3327                 struct kvm_pic *vpic;
3328
3329                 mutex_lock(&kvm->lock);
3330                 r = -EEXIST;
3331                 if (kvm->arch.vpic)
3332                         goto create_irqchip_unlock;
3333                 r = -ENOMEM;
3334                 vpic = kvm_create_pic(kvm);
3335                 if (vpic) {
3336                         r = kvm_ioapic_init(kvm);
3337                         if (r) {
3338                                 mutex_lock(&kvm->slots_lock);
3339                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3340                                                           &vpic->dev);
3341                                 mutex_unlock(&kvm->slots_lock);
3342                                 kfree(vpic);
3343                                 goto create_irqchip_unlock;
3344                         }
3345                 } else
3346                         goto create_irqchip_unlock;
3347                 smp_wmb();
3348                 kvm->arch.vpic = vpic;
3349                 smp_wmb();
3350                 r = kvm_setup_default_irq_routing(kvm);
3351                 if (r) {
3352                         mutex_lock(&kvm->slots_lock);
3353                         mutex_lock(&kvm->irq_lock);
3354                         kvm_ioapic_destroy(kvm);
3355                         kvm_destroy_pic(kvm);
3356                         mutex_unlock(&kvm->irq_lock);
3357                         mutex_unlock(&kvm->slots_lock);
3358                 }
3359         create_irqchip_unlock:
3360                 mutex_unlock(&kvm->lock);
3361                 break;
3362         }
3363         case KVM_CREATE_PIT:
3364                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3365                 goto create_pit;
3366         case KVM_CREATE_PIT2:
3367                 r = -EFAULT;
3368                 if (copy_from_user(&u.pit_config, argp,
3369                                    sizeof(struct kvm_pit_config)))
3370                         goto out;
3371         create_pit:
3372                 mutex_lock(&kvm->slots_lock);
3373                 r = -EEXIST;
3374                 if (kvm->arch.vpit)
3375                         goto create_pit_unlock;
3376                 r = -ENOMEM;
3377                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3378                 if (kvm->arch.vpit)
3379                         r = 0;
3380         create_pit_unlock:
3381                 mutex_unlock(&kvm->slots_lock);
3382                 break;
3383         case KVM_IRQ_LINE_STATUS:
3384         case KVM_IRQ_LINE: {
3385                 struct kvm_irq_level irq_event;
3386
3387                 r = -EFAULT;
3388                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3389                         goto out;
3390                 r = -ENXIO;
3391                 if (irqchip_in_kernel(kvm)) {
3392                         __s32 status;
3393                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3394                                         irq_event.irq, irq_event.level);
3395                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3396                                 r = -EFAULT;
3397                                 irq_event.status = status;
3398                                 if (copy_to_user(argp, &irq_event,
3399                                                         sizeof irq_event))
3400                                         goto out;
3401                         }
3402                         r = 0;
3403                 }
3404                 break;
3405         }
3406         case KVM_GET_IRQCHIP: {
3407                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3408                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3409
3410                 r = -ENOMEM;
3411                 if (!chip)
3412                         goto out;
3413                 r = -EFAULT;
3414                 if (copy_from_user(chip, argp, sizeof *chip))
3415                         goto get_irqchip_out;
3416                 r = -ENXIO;
3417                 if (!irqchip_in_kernel(kvm))
3418                         goto get_irqchip_out;
3419                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3420                 if (r)
3421                         goto get_irqchip_out;
3422                 r = -EFAULT;
3423                 if (copy_to_user(argp, chip, sizeof *chip))
3424                         goto get_irqchip_out;
3425                 r = 0;
3426         get_irqchip_out:
3427                 kfree(chip);
3428                 if (r)
3429                         goto out;
3430                 break;
3431         }
3432         case KVM_SET_IRQCHIP: {
3433                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3434                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3435
3436                 r = -ENOMEM;
3437                 if (!chip)
3438                         goto out;
3439                 r = -EFAULT;
3440                 if (copy_from_user(chip, argp, sizeof *chip))
3441                         goto set_irqchip_out;
3442                 r = -ENXIO;
3443                 if (!irqchip_in_kernel(kvm))
3444                         goto set_irqchip_out;
3445                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3446                 if (r)
3447                         goto set_irqchip_out;
3448                 r = 0;
3449         set_irqchip_out:
3450                 kfree(chip);
3451                 if (r)
3452                         goto out;
3453                 break;
3454         }
3455         case KVM_GET_PIT: {
3456                 r = -EFAULT;
3457                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3458                         goto out;
3459                 r = -ENXIO;
3460                 if (!kvm->arch.vpit)
3461                         goto out;
3462                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3463                 if (r)
3464                         goto out;
3465                 r = -EFAULT;
3466                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3467                         goto out;
3468                 r = 0;
3469                 break;
3470         }
3471         case KVM_SET_PIT: {
3472                 r = -EFAULT;
3473                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3474                         goto out;
3475                 r = -ENXIO;
3476                 if (!kvm->arch.vpit)
3477                         goto out;
3478                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3479                 if (r)
3480                         goto out;
3481                 r = 0;
3482                 break;
3483         }
3484         case KVM_GET_PIT2: {
3485                 r = -ENXIO;
3486                 if (!kvm->arch.vpit)
3487                         goto out;
3488                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3489                 if (r)
3490                         goto out;
3491                 r = -EFAULT;
3492                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3493                         goto out;
3494                 r = 0;
3495                 break;
3496         }
3497         case KVM_SET_PIT2: {
3498                 r = -EFAULT;
3499                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3500                         goto out;
3501                 r = -ENXIO;
3502                 if (!kvm->arch.vpit)
3503                         goto out;
3504                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3505                 if (r)
3506                         goto out;
3507                 r = 0;
3508                 break;
3509         }
3510         case KVM_REINJECT_CONTROL: {
3511                 struct kvm_reinject_control control;
3512                 r =  -EFAULT;
3513                 if (copy_from_user(&control, argp, sizeof(control)))
3514                         goto out;
3515                 r = kvm_vm_ioctl_reinject(kvm, &control);
3516                 if (r)
3517                         goto out;
3518                 r = 0;
3519                 break;
3520         }
3521         case KVM_XEN_HVM_CONFIG: {
3522                 r = -EFAULT;
3523                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3524                                    sizeof(struct kvm_xen_hvm_config)))
3525                         goto out;
3526                 r = -EINVAL;
3527                 if (kvm->arch.xen_hvm_config.flags)
3528                         goto out;
3529                 r = 0;
3530                 break;
3531         }
3532         case KVM_SET_CLOCK: {
3533                 struct kvm_clock_data user_ns;
3534                 u64 now_ns;
3535                 s64 delta;
3536
3537                 r = -EFAULT;
3538                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3539                         goto out;
3540
3541                 r = -EINVAL;
3542                 if (user_ns.flags)
3543                         goto out;
3544
3545                 r = 0;
3546                 local_irq_disable();
3547                 now_ns = get_kernel_ns();
3548                 delta = user_ns.clock - now_ns;
3549                 local_irq_enable();
3550                 kvm->arch.kvmclock_offset = delta;
3551                 break;
3552         }
3553         case KVM_GET_CLOCK: {
3554                 struct kvm_clock_data user_ns;
3555                 u64 now_ns;
3556
3557                 local_irq_disable();
3558                 now_ns = get_kernel_ns();
3559                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3560                 local_irq_enable();
3561                 user_ns.flags = 0;
3562                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3563
3564                 r = -EFAULT;
3565                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3566                         goto out;
3567                 r = 0;
3568                 break;
3569         }
3570
3571         default:
3572                 ;
3573         }
3574 out:
3575         return r;
3576 }
3577
3578 static void kvm_init_msr_list(void)
3579 {
3580         u32 dummy[2];
3581         unsigned i, j;
3582
3583         /* skip the first msrs in the list. KVM-specific */
3584         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3585                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3586                         continue;
3587                 if (j < i)
3588                         msrs_to_save[j] = msrs_to_save[i];
3589                 j++;
3590         }
3591         num_msrs_to_save = j;
3592 }
3593
3594 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3595                            const void *v)
3596 {
3597         if (vcpu->arch.apic &&
3598             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3599                 return 0;
3600
3601         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3602 }
3603
3604 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3605 {
3606         if (vcpu->arch.apic &&
3607             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3608                 return 0;
3609
3610         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3611 }
3612
3613 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3614                         struct kvm_segment *var, int seg)
3615 {
3616         kvm_x86_ops->set_segment(vcpu, var, seg);
3617 }
3618
3619 void kvm_get_segment(struct kvm_vcpu *vcpu,
3620                      struct kvm_segment *var, int seg)
3621 {
3622         kvm_x86_ops->get_segment(vcpu, var, seg);
3623 }
3624
3625 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3626 {
3627         return gpa;
3628 }
3629
3630 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3631 {
3632         gpa_t t_gpa;
3633         struct x86_exception exception;
3634
3635         BUG_ON(!mmu_is_nested(vcpu));
3636
3637         /* NPT walks are always user-walks */
3638         access |= PFERR_USER_MASK;
3639         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3640
3641         return t_gpa;
3642 }
3643
3644 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3645                               struct x86_exception *exception)
3646 {
3647         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3648         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3649 }
3650
3651  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3652                                 struct x86_exception *exception)
3653 {
3654         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3655         access |= PFERR_FETCH_MASK;
3656         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3657 }
3658
3659 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3660                                struct x86_exception *exception)
3661 {
3662         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3663         access |= PFERR_WRITE_MASK;
3664         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3665 }
3666
3667 /* uses this to access any guest's mapped memory without checking CPL */
3668 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3669                                 struct x86_exception *exception)
3670 {
3671         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3672 }
3673
3674 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3675                                       struct kvm_vcpu *vcpu, u32 access,
3676                                       struct x86_exception *exception)
3677 {
3678         void *data = val;
3679         int r = X86EMUL_CONTINUE;
3680
3681         while (bytes) {
3682                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3683                                                             exception);
3684                 unsigned offset = addr & (PAGE_SIZE-1);
3685                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3686                 int ret;
3687
3688                 if (gpa == UNMAPPED_GVA)
3689                         return X86EMUL_PROPAGATE_FAULT;
3690                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3691                 if (ret < 0) {
3692                         r = X86EMUL_IO_NEEDED;
3693                         goto out;
3694                 }
3695
3696                 bytes -= toread;
3697                 data += toread;
3698                 addr += toread;
3699         }
3700 out:
3701         return r;
3702 }
3703
3704 /* used for instruction fetching */
3705 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3706                                 struct kvm_vcpu *vcpu,
3707                                 struct x86_exception *exception)
3708 {
3709         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3710         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3711                                           access | PFERR_FETCH_MASK,
3712                                           exception);
3713 }
3714
3715 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3716                                struct kvm_vcpu *vcpu,
3717                                struct x86_exception *exception)
3718 {
3719         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3720         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3721                                           exception);
3722 }
3723
3724 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3725                                       struct kvm_vcpu *vcpu,
3726                                       struct x86_exception *exception)
3727 {
3728         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3729 }
3730
3731 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3732                                        unsigned int bytes,
3733                                        struct kvm_vcpu *vcpu,
3734                                        struct x86_exception *exception)
3735 {
3736         void *data = val;
3737         int r = X86EMUL_CONTINUE;
3738
3739         while (bytes) {
3740                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3741                                                              PFERR_WRITE_MASK,
3742                                                              exception);
3743                 unsigned offset = addr & (PAGE_SIZE-1);
3744                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3745                 int ret;
3746
3747                 if (gpa == UNMAPPED_GVA)
3748                         return X86EMUL_PROPAGATE_FAULT;
3749                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3750                 if (ret < 0) {
3751                         r = X86EMUL_IO_NEEDED;
3752                         goto out;
3753                 }
3754
3755                 bytes -= towrite;
3756                 data += towrite;
3757                 addr += towrite;
3758         }
3759 out:
3760         return r;
3761 }
3762
3763 static int emulator_read_emulated(unsigned long addr,
3764                                   void *val,
3765                                   unsigned int bytes,
3766                                   struct x86_exception *exception,
3767                                   struct kvm_vcpu *vcpu)
3768 {
3769         gpa_t                 gpa;
3770
3771         if (vcpu->mmio_read_completed) {
3772                 memcpy(val, vcpu->mmio_data, bytes);
3773                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3774                                vcpu->mmio_phys_addr, *(u64 *)val);
3775                 vcpu->mmio_read_completed = 0;
3776                 return X86EMUL_CONTINUE;
3777         }
3778
3779         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3780
3781         if (gpa == UNMAPPED_GVA)
3782                 return X86EMUL_PROPAGATE_FAULT;
3783
3784         /* For APIC access vmexit */
3785         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3786                 goto mmio;
3787
3788         if (kvm_read_guest_virt(addr, val, bytes, vcpu, exception)
3789             == X86EMUL_CONTINUE)
3790                 return X86EMUL_CONTINUE;
3791
3792 mmio:
3793         /*
3794          * Is this MMIO handled locally?
3795          */
3796         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3797                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3798                 return X86EMUL_CONTINUE;
3799         }
3800
3801         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3802
3803         vcpu->mmio_needed = 1;
3804         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3805         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3806         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3807         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3808
3809         return X86EMUL_IO_NEEDED;
3810 }
3811
3812 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3813                         const void *val, int bytes)
3814 {
3815         int ret;
3816
3817         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3818         if (ret < 0)
3819                 return 0;
3820         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3821         return 1;
3822 }
3823
3824 static int emulator_write_emulated_onepage(unsigned long addr,
3825                                            const void *val,
3826                                            unsigned int bytes,
3827                                            struct x86_exception *exception,
3828                                            struct kvm_vcpu *vcpu)
3829 {
3830         gpa_t                 gpa;
3831
3832         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3833
3834         if (gpa == UNMAPPED_GVA)
3835                 return X86EMUL_PROPAGATE_FAULT;
3836
3837         /* For APIC access vmexit */
3838         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3839                 goto mmio;
3840
3841         if (emulator_write_phys(vcpu, gpa, val, bytes))
3842                 return X86EMUL_CONTINUE;
3843
3844 mmio:
3845         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3846         /*
3847          * Is this MMIO handled locally?
3848          */
3849         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3850                 return X86EMUL_CONTINUE;
3851
3852         vcpu->mmio_needed = 1;
3853         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3854         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3855         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3856         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3857         memcpy(vcpu->run->mmio.data, val, bytes);
3858
3859         return X86EMUL_CONTINUE;
3860 }
3861
3862 int emulator_write_emulated(unsigned long addr,
3863                             const void *val,
3864                             unsigned int bytes,
3865                             struct x86_exception *exception,
3866                             struct kvm_vcpu *vcpu)
3867 {
3868         /* Crossing a page boundary? */
3869         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3870                 int rc, now;
3871
3872                 now = -addr & ~PAGE_MASK;
3873                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
3874                                                      vcpu);
3875                 if (rc != X86EMUL_CONTINUE)
3876                         return rc;
3877                 addr += now;
3878                 val += now;
3879                 bytes -= now;
3880         }
3881         return emulator_write_emulated_onepage(addr, val, bytes, exception,
3882                                                vcpu);
3883 }
3884
3885 #define CMPXCHG_TYPE(t, ptr, old, new) \
3886         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3887
3888 #ifdef CONFIG_X86_64
3889 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3890 #else
3891 #  define CMPXCHG64(ptr, old, new) \
3892         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3893 #endif
3894
3895 static int emulator_cmpxchg_emulated(unsigned long addr,
3896                                      const void *old,
3897                                      const void *new,
3898                                      unsigned int bytes,
3899                                      struct x86_exception *exception,
3900                                      struct kvm_vcpu *vcpu)
3901 {
3902         gpa_t gpa;
3903         struct page *page;
3904         char *kaddr;
3905         bool exchanged;
3906
3907         /* guests cmpxchg8b have to be emulated atomically */
3908         if (bytes > 8 || (bytes & (bytes - 1)))
3909                 goto emul_write;
3910
3911         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3912
3913         if (gpa == UNMAPPED_GVA ||
3914             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3915                 goto emul_write;
3916
3917         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3918                 goto emul_write;
3919
3920         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3921         if (is_error_page(page)) {
3922                 kvm_release_page_clean(page);
3923                 goto emul_write;
3924         }
3925
3926         kaddr = kmap_atomic(page, KM_USER0);
3927         kaddr += offset_in_page(gpa);
3928         switch (bytes) {
3929         case 1:
3930                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3931                 break;
3932         case 2:
3933                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3934                 break;
3935         case 4:
3936                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3937                 break;
3938         case 8:
3939                 exchanged = CMPXCHG64(kaddr, old, new);
3940                 break;
3941         default:
3942                 BUG();
3943         }
3944         kunmap_atomic(kaddr, KM_USER0);
3945         kvm_release_page_dirty(page);
3946
3947         if (!exchanged)
3948                 return X86EMUL_CMPXCHG_FAILED;
3949
3950         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3951
3952         return X86EMUL_CONTINUE;
3953
3954 emul_write:
3955         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3956
3957         return emulator_write_emulated(addr, new, bytes, exception, vcpu);
3958 }
3959
3960 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3961 {
3962         /* TODO: String I/O for in kernel device */
3963         int r;
3964
3965         if (vcpu->arch.pio.in)
3966                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3967                                     vcpu->arch.pio.size, pd);
3968         else
3969                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3970                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3971                                      pd);
3972         return r;
3973 }
3974
3975
3976 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3977                              unsigned int count, struct kvm_vcpu *vcpu)
3978 {
3979         if (vcpu->arch.pio.count)
3980                 goto data_avail;
3981
3982         trace_kvm_pio(0, port, size, count);
3983
3984         vcpu->arch.pio.port = port;
3985         vcpu->arch.pio.in = 1;
3986         vcpu->arch.pio.count  = count;
3987         vcpu->arch.pio.size = size;
3988
3989         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3990         data_avail:
3991                 memcpy(val, vcpu->arch.pio_data, size * count);
3992                 vcpu->arch.pio.count = 0;
3993                 return 1;
3994         }
3995
3996         vcpu->run->exit_reason = KVM_EXIT_IO;
3997         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3998         vcpu->run->io.size = size;
3999         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4000         vcpu->run->io.count = count;
4001         vcpu->run->io.port = port;
4002
4003         return 0;
4004 }
4005
4006 static int emulator_pio_out_emulated(int size, unsigned short port,
4007                               const void *val, unsigned int count,
4008                               struct kvm_vcpu *vcpu)
4009 {
4010         trace_kvm_pio(1, port, size, count);
4011
4012         vcpu->arch.pio.port = port;
4013         vcpu->arch.pio.in = 0;
4014         vcpu->arch.pio.count = count;
4015         vcpu->arch.pio.size = size;
4016
4017         memcpy(vcpu->arch.pio_data, val, size * count);
4018
4019         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4020                 vcpu->arch.pio.count = 0;
4021                 return 1;
4022         }
4023
4024         vcpu->run->exit_reason = KVM_EXIT_IO;
4025         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4026         vcpu->run->io.size = size;
4027         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4028         vcpu->run->io.count = count;
4029         vcpu->run->io.port = port;
4030
4031         return 0;
4032 }
4033
4034 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4035 {
4036         return kvm_x86_ops->get_segment_base(vcpu, seg);
4037 }
4038
4039 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4040 {
4041         kvm_mmu_invlpg(vcpu, address);
4042         return X86EMUL_CONTINUE;
4043 }
4044
4045 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4046 {
4047         if (!need_emulate_wbinvd(vcpu))
4048                 return X86EMUL_CONTINUE;
4049
4050         if (kvm_x86_ops->has_wbinvd_exit()) {
4051                 int cpu = get_cpu();
4052
4053                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4054                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4055                                 wbinvd_ipi, NULL, 1);
4056                 put_cpu();
4057                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4058         } else
4059                 wbinvd();
4060         return X86EMUL_CONTINUE;
4061 }
4062 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4063
4064 int emulate_clts(struct kvm_vcpu *vcpu)
4065 {
4066         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4067         kvm_x86_ops->fpu_activate(vcpu);
4068         return X86EMUL_CONTINUE;
4069 }
4070
4071 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4072 {
4073         return _kvm_get_dr(vcpu, dr, dest);
4074 }
4075
4076 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4077 {
4078
4079         return __kvm_set_dr(vcpu, dr, value);
4080 }
4081
4082 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4083 {
4084         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4085 }
4086
4087 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4088 {
4089         unsigned long value;
4090
4091         switch (cr) {
4092         case 0:
4093                 value = kvm_read_cr0(vcpu);
4094                 break;
4095         case 2:
4096                 value = vcpu->arch.cr2;
4097                 break;
4098         case 3:
4099                 value = kvm_read_cr3(vcpu);
4100                 break;
4101         case 4:
4102                 value = kvm_read_cr4(vcpu);
4103                 break;
4104         case 8:
4105                 value = kvm_get_cr8(vcpu);
4106                 break;
4107         default:
4108                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4109                 return 0;
4110         }
4111
4112         return value;
4113 }
4114
4115 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4116 {
4117         int res = 0;
4118
4119         switch (cr) {
4120         case 0:
4121                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4122                 break;
4123         case 2:
4124                 vcpu->arch.cr2 = val;
4125                 break;
4126         case 3:
4127                 res = kvm_set_cr3(vcpu, val);
4128                 break;
4129         case 4:
4130                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4131                 break;
4132         case 8:
4133                 res = kvm_set_cr8(vcpu, val);
4134                 break;
4135         default:
4136                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4137                 res = -1;
4138         }
4139
4140         return res;
4141 }
4142
4143 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4144 {
4145         return kvm_x86_ops->get_cpl(vcpu);
4146 }
4147
4148 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4149 {
4150         kvm_x86_ops->get_gdt(vcpu, dt);
4151 }
4152
4153 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4154 {
4155         kvm_x86_ops->get_idt(vcpu, dt);
4156 }
4157
4158 static unsigned long emulator_get_cached_segment_base(int seg,
4159                                                       struct kvm_vcpu *vcpu)
4160 {
4161         return get_segment_base(vcpu, seg);
4162 }
4163
4164 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4165                                            struct kvm_vcpu *vcpu)
4166 {
4167         struct kvm_segment var;
4168
4169         kvm_get_segment(vcpu, &var, seg);
4170
4171         if (var.unusable)
4172                 return false;
4173
4174         if (var.g)
4175                 var.limit >>= 12;
4176         set_desc_limit(desc, var.limit);
4177         set_desc_base(desc, (unsigned long)var.base);
4178         desc->type = var.type;
4179         desc->s = var.s;
4180         desc->dpl = var.dpl;
4181         desc->p = var.present;
4182         desc->avl = var.avl;
4183         desc->l = var.l;
4184         desc->d = var.db;
4185         desc->g = var.g;
4186
4187         return true;
4188 }
4189
4190 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4191                                            struct kvm_vcpu *vcpu)
4192 {
4193         struct kvm_segment var;
4194
4195         /* needed to preserve selector */
4196         kvm_get_segment(vcpu, &var, seg);
4197
4198         var.base = get_desc_base(desc);
4199         var.limit = get_desc_limit(desc);
4200         if (desc->g)
4201                 var.limit = (var.limit << 12) | 0xfff;
4202         var.type = desc->type;
4203         var.present = desc->p;
4204         var.dpl = desc->dpl;
4205         var.db = desc->d;
4206         var.s = desc->s;
4207         var.l = desc->l;
4208         var.g = desc->g;
4209         var.avl = desc->avl;
4210         var.present = desc->p;
4211         var.unusable = !var.present;
4212         var.padding = 0;
4213
4214         kvm_set_segment(vcpu, &var, seg);
4215         return;
4216 }
4217
4218 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4219 {
4220         struct kvm_segment kvm_seg;
4221
4222         kvm_get_segment(vcpu, &kvm_seg, seg);
4223         return kvm_seg.selector;
4224 }
4225
4226 static void emulator_set_segment_selector(u16 sel, int seg,
4227                                           struct kvm_vcpu *vcpu)
4228 {
4229         struct kvm_segment kvm_seg;
4230
4231         kvm_get_segment(vcpu, &kvm_seg, seg);
4232         kvm_seg.selector = sel;
4233         kvm_set_segment(vcpu, &kvm_seg, seg);
4234 }
4235
4236 static struct x86_emulate_ops emulate_ops = {
4237         .read_std            = kvm_read_guest_virt_system,
4238         .write_std           = kvm_write_guest_virt_system,
4239         .fetch               = kvm_fetch_guest_virt,
4240         .read_emulated       = emulator_read_emulated,
4241         .write_emulated      = emulator_write_emulated,
4242         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4243         .pio_in_emulated     = emulator_pio_in_emulated,
4244         .pio_out_emulated    = emulator_pio_out_emulated,
4245         .get_cached_descriptor = emulator_get_cached_descriptor,
4246         .set_cached_descriptor = emulator_set_cached_descriptor,
4247         .get_segment_selector = emulator_get_segment_selector,
4248         .set_segment_selector = emulator_set_segment_selector,
4249         .get_cached_segment_base = emulator_get_cached_segment_base,
4250         .get_gdt             = emulator_get_gdt,
4251         .get_idt             = emulator_get_idt,
4252         .get_cr              = emulator_get_cr,
4253         .set_cr              = emulator_set_cr,
4254         .cpl                 = emulator_get_cpl,
4255         .get_dr              = emulator_get_dr,
4256         .set_dr              = emulator_set_dr,
4257         .set_msr             = kvm_set_msr,
4258         .get_msr             = kvm_get_msr,
4259 };
4260
4261 static void cache_all_regs(struct kvm_vcpu *vcpu)
4262 {
4263         kvm_register_read(vcpu, VCPU_REGS_RAX);
4264         kvm_register_read(vcpu, VCPU_REGS_RSP);
4265         kvm_register_read(vcpu, VCPU_REGS_RIP);
4266         vcpu->arch.regs_dirty = ~0;
4267 }
4268
4269 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4270 {
4271         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4272         /*
4273          * an sti; sti; sequence only disable interrupts for the first
4274          * instruction. So, if the last instruction, be it emulated or
4275          * not, left the system with the INT_STI flag enabled, it
4276          * means that the last instruction is an sti. We should not
4277          * leave the flag on in this case. The same goes for mov ss
4278          */
4279         if (!(int_shadow & mask))
4280                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4281 }
4282
4283 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4284 {
4285         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4286         if (ctxt->exception.vector == PF_VECTOR)
4287                 kvm_propagate_fault(vcpu, &ctxt->exception);
4288         else if (ctxt->exception.error_code_valid)
4289                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4290                                       ctxt->exception.error_code);
4291         else
4292                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4293 }
4294
4295 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4296 {
4297         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4298         int cs_db, cs_l;
4299
4300         cache_all_regs(vcpu);
4301
4302         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4303
4304         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4305         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4306         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4307         vcpu->arch.emulate_ctxt.mode =
4308                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4309                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4310                 ? X86EMUL_MODE_VM86 : cs_l
4311                 ? X86EMUL_MODE_PROT64 : cs_db
4312                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4313         memset(c, 0, sizeof(struct decode_cache));
4314         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4315 }
4316
4317 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4318 {
4319         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4320         int ret;
4321
4322         init_emulate_ctxt(vcpu);
4323
4324         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4325         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4326         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4327         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4328
4329         if (ret != X86EMUL_CONTINUE)
4330                 return EMULATE_FAIL;
4331
4332         vcpu->arch.emulate_ctxt.eip = c->eip;
4333         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4334         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4335         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4336
4337         if (irq == NMI_VECTOR)
4338                 vcpu->arch.nmi_pending = false;
4339         else
4340                 vcpu->arch.interrupt.pending = false;
4341
4342         return EMULATE_DONE;
4343 }
4344 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4345
4346 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4347 {
4348         int r = EMULATE_DONE;
4349
4350         ++vcpu->stat.insn_emulation_fail;
4351         trace_kvm_emulate_insn_failed(vcpu);
4352         if (!is_guest_mode(vcpu)) {
4353                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4354                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4355                 vcpu->run->internal.ndata = 0;
4356                 r = EMULATE_FAIL;
4357         }
4358         kvm_queue_exception(vcpu, UD_VECTOR);
4359
4360         return r;
4361 }
4362
4363 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4364 {
4365         gpa_t gpa;
4366
4367         if (tdp_enabled)
4368                 return false;
4369
4370         /*
4371          * if emulation was due to access to shadowed page table
4372          * and it failed try to unshadow page and re-entetr the
4373          * guest to let CPU execute the instruction.
4374          */
4375         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4376                 return true;
4377
4378         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4379
4380         if (gpa == UNMAPPED_GVA)
4381                 return true; /* let cpu generate fault */
4382
4383         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4384                 return true;
4385
4386         return false;
4387 }
4388
4389 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4390                             unsigned long cr2,
4391                             int emulation_type,
4392                             void *insn,
4393                             int insn_len)
4394 {
4395         int r;
4396         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4397
4398         kvm_clear_exception_queue(vcpu);
4399         vcpu->arch.mmio_fault_cr2 = cr2;
4400         /*
4401          * TODO: fix emulate.c to use guest_read/write_register
4402          * instead of direct ->regs accesses, can save hundred cycles
4403          * on Intel for instructions that don't read/change RSP, for
4404          * for example.
4405          */
4406         cache_all_regs(vcpu);
4407
4408         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4409                 init_emulate_ctxt(vcpu);
4410                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4411                 vcpu->arch.emulate_ctxt.have_exception = false;
4412                 vcpu->arch.emulate_ctxt.perm_ok = false;
4413
4414                 vcpu->arch.emulate_ctxt.only_vendor_specific_insn
4415                         = emulation_type & EMULTYPE_TRAP_UD;
4416
4417                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len);
4418
4419                 trace_kvm_emulate_insn_start(vcpu);
4420                 ++vcpu->stat.insn_emulation;
4421                 if (r)  {
4422                         if (emulation_type & EMULTYPE_TRAP_UD)
4423                                 return EMULATE_FAIL;
4424                         if (reexecute_instruction(vcpu, cr2))
4425                                 return EMULATE_DONE;
4426                         if (emulation_type & EMULTYPE_SKIP)
4427                                 return EMULATE_FAIL;
4428                         return handle_emulation_failure(vcpu);
4429                 }
4430         }
4431
4432         if (emulation_type & EMULTYPE_SKIP) {
4433                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4434                 return EMULATE_DONE;
4435         }
4436
4437         /* this is needed for vmware backdor interface to work since it
4438            changes registers values  during IO operation */
4439         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4440
4441 restart:
4442         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4443
4444         if (r == EMULATION_FAILED) {
4445                 if (reexecute_instruction(vcpu, cr2))
4446                         return EMULATE_DONE;
4447
4448                 return handle_emulation_failure(vcpu);
4449         }
4450
4451         if (vcpu->arch.emulate_ctxt.have_exception) {
4452                 inject_emulated_exception(vcpu);
4453                 r = EMULATE_DONE;
4454         } else if (vcpu->arch.pio.count) {
4455                 if (!vcpu->arch.pio.in)
4456                         vcpu->arch.pio.count = 0;
4457                 r = EMULATE_DO_MMIO;
4458         } else if (vcpu->mmio_needed) {
4459                 if (vcpu->mmio_is_write)
4460                         vcpu->mmio_needed = 0;
4461                 r = EMULATE_DO_MMIO;
4462         } else if (r == EMULATION_RESTART)
4463                 goto restart;
4464         else
4465                 r = EMULATE_DONE;
4466
4467         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4468         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4469         kvm_make_request(KVM_REQ_EVENT, vcpu);
4470         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4471         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4472
4473         return r;
4474 }
4475 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4476
4477 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4478 {
4479         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4480         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4481         /* do not return to emulator after return from userspace */
4482         vcpu->arch.pio.count = 0;
4483         return ret;
4484 }
4485 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4486
4487 static void tsc_bad(void *info)
4488 {
4489         __this_cpu_write(cpu_tsc_khz, 0);
4490 }
4491
4492 static void tsc_khz_changed(void *data)
4493 {
4494         struct cpufreq_freqs *freq = data;
4495         unsigned long khz = 0;
4496
4497         if (data)
4498                 khz = freq->new;
4499         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4500                 khz = cpufreq_quick_get(raw_smp_processor_id());
4501         if (!khz)
4502                 khz = tsc_khz;
4503         __this_cpu_write(cpu_tsc_khz, khz);
4504 }
4505
4506 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4507                                      void *data)
4508 {
4509         struct cpufreq_freqs *freq = data;
4510         struct kvm *kvm;
4511         struct kvm_vcpu *vcpu;
4512         int i, send_ipi = 0;
4513
4514         /*
4515          * We allow guests to temporarily run on slowing clocks,
4516          * provided we notify them after, or to run on accelerating
4517          * clocks, provided we notify them before.  Thus time never
4518          * goes backwards.
4519          *
4520          * However, we have a problem.  We can't atomically update
4521          * the frequency of a given CPU from this function; it is
4522          * merely a notifier, which can be called from any CPU.
4523          * Changing the TSC frequency at arbitrary points in time
4524          * requires a recomputation of local variables related to
4525          * the TSC for each VCPU.  We must flag these local variables
4526          * to be updated and be sure the update takes place with the
4527          * new frequency before any guests proceed.
4528          *
4529          * Unfortunately, the combination of hotplug CPU and frequency
4530          * change creates an intractable locking scenario; the order
4531          * of when these callouts happen is undefined with respect to
4532          * CPU hotplug, and they can race with each other.  As such,
4533          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4534          * undefined; you can actually have a CPU frequency change take
4535          * place in between the computation of X and the setting of the
4536          * variable.  To protect against this problem, all updates of
4537          * the per_cpu tsc_khz variable are done in an interrupt
4538          * protected IPI, and all callers wishing to update the value
4539          * must wait for a synchronous IPI to complete (which is trivial
4540          * if the caller is on the CPU already).  This establishes the
4541          * necessary total order on variable updates.
4542          *
4543          * Note that because a guest time update may take place
4544          * anytime after the setting of the VCPU's request bit, the
4545          * correct TSC value must be set before the request.  However,
4546          * to ensure the update actually makes it to any guest which
4547          * starts running in hardware virtualization between the set
4548          * and the acquisition of the spinlock, we must also ping the
4549          * CPU after setting the request bit.
4550          *
4551          */
4552
4553         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4554                 return 0;
4555         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4556                 return 0;
4557
4558         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4559
4560         raw_spin_lock(&kvm_lock);
4561         list_for_each_entry(kvm, &vm_list, vm_list) {
4562                 kvm_for_each_vcpu(i, vcpu, kvm) {
4563                         if (vcpu->cpu != freq->cpu)
4564                                 continue;
4565                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4566                         if (vcpu->cpu != smp_processor_id())
4567                                 send_ipi = 1;
4568                 }
4569         }
4570         raw_spin_unlock(&kvm_lock);
4571
4572         if (freq->old < freq->new && send_ipi) {
4573                 /*
4574                  * We upscale the frequency.  Must make the guest
4575                  * doesn't see old kvmclock values while running with
4576                  * the new frequency, otherwise we risk the guest sees
4577                  * time go backwards.
4578                  *
4579                  * In case we update the frequency for another cpu
4580                  * (which might be in guest context) send an interrupt
4581                  * to kick the cpu out of guest context.  Next time
4582                  * guest context is entered kvmclock will be updated,
4583                  * so the guest will not see stale values.
4584                  */
4585                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4586         }
4587         return 0;
4588 }
4589
4590 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4591         .notifier_call  = kvmclock_cpufreq_notifier
4592 };
4593
4594 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4595                                         unsigned long action, void *hcpu)
4596 {
4597         unsigned int cpu = (unsigned long)hcpu;
4598
4599         switch (action) {
4600                 case CPU_ONLINE:
4601                 case CPU_DOWN_FAILED:
4602                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4603                         break;
4604                 case CPU_DOWN_PREPARE:
4605                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4606                         break;
4607         }
4608         return NOTIFY_OK;
4609 }
4610
4611 static struct notifier_block kvmclock_cpu_notifier_block = {
4612         .notifier_call  = kvmclock_cpu_notifier,
4613         .priority = -INT_MAX
4614 };
4615
4616 static void kvm_timer_init(void)
4617 {
4618         int cpu;
4619
4620         max_tsc_khz = tsc_khz;
4621         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4622         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4623 #ifdef CONFIG_CPU_FREQ
4624                 struct cpufreq_policy policy;
4625                 memset(&policy, 0, sizeof(policy));
4626                 cpu = get_cpu();
4627                 cpufreq_get_policy(&policy, cpu);
4628                 if (policy.cpuinfo.max_freq)
4629                         max_tsc_khz = policy.cpuinfo.max_freq;
4630                 put_cpu();
4631 #endif
4632                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4633                                           CPUFREQ_TRANSITION_NOTIFIER);
4634         }
4635         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4636         for_each_online_cpu(cpu)
4637                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4638 }
4639
4640 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4641
4642 static int kvm_is_in_guest(void)
4643 {
4644         return percpu_read(current_vcpu) != NULL;
4645 }
4646
4647 static int kvm_is_user_mode(void)
4648 {
4649         int user_mode = 3;
4650
4651         if (percpu_read(current_vcpu))
4652                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4653
4654         return user_mode != 0;
4655 }
4656
4657 static unsigned long kvm_get_guest_ip(void)
4658 {
4659         unsigned long ip = 0;
4660
4661         if (percpu_read(current_vcpu))
4662                 ip = kvm_rip_read(percpu_read(current_vcpu));
4663
4664         return ip;
4665 }
4666
4667 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4668         .is_in_guest            = kvm_is_in_guest,
4669         .is_user_mode           = kvm_is_user_mode,
4670         .get_guest_ip           = kvm_get_guest_ip,
4671 };
4672
4673 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4674 {
4675         percpu_write(current_vcpu, vcpu);
4676 }
4677 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4678
4679 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4680 {
4681         percpu_write(current_vcpu, NULL);
4682 }
4683 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4684
4685 int kvm_arch_init(void *opaque)
4686 {
4687         int r;
4688         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4689
4690         if (kvm_x86_ops) {
4691                 printk(KERN_ERR "kvm: already loaded the other module\n");
4692                 r = -EEXIST;
4693                 goto out;
4694         }
4695
4696         if (!ops->cpu_has_kvm_support()) {
4697                 printk(KERN_ERR "kvm: no hardware support\n");
4698                 r = -EOPNOTSUPP;
4699                 goto out;
4700         }
4701         if (ops->disabled_by_bios()) {
4702                 printk(KERN_ERR "kvm: disabled by bios\n");
4703                 r = -EOPNOTSUPP;
4704                 goto out;
4705         }
4706
4707         r = kvm_mmu_module_init();
4708         if (r)
4709                 goto out;
4710
4711         kvm_init_msr_list();
4712
4713         kvm_x86_ops = ops;
4714         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4715         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4716                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4717
4718         kvm_timer_init();
4719
4720         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4721
4722         if (cpu_has_xsave)
4723                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4724
4725         return 0;
4726
4727 out:
4728         return r;
4729 }
4730
4731 void kvm_arch_exit(void)
4732 {
4733         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4734
4735         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4736                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4737                                             CPUFREQ_TRANSITION_NOTIFIER);
4738         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4739         kvm_x86_ops = NULL;
4740         kvm_mmu_module_exit();
4741 }
4742
4743 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4744 {
4745         ++vcpu->stat.halt_exits;
4746         if (irqchip_in_kernel(vcpu->kvm)) {
4747                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4748                 return 1;
4749         } else {
4750                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4751                 return 0;
4752         }
4753 }
4754 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4755
4756 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4757                            unsigned long a1)
4758 {
4759         if (is_long_mode(vcpu))
4760                 return a0;
4761         else
4762                 return a0 | ((gpa_t)a1 << 32);
4763 }
4764
4765 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4766 {
4767         u64 param, ingpa, outgpa, ret;
4768         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4769         bool fast, longmode;
4770         int cs_db, cs_l;
4771
4772         /*
4773          * hypercall generates UD from non zero cpl and real mode
4774          * per HYPER-V spec
4775          */
4776         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4777                 kvm_queue_exception(vcpu, UD_VECTOR);
4778                 return 0;
4779         }
4780
4781         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4782         longmode = is_long_mode(vcpu) && cs_l == 1;
4783
4784         if (!longmode) {
4785                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4786                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4787                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4788                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4789                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4790                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4791         }
4792 #ifdef CONFIG_X86_64
4793         else {
4794                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4795                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4796                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4797         }
4798 #endif
4799
4800         code = param & 0xffff;
4801         fast = (param >> 16) & 0x1;
4802         rep_cnt = (param >> 32) & 0xfff;
4803         rep_idx = (param >> 48) & 0xfff;
4804
4805         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4806
4807         switch (code) {
4808         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4809                 kvm_vcpu_on_spin(vcpu);
4810                 break;
4811         default:
4812                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4813                 break;
4814         }
4815
4816         ret = res | (((u64)rep_done & 0xfff) << 32);
4817         if (longmode) {
4818                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4819         } else {
4820                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4821                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4822         }
4823
4824         return 1;
4825 }
4826
4827 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4828 {
4829         unsigned long nr, a0, a1, a2, a3, ret;
4830         int r = 1;
4831
4832         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4833                 return kvm_hv_hypercall(vcpu);
4834
4835         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4836         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4837         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4838         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4839         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4840
4841         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4842
4843         if (!is_long_mode(vcpu)) {
4844                 nr &= 0xFFFFFFFF;
4845                 a0 &= 0xFFFFFFFF;
4846                 a1 &= 0xFFFFFFFF;
4847                 a2 &= 0xFFFFFFFF;
4848                 a3 &= 0xFFFFFFFF;
4849         }
4850
4851         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4852                 ret = -KVM_EPERM;
4853                 goto out;
4854         }
4855
4856         switch (nr) {
4857         case KVM_HC_VAPIC_POLL_IRQ:
4858                 ret = 0;
4859                 break;
4860         case KVM_HC_MMU_OP:
4861                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4862                 break;
4863         default:
4864                 ret = -KVM_ENOSYS;
4865                 break;
4866         }
4867 out:
4868         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4869         ++vcpu->stat.hypercalls;
4870         return r;
4871 }
4872 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4873
4874 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4875 {
4876         char instruction[3];
4877         unsigned long rip = kvm_rip_read(vcpu);
4878
4879         /*
4880          * Blow out the MMU to ensure that no other VCPU has an active mapping
4881          * to ensure that the updated hypercall appears atomically across all
4882          * VCPUs.
4883          */
4884         kvm_mmu_zap_all(vcpu->kvm);
4885
4886         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4887
4888         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4889 }
4890
4891 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4892 {
4893         struct desc_ptr dt = { limit, base };
4894
4895         kvm_x86_ops->set_gdt(vcpu, &dt);
4896 }
4897
4898 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4899 {
4900         struct desc_ptr dt = { limit, base };
4901
4902         kvm_x86_ops->set_idt(vcpu, &dt);
4903 }
4904
4905 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4906 {
4907         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4908         int j, nent = vcpu->arch.cpuid_nent;
4909
4910         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4911         /* when no next entry is found, the current entry[i] is reselected */
4912         for (j = i + 1; ; j = (j + 1) % nent) {
4913                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4914                 if (ej->function == e->function) {
4915                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4916                         return j;
4917                 }
4918         }
4919         return 0; /* silence gcc, even though control never reaches here */
4920 }
4921
4922 /* find an entry with matching function, matching index (if needed), and that
4923  * should be read next (if it's stateful) */
4924 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4925         u32 function, u32 index)
4926 {
4927         if (e->function != function)
4928                 return 0;
4929         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4930                 return 0;
4931         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4932             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4933                 return 0;
4934         return 1;
4935 }
4936
4937 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4938                                               u32 function, u32 index)
4939 {
4940         int i;
4941         struct kvm_cpuid_entry2 *best = NULL;
4942
4943         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4944                 struct kvm_cpuid_entry2 *e;
4945
4946                 e = &vcpu->arch.cpuid_entries[i];
4947                 if (is_matching_cpuid_entry(e, function, index)) {
4948                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4949                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4950                         best = e;
4951                         break;
4952                 }
4953                 /*
4954                  * Both basic or both extended?
4955                  */
4956                 if (((e->function ^ function) & 0x80000000) == 0)
4957                         if (!best || e->function > best->function)
4958                                 best = e;
4959         }
4960         return best;
4961 }
4962 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4963
4964 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4965 {
4966         struct kvm_cpuid_entry2 *best;
4967
4968         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4969         if (!best || best->eax < 0x80000008)
4970                 goto not_found;
4971         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4972         if (best)
4973                 return best->eax & 0xff;
4974 not_found:
4975         return 36;
4976 }
4977
4978 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4979 {
4980         u32 function, index;
4981         struct kvm_cpuid_entry2 *best;
4982
4983         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4984         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4985         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4986         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4987         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4988         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4989         best = kvm_find_cpuid_entry(vcpu, function, index);
4990         if (best) {
4991                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4992                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4993                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4994                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4995         }
4996         kvm_x86_ops->skip_emulated_instruction(vcpu);
4997         trace_kvm_cpuid(function,
4998                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4999                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5000                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5001                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5002 }
5003 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5004
5005 /*
5006  * Check if userspace requested an interrupt window, and that the
5007  * interrupt window is open.
5008  *
5009  * No need to exit to userspace if we already have an interrupt queued.
5010  */
5011 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5012 {
5013         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5014                 vcpu->run->request_interrupt_window &&
5015                 kvm_arch_interrupt_allowed(vcpu));
5016 }
5017
5018 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5019 {
5020         struct kvm_run *kvm_run = vcpu->run;
5021
5022         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5023         kvm_run->cr8 = kvm_get_cr8(vcpu);
5024         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5025         if (irqchip_in_kernel(vcpu->kvm))
5026                 kvm_run->ready_for_interrupt_injection = 1;
5027         else
5028                 kvm_run->ready_for_interrupt_injection =
5029                         kvm_arch_interrupt_allowed(vcpu) &&
5030                         !kvm_cpu_has_interrupt(vcpu) &&
5031                         !kvm_event_needs_reinjection(vcpu);
5032 }
5033
5034 static void vapic_enter(struct kvm_vcpu *vcpu)
5035 {
5036         struct kvm_lapic *apic = vcpu->arch.apic;
5037         struct page *page;
5038
5039         if (!apic || !apic->vapic_addr)
5040                 return;
5041
5042         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5043
5044         vcpu->arch.apic->vapic_page = page;
5045 }
5046
5047 static void vapic_exit(struct kvm_vcpu *vcpu)
5048 {
5049         struct kvm_lapic *apic = vcpu->arch.apic;
5050         int idx;
5051
5052         if (!apic || !apic->vapic_addr)
5053                 return;
5054
5055         idx = srcu_read_lock(&vcpu->kvm->srcu);
5056         kvm_release_page_dirty(apic->vapic_page);
5057         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5058         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5059 }
5060
5061 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5062 {
5063         int max_irr, tpr;
5064
5065         if (!kvm_x86_ops->update_cr8_intercept)
5066                 return;
5067
5068         if (!vcpu->arch.apic)
5069                 return;
5070
5071         if (!vcpu->arch.apic->vapic_addr)
5072                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5073         else
5074                 max_irr = -1;
5075
5076         if (max_irr != -1)
5077                 max_irr >>= 4;
5078
5079         tpr = kvm_lapic_get_cr8(vcpu);
5080
5081         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5082 }
5083
5084 static void inject_pending_event(struct kvm_vcpu *vcpu)
5085 {
5086         /* try to reinject previous events if any */
5087         if (vcpu->arch.exception.pending) {
5088                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5089                                         vcpu->arch.exception.has_error_code,
5090                                         vcpu->arch.exception.error_code);
5091                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5092                                           vcpu->arch.exception.has_error_code,
5093                                           vcpu->arch.exception.error_code,
5094                                           vcpu->arch.exception.reinject);
5095                 return;
5096         }
5097
5098         if (vcpu->arch.nmi_injected) {
5099                 kvm_x86_ops->set_nmi(vcpu);
5100                 return;
5101         }
5102
5103         if (vcpu->arch.interrupt.pending) {
5104                 kvm_x86_ops->set_irq(vcpu);
5105                 return;
5106         }
5107
5108         /* try to inject new event if pending */
5109         if (vcpu->arch.nmi_pending) {
5110                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5111                         vcpu->arch.nmi_pending = false;
5112                         vcpu->arch.nmi_injected = true;
5113                         kvm_x86_ops->set_nmi(vcpu);
5114                 }
5115         } else if (kvm_cpu_has_interrupt(vcpu)) {
5116                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5117                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5118                                             false);
5119                         kvm_x86_ops->set_irq(vcpu);
5120                 }
5121         }
5122 }
5123
5124 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5125 {
5126         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5127                         !vcpu->guest_xcr0_loaded) {
5128                 /* kvm_set_xcr() also depends on this */
5129                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5130                 vcpu->guest_xcr0_loaded = 1;
5131         }
5132 }
5133
5134 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5135 {
5136         if (vcpu->guest_xcr0_loaded) {
5137                 if (vcpu->arch.xcr0 != host_xcr0)
5138                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5139                 vcpu->guest_xcr0_loaded = 0;
5140         }
5141 }
5142
5143 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5144 {
5145         int r;
5146         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5147                 vcpu->run->request_interrupt_window;
5148
5149         if (vcpu->requests) {
5150                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5151                         kvm_mmu_unload(vcpu);
5152                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5153                         __kvm_migrate_timers(vcpu);
5154                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5155                         r = kvm_guest_time_update(vcpu);
5156                         if (unlikely(r))
5157                                 goto out;
5158                 }
5159                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5160                         kvm_mmu_sync_roots(vcpu);
5161                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5162                         kvm_x86_ops->tlb_flush(vcpu);
5163                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5164                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5165                         r = 0;
5166                         goto out;
5167                 }
5168                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5169                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5170                         r = 0;
5171                         goto out;
5172                 }
5173                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5174                         vcpu->fpu_active = 0;
5175                         kvm_x86_ops->fpu_deactivate(vcpu);
5176                 }
5177                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5178                         /* Page is swapped out. Do synthetic halt */
5179                         vcpu->arch.apf.halted = true;
5180                         r = 1;
5181                         goto out;
5182                 }
5183                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5184                         vcpu->arch.nmi_pending = true;
5185         }
5186
5187         r = kvm_mmu_reload(vcpu);
5188         if (unlikely(r))
5189                 goto out;
5190
5191         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5192                 inject_pending_event(vcpu);
5193
5194                 /* enable NMI/IRQ window open exits if needed */
5195                 if (vcpu->arch.nmi_pending)
5196                         kvm_x86_ops->enable_nmi_window(vcpu);
5197                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5198                         kvm_x86_ops->enable_irq_window(vcpu);
5199
5200                 if (kvm_lapic_enabled(vcpu)) {
5201                         update_cr8_intercept(vcpu);
5202                         kvm_lapic_sync_to_vapic(vcpu);
5203                 }
5204         }
5205
5206         preempt_disable();
5207
5208         kvm_x86_ops->prepare_guest_switch(vcpu);
5209         if (vcpu->fpu_active)
5210                 kvm_load_guest_fpu(vcpu);
5211         kvm_load_guest_xcr0(vcpu);
5212
5213         vcpu->mode = IN_GUEST_MODE;
5214
5215         /* We should set ->mode before check ->requests,
5216          * see the comment in make_all_cpus_request.
5217          */
5218         smp_mb();
5219
5220         local_irq_disable();
5221
5222         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5223             || need_resched() || signal_pending(current)) {
5224                 vcpu->mode = OUTSIDE_GUEST_MODE;
5225                 smp_wmb();
5226                 local_irq_enable();
5227                 preempt_enable();
5228                 kvm_x86_ops->cancel_injection(vcpu);
5229                 r = 1;
5230                 goto out;
5231         }
5232
5233         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5234
5235         kvm_guest_enter();
5236
5237         if (unlikely(vcpu->arch.switch_db_regs)) {
5238                 set_debugreg(0, 7);
5239                 set_debugreg(vcpu->arch.eff_db[0], 0);
5240                 set_debugreg(vcpu->arch.eff_db[1], 1);
5241                 set_debugreg(vcpu->arch.eff_db[2], 2);
5242                 set_debugreg(vcpu->arch.eff_db[3], 3);
5243         }
5244
5245         trace_kvm_entry(vcpu->vcpu_id);
5246         kvm_x86_ops->run(vcpu);
5247
5248         /*
5249          * If the guest has used debug registers, at least dr7
5250          * will be disabled while returning to the host.
5251          * If we don't have active breakpoints in the host, we don't
5252          * care about the messed up debug address registers. But if
5253          * we have some of them active, restore the old state.
5254          */
5255         if (hw_breakpoint_active())
5256                 hw_breakpoint_restore();
5257
5258         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5259
5260         vcpu->mode = OUTSIDE_GUEST_MODE;
5261         smp_wmb();
5262         local_irq_enable();
5263
5264         ++vcpu->stat.exits;
5265
5266         /*
5267          * We must have an instruction between local_irq_enable() and
5268          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5269          * the interrupt shadow.  The stat.exits increment will do nicely.
5270          * But we need to prevent reordering, hence this barrier():
5271          */
5272         barrier();
5273
5274         kvm_guest_exit();
5275
5276         preempt_enable();
5277
5278         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5279
5280         /*
5281          * Profile KVM exit RIPs:
5282          */
5283         if (unlikely(prof_on == KVM_PROFILING)) {
5284                 unsigned long rip = kvm_rip_read(vcpu);
5285                 profile_hit(KVM_PROFILING, (void *)rip);
5286         }
5287
5288
5289         kvm_lapic_sync_from_vapic(vcpu);
5290
5291         r = kvm_x86_ops->handle_exit(vcpu);
5292 out:
5293         return r;
5294 }
5295
5296
5297 static int __vcpu_run(struct kvm_vcpu *vcpu)
5298 {
5299         int r;
5300         struct kvm *kvm = vcpu->kvm;
5301
5302         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5303                 pr_debug("vcpu %d received sipi with vector # %x\n",
5304                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5305                 kvm_lapic_reset(vcpu);
5306                 r = kvm_arch_vcpu_reset(vcpu);
5307                 if (r)
5308                         return r;
5309                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5310         }
5311
5312         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5313         vapic_enter(vcpu);
5314
5315         r = 1;
5316         while (r > 0) {
5317                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5318                     !vcpu->arch.apf.halted)
5319                         r = vcpu_enter_guest(vcpu);
5320                 else {
5321                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5322                         kvm_vcpu_block(vcpu);
5323                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5324                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5325                         {
5326                                 switch(vcpu->arch.mp_state) {
5327                                 case KVM_MP_STATE_HALTED:
5328                                         vcpu->arch.mp_state =
5329                                                 KVM_MP_STATE_RUNNABLE;
5330                                 case KVM_MP_STATE_RUNNABLE:
5331                                         vcpu->arch.apf.halted = false;
5332                                         break;
5333                                 case KVM_MP_STATE_SIPI_RECEIVED:
5334                                 default:
5335                                         r = -EINTR;
5336                                         break;
5337                                 }
5338                         }
5339                 }
5340
5341                 if (r <= 0)
5342                         break;
5343
5344                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5345                 if (kvm_cpu_has_pending_timer(vcpu))
5346                         kvm_inject_pending_timer_irqs(vcpu);
5347
5348                 if (dm_request_for_irq_injection(vcpu)) {
5349                         r = -EINTR;
5350                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5351                         ++vcpu->stat.request_irq_exits;
5352                 }
5353
5354                 kvm_check_async_pf_completion(vcpu);
5355
5356                 if (signal_pending(current)) {
5357                         r = -EINTR;
5358                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5359                         ++vcpu->stat.signal_exits;
5360                 }
5361                 if (need_resched()) {
5362                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5363                         kvm_resched(vcpu);
5364                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5365                 }
5366         }
5367
5368         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5369
5370         vapic_exit(vcpu);
5371
5372         return r;
5373 }
5374
5375 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5376 {
5377         int r;
5378         sigset_t sigsaved;
5379
5380         if (!tsk_used_math(current) && init_fpu(current))
5381                 return -ENOMEM;
5382
5383         if (vcpu->sigset_active)
5384                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5385
5386         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5387                 kvm_vcpu_block(vcpu);
5388                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5389                 r = -EAGAIN;
5390                 goto out;
5391         }
5392
5393         /* re-sync apic's tpr */
5394         if (!irqchip_in_kernel(vcpu->kvm)) {
5395                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5396                         r = -EINVAL;
5397                         goto out;
5398                 }
5399         }
5400
5401         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5402                 if (vcpu->mmio_needed) {
5403                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5404                         vcpu->mmio_read_completed = 1;
5405                         vcpu->mmio_needed = 0;
5406                 }
5407                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5408                 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5409                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5410                 if (r != EMULATE_DONE) {
5411                         r = 0;
5412                         goto out;
5413                 }
5414         }
5415         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5416                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5417                                      kvm_run->hypercall.ret);
5418
5419         r = __vcpu_run(vcpu);
5420
5421 out:
5422         post_kvm_run_save(vcpu);
5423         if (vcpu->sigset_active)
5424                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5425
5426         return r;
5427 }
5428
5429 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5430 {
5431         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5432         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5433         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5434         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5435         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5436         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5437         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5438         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5439 #ifdef CONFIG_X86_64
5440         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5441         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5442         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5443         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5444         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5445         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5446         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5447         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5448 #endif
5449
5450         regs->rip = kvm_rip_read(vcpu);
5451         regs->rflags = kvm_get_rflags(vcpu);
5452
5453         return 0;
5454 }
5455
5456 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5457 {
5458         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5459         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5460         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5461         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5462         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5463         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5464         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5465         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5466 #ifdef CONFIG_X86_64
5467         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5468         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5469         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5470         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5471         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5472         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5473         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5474         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5475 #endif
5476
5477         kvm_rip_write(vcpu, regs->rip);
5478         kvm_set_rflags(vcpu, regs->rflags);
5479
5480         vcpu->arch.exception.pending = false;
5481
5482         kvm_make_request(KVM_REQ_EVENT, vcpu);
5483
5484         return 0;
5485 }
5486
5487 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5488 {
5489         struct kvm_segment cs;
5490
5491         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5492         *db = cs.db;
5493         *l = cs.l;
5494 }
5495 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5496
5497 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5498                                   struct kvm_sregs *sregs)
5499 {
5500         struct desc_ptr dt;
5501
5502         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5503         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5504         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5505         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5506         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5507         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5508
5509         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5510         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5511
5512         kvm_x86_ops->get_idt(vcpu, &dt);
5513         sregs->idt.limit = dt.size;
5514         sregs->idt.base = dt.address;
5515         kvm_x86_ops->get_gdt(vcpu, &dt);
5516         sregs->gdt.limit = dt.size;
5517         sregs->gdt.base = dt.address;
5518
5519         sregs->cr0 = kvm_read_cr0(vcpu);
5520         sregs->cr2 = vcpu->arch.cr2;
5521         sregs->cr3 = kvm_read_cr3(vcpu);
5522         sregs->cr4 = kvm_read_cr4(vcpu);
5523         sregs->cr8 = kvm_get_cr8(vcpu);
5524         sregs->efer = vcpu->arch.efer;
5525         sregs->apic_base = kvm_get_apic_base(vcpu);
5526
5527         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5528
5529         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5530                 set_bit(vcpu->arch.interrupt.nr,
5531                         (unsigned long *)sregs->interrupt_bitmap);
5532
5533         return 0;
5534 }
5535
5536 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5537                                     struct kvm_mp_state *mp_state)
5538 {
5539         mp_state->mp_state = vcpu->arch.mp_state;
5540         return 0;
5541 }
5542
5543 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5544                                     struct kvm_mp_state *mp_state)
5545 {
5546         vcpu->arch.mp_state = mp_state->mp_state;
5547         kvm_make_request(KVM_REQ_EVENT, vcpu);
5548         return 0;
5549 }
5550
5551 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5552                     bool has_error_code, u32 error_code)
5553 {
5554         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5555         int ret;
5556
5557         init_emulate_ctxt(vcpu);
5558
5559         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5560                                    tss_selector, reason, has_error_code,
5561                                    error_code);
5562
5563         if (ret)
5564                 return EMULATE_FAIL;
5565
5566         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5567         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5568         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5569         kvm_make_request(KVM_REQ_EVENT, vcpu);
5570         return EMULATE_DONE;
5571 }
5572 EXPORT_SYMBOL_GPL(kvm_task_switch);
5573
5574 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5575                                   struct kvm_sregs *sregs)
5576 {
5577         int mmu_reset_needed = 0;
5578         int pending_vec, max_bits, idx;
5579         struct desc_ptr dt;
5580
5581         dt.size = sregs->idt.limit;
5582         dt.address = sregs->idt.base;
5583         kvm_x86_ops->set_idt(vcpu, &dt);
5584         dt.size = sregs->gdt.limit;
5585         dt.address = sregs->gdt.base;
5586         kvm_x86_ops->set_gdt(vcpu, &dt);
5587
5588         vcpu->arch.cr2 = sregs->cr2;
5589         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5590         vcpu->arch.cr3 = sregs->cr3;
5591         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5592
5593         kvm_set_cr8(vcpu, sregs->cr8);
5594
5595         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5596         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5597         kvm_set_apic_base(vcpu, sregs->apic_base);
5598
5599         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5600         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5601         vcpu->arch.cr0 = sregs->cr0;
5602
5603         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5604         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5605         if (sregs->cr4 & X86_CR4_OSXSAVE)
5606                 update_cpuid(vcpu);
5607
5608         idx = srcu_read_lock(&vcpu->kvm->srcu);
5609         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5610                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5611                 mmu_reset_needed = 1;
5612         }
5613         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5614
5615         if (mmu_reset_needed)
5616                 kvm_mmu_reset_context(vcpu);
5617
5618         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5619         pending_vec = find_first_bit(
5620                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5621         if (pending_vec < max_bits) {
5622                 kvm_queue_interrupt(vcpu, pending_vec, false);
5623                 pr_debug("Set back pending irq %d\n", pending_vec);
5624         }
5625
5626         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5627         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5628         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5629         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5630         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5631         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5632
5633         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5634         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5635
5636         update_cr8_intercept(vcpu);
5637
5638         /* Older userspace won't unhalt the vcpu on reset. */
5639         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5640             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5641             !is_protmode(vcpu))
5642                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5643
5644         kvm_make_request(KVM_REQ_EVENT, vcpu);
5645
5646         return 0;
5647 }
5648
5649 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5650                                         struct kvm_guest_debug *dbg)
5651 {
5652         unsigned long rflags;
5653         int i, r;
5654
5655         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5656                 r = -EBUSY;
5657                 if (vcpu->arch.exception.pending)
5658                         goto out;
5659                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5660                         kvm_queue_exception(vcpu, DB_VECTOR);
5661                 else
5662                         kvm_queue_exception(vcpu, BP_VECTOR);
5663         }
5664
5665         /*
5666          * Read rflags as long as potentially injected trace flags are still
5667          * filtered out.
5668          */
5669         rflags = kvm_get_rflags(vcpu);
5670
5671         vcpu->guest_debug = dbg->control;
5672         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5673                 vcpu->guest_debug = 0;
5674
5675         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5676                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5677                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5678                 vcpu->arch.switch_db_regs =
5679                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5680         } else {
5681                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5682                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5683                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5684         }
5685
5686         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5687                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5688                         get_segment_base(vcpu, VCPU_SREG_CS);
5689
5690         /*
5691          * Trigger an rflags update that will inject or remove the trace
5692          * flags.
5693          */
5694         kvm_set_rflags(vcpu, rflags);
5695
5696         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5697
5698         r = 0;
5699
5700 out:
5701
5702         return r;
5703 }
5704
5705 /*
5706  * Translate a guest virtual address to a guest physical address.
5707  */
5708 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5709                                     struct kvm_translation *tr)
5710 {
5711         unsigned long vaddr = tr->linear_address;
5712         gpa_t gpa;
5713         int idx;
5714
5715         idx = srcu_read_lock(&vcpu->kvm->srcu);
5716         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5717         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5718         tr->physical_address = gpa;
5719         tr->valid = gpa != UNMAPPED_GVA;
5720         tr->writeable = 1;
5721         tr->usermode = 0;
5722
5723         return 0;
5724 }
5725
5726 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5727 {
5728         struct i387_fxsave_struct *fxsave =
5729                         &vcpu->arch.guest_fpu.state->fxsave;
5730
5731         memcpy(fpu->fpr, fxsave->st_space, 128);
5732         fpu->fcw = fxsave->cwd;
5733         fpu->fsw = fxsave->swd;
5734         fpu->ftwx = fxsave->twd;
5735         fpu->last_opcode = fxsave->fop;
5736         fpu->last_ip = fxsave->rip;
5737         fpu->last_dp = fxsave->rdp;
5738         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5739
5740         return 0;
5741 }
5742
5743 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5744 {
5745         struct i387_fxsave_struct *fxsave =
5746                         &vcpu->arch.guest_fpu.state->fxsave;
5747
5748         memcpy(fxsave->st_space, fpu->fpr, 128);
5749         fxsave->cwd = fpu->fcw;
5750         fxsave->swd = fpu->fsw;
5751         fxsave->twd = fpu->ftwx;
5752         fxsave->fop = fpu->last_opcode;
5753         fxsave->rip = fpu->last_ip;
5754         fxsave->rdp = fpu->last_dp;
5755         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5756
5757         return 0;
5758 }
5759
5760 int fx_init(struct kvm_vcpu *vcpu)
5761 {
5762         int err;
5763
5764         err = fpu_alloc(&vcpu->arch.guest_fpu);
5765         if (err)
5766                 return err;
5767
5768         fpu_finit(&vcpu->arch.guest_fpu);
5769
5770         /*
5771          * Ensure guest xcr0 is valid for loading
5772          */
5773         vcpu->arch.xcr0 = XSTATE_FP;
5774
5775         vcpu->arch.cr0 |= X86_CR0_ET;
5776
5777         return 0;
5778 }
5779 EXPORT_SYMBOL_GPL(fx_init);
5780
5781 static void fx_free(struct kvm_vcpu *vcpu)
5782 {
5783         fpu_free(&vcpu->arch.guest_fpu);
5784 }
5785
5786 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5787 {
5788         if (vcpu->guest_fpu_loaded)
5789                 return;
5790
5791         /*
5792          * Restore all possible states in the guest,
5793          * and assume host would use all available bits.
5794          * Guest xcr0 would be loaded later.
5795          */
5796         kvm_put_guest_xcr0(vcpu);
5797         vcpu->guest_fpu_loaded = 1;
5798         unlazy_fpu(current);
5799         fpu_restore_checking(&vcpu->arch.guest_fpu);
5800         trace_kvm_fpu(1);
5801 }
5802
5803 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5804 {
5805         kvm_put_guest_xcr0(vcpu);
5806
5807         if (!vcpu->guest_fpu_loaded)
5808                 return;
5809
5810         vcpu->guest_fpu_loaded = 0;
5811         fpu_save_init(&vcpu->arch.guest_fpu);
5812         ++vcpu->stat.fpu_reload;
5813         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5814         trace_kvm_fpu(0);
5815 }
5816
5817 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5818 {
5819         kvmclock_reset(vcpu);
5820
5821         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5822         fx_free(vcpu);
5823         kvm_x86_ops->vcpu_free(vcpu);
5824 }
5825
5826 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5827                                                 unsigned int id)
5828 {
5829         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5830                 printk_once(KERN_WARNING
5831                 "kvm: SMP vm created on host with unstable TSC; "
5832                 "guest TSC will not be reliable\n");
5833         return kvm_x86_ops->vcpu_create(kvm, id);
5834 }
5835
5836 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5837 {
5838         int r;
5839
5840         vcpu->arch.mtrr_state.have_fixed = 1;
5841         vcpu_load(vcpu);
5842         r = kvm_arch_vcpu_reset(vcpu);
5843         if (r == 0)
5844                 r = kvm_mmu_setup(vcpu);
5845         vcpu_put(vcpu);
5846         if (r < 0)
5847                 goto free_vcpu;
5848
5849         return 0;
5850 free_vcpu:
5851         kvm_x86_ops->vcpu_free(vcpu);
5852         return r;
5853 }
5854
5855 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5856 {
5857         vcpu->arch.apf.msr_val = 0;
5858
5859         vcpu_load(vcpu);
5860         kvm_mmu_unload(vcpu);
5861         vcpu_put(vcpu);
5862
5863         fx_free(vcpu);
5864         kvm_x86_ops->vcpu_free(vcpu);
5865 }
5866
5867 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5868 {
5869         vcpu->arch.nmi_pending = false;
5870         vcpu->arch.nmi_injected = false;
5871
5872         vcpu->arch.switch_db_regs = 0;
5873         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5874         vcpu->arch.dr6 = DR6_FIXED_1;
5875         vcpu->arch.dr7 = DR7_FIXED_1;
5876
5877         kvm_make_request(KVM_REQ_EVENT, vcpu);
5878         vcpu->arch.apf.msr_val = 0;
5879
5880         kvmclock_reset(vcpu);
5881
5882         kvm_clear_async_pf_completion_queue(vcpu);
5883         kvm_async_pf_hash_reset(vcpu);
5884         vcpu->arch.apf.halted = false;
5885
5886         return kvm_x86_ops->vcpu_reset(vcpu);
5887 }
5888
5889 int kvm_arch_hardware_enable(void *garbage)
5890 {
5891         struct kvm *kvm;
5892         struct kvm_vcpu *vcpu;
5893         int i;
5894
5895         kvm_shared_msr_cpu_online();
5896         list_for_each_entry(kvm, &vm_list, vm_list)
5897                 kvm_for_each_vcpu(i, vcpu, kvm)
5898                         if (vcpu->cpu == smp_processor_id())
5899                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5900         return kvm_x86_ops->hardware_enable(garbage);
5901 }
5902
5903 void kvm_arch_hardware_disable(void *garbage)
5904 {
5905         kvm_x86_ops->hardware_disable(garbage);
5906         drop_user_return_notifiers(garbage);
5907 }
5908
5909 int kvm_arch_hardware_setup(void)
5910 {
5911         return kvm_x86_ops->hardware_setup();
5912 }
5913
5914 void kvm_arch_hardware_unsetup(void)
5915 {
5916         kvm_x86_ops->hardware_unsetup();
5917 }
5918
5919 void kvm_arch_check_processor_compat(void *rtn)
5920 {
5921         kvm_x86_ops->check_processor_compatibility(rtn);
5922 }
5923
5924 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5925 {
5926         struct page *page;
5927         struct kvm *kvm;
5928         int r;
5929
5930         BUG_ON(vcpu->kvm == NULL);
5931         kvm = vcpu->kvm;
5932
5933         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5934         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5935         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5936         vcpu->arch.mmu.translate_gpa = translate_gpa;
5937         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5938         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5939                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5940         else
5941                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5942
5943         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5944         if (!page) {
5945                 r = -ENOMEM;
5946                 goto fail;
5947         }
5948         vcpu->arch.pio_data = page_address(page);
5949
5950         if (!kvm->arch.virtual_tsc_khz)
5951                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5952
5953         r = kvm_mmu_create(vcpu);
5954         if (r < 0)
5955                 goto fail_free_pio_data;
5956
5957         if (irqchip_in_kernel(kvm)) {
5958                 r = kvm_create_lapic(vcpu);
5959                 if (r < 0)
5960                         goto fail_mmu_destroy;
5961         }
5962
5963         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5964                                        GFP_KERNEL);
5965         if (!vcpu->arch.mce_banks) {
5966                 r = -ENOMEM;
5967                 goto fail_free_lapic;
5968         }
5969         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5970
5971         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5972                 goto fail_free_mce_banks;
5973
5974         kvm_async_pf_hash_reset(vcpu);
5975
5976         return 0;
5977 fail_free_mce_banks:
5978         kfree(vcpu->arch.mce_banks);
5979 fail_free_lapic:
5980         kvm_free_lapic(vcpu);
5981 fail_mmu_destroy:
5982         kvm_mmu_destroy(vcpu);
5983 fail_free_pio_data:
5984         free_page((unsigned long)vcpu->arch.pio_data);
5985 fail:
5986         return r;
5987 }
5988
5989 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5990 {
5991         int idx;
5992
5993         kfree(vcpu->arch.mce_banks);
5994         kvm_free_lapic(vcpu);
5995         idx = srcu_read_lock(&vcpu->kvm->srcu);
5996         kvm_mmu_destroy(vcpu);
5997         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5998         free_page((unsigned long)vcpu->arch.pio_data);
5999 }
6000
6001 int kvm_arch_init_vm(struct kvm *kvm)
6002 {
6003         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6004         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6005
6006         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6007         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6008
6009         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6010
6011         return 0;
6012 }
6013
6014 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6015 {
6016         vcpu_load(vcpu);
6017         kvm_mmu_unload(vcpu);
6018         vcpu_put(vcpu);
6019 }
6020
6021 static void kvm_free_vcpus(struct kvm *kvm)
6022 {
6023         unsigned int i;
6024         struct kvm_vcpu *vcpu;
6025
6026         /*
6027          * Unpin any mmu pages first.
6028          */
6029         kvm_for_each_vcpu(i, vcpu, kvm) {
6030                 kvm_clear_async_pf_completion_queue(vcpu);
6031                 kvm_unload_vcpu_mmu(vcpu);
6032         }
6033         kvm_for_each_vcpu(i, vcpu, kvm)
6034                 kvm_arch_vcpu_free(vcpu);
6035
6036         mutex_lock(&kvm->lock);
6037         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6038                 kvm->vcpus[i] = NULL;
6039
6040         atomic_set(&kvm->online_vcpus, 0);
6041         mutex_unlock(&kvm->lock);
6042 }
6043
6044 void kvm_arch_sync_events(struct kvm *kvm)
6045 {
6046         kvm_free_all_assigned_devices(kvm);
6047         kvm_free_pit(kvm);
6048 }
6049
6050 void kvm_arch_destroy_vm(struct kvm *kvm)
6051 {
6052         kvm_iommu_unmap_guest(kvm);
6053         kfree(kvm->arch.vpic);
6054         kfree(kvm->arch.vioapic);
6055         kvm_free_vcpus(kvm);
6056         if (kvm->arch.apic_access_page)
6057                 put_page(kvm->arch.apic_access_page);
6058         if (kvm->arch.ept_identity_pagetable)
6059                 put_page(kvm->arch.ept_identity_pagetable);
6060 }
6061
6062 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6063                                 struct kvm_memory_slot *memslot,
6064                                 struct kvm_memory_slot old,
6065                                 struct kvm_userspace_memory_region *mem,
6066                                 int user_alloc)
6067 {
6068         int npages = memslot->npages;
6069         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6070
6071         /* Prevent internal slot pages from being moved by fork()/COW. */
6072         if (memslot->id >= KVM_MEMORY_SLOTS)
6073                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6074
6075         /*To keep backward compatibility with older userspace,
6076          *x86 needs to hanlde !user_alloc case.
6077          */
6078         if (!user_alloc) {
6079                 if (npages && !old.rmap) {
6080                         unsigned long userspace_addr;
6081
6082                         down_write(&current->mm->mmap_sem);
6083                         userspace_addr = do_mmap(NULL, 0,
6084                                                  npages * PAGE_SIZE,
6085                                                  PROT_READ | PROT_WRITE,
6086                                                  map_flags,
6087                                                  0);
6088                         up_write(&current->mm->mmap_sem);
6089
6090                         if (IS_ERR((void *)userspace_addr))
6091                                 return PTR_ERR((void *)userspace_addr);
6092
6093                         memslot->userspace_addr = userspace_addr;
6094                 }
6095         }
6096
6097
6098         return 0;
6099 }
6100
6101 void kvm_arch_commit_memory_region(struct kvm *kvm,
6102                                 struct kvm_userspace_memory_region *mem,
6103                                 struct kvm_memory_slot old,
6104                                 int user_alloc)
6105 {
6106
6107         int npages = mem->memory_size >> PAGE_SHIFT;
6108
6109         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6110                 int ret;
6111
6112                 down_write(&current->mm->mmap_sem);
6113                 ret = do_munmap(current->mm, old.userspace_addr,
6114                                 old.npages * PAGE_SIZE);
6115                 up_write(&current->mm->mmap_sem);
6116                 if (ret < 0)
6117                         printk(KERN_WARNING
6118                                "kvm_vm_ioctl_set_memory_region: "
6119                                "failed to munmap memory\n");
6120         }
6121
6122         spin_lock(&kvm->mmu_lock);
6123         if (!kvm->arch.n_requested_mmu_pages) {
6124                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6125                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6126         }
6127
6128         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6129         spin_unlock(&kvm->mmu_lock);
6130 }
6131
6132 void kvm_arch_flush_shadow(struct kvm *kvm)
6133 {
6134         kvm_mmu_zap_all(kvm);
6135         kvm_reload_remote_mmus(kvm);
6136 }
6137
6138 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6139 {
6140         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6141                 !vcpu->arch.apf.halted)
6142                 || !list_empty_careful(&vcpu->async_pf.done)
6143                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6144                 || vcpu->arch.nmi_pending ||
6145                 (kvm_arch_interrupt_allowed(vcpu) &&
6146                  kvm_cpu_has_interrupt(vcpu));
6147 }
6148
6149 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6150 {
6151         int me;
6152         int cpu = vcpu->cpu;
6153
6154         if (waitqueue_active(&vcpu->wq)) {
6155                 wake_up_interruptible(&vcpu->wq);
6156                 ++vcpu->stat.halt_wakeup;
6157         }
6158
6159         me = get_cpu();
6160         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6161                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6162                         smp_send_reschedule(cpu);
6163         put_cpu();
6164 }
6165
6166 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6167 {
6168         return kvm_x86_ops->interrupt_allowed(vcpu);
6169 }
6170
6171 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6172 {
6173         unsigned long current_rip = kvm_rip_read(vcpu) +
6174                 get_segment_base(vcpu, VCPU_SREG_CS);
6175
6176         return current_rip == linear_rip;
6177 }
6178 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6179
6180 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6181 {
6182         unsigned long rflags;
6183
6184         rflags = kvm_x86_ops->get_rflags(vcpu);
6185         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6186                 rflags &= ~X86_EFLAGS_TF;
6187         return rflags;
6188 }
6189 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6190
6191 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6192 {
6193         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6194             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6195                 rflags |= X86_EFLAGS_TF;
6196         kvm_x86_ops->set_rflags(vcpu, rflags);
6197         kvm_make_request(KVM_REQ_EVENT, vcpu);
6198 }
6199 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6200
6201 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6202 {
6203         int r;
6204
6205         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6206               is_error_page(work->page))
6207                 return;
6208
6209         r = kvm_mmu_reload(vcpu);
6210         if (unlikely(r))
6211                 return;
6212
6213         if (!vcpu->arch.mmu.direct_map &&
6214               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6215                 return;
6216
6217         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6218 }
6219
6220 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6221 {
6222         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6223 }
6224
6225 static inline u32 kvm_async_pf_next_probe(u32 key)
6226 {
6227         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6228 }
6229
6230 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6231 {
6232         u32 key = kvm_async_pf_hash_fn(gfn);
6233
6234         while (vcpu->arch.apf.gfns[key] != ~0)
6235                 key = kvm_async_pf_next_probe(key);
6236
6237         vcpu->arch.apf.gfns[key] = gfn;
6238 }
6239
6240 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6241 {
6242         int i;
6243         u32 key = kvm_async_pf_hash_fn(gfn);
6244
6245         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6246                      (vcpu->arch.apf.gfns[key] != gfn &&
6247                       vcpu->arch.apf.gfns[key] != ~0); i++)
6248                 key = kvm_async_pf_next_probe(key);
6249
6250         return key;
6251 }
6252
6253 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6254 {
6255         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6256 }
6257
6258 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6259 {
6260         u32 i, j, k;
6261
6262         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6263         while (true) {
6264                 vcpu->arch.apf.gfns[i] = ~0;
6265                 do {
6266                         j = kvm_async_pf_next_probe(j);
6267                         if (vcpu->arch.apf.gfns[j] == ~0)
6268                                 return;
6269                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6270                         /*
6271                          * k lies cyclically in ]i,j]
6272                          * |    i.k.j |
6273                          * |....j i.k.| or  |.k..j i...|
6274                          */
6275                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6276                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6277                 i = j;
6278         }
6279 }
6280
6281 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6282 {
6283
6284         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6285                                       sizeof(val));
6286 }
6287
6288 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6289                                      struct kvm_async_pf *work)
6290 {
6291         struct x86_exception fault;
6292
6293         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6294         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6295
6296         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6297             (vcpu->arch.apf.send_user_only &&
6298              kvm_x86_ops->get_cpl(vcpu) == 0))
6299                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6300         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6301                 fault.vector = PF_VECTOR;
6302                 fault.error_code_valid = true;
6303                 fault.error_code = 0;
6304                 fault.nested_page_fault = false;
6305                 fault.address = work->arch.token;
6306                 kvm_inject_page_fault(vcpu, &fault);
6307         }
6308 }
6309
6310 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6311                                  struct kvm_async_pf *work)
6312 {
6313         struct x86_exception fault;
6314
6315         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6316         if (is_error_page(work->page))
6317                 work->arch.token = ~0; /* broadcast wakeup */
6318         else
6319                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6320
6321         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6322             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6323                 fault.vector = PF_VECTOR;
6324                 fault.error_code_valid = true;
6325                 fault.error_code = 0;
6326                 fault.nested_page_fault = false;
6327                 fault.address = work->arch.token;
6328                 kvm_inject_page_fault(vcpu, &fault);
6329         }
6330         vcpu->arch.apf.halted = false;
6331 }
6332
6333 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6334 {
6335         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6336                 return true;
6337         else
6338                 return !kvm_event_needs_reinjection(vcpu) &&
6339                         kvm_x86_ops->interrupt_allowed(vcpu);
6340 }
6341
6342 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6343 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6344 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6345 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6346 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6347 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6348 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6349 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6350 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6351 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6352 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6353 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);