xhci: Fix memory leak during failed enqueue.
[linux-flexiantxendom0.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29
30 #include "xhci.h"
31
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
34
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
39
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
41 /*
42  * handshake - spin reading hc until handshake completes or fails
43  * @ptr: address of hc register to be read
44  * @mask: bits to look at in result of read
45  * @done: value of those bits when handshake succeeds
46  * @usec: timeout in microseconds
47  *
48  * Returns negative errno, or zero on success
49  *
50  * Success happens when the "mask" bits have the specified value (hardware
51  * handshake done).  There are two failure modes:  "usec" have passed (major
52  * hardware flakeout), or the register reads as all-ones (hardware removed).
53  */
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55                       u32 mask, u32 done, int usec)
56 {
57         u32     result;
58
59         do {
60                 result = xhci_readl(xhci, ptr);
61                 if (result == ~(u32)0)          /* card removed */
62                         return -ENODEV;
63                 result &= mask;
64                 if (result == done)
65                         return 0;
66                 udelay(1);
67                 usec--;
68         } while (usec > 0);
69         return -ETIMEDOUT;
70 }
71
72 /*
73  * Disable interrupts and begin the xHCI halting process.
74  */
75 void xhci_quiesce(struct xhci_hcd *xhci)
76 {
77         u32 halted;
78         u32 cmd;
79         u32 mask;
80
81         mask = ~(XHCI_IRQS);
82         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83         if (!halted)
84                 mask &= ~CMD_RUN;
85
86         cmd = xhci_readl(xhci, &xhci->op_regs->command);
87         cmd &= mask;
88         xhci_writel(xhci, cmd, &xhci->op_regs->command);
89 }
90
91 /*
92  * Force HC into halt state.
93  *
94  * Disable any IRQs and clear the run/stop bit.
95  * HC will complete any current and actively pipelined transactions, and
96  * should halt within 16 ms of the run/stop bit being cleared.
97  * Read HC Halted bit in the status register to see when the HC is finished.
98  */
99 int xhci_halt(struct xhci_hcd *xhci)
100 {
101         int ret;
102         xhci_dbg(xhci, "// Halt the HC\n");
103         xhci_quiesce(xhci);
104
105         ret = handshake(xhci, &xhci->op_regs->status,
106                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107         if (!ret)
108                 xhci->xhc_state |= XHCI_STATE_HALTED;
109         return ret;
110 }
111
112 /*
113  * Set the run bit and wait for the host to be running.
114  */
115 static int xhci_start(struct xhci_hcd *xhci)
116 {
117         u32 temp;
118         int ret;
119
120         temp = xhci_readl(xhci, &xhci->op_regs->command);
121         temp |= (CMD_RUN);
122         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
123                         temp);
124         xhci_writel(xhci, temp, &xhci->op_regs->command);
125
126         /*
127          * Wait for the HCHalted Status bit to be 0 to indicate the host is
128          * running.
129          */
130         ret = handshake(xhci, &xhci->op_regs->status,
131                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
132         if (ret == -ETIMEDOUT)
133                 xhci_err(xhci, "Host took too long to start, "
134                                 "waited %u microseconds.\n",
135                                 XHCI_MAX_HALT_USEC);
136         if (!ret)
137                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
138         return ret;
139 }
140
141 /*
142  * Reset a halted HC.
143  *
144  * This resets pipelines, timers, counters, state machines, etc.
145  * Transactions will be terminated immediately, and operational registers
146  * will be set to their defaults.
147  */
148 int xhci_reset(struct xhci_hcd *xhci)
149 {
150         u32 command;
151         u32 state;
152         int ret;
153
154         state = xhci_readl(xhci, &xhci->op_regs->status);
155         if ((state & STS_HALT) == 0) {
156                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
157                 return 0;
158         }
159
160         xhci_dbg(xhci, "// Reset the HC\n");
161         command = xhci_readl(xhci, &xhci->op_regs->command);
162         command |= CMD_RESET;
163         xhci_writel(xhci, command, &xhci->op_regs->command);
164
165         ret = handshake(xhci, &xhci->op_regs->command,
166                         CMD_RESET, 0, 250 * 1000);
167         if (ret)
168                 return ret;
169
170         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
171         /*
172          * xHCI cannot write to any doorbells or operational registers other
173          * than status until the "Controller Not Ready" flag is cleared.
174          */
175         return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
176 }
177
178 /*
179  * Free IRQs
180  * free all IRQs request
181  */
182 static void xhci_free_irq(struct xhci_hcd *xhci)
183 {
184         int i;
185         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
186
187         /* return if using legacy interrupt */
188         if (xhci_to_hcd(xhci)->irq >= 0)
189                 return;
190
191         if (xhci->msix_entries) {
192                 for (i = 0; i < xhci->msix_count; i++)
193                         if (xhci->msix_entries[i].vector)
194                                 free_irq(xhci->msix_entries[i].vector,
195                                                 xhci_to_hcd(xhci));
196         } else if (pdev->irq >= 0)
197                 free_irq(pdev->irq, xhci_to_hcd(xhci));
198
199         return;
200 }
201
202 /*
203  * Set up MSI
204  */
205 static int xhci_setup_msi(struct xhci_hcd *xhci)
206 {
207         int ret;
208         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
209
210         ret = pci_enable_msi(pdev);
211         if (ret) {
212                 xhci_err(xhci, "failed to allocate MSI entry\n");
213                 return ret;
214         }
215
216         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
217                                 0, "xhci_hcd", xhci_to_hcd(xhci));
218         if (ret) {
219                 xhci_err(xhci, "disable MSI interrupt\n");
220                 pci_disable_msi(pdev);
221         }
222
223         return ret;
224 }
225
226 /*
227  * Set up MSI-X
228  */
229 static int xhci_setup_msix(struct xhci_hcd *xhci)
230 {
231         int i, ret = 0;
232         struct usb_hcd *hcd = xhci_to_hcd(xhci);
233         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
234
235         /*
236          * calculate number of msi-x vectors supported.
237          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
238          *   with max number of interrupters based on the xhci HCSPARAMS1.
239          * - num_online_cpus: maximum msi-x vectors per CPUs core.
240          *   Add additional 1 vector to ensure always available interrupt.
241          */
242         xhci->msix_count = min(num_online_cpus() + 1,
243                                 HCS_MAX_INTRS(xhci->hcs_params1));
244
245         xhci->msix_entries =
246                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
247                                 GFP_KERNEL);
248         if (!xhci->msix_entries) {
249                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
250                 return -ENOMEM;
251         }
252
253         for (i = 0; i < xhci->msix_count; i++) {
254                 xhci->msix_entries[i].entry = i;
255                 xhci->msix_entries[i].vector = 0;
256         }
257
258         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
259         if (ret) {
260                 xhci_err(xhci, "Failed to enable MSI-X\n");
261                 goto free_entries;
262         }
263
264         for (i = 0; i < xhci->msix_count; i++) {
265                 ret = request_irq(xhci->msix_entries[i].vector,
266                                 (irq_handler_t)xhci_msi_irq,
267                                 0, "xhci_hcd", xhci_to_hcd(xhci));
268                 if (ret)
269                         goto disable_msix;
270         }
271
272         hcd->msix_enabled = 1;
273         return ret;
274
275 disable_msix:
276         xhci_err(xhci, "disable MSI-X interrupt\n");
277         xhci_free_irq(xhci);
278         pci_disable_msix(pdev);
279 free_entries:
280         kfree(xhci->msix_entries);
281         xhci->msix_entries = NULL;
282         return ret;
283 }
284
285 /* Free any IRQs and disable MSI-X */
286 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
287 {
288         struct usb_hcd *hcd = xhci_to_hcd(xhci);
289         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
290
291         xhci_free_irq(xhci);
292
293         if (xhci->msix_entries) {
294                 pci_disable_msix(pdev);
295                 kfree(xhci->msix_entries);
296                 xhci->msix_entries = NULL;
297         } else {
298                 pci_disable_msi(pdev);
299         }
300
301         hcd->msix_enabled = 0;
302         return;
303 }
304
305 /*
306  * Initialize memory for HCD and xHC (one-time init).
307  *
308  * Program the PAGESIZE register, initialize the device context array, create
309  * device contexts (?), set up a command ring segment (or two?), create event
310  * ring (one for now).
311  */
312 int xhci_init(struct usb_hcd *hcd)
313 {
314         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
315         int retval = 0;
316
317         xhci_dbg(xhci, "xhci_init\n");
318         spin_lock_init(&xhci->lock);
319         if (link_quirk) {
320                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
321                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
322         } else {
323                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
324         }
325         retval = xhci_mem_init(xhci, GFP_KERNEL);
326         xhci_dbg(xhci, "Finished xhci_init\n");
327
328         return retval;
329 }
330
331 /*-------------------------------------------------------------------------*/
332
333
334 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
335 static void xhci_event_ring_work(unsigned long arg)
336 {
337         unsigned long flags;
338         int temp;
339         u64 temp_64;
340         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
341         int i, j;
342
343         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
344
345         spin_lock_irqsave(&xhci->lock, flags);
346         temp = xhci_readl(xhci, &xhci->op_regs->status);
347         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
348         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
349                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
350                 xhci_dbg(xhci, "HW died, polling stopped.\n");
351                 spin_unlock_irqrestore(&xhci->lock, flags);
352                 return;
353         }
354
355         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
356         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
357         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
358         xhci->error_bitmask = 0;
359         xhci_dbg(xhci, "Event ring:\n");
360         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
361         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
362         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
363         temp_64 &= ~ERST_PTR_MASK;
364         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
365         xhci_dbg(xhci, "Command ring:\n");
366         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
367         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
368         xhci_dbg_cmd_ptrs(xhci);
369         for (i = 0; i < MAX_HC_SLOTS; ++i) {
370                 if (!xhci->devs[i])
371                         continue;
372                 for (j = 0; j < 31; ++j) {
373                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
374                 }
375         }
376         spin_unlock_irqrestore(&xhci->lock, flags);
377
378         if (!xhci->zombie)
379                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
380         else
381                 xhci_dbg(xhci, "Quit polling the event ring.\n");
382 }
383 #endif
384
385 static int xhci_run_finished(struct xhci_hcd *xhci)
386 {
387         if (xhci_start(xhci)) {
388                 xhci_halt(xhci);
389                 return -ENODEV;
390         }
391         xhci->shared_hcd->state = HC_STATE_RUNNING;
392
393         if (xhci->quirks & XHCI_NEC_HOST)
394                 xhci_ring_cmd_db(xhci);
395
396         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
397         return 0;
398 }
399
400 /*
401  * Start the HC after it was halted.
402  *
403  * This function is called by the USB core when the HC driver is added.
404  * Its opposite is xhci_stop().
405  *
406  * xhci_init() must be called once before this function can be called.
407  * Reset the HC, enable device slot contexts, program DCBAAP, and
408  * set command ring pointer and event ring pointer.
409  *
410  * Setup MSI-X vectors and enable interrupts.
411  */
412 int xhci_run(struct usb_hcd *hcd)
413 {
414         u32 temp;
415         u64 temp_64;
416         u32 ret;
417         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
418         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
419
420         /* Start the xHCI host controller running only after the USB 2.0 roothub
421          * is setup.
422          */
423
424         hcd->uses_new_polling = 1;
425         if (!usb_hcd_is_primary_hcd(hcd))
426                 return xhci_run_finished(xhci);
427
428         xhci_dbg(xhci, "xhci_run\n");
429         /* unregister the legacy interrupt */
430         if (hcd->irq)
431                 free_irq(hcd->irq, hcd);
432         hcd->irq = -1;
433
434         /* Some Fresco Logic host controllers advertise MSI, but fail to
435          * generate interrupts.  Don't even try to enable MSI.
436          */
437         if (xhci->quirks & XHCI_BROKEN_MSI)
438                 goto legacy_irq;
439
440         ret = xhci_setup_msix(xhci);
441         if (ret)
442                 /* fall back to msi*/
443                 ret = xhci_setup_msi(xhci);
444
445         if (ret) {
446 legacy_irq:
447                 /* fall back to legacy interrupt*/
448                 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
449                                         hcd->irq_descr, hcd);
450                 if (ret) {
451                         xhci_err(xhci, "request interrupt %d failed\n",
452                                         pdev->irq);
453                         return ret;
454                 }
455                 hcd->irq = pdev->irq;
456         }
457
458 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
459         init_timer(&xhci->event_ring_timer);
460         xhci->event_ring_timer.data = (unsigned long) xhci;
461         xhci->event_ring_timer.function = xhci_event_ring_work;
462         /* Poll the event ring */
463         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
464         xhci->zombie = 0;
465         xhci_dbg(xhci, "Setting event ring polling timer\n");
466         add_timer(&xhci->event_ring_timer);
467 #endif
468
469         xhci_dbg(xhci, "Command ring memory map follows:\n");
470         xhci_debug_ring(xhci, xhci->cmd_ring);
471         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
472         xhci_dbg_cmd_ptrs(xhci);
473
474         xhci_dbg(xhci, "ERST memory map follows:\n");
475         xhci_dbg_erst(xhci, &xhci->erst);
476         xhci_dbg(xhci, "Event ring:\n");
477         xhci_debug_ring(xhci, xhci->event_ring);
478         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
479         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
480         temp_64 &= ~ERST_PTR_MASK;
481         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
482
483         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
484         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
485         temp &= ~ER_IRQ_INTERVAL_MASK;
486         temp |= (u32) 160;
487         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
488
489         /* Set the HCD state before we enable the irqs */
490         temp = xhci_readl(xhci, &xhci->op_regs->command);
491         temp |= (CMD_EIE);
492         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
493                         temp);
494         xhci_writel(xhci, temp, &xhci->op_regs->command);
495
496         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
497         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
498                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
499         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
500                         &xhci->ir_set->irq_pending);
501         xhci_print_ir_set(xhci, 0);
502
503         if (xhci->quirks & XHCI_NEC_HOST)
504                 xhci_queue_vendor_command(xhci, 0, 0, 0,
505                                 TRB_TYPE(TRB_NEC_GET_FW));
506
507         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
508         return 0;
509 }
510
511 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
512 {
513         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
514
515         spin_lock_irq(&xhci->lock);
516         xhci_halt(xhci);
517
518         /* The shared_hcd is going to be deallocated shortly (the USB core only
519          * calls this function when allocation fails in usb_add_hcd(), or
520          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
521          */
522         xhci->shared_hcd = NULL;
523         spin_unlock_irq(&xhci->lock);
524 }
525
526 /*
527  * Stop xHCI driver.
528  *
529  * This function is called by the USB core when the HC driver is removed.
530  * Its opposite is xhci_run().
531  *
532  * Disable device contexts, disable IRQs, and quiesce the HC.
533  * Reset the HC, finish any completed transactions, and cleanup memory.
534  */
535 void xhci_stop(struct usb_hcd *hcd)
536 {
537         u32 temp;
538         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
539
540         if (!usb_hcd_is_primary_hcd(hcd)) {
541                 xhci_only_stop_hcd(xhci->shared_hcd);
542                 return;
543         }
544
545         spin_lock_irq(&xhci->lock);
546         /* Make sure the xHC is halted for a USB3 roothub
547          * (xhci_stop() could be called as part of failed init).
548          */
549         xhci_halt(xhci);
550         xhci_reset(xhci);
551         spin_unlock_irq(&xhci->lock);
552
553         xhci_cleanup_msix(xhci);
554
555 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
556         /* Tell the event ring poll function not to reschedule */
557         xhci->zombie = 1;
558         del_timer_sync(&xhci->event_ring_timer);
559 #endif
560
561         if (xhci->quirks & XHCI_AMD_PLL_FIX)
562                 usb_amd_dev_put();
563
564         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
565         temp = xhci_readl(xhci, &xhci->op_regs->status);
566         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
567         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
568         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
569                         &xhci->ir_set->irq_pending);
570         xhci_print_ir_set(xhci, 0);
571
572         xhci_dbg(xhci, "cleaning up memory\n");
573         xhci_mem_cleanup(xhci);
574         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
575                     xhci_readl(xhci, &xhci->op_regs->status));
576 }
577
578 /*
579  * Shutdown HC (not bus-specific)
580  *
581  * This is called when the machine is rebooting or halting.  We assume that the
582  * machine will be powered off, and the HC's internal state will be reset.
583  * Don't bother to free memory.
584  *
585  * This will only ever be called with the main usb_hcd (the USB3 roothub).
586  */
587 void xhci_shutdown(struct usb_hcd *hcd)
588 {
589         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
590
591         spin_lock_irq(&xhci->lock);
592         xhci_halt(xhci);
593         spin_unlock_irq(&xhci->lock);
594
595         xhci_cleanup_msix(xhci);
596
597         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
598                     xhci_readl(xhci, &xhci->op_regs->status));
599 }
600
601 #ifdef CONFIG_PM
602 static void xhci_save_registers(struct xhci_hcd *xhci)
603 {
604         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
605         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
606         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
607         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
608         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
609         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
610         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
611         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
612         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
613 }
614
615 static void xhci_restore_registers(struct xhci_hcd *xhci)
616 {
617         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
618         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
619         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
620         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
621         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
622         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
623         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
624         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
625 }
626
627 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
628 {
629         u64     val_64;
630
631         /* step 2: initialize command ring buffer */
632         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
633         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
634                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
635                                       xhci->cmd_ring->dequeue) &
636                  (u64) ~CMD_RING_RSVD_BITS) |
637                 xhci->cmd_ring->cycle_state;
638         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
639                         (long unsigned long) val_64);
640         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
641 }
642
643 /*
644  * The whole command ring must be cleared to zero when we suspend the host.
645  *
646  * The host doesn't save the command ring pointer in the suspend well, so we
647  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
648  * aligned, because of the reserved bits in the command ring dequeue pointer
649  * register.  Therefore, we can't just set the dequeue pointer back in the
650  * middle of the ring (TRBs are 16-byte aligned).
651  */
652 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
653 {
654         struct xhci_ring *ring;
655         struct xhci_segment *seg;
656
657         ring = xhci->cmd_ring;
658         seg = ring->deq_seg;
659         do {
660                 memset(seg->trbs, 0, SEGMENT_SIZE);
661                 seg = seg->next;
662         } while (seg != ring->deq_seg);
663
664         /* Reset the software enqueue and dequeue pointers */
665         ring->deq_seg = ring->first_seg;
666         ring->dequeue = ring->first_seg->trbs;
667         ring->enq_seg = ring->deq_seg;
668         ring->enqueue = ring->dequeue;
669
670         /*
671          * Ring is now zeroed, so the HW should look for change of ownership
672          * when the cycle bit is set to 1.
673          */
674         ring->cycle_state = 1;
675
676         /*
677          * Reset the hardware dequeue pointer.
678          * Yes, this will need to be re-written after resume, but we're paranoid
679          * and want to make sure the hardware doesn't access bogus memory
680          * because, say, the BIOS or an SMI started the host without changing
681          * the command ring pointers.
682          */
683         xhci_set_cmd_ring_deq(xhci);
684 }
685
686 /*
687  * Stop HC (not bus-specific)
688  *
689  * This is called when the machine transition into S3/S4 mode.
690  *
691  */
692 int xhci_suspend(struct xhci_hcd *xhci)
693 {
694         int                     rc = 0;
695         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
696         u32                     command;
697         int                     i;
698
699         spin_lock_irq(&xhci->lock);
700         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
701         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
702         /* step 1: stop endpoint */
703         /* skipped assuming that port suspend has done */
704
705         /* step 2: clear Run/Stop bit */
706         command = xhci_readl(xhci, &xhci->op_regs->command);
707         command &= ~CMD_RUN;
708         xhci_writel(xhci, command, &xhci->op_regs->command);
709         if (handshake(xhci, &xhci->op_regs->status,
710                       STS_HALT, STS_HALT, 100*100)) {
711                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
712                 spin_unlock_irq(&xhci->lock);
713                 return -ETIMEDOUT;
714         }
715         xhci_clear_command_ring(xhci);
716
717         /* step 3: save registers */
718         xhci_save_registers(xhci);
719
720         /* step 4: set CSS flag */
721         command = xhci_readl(xhci, &xhci->op_regs->command);
722         command |= CMD_CSS;
723         xhci_writel(xhci, command, &xhci->op_regs->command);
724         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
725                 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
726                 spin_unlock_irq(&xhci->lock);
727                 return -ETIMEDOUT;
728         }
729         spin_unlock_irq(&xhci->lock);
730
731         /* step 5: remove core well power */
732         /* synchronize irq when using MSI-X */
733         if (xhci->msix_entries) {
734                 for (i = 0; i < xhci->msix_count; i++)
735                         synchronize_irq(xhci->msix_entries[i].vector);
736         }
737
738         return rc;
739 }
740
741 /*
742  * start xHC (not bus-specific)
743  *
744  * This is called when the machine transition from S3/S4 mode.
745  *
746  */
747 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
748 {
749         u32                     command, temp = 0;
750         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
751         struct usb_hcd          *secondary_hcd;
752         int                     retval;
753
754         /* Wait a bit if either of the roothubs need to settle from the
755          * transition into bus suspend.
756          */
757         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
758                         time_before(jiffies,
759                                 xhci->bus_state[1].next_statechange))
760                 msleep(100);
761
762         spin_lock_irq(&xhci->lock);
763         if (xhci->quirks & XHCI_RESET_ON_RESUME)
764                 hibernated = true;
765
766         if (!hibernated) {
767                 /* step 1: restore register */
768                 xhci_restore_registers(xhci);
769                 /* step 2: initialize command ring buffer */
770                 xhci_set_cmd_ring_deq(xhci);
771                 /* step 3: restore state and start state*/
772                 /* step 3: set CRS flag */
773                 command = xhci_readl(xhci, &xhci->op_regs->command);
774                 command |= CMD_CRS;
775                 xhci_writel(xhci, command, &xhci->op_regs->command);
776                 if (handshake(xhci, &xhci->op_regs->status,
777                               STS_RESTORE, 0, 10*100)) {
778                         xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
779                         spin_unlock_irq(&xhci->lock);
780                         return -ETIMEDOUT;
781                 }
782                 temp = xhci_readl(xhci, &xhci->op_regs->status);
783         }
784
785         /* If restore operation fails, re-initialize the HC during resume */
786         if ((temp & STS_SRE) || hibernated) {
787                 /* Let the USB core know _both_ roothubs lost power. */
788                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
789                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
790
791                 xhci_dbg(xhci, "Stop HCD\n");
792                 xhci_halt(xhci);
793                 xhci_reset(xhci);
794                 spin_unlock_irq(&xhci->lock);
795                 xhci_cleanup_msix(xhci);
796
797 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
798                 /* Tell the event ring poll function not to reschedule */
799                 xhci->zombie = 1;
800                 del_timer_sync(&xhci->event_ring_timer);
801 #endif
802
803                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
804                 temp = xhci_readl(xhci, &xhci->op_regs->status);
805                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
806                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
807                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
808                                 &xhci->ir_set->irq_pending);
809                 xhci_print_ir_set(xhci, 0);
810
811                 xhci_dbg(xhci, "cleaning up memory\n");
812                 xhci_mem_cleanup(xhci);
813                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
814                             xhci_readl(xhci, &xhci->op_regs->status));
815
816                 /* USB core calls the PCI reinit and start functions twice:
817                  * first with the primary HCD, and then with the secondary HCD.
818                  * If we don't do the same, the host will never be started.
819                  */
820                 if (!usb_hcd_is_primary_hcd(hcd))
821                         secondary_hcd = hcd;
822                 else
823                         secondary_hcd = xhci->shared_hcd;
824
825                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
826                 retval = xhci_init(hcd->primary_hcd);
827                 if (retval)
828                         return retval;
829                 xhci_dbg(xhci, "Start the primary HCD\n");
830                 retval = xhci_run(hcd->primary_hcd);
831                 if (retval)
832                         goto failed_restart;
833
834                 xhci_dbg(xhci, "Start the secondary HCD\n");
835                 retval = xhci_run(secondary_hcd);
836                 if (!retval) {
837                         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
838                         set_bit(HCD_FLAG_HW_ACCESSIBLE,
839                                         &xhci->shared_hcd->flags);
840                 }
841 failed_restart:
842                 hcd->state = HC_STATE_SUSPENDED;
843                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
844                 return retval;
845         }
846
847         /* step 4: set Run/Stop bit */
848         command = xhci_readl(xhci, &xhci->op_regs->command);
849         command |= CMD_RUN;
850         xhci_writel(xhci, command, &xhci->op_regs->command);
851         handshake(xhci, &xhci->op_regs->status, STS_HALT,
852                   0, 250 * 1000);
853
854         /* step 5: walk topology and initialize portsc,
855          * portpmsc and portli
856          */
857         /* this is done in bus_resume */
858
859         /* step 6: restart each of the previously
860          * Running endpoints by ringing their doorbells
861          */
862
863         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
864         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
865
866         spin_unlock_irq(&xhci->lock);
867         return 0;
868 }
869 #endif  /* CONFIG_PM */
870
871 /*-------------------------------------------------------------------------*/
872
873 /**
874  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
875  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
876  * value to right shift 1 for the bitmask.
877  *
878  * Index  = (epnum * 2) + direction - 1,
879  * where direction = 0 for OUT, 1 for IN.
880  * For control endpoints, the IN index is used (OUT index is unused), so
881  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
882  */
883 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
884 {
885         unsigned int index;
886         if (usb_endpoint_xfer_control(desc))
887                 index = (unsigned int) (usb_endpoint_num(desc)*2);
888         else
889                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
890                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
891         return index;
892 }
893
894 /* Find the flag for this endpoint (for use in the control context).  Use the
895  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
896  * bit 1, etc.
897  */
898 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
899 {
900         return 1 << (xhci_get_endpoint_index(desc) + 1);
901 }
902
903 /* Find the flag for this endpoint (for use in the control context).  Use the
904  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
905  * bit 1, etc.
906  */
907 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
908 {
909         return 1 << (ep_index + 1);
910 }
911
912 /* Compute the last valid endpoint context index.  Basically, this is the
913  * endpoint index plus one.  For slot contexts with more than valid endpoint,
914  * we find the most significant bit set in the added contexts flags.
915  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
916  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
917  */
918 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
919 {
920         return fls(added_ctxs) - 1;
921 }
922
923 /* Returns 1 if the arguments are OK;
924  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
925  */
926 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
927                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
928                 const char *func) {
929         struct xhci_hcd *xhci;
930         struct xhci_virt_device *virt_dev;
931
932         if (!hcd || (check_ep && !ep) || !udev) {
933                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
934                                 func);
935                 return -EINVAL;
936         }
937         if (!udev->parent) {
938                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
939                                 func);
940                 return 0;
941         }
942
943         xhci = hcd_to_xhci(hcd);
944         if (xhci->xhc_state & XHCI_STATE_HALTED)
945                 return -ENODEV;
946
947         if (check_virt_dev) {
948                 if (!udev->slot_id || !xhci->devs
949                         || !xhci->devs[udev->slot_id]) {
950                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
951                                                 "device\n", func);
952                         return -EINVAL;
953                 }
954
955                 virt_dev = xhci->devs[udev->slot_id];
956                 if (virt_dev->udev != udev) {
957                         printk(KERN_DEBUG "xHCI %s called with udev and "
958                                           "virt_dev does not match\n", func);
959                         return -EINVAL;
960                 }
961         }
962
963         return 1;
964 }
965
966 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
967                 struct usb_device *udev, struct xhci_command *command,
968                 bool ctx_change, bool must_succeed);
969
970 /*
971  * Full speed devices may have a max packet size greater than 8 bytes, but the
972  * USB core doesn't know that until it reads the first 8 bytes of the
973  * descriptor.  If the usb_device's max packet size changes after that point,
974  * we need to issue an evaluate context command and wait on it.
975  */
976 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
977                 unsigned int ep_index, struct urb *urb)
978 {
979         struct xhci_container_ctx *in_ctx;
980         struct xhci_container_ctx *out_ctx;
981         struct xhci_input_control_ctx *ctrl_ctx;
982         struct xhci_ep_ctx *ep_ctx;
983         int max_packet_size;
984         int hw_max_packet_size;
985         int ret = 0;
986
987         out_ctx = xhci->devs[slot_id]->out_ctx;
988         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
989         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
990         max_packet_size = le16_to_cpu(urb->dev->ep0.desc.wMaxPacketSize);
991         if (hw_max_packet_size != max_packet_size) {
992                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
993                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
994                                 max_packet_size);
995                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
996                                 hw_max_packet_size);
997                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
998
999                 /* Set up the modified control endpoint 0 */
1000                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1001                                 xhci->devs[slot_id]->out_ctx, ep_index);
1002                 in_ctx = xhci->devs[slot_id]->in_ctx;
1003                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1004                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1005                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1006
1007                 /* Set up the input context flags for the command */
1008                 /* FIXME: This won't work if a non-default control endpoint
1009                  * changes max packet sizes.
1010                  */
1011                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1012                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1013                 ctrl_ctx->drop_flags = 0;
1014
1015                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1016                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1017                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1018                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1019
1020                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1021                                 true, false);
1022
1023                 /* Clean up the input context for later use by bandwidth
1024                  * functions.
1025                  */
1026                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1027         }
1028         return ret;
1029 }
1030
1031 /*
1032  * non-error returns are a promise to giveback() the urb later
1033  * we drop ownership so next owner (or urb unlink) can get it
1034  */
1035 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1036 {
1037         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1038         unsigned long flags;
1039         int ret = 0;
1040         unsigned int slot_id, ep_index;
1041         struct urb_priv *urb_priv;
1042         int size, i;
1043
1044         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1045                                         true, true, __func__) <= 0)
1046                 return -EINVAL;
1047
1048         slot_id = urb->dev->slot_id;
1049         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1050
1051         if (!HCD_HW_ACCESSIBLE(hcd)) {
1052                 if (!in_interrupt())
1053                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1054                 ret = -ESHUTDOWN;
1055                 goto exit;
1056         }
1057
1058         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1059                 size = urb->number_of_packets;
1060         else
1061                 size = 1;
1062
1063         urb_priv = kzalloc(sizeof(struct urb_priv) +
1064                                   size * sizeof(struct xhci_td *), mem_flags);
1065         if (!urb_priv)
1066                 return -ENOMEM;
1067
1068         for (i = 0; i < size; i++) {
1069                 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
1070                 if (!urb_priv->td[i]) {
1071                         urb_priv->length = i;
1072                         xhci_urb_free_priv(xhci, urb_priv);
1073                         return -ENOMEM;
1074                 }
1075         }
1076
1077         urb_priv->length = size;
1078         urb_priv->td_cnt = 0;
1079         urb->hcpriv = urb_priv;
1080
1081         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1082                 /* Check to see if the max packet size for the default control
1083                  * endpoint changed during FS device enumeration
1084                  */
1085                 if (urb->dev->speed == USB_SPEED_FULL) {
1086                         ret = xhci_check_maxpacket(xhci, slot_id,
1087                                         ep_index, urb);
1088                         if (ret < 0) {
1089                                 xhci_urb_free_priv(xhci, urb_priv);
1090                                 urb->hcpriv = NULL;
1091                                 return ret;
1092                         }
1093                 }
1094
1095                 /* We have a spinlock and interrupts disabled, so we must pass
1096                  * atomic context to this function, which may allocate memory.
1097                  */
1098                 spin_lock_irqsave(&xhci->lock, flags);
1099                 if (xhci->xhc_state & XHCI_STATE_DYING)
1100                         goto dying;
1101                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1102                                 slot_id, ep_index);
1103                 if (ret)
1104                         goto free_priv;
1105                 spin_unlock_irqrestore(&xhci->lock, flags);
1106         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1107                 spin_lock_irqsave(&xhci->lock, flags);
1108                 if (xhci->xhc_state & XHCI_STATE_DYING)
1109                         goto dying;
1110                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1111                                 EP_GETTING_STREAMS) {
1112                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1113                                         "is transitioning to using streams.\n");
1114                         ret = -EINVAL;
1115                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1116                                 EP_GETTING_NO_STREAMS) {
1117                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1118                                         "is transitioning to "
1119                                         "not having streams.\n");
1120                         ret = -EINVAL;
1121                 } else {
1122                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1123                                         slot_id, ep_index);
1124                 }
1125                 if (ret)
1126                         goto free_priv;
1127                 spin_unlock_irqrestore(&xhci->lock, flags);
1128         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1129                 spin_lock_irqsave(&xhci->lock, flags);
1130                 if (xhci->xhc_state & XHCI_STATE_DYING)
1131                         goto dying;
1132                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1133                                 slot_id, ep_index);
1134                 if (ret)
1135                         goto free_priv;
1136                 spin_unlock_irqrestore(&xhci->lock, flags);
1137         } else {
1138                 spin_lock_irqsave(&xhci->lock, flags);
1139                 if (xhci->xhc_state & XHCI_STATE_DYING)
1140                         goto dying;
1141                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1142                                 slot_id, ep_index);
1143                 if (ret)
1144                         goto free_priv;
1145                 spin_unlock_irqrestore(&xhci->lock, flags);
1146         }
1147 exit:
1148         return ret;
1149 dying:
1150         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1151                         "non-responsive xHCI host.\n",
1152                         urb->ep->desc.bEndpointAddress, urb);
1153         ret = -ESHUTDOWN;
1154 free_priv:
1155         xhci_urb_free_priv(xhci, urb_priv);
1156         urb->hcpriv = NULL;
1157         spin_unlock_irqrestore(&xhci->lock, flags);
1158         return ret;
1159 }
1160
1161 /* Get the right ring for the given URB.
1162  * If the endpoint supports streams, boundary check the URB's stream ID.
1163  * If the endpoint doesn't support streams, return the singular endpoint ring.
1164  */
1165 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1166                 struct urb *urb)
1167 {
1168         unsigned int slot_id;
1169         unsigned int ep_index;
1170         unsigned int stream_id;
1171         struct xhci_virt_ep *ep;
1172
1173         slot_id = urb->dev->slot_id;
1174         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1175         stream_id = urb->stream_id;
1176         ep = &xhci->devs[slot_id]->eps[ep_index];
1177         /* Common case: no streams */
1178         if (!(ep->ep_state & EP_HAS_STREAMS))
1179                 return ep->ring;
1180
1181         if (stream_id == 0) {
1182                 xhci_warn(xhci,
1183                                 "WARN: Slot ID %u, ep index %u has streams, "
1184                                 "but URB has no stream ID.\n",
1185                                 slot_id, ep_index);
1186                 return NULL;
1187         }
1188
1189         if (stream_id < ep->stream_info->num_streams)
1190                 return ep->stream_info->stream_rings[stream_id];
1191
1192         xhci_warn(xhci,
1193                         "WARN: Slot ID %u, ep index %u has "
1194                         "stream IDs 1 to %u allocated, "
1195                         "but stream ID %u is requested.\n",
1196                         slot_id, ep_index,
1197                         ep->stream_info->num_streams - 1,
1198                         stream_id);
1199         return NULL;
1200 }
1201
1202 /*
1203  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1204  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1205  * should pick up where it left off in the TD, unless a Set Transfer Ring
1206  * Dequeue Pointer is issued.
1207  *
1208  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1209  * the ring.  Since the ring is a contiguous structure, they can't be physically
1210  * removed.  Instead, there are two options:
1211  *
1212  *  1) If the HC is in the middle of processing the URB to be canceled, we
1213  *     simply move the ring's dequeue pointer past those TRBs using the Set
1214  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1215  *     when drivers timeout on the last submitted URB and attempt to cancel.
1216  *
1217  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1218  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1219  *     HC will need to invalidate the any TRBs it has cached after the stop
1220  *     endpoint command, as noted in the xHCI 0.95 errata.
1221  *
1222  *  3) The TD may have completed by the time the Stop Endpoint Command
1223  *     completes, so software needs to handle that case too.
1224  *
1225  * This function should protect against the TD enqueueing code ringing the
1226  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1227  * It also needs to account for multiple cancellations on happening at the same
1228  * time for the same endpoint.
1229  *
1230  * Note that this function can be called in any context, or so says
1231  * usb_hcd_unlink_urb()
1232  */
1233 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1234 {
1235         unsigned long flags;
1236         int ret, i;
1237         u32 temp;
1238         struct xhci_hcd *xhci;
1239         struct urb_priv *urb_priv;
1240         struct xhci_td *td;
1241         unsigned int ep_index;
1242         struct xhci_ring *ep_ring;
1243         struct xhci_virt_ep *ep;
1244
1245         xhci = hcd_to_xhci(hcd);
1246         spin_lock_irqsave(&xhci->lock, flags);
1247         /* Make sure the URB hasn't completed or been unlinked already */
1248         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1249         if (ret || !urb->hcpriv)
1250                 goto done;
1251         temp = xhci_readl(xhci, &xhci->op_regs->status);
1252         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1253                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1254                 urb_priv = urb->hcpriv;
1255
1256                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1257                 spin_unlock_irqrestore(&xhci->lock, flags);
1258                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1259                 xhci_urb_free_priv(xhci, urb_priv);
1260                 return ret;
1261         }
1262         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1263                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1264                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1265                                 "non-responsive xHCI host.\n",
1266                                 urb->ep->desc.bEndpointAddress, urb);
1267                 /* Let the stop endpoint command watchdog timer (which set this
1268                  * state) finish cleaning up the endpoint TD lists.  We must
1269                  * have caught it in the middle of dropping a lock and giving
1270                  * back an URB.
1271                  */
1272                 goto done;
1273         }
1274
1275         xhci_dbg(xhci, "Cancel URB %p\n", urb);
1276         xhci_dbg(xhci, "Event ring:\n");
1277         xhci_debug_ring(xhci, xhci->event_ring);
1278         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1279         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1280         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1281         if (!ep_ring) {
1282                 ret = -EINVAL;
1283                 goto done;
1284         }
1285
1286         xhci_dbg(xhci, "Endpoint ring:\n");
1287         xhci_debug_ring(xhci, ep_ring);
1288
1289         urb_priv = urb->hcpriv;
1290
1291         for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1292                 td = urb_priv->td[i];
1293                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1294         }
1295
1296         /* Queue a stop endpoint command, but only if this is
1297          * the first cancellation to be handled.
1298          */
1299         if (!(ep->ep_state & EP_HALT_PENDING)) {
1300                 ep->ep_state |= EP_HALT_PENDING;
1301                 ep->stop_cmds_pending++;
1302                 ep->stop_cmd_timer.expires = jiffies +
1303                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1304                 add_timer(&ep->stop_cmd_timer);
1305                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1306                 xhci_ring_cmd_db(xhci);
1307         }
1308 done:
1309         spin_unlock_irqrestore(&xhci->lock, flags);
1310         return ret;
1311 }
1312
1313 /* Drop an endpoint from a new bandwidth configuration for this device.
1314  * Only one call to this function is allowed per endpoint before
1315  * check_bandwidth() or reset_bandwidth() must be called.
1316  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1317  * add the endpoint to the schedule with possibly new parameters denoted by a
1318  * different endpoint descriptor in usb_host_endpoint.
1319  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1320  * not allowed.
1321  *
1322  * The USB core will not allow URBs to be queued to an endpoint that is being
1323  * disabled, so there's no need for mutual exclusion to protect
1324  * the xhci->devs[slot_id] structure.
1325  */
1326 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1327                 struct usb_host_endpoint *ep)
1328 {
1329         struct xhci_hcd *xhci;
1330         struct xhci_container_ctx *in_ctx, *out_ctx;
1331         struct xhci_input_control_ctx *ctrl_ctx;
1332         struct xhci_slot_ctx *slot_ctx;
1333         unsigned int last_ctx;
1334         unsigned int ep_index;
1335         struct xhci_ep_ctx *ep_ctx;
1336         u32 drop_flag;
1337         u32 new_add_flags, new_drop_flags, new_slot_info;
1338         int ret;
1339
1340         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1341         if (ret <= 0)
1342                 return ret;
1343         xhci = hcd_to_xhci(hcd);
1344         if (xhci->xhc_state & XHCI_STATE_DYING)
1345                 return -ENODEV;
1346
1347         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1348         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1349         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1350                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1351                                 __func__, drop_flag);
1352                 return 0;
1353         }
1354
1355         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1356         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1357         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1358         ep_index = xhci_get_endpoint_index(&ep->desc);
1359         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1360         /* If the HC already knows the endpoint is disabled,
1361          * or the HCD has noted it is disabled, ignore this request
1362          */
1363         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1364              cpu_to_le32(EP_STATE_DISABLED)) ||
1365             le32_to_cpu(ctrl_ctx->drop_flags) &
1366             xhci_get_endpoint_flag(&ep->desc)) {
1367                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1368                                 __func__, ep);
1369                 return 0;
1370         }
1371
1372         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1373         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1374
1375         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1376         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1377
1378         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1379         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1380         /* Update the last valid endpoint context, if we deleted the last one */
1381         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1382             LAST_CTX(last_ctx)) {
1383                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1384                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1385         }
1386         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1387
1388         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1389
1390         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1391                         (unsigned int) ep->desc.bEndpointAddress,
1392                         udev->slot_id,
1393                         (unsigned int) new_drop_flags,
1394                         (unsigned int) new_add_flags,
1395                         (unsigned int) new_slot_info);
1396         return 0;
1397 }
1398
1399 /* Add an endpoint to a new possible bandwidth configuration for this device.
1400  * Only one call to this function is allowed per endpoint before
1401  * check_bandwidth() or reset_bandwidth() must be called.
1402  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1403  * add the endpoint to the schedule with possibly new parameters denoted by a
1404  * different endpoint descriptor in usb_host_endpoint.
1405  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1406  * not allowed.
1407  *
1408  * The USB core will not allow URBs to be queued to an endpoint until the
1409  * configuration or alt setting is installed in the device, so there's no need
1410  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1411  */
1412 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1413                 struct usb_host_endpoint *ep)
1414 {
1415         struct xhci_hcd *xhci;
1416         struct xhci_container_ctx *in_ctx, *out_ctx;
1417         unsigned int ep_index;
1418         struct xhci_ep_ctx *ep_ctx;
1419         struct xhci_slot_ctx *slot_ctx;
1420         struct xhci_input_control_ctx *ctrl_ctx;
1421         u32 added_ctxs;
1422         unsigned int last_ctx;
1423         u32 new_add_flags, new_drop_flags, new_slot_info;
1424         struct xhci_virt_device *virt_dev;
1425         int ret = 0;
1426
1427         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1428         if (ret <= 0) {
1429                 /* So we won't queue a reset ep command for a root hub */
1430                 ep->hcpriv = NULL;
1431                 return ret;
1432         }
1433         xhci = hcd_to_xhci(hcd);
1434         if (xhci->xhc_state & XHCI_STATE_DYING)
1435                 return -ENODEV;
1436
1437         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1438         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1439         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1440                 /* FIXME when we have to issue an evaluate endpoint command to
1441                  * deal with ep0 max packet size changing once we get the
1442                  * descriptors
1443                  */
1444                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1445                                 __func__, added_ctxs);
1446                 return 0;
1447         }
1448
1449         virt_dev = xhci->devs[udev->slot_id];
1450         in_ctx = virt_dev->in_ctx;
1451         out_ctx = virt_dev->out_ctx;
1452         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1453         ep_index = xhci_get_endpoint_index(&ep->desc);
1454         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1455
1456         /* If this endpoint is already in use, and the upper layers are trying
1457          * to add it again without dropping it, reject the addition.
1458          */
1459         if (virt_dev->eps[ep_index].ring &&
1460                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1461                                 xhci_get_endpoint_flag(&ep->desc))) {
1462                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1463                                 "without dropping it.\n",
1464                                 (unsigned int) ep->desc.bEndpointAddress);
1465                 return -EINVAL;
1466         }
1467
1468         /* If the HCD has already noted the endpoint is enabled,
1469          * ignore this request.
1470          */
1471         if (le32_to_cpu(ctrl_ctx->add_flags) &
1472             xhci_get_endpoint_flag(&ep->desc)) {
1473                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1474                                 __func__, ep);
1475                 return 0;
1476         }
1477
1478         /*
1479          * Configuration and alternate setting changes must be done in
1480          * process context, not interrupt context (or so documenation
1481          * for usb_set_interface() and usb_set_configuration() claim).
1482          */
1483         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1484                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1485                                 __func__, ep->desc.bEndpointAddress);
1486                 return -ENOMEM;
1487         }
1488
1489         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1490         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1491
1492         /* If xhci_endpoint_disable() was called for this endpoint, but the
1493          * xHC hasn't been notified yet through the check_bandwidth() call,
1494          * this re-adds a new state for the endpoint from the new endpoint
1495          * descriptors.  We must drop and re-add this endpoint, so we leave the
1496          * drop flags alone.
1497          */
1498         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1499
1500         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1501         /* Update the last valid endpoint context, if we just added one past */
1502         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1503             LAST_CTX(last_ctx)) {
1504                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1505                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1506         }
1507         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1508
1509         /* Store the usb_device pointer for later use */
1510         ep->hcpriv = udev;
1511
1512         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1513                         (unsigned int) ep->desc.bEndpointAddress,
1514                         udev->slot_id,
1515                         (unsigned int) new_drop_flags,
1516                         (unsigned int) new_add_flags,
1517                         (unsigned int) new_slot_info);
1518         return 0;
1519 }
1520
1521 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1522 {
1523         struct xhci_input_control_ctx *ctrl_ctx;
1524         struct xhci_ep_ctx *ep_ctx;
1525         struct xhci_slot_ctx *slot_ctx;
1526         int i;
1527
1528         /* When a device's add flag and drop flag are zero, any subsequent
1529          * configure endpoint command will leave that endpoint's state
1530          * untouched.  Make sure we don't leave any old state in the input
1531          * endpoint contexts.
1532          */
1533         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1534         ctrl_ctx->drop_flags = 0;
1535         ctrl_ctx->add_flags = 0;
1536         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1537         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1538         /* Endpoint 0 is always valid */
1539         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1540         for (i = 1; i < 31; ++i) {
1541                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1542                 ep_ctx->ep_info = 0;
1543                 ep_ctx->ep_info2 = 0;
1544                 ep_ctx->deq = 0;
1545                 ep_ctx->tx_info = 0;
1546         }
1547 }
1548
1549 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1550                 struct usb_device *udev, u32 *cmd_status)
1551 {
1552         int ret;
1553
1554         switch (*cmd_status) {
1555         case COMP_ENOMEM:
1556                 dev_warn(&udev->dev, "Not enough host controller resources "
1557                                 "for new device state.\n");
1558                 ret = -ENOMEM;
1559                 /* FIXME: can we allocate more resources for the HC? */
1560                 break;
1561         case COMP_BW_ERR:
1562                 dev_warn(&udev->dev, "Not enough bandwidth "
1563                                 "for new device state.\n");
1564                 ret = -ENOSPC;
1565                 /* FIXME: can we go back to the old state? */
1566                 break;
1567         case COMP_TRB_ERR:
1568                 /* the HCD set up something wrong */
1569                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1570                                 "add flag = 1, "
1571                                 "and endpoint is not disabled.\n");
1572                 ret = -EINVAL;
1573                 break;
1574         case COMP_DEV_ERR:
1575                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1576                                 "configure command.\n");
1577                 ret = -ENODEV;
1578                 break;
1579         case COMP_SUCCESS:
1580                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1581                 ret = 0;
1582                 break;
1583         default:
1584                 xhci_err(xhci, "ERROR: unexpected command completion "
1585                                 "code 0x%x.\n", *cmd_status);
1586                 ret = -EINVAL;
1587                 break;
1588         }
1589         return ret;
1590 }
1591
1592 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1593                 struct usb_device *udev, u32 *cmd_status)
1594 {
1595         int ret;
1596         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1597
1598         switch (*cmd_status) {
1599         case COMP_EINVAL:
1600                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1601                                 "context command.\n");
1602                 ret = -EINVAL;
1603                 break;
1604         case COMP_EBADSLT:
1605                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1606                                 "evaluate context command.\n");
1607         case COMP_CTX_STATE:
1608                 dev_warn(&udev->dev, "WARN: invalid context state for "
1609                                 "evaluate context command.\n");
1610                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1611                 ret = -EINVAL;
1612                 break;
1613         case COMP_DEV_ERR:
1614                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1615                                 "context command.\n");
1616                 ret = -ENODEV;
1617                 break;
1618         case COMP_MEL_ERR:
1619                 /* Max Exit Latency too large error */
1620                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1621                 ret = -EINVAL;
1622                 break;
1623         case COMP_SUCCESS:
1624                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1625                 ret = 0;
1626                 break;
1627         default:
1628                 xhci_err(xhci, "ERROR: unexpected command completion "
1629                                 "code 0x%x.\n", *cmd_status);
1630                 ret = -EINVAL;
1631                 break;
1632         }
1633         return ret;
1634 }
1635
1636 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1637                 struct xhci_container_ctx *in_ctx)
1638 {
1639         struct xhci_input_control_ctx *ctrl_ctx;
1640         u32 valid_add_flags;
1641         u32 valid_drop_flags;
1642
1643         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1644         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1645          * (bit 1).  The default control endpoint is added during the Address
1646          * Device command and is never removed until the slot is disabled.
1647          */
1648         valid_add_flags = ctrl_ctx->add_flags >> 2;
1649         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1650
1651         /* Use hweight32 to count the number of ones in the add flags, or
1652          * number of endpoints added.  Don't count endpoints that are changed
1653          * (both added and dropped).
1654          */
1655         return hweight32(valid_add_flags) -
1656                 hweight32(valid_add_flags & valid_drop_flags);
1657 }
1658
1659 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1660                 struct xhci_container_ctx *in_ctx)
1661 {
1662         struct xhci_input_control_ctx *ctrl_ctx;
1663         u32 valid_add_flags;
1664         u32 valid_drop_flags;
1665
1666         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1667         valid_add_flags = ctrl_ctx->add_flags >> 2;
1668         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1669
1670         return hweight32(valid_drop_flags) -
1671                 hweight32(valid_add_flags & valid_drop_flags);
1672 }
1673
1674 /*
1675  * We need to reserve the new number of endpoints before the configure endpoint
1676  * command completes.  We can't subtract the dropped endpoints from the number
1677  * of active endpoints until the command completes because we can oversubscribe
1678  * the host in this case:
1679  *
1680  *  - the first configure endpoint command drops more endpoints than it adds
1681  *  - a second configure endpoint command that adds more endpoints is queued
1682  *  - the first configure endpoint command fails, so the config is unchanged
1683  *  - the second command may succeed, even though there isn't enough resources
1684  *
1685  * Must be called with xhci->lock held.
1686  */
1687 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1688                 struct xhci_container_ctx *in_ctx)
1689 {
1690         u32 added_eps;
1691
1692         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1693         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1694                 xhci_dbg(xhci, "Not enough ep ctxs: "
1695                                 "%u active, need to add %u, limit is %u.\n",
1696                                 xhci->num_active_eps, added_eps,
1697                                 xhci->limit_active_eps);
1698                 return -ENOMEM;
1699         }
1700         xhci->num_active_eps += added_eps;
1701         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1702                         xhci->num_active_eps);
1703         return 0;
1704 }
1705
1706 /*
1707  * The configure endpoint was failed by the xHC for some other reason, so we
1708  * need to revert the resources that failed configuration would have used.
1709  *
1710  * Must be called with xhci->lock held.
1711  */
1712 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1713                 struct xhci_container_ctx *in_ctx)
1714 {
1715         u32 num_failed_eps;
1716
1717         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1718         xhci->num_active_eps -= num_failed_eps;
1719         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1720                         num_failed_eps,
1721                         xhci->num_active_eps);
1722 }
1723
1724 /*
1725  * Now that the command has completed, clean up the active endpoint count by
1726  * subtracting out the endpoints that were dropped (but not changed).
1727  *
1728  * Must be called with xhci->lock held.
1729  */
1730 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1731                 struct xhci_container_ctx *in_ctx)
1732 {
1733         u32 num_dropped_eps;
1734
1735         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1736         xhci->num_active_eps -= num_dropped_eps;
1737         if (num_dropped_eps)
1738                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1739                                 num_dropped_eps,
1740                                 xhci->num_active_eps);
1741 }
1742
1743 /* Issue a configure endpoint command or evaluate context command
1744  * and wait for it to finish.
1745  */
1746 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1747                 struct usb_device *udev,
1748                 struct xhci_command *command,
1749                 bool ctx_change, bool must_succeed)
1750 {
1751         int ret;
1752         int timeleft;
1753         unsigned long flags;
1754         struct xhci_container_ctx *in_ctx;
1755         struct completion *cmd_completion;
1756         u32 *cmd_status;
1757         struct xhci_virt_device *virt_dev;
1758
1759         spin_lock_irqsave(&xhci->lock, flags);
1760         virt_dev = xhci->devs[udev->slot_id];
1761         if (command) {
1762                 in_ctx = command->in_ctx;
1763                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1764                                 xhci_reserve_host_resources(xhci, in_ctx)) {
1765                         spin_unlock_irqrestore(&xhci->lock, flags);
1766                         xhci_warn(xhci, "Not enough host resources, "
1767                                         "active endpoint contexts = %u\n",
1768                                         xhci->num_active_eps);
1769                         return -ENOMEM;
1770                 }
1771
1772                 cmd_completion = command->completion;
1773                 cmd_status = &command->status;
1774                 command->command_trb = xhci->cmd_ring->enqueue;
1775
1776                 /* Enqueue pointer can be left pointing to the link TRB,
1777                  * we must handle that
1778                  */
1779                 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
1780                         command->command_trb =
1781                                 xhci->cmd_ring->enq_seg->next->trbs;
1782
1783                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
1784         } else {
1785                 in_ctx = virt_dev->in_ctx;
1786                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1787                                 xhci_reserve_host_resources(xhci, in_ctx)) {
1788                         spin_unlock_irqrestore(&xhci->lock, flags);
1789                         xhci_warn(xhci, "Not enough host resources, "
1790                                         "active endpoint contexts = %u\n",
1791                                         xhci->num_active_eps);
1792                         return -ENOMEM;
1793                 }
1794                 cmd_completion = &virt_dev->cmd_completion;
1795                 cmd_status = &virt_dev->cmd_status;
1796         }
1797         init_completion(cmd_completion);
1798
1799         if (!ctx_change)
1800                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
1801                                 udev->slot_id, must_succeed);
1802         else
1803                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
1804                                 udev->slot_id);
1805         if (ret < 0) {
1806                 if (command)
1807                         list_del(&command->cmd_list);
1808                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
1809                         xhci_free_host_resources(xhci, in_ctx);
1810                 spin_unlock_irqrestore(&xhci->lock, flags);
1811                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
1812                 return -ENOMEM;
1813         }
1814         xhci_ring_cmd_db(xhci);
1815         spin_unlock_irqrestore(&xhci->lock, flags);
1816
1817         /* Wait for the configure endpoint command to complete */
1818         timeleft = wait_for_completion_interruptible_timeout(
1819                         cmd_completion,
1820                         USB_CTRL_SET_TIMEOUT);
1821         if (timeleft <= 0) {
1822                 xhci_warn(xhci, "%s while waiting for %s command\n",
1823                                 timeleft == 0 ? "Timeout" : "Signal",
1824                                 ctx_change == 0 ?
1825                                         "configure endpoint" :
1826                                         "evaluate context");
1827                 /* FIXME cancel the configure endpoint command */
1828                 return -ETIME;
1829         }
1830
1831         if (!ctx_change)
1832                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
1833         else
1834                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
1835
1836         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
1837                 spin_lock_irqsave(&xhci->lock, flags);
1838                 /* If the command failed, remove the reserved resources.
1839                  * Otherwise, clean up the estimate to include dropped eps.
1840                  */
1841                 if (ret)
1842                         xhci_free_host_resources(xhci, in_ctx);
1843                 else
1844                         xhci_finish_resource_reservation(xhci, in_ctx);
1845                 spin_unlock_irqrestore(&xhci->lock, flags);
1846         }
1847         return ret;
1848 }
1849
1850 /* Called after one or more calls to xhci_add_endpoint() or
1851  * xhci_drop_endpoint().  If this call fails, the USB core is expected
1852  * to call xhci_reset_bandwidth().
1853  *
1854  * Since we are in the middle of changing either configuration or
1855  * installing a new alt setting, the USB core won't allow URBs to be
1856  * enqueued for any endpoint on the old config or interface.  Nothing
1857  * else should be touching the xhci->devs[slot_id] structure, so we
1858  * don't need to take the xhci->lock for manipulating that.
1859  */
1860 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1861 {
1862         int i;
1863         int ret = 0;
1864         struct xhci_hcd *xhci;
1865         struct xhci_virt_device *virt_dev;
1866         struct xhci_input_control_ctx *ctrl_ctx;
1867         struct xhci_slot_ctx *slot_ctx;
1868
1869         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1870         if (ret <= 0)
1871                 return ret;
1872         xhci = hcd_to_xhci(hcd);
1873         if (xhci->xhc_state & XHCI_STATE_DYING)
1874                 return -ENODEV;
1875
1876         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1877         virt_dev = xhci->devs[udev->slot_id];
1878
1879         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1880         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1881         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1882         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
1883         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
1884         xhci_dbg(xhci, "New Input Control Context:\n");
1885         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1886         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1887                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1888
1889         ret = xhci_configure_endpoint(xhci, udev, NULL,
1890                         false, false);
1891         if (ret) {
1892                 /* Callee should call reset_bandwidth() */
1893                 return ret;
1894         }
1895
1896         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1897         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1898                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1899
1900         /* Free any rings that were dropped, but not changed. */
1901         for (i = 1; i < 31; ++i) {
1902                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
1903                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
1904                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1905         }
1906         xhci_zero_in_ctx(xhci, virt_dev);
1907         /*
1908          * Install any rings for completely new endpoints or changed endpoints,
1909          * and free or cache any old rings from changed endpoints.
1910          */
1911         for (i = 1; i < 31; ++i) {
1912                 if (!virt_dev->eps[i].new_ring)
1913                         continue;
1914                 /* Only cache or free the old ring if it exists.
1915                  * It may not if this is the first add of an endpoint.
1916                  */
1917                 if (virt_dev->eps[i].ring) {
1918                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1919                 }
1920                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
1921                 virt_dev->eps[i].new_ring = NULL;
1922         }
1923
1924         return ret;
1925 }
1926
1927 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1928 {
1929         struct xhci_hcd *xhci;
1930         struct xhci_virt_device *virt_dev;
1931         int i, ret;
1932
1933         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1934         if (ret <= 0)
1935                 return;
1936         xhci = hcd_to_xhci(hcd);
1937
1938         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1939         virt_dev = xhci->devs[udev->slot_id];
1940         /* Free any rings allocated for added endpoints */
1941         for (i = 0; i < 31; ++i) {
1942                 if (virt_dev->eps[i].new_ring) {
1943                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
1944                         virt_dev->eps[i].new_ring = NULL;
1945                 }
1946         }
1947         xhci_zero_in_ctx(xhci, virt_dev);
1948 }
1949
1950 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1951                 struct xhci_container_ctx *in_ctx,
1952                 struct xhci_container_ctx *out_ctx,
1953                 u32 add_flags, u32 drop_flags)
1954 {
1955         struct xhci_input_control_ctx *ctrl_ctx;
1956         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1957         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
1958         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
1959         xhci_slot_copy(xhci, in_ctx, out_ctx);
1960         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1961
1962         xhci_dbg(xhci, "Input Context:\n");
1963         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
1964 }
1965
1966 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1967                 unsigned int slot_id, unsigned int ep_index,
1968                 struct xhci_dequeue_state *deq_state)
1969 {
1970         struct xhci_container_ctx *in_ctx;
1971         struct xhci_ep_ctx *ep_ctx;
1972         u32 added_ctxs;
1973         dma_addr_t addr;
1974
1975         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1976                         xhci->devs[slot_id]->out_ctx, ep_index);
1977         in_ctx = xhci->devs[slot_id]->in_ctx;
1978         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1979         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
1980                         deq_state->new_deq_ptr);
1981         if (addr == 0) {
1982                 xhci_warn(xhci, "WARN Cannot submit config ep after "
1983                                 "reset ep command\n");
1984                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
1985                                 deq_state->new_deq_seg,
1986                                 deq_state->new_deq_ptr);
1987                 return;
1988         }
1989         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
1990
1991         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
1992         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
1993                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
1994 }
1995
1996 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
1997                 struct usb_device *udev, unsigned int ep_index)
1998 {
1999         struct xhci_dequeue_state deq_state;
2000         struct xhci_virt_ep *ep;
2001
2002         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2003         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2004         /* We need to move the HW's dequeue pointer past this TD,
2005          * or it will attempt to resend it on the next doorbell ring.
2006          */
2007         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2008                         ep_index, ep->stopped_stream, ep->stopped_td,
2009                         &deq_state);
2010
2011         /* HW with the reset endpoint quirk will use the saved dequeue state to
2012          * issue a configure endpoint command later.
2013          */
2014         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2015                 xhci_dbg(xhci, "Queueing new dequeue state\n");
2016                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2017                                 ep_index, ep->stopped_stream, &deq_state);
2018         } else {
2019                 /* Better hope no one uses the input context between now and the
2020                  * reset endpoint completion!
2021                  * XXX: No idea how this hardware will react when stream rings
2022                  * are enabled.
2023                  */
2024                 xhci_dbg(xhci, "Setting up input context for "
2025                                 "configure endpoint command\n");
2026                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2027                                 ep_index, &deq_state);
2028         }
2029 }
2030
2031 /* Deal with stalled endpoints.  The core should have sent the control message
2032  * to clear the halt condition.  However, we need to make the xHCI hardware
2033  * reset its sequence number, since a device will expect a sequence number of
2034  * zero after the halt condition is cleared.
2035  * Context: in_interrupt
2036  */
2037 void xhci_endpoint_reset(struct usb_hcd *hcd,
2038                 struct usb_host_endpoint *ep)
2039 {
2040         struct xhci_hcd *xhci;
2041         struct usb_device *udev;
2042         unsigned int ep_index;
2043         unsigned long flags;
2044         int ret;
2045         struct xhci_virt_ep *virt_ep;
2046
2047         xhci = hcd_to_xhci(hcd);
2048         udev = (struct usb_device *) ep->hcpriv;
2049         /* Called with a root hub endpoint (or an endpoint that wasn't added
2050          * with xhci_add_endpoint()
2051          */
2052         if (!ep->hcpriv)
2053                 return;
2054         ep_index = xhci_get_endpoint_index(&ep->desc);
2055         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2056         if (!virt_ep->stopped_td) {
2057                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2058                                 ep->desc.bEndpointAddress);
2059                 return;
2060         }
2061         if (usb_endpoint_xfer_control(&ep->desc)) {
2062                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2063                 return;
2064         }
2065
2066         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2067         spin_lock_irqsave(&xhci->lock, flags);
2068         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2069         /*
2070          * Can't change the ring dequeue pointer until it's transitioned to the
2071          * stopped state, which is only upon a successful reset endpoint
2072          * command.  Better hope that last command worked!
2073          */
2074         if (!ret) {
2075                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2076                 kfree(virt_ep->stopped_td);
2077                 xhci_ring_cmd_db(xhci);
2078         }
2079         virt_ep->stopped_td = NULL;
2080         virt_ep->stopped_trb = NULL;
2081         virt_ep->stopped_stream = 0;
2082         spin_unlock_irqrestore(&xhci->lock, flags);
2083
2084         if (ret)
2085                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2086 }
2087
2088 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2089                 struct usb_device *udev, struct usb_host_endpoint *ep,
2090                 unsigned int slot_id)
2091 {
2092         int ret;
2093         unsigned int ep_index;
2094         unsigned int ep_state;
2095
2096         if (!ep)
2097                 return -EINVAL;
2098         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2099         if (ret <= 0)
2100                 return -EINVAL;
2101         if (ep->ss_ep_comp.bmAttributes == 0) {
2102                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2103                                 " descriptor for ep 0x%x does not support streams\n",
2104                                 ep->desc.bEndpointAddress);
2105                 return -EINVAL;
2106         }
2107
2108         ep_index = xhci_get_endpoint_index(&ep->desc);
2109         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2110         if (ep_state & EP_HAS_STREAMS ||
2111                         ep_state & EP_GETTING_STREAMS) {
2112                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2113                                 "already has streams set up.\n",
2114                                 ep->desc.bEndpointAddress);
2115                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2116                                 "dynamic stream context array reallocation.\n");
2117                 return -EINVAL;
2118         }
2119         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2120                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2121                                 "endpoint 0x%x; URBs are pending.\n",
2122                                 ep->desc.bEndpointAddress);
2123                 return -EINVAL;
2124         }
2125         return 0;
2126 }
2127
2128 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2129                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2130 {
2131         unsigned int max_streams;
2132
2133         /* The stream context array size must be a power of two */
2134         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2135         /*
2136          * Find out how many primary stream array entries the host controller
2137          * supports.  Later we may use secondary stream arrays (similar to 2nd
2138          * level page entries), but that's an optional feature for xHCI host
2139          * controllers. xHCs must support at least 4 stream IDs.
2140          */
2141         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2142         if (*num_stream_ctxs > max_streams) {
2143                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2144                                 max_streams);
2145                 *num_stream_ctxs = max_streams;
2146                 *num_streams = max_streams;
2147         }
2148 }
2149
2150 /* Returns an error code if one of the endpoint already has streams.
2151  * This does not change any data structures, it only checks and gathers
2152  * information.
2153  */
2154 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2155                 struct usb_device *udev,
2156                 struct usb_host_endpoint **eps, unsigned int num_eps,
2157                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2158 {
2159         unsigned int max_streams;
2160         unsigned int endpoint_flag;
2161         int i;
2162         int ret;
2163
2164         for (i = 0; i < num_eps; i++) {
2165                 ret = xhci_check_streams_endpoint(xhci, udev,
2166                                 eps[i], udev->slot_id);
2167                 if (ret < 0)
2168                         return ret;
2169
2170                 max_streams = USB_SS_MAX_STREAMS(
2171                                 eps[i]->ss_ep_comp.bmAttributes);
2172                 if (max_streams < (*num_streams - 1)) {
2173                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2174                                         eps[i]->desc.bEndpointAddress,
2175                                         max_streams);
2176                         *num_streams = max_streams+1;
2177                 }
2178
2179                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2180                 if (*changed_ep_bitmask & endpoint_flag)
2181                         return -EINVAL;
2182                 *changed_ep_bitmask |= endpoint_flag;
2183         }
2184         return 0;
2185 }
2186
2187 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2188                 struct usb_device *udev,
2189                 struct usb_host_endpoint **eps, unsigned int num_eps)
2190 {
2191         u32 changed_ep_bitmask = 0;
2192         unsigned int slot_id;
2193         unsigned int ep_index;
2194         unsigned int ep_state;
2195         int i;
2196
2197         slot_id = udev->slot_id;
2198         if (!xhci->devs[slot_id])
2199                 return 0;
2200
2201         for (i = 0; i < num_eps; i++) {
2202                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2203                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2204                 /* Are streams already being freed for the endpoint? */
2205                 if (ep_state & EP_GETTING_NO_STREAMS) {
2206                         xhci_warn(xhci, "WARN Can't disable streams for "
2207                                         "endpoint 0x%x\n, "
2208                                         "streams are being disabled already.",
2209                                         eps[i]->desc.bEndpointAddress);
2210                         return 0;
2211                 }
2212                 /* Are there actually any streams to free? */
2213                 if (!(ep_state & EP_HAS_STREAMS) &&
2214                                 !(ep_state & EP_GETTING_STREAMS)) {
2215                         xhci_warn(xhci, "WARN Can't disable streams for "
2216                                         "endpoint 0x%x\n, "
2217                                         "streams are already disabled!",
2218                                         eps[i]->desc.bEndpointAddress);
2219                         xhci_warn(xhci, "WARN xhci_free_streams() called "
2220                                         "with non-streams endpoint\n");
2221                         return 0;
2222                 }
2223                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2224         }
2225         return changed_ep_bitmask;
2226 }
2227
2228 /*
2229  * The USB device drivers use this function (though the HCD interface in USB
2230  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
2231  * coordinate mass storage command queueing across multiple endpoints (basically
2232  * a stream ID == a task ID).
2233  *
2234  * Setting up streams involves allocating the same size stream context array
2235  * for each endpoint and issuing a configure endpoint command for all endpoints.
2236  *
2237  * Don't allow the call to succeed if one endpoint only supports one stream
2238  * (which means it doesn't support streams at all).
2239  *
2240  * Drivers may get less stream IDs than they asked for, if the host controller
2241  * hardware or endpoints claim they can't support the number of requested
2242  * stream IDs.
2243  */
2244 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2245                 struct usb_host_endpoint **eps, unsigned int num_eps,
2246                 unsigned int num_streams, gfp_t mem_flags)
2247 {
2248         int i, ret;
2249         struct xhci_hcd *xhci;
2250         struct xhci_virt_device *vdev;
2251         struct xhci_command *config_cmd;
2252         unsigned int ep_index;
2253         unsigned int num_stream_ctxs;
2254         unsigned long flags;
2255         u32 changed_ep_bitmask = 0;
2256
2257         if (!eps)
2258                 return -EINVAL;
2259
2260         /* Add one to the number of streams requested to account for
2261          * stream 0 that is reserved for xHCI usage.
2262          */
2263         num_streams += 1;
2264         xhci = hcd_to_xhci(hcd);
2265         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2266                         num_streams);
2267
2268         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2269         if (!config_cmd) {
2270                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2271                 return -ENOMEM;
2272         }
2273
2274         /* Check to make sure all endpoints are not already configured for
2275          * streams.  While we're at it, find the maximum number of streams that
2276          * all the endpoints will support and check for duplicate endpoints.
2277          */
2278         spin_lock_irqsave(&xhci->lock, flags);
2279         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2280                         num_eps, &num_streams, &changed_ep_bitmask);
2281         if (ret < 0) {
2282                 xhci_free_command(xhci, config_cmd);
2283                 spin_unlock_irqrestore(&xhci->lock, flags);
2284                 return ret;
2285         }
2286         if (num_streams <= 1) {
2287                 xhci_warn(xhci, "WARN: endpoints can't handle "
2288                                 "more than one stream.\n");
2289                 xhci_free_command(xhci, config_cmd);
2290                 spin_unlock_irqrestore(&xhci->lock, flags);
2291                 return -EINVAL;
2292         }
2293         vdev = xhci->devs[udev->slot_id];
2294         /* Mark each endpoint as being in transition, so
2295          * xhci_urb_enqueue() will reject all URBs.
2296          */
2297         for (i = 0; i < num_eps; i++) {
2298                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2299                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2300         }
2301         spin_unlock_irqrestore(&xhci->lock, flags);
2302
2303         /* Setup internal data structures and allocate HW data structures for
2304          * streams (but don't install the HW structures in the input context
2305          * until we're sure all memory allocation succeeded).
2306          */
2307         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2308         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2309                         num_stream_ctxs, num_streams);
2310
2311         for (i = 0; i < num_eps; i++) {
2312                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2313                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2314                                 num_stream_ctxs,
2315                                 num_streams, mem_flags);
2316                 if (!vdev->eps[ep_index].stream_info)
2317                         goto cleanup;
2318                 /* Set maxPstreams in endpoint context and update deq ptr to
2319                  * point to stream context array. FIXME
2320                  */
2321         }
2322
2323         /* Set up the input context for a configure endpoint command. */
2324         for (i = 0; i < num_eps; i++) {
2325                 struct xhci_ep_ctx *ep_ctx;
2326
2327                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2328                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2329
2330                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2331                                 vdev->out_ctx, ep_index);
2332                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2333                                 vdev->eps[ep_index].stream_info);
2334         }
2335         /* Tell the HW to drop its old copy of the endpoint context info
2336          * and add the updated copy from the input context.
2337          */
2338         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2339                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2340
2341         /* Issue and wait for the configure endpoint command */
2342         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2343                         false, false);
2344
2345         /* xHC rejected the configure endpoint command for some reason, so we
2346          * leave the old ring intact and free our internal streams data
2347          * structure.
2348          */
2349         if (ret < 0)
2350                 goto cleanup;
2351
2352         spin_lock_irqsave(&xhci->lock, flags);
2353         for (i = 0; i < num_eps; i++) {
2354                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2355                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2356                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2357                          udev->slot_id, ep_index);
2358                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2359         }
2360         xhci_free_command(xhci, config_cmd);
2361         spin_unlock_irqrestore(&xhci->lock, flags);
2362
2363         /* Subtract 1 for stream 0, which drivers can't use */
2364         return num_streams - 1;
2365
2366 cleanup:
2367         /* If it didn't work, free the streams! */
2368         for (i = 0; i < num_eps; i++) {
2369                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2370                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2371                 vdev->eps[ep_index].stream_info = NULL;
2372                 /* FIXME Unset maxPstreams in endpoint context and
2373                  * update deq ptr to point to normal string ring.
2374                  */
2375                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2376                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2377                 xhci_endpoint_zero(xhci, vdev, eps[i]);
2378         }
2379         xhci_free_command(xhci, config_cmd);
2380         return -ENOMEM;
2381 }
2382
2383 /* Transition the endpoint from using streams to being a "normal" endpoint
2384  * without streams.
2385  *
2386  * Modify the endpoint context state, submit a configure endpoint command,
2387  * and free all endpoint rings for streams if that completes successfully.
2388  */
2389 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
2390                 struct usb_host_endpoint **eps, unsigned int num_eps,
2391                 gfp_t mem_flags)
2392 {
2393         int i, ret;
2394         struct xhci_hcd *xhci;
2395         struct xhci_virt_device *vdev;
2396         struct xhci_command *command;
2397         unsigned int ep_index;
2398         unsigned long flags;
2399         u32 changed_ep_bitmask;
2400
2401         xhci = hcd_to_xhci(hcd);
2402         vdev = xhci->devs[udev->slot_id];
2403
2404         /* Set up a configure endpoint command to remove the streams rings */
2405         spin_lock_irqsave(&xhci->lock, flags);
2406         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
2407                         udev, eps, num_eps);
2408         if (changed_ep_bitmask == 0) {
2409                 spin_unlock_irqrestore(&xhci->lock, flags);
2410                 return -EINVAL;
2411         }
2412
2413         /* Use the xhci_command structure from the first endpoint.  We may have
2414          * allocated too many, but the driver may call xhci_free_streams() for
2415          * each endpoint it grouped into one call to xhci_alloc_streams().
2416          */
2417         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
2418         command = vdev->eps[ep_index].stream_info->free_streams_command;
2419         for (i = 0; i < num_eps; i++) {
2420                 struct xhci_ep_ctx *ep_ctx;
2421
2422                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2423                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
2424                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
2425                         EP_GETTING_NO_STREAMS;
2426
2427                 xhci_endpoint_copy(xhci, command->in_ctx,
2428                                 vdev->out_ctx, ep_index);
2429                 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
2430                                 &vdev->eps[ep_index]);
2431         }
2432         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
2433                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2434         spin_unlock_irqrestore(&xhci->lock, flags);
2435
2436         /* Issue and wait for the configure endpoint command,
2437          * which must succeed.
2438          */
2439         ret = xhci_configure_endpoint(xhci, udev, command,
2440                         false, true);
2441
2442         /* xHC rejected the configure endpoint command for some reason, so we
2443          * leave the streams rings intact.
2444          */
2445         if (ret < 0)
2446                 return ret;
2447
2448         spin_lock_irqsave(&xhci->lock, flags);
2449         for (i = 0; i < num_eps; i++) {
2450                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2451                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2452                 vdev->eps[ep_index].stream_info = NULL;
2453                 /* FIXME Unset maxPstreams in endpoint context and
2454                  * update deq ptr to point to normal string ring.
2455                  */
2456                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
2457                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2458         }
2459         spin_unlock_irqrestore(&xhci->lock, flags);
2460
2461         return 0;
2462 }
2463
2464 /*
2465  * Deletes endpoint resources for endpoints that were active before a Reset
2466  * Device command, or a Disable Slot command.  The Reset Device command leaves
2467  * the control endpoint intact, whereas the Disable Slot command deletes it.
2468  *
2469  * Must be called with xhci->lock held.
2470  */
2471 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
2472         struct xhci_virt_device *virt_dev, bool drop_control_ep)
2473 {
2474         int i;
2475         unsigned int num_dropped_eps = 0;
2476         unsigned int drop_flags = 0;
2477
2478         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
2479                 if (virt_dev->eps[i].ring) {
2480                         drop_flags |= 1 << i;
2481                         num_dropped_eps++;
2482                 }
2483         }
2484         xhci->num_active_eps -= num_dropped_eps;
2485         if (num_dropped_eps)
2486                 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
2487                                 "%u now active.\n",
2488                                 num_dropped_eps, drop_flags,
2489                                 xhci->num_active_eps);
2490 }
2491
2492 /*
2493  * This submits a Reset Device Command, which will set the device state to 0,
2494  * set the device address to 0, and disable all the endpoints except the default
2495  * control endpoint.  The USB core should come back and call
2496  * xhci_address_device(), and then re-set up the configuration.  If this is
2497  * called because of a usb_reset_and_verify_device(), then the old alternate
2498  * settings will be re-installed through the normal bandwidth allocation
2499  * functions.
2500  *
2501  * Wait for the Reset Device command to finish.  Remove all structures
2502  * associated with the endpoints that were disabled.  Clear the input device
2503  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
2504  *
2505  * If the virt_dev to be reset does not exist or does not match the udev,
2506  * it means the device is lost, possibly due to the xHC restore error and
2507  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
2508  * re-allocate the device.
2509  */
2510 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
2511 {
2512         int ret, i;
2513         unsigned long flags;
2514         struct xhci_hcd *xhci;
2515         unsigned int slot_id;
2516         struct xhci_virt_device *virt_dev;
2517         struct xhci_command *reset_device_cmd;
2518         int timeleft;
2519         int last_freed_endpoint;
2520         struct xhci_slot_ctx *slot_ctx;
2521
2522         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
2523         if (ret <= 0)
2524                 return ret;
2525         xhci = hcd_to_xhci(hcd);
2526         slot_id = udev->slot_id;
2527         virt_dev = xhci->devs[slot_id];
2528         if (!virt_dev) {
2529                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2530                                 "not exist. Re-allocate the device\n", slot_id);
2531                 ret = xhci_alloc_dev(hcd, udev);
2532                 if (ret == 1)
2533                         return 0;
2534                 else
2535                         return -EINVAL;
2536         }
2537
2538         if (virt_dev->udev != udev) {
2539                 /* If the virt_dev and the udev does not match, this virt_dev
2540                  * may belong to another udev.
2541                  * Re-allocate the device.
2542                  */
2543                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2544                                 "not match the udev. Re-allocate the device\n",
2545                                 slot_id);
2546                 ret = xhci_alloc_dev(hcd, udev);
2547                 if (ret == 1)
2548                         return 0;
2549                 else
2550                         return -EINVAL;
2551         }
2552
2553         /* If device is not setup, there is no point in resetting it */
2554         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2555         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
2556                                                 SLOT_STATE_DISABLED)
2557                 return 0;
2558
2559         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
2560         /* Allocate the command structure that holds the struct completion.
2561          * Assume we're in process context, since the normal device reset
2562          * process has to wait for the device anyway.  Storage devices are
2563          * reset as part of error handling, so use GFP_NOIO instead of
2564          * GFP_KERNEL.
2565          */
2566         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
2567         if (!reset_device_cmd) {
2568                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
2569                 return -ENOMEM;
2570         }
2571
2572         /* Attempt to submit the Reset Device command to the command ring */
2573         spin_lock_irqsave(&xhci->lock, flags);
2574         reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
2575
2576         /* Enqueue pointer can be left pointing to the link TRB,
2577          * we must handle that
2578          */
2579         if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
2580                 reset_device_cmd->command_trb =
2581                         xhci->cmd_ring->enq_seg->next->trbs;
2582
2583         list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
2584         ret = xhci_queue_reset_device(xhci, slot_id);
2585         if (ret) {
2586                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2587                 list_del(&reset_device_cmd->cmd_list);
2588                 spin_unlock_irqrestore(&xhci->lock, flags);
2589                 goto command_cleanup;
2590         }
2591         xhci_ring_cmd_db(xhci);
2592         spin_unlock_irqrestore(&xhci->lock, flags);
2593
2594         /* Wait for the Reset Device command to finish */
2595         timeleft = wait_for_completion_interruptible_timeout(
2596                         reset_device_cmd->completion,
2597                         USB_CTRL_SET_TIMEOUT);
2598         if (timeleft <= 0) {
2599                 xhci_warn(xhci, "%s while waiting for reset device command\n",
2600                                 timeleft == 0 ? "Timeout" : "Signal");
2601                 spin_lock_irqsave(&xhci->lock, flags);
2602                 /* The timeout might have raced with the event ring handler, so
2603                  * only delete from the list if the item isn't poisoned.
2604                  */
2605                 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
2606                         list_del(&reset_device_cmd->cmd_list);
2607                 spin_unlock_irqrestore(&xhci->lock, flags);
2608                 ret = -ETIME;
2609                 goto command_cleanup;
2610         }
2611
2612         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2613          * unless we tried to reset a slot ID that wasn't enabled,
2614          * or the device wasn't in the addressed or configured state.
2615          */
2616         ret = reset_device_cmd->status;
2617         switch (ret) {
2618         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
2619         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
2620                 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
2621                                 slot_id,
2622                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
2623                 xhci_info(xhci, "Not freeing device rings.\n");
2624                 /* Don't treat this as an error.  May change my mind later. */
2625                 ret = 0;
2626                 goto command_cleanup;
2627         case COMP_SUCCESS:
2628                 xhci_dbg(xhci, "Successful reset device command.\n");
2629                 break;
2630         default:
2631                 if (xhci_is_vendor_info_code(xhci, ret))
2632                         break;
2633                 xhci_warn(xhci, "Unknown completion code %u for "
2634                                 "reset device command.\n", ret);
2635                 ret = -EINVAL;
2636                 goto command_cleanup;
2637         }
2638
2639         /* Free up host controller endpoint resources */
2640         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2641                 spin_lock_irqsave(&xhci->lock, flags);
2642                 /* Don't delete the default control endpoint resources */
2643                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
2644                 spin_unlock_irqrestore(&xhci->lock, flags);
2645         }
2646
2647         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2648         last_freed_endpoint = 1;
2649         for (i = 1; i < 31; ++i) {
2650                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
2651
2652                 if (ep->ep_state & EP_HAS_STREAMS) {
2653                         xhci_free_stream_info(xhci, ep->stream_info);
2654                         ep->stream_info = NULL;
2655                         ep->ep_state &= ~EP_HAS_STREAMS;
2656                 }
2657
2658                 if (ep->ring) {
2659                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2660                         last_freed_endpoint = i;
2661                 }
2662         }
2663         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
2664         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
2665         ret = 0;
2666
2667 command_cleanup:
2668         xhci_free_command(xhci, reset_device_cmd);
2669         return ret;
2670 }
2671
2672 /*
2673  * At this point, the struct usb_device is about to go away, the device has
2674  * disconnected, and all traffic has been stopped and the endpoints have been
2675  * disabled.  Free any HC data structures associated with that device.
2676  */
2677 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
2678 {
2679         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2680         struct xhci_virt_device *virt_dev;
2681         unsigned long flags;
2682         u32 state;
2683         int i, ret;
2684
2685         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2686         /* If the host is halted due to driver unload, we still need to free the
2687          * device.
2688          */
2689         if (ret <= 0 && ret != -ENODEV)
2690                 return;
2691
2692         virt_dev = xhci->devs[udev->slot_id];
2693
2694         /* Stop any wayward timer functions (which may grab the lock) */
2695         for (i = 0; i < 31; ++i) {
2696                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
2697                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
2698         }
2699
2700         spin_lock_irqsave(&xhci->lock, flags);
2701         /* Don't disable the slot if the host controller is dead. */
2702         state = xhci_readl(xhci, &xhci->op_regs->status);
2703         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
2704                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
2705                 xhci_free_virt_device(xhci, udev->slot_id);
2706                 spin_unlock_irqrestore(&xhci->lock, flags);
2707                 return;
2708         }
2709
2710         if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
2711                 spin_unlock_irqrestore(&xhci->lock, flags);
2712                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2713                 return;
2714         }
2715         xhci_ring_cmd_db(xhci);
2716         spin_unlock_irqrestore(&xhci->lock, flags);
2717         /*
2718          * Event command completion handler will free any data structures
2719          * associated with the slot.  XXX Can free sleep?
2720          */
2721 }
2722
2723 /*
2724  * Checks if we have enough host controller resources for the default control
2725  * endpoint.
2726  *
2727  * Must be called with xhci->lock held.
2728  */
2729 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
2730 {
2731         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
2732                 xhci_dbg(xhci, "Not enough ep ctxs: "
2733                                 "%u active, need to add 1, limit is %u.\n",
2734                                 xhci->num_active_eps, xhci->limit_active_eps);
2735                 return -ENOMEM;
2736         }
2737         xhci->num_active_eps += 1;
2738         xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
2739                         xhci->num_active_eps);
2740         return 0;
2741 }
2742
2743
2744 /*
2745  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2746  * timed out, or allocating memory failed.  Returns 1 on success.
2747  */
2748 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
2749 {
2750         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2751         unsigned long flags;
2752         int timeleft;
2753         int ret;
2754
2755         spin_lock_irqsave(&xhci->lock, flags);
2756         ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
2757         if (ret) {
2758                 spin_unlock_irqrestore(&xhci->lock, flags);
2759                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2760                 return 0;
2761         }
2762         xhci_ring_cmd_db(xhci);
2763         spin_unlock_irqrestore(&xhci->lock, flags);
2764
2765         /* XXX: how much time for xHC slot assignment? */
2766         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2767                         USB_CTRL_SET_TIMEOUT);
2768         if (timeleft <= 0) {
2769                 xhci_warn(xhci, "%s while waiting for a slot\n",
2770                                 timeleft == 0 ? "Timeout" : "Signal");
2771                 /* FIXME cancel the enable slot request */
2772                 return 0;
2773         }
2774
2775         if (!xhci->slot_id) {
2776                 xhci_err(xhci, "Error while assigning device slot ID\n");
2777                 return 0;
2778         }
2779
2780         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2781                 spin_lock_irqsave(&xhci->lock, flags);
2782                 ret = xhci_reserve_host_control_ep_resources(xhci);
2783                 if (ret) {
2784                         spin_unlock_irqrestore(&xhci->lock, flags);
2785                         xhci_warn(xhci, "Not enough host resources, "
2786                                         "active endpoint contexts = %u\n",
2787                                         xhci->num_active_eps);
2788                         goto disable_slot;
2789                 }
2790                 spin_unlock_irqrestore(&xhci->lock, flags);
2791         }
2792         /* Use GFP_NOIO, since this function can be called from
2793          * xhci_discover_or_reset_device(), which may be called as part of
2794          * mass storage driver error handling.
2795          */
2796         if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
2797                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
2798                 goto disable_slot;
2799         }
2800         udev->slot_id = xhci->slot_id;
2801         /* Is this a LS or FS device under a HS hub? */
2802         /* Hub or peripherial? */
2803         return 1;
2804
2805 disable_slot:
2806         /* Disable slot, if we can do it without mem alloc */
2807         spin_lock_irqsave(&xhci->lock, flags);
2808         if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
2809                 xhci_ring_cmd_db(xhci);
2810         spin_unlock_irqrestore(&xhci->lock, flags);
2811         return 0;
2812 }
2813
2814 /*
2815  * Issue an Address Device command (which will issue a SetAddress request to
2816  * the device).
2817  * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2818  * we should only issue and wait on one address command at the same time.
2819  *
2820  * We add one to the device address issued by the hardware because the USB core
2821  * uses address 1 for the root hubs (even though they're not really devices).
2822  */
2823 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2824 {
2825         unsigned long flags;
2826         int timeleft;
2827         struct xhci_virt_device *virt_dev;
2828         int ret = 0;
2829         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2830         struct xhci_slot_ctx *slot_ctx;
2831         struct xhci_input_control_ctx *ctrl_ctx;
2832         u64 temp_64;
2833
2834         if (!udev->slot_id) {
2835                 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
2836                 return -EINVAL;
2837         }
2838
2839         virt_dev = xhci->devs[udev->slot_id];
2840
2841         if (WARN_ON(!virt_dev)) {
2842                 /*
2843                  * In plug/unplug torture test with an NEC controller,
2844                  * a zero-dereference was observed once due to virt_dev = 0.
2845                  * Print useful debug rather than crash if it is observed again!
2846                  */
2847                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
2848                         udev->slot_id);
2849                 return -EINVAL;
2850         }
2851
2852         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2853         /*
2854          * If this is the first Set Address since device plug-in or
2855          * virt_device realloaction after a resume with an xHCI power loss,
2856          * then set up the slot context.
2857          */
2858         if (!slot_ctx->dev_info)
2859                 xhci_setup_addressable_virt_dev(xhci, udev);
2860         /* Otherwise, update the control endpoint ring enqueue pointer. */
2861         else
2862                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
2863         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2864         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2865
2866         spin_lock_irqsave(&xhci->lock, flags);
2867         ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
2868                                         udev->slot_id);
2869         if (ret) {
2870                 spin_unlock_irqrestore(&xhci->lock, flags);
2871                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2872                 return ret;
2873         }
2874         xhci_ring_cmd_db(xhci);
2875         spin_unlock_irqrestore(&xhci->lock, flags);
2876
2877         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2878         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2879                         USB_CTRL_SET_TIMEOUT);
2880         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2881          * the SetAddress() "recovery interval" required by USB and aborting the
2882          * command on a timeout.
2883          */
2884         if (timeleft <= 0) {
2885                 xhci_warn(xhci, "%s while waiting for a slot\n",
2886                                 timeleft == 0 ? "Timeout" : "Signal");
2887                 /* FIXME cancel the address device command */
2888                 return -ETIME;
2889         }
2890
2891         switch (virt_dev->cmd_status) {
2892         case COMP_CTX_STATE:
2893         case COMP_EBADSLT:
2894                 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
2895                                 udev->slot_id);
2896                 ret = -EINVAL;
2897                 break;
2898         case COMP_TX_ERR:
2899                 dev_warn(&udev->dev, "Device not responding to set address.\n");
2900                 ret = -EPROTO;
2901                 break;
2902         case COMP_DEV_ERR:
2903                 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
2904                                 "device command.\n");
2905                 ret = -ENODEV;
2906                 break;
2907         case COMP_SUCCESS:
2908                 xhci_dbg(xhci, "Successful Address Device command\n");
2909                 break;
2910         default:
2911                 xhci_err(xhci, "ERROR: unexpected command completion "
2912                                 "code 0x%x.\n", virt_dev->cmd_status);
2913                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2914                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2915                 ret = -EINVAL;
2916                 break;
2917         }
2918         if (ret) {
2919                 return ret;
2920         }
2921         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2922         xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2923         xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2924                  udev->slot_id,
2925                  &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2926                  (unsigned long long)
2927                  le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
2928         xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2929                         (unsigned long long)virt_dev->out_ctx->dma);
2930         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2931         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2932         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2933         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2934         /*
2935          * USB core uses address 1 for the roothubs, so we add one to the
2936          * address given back to us by the HC.
2937          */
2938         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2939         /* Use kernel assigned address for devices; store xHC assigned
2940          * address locally. */
2941         virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
2942                 + 1;
2943         /* Zero the input context control for later use */
2944         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2945         ctrl_ctx->add_flags = 0;
2946         ctrl_ctx->drop_flags = 0;
2947
2948         xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
2949
2950         return 0;
2951 }
2952
2953 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2954  * internal data structures for the device.
2955  */
2956 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2957                         struct usb_tt *tt, gfp_t mem_flags)
2958 {
2959         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2960         struct xhci_virt_device *vdev;
2961         struct xhci_command *config_cmd;
2962         struct xhci_input_control_ctx *ctrl_ctx;
2963         struct xhci_slot_ctx *slot_ctx;
2964         unsigned long flags;
2965         unsigned think_time;
2966         int ret;
2967
2968         /* Ignore root hubs */
2969         if (!hdev->parent)
2970                 return 0;
2971
2972         vdev = xhci->devs[hdev->slot_id];
2973         if (!vdev) {
2974                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
2975                 return -EINVAL;
2976         }
2977         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2978         if (!config_cmd) {
2979                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2980                 return -ENOMEM;
2981         }
2982
2983         spin_lock_irqsave(&xhci->lock, flags);
2984         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
2985         ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
2986         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2987         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
2988         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
2989         if (tt->multi)
2990                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
2991         if (xhci->hci_version > 0x95) {
2992                 xhci_dbg(xhci, "xHCI version %x needs hub "
2993                                 "TT think time and number of ports\n",
2994                                 (unsigned int) xhci->hci_version);
2995                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
2996                 /* Set TT think time - convert from ns to FS bit times.
2997                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
2998                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
2999                  *
3000                  * xHCI 1.0: this field shall be 0 if the device is not a
3001                  * High-spped hub.
3002                  */
3003                 think_time = tt->think_time;
3004                 if (think_time != 0)
3005                         think_time = (think_time / 666) - 1;
3006                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
3007                         slot_ctx->tt_info |=
3008                                 cpu_to_le32(TT_THINK_TIME(think_time));
3009         } else {
3010                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
3011                                 "TT think time or number of ports\n",
3012                                 (unsigned int) xhci->hci_version);
3013         }
3014         slot_ctx->dev_state = 0;
3015         spin_unlock_irqrestore(&xhci->lock, flags);
3016
3017         xhci_dbg(xhci, "Set up %s for hub device.\n",
3018                         (xhci->hci_version > 0x95) ?
3019                         "configure endpoint" : "evaluate context");
3020         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
3021         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
3022
3023         /* Issue and wait for the configure endpoint or
3024          * evaluate context command.
3025          */
3026         if (xhci->hci_version > 0x95)
3027                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3028                                 false, false);
3029         else
3030                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3031                                 true, false);
3032
3033         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
3034         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
3035
3036         xhci_free_command(xhci, config_cmd);
3037         return ret;
3038 }
3039
3040 int xhci_get_frame(struct usb_hcd *hcd)
3041 {
3042         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3043         /* EHCI mods by the periodic size.  Why? */
3044         return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
3045 }
3046
3047 MODULE_DESCRIPTION(DRIVER_DESC);
3048 MODULE_AUTHOR(DRIVER_AUTHOR);
3049 MODULE_LICENSE("GPL");
3050
3051 static int __init xhci_hcd_init(void)
3052 {
3053 #ifdef CONFIG_PCI
3054         int retval = 0;
3055
3056         retval = xhci_register_pci();
3057
3058         if (retval < 0) {
3059                 printk(KERN_DEBUG "Problem registering PCI driver.");
3060                 return retval;
3061         }
3062 #endif
3063         /*
3064          * Check the compiler generated sizes of structures that must be laid
3065          * out in specific ways for hardware access.
3066          */
3067         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3068         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
3069         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
3070         /* xhci_device_control has eight fields, and also
3071          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
3072          */
3073         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
3074         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
3075         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
3076         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
3077         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
3078         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
3079         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
3080         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3081         return 0;
3082 }
3083 module_init(xhci_hcd_init);
3084
3085 static void __exit xhci_hcd_cleanup(void)
3086 {
3087 #ifdef CONFIG_PCI
3088         xhci_unregister_pci();
3089 #endif
3090 }
3091 module_exit(xhci_hcd_cleanup);