drivers/scsi/isci/core/scic_sds_controller.c

   1 /*
   2  * This file is provided under a dual BSD/GPLv2 license.  When using or
   3  * redistributing this file, you may do so under either license.
   4  *
   5  * GPL LICENSE SUMMARY
   6  *
   7  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of version 2 of the GNU General Public License as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * BSD LICENSE
  25  *
  26  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27  * All rights reserved.
  28  *
  29  * Redistribution and use in source and binary forms, with or without
  30  * modification, are permitted provided that the following conditions
  31  * are met:
  32  *
  33  *   * Redistributions of source code must retain the above copyright
  34  *     notice, this list of conditions and the following disclaimer.
  35  *   * Redistributions in binary form must reproduce the above copyright
  36  *     notice, this list of conditions and the following disclaimer in
  37  *     the documentation and/or other materials provided with the
  38  *     distribution.
  39  *   * Neither the name of Intel Corporation nor the names of its
  40  *     contributors may be used to endorse or promote products derived
  41  *     from this software without specific prior written permission.
  42  *
  43  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  49  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  50  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  51  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  52  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  53  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54  */
  55
  56 #include <linux/device.h>
  57 #include "scic_controller.h"
  58 #include "scic_phy.h"
  59 #include "scic_port.h"
  60 #include "scic_remote_device.h"
  61 #include "scic_sds_controller.h"
  62 #include "scic_sds_controller_registers.h"
  63 #include "scic_sds_pci.h"
  64 #include "scic_sds_phy.h"
  65 #include "scic_sds_port_configuration_agent.h"
  66 #include "scic_sds_port.h"
  67 #include "scic_sds_remote_device.h"
  68 #include "scic_sds_request.h"
  69 #include "sci_environment.h"
  70 #include "sci_util.h"
  71 #include "scu_completion_codes.h"
  72 #include "scu_constants.h"
  73 #include "scu_event_codes.h"
  74 #include "scu_remote_node_context.h"
  75 #include "scu_task_context.h"
  76 #include "scu_unsolicited_frame.h"
  77
  78 #define SCU_CONTEXT_RAM_INIT_STALL_TIME      200
  79
  80 /**
  81  * smu_dcc_get_max_ports() -
  82  *
  83  * This macro returns the maximum number of logical ports supported by the
  84  * hardware. The caller passes in the value read from the device context
  85  * capacity register and this macro will mash and shift the value appropriately.
  86  */
  87 #define smu_dcc_get_max_ports(dcc_value) \
  88         (\
  89                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
  90                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
  91         )
  92
  93 /**
  94  * smu_dcc_get_max_task_context() -
  95  *
  96  * This macro returns the maximum number of task contexts supported by the
  97  * hardware. The caller passes in the value read from the device context
  98  * capacity register and this macro will mash and shift the value appropriately.
  99  */
 100 #define smu_dcc_get_max_task_context(dcc_value) \
 101         (\
 102                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
 103                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
 104         )
 105
 106 /**
 107  * smu_dcc_get_max_remote_node_context() -
 108  *
 109  * This macro returns the maximum number of remote node contexts supported by
 110  * the hardware. The caller passes in the value read from the device context
 111  * capacity register and this macro will mash and shift the value appropriately.
 112  */
 113 #define smu_dcc_get_max_remote_node_context(dcc_value) \
 114         (\
 115                 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
 116                  >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
 117         )
 118
 119
 120 static void scic_sds_controller_power_control_timer_handler(
 121         void *controller);
 122 #define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT  3
 123 #define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT  3
 124
 125 /**
 126  *
 127  *
 128  * The number of milliseconds to wait for a phy to start.
 129  */
 130 #define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT      100
 131
 132 /**
 133  *
 134  *
 135  * The number of milliseconds to wait while a given phy is consuming power
 136  * before allowing another set of phys to consume power. Ultimately, this will
 137  * be specified by OEM parameter.
 138  */
 139 #define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
 140
 141 /**
 142  * COMPLETION_QUEUE_CYCLE_BIT() -
 143  *
 144  * This macro will return the cycle bit of the completion queue entry
 145  */
 146 #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
 147
 148 /**
 149  * NORMALIZE_GET_POINTER() -
 150  *
 151  * This macro will normalize the completion queue get pointer so its value can
 152  * be used as an index into an array
 153  */
 154 #define NORMALIZE_GET_POINTER(x) \
 155         ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
 156
 157 /**
 158  * NORMALIZE_PUT_POINTER() -
 159  *
 160  * This macro will normalize the completion queue put pointer so its value can
 161  * be used as an array inde
 162  */
 163 #define NORMALIZE_PUT_POINTER(x) \
 164         ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
 165
 166
 167 /**
 168  * NORMALIZE_GET_POINTER_CYCLE_BIT() -
 169  *
 170  * This macro will normalize the completion queue cycle pointer so it matches
 171  * the completion queue cycle bit
 172  */
 173 #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
 174         ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
 175
 176 /**
 177  * NORMALIZE_EVENT_POINTER() -
 178  *
 179  * This macro will normalize the completion queue event entry so its value can
 180  * be used as an index.
 181  */
 182 #define NORMALIZE_EVENT_POINTER(x) \
 183         (\
 184                 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
 185                 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
 186         )
 187
 188 /**
 189  * INCREMENT_COMPLETION_QUEUE_GET() -
 190  *
 191  * This macro will increment the controllers completion queue index value and
 192  * possibly toggle the cycle bit if the completion queue index wraps back to 0.
 193  */
 194 #define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \
 195         INCREMENT_QUEUE_GET(\
 196                 (index), \
 197                 (cycle), \
 198                 (controller)->completion_queue_entries, \
 199                 SMU_CQGR_CYCLE_BIT \
 200                 )
 201
 202 /**
 203  * INCREMENT_EVENT_QUEUE_GET() -
 204  *
 205  * This macro will increment the controllers event queue index value and
 206  * possibly toggle the event cycle bit if the event queue index wraps back to 0.
 207  */
 208 #define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \
 209         INCREMENT_QUEUE_GET(\
 210                 (index), \
 211                 (cycle), \
 212                 (controller)->completion_event_entries, \
 213                 SMU_CQGR_EVENT_CYCLE_BIT \
 214                 )
 215
 216 struct sci_base_memory_descriptor_list *
 217 sci_controller_get_memory_descriptor_list_handle(struct scic_sds_controller *scic)
 218 {
 219        return &scic->parent.mdl;
 220 }
 221
 222 /*
 223  * ****************************************************************************-
 224  * * SCIC SDS Controller Initialization Methods
 225  * ****************************************************************************- */
 226
 227 /**
 228  * This timer is used to start another phy after we have given up on the
 229  *    previous phy to transition to the ready state.
 230  *
 231  *
 232  */
 233 static void scic_sds_controller_phy_startup_timeout_handler(
 234         void *controller)
 235 {
 236         enum sci_status status;
 237         struct scic_sds_controller *this_controller;
 238
 239         this_controller = (struct scic_sds_controller *)controller;
 240
 241         this_controller->phy_startup_timer_pending = false;
 242
 243         status = SCI_FAILURE;
 244
 245         while (status != SCI_SUCCESS) {
 246                 status = scic_sds_controller_start_next_phy(this_controller);
 247         }
 248 }
 249
 250 /**
 251  *
 252  *
 253  * This method initializes the phy startup operations for controller start.
 254  */
 255 enum sci_status scic_sds_controller_initialize_phy_startup(
 256         struct scic_sds_controller *this_controller)
 257 {
 258         this_controller->phy_startup_timer = isci_event_timer_create(
 259                 this_controller,
 260                 scic_sds_controller_phy_startup_timeout_handler,
 261                 this_controller
 262                 );
 263
 264         if (this_controller->phy_startup_timer == NULL) {
 265                 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
 266         } else {
 267                 this_controller->next_phy_to_start = 0;
 268                 this_controller->phy_startup_timer_pending = false;
 269         }
 270
 271         return SCI_SUCCESS;
 272 }
 273
 274 /**
 275  *
 276  *
 277  * This method initializes the power control operations for the controller
 278  * object.
 279  */
 280 void scic_sds_controller_initialize_power_control(
 281         struct scic_sds_controller *this_controller)
 282 {
 283         this_controller->power_control.timer = isci_event_timer_create(
 284                 this_controller,
 285                 scic_sds_controller_power_control_timer_handler,
 286                 this_controller
 287                 );
 288
 289         memset(
 290                 this_controller->power_control.requesters,
 291                 0,
 292                 sizeof(this_controller->power_control.requesters)
 293                 );
 294
 295         this_controller->power_control.phys_waiting = 0;
 296 }
 297
 298 /* --------------------------------------------------------------------------- */
 299
 300 #define SCU_REMOTE_NODE_CONTEXT_ALIGNMENT       (32)
 301 #define SCU_TASK_CONTEXT_ALIGNMENT              (256)
 302 #define SCU_UNSOLICITED_FRAME_ADDRESS_ALIGNMENT (64)
 303 #define SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT  (1024)
 304 #define SCU_UNSOLICITED_FRAME_HEADER_ALIGNMENT  (64)
 305
 306 /* --------------------------------------------------------------------------- */
 307
 308 /**
 309  * This method builds the memory descriptor table for this controller.
 310  * @this_controller: This parameter specifies the controller object for which
 311  *    to build the memory table.
 312  *
 313  */
 314 void scic_sds_controller_build_memory_descriptor_table(
 315         struct scic_sds_controller *this_controller)
 316 {
 317         sci_base_mde_construct(
 318                 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
 319                 SCU_COMPLETION_RAM_ALIGNMENT,
 320                 (sizeof(u32) * this_controller->completion_queue_entries),
 321                 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
 322                 );
 323
 324         sci_base_mde_construct(
 325                 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
 326                 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
 327                 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
 328                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 329                 );
 330
 331         sci_base_mde_construct(
 332                 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
 333                 SCU_TASK_CONTEXT_ALIGNMENT,
 334                 this_controller->task_context_entries * sizeof(struct scu_task_context),
 335                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 336                 );
 337
 338         /*
 339          * The UF buffer address table size must be programmed to a power
 340          * of 2.  Find the first power of 2 that is equal to or greater then
 341          * the number of unsolicited frame buffers to be utilized. */
 342         scic_sds_unsolicited_frame_control_set_address_table_count(
 343                 &this_controller->uf_control
 344                 );
 345
 346         sci_base_mde_construct(
 347                 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
 348                 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
 349                 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
 350                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 351                 );
 352 }
 353
 354 /**
 355  * This method validates the driver supplied memory descriptor table.
 356  * @this_controller:
 357  *
 358  * enum sci_status
 359  */
 360 enum sci_status scic_sds_controller_validate_memory_descriptor_table(
 361         struct scic_sds_controller *this_controller)
 362 {
 363         bool mde_list_valid;
 364
 365         mde_list_valid = sci_base_mde_is_valid(
 366                 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
 367                 SCU_COMPLETION_RAM_ALIGNMENT,
 368                 (sizeof(u32) * this_controller->completion_queue_entries),
 369                 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
 370                 );
 371
 372         if (mde_list_valid == false)
 373                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 374
 375         mde_list_valid = sci_base_mde_is_valid(
 376                 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
 377                 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
 378                 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
 379                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 380                 );
 381
 382         if (mde_list_valid == false)
 383                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 384
 385         mde_list_valid = sci_base_mde_is_valid(
 386                 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
 387                 SCU_TASK_CONTEXT_ALIGNMENT,
 388                 this_controller->task_context_entries * sizeof(struct scu_task_context),
 389                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 390                 );
 391
 392         if (mde_list_valid == false)
 393                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 394
 395         mde_list_valid = sci_base_mde_is_valid(
 396                 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
 397                 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
 398                 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
 399                 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
 400                 );
 401
 402         if (mde_list_valid == false)
 403                 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
 404
 405         return SCI_SUCCESS;
 406 }
 407
 408 /**
 409  * This method initializes the controller with the physical memory addresses
 410  *    that are used to communicate with the driver.
 411  * @this_controller:
 412  *
 413  */
 414 void scic_sds_controller_ram_initialization(
 415         struct scic_sds_controller *this_controller)
 416 {
 417         struct sci_physical_memory_descriptor *mde;
 418
 419         /*
 420          * The completion queue is actually placed in cacheable memory
 421          * Therefore it no longer comes out of memory in the MDL. */
 422         mde = &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE];
 423         this_controller->completion_queue = (u32 *)mde->virtual_address;
 424         SMU_CQBAR_WRITE(this_controller, mde->physical_address);
 425
 426         /*
 427          * Program the location of the Remote Node Context table
 428          * into the SCU. */
 429         mde = &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT];
 430         this_controller->remote_node_context_table = (union scu_remote_node_context *)
 431                                                      mde->virtual_address;
 432         SMU_RNCBAR_WRITE(this_controller, mde->physical_address);
 433
 434         /* Program the location of the Task Context table into the SCU. */
 435         mde = &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT];
 436         this_controller->task_context_table = (struct scu_task_context *)
 437                                               mde->virtual_address;
 438         SMU_HTTBAR_WRITE(this_controller, mde->physical_address);
 439
 440         mde = &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER];
 441         scic_sds_unsolicited_frame_control_construct(
 442                 &this_controller->uf_control, mde, this_controller
 443                 );
 444
 445         /*
 446          * Inform the silicon as to the location of the UF headers and
 447          * address table. */
 448         SCU_UFHBAR_WRITE(
 449                 this_controller,
 450                 this_controller->uf_control.headers.physical_address);
 451         SCU_PUFATHAR_WRITE(
 452                 this_controller,
 453                 this_controller->uf_control.address_table.physical_address);
 454 }
 455
 456 /**
 457  * This method initializes the task context data for the controller.
 458  * @this_controller:
 459  *
 460  */
 461 void scic_sds_controller_assign_task_entries(
 462         struct scic_sds_controller *this_controller)
 463 {
 464         u32 task_assignment;
 465
 466         /*
 467          * Assign all the TCs to function 0
 468          * TODO: Do we actually need to read this register to write it back? */
 469         task_assignment = SMU_TCA_READ(this_controller, 0);
 470
 471         task_assignment =
 472                 (
 473                         task_assignment
 474                         | (SMU_TCA_GEN_VAL(STARTING, 0))
 475                         | (SMU_TCA_GEN_VAL(ENDING,  this_controller->task_context_entries - 1))
 476                         | (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE))
 477                 );
 478
 479         SMU_TCA_WRITE(this_controller, 0, task_assignment);
 480 }
 481
 482 /**
 483  * This method initializes the hardware completion queue.
 484  *
 485  *
 486  */
 487 void scic_sds_controller_initialize_completion_queue(
 488         struct scic_sds_controller *this_controller)
 489 {
 490         u32 index;
 491         u32 completion_queue_control_value;
 492         u32 completion_queue_get_value;
 493         u32 completion_queue_put_value;
 494
 495         this_controller->completion_queue_get = 0;
 496
 497         completion_queue_control_value = (
 498                 SMU_CQC_QUEUE_LIMIT_SET(this_controller->completion_queue_entries - 1)
 499                 | SMU_CQC_EVENT_LIMIT_SET(this_controller->completion_event_entries - 1)
 500                 );
 501
 502         SMU_CQC_WRITE(this_controller, completion_queue_control_value);
 503
 504         /* Set the completion queue get pointer and enable the queue */
 505         completion_queue_get_value = (
 506                 (SMU_CQGR_GEN_VAL(POINTER, 0))
 507                 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
 508                 | (SMU_CQGR_GEN_BIT(ENABLE))
 509                 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
 510                 );
 511
 512         SMU_CQGR_WRITE(this_controller, completion_queue_get_value);
 513
 514         /* Set the completion queue put pointer */
 515         completion_queue_put_value = (
 516                 (SMU_CQPR_GEN_VAL(POINTER, 0))
 517                 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
 518                 );
 519
 520         SMU_CQPR_WRITE(this_controller, completion_queue_put_value);
 521
 522         /* Initialize the cycle bit of the completion queue entries */
 523         for (index = 0; index < this_controller->completion_queue_entries; index++) {
 524                 /*
 525                  * If get.cycle_bit != completion_queue.cycle_bit
 526                  * its not a valid completion queue entry
 527                  * so at system start all entries are invalid */
 528                 this_controller->completion_queue[index] = 0x80000000;
 529         }
 530 }
 531
 532 /**
 533  * This method initializes the hardware unsolicited frame queue.
 534  *
 535  *
 536  */
 537 void scic_sds_controller_initialize_unsolicited_frame_queue(
 538         struct scic_sds_controller *this_controller)
 539 {
 540         u32 frame_queue_control_value;
 541         u32 frame_queue_get_value;
 542         u32 frame_queue_put_value;
 543
 544         /* Write the queue size */
 545         frame_queue_control_value =
 546                 SCU_UFQC_GEN_VAL(QUEUE_SIZE, this_controller->uf_control.address_table.count);
 547
 548         SCU_UFQC_WRITE(this_controller, frame_queue_control_value);
 549
 550         /* Setup the get pointer for the unsolicited frame queue */
 551         frame_queue_get_value = (
 552                 SCU_UFQGP_GEN_VAL(POINTER, 0)
 553                 |  SCU_UFQGP_GEN_BIT(ENABLE_BIT)
 554                 );
 555
 556         SCU_UFQGP_WRITE(this_controller, frame_queue_get_value);
 557
 558         /* Setup the put pointer for the unsolicited frame queue */
 559         frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
 560
 561         SCU_UFQPP_WRITE(this_controller, frame_queue_put_value);
 562 }
 563
 564 /**
 565  * This method enables the hardware port task scheduler.
 566  *
 567  *
 568  */
 569 void scic_sds_controller_enable_port_task_scheduler(
 570         struct scic_sds_controller *this_controller)
 571 {
 572         u32 port_task_scheduler_value;
 573
 574         port_task_scheduler_value = SCU_PTSGCR_READ(this_controller);
 575
 576         port_task_scheduler_value |=
 577                 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) | SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
 578
 579         SCU_PTSGCR_WRITE(this_controller, port_task_scheduler_value);
 580 }
 581
 582 /* --------------------------------------------------------------------------- */
 583
 584 /**
 585  *
 586  *
 587  * This macro is used to delay between writes to the AFE registers during AFE
 588  * initialization.
 589  */
 590 #define AFE_REGISTER_WRITE_DELAY 10
 591
 592 /* Initialize the AFE for this phy index. We need to read the AFE setup from
 593  * the OEM parameters none
 594  */
 595 void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
 596 {
 597         u32 afe_status;
 598         u32 phy_id;
 599
 600         /* Clear DFX Status registers */
 601         scu_afe_register_write(scic, afe_dfx_master_control0, 0x0081000f);
 602         udelay(AFE_REGISTER_WRITE_DELAY);
 603
 604         /* Configure bias currents to normal */
 605         if (is_a0())
 606                 scu_afe_register_write(scic, afe_bias_control, 0x00005500);
 607         else
 608                 scu_afe_register_write(scic, afe_bias_control, 0x00005A00);
 609
 610         udelay(AFE_REGISTER_WRITE_DELAY);
 611
 612         /* Enable PLL */
 613         if (is_b0())
 614                 scu_afe_register_write(scic, afe_pll_control0, 0x80040A08);
 615         else
 616                 scu_afe_register_write(scic, afe_pll_control0, 0x80040908);
 617
 618         udelay(AFE_REGISTER_WRITE_DELAY);
 619
 620         /* Wait for the PLL to lock */
 621         do {
 622                 afe_status = scu_afe_register_read(
 623                         scic, afe_common_block_status);
 624                 udelay(AFE_REGISTER_WRITE_DELAY);
 625         } while ((afe_status & 0x00001000) == 0);
 626
 627         if (is_b0()) {
 628                 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
 629                 scu_afe_register_write(scic, afe_pmsn_master_control0, 0x7bcc96ad);
 630                 udelay(AFE_REGISTER_WRITE_DELAY);
 631         }
 632
 633         for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
 634                 if (is_b0()) {
 635                          /* Configure transmitter SSC parameters */
 636                         scu_afe_txreg_write(scic, phy_id, afe_tx_ssc_control, 0x00030000);
 637                         udelay(AFE_REGISTER_WRITE_DELAY);
 638                 } else {
 639                         /*
 640                          * All defaults, except the Receive Word Alignament/Comma Detect
 641                          * Enable....(0xe800) */
 642                         scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004512);
 643                         udelay(AFE_REGISTER_WRITE_DELAY);
 644
 645                         scu_afe_txreg_write(scic, phy_id, afe_xcvr_control1, 0x0050100F);
 646                         udelay(AFE_REGISTER_WRITE_DELAY);
 647                 }
 648
 649                 /*
 650                  * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
 651                  * & increase TX int & ext bias 20%....(0xe85c) */
 652                 if (is_a0())
 653                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003D4);
 654                 else if (is_a2())
 655                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003F0);
 656                 else {
 657                          /* Power down TX and RX (PWRDNTX and PWRDNRX) */
 658                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d7);
 659                         udelay(AFE_REGISTER_WRITE_DELAY);
 660
 661                         /*
 662                          * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
 663                          * & increase TX int & ext bias 20%....(0xe85c) */
 664                         scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d4);
 665                 }
 666                 udelay(AFE_REGISTER_WRITE_DELAY);
 667
 668                 if (is_a0() || is_a2()) {
 669                         /* Enable TX equalization (0xe824) */
 670                         scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
 671                         udelay(AFE_REGISTER_WRITE_DELAY);
 672                 }
 673
 674                 /*
 675                  * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
 676                  * RDD=0x0(RX Detect Enabled) ....(0xe800) */
 677                 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004100);
 678                 udelay(AFE_REGISTER_WRITE_DELAY);
 679
 680                 /* Leave DFE/FFE on */
 681                 if (is_a0())
 682                         scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F09983F);
 683                 else if (is_a2())
 684                         scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
 685                 else {
 686                         scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
 687                         udelay(AFE_REGISTER_WRITE_DELAY);
 688                         /* Enable TX equalization (0xe824) */
 689                         scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
 690                 }
 691                 udelay(AFE_REGISTER_WRITE_DELAY);
 692
 693                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, 0x000E7C03);
 694                 udelay(AFE_REGISTER_WRITE_DELAY);
 695
 696                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control1, 0x000E7C03);
 697                 udelay(AFE_REGISTER_WRITE_DELAY);
 698
 699                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control2, 0x000E7C03);
 700                 udelay(AFE_REGISTER_WRITE_DELAY);
 701
 702                 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control3, 0x000E7C03);
 703                 udelay(AFE_REGISTER_WRITE_DELAY);
 704         }
 705
 706         /* Transfer control to the PEs */
 707         scu_afe_register_write(scic, afe_dfx_master_control0, 0x00010f00);
 708         udelay(AFE_REGISTER_WRITE_DELAY);
 709 }
 710
 711 /*
 712  * ****************************************************************************-
 713  * * SCIC SDS Controller Internal Start/Stop Routines
 714  * ****************************************************************************- */
 715
 716
 717 /**
 718  * This method will attempt to transition into the ready state for the
 719  *    controller and indicate that the controller start operation has completed
 720  *    if all criteria are met.
 721  * @this_controller: This parameter indicates the controller object for which
 722  *    to transition to ready.
 723  * @status: This parameter indicates the status value to be pass into the call
 724  *    to scic_cb_controller_start_complete().
 725  *
 726  * none.
 727  */
 728 static void scic_sds_controller_transition_to_ready(
 729         struct scic_sds_controller *this_controller,
 730         enum sci_status status)
 731 {
 732         if (this_controller->parent.state_machine.current_state_id
 733             == SCI_BASE_CONTROLLER_STATE_STARTING) {
 734                 /*
 735                  * We move into the ready state, because some of the phys/ports
 736                  * may be up and operational. */
 737                 sci_base_state_machine_change_state(
 738                         scic_sds_controller_get_base_state_machine(this_controller),
 739                         SCI_BASE_CONTROLLER_STATE_READY
 740                         );
 741
 742                 isci_event_controller_start_complete(this_controller, status);
 743         }
 744 }
 745
 746 /**
 747  * This method is the general timeout handler for the controller. It will take
 748  *    the correct timetout action based on the current controller state
 749  */
 750 void scic_sds_controller_timeout_handler(
 751         struct scic_sds_controller *scic)
 752 {
 753         enum sci_base_controller_states current_state;
 754
 755         current_state = sci_base_state_machine_get_state(
 756                 scic_sds_controller_get_base_state_machine(scic));
 757
 758         if (current_state == SCI_BASE_CONTROLLER_STATE_STARTING) {
 759                 scic_sds_controller_transition_to_ready(
 760                         scic, SCI_FAILURE_TIMEOUT);
 761         } else if (current_state == SCI_BASE_CONTROLLER_STATE_STOPPING) {
 762                 sci_base_state_machine_change_state(
 763                         scic_sds_controller_get_base_state_machine(scic),
 764                         SCI_BASE_CONTROLLER_STATE_FAILED);
 765                 isci_event_controller_stop_complete(scic, SCI_FAILURE_TIMEOUT);
 766         } else  /* / @todo Now what do we want to do in this case? */
 767                 dev_err(scic_to_dev(scic),
 768                         "%s: Controller timer fired when controller was not "
 769                         "in a state being timed.\n",
 770                         __func__);
 771 }
 772
 773 /**
 774  * scic_sds_controller_get_port_configuration_mode
 775  * @this_controller: This is the controller to use to determine if we are using
 776  *    manual or automatic port configuration.
 777  *
 778  * SCIC_PORT_CONFIGURATION_MODE
 779  */
 780 enum SCIC_PORT_CONFIGURATION_MODE scic_sds_controller_get_port_configuration_mode(
 781         struct scic_sds_controller *this_controller)
 782 {
 783         u32 index;
 784         enum SCIC_PORT_CONFIGURATION_MODE mode;
 785
 786         mode = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
 787
 788         for (index = 0; index < SCI_MAX_PORTS; index++) {
 789                 if (this_controller->oem_parameters.sds1.ports[index].phy_mask != 0) {
 790                         mode = SCIC_PORT_MANUAL_CONFIGURATION_MODE;
 791                         break;
 792                 }
 793         }
 794
 795         return mode;
 796 }
 797
 798 enum sci_status scic_sds_controller_stop_ports(struct scic_sds_controller *scic)
 799 {
 800         u32 index;
 801         enum sci_status port_status;
 802         enum sci_status status = SCI_SUCCESS;
 803
 804         for (index = 0; index < scic->logical_port_entries; index++) {
 805                 struct scic_sds_port *sci_port = &scic->port_table[index];
 806                 SCI_BASE_PORT_HANDLER_T stop;
 807
 808                 stop = sci_port->state_handlers->parent.stop_handler;
 809                 port_status = stop(&sci_port->parent);
 810
 811                 if ((port_status != SCI_SUCCESS) &&
 812                     (port_status != SCI_FAILURE_INVALID_STATE)) {
 813                         status = SCI_FAILURE;
 814
 815                         dev_warn(scic_to_dev(scic),
 816                                  "%s: Controller stop operation failed to "
 817                                  "stop port %d because of status %d.\n",
 818                                  __func__,
 819                                  sci_port->logical_port_index,
 820                                  port_status);
 821                 }
 822         }
 823
 824         return status;
 825 }
 826
 827 /**
 828  *
 829  *
 830  *
 831  */
 832 static void scic_sds_controller_phy_timer_start(
 833         struct scic_sds_controller *this_controller)
 834 {
 835         isci_event_timer_start(
 836                 this_controller,
 837                 this_controller->phy_startup_timer,
 838                 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
 839                 );
 840
 841         this_controller->phy_startup_timer_pending = true;
 842 }
 843
 844 /**
 845  *
 846  *
 847  *
 848  */
 849 void scic_sds_controller_phy_timer_stop(
 850         struct scic_sds_controller *this_controller)
 851 {
 852         isci_event_timer_stop(
 853                 this_controller,
 854                 this_controller->phy_startup_timer
 855                 );
 856
 857         this_controller->phy_startup_timer_pending = false;
 858 }
 859
 860 /**
 861  * This method is called internally by the controller object to start the next
 862  *    phy on the controller.  If all the phys have been starte, then this
 863  *    method will attempt to transition the controller to the READY state and
 864  *    inform the user (scic_cb_controller_start_complete()).
 865  * @this_controller: This parameter specifies the controller object for which
 866  *    to start the next phy.
 867  *
 868  * enum sci_status
 869  */
 870 enum sci_status scic_sds_controller_start_next_phy(
 871         struct scic_sds_controller *this_controller)
 872 {
 873         enum sci_status status;
 874
 875         status = SCI_SUCCESS;
 876
 877         if (this_controller->phy_startup_timer_pending == false) {
 878                 if (this_controller->next_phy_to_start == SCI_MAX_PHYS) {
 879                         bool is_controller_start_complete = true;
 880                         struct scic_sds_phy *the_phy;
 881                         u8 index;
 882
 883                         for (index = 0; index < SCI_MAX_PHYS; index++) {
 884                                 the_phy = &this_controller->phy_table[index];
 885
 886                                 if (scic_sds_phy_get_port(the_phy) != NULL) {
 887                                         /**
 888                                          * The controller start operation is complete if and only
 889                                          * if:
 890                                          * - all links have been given an opportunity to start
 891                                          * - have no indication of a connected device
 892                                          * - have an indication of a connected device and it has
 893                                          *   finished the link training process.
 894                                          */
 895                                         if (
 896                                                 (
 897                                                         (the_phy->is_in_link_training == false)
 898                                                         && (the_phy->parent.state_machine.current_state_id
 899                                                             == SCI_BASE_PHY_STATE_INITIAL)
 900                                                 )
 901                                                 || (
 902                                                         (the_phy->is_in_link_training == false)
 903                                                         && (the_phy->parent.state_machine.current_state_id
 904                                                             == SCI_BASE_PHY_STATE_STOPPED)
 905                                                         )
 906                                                 || (
 907                                                         (the_phy->is_in_link_training == true)
 908                                                         && (the_phy->parent.state_machine.current_state_id
 909                                                             == SCI_BASE_PHY_STATE_STARTING)
 910                                                         )
 911                                                 ) {
 912                                                 is_controller_start_complete = false;
 913                                                 break;
 914                                         }
 915                                 }
 916                         }
 917
 918                         /*
 919                          * The controller has successfully finished the start process.
 920                          * Inform the SCI Core user and transition to the READY state. */
 921                         if (is_controller_start_complete == true) {
 922                                 scic_sds_controller_transition_to_ready(
 923                                         this_controller, SCI_SUCCESS
 924                                         );
 925                                 scic_sds_controller_phy_timer_stop(this_controller);
 926                         }
 927                 } else {
 928                         struct scic_sds_phy *the_phy;
 929
 930                         the_phy = &this_controller->phy_table[this_controller->next_phy_to_start];
 931
 932                         if (
 933                                 scic_sds_controller_get_port_configuration_mode(this_controller)
 934                                 == SCIC_PORT_MANUAL_CONFIGURATION_MODE
 935                                 ) {
 936                                 if (scic_sds_phy_get_port(the_phy) == NULL) {
 937                                         this_controller->next_phy_to_start++;
 938
 939                                         /*
 940                                          * Caution recursion ahead be forwarned
 941                                          *
 942                                          * The PHY was never added to a PORT in MPC mode so start the next phy in sequence
 943                                          * This phy will never go link up and will not draw power the OEM parameters either
 944                                          * configured the phy incorrectly for the PORT or it was never assigned to a PORT */
 945                                         return scic_sds_controller_start_next_phy(this_controller);
 946                                 }
 947                         }
 948
 949                         status = scic_sds_phy_start(the_phy);
 950
 951                         if (status == SCI_SUCCESS) {
 952                                 scic_sds_controller_phy_timer_start(this_controller);
 953                         } else {
 954                                 dev_warn(scic_to_dev(this_controller),
 955                                          "%s: Controller stop operation failed "
 956                                          "to stop phy %d because of status "
 957                                          "%d.\n",
 958                                          __func__,
 959                                          this_controller->phy_table[this_controller->next_phy_to_start].phy_index,
 960                                          status);
 961                         }
 962
 963                         this_controller->next_phy_to_start++;
 964                 }
 965         }
 966
 967         return status;
 968 }
 969
 970 /**
 971  *
 972  * @this_controller:
 973  *
 974  * enum sci_status
 975  */
 976 enum sci_status scic_sds_controller_stop_phys(
 977         struct scic_sds_controller *this_controller)
 978 {
 979         u32 index;
 980         enum sci_status status;
 981         enum sci_status phy_status;
 982
 983         status = SCI_SUCCESS;
 984
 985         for (index = 0; index < SCI_MAX_PHYS; index++) {
 986                 phy_status = scic_sds_phy_stop(&this_controller->phy_table[index]);
 987
 988                 if (
 989                         (phy_status != SCI_SUCCESS)
 990                         && (phy_status != SCI_FAILURE_INVALID_STATE)
 991                         ) {
 992                         status = SCI_FAILURE;
 993
 994                         dev_warn(scic_to_dev(this_controller),
 995                                  "%s: Controller stop operation failed to stop "
 996                                  "phy %d because of status %d.\n",
 997                                  __func__,
 998                                  this_controller->phy_table[index].phy_index, phy_status);
 999                 }
1000         }
1001
1002         return status;
1003 }
1004
1005 /**
1006  *
1007  * @this_controller:
1008  *
1009  * enum sci_status
1010  */
1011 enum sci_status scic_sds_controller_stop_devices(
1012         struct scic_sds_controller *this_controller)
1013 {
1014         u32 index;
1015         enum sci_status status;
1016         enum sci_status device_status;
1017
1018         status = SCI_SUCCESS;
1019
1020         for (index = 0; index < this_controller->remote_node_entries; index++) {
1021                 if (this_controller->device_table[index] != NULL) {
1022                         /* / @todo What timeout value do we want to provide to this request? */
1023                         device_status = scic_remote_device_stop(this_controller->device_table[index], 0);
1024
1025                         if ((device_status != SCI_SUCCESS) &&
1026                             (device_status != SCI_FAILURE_INVALID_STATE)) {
1027                                 dev_warn(scic_to_dev(this_controller),
1028                                          "%s: Controller stop operation failed "
1029                                          "to stop device 0x%p because of "
1030                                          "status %d.\n",
1031                                          __func__,
1032                                          this_controller->device_table[index], device_status);
1033                         }
1034                 }
1035         }
1036
1037         return status;
1038 }
1039
1040 /*
1041  * ****************************************************************************-
1042  * * SCIC SDS Controller Power Control (Staggered Spinup)
1043  * ****************************************************************************- */
1044
1045 /**
1046  *
1047  *
1048  * This method starts the power control timer for this controller object.
1049  */
1050 static void scic_sds_controller_power_control_timer_start(
1051         struct scic_sds_controller *this_controller)
1052 {
1053         isci_event_timer_start(
1054                 this_controller, this_controller->power_control.timer,
1055                 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL
1056                 );
1057
1058         this_controller->power_control.timer_started = true;
1059 }
1060
1061 /**
1062  *
1063  *
1064  *
1065  */
1066 static void scic_sds_controller_power_control_timer_handler(
1067         void *controller)
1068 {
1069         struct scic_sds_controller *this_controller;
1070
1071         this_controller = (struct scic_sds_controller *)controller;
1072
1073         if (this_controller->power_control.phys_waiting == 0) {
1074                 this_controller->power_control.timer_started = false;
1075         } else {
1076                 struct scic_sds_phy *the_phy = NULL;
1077                 u8 i;
1078
1079                 for (i = 0;
1080                      (i < SCI_MAX_PHYS)
1081                      && (this_controller->power_control.phys_waiting != 0);
1082                      i++) {
1083                         if (this_controller->power_control.requesters[i] != NULL) {
1084                                 the_phy = this_controller->power_control.requesters[i];
1085                                 this_controller->power_control.requesters[i] = NULL;
1086                                 this_controller->power_control.phys_waiting--;
1087                                 break;
1088                         }
1089                 }
1090
1091                 /*
1092                  * It doesn't matter if the power list is empty, we need to start the
1093                  * timer in case another phy becomes ready. */
1094                 scic_sds_controller_power_control_timer_start(this_controller);
1095
1096                 scic_sds_phy_consume_power_handler(the_phy);
1097         }
1098 }
1099
1100 /**
1101  * This method inserts the phy in the stagger spinup control queue.
1102  * @this_controller:
1103  *
1104  *
1105  */
1106 void scic_sds_controller_power_control_queue_insert(
1107         struct scic_sds_controller *this_controller,
1108         struct scic_sds_phy *the_phy)
1109 {
1110         BUG_ON(the_phy == NULL);
1111
1112         if (
1113                 (this_controller->power_control.timer_started)
1114                 && (this_controller->power_control.requesters[the_phy->phy_index] == NULL)
1115                 ) {
1116                 this_controller->power_control.requesters[the_phy->phy_index] = the_phy;
1117                 this_controller->power_control.phys_waiting++;
1118         } else {
1119                 scic_sds_controller_power_control_timer_start(this_controller);
1120                 scic_sds_phy_consume_power_handler(the_phy);
1121         }
1122 }
1123
1124 /**
1125  * This method removes the phy from the stagger spinup control queue.
1126  * @this_controller:
1127  *
1128  *
1129  */
1130 void scic_sds_controller_power_control_queue_remove(
1131         struct scic_sds_controller *this_controller,
1132         struct scic_sds_phy *the_phy)
1133 {
1134         BUG_ON(the_phy == NULL);
1135
1136         if (this_controller->power_control.requesters[the_phy->phy_index] != NULL) {
1137                 this_controller->power_control.phys_waiting--;
1138         }
1139
1140         this_controller->power_control.requesters[the_phy->phy_index] = NULL;
1141 }
1142
1143 /*
1144  * ****************************************************************************-
1145  * * SCIC SDS Controller Completion Routines
1146  * ****************************************************************************- */
1147
1148 /**
1149  * This method returns a true value if the completion queue has entries that
1150  *    can be processed
1151  * @this_controller:
1152  *
1153  * bool true if the completion queue has entries to process false if the
1154  * completion queue has no entries to process
1155  */
1156 static bool scic_sds_controller_completion_queue_has_entries(
1157         struct scic_sds_controller *this_controller)
1158 {
1159         u32 get_value = this_controller->completion_queue_get;
1160         u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK;
1161
1162         if (
1163                 NORMALIZE_GET_POINTER_CYCLE_BIT(get_value)
1164                 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1165                 ) {
1166                 return true;
1167         }
1168
1169         return false;
1170 }
1171
1172 /* --------------------------------------------------------------------------- */
1173
1174 /**
1175  * This method processes a task completion notification.  This is called from
1176  *    within the controller completion handler.
1177  * @this_controller:
1178  * @completion_entry:
1179  *
1180  */
1181 static void scic_sds_controller_task_completion(
1182         struct scic_sds_controller *this_controller,
1183         u32 completion_entry)
1184 {
1185         u32 index;
1186         struct scic_sds_request *io_request;
1187
1188         index = SCU_GET_COMPLETION_INDEX(completion_entry);
1189         io_request = this_controller->io_request_table[index];
1190
1191         /* Make sure that we really want to process this IO request */
1192         if (
1193                 (io_request != NULL)
1194                 && (io_request->io_tag != SCI_CONTROLLER_INVALID_IO_TAG)
1195                 && (
1196                         scic_sds_io_tag_get_sequence(io_request->io_tag)
1197                         == this_controller->io_request_sequence[index]
1198                         )
1199                 ) {
1200                 /* Yep this is a valid io request pass it along to the io request handler */
1201                 scic_sds_io_request_tc_completion(io_request, completion_entry);
1202         }
1203 }
1204
1205 /**
1206  * This method processes an SDMA completion event.  This is called from within
1207  *    the controller completion handler.
1208  * @this_controller:
1209  * @completion_entry:
1210  *
1211  */
1212 static void scic_sds_controller_sdma_completion(
1213         struct scic_sds_controller *this_controller,
1214         u32 completion_entry)
1215 {
1216         u32 index;
1217         struct scic_sds_request *io_request;
1218         struct scic_sds_remote_device *device;
1219
1220         index = SCU_GET_COMPLETION_INDEX(completion_entry);
1221
1222         switch (scu_get_command_request_type(completion_entry)) {
1223         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC:
1224         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC:
1225                 io_request = this_controller->io_request_table[index];
1226                 dev_warn(scic_to_dev(this_controller),
1227                          "%s: SCIC SDS Completion type SDMA %x for io request "
1228                          "%p\n",
1229                          __func__,
1230                          completion_entry,
1231                          io_request);
1232                 /* @todo For a post TC operation we need to fail the IO
1233                  * request
1234                  */
1235                 break;
1236
1237         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC:
1238         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC:
1239         case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC:
1240                 device = this_controller->device_table[index];
1241                 dev_warn(scic_to_dev(this_controller),
1242                          "%s: SCIC SDS Completion type SDMA %x for remote "
1243                          "device %p\n",
1244                          __func__,
1245                          completion_entry,
1246                          device);
1247                 /* @todo For a port RNC operation we need to fail the
1248                  * device
1249                  */
1250                 break;
1251
1252         default:
1253                 dev_warn(scic_to_dev(this_controller),
1254                          "%s: SCIC SDS Completion unknown SDMA completion "
1255                          "type %x\n",
1256                          __func__,
1257                          completion_entry);
1258                 break;
1259
1260         }
1261 }
1262
1263 /**
1264  *
1265  * @this_controller:
1266  * @completion_entry:
1267  *
1268  * This method processes an unsolicited frame message.  This is called from
1269  * within the controller completion handler. none
1270  */
1271 static void scic_sds_controller_unsolicited_frame(
1272         struct scic_sds_controller *this_controller,
1273         u32 completion_entry)
1274 {
1275         u32 index;
1276         u32 frame_index;
1277
1278         struct scu_unsolicited_frame_header *frame_header;
1279         struct scic_sds_phy *phy;
1280         struct scic_sds_remote_device *device;
1281
1282         enum sci_status result = SCI_FAILURE;
1283
1284         frame_index = SCU_GET_FRAME_INDEX(completion_entry);
1285
1286         frame_header
1287                 = this_controller->uf_control.buffers.array[frame_index].header;
1288         this_controller->uf_control.buffers.array[frame_index].state
1289                 = UNSOLICITED_FRAME_IN_USE;
1290
1291         if (SCU_GET_FRAME_ERROR(completion_entry)) {
1292                 /*
1293                  * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
1294                  * /       this cause a problem? We expect the phy initialization will
1295                  * /       fail if there is an error in the frame. */
1296                 scic_sds_controller_release_frame(this_controller, frame_index);
1297                 return;
1298         }
1299
1300         if (frame_header->is_address_frame) {
1301                 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1302                 phy = &this_controller->phy_table[index];
1303                 if (phy != NULL) {
1304                         result = scic_sds_phy_frame_handler(phy, frame_index);
1305                 }
1306         } else {
1307
1308                 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1309
1310                 if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1311                         /*
1312                          * This is a signature fis or a frame from a direct attached SATA
1313                          * device that has not yet been created.  In either case forwared
1314                          * the frame to the PE and let it take care of the frame data. */
1315                         index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1316                         phy = &this_controller->phy_table[index];
1317                         result = scic_sds_phy_frame_handler(phy, frame_index);
1318                 } else {
1319                         if (index < this_controller->remote_node_entries)
1320                                 device = this_controller->device_table[index];
1321                         else
1322                                 device = NULL;
1323
1324                         if (device != NULL)
1325                                 result = scic_sds_remote_device_frame_handler(device, frame_index);
1326                         else
1327                                 scic_sds_controller_release_frame(this_controller, frame_index);
1328                 }
1329         }
1330
1331         if (result != SCI_SUCCESS) {
1332                 /*
1333                  * / @todo Is there any reason to report some additional error message
1334                  * /       when we get this failure notifiction? */
1335         }
1336 }
1337
1338 /**
1339  * This method processes an event completion entry.  This is called from within
1340  *    the controller completion handler.
1341  * @this_controller:
1342  * @completion_entry:
1343  *
1344  */
1345 static void scic_sds_controller_event_completion(
1346         struct scic_sds_controller *this_controller,
1347         u32 completion_entry)
1348 {
1349         u32 index;
1350         struct scic_sds_request *io_request;
1351         struct scic_sds_remote_device *device;
1352         struct scic_sds_phy *phy;
1353
1354         index = SCU_GET_COMPLETION_INDEX(completion_entry);
1355
1356         switch (scu_get_event_type(completion_entry)) {
1357         case SCU_EVENT_TYPE_SMU_COMMAND_ERROR:
1358                 /* / @todo The driver did something wrong and we need to fix the condtion. */
1359                 dev_err(scic_to_dev(this_controller),
1360                         "%s: SCIC Controller 0x%p received SMU command error "
1361                         "0x%x\n",
1362                         __func__,
1363                         this_controller,
1364                         completion_entry);
1365                 break;
1366
1367         case SCU_EVENT_TYPE_SMU_PCQ_ERROR:
1368         case SCU_EVENT_TYPE_SMU_ERROR:
1369         case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR:
1370                 /*
1371                  * / @todo This is a hardware failure and its likely that we want to
1372                  * /       reset the controller. */
1373                 dev_err(scic_to_dev(this_controller),
1374                         "%s: SCIC Controller 0x%p received fatal controller "
1375                         "event  0x%x\n",
1376                         __func__,
1377                         this_controller,
1378                         completion_entry);
1379                 break;
1380
1381         case SCU_EVENT_TYPE_TRANSPORT_ERROR:
1382                 io_request = this_controller->io_request_table[index];
1383                 scic_sds_io_request_event_handler(io_request, completion_entry);
1384                 break;
1385
1386         case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
1387                 switch (scu_get_event_specifier(completion_entry)) {
1388                 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE:
1389                 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT:
1390                         io_request = this_controller->io_request_table[index];
1391                         if (io_request != NULL)
1392                                 scic_sds_io_request_event_handler(io_request, completion_entry);
1393                         else
1394                                 dev_warn(scic_to_dev(this_controller),
1395                                          "%s: SCIC Controller 0x%p received "
1396                                          "event 0x%x for io request object "
1397                                          "that doesnt exist.\n",
1398                                          __func__,
1399                                          this_controller,
1400                                          completion_entry);
1401
1402                         break;
1403
1404                 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT:
1405                         device = this_controller->device_table[index];
1406                         if (device != NULL)
1407                                 scic_sds_remote_device_event_handler(device, completion_entry);
1408                         else
1409                                 dev_warn(scic_to_dev(this_controller),
1410                                          "%s: SCIC Controller 0x%p received "
1411                                          "event 0x%x for remote device object "
1412                                          "that doesnt exist.\n",
1413                                          __func__,
1414                                          this_controller,
1415                                          completion_entry);
1416
1417                         break;
1418                 }
1419                 break;
1420
1421         case SCU_EVENT_TYPE_BROADCAST_CHANGE:
1422         /*
1423          * direct the broadcast change event to the phy first and then let
1424          * the phy redirect the broadcast change to the port object */
1425         case SCU_EVENT_TYPE_ERR_CNT_EVENT:
1426         /*
1427          * direct error counter event to the phy object since that is where
1428          * we get the event notification.  This is a type 4 event. */
1429         case SCU_EVENT_TYPE_OSSP_EVENT:
1430                 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1431                 phy = &this_controller->phy_table[index];
1432                 scic_sds_phy_event_handler(phy, completion_entry);
1433                 break;
1434
1435         case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
1436         case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
1437         case SCU_EVENT_TYPE_RNC_OPS_MISC:
1438                 if (index < this_controller->remote_node_entries) {
1439                         device = this_controller->device_table[index];
1440
1441                         if (device != NULL)
1442                                 scic_sds_remote_device_event_handler(device, completion_entry);
1443                 } else
1444                         dev_err(scic_to_dev(this_controller),
1445                                 "%s: SCIC Controller 0x%p received event 0x%x "
1446                                 "for remote device object 0x%0x that doesnt "
1447                                 "exist.\n",
1448                                 __func__,
1449                                 this_controller,
1450                                 completion_entry,
1451                                 index);
1452
1453                 break;
1454
1455         default:
1456                 dev_warn(scic_to_dev(this_controller),
1457                          "%s: SCIC Controller received unknown event code %x\n",
1458                          __func__,
1459                          completion_entry);
1460                 break;
1461         }
1462 }
1463
1464 /**
1465  * This method is a private routine for processing the completion queue entries.
1466  * @this_controller:
1467  *
1468  */
1469 static void scic_sds_controller_process_completions(
1470         struct scic_sds_controller *this_controller)
1471 {
1472         u32 completion_count = 0;
1473         u32 completion_entry;
1474         u32 get_index;
1475         u32 get_cycle;
1476         u32 event_index;
1477         u32 event_cycle;
1478
1479         dev_dbg(scic_to_dev(this_controller),
1480                 "%s: completion queue begining get:0x%08x\n",
1481                 __func__,
1482                 this_controller->completion_queue_get);
1483
1484         /* Get the component parts of the completion queue */
1485         get_index = NORMALIZE_GET_POINTER(this_controller->completion_queue_get);
1486         get_cycle = SMU_CQGR_CYCLE_BIT & this_controller->completion_queue_get;
1487
1488         event_index = NORMALIZE_EVENT_POINTER(this_controller->completion_queue_get);
1489         event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & this_controller->completion_queue_get;
1490
1491         while (
1492                 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
1493                 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1494                 ) {
1495                 completion_count++;
1496
1497                 completion_entry = this_controller->completion_queue[get_index];
1498                 INCREMENT_COMPLETION_QUEUE_GET(this_controller, get_index, get_cycle);
1499
1500                 dev_dbg(scic_to_dev(this_controller),
1501                         "%s: completion queue entry:0x%08x\n",
1502                         __func__,
1503                         completion_entry);
1504
1505                 switch (SCU_GET_COMPLETION_TYPE(completion_entry)) {
1506                 case SCU_COMPLETION_TYPE_TASK:
1507                         scic_sds_controller_task_completion(this_controller, completion_entry);
1508                         break;
1509
1510                 case SCU_COMPLETION_TYPE_SDMA:
1511                         scic_sds_controller_sdma_completion(this_controller, completion_entry);
1512                         break;
1513
1514                 case SCU_COMPLETION_TYPE_UFI:
1515                         scic_sds_controller_unsolicited_frame(this_controller, completion_entry);
1516                         break;
1517
1518                 case SCU_COMPLETION_TYPE_EVENT:
1519                         INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1520                         scic_sds_controller_event_completion(this_controller, completion_entry);
1521                         break;
1522
1523                 case SCU_COMPLETION_TYPE_NOTIFY:
1524                         /*
1525                          * Presently we do the same thing with a notify event that we do with the
1526                          * other event codes. */
1527                         INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1528                         scic_sds_controller_event_completion(this_controller, completion_entry);
1529                         break;
1530
1531                 default:
1532                         dev_warn(scic_to_dev(this_controller),
1533                                  "%s: SCIC Controller received unknown "
1534                                  "completion type %x\n",
1535                                  __func__,
1536                                  completion_entry);
1537                         break;
1538                 }
1539         }
1540
1541         /* Update the get register if we completed one or more entries */
1542         if (completion_count > 0) {
1543                 this_controller->completion_queue_get =
1544                         SMU_CQGR_GEN_BIT(ENABLE)
1545                         | SMU_CQGR_GEN_BIT(EVENT_ENABLE)
1546                         | event_cycle | SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index)
1547                         | get_cycle   | SMU_CQGR_GEN_VAL(POINTER, get_index);
1548
1549                 SMU_CQGR_WRITE(this_controller,
1550                                this_controller->completion_queue_get);
1551         }
1552
1553         dev_dbg(scic_to_dev(this_controller),
1554                 "%s: completion queue ending get:0x%08x\n",
1555                 __func__,
1556                 this_controller->completion_queue_get);
1557
1558 }
1559
1560 bool scic_sds_controller_isr(struct scic_sds_controller *scic)
1561 {
1562         if (scic_sds_controller_completion_queue_has_entries(scic)) {
1563                 return true;
1564         } else {
1565                 /*
1566                  * we have a spurious interrupt it could be that we have already
1567                  * emptied the completion queue from a previous interrupt */
1568                 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1569
1570                 /*
1571                  * There is a race in the hardware that could cause us not to be notified
1572                  * of an interrupt completion if we do not take this step.  We will mask
1573                  * then unmask the interrupts so if there is another interrupt pending
1574                  * the clearing of the interrupt source we get the next interrupt message. */
1575                 SMU_IMR_WRITE(scic, 0xFF000000);
1576                 SMU_IMR_WRITE(scic, 0x00000000);
1577         }
1578
1579         return false;
1580 }
1581
1582 void scic_sds_controller_completion_handler(struct scic_sds_controller *scic)
1583 {
1584         /* Empty out the completion queue */
1585         if (scic_sds_controller_completion_queue_has_entries(scic))
1586                 scic_sds_controller_process_completions(scic);
1587
1588         /* Clear the interrupt and enable all interrupts again */
1589         SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1590         /* Could we write the value of SMU_ISR_COMPLETION? */
1591         SMU_IMR_WRITE(scic, 0xFF000000);
1592         SMU_IMR_WRITE(scic, 0x00000000);
1593 }
1594
1595 bool scic_sds_controller_error_isr(struct scic_sds_controller *scic)
1596 {
1597         u32 interrupt_status;
1598
1599         interrupt_status = SMU_ISR_READ(scic);
1600
1601         interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
1602
1603         if (interrupt_status != 0) {
1604                 /*
1605                  * There is an error interrupt pending so let it through and handle
1606                  * in the callback */
1607                 return true;
1608         }
1609
1610         /*
1611          * There is a race in the hardware that could cause us not to be notified
1612          * of an interrupt completion if we do not take this step.  We will mask
1613          * then unmask the error interrupts so if there was another interrupt
1614          * pending we will be notified.
1615          * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
1616         SMU_IMR_WRITE(scic, 0x000000FF);
1617         SMU_IMR_WRITE(scic, 0x00000000);
1618
1619         return false;
1620 }
1621
1622 void scic_sds_controller_error_handler(struct scic_sds_controller *scic)
1623 {
1624         u32 interrupt_status;
1625
1626         interrupt_status = SMU_ISR_READ(scic);
1627
1628         if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
1629             scic_sds_controller_completion_queue_has_entries(scic)) {
1630
1631                 scic_sds_controller_process_completions(scic);
1632                 SMU_ISR_WRITE(scic, SMU_ISR_QUEUE_SUSPEND);
1633
1634         } else {
1635                 dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__,
1636                         interrupt_status);
1637
1638                 sci_base_state_machine_change_state(
1639                         scic_sds_controller_get_base_state_machine(scic),
1640                         SCI_BASE_CONTROLLER_STATE_FAILED);
1641
1642                 return;
1643         }
1644
1645         /*
1646          * If we dont process any completions I am not sure that we want to do this.
1647          * We are in the middle of a hardware fault and should probably be reset. */
1648         SMU_IMR_WRITE(scic, 0x00000000);
1649 }
1650
1651
1652 u32 scic_sds_controller_get_object_size(void)
1653 {
1654         return sizeof(struct scic_sds_controller);
1655 }
1656
1657
1658 void scic_sds_controller_link_up(
1659         struct scic_sds_controller *scic,
1660         struct scic_sds_port *sci_port,
1661         struct scic_sds_phy *sci_phy)
1662 {
1663         scic_sds_controller_phy_handler_t link_up;
1664         u32 state;
1665
1666         state = scic->parent.state_machine.current_state_id;
1667         link_up = scic_sds_controller_state_handler_table[state].link_up;
1668
1669         if (link_up)
1670                 link_up(scic, sci_port, sci_phy);
1671         else
1672                 dev_dbg(scic_to_dev(scic),
1673                         "%s: SCIC Controller linkup event from phy %d in "
1674                         "unexpected state %d\n",
1675                         __func__,
1676                         sci_phy->phy_index,
1677                         sci_base_state_machine_get_state(
1678                                 scic_sds_controller_get_base_state_machine(
1679                                         scic)));
1680 }
1681
1682
1683 void scic_sds_controller_link_down(
1684         struct scic_sds_controller *scic,
1685         struct scic_sds_port *sci_port,
1686         struct scic_sds_phy *sci_phy)
1687 {
1688         u32 state;
1689         scic_sds_controller_phy_handler_t link_down;
1690
1691         state = scic->parent.state_machine.current_state_id;
1692         link_down = scic_sds_controller_state_handler_table[state].link_down;
1693
1694         if (link_down)
1695                 link_down(scic, sci_port, sci_phy);
1696         else
1697                 dev_dbg(scic_to_dev(scic),
1698                         "%s: SCIC Controller linkdown event from phy %d in "
1699                         "unexpected state %d\n",
1700                         __func__,
1701                         sci_phy->phy_index, state);
1702 }
1703
1704 /**
1705  * This method is called by the remote device to inform the controller
1706  * that this remote device has started.
1707  *
1708  */
1709
1710 void scic_sds_controller_remote_device_started(struct scic_sds_controller *scic,
1711                                                struct scic_sds_remote_device *sci_dev)
1712 {
1713         u32 state;
1714         scic_sds_controller_device_handler_t started;
1715
1716         state = scic->parent.state_machine.current_state_id;
1717         started = scic_sds_controller_state_handler_table[state].remote_device_started_handler;
1718
1719         if (started)
1720                 started(scic, sci_dev);
1721         else {
1722                 dev_dbg(scic_to_dev(scic),
1723                          "%s: SCIC Controller 0x%p remote device started event "
1724                          "from device 0x%p in unexpected state  %d\n",
1725                          __func__, scic, sci_dev, state);
1726         }
1727 }
1728
1729 /**
1730  * This is a helper method to determine if any remote devices on this
1731  * controller are still in the stopping state.
1732  *
1733  */
1734 bool scic_sds_controller_has_remote_devices_stopping(
1735         struct scic_sds_controller *this_controller)
1736 {
1737         u32 index;
1738
1739         for (index = 0; index < this_controller->remote_node_entries; index++) {
1740                 if ((this_controller->device_table[index] != NULL) &&
1741                    (this_controller->device_table[index]->parent.state_machine.current_state_id
1742                     == SCI_BASE_REMOTE_DEVICE_STATE_STOPPING))
1743                         return true;
1744         }
1745
1746         return false;
1747 }
1748
1749 /**
1750  * This method is called by the remote device to inform the controller
1751  * object that the remote device has stopped.
1752  *
1753  */
1754
1755 void scic_sds_controller_remote_device_stopped(struct scic_sds_controller *scic,
1756                                                struct scic_sds_remote_device *sci_dev)
1757 {
1758
1759         u32 state;
1760         scic_sds_controller_device_handler_t stopped;
1761
1762         state = scic->parent.state_machine.current_state_id;
1763         stopped = scic_sds_controller_state_handler_table[state].remote_device_stopped_handler;
1764
1765         if (stopped)
1766                 stopped(scic, sci_dev);
1767         else {
1768                 dev_dbg(scic_to_dev(scic),
1769                         "%s: SCIC Controller 0x%p remote device stopped event "
1770                         "from device 0x%p in unexpected state  %d\n",
1771                         __func__, scic, sci_dev, state);
1772         }
1773 }
1774
1775
1776
1777 /**
1778  * This method will write to the SCU PCP register the request value. The method
1779  *    is used to suspend/resume ports, devices, and phys.
1780  * @this_controller:
1781  *
1782  *
1783  */
1784 void scic_sds_controller_post_request(
1785         struct scic_sds_controller *this_controller,
1786         u32 request)
1787 {
1788         dev_dbg(scic_to_dev(this_controller),
1789                 "%s: SCIC Controller 0x%p post request 0x%08x\n",
1790                 __func__,
1791                 this_controller,
1792                 request);
1793
1794         SMU_PCP_WRITE(this_controller, request);
1795 }
1796
1797 /**
1798  * This method will copy the soft copy of the task context into the physical
1799  *    memory accessible by the controller.
1800  * @this_controller: This parameter specifies the controller for which to copy
1801  *    the task context.
1802  * @this_request: This parameter specifies the request for which the task
1803  *    context is being copied.
1804  *
1805  * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
1806  * the physical memory version of the task context. Thus, all subsequent
1807  * updates to the task context are performed in the TC table (i.e. DMAable
1808  * memory). none
1809  */
1810 void scic_sds_controller_copy_task_context(
1811         struct scic_sds_controller *this_controller,
1812         struct scic_sds_request *this_request)
1813 {
1814         struct scu_task_context *task_context_buffer;
1815
1816         task_context_buffer = scic_sds_controller_get_task_context_buffer(
1817                 this_controller, this_request->io_tag
1818                 );
1819
1820         memcpy(
1821                 task_context_buffer,
1822                 this_request->task_context_buffer,
1823                 SCI_FIELD_OFFSET(struct scu_task_context, sgl_snapshot_ac)
1824                 );
1825
1826         /*
1827          * Now that the soft copy of the TC has been copied into the TC
1828          * table accessible by the silicon.  Thus, any further changes to
1829          * the TC (e.g. TC termination) occur in the appropriate location. */
1830         this_request->task_context_buffer = task_context_buffer;
1831 }
1832
1833 /**
1834  * This method returns the task context buffer for the given io tag.
1835  * @this_controller:
1836  * @io_tag:
1837  *
1838  * struct scu_task_context*
1839  */
1840 struct scu_task_context *scic_sds_controller_get_task_context_buffer(
1841         struct scic_sds_controller *this_controller,
1842         u16 io_tag
1843         ) {
1844         u16 task_index = scic_sds_io_tag_get_index(io_tag);
1845
1846         if (task_index < this_controller->task_context_entries) {
1847                 return &this_controller->task_context_table[task_index];
1848         }
1849
1850         return NULL;
1851 }
1852
1853 /**
1854  * This method returnst the sequence value from the io tag value
1855  * @this_controller:
1856  * @io_tag:
1857  *
1858  * u16
1859  */
1860
1861 /**
1862  * This method returns the IO request associated with the tag value
1863  * @this_controller:
1864  * @io_tag:
1865  *
1866  * SCIC_SDS_IO_REQUEST_T* NULL if there is no valid IO request at the tag value
1867  */
1868 struct scic_sds_request *scic_sds_controller_get_io_request_from_tag(
1869         struct scic_sds_controller *this_controller,
1870         u16 io_tag
1871         ) {
1872         u16 task_index;
1873         u16 task_sequence;
1874
1875         task_index = scic_sds_io_tag_get_index(io_tag);
1876
1877         if (task_index  < this_controller->task_context_entries) {
1878                 if (this_controller->io_request_table[task_index] != NULL) {
1879                         task_sequence = scic_sds_io_tag_get_sequence(io_tag);
1880
1881                         if (task_sequence == this_controller->io_request_sequence[task_index]) {
1882                                 return this_controller->io_request_table[task_index];
1883                         }
1884                 }
1885         }
1886
1887         return NULL;
1888 }
1889
1890 /**
1891  * This method allocates remote node index and the reserves the remote node
1892  *    context space for use. This method can fail if there are no more remote
1893  *    node index available.
1894  * @this_controller: This is the controller object which contains the set of
1895  *    free remote node ids
1896  * @the_devce: This is the device object which is requesting the a remote node
1897  *    id
1898  * @node_id: This is the remote node id that is assinged to the device if one
1899  *    is available
1900  *
1901  * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
1902  * node index available.
1903  */
1904 enum sci_status scic_sds_controller_allocate_remote_node_context(
1905         struct scic_sds_controller *this_controller,
1906         struct scic_sds_remote_device *the_device,
1907         u16 *node_id)
1908 {
1909         u16 node_index;
1910         u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1911
1912         node_index = scic_sds_remote_node_table_allocate_remote_node(
1913                 &this_controller->available_remote_nodes, remote_node_count
1914                 );
1915
1916         if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1917                 this_controller->device_table[node_index] = the_device;
1918
1919                 *node_id = node_index;
1920
1921                 return SCI_SUCCESS;
1922         }
1923
1924         return SCI_FAILURE_INSUFFICIENT_RESOURCES;
1925 }
1926
1927 /**
1928  * This method frees the remote node index back to the available pool.  Once
1929  *    this is done the remote node context buffer is no longer valid and can
1930  *    not be used.
1931  * @this_controller:
1932  * @the_device:
1933  * @node_id:
1934  *
1935  */
1936 void scic_sds_controller_free_remote_node_context(
1937         struct scic_sds_controller *this_controller,
1938         struct scic_sds_remote_device *the_device,
1939         u16 node_id)
1940 {
1941         u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1942
1943         if (this_controller->device_table[node_id] == the_device) {
1944                 this_controller->device_table[node_id] = NULL;
1945
1946                 scic_sds_remote_node_table_release_remote_node_index(
1947                         &this_controller->available_remote_nodes, remote_node_count, node_id
1948                         );
1949         }
1950 }
1951
1952 /**
1953  * This method returns the union scu_remote_node_context for the specified remote
1954  *    node id.
1955  * @this_controller:
1956  * @node_id:
1957  *
1958  * union scu_remote_node_context*
1959  */
1960 union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
1961         struct scic_sds_controller *this_controller,
1962         u16 node_id
1963         ) {
1964         if (
1965                 (node_id < this_controller->remote_node_entries)
1966                 && (this_controller->device_table[node_id] != NULL)
1967                 ) {
1968                 return &this_controller->remote_node_context_table[node_id];
1969         }
1970
1971         return NULL;
1972 }
1973
1974 /**
1975  *
1976  * @resposne_buffer: This is the buffer into which the D2H register FIS will be
1977  *    constructed.
1978  * @frame_header: This is the frame header returned by the hardware.
1979  * @frame_buffer: This is the frame buffer returned by the hardware.
1980  *
1981  * This method will combind the frame header and frame buffer to create a SATA
1982  * D2H register FIS none
1983  */
1984 void scic_sds_controller_copy_sata_response(
1985         void *response_buffer,
1986         void *frame_header,
1987         void *frame_buffer)
1988 {
1989         memcpy(
1990                 response_buffer,
1991                 frame_header,
1992                 sizeof(u32)
1993                 );
1994
1995         memcpy(
1996                 (char *)((char *)response_buffer + sizeof(u32)),
1997                 frame_buffer,
1998                 sizeof(struct sata_fis_reg_d2h) - sizeof(u32)
1999                 );
2000 }
2001
2002 /**
2003  * This method releases the frame once this is done the frame is available for
2004  *    re-use by the hardware.  The data contained in the frame header and frame
2005  *    buffer is no longer valid. The UF queue get pointer is only updated if UF
2006  *    control indicates this is appropriate.
2007  * @this_controller:
2008  * @frame_index:
2009  *
2010  */
2011 void scic_sds_controller_release_frame(
2012         struct scic_sds_controller *this_controller,
2013         u32 frame_index)
2014 {
2015         if (scic_sds_unsolicited_frame_control_release_frame(
2016                     &this_controller->uf_control, frame_index) == true)
2017                 SCU_UFQGP_WRITE(this_controller, this_controller->uf_control.get);
2018 }
2019
2020 /**
2021  * This method sets user parameters and OEM parameters to default values.
2022  *    Users can override these values utilizing the scic_user_parameters_set()
2023  *    and scic_oem_parameters_set() methods.
2024  * @controller: This parameter specifies the controller for which to set the
2025  *    configuration parameters to their default values.
2026  *
2027  */
2028 static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic)
2029 {
2030         u16 index;
2031
2032         /* Default to no SSC operation. */
2033         scic->oem_parameters.sds1.controller.do_enable_ssc = false;
2034
2035         /* Initialize all of the port parameter information to narrow ports. */
2036         for (index = 0; index < SCI_MAX_PORTS; index++) {
2037                 scic->oem_parameters.sds1.ports[index].phy_mask = 0;
2038         }
2039
2040         /* Initialize all of the phy parameter information. */
2041         for (index = 0; index < SCI_MAX_PHYS; index++) {
2042                 /* Default to 6G (i.e. Gen 3) for now. */
2043                 scic->user_parameters.sds1.phys[index].max_speed_generation = 3;
2044
2045                 /* the frequencies cannot be 0 */
2046                 scic->user_parameters.sds1.phys[index].align_insertion_frequency = 0x7f;
2047                 scic->user_parameters.sds1.phys[index].in_connection_align_insertion_frequency = 0xff;
2048                 scic->user_parameters.sds1.phys[index].notify_enable_spin_up_insertion_frequency = 0x33;
2049
2050                 /*
2051                  * Previous Vitesse based expanders had a arbitration issue that
2052                  * is worked around by having the upper 32-bits of SAS address
2053                  * with a value greater then the Vitesse company identifier.
2054                  * Hence, usage of 0x5FCFFFFF. */
2055                 scic->oem_parameters.sds1.phys[index].sas_address.low = 0x00000001;
2056                 scic->oem_parameters.sds1.phys[index].sas_address.high = 0x5FCFFFFF;
2057         }
2058
2059         scic->user_parameters.sds1.stp_inactivity_timeout = 5;
2060         scic->user_parameters.sds1.ssp_inactivity_timeout = 5;
2061         scic->user_parameters.sds1.stp_max_occupancy_timeout = 5;
2062         scic->user_parameters.sds1.ssp_max_occupancy_timeout = 20;
2063         scic->user_parameters.sds1.no_outbound_task_timeout = 20;
2064 }
2065
2066
2067 enum sci_status scic_controller_construct(struct scic_sds_controller *controller,
2068                                           void __iomem *scu_base,
2069                                           void __iomem *smu_base)
2070 {
2071         u8 index;
2072
2073         sci_base_controller_construct(
2074                 &controller->parent,
2075                 scic_sds_controller_state_table,
2076                 controller->memory_descriptors,
2077                 ARRAY_SIZE(controller->memory_descriptors),
2078                 NULL
2079                 );
2080
2081         controller->scu_registers = scu_base;
2082         controller->smu_registers = smu_base;
2083
2084         scic_sds_port_configuration_agent_construct(&controller->port_agent);
2085
2086         /* Construct the ports for this controller */
2087         for (index = 0; index < SCI_MAX_PORTS; index++)
2088                 scic_sds_port_construct(&controller->port_table[index],
2089                                         index, controller);
2090         scic_sds_port_construct(&controller->port_table[index],
2091                                 SCIC_SDS_DUMMY_PORT, controller);
2092
2093         /* Construct the phys for this controller */
2094         for (index = 0; index < SCI_MAX_PHYS; index++) {
2095                 /* Add all the PHYs to the dummy port */
2096                 scic_sds_phy_construct(
2097                         &controller->phy_table[index],
2098                         &controller->port_table[SCI_MAX_PORTS],
2099                         index
2100                         );
2101         }
2102
2103         controller->invalid_phy_mask = 0;
2104
2105         /* Set the default maximum values */
2106         controller->completion_event_entries      = SCU_EVENT_COUNT;
2107         controller->completion_queue_entries      = SCU_COMPLETION_QUEUE_COUNT;
2108         controller->remote_node_entries           = SCI_MAX_REMOTE_DEVICES;
2109         controller->logical_port_entries          = SCI_MAX_PORTS;
2110         controller->task_context_entries          = SCU_IO_REQUEST_COUNT;
2111         controller->uf_control.buffers.count      = SCU_UNSOLICITED_FRAME_COUNT;
2112         controller->uf_control.address_table.count = SCU_UNSOLICITED_FRAME_COUNT;
2113
2114         /* Initialize the User and OEM parameters to default values. */
2115         scic_sds_controller_set_default_config_parameters(controller);
2116
2117         return scic_controller_reset(controller);
2118 }
2119
2120 /* --------------------------------------------------------------------------- */
2121
2122 enum sci_status scic_controller_initialize(
2123         struct scic_sds_controller *scic)
2124 {
2125         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2126         sci_base_controller_handler_t initialize;
2127         u32 state;
2128
2129         state = scic->parent.state_machine.current_state_id;
2130         initialize = scic_sds_controller_state_handler_table[state].base.initialize;
2131
2132         if (initialize)
2133                 status = initialize(&scic->parent);
2134         else
2135                 dev_warn(scic_to_dev(scic),
2136                          "%s: SCIC Controller initialize operation requested "
2137                          "in invalid state %d\n",
2138                          __func__,
2139                          sci_base_state_machine_get_state(
2140                                  scic_sds_controller_get_base_state_machine(
2141                                          scic)));
2142
2143         return status;
2144 }
2145
2146 /* --------------------------------------------------------------------------- */
2147
2148 u32 scic_controller_get_suggested_start_timeout(
2149         struct scic_sds_controller *sc)
2150 {
2151         /* Validate the user supplied parameters. */
2152         if (sc == NULL)
2153                 return 0;
2154
2155         /*
2156          * The suggested minimum timeout value for a controller start operation:
2157          *
2158          *     Signature FIS Timeout
2159          *   + Phy Start Timeout
2160          *   + Number of Phy Spin Up Intervals
2161          *   ---------------------------------
2162          *   Number of milliseconds for the controller start operation.
2163          *
2164          * NOTE: The number of phy spin up intervals will be equivalent
2165          *       to the number of phys divided by the number phys allowed
2166          *       per interval - 1 (once OEM parameters are supported).
2167          *       Currently we assume only 1 phy per interval. */
2168
2169         return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
2170                 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
2171                 + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
2172 }
2173
2174 /* --------------------------------------------------------------------------- */
2175
2176 enum sci_status scic_controller_start(
2177         struct scic_sds_controller *scic,
2178         u32 timeout)
2179 {
2180         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2181         sci_base_controller_timed_handler_t start;
2182         u32 state;
2183
2184         state = scic->parent.state_machine.current_state_id;
2185         start = scic_sds_controller_state_handler_table[state].base.start;
2186
2187         if (start)
2188                 status = start(&scic->parent, timeout);
2189         else
2190                 dev_warn(scic_to_dev(scic),
2191                          "%s: SCIC Controller start operation requested in "
2192                          "invalid state %d\n",
2193                          __func__,
2194                          sci_base_state_machine_get_state(
2195                                  scic_sds_controller_get_base_state_machine(
2196                                          scic)));
2197
2198         return status;
2199 }
2200
2201 /* --------------------------------------------------------------------------- */
2202
2203 enum sci_status scic_controller_stop(
2204         struct scic_sds_controller *scic,
2205         u32 timeout)
2206 {
2207         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2208         sci_base_controller_timed_handler_t stop;
2209         u32 state;
2210
2211         state = scic->parent.state_machine.current_state_id;
2212         stop = scic_sds_controller_state_handler_table[state].base.stop;
2213
2214         if (stop)
2215                 status = stop(&scic->parent, timeout);
2216         else
2217                 dev_warn(scic_to_dev(scic),
2218                          "%s: SCIC Controller stop operation requested in "
2219                          "invalid state %d\n",
2220                          __func__,
2221                          sci_base_state_machine_get_state(
2222                                  scic_sds_controller_get_base_state_machine(
2223                                          scic)));
2224
2225         return status;
2226 }
2227
2228 /* --------------------------------------------------------------------------- */
2229
2230 enum sci_status scic_controller_reset(
2231         struct scic_sds_controller *scic)
2232 {
2233         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2234         sci_base_controller_handler_t reset;
2235         u32 state;
2236
2237         state = scic->parent.state_machine.current_state_id;
2238         reset = scic_sds_controller_state_handler_table[state].base.reset;
2239
2240         if (reset)
2241                 status = reset(&scic->parent);
2242         else
2243                 dev_warn(scic_to_dev(scic),
2244                          "%s: SCIC Controller reset operation requested in "
2245                          "invalid state %d\n",
2246                          __func__,
2247                          sci_base_state_machine_get_state(
2248                                  scic_sds_controller_get_base_state_machine(
2249                                          scic)));
2250
2251         return status;
2252 }
2253
2254 enum sci_io_status scic_controller_start_io(
2255         struct scic_sds_controller *scic,
2256         struct scic_sds_remote_device *remote_device,
2257         struct scic_sds_request *io_request,
2258         u16 io_tag)
2259 {
2260         u32 state;
2261         sci_base_controller_start_request_handler_t start_io;
2262
2263         state = scic->parent.state_machine.current_state_id;
2264         start_io = scic_sds_controller_state_handler_table[state].base.start_io;
2265
2266         return start_io(&scic->parent,
2267                         (struct sci_base_remote_device *) remote_device,
2268                         (struct sci_base_request *)io_request, io_tag);
2269 }
2270
2271 /* --------------------------------------------------------------------------- */
2272
2273 enum sci_status scic_controller_terminate_request(
2274         struct scic_sds_controller *scic,
2275         struct scic_sds_remote_device *remote_device,
2276         struct scic_sds_request *request)
2277 {
2278         sci_base_controller_request_handler_t terminate_request;
2279         u32 state;
2280
2281         state = scic->parent.state_machine.current_state_id;
2282         terminate_request = scic_sds_controller_state_handler_table[state].terminate_request;
2283
2284         return terminate_request(&scic->parent,
2285                                  (struct sci_base_remote_device *)remote_device,
2286                                  (struct sci_base_request *)request);
2287 }
2288
2289 /* --------------------------------------------------------------------------- */
2290
2291 enum sci_status scic_controller_complete_io(
2292         struct scic_sds_controller *scic,
2293         struct scic_sds_remote_device *remote_device,
2294         struct scic_sds_request *io_request)
2295 {
2296         u32 state;
2297         sci_base_controller_request_handler_t complete_io;
2298
2299         state = scic->parent.state_machine.current_state_id;
2300         complete_io = scic_sds_controller_state_handler_table[state].base.complete_io;
2301
2302         return complete_io(&scic->parent,
2303                            (struct sci_base_remote_device *)remote_device,
2304                            (struct sci_base_request *)io_request);
2305 }
2306
2307 /* --------------------------------------------------------------------------- */
2308
2309
2310 enum sci_task_status scic_controller_start_task(
2311         struct scic_sds_controller *scic,
2312         struct scic_sds_remote_device *remote_device,
2313         struct scic_sds_request *task_request,
2314         u16 task_tag)
2315 {
2316         u32 state;
2317         sci_base_controller_start_request_handler_t start_task;
2318         enum sci_task_status status = SCI_TASK_FAILURE_INVALID_STATE;
2319
2320         state = scic->parent.state_machine.current_state_id;
2321         start_task = scic_sds_controller_state_handler_table[state].base.start_task;
2322
2323         if (start_task)
2324                 status = start_task(&scic->parent,
2325                                     (struct sci_base_remote_device *)remote_device,
2326                                     (struct sci_base_request *)task_request,
2327                                     task_tag);
2328         else
2329                 dev_warn(scic_to_dev(scic),
2330                          "%s: SCIC Controller starting task from invalid "
2331                          "state\n",
2332                          __func__);
2333
2334         return status;
2335 }
2336
2337 /* --------------------------------------------------------------------------- */
2338
2339 enum sci_status scic_controller_complete_task(
2340         struct scic_sds_controller *scic,
2341         struct scic_sds_remote_device *remote_device,
2342         struct scic_sds_request *task_request)
2343 {
2344         u32 state;
2345         sci_base_controller_request_handler_t complete_task;
2346         enum sci_status status = SCI_FAILURE_INVALID_STATE;
2347
2348         state = scic->parent.state_machine.current_state_id;
2349         complete_task = scic_sds_controller_state_handler_table[state].base.complete_task;
2350
2351         if (complete_task)
2352                 status = complete_task(&scic->parent,
2353                                        (struct sci_base_remote_device *)remote_device,
2354                                        (struct sci_base_request *)task_request);
2355         else
2356                 dev_warn(scic_to_dev(scic),
2357                          "%s: SCIC Controller completing task from invalid "
2358                          "state\n",
2359                          __func__);
2360
2361         return status;
2362 }
2363
2364
2365 /* --------------------------------------------------------------------------- */
2366
2367 enum sci_status scic_controller_get_port_handle(
2368         struct scic_sds_controller *scic,
2369         u8 port_index,
2370         struct scic_sds_port **port_handle)
2371 {
2372         if (port_index < scic->logical_port_entries) {
2373                 *port_handle = &scic->port_table[port_index];
2374
2375                 return SCI_SUCCESS;
2376         }
2377
2378         return SCI_FAILURE_INVALID_PORT;
2379 }
2380
2381 /* --------------------------------------------------------------------------- */
2382
2383 enum sci_status scic_controller_get_phy_handle(
2384         struct scic_sds_controller *scic,
2385         u8 phy_index,
2386         struct scic_sds_phy **phy_handle)
2387 {
2388         if (phy_index < ARRAY_SIZE(scic->phy_table)) {
2389                 *phy_handle = &scic->phy_table[phy_index];
2390
2391                 return SCI_SUCCESS;
2392         }
2393
2394         dev_err(scic_to_dev(scic),
2395                 "%s: Controller:0x%p PhyId:0x%x invalid phy index\n",
2396                 __func__, scic, phy_index);
2397
2398         return SCI_FAILURE_INVALID_PHY;
2399 }
2400
2401 /* --------------------------------------------------------------------------- */
2402
2403 u16 scic_controller_allocate_io_tag(
2404         struct scic_sds_controller *scic)
2405 {
2406         u16 task_context;
2407         u16 sequence_count;
2408
2409         if (!sci_pool_empty(scic->tci_pool)) {
2410                 sci_pool_get(scic->tci_pool, task_context);
2411
2412                 sequence_count = scic->io_request_sequence[task_context];
2413
2414                 return scic_sds_io_tag_construct(sequence_count, task_context);
2415         }
2416
2417         return SCI_CONTROLLER_INVALID_IO_TAG;
2418 }
2419
2420 /* --------------------------------------------------------------------------- */
2421
2422 enum sci_status scic_controller_free_io_tag(
2423         struct scic_sds_controller *scic,
2424         u16 io_tag)
2425 {
2426         u16 sequence;
2427         u16 index;
2428
2429         BUG_ON(io_tag == SCI_CONTROLLER_INVALID_IO_TAG);
2430
2431         sequence = scic_sds_io_tag_get_sequence(io_tag);
2432         index    = scic_sds_io_tag_get_index(io_tag);
2433
2434         if (!sci_pool_full(scic->tci_pool)) {
2435                 if (sequence == scic->io_request_sequence[index]) {
2436                         scic_sds_io_sequence_increment(
2437                                 scic->io_request_sequence[index]);
2438
2439                         sci_pool_put(scic->tci_pool, index);
2440
2441                         return SCI_SUCCESS;
2442                 }
2443         }
2444
2445         return SCI_FAILURE_INVALID_IO_TAG;
2446 }
2447
2448 /* --------------------------------------------------------------------------- */
2449
2450 void scic_controller_enable_interrupts(
2451         struct scic_sds_controller *scic)
2452 {
2453         BUG_ON(scic->smu_registers == NULL);
2454         SMU_IMR_WRITE(scic, 0x00000000);
2455 }
2456
2457 /* --------------------------------------------------------------------------- */
2458
2459 void scic_controller_disable_interrupts(
2460         struct scic_sds_controller *scic)
2461 {
2462         BUG_ON(scic->smu_registers == NULL);
2463         SMU_IMR_WRITE(scic, 0xffffffff);
2464 }
2465
2466 /* --------------------------------------------------------------------------- */
2467
2468 enum sci_status scic_controller_set_mode(
2469         struct scic_sds_controller *scic,
2470         enum sci_controller_mode operating_mode)
2471 {
2472         enum sci_status status          = SCI_SUCCESS;
2473
2474         if ((scic->parent.state_machine.current_state_id ==
2475                                 SCI_BASE_CONTROLLER_STATE_INITIALIZING) ||
2476             (scic->parent.state_machine.current_state_id ==
2477                                 SCI_BASE_CONTROLLER_STATE_INITIALIZED)) {
2478                 switch (operating_mode) {
2479                 case SCI_MODE_SPEED:
2480                         scic->remote_node_entries      = SCI_MAX_REMOTE_DEVICES;
2481                         scic->task_context_entries     = SCU_IO_REQUEST_COUNT;
2482                         scic->uf_control.buffers.count =
2483                                 SCU_UNSOLICITED_FRAME_COUNT;
2484                         scic->completion_event_entries = SCU_EVENT_COUNT;
2485                         scic->completion_queue_entries =
2486                                 SCU_COMPLETION_QUEUE_COUNT;
2487                         scic_sds_controller_build_memory_descriptor_table(scic);
2488                         break;
2489
2490                 case SCI_MODE_SIZE:
2491                         scic->remote_node_entries      = SCI_MIN_REMOTE_DEVICES;
2492                         scic->task_context_entries     = SCI_MIN_IO_REQUESTS;
2493                         scic->uf_control.buffers.count =
2494                                 SCU_MIN_UNSOLICITED_FRAMES;
2495                         scic->completion_event_entries = SCU_MIN_EVENTS;
2496                         scic->completion_queue_entries =
2497                                 SCU_MIN_COMPLETION_QUEUE_ENTRIES;
2498                         scic_sds_controller_build_memory_descriptor_table(scic);
2499                         break;
2500
2501                 default:
2502                         status = SCI_FAILURE_INVALID_PARAMETER_VALUE;
2503                         break;
2504                 }
2505         } else
2506                 status = SCI_FAILURE_INVALID_STATE;
2507
2508         return status;
2509 }
2510
2511 /**
2512  * scic_sds_controller_reset_hardware() -
2513  *
2514  * This method will reset the controller hardware.
2515  */
2516 void scic_sds_controller_reset_hardware(
2517         struct scic_sds_controller *scic)
2518 {
2519         /* Disable interrupts so we dont take any spurious interrupts */
2520         scic_controller_disable_interrupts(scic);
2521
2522         /* Reset the SCU */
2523         SMU_SMUSRCR_WRITE(scic, 0xFFFFFFFF);
2524
2525         /* Delay for 1ms to before clearing the CQP and UFQPR. */
2526         udelay(1000);
2527
2528         /* The write to the CQGR clears the CQP */
2529         SMU_CQGR_WRITE(scic, 0x00000000);
2530
2531         /* The write to the UFQGP clears the UFQPR */
2532         SCU_UFQGP_WRITE(scic, 0x00000000);
2533 }
2534
2535 /* --------------------------------------------------------------------------- */
2536
2537 enum sci_status scic_user_parameters_set(
2538         struct scic_sds_controller *scic,
2539         union scic_user_parameters *scic_parms)
2540 {
2541         if (
2542                 (scic->parent.state_machine.current_state_id
2543                  == SCI_BASE_CONTROLLER_STATE_RESET)
2544                 || (scic->parent.state_machine.current_state_id
2545                     == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2546                 || (scic->parent.state_machine.current_state_id
2547                     == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2548                 ) {
2549                 u16 index;
2550
2551                 /*
2552                  * Validate the user parameters.  If they are not legal, then
2553                  * return a failure. */
2554                 for (index = 0; index < SCI_MAX_PHYS; index++) {
2555                         if (!(scic_parms->sds1.phys[index].max_speed_generation
2556                              <= SCIC_SDS_PARM_MAX_SPEED
2557                              && scic_parms->sds1.phys[index].max_speed_generation
2558                              > SCIC_SDS_PARM_NO_SPEED))
2559                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2560
2561                         if (scic_parms->sds1.phys[index].in_connection_align_insertion_frequency < 3)
2562                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2563                         if (
2564                             (scic_parms->sds1.phys[index].in_connection_align_insertion_frequency < 3) ||
2565                             (scic_parms->sds1.phys[index].align_insertion_frequency == 0) ||
2566                             (scic_parms->sds1.phys[index].notify_enable_spin_up_insertion_frequency == 0)
2567                             )
2568                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2569                 }
2570
2571                 if ((scic_parms->sds1.stp_inactivity_timeout == 0) ||
2572                    (scic_parms->sds1.ssp_inactivity_timeout == 0) ||
2573                    (scic_parms->sds1.stp_max_occupancy_timeout == 0) ||
2574                    (scic_parms->sds1.ssp_max_occupancy_timeout == 0) ||
2575                    (scic_parms->sds1.no_outbound_task_timeout == 0))
2576                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2577
2578                 memcpy(&scic->user_parameters, scic_parms, sizeof(*scic_parms));
2579
2580                 return SCI_SUCCESS;
2581         }
2582
2583         return SCI_FAILURE_INVALID_STATE;
2584 }
2585
2586 /* --------------------------------------------------------------------------- */
2587
2588 void scic_user_parameters_get(
2589         struct scic_sds_controller *scic,
2590         union scic_user_parameters *scic_parms)
2591 {
2592         memcpy(scic_parms, (&scic->user_parameters), sizeof(*scic_parms));
2593 }
2594
2595 /* --------------------------------------------------------------------------- */
2596
2597 enum sci_status scic_oem_parameters_set(
2598         struct scic_sds_controller *scic,
2599         union scic_oem_parameters *scic_parms)
2600 {
2601         if (
2602                 (scic->parent.state_machine.current_state_id
2603                  == SCI_BASE_CONTROLLER_STATE_RESET)
2604                 || (scic->parent.state_machine.current_state_id
2605                     == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2606                 || (scic->parent.state_machine.current_state_id
2607                     == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2608                 ) {
2609                 u16 index;
2610
2611                 /*
2612                  * Validate the oem parameters.  If they are not legal, then
2613                  * return a failure. */
2614                 for (index = 0; index < SCI_MAX_PORTS; index++) {
2615                         if (scic_parms->sds1.ports[index].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX) {
2616                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2617                         }
2618                 }
2619
2620                 for (index = 0; index < SCI_MAX_PHYS; index++) {
2621                         if (
2622                                 scic_parms->sds1.phys[index].sas_address.high == 0
2623                                 && scic_parms->sds1.phys[index].sas_address.low  == 0
2624                                 ) {
2625                                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2626                         }
2627                 }
2628
2629                 memcpy(&scic->oem_parameters, scic_parms, sizeof(*scic_parms));
2630                 return SCI_SUCCESS;
2631         }
2632
2633         return SCI_FAILURE_INVALID_STATE;
2634 }
2635
2636 /* --------------------------------------------------------------------------- */
2637
2638 void scic_oem_parameters_get(
2639         struct scic_sds_controller *scic,
2640         union scic_oem_parameters *scic_parms)
2641 {
2642         memcpy(scic_parms, (&scic->oem_parameters), sizeof(*scic_parms));
2643 }
2644
2645 /* --------------------------------------------------------------------------- */
2646
2647
2648 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
2649 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
2650 #define INTERRUPT_COALESCE_TIMEOUT_MAX_US                    2700000
2651 #define INTERRUPT_COALESCE_NUMBER_MAX                        256
2652 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN                7
2653 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX                28
2654
2655 enum sci_status scic_controller_set_interrupt_coalescence(
2656         struct scic_sds_controller *scic_controller,
2657         u32 coalesce_number,
2658         u32 coalesce_timeout)
2659 {
2660         u8 timeout_encode = 0;
2661         u32 min = 0;
2662         u32 max = 0;
2663
2664         /* Check if the input parameters fall in the range. */
2665         if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX)
2666                 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2667
2668         /*
2669          *  Defined encoding for interrupt coalescing timeout:
2670          *              Value   Min      Max     Units
2671          *              -----   ---      ---     -----
2672          *              0       -        -       Disabled
2673          *              1       13.3     20.0    ns
2674          *              2       26.7     40.0
2675          *              3       53.3     80.0
2676          *              4       106.7    160.0
2677          *              5       213.3    320.0
2678          *              6       426.7    640.0
2679          *              7       853.3    1280.0
2680          *              8       1.7      2.6     us
2681          *              9       3.4      5.1
2682          *              10      6.8      10.2
2683          *              11      13.7     20.5
2684          *              12      27.3     41.0
2685          *              13      54.6     81.9
2686          *              14      109.2    163.8
2687          *              15      218.5    327.7
2688          *              16      436.9    655.4
2689          *              17      873.8    1310.7
2690          *              18      1.7      2.6     ms
2691          *              19      3.5      5.2
2692          *              20      7.0      10.5
2693          *              21      14.0     21.0
2694          *              22      28.0     41.9
2695          *              23      55.9     83.9
2696          *              24      111.8    167.8
2697          *              25      223.7    335.5
2698          *              26      447.4    671.1
2699          *              27      894.8    1342.2
2700          *              28      1.8      2.7     s
2701          *              Others Undefined */
2702
2703         /*
2704          * Use the table above to decide the encode of interrupt coalescing timeout
2705          * value for register writing. */
2706         if (coalesce_timeout == 0)
2707                 timeout_encode = 0;
2708         else{
2709                 /* make the timeout value in unit of (10 ns). */
2710                 coalesce_timeout = coalesce_timeout * 100;
2711                 min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10;
2712                 max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10;
2713
2714                 /* get the encode of timeout for register writing. */
2715                 for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN;
2716                       timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX;
2717                       timeout_encode++) {
2718                         if (min <= coalesce_timeout &&  max > coalesce_timeout)
2719                                 break;
2720                         else if (coalesce_timeout >= max && coalesce_timeout < min * 2
2721                                  && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) {
2722                                 if ((coalesce_timeout - max) < (2 * min - coalesce_timeout))
2723                                         break;
2724                                 else{
2725                                         timeout_encode++;
2726                                         break;
2727                                 }
2728                         } else {
2729                                 max = max * 2;
2730                                 min = min * 2;
2731                         }
2732                 }
2733
2734                 if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1)
2735                         /* the value is out of range. */
2736                         return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2737         }
2738
2739         SMU_ICC_WRITE(
2740                 scic_controller,
2741                 (SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
2742                  SMU_ICC_GEN_VAL(TIMER, timeout_encode))
2743                 );
2744
2745         scic_controller->interrupt_coalesce_number = (u16)coalesce_number;
2746         scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100;
2747
2748         return SCI_SUCCESS;
2749 }
2750
2751
2752 struct scic_sds_controller *scic_controller_alloc(struct device *dev)
2753 {
2754         return devm_kzalloc(dev, sizeof(struct scic_sds_controller), GFP_KERNEL);
2755 }
2756
2757 /*
2758  * *****************************************************************************
2759  * * DEFAULT STATE HANDLERS
2760  * ***************************************************************************** */
2761
2762 /**
2763  *
2764  * @controller: This is struct sci_base_controller object which is cast into a
2765  *    struct scic_sds_controller object.
2766  * @remote_device: This is struct sci_base_remote_device which, if it was used, would
2767  *    be cast to a struct scic_sds_remote_device.
2768  * @io_request: This is the struct sci_base_request which, if it was used, would be
2769  *    cast to a SCIC_SDS_IO_REQUEST.
2770  * @io_tag: This is the IO tag to be assigned to the IO request or
2771  *    SCI_CONTROLLER_INVALID_IO_TAG.
2772  *
2773  * This method is called when the struct scic_sds_controller default start io/task
2774  * handler is in place. - Issue a warning message enum sci_status
2775  * SCI_FAILURE_INVALID_STATE
2776  */
2777 static enum sci_status scic_sds_controller_default_start_operation_handler(
2778         struct sci_base_controller *controller,
2779         struct sci_base_remote_device *remote_device,
2780         struct sci_base_request *io_request,
2781         u16 io_tag)
2782 {
2783         struct scic_sds_controller *this_controller;
2784
2785         this_controller = (struct scic_sds_controller *)controller;
2786
2787         dev_warn(scic_to_dev(this_controller),
2788                  "%s: SCIC Controller requested to start an io/task from "
2789                  "invalid state %d\n",
2790                  __func__,
2791                  sci_base_state_machine_get_state(
2792                          scic_sds_controller_get_base_state_machine(
2793                                  this_controller)));
2794
2795         return SCI_FAILURE_INVALID_STATE;
2796 }
2797
2798 /**
2799  *
2800  * @controller: This is struct sci_base_controller object which is cast into a
2801  *    struct scic_sds_controller object.
2802  * @remote_device: This is struct sci_base_remote_device which, if it was used, would
2803  *    be cast to a struct scic_sds_remote_device.
2804  * @io_request: This is the struct sci_base_request which, if it was used, would be
2805  *    cast to a SCIC_SDS_IO_REQUEST.
2806  *
2807  * This method is called when the struct scic_sds_controller default request handler
2808  * is in place. - Issue a warning message enum sci_status SCI_FAILURE_INVALID_STATE
2809  */
2810 static enum sci_status scic_sds_controller_default_request_handler(
2811         struct sci_base_controller *controller,
2812         struct sci_base_remote_device *remote_device,
2813         struct sci_base_request *io_request)
2814 {
2815         struct scic_sds_controller *this_controller;
2816
2817         this_controller = (struct scic_sds_controller *)controller;
2818
2819         dev_warn(scic_to_dev(this_controller),
2820                 "%s: SCIC Controller request operation from invalid state %d\n",
2821                 __func__,
2822                 sci_base_state_machine_get_state(
2823                         scic_sds_controller_get_base_state_machine(
2824                                 this_controller)));
2825
2826         return SCI_FAILURE_INVALID_STATE;
2827 }
2828
2829 /*
2830  * *****************************************************************************
2831  * * GENERAL (COMMON) STATE HANDLERS
2832  * ***************************************************************************** */
2833
2834 /**
2835  *
2836  * @controller: The struct sci_base_controller object which is cast into a
2837  *    struct scic_sds_controller object.
2838  *
2839  * This method is called when the struct scic_sds_controller is in the ready state
2840  * reset handler is in place. - Transition to
2841  * SCI_BASE_CONTROLLER_STATE_RESETTING enum sci_status SCI_SUCCESS
2842  */
2843 static enum sci_status scic_sds_controller_general_reset_handler(
2844         struct sci_base_controller *controller)
2845 {
2846         struct scic_sds_controller *this_controller;
2847
2848         this_controller = (struct scic_sds_controller *)controller;
2849
2850         /*
2851          * The reset operation is not a graceful cleanup just perform the state
2852          * transition. */
2853         sci_base_state_machine_change_state(
2854                 scic_sds_controller_get_base_state_machine(this_controller),
2855                 SCI_BASE_CONTROLLER_STATE_RESETTING
2856                 );
2857
2858         return SCI_SUCCESS;
2859 }
2860
2861 /*
2862  * *****************************************************************************
2863  * * RESET STATE HANDLERS
2864  * ***************************************************************************** */
2865
2866 /**
2867  *
2868  * @controller: This is the struct sci_base_controller object which is cast into a
2869  *    struct scic_sds_controller object.
2870  *
2871  * This method is the struct scic_sds_controller initialize handler for the reset
2872  * state. - Currently this function does nothing enum sci_status SCI_FAILURE This
2873  * function is not yet implemented and is a valid request from the reset state.
2874  */
2875 static enum sci_status scic_sds_controller_reset_state_initialize_handler(
2876         struct sci_base_controller *controller)
2877 {
2878         u32 index;
2879         enum sci_status result = SCI_SUCCESS;
2880         struct scic_sds_controller *this_controller;
2881
2882         this_controller = (struct scic_sds_controller *)controller;
2883
2884         sci_base_state_machine_change_state(
2885                 scic_sds_controller_get_base_state_machine(this_controller),
2886                 SCI_BASE_CONTROLLER_STATE_INITIALIZING
2887                 );
2888
2889         this_controller->timeout_timer = isci_event_timer_create(
2890                 this_controller,
2891                 (void (*)(void *))scic_sds_controller_timeout_handler,
2892                 (void (*)(void *))controller);
2893
2894         scic_sds_controller_initialize_phy_startup(this_controller);
2895
2896         scic_sds_controller_initialize_power_control(this_controller);
2897
2898         /*
2899          * There is nothing to do here for B0 since we do not have to
2900          * program the AFE registers.
2901          * / @todo The AFE settings are supposed to be correct for the B0 but
2902          * /       presently they seem to be wrong. */
2903         scic_sds_controller_afe_initialization(this_controller);
2904
2905         if (SCI_SUCCESS == result) {
2906                 u32 status;
2907                 u32 terminate_loop;
2908
2909                 /* Take the hardware out of reset */
2910                 SMU_SMUSRCR_WRITE(this_controller, 0x00000000);
2911
2912                 /*
2913                  * / @todo Provide meaningfull error code for hardware failure
2914                  * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2915                 result = SCI_FAILURE;
2916                 terminate_loop = 100;
2917
2918                 while (terminate_loop-- && (result != SCI_SUCCESS)) {
2919                         /* Loop until the hardware reports success */
2920                         udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME);
2921                         status = SMU_SMUCSR_READ(this_controller);
2922
2923                         if ((status & SCU_RAM_INIT_COMPLETED) == SCU_RAM_INIT_COMPLETED) {
2924                                 result = SCI_SUCCESS;
2925                         }
2926                 }
2927         }
2928
2929         if (result == SCI_SUCCESS) {
2930                 u32 max_supported_ports;
2931                 u32 max_supported_devices;
2932                 u32 max_supported_io_requests;
2933                 u32 device_context_capacity;
2934
2935                 /*
2936                  * Determine what are the actaul device capacities that the
2937                  * hardware will support */
2938                 device_context_capacity = SMU_DCC_READ(this_controller);
2939
2940                 max_supported_ports =
2941                         smu_dcc_get_max_ports(device_context_capacity);
2942                 max_supported_devices =
2943                         smu_dcc_get_max_remote_node_context(device_context_capacity);
2944                 max_supported_io_requests =
2945                         smu_dcc_get_max_task_context(device_context_capacity);
2946
2947                 /* Make all PEs that are unassigned match up with the logical ports */
2948                 for (index = 0; index < max_supported_ports; index++) {
2949                         scu_register_write(
2950                                 this_controller,
2951                                 this_controller->scu_registers->peg0.ptsg.protocol_engine[index],
2952                                 index
2953                                 );
2954                 }
2955
2956                 /* Record the smaller of the two capacity values */
2957                 this_controller->logical_port_entries =
2958                         min(max_supported_ports, this_controller->logical_port_entries);
2959
2960                 this_controller->task_context_entries =
2961                         min(max_supported_io_requests, this_controller->task_context_entries);
2962
2963                 this_controller->remote_node_entries =
2964                         min(max_supported_devices, this_controller->remote_node_entries);
2965
2966                 /*
2967                  * Now that we have the correct hardware reported minimum values
2968                  * build the MDL for the controller.  Default to a performance
2969                  * configuration. */
2970                 scic_controller_set_mode(this_controller, SCI_MODE_SPEED);
2971         }
2972
2973         /* Initialize hardware PCI Relaxed ordering in DMA engines */
2974         if (result == SCI_SUCCESS) {
2975                 u32 dma_configuration;
2976
2977                 /* Configure the payload DMA */
2978                 dma_configuration = SCU_PDMACR_READ(this_controller);
2979                 dma_configuration |= SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2980                 SCU_PDMACR_WRITE(this_controller, dma_configuration);
2981
2982                 /* Configure the control DMA */
2983                 dma_configuration = SCU_CDMACR_READ(this_controller);
2984                 dma_configuration |= SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2985                 SCU_CDMACR_WRITE(this_controller, dma_configuration);
2986         }
2987
2988         /*
2989          * Initialize the PHYs before the PORTs because the PHY registers
2990          * are accessed during the port initialization. */
2991         if (result == SCI_SUCCESS) {
2992                 /* Initialize the phys */
2993                 for (index = 0;
2994                      (result == SCI_SUCCESS) && (index < SCI_MAX_PHYS);
2995                      index++) {
2996                         result = scic_sds_phy_initialize(
2997                                 &this_controller->phy_table[index],
2998                                 &this_controller->scu_registers->peg0.pe[index].tl,
2999                                 &this_controller->scu_registers->peg0.pe[index].ll
3000                                 );
3001                 }
3002         }
3003
3004         if (result == SCI_SUCCESS) {
3005                 /* Initialize the logical ports */
3006                 for (index = 0;
3007                      (index < this_controller->logical_port_entries)
3008                      && (result == SCI_SUCCESS);
3009                      index++) {
3010                         result = scic_sds_port_initialize(
3011                                 &this_controller->port_table[index],
3012                                 &this_controller->scu_registers->peg0.ptsg.port[index],
3013                                 &this_controller->scu_registers->peg0.ptsg.protocol_engine,
3014                                 &this_controller->scu_registers->peg0.viit[index]
3015                                 );
3016                 }
3017         }
3018
3019         if (SCI_SUCCESS == result) {
3020                 result = scic_sds_port_configuration_agent_initialize(
3021                         this_controller,
3022                         &this_controller->port_agent
3023                         );
3024         }
3025
3026         /* Advance the controller state machine */
3027         if (result == SCI_SUCCESS) {
3028                 sci_base_state_machine_change_state(
3029                         scic_sds_controller_get_base_state_machine(this_controller),
3030                         SCI_BASE_CONTROLLER_STATE_INITIALIZED
3031                         );
3032         } else {
3033                 sci_base_state_machine_change_state(
3034                         scic_sds_controller_get_base_state_machine(this_controller),
3035                         SCI_BASE_CONTROLLER_STATE_FAILED
3036                         );
3037         }
3038
3039         return result;
3040 }
3041
3042 /*
3043  * *****************************************************************************
3044  * * INITIALIZED STATE HANDLERS
3045  * ***************************************************************************** */
3046
3047 /**
3048  *
3049  * @controller: This is the struct sci_base_controller object which is cast into a
3050  *    struct scic_sds_controller object.
3051  * @timeout: This is the allowed time for the controller object to reach the
3052  *    started state.
3053  *
3054  * This method is the struct scic_sds_controller start handler for the initialized
3055  * state. - Validate we have a good memory descriptor table - Initialze the
3056  * physical memory before programming the hardware - Program the SCU hardware
3057  * with the physical memory addresses passed in the memory descriptor table. -
3058  * Initialzie the TCi pool - Initialize the RNi pool - Initialize the
3059  * completion queue - Initialize the unsolicited frame data - Take the SCU port
3060  * task scheduler out of reset - Start the first phy object. - Transition to
3061  * SCI_BASE_CONTROLLER_STATE_STARTING. enum sci_status SCI_SUCCESS if all of the
3062  * controller start operations complete
3063  * SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD if one or more of the memory
3064  * descriptor fields is invalid.
3065  */
3066 static enum sci_status scic_sds_controller_initialized_state_start_handler(
3067         struct sci_base_controller *controller,
3068         u32 timeout)
3069 {
3070         u16 index;
3071         enum sci_status result;
3072         struct scic_sds_controller *this_controller;
3073
3074         this_controller = (struct scic_sds_controller *)controller;
3075
3076         /* Make sure that the SCI User filled in the memory descriptor table correctly */
3077         result = scic_sds_controller_validate_memory_descriptor_table(this_controller);
3078
3079         if (result == SCI_SUCCESS) {
3080                 /* The memory descriptor list looks good so program the hardware */
3081                 scic_sds_controller_ram_initialization(this_controller);
3082         }
3083
3084         if (result == SCI_SUCCESS) {
3085                 /* Build the TCi free pool */
3086                 sci_pool_initialize(this_controller->tci_pool);
3087                 for (index = 0; index < this_controller->task_context_entries; index++) {
3088                         sci_pool_put(this_controller->tci_pool, index);
3089                 }
3090
3091                 /* Build the RNi free pool */
3092                 scic_sds_remote_node_table_initialize(
3093                         &this_controller->available_remote_nodes,
3094                         this_controller->remote_node_entries
3095                         );
3096         }
3097
3098         if (result == SCI_SUCCESS) {
3099                 /*
3100                  * Before anything else lets make sure we will not be interrupted
3101                  * by the hardware. */
3102                 scic_controller_disable_interrupts(this_controller);
3103
3104                 /* Enable the port task scheduler */
3105                 scic_sds_controller_enable_port_task_scheduler(this_controller);
3106
3107                 /* Assign all the task entries to this controller physical function */
3108                 scic_sds_controller_assign_task_entries(this_controller);
3109
3110                 /* Now initialze the completion queue */
3111                 scic_sds_controller_initialize_completion_queue(this_controller);
3112
3113                 /* Initialize the unsolicited frame queue for use */
3114                 scic_sds_controller_initialize_unsolicited_frame_queue(this_controller);
3115         }
3116
3117         /* Start all of the ports on this controller */
3118         for (index = 0; index < this_controller->logical_port_entries &&
3119                         result == SCI_SUCCESS; index++) {
3120                 struct scic_sds_port *sci_port = &this_controller->port_table[index];
3121
3122                 result = sci_port->state_handlers->parent.start_handler(&sci_port->parent);
3123         }
3124
3125         if (result == SCI_SUCCESS) {
3126                 scic_sds_controller_start_next_phy(this_controller);
3127
3128                 isci_event_timer_start(this_controller,
3129                                     this_controller->timeout_timer,
3130                                     timeout);
3131
3132                 sci_base_state_machine_change_state(
3133                         scic_sds_controller_get_base_state_machine(this_controller),
3134                         SCI_BASE_CONTROLLER_STATE_STARTING
3135                         );
3136         }
3137
3138         return result;
3139 }
3140
3141 /*
3142  * *****************************************************************************
3143  * * INITIALIZED STATE HANDLERS
3144  * ***************************************************************************** */
3145
3146 /**
3147  *
3148  * @controller: This is struct scic_sds_controller which receives the link up
3149  *    notification.
3150  * @port: This is struct scic_sds_port with which the phy is associated.
3151  * @phy: This is the struct scic_sds_phy which has gone link up.
3152  *
3153  * This method is called when the struct scic_sds_controller is in the starting state
3154  * link up handler is called.  This method will perform the following: - Stop
3155  * the phy timer - Start the next phy - Report the link up condition to the
3156  * port object none
3157  */
3158 static void scic_sds_controller_starting_state_link_up_handler(
3159         struct scic_sds_controller *this_controller,
3160         struct scic_sds_port *port,
3161         struct scic_sds_phy *phy)
3162 {
3163         scic_sds_controller_phy_timer_stop(this_controller);
3164
3165         this_controller->port_agent.link_up_handler(
3166                 this_controller, &this_controller->port_agent, port, phy
3167                 );
3168         /* scic_sds_port_link_up(port, phy); */
3169
3170         scic_sds_controller_start_next_phy(this_controller);
3171 }
3172
3173 /**
3174  *
3175  * @controller: This is struct scic_sds_controller which receives the link down
3176  *    notification.
3177  * @port: This is struct scic_sds_port with which the phy is associated.
3178  * @phy: This is the struct scic_sds_phy which has gone link down.
3179  *
3180  * This method is called when the struct scic_sds_controller is in the starting state
3181  * link down handler is called. - Report the link down condition to the port
3182  * object none
3183  */
3184 static void scic_sds_controller_starting_state_link_down_handler(
3185         struct scic_sds_controller *this_controller,
3186         struct scic_sds_port *port,
3187         struct scic_sds_phy *phy)
3188 {
3189         this_controller->port_agent.link_down_handler(
3190                 this_controller, &this_controller->port_agent, port, phy
3191                 );
3192         /* scic_sds_port_link_down(port, phy); */
3193 }
3194
3195 /*
3196  * *****************************************************************************
3197  * * READY STATE HANDLERS
3198  * ***************************************************************************** */
3199
3200 /**
3201  *
3202  * @controller: The struct sci_base_controller object which is cast into a
3203  *    struct scic_sds_controller object.
3204  * @timeout: The timeout for when the stop operation should report a failure.
3205  *
3206  * This method is called when the struct scic_sds_controller is in the ready state
3207  * stop handler is called. - Start the timeout timer - Transition to
3208  * SCI_BASE_CONTROLLER_STATE_STOPPING. enum sci_status SCI_SUCCESS
3209  */
3210 static enum sci_status scic_sds_controller_ready_state_stop_handler(
3211         struct sci_base_controller *controller,
3212         u32 timeout)
3213 {
3214         struct scic_sds_controller *this_controller;
3215
3216         this_controller = (struct scic_sds_controller *)controller;
3217
3218         isci_event_timer_start(this_controller,
3219                             this_controller->timeout_timer,
3220                             timeout);
3221
3222         sci_base_state_machine_change_state(
3223                 scic_sds_controller_get_base_state_machine(this_controller),
3224                 SCI_BASE_CONTROLLER_STATE_STOPPING
3225                 );
3226
3227         return SCI_SUCCESS;
3228 }
3229
3230 /**
3231  *
3232  * @controller: This is struct sci_base_controller object which is cast into a
3233  *    struct scic_sds_controller object.
3234  * @remote_device: This is struct sci_base_remote_device which is cast to a
3235  *    struct scic_sds_remote_device object.
3236  * @io_request: This is the struct sci_base_request which is cast to a
3237  *    SCIC_SDS_IO_REQUEST object.
3238  * @io_tag: This is the IO tag to be assigned to the IO request or
3239  *    SCI_CONTROLLER_INVALID_IO_TAG.
3240  *
3241  * This method is called when the struct scic_sds_controller is in the ready state and
3242  * the start io handler is called. - Start the io request on the remote device
3243  * - if successful - assign the io_request to the io_request_table - post the
3244  * request to the hardware enum sci_status SCI_SUCCESS if the start io operation
3245  * succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could not be
3246  * allocated for the io request. SCI_FAILURE_INVALID_STATE if one or more
3247  * objects are not in a valid state to accept io requests. How does the io_tag
3248  * parameter get assigned to the io request?
3249  */
3250 static enum sci_status scic_sds_controller_ready_state_start_io_handler(
3251         struct sci_base_controller *controller,
3252         struct sci_base_remote_device *remote_device,
3253         struct sci_base_request *io_request,
3254         u16 io_tag)
3255 {
3256         enum sci_status status;
3257
3258         struct scic_sds_controller *this_controller;
3259         struct scic_sds_request *the_request;
3260         struct scic_sds_remote_device *the_device;
3261
3262         this_controller = (struct scic_sds_controller *)controller;
3263         the_request = (struct scic_sds_request *)io_request;
3264         the_device = (struct scic_sds_remote_device *)remote_device;
3265
3266         status = scic_sds_remote_device_start_io(this_controller, the_device, the_request);
3267
3268         if (status == SCI_SUCCESS) {
3269                 this_controller->io_request_table[
3270                         scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3271
3272                 scic_sds_controller_post_request(
3273                         this_controller,
3274                         scic_sds_request_get_post_context(the_request)
3275                         );
3276         }
3277
3278         return status;
3279 }
3280
3281 /**
3282  *
3283  * @controller: This is struct sci_base_controller object which is cast into a
3284  *    struct scic_sds_controller object.
3285  * @remote_device: This is struct sci_base_remote_device which is cast to a
3286  *    struct scic_sds_remote_device object.
3287  * @io_request: This is the struct sci_base_request which is cast to a
3288  *    SCIC_SDS_IO_REQUEST object.
3289  *
3290  * This method is called when the struct scic_sds_controller is in the ready state and
3291  * the complete io handler is called. - Complete the io request on the remote
3292  * device - if successful - remove the io_request to the io_request_table
3293  * enum sci_status SCI_SUCCESS if the start io operation succeeds
3294  * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3295  * accept io requests.
3296  */
3297 static enum sci_status scic_sds_controller_ready_state_complete_io_handler(
3298         struct sci_base_controller *controller,
3299         struct sci_base_remote_device *remote_device,
3300         struct sci_base_request *io_request)
3301 {
3302         u16 index;
3303         enum sci_status status;
3304         struct scic_sds_controller *this_controller;
3305         struct scic_sds_request *the_request;
3306         struct scic_sds_remote_device *the_device;
3307
3308         this_controller = (struct scic_sds_controller *)controller;
3309         the_request = (struct scic_sds_request *)io_request;
3310         the_device = (struct scic_sds_remote_device *)remote_device;
3311
3312         status = scic_sds_remote_device_complete_io(
3313                 this_controller, the_device, the_request);
3314
3315         if (status == SCI_SUCCESS) {
3316                 index = scic_sds_io_tag_get_index(the_request->io_tag);
3317                 this_controller->io_request_table[index] = NULL;
3318         }
3319
3320         return status;
3321 }
3322
3323 /**
3324  *
3325  * @controller: This is struct sci_base_controller object which is cast into a
3326  *    struct scic_sds_controller object.
3327  * @remote_device: This is struct sci_base_remote_device which is cast to a
3328  *    struct scic_sds_remote_device object.
3329  * @io_request: This is the struct sci_base_request which is cast to a
3330  *    SCIC_SDS_IO_REQUEST object.
3331  *
3332  * This method is called when the struct scic_sds_controller is in the ready state and
3333  * the continue io handler is called. enum sci_status
3334  */
3335 static enum sci_status scic_sds_controller_ready_state_continue_io_handler(
3336         struct sci_base_controller *controller,
3337         struct sci_base_remote_device *remote_device,
3338         struct sci_base_request *io_request)
3339 {
3340         struct scic_sds_controller *this_controller;
3341         struct scic_sds_request *the_request;
3342
3343         the_request     = (struct scic_sds_request *)io_request;
3344         this_controller = (struct scic_sds_controller *)controller;
3345
3346         this_controller->io_request_table[
3347                 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3348
3349         scic_sds_controller_post_request(
3350                 this_controller,
3351                 scic_sds_request_get_post_context(the_request)
3352                 );
3353
3354         return SCI_SUCCESS;
3355 }
3356
3357 /**
3358  *
3359  * @controller: This is struct sci_base_controller object which is cast into a
3360  *    struct scic_sds_controller object.
3361  * @remote_device: This is struct sci_base_remote_device which is cast to a
3362  *    struct scic_sds_remote_device object.
3363  * @io_request: This is the struct sci_base_request which is cast to a
3364  *    SCIC_SDS_IO_REQUEST object.
3365  * @task_tag: This is the task tag to be assigned to the task request or
3366  *    SCI_CONTROLLER_INVALID_IO_TAG.
3367  *
3368  * This method is called when the struct scic_sds_controller is in the ready state and
3369  * the start task handler is called. - The remote device is requested to start
3370  * the task request - if successful - assign the task to the io_request_table -
3371  * post the request to the SCU hardware enum sci_status SCI_SUCCESS if the start io
3372  * operation succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could
3373  * not be allocated for the io request. SCI_FAILURE_INVALID_STATE if one or
3374  * more objects are not in a valid state to accept io requests. How does the io
3375  * tag get assigned in this code path?
3376  */
3377 static enum sci_status scic_sds_controller_ready_state_start_task_handler(
3378         struct sci_base_controller *controller,
3379         struct sci_base_remote_device *remote_device,
3380         struct sci_base_request *io_request,
3381         u16 task_tag)
3382 {
3383         struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3384                                                  controller;
3385         struct scic_sds_request *the_request     = (struct scic_sds_request *)
3386                                               io_request;
3387         struct scic_sds_remote_device *the_device      = (struct scic_sds_remote_device *)
3388                                                     remote_device;
3389         enum sci_status status;
3390
3391         status = scic_sds_remote_device_start_task(
3392                 this_controller, the_device, the_request
3393                 );
3394
3395         if (status == SCI_SUCCESS) {
3396                 this_controller->io_request_table[
3397                         scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3398
3399                 scic_sds_controller_post_request(
3400                         this_controller,
3401                         scic_sds_request_get_post_context(the_request)
3402                         );
3403         } else if (status == SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS) {
3404                 this_controller->io_request_table[
3405                         scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3406
3407                 /*
3408                  * We will let framework know this task request started successfully,
3409                  * although core is still woring on starting the request (to post tc when
3410                  * RNC is resumed.) */
3411                 status = SCI_SUCCESS;
3412         }
3413         return status;
3414 }
3415
3416 /**
3417  *
3418  * @controller: This is struct sci_base_controller object which is cast into a
3419  *    struct scic_sds_controller object.
3420  * @remote_device: This is struct sci_base_remote_device which is cast to a
3421  *    struct scic_sds_remote_device object.
3422  * @io_request: This is the struct sci_base_request which is cast to a
3423  *    SCIC_SDS_IO_REQUEST object.
3424  *
3425  * This method is called when the struct scic_sds_controller is in the ready state and
3426  * the terminate request handler is called. - call the io request terminate
3427  * function - if successful - post the terminate request to the SCU hardware
3428  * enum sci_status SCI_SUCCESS if the start io operation succeeds
3429  * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3430  * accept io requests.
3431  */
3432 static enum sci_status scic_sds_controller_ready_state_terminate_request_handler(
3433         struct sci_base_controller *controller,
3434         struct sci_base_remote_device *remote_device,
3435         struct sci_base_request *io_request)
3436 {
3437         struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3438                                                  controller;
3439         struct scic_sds_request *the_request     = (struct scic_sds_request *)
3440                                               io_request;
3441         enum sci_status status;
3442
3443         status = scic_sds_io_request_terminate(the_request);
3444         if (status == SCI_SUCCESS) {
3445                 /*
3446                  * Utilize the original post context command and or in the POST_TC_ABORT
3447                  * request sub-type. */
3448                 scic_sds_controller_post_request(
3449                         this_controller,
3450                         scic_sds_request_get_post_context(the_request)
3451                         | SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT
3452                         );
3453         }
3454
3455         return status;
3456 }
3457
3458 /**
3459  *
3460  * @controller: This is struct scic_sds_controller which receives the link up
3461  *    notification.
3462  * @port: This is struct scic_sds_port with which the phy is associated.
3463  * @phy: This is the struct scic_sds_phy which has gone link up.
3464  *
3465  * This method is called when the struct scic_sds_controller is in the starting state
3466  * link up handler is called.  This method will perform the following: - Stop
3467  * the phy timer - Start the next phy - Report the link up condition to the
3468  * port object none
3469  */
3470 static void scic_sds_controller_ready_state_link_up_handler(
3471         struct scic_sds_controller *this_controller,
3472         struct scic_sds_port *port,
3473         struct scic_sds_phy *phy)
3474 {
3475         this_controller->port_agent.link_up_handler(
3476                 this_controller, &this_controller->port_agent, port, phy
3477                 );
3478 }
3479
3480 /**
3481  *
3482  * @controller: This is struct scic_sds_controller which receives the link down
3483  *    notification.
3484  * @port: This is struct scic_sds_port with which the phy is associated.
3485  * @phy: This is the struct scic_sds_phy which has gone link down.
3486  *
3487  * This method is called when the struct scic_sds_controller is in the starting state
3488  * link down handler is called. - Report the link down condition to the port
3489  * object none
3490  */
3491 static void scic_sds_controller_ready_state_link_down_handler(
3492         struct scic_sds_controller *this_controller,
3493         struct scic_sds_port *port,
3494         struct scic_sds_phy *phy)
3495 {
3496         this_controller->port_agent.link_down_handler(
3497                 this_controller, &this_controller->port_agent, port, phy
3498                 );
3499 }
3500
3501 /*
3502  * *****************************************************************************
3503  * * STOPPING STATE HANDLERS
3504  * ***************************************************************************** */
3505
3506 /**
3507  *
3508  * @controller: This is struct sci_base_controller object which is cast into a
3509  *    struct scic_sds_controller object.
3510  * @remote_device: This is struct sci_base_remote_device which is cast to a
3511  *    struct scic_sds_remote_device object.
3512  * @io_request: This is the struct sci_base_request which is cast to a
3513  *    SCIC_SDS_IO_REQUEST object.
3514  *
3515  * This method is called when the struct scic_sds_controller is in a stopping state
3516  * and the complete io handler is called. - This function is not yet
3517  * implemented enum sci_status SCI_FAILURE
3518  */
3519 static enum sci_status scic_sds_controller_stopping_state_complete_io_handler(
3520         struct sci_base_controller *controller,
3521         struct sci_base_remote_device *remote_device,
3522         struct sci_base_request *io_request)
3523 {
3524         struct scic_sds_controller *this_controller;
3525
3526         this_controller = (struct scic_sds_controller *)controller;
3527
3528         /* / @todo Implement this function */
3529         return SCI_FAILURE;
3530 }
3531
3532 /**
3533  *
3534  * @controller: This is struct sci_base_controller object which is cast into a
3535  *    struct scic_sds_controller object.
3536  * @remote_device: This is struct sci_base_remote_device which is cast to a
3537  *    struct scic_sds_remote_device object.
3538  *
3539  * This method is called when the struct scic_sds_controller is in a stopping state
3540  * and the remote device has stopped.
3541  **/
3542 void scic_sds_controller_stopping_state_device_stopped_handler(
3543         struct scic_sds_controller *controller,
3544         struct scic_sds_remote_device *remote_device
3545 )
3546 {
3547         if (!scic_sds_controller_has_remote_devices_stopping(controller)) {
3548                 sci_base_state_machine_change_state(
3549                         &controller->parent.state_machine,
3550                         SCI_BASE_CONTROLLER_STATE_STOPPED
3551                 );
3552         }
3553 }
3554
3555 const struct scic_sds_controller_state_handler scic_sds_controller_state_handler_table[] = {
3556         [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3557                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3558                 .base.complete_io  = scic_sds_controller_default_request_handler,
3559                 .base.continue_io  = scic_sds_controller_default_request_handler,
3560                 .terminate_request = scic_sds_controller_default_request_handler,
3561         },
3562         [SCI_BASE_CONTROLLER_STATE_RESET] = {
3563                 .base.reset        = scic_sds_controller_general_reset_handler,
3564                 .base.initialize   = scic_sds_controller_reset_state_initialize_handler,
3565                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3566                 .base.complete_io  = scic_sds_controller_default_request_handler,
3567                 .base.continue_io  = scic_sds_controller_default_request_handler,
3568                 .terminate_request = scic_sds_controller_default_request_handler,
3569         },
3570         [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {
3571                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3572                 .base.complete_io  = scic_sds_controller_default_request_handler,
3573                 .base.continue_io  = scic_sds_controller_default_request_handler,
3574                 .terminate_request = scic_sds_controller_default_request_handler,
3575         },
3576         [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {
3577                 .base.start        = scic_sds_controller_initialized_state_start_handler,
3578                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3579                 .base.complete_io  = scic_sds_controller_default_request_handler,
3580                 .base.continue_io  = scic_sds_controller_default_request_handler,
3581                 .terminate_request = scic_sds_controller_default_request_handler,
3582         },
3583         [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3584                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3585                 .base.complete_io  = scic_sds_controller_default_request_handler,
3586                 .base.continue_io  = scic_sds_controller_default_request_handler,
3587                 .terminate_request = scic_sds_controller_default_request_handler,
3588                 .link_up           = scic_sds_controller_starting_state_link_up_handler,
3589                 .link_down         = scic_sds_controller_starting_state_link_down_handler
3590         },
3591         [SCI_BASE_CONTROLLER_STATE_READY] = {
3592                 .base.stop         = scic_sds_controller_ready_state_stop_handler,
3593                 .base.reset        = scic_sds_controller_general_reset_handler,
3594                 .base.start_io     = scic_sds_controller_ready_state_start_io_handler,
3595                 .base.complete_io  = scic_sds_controller_ready_state_complete_io_handler,
3596                 .base.continue_io  = scic_sds_controller_ready_state_continue_io_handler,
3597                 .base.start_task   = scic_sds_controller_ready_state_start_task_handler,
3598                 .base.complete_task = scic_sds_controller_ready_state_complete_io_handler,
3599                 .terminate_request = scic_sds_controller_ready_state_terminate_request_handler,
3600                 .link_up           = scic_sds_controller_ready_state_link_up_handler,
3601                 .link_down         = scic_sds_controller_ready_state_link_down_handler
3602         },
3603         [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3604                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3605                 .base.complete_io  = scic_sds_controller_default_request_handler,
3606                 .base.continue_io  = scic_sds_controller_default_request_handler,
3607                 .terminate_request = scic_sds_controller_default_request_handler,
3608         },
3609         [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3610                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3611                 .base.complete_io  = scic_sds_controller_stopping_state_complete_io_handler,
3612                 .base.continue_io  = scic_sds_controller_default_request_handler,
3613                 .terminate_request = scic_sds_controller_default_request_handler,
3614                 .remote_device_stopped_handler = scic_sds_controller_stopping_state_device_stopped_handler,
3615         },
3616         [SCI_BASE_CONTROLLER_STATE_STOPPED] = {
3617                 .base.reset        = scic_sds_controller_general_reset_handler,
3618                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3619                 .base.complete_io  = scic_sds_controller_default_request_handler,
3620                 .base.continue_io  = scic_sds_controller_default_request_handler,
3621                 .terminate_request = scic_sds_controller_default_request_handler,
3622         },
3623         [SCI_BASE_CONTROLLER_STATE_FAILED] = {
3624                 .base.reset        = scic_sds_controller_general_reset_handler,
3625                 .base.start_io     = scic_sds_controller_default_start_operation_handler,
3626                 .base.complete_io  = scic_sds_controller_default_request_handler,
3627                 .base.continue_io  = scic_sds_controller_default_request_handler,
3628                 .terminate_request = scic_sds_controller_default_request_handler,
3629         },
3630 };
3631
3632 /**
3633  *
3634  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3635  *    object.
3636  *
3637  * This method implements the actions taken by the struct scic_sds_controller on entry
3638  * to the SCI_BASE_CONTROLLER_STATE_INITIAL. - Set the state handlers to the
3639  * controllers initial state. none This function should initialze the
3640  * controller object.
3641  */
3642 static void scic_sds_controller_initial_state_enter(
3643         struct sci_base_object *object)
3644 {
3645         struct scic_sds_controller *this_controller;
3646
3647         this_controller = (struct scic_sds_controller *)object;
3648
3649         sci_base_state_machine_change_state(
3650                 &this_controller->parent.state_machine, SCI_BASE_CONTROLLER_STATE_RESET);
3651 }
3652
3653 /**
3654  *
3655  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3656  *    object.
3657  *
3658  * This method implements the actions taken by the struct scic_sds_controller on exit
3659  * from the SCI_BASE_CONTROLLER_STATE_STARTING. - This function stops the
3660  * controller starting timeout timer. none
3661  */
3662 static void scic_sds_controller_starting_state_exit(
3663         struct sci_base_object *object)
3664 {
3665         struct scic_sds_controller *scic = (struct scic_sds_controller *)object;
3666
3667         isci_event_timer_stop(scic, scic->timeout_timer);
3668 }
3669
3670 /**
3671  *
3672  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3673  *    object.
3674  *
3675  * This method implements the actions taken by the struct scic_sds_controller on entry
3676  * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3677  * controllers ready state. none
3678  */
3679 static void scic_sds_controller_ready_state_enter(
3680         struct sci_base_object *object)
3681 {
3682         struct scic_sds_controller *this_controller;
3683
3684         this_controller = (struct scic_sds_controller *)object;
3685
3686         /* set the default interrupt coalescence number and timeout value. */
3687         scic_controller_set_interrupt_coalescence(
3688                 this_controller, 0x10, 250);
3689 }
3690
3691 /**
3692  *
3693  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3694  *    object.
3695  *
3696  * This method implements the actions taken by the struct scic_sds_controller on exit
3697  * from the SCI_BASE_CONTROLLER_STATE_READY. - This function does nothing. none
3698  */
3699 static void scic_sds_controller_ready_state_exit(
3700         struct sci_base_object *object)
3701 {
3702         struct scic_sds_controller *this_controller;
3703
3704         this_controller = (struct scic_sds_controller *)object;
3705
3706         /* disable interrupt coalescence. */
3707         scic_controller_set_interrupt_coalescence(this_controller, 0, 0);
3708 }
3709
3710 /**
3711  *
3712  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3713  *    object.
3714  *
3715  * This method implements the actions taken by the struct scic_sds_controller on entry
3716  * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3717  * controllers ready state. - Stop the phys on this controller - Stop the ports
3718  * on this controller - Stop all of the remote devices on this controller none
3719  */
3720 static void scic_sds_controller_stopping_state_enter(
3721         struct sci_base_object *object)
3722 {
3723         struct scic_sds_controller *this_controller;
3724
3725         this_controller = (struct scic_sds_controller *)object;
3726
3727         /* Stop all of the components for this controller */
3728         scic_sds_controller_stop_phys(this_controller);
3729         scic_sds_controller_stop_ports(this_controller);
3730         scic_sds_controller_stop_devices(this_controller);
3731 }
3732
3733 /**
3734  *
3735  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3736  *    object.
3737  *
3738  * This method implements the actions taken by the struct scic_sds_controller on exit
3739  * from the SCI_BASE_CONTROLLER_STATE_STOPPING. - This function stops the
3740  * controller stopping timeout timer. none
3741  */
3742 static void scic_sds_controller_stopping_state_exit(
3743         struct sci_base_object *object)
3744 {
3745         struct scic_sds_controller *this_controller;
3746
3747         this_controller = (struct scic_sds_controller *)object;
3748
3749         isci_event_timer_stop(this_controller, this_controller->timeout_timer);
3750 }
3751
3752 /**
3753  *
3754  * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3755  *    object.
3756  *
3757  * This method implements the actions taken by the struct scic_sds_controller on entry
3758  * to the SCI_BASE_CONTROLLER_STATE_RESETTING. - Set the state handlers to the
3759  * controllers resetting state. - Write to the SCU hardware reset register to
3760  * force a reset - Transition to the SCI_BASE_CONTROLLER_STATE_RESET none
3761  */
3762 static void scic_sds_controller_resetting_state_enter(
3763         struct sci_base_object *object)
3764 {
3765         struct scic_sds_controller *this_controller;
3766
3767         this_controller = (struct scic_sds_controller *)object;
3768
3769         scic_sds_controller_reset_hardware(this_controller);
3770
3771         sci_base_state_machine_change_state(
3772                 scic_sds_controller_get_base_state_machine(this_controller),
3773                 SCI_BASE_CONTROLLER_STATE_RESET
3774                 );
3775 }
3776
3777 /* --------------------------------------------------------------------------- */
3778
3779 const struct sci_base_state scic_sds_controller_state_table[] = {
3780         [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3781                 .enter_state = scic_sds_controller_initial_state_enter,
3782         },
3783         [SCI_BASE_CONTROLLER_STATE_RESET] = {},
3784         [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {},
3785         [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {},
3786         [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3787                 .exit_state  = scic_sds_controller_starting_state_exit,
3788         },
3789         [SCI_BASE_CONTROLLER_STATE_READY] = {
3790                 .enter_state = scic_sds_controller_ready_state_enter,
3791                 .exit_state  = scic_sds_controller_ready_state_exit,
3792         },
3793         [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3794                 .enter_state = scic_sds_controller_resetting_state_enter,
3795         },
3796         [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3797                 .enter_state = scic_sds_controller_stopping_state_enter,
3798                 .exit_state = scic_sds_controller_stopping_state_exit,
3799         },
3800         [SCI_BASE_CONTROLLER_STATE_STOPPED] = {},
3801         [SCI_BASE_CONTROLLER_STATE_FAILED] = {}
3802 };
3803