2 * xHCI host controller driver PCI Bus Glue.
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/slab.h>
28 /* Device for a quirk */
29 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
30 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
32 #define PCI_VENDOR_ID_ETRON 0x1b6f
33 #define PCI_DEVICE_ID_ASROCK_P67 0x7023
35 static const char hcd_name[] = "xhci_hcd";
37 /* called after powerup, by probe or system-pm "wakeup" */
38 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
41 * TODO: Implement finding debug ports later.
42 * TODO: see if there are any quirks that need to be added to handle
43 * new extended capabilities.
46 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
47 if (!pci_set_mwi(pdev))
48 xhci_dbg(xhci, "MWI active\n");
50 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
54 /* called during probe() after chip reset completes */
55 static int xhci_pci_setup(struct usb_hcd *hcd)
57 struct xhci_hcd *xhci;
58 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
62 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
64 if (usb_hcd_is_primary_hcd(hcd)) {
65 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
68 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
70 /* Mark the first roothub as being USB 2.0.
71 * The xHCI driver will register the USB 3.0 roothub.
73 hcd->speed = HCD_USB2;
74 hcd->self.root_hub->speed = USB_SPEED_HIGH;
76 * USB 2.0 roothub under xHCI has an integrated TT,
77 * (rate matching hub) as opposed to having an OHCI/UHCI
78 * companion controller.
82 /* xHCI private pointer was set in xhci_pci_probe for the second
85 xhci = hcd_to_xhci(hcd);
86 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
87 if (HCC_64BIT_ADDR(temp)) {
88 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
89 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
91 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
96 xhci->cap_regs = hcd->regs;
97 xhci->op_regs = hcd->regs +
98 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
99 xhci->run_regs = hcd->regs +
100 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
101 /* Cache read-only capability registers */
102 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
103 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
104 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
105 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
106 xhci->hci_version = HC_VERSION(xhci->hcc_params);
107 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
108 xhci_print_registers(xhci);
110 /* Look for vendor-specific quirks */
111 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
112 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK) {
113 if (pdev->revision == 0x0) {
114 xhci->quirks |= XHCI_RESET_EP_QUIRK;
115 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
116 " endpoint cmd after reset endpoint\n");
118 /* Fresco Logic confirms: all revisions of this chip do not
119 * support MSI, even though some of them claim to in their PCI
122 xhci->quirks |= XHCI_BROKEN_MSI;
123 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
124 "has broken MSI implementation\n",
128 if (pdev->vendor == PCI_VENDOR_ID_NEC)
129 xhci->quirks |= XHCI_NEC_HOST;
131 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
132 xhci->quirks |= XHCI_AMD_0x96_HOST;
135 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
136 xhci->quirks |= XHCI_AMD_PLL_FIX;
137 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
138 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
139 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
140 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
141 xhci->limit_active_eps = 64;
142 xhci->quirks |= XHCI_SW_BW_CHECKING;
144 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
145 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
146 xhci->quirks |= XHCI_RESET_ON_RESUME;
147 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
150 /* Make sure the HC is halted. */
151 retval = xhci_halt(xhci);
155 xhci_dbg(xhci, "Resetting HCD\n");
156 /* Reset the internal HC memory state and registers. */
157 retval = xhci_reset(xhci);
160 xhci_dbg(xhci, "Reset complete\n");
162 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
163 if (HCC_64BIT_ADDR(temp)) {
164 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
165 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
167 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
170 xhci_dbg(xhci, "Calling HCD init\n");
171 /* Initialize HCD and host controller data structures. */
172 retval = xhci_init(hcd);
175 xhci_dbg(xhci, "Called HCD init\n");
177 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
178 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
180 /* Find any debug ports */
181 retval = xhci_pci_reinit(xhci, pdev);
191 * We need to register our own PCI probe function (instead of the USB core's
192 * function) in order to create a second roothub under xHCI.
194 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
197 struct xhci_hcd *xhci;
198 struct hc_driver *driver;
201 driver = (struct hc_driver *)id->driver_data;
202 /* Register the USB 2.0 roothub.
203 * FIXME: USB core must know to register the USB 2.0 roothub first.
204 * This is sort of silly, because we could just set the HCD driver flags
205 * to say USB 2.0, but I'm not sure what the implications would be in
206 * the other parts of the HCD code.
208 retval = usb_hcd_pci_probe(dev, id);
213 /* USB 2.0 roothub is stored in the PCI device now. */
214 hcd = dev_get_drvdata(&dev->dev);
215 xhci = hcd_to_xhci(hcd);
216 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
218 if (!xhci->shared_hcd) {
220 goto dealloc_usb2_hcd;
223 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
224 * is called by usb_add_hcd().
226 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
228 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
232 /* Roothub already marked as USB 3.0 speed */
236 usb_put_hcd(xhci->shared_hcd);
238 usb_hcd_pci_remove(dev);
242 static void xhci_pci_remove(struct pci_dev *dev)
244 struct xhci_hcd *xhci;
246 xhci = hcd_to_xhci(pci_get_drvdata(dev));
247 if (xhci->shared_hcd) {
248 usb_remove_hcd(xhci->shared_hcd);
249 usb_put_hcd(xhci->shared_hcd);
251 usb_hcd_pci_remove(dev);
256 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
258 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
261 if (hcd->state != HC_STATE_SUSPENDED ||
262 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
265 retval = xhci_suspend(xhci);
270 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
272 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
273 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
276 /* The BIOS on systems with the Intel Panther Point chipset may or may
277 * not support xHCI natively. That means that during system resume, it
278 * may switch the ports back to EHCI so that users can use their
279 * keyboard to select a kernel from GRUB after resume from hibernate.
281 * The BIOS is supposed to remember whether the OS had xHCI ports
282 * enabled before resume, and switch the ports back to xHCI when the
283 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
286 * Unconditionally switch the ports back to xHCI after a system resume.
287 * We can't tell whether the EHCI or xHCI controller will be resumed
288 * first, so we have to do the port switchover in both drivers. Writing
289 * a '1' to the port switchover registers should have no effect if the
290 * port was already switched over.
292 if (usb_is_intel_switchable_xhci(pdev))
293 usb_enable_xhci_ports(pdev);
295 retval = xhci_resume(xhci, hibernated);
298 #endif /* CONFIG_PM */
300 static const struct hc_driver xhci_pci_hc_driver = {
301 .description = hcd_name,
302 .product_desc = "xHCI Host Controller",
303 .hcd_priv_size = sizeof(struct xhci_hcd *),
306 * generic hardware linkage
309 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
312 * basic lifecycle operations
314 .reset = xhci_pci_setup,
317 .pci_suspend = xhci_pci_suspend,
318 .pci_resume = xhci_pci_resume,
321 .shutdown = xhci_shutdown,
324 * managing i/o requests and associated device resources
326 .urb_enqueue = xhci_urb_enqueue,
327 .urb_dequeue = xhci_urb_dequeue,
328 .alloc_dev = xhci_alloc_dev,
329 .free_dev = xhci_free_dev,
330 .alloc_streams = xhci_alloc_streams,
331 .free_streams = xhci_free_streams,
332 .add_endpoint = xhci_add_endpoint,
333 .drop_endpoint = xhci_drop_endpoint,
334 .endpoint_reset = xhci_endpoint_reset,
335 .check_bandwidth = xhci_check_bandwidth,
336 .reset_bandwidth = xhci_reset_bandwidth,
337 .address_device = xhci_address_device,
338 .update_hub_device = xhci_update_hub_device,
339 .reset_device = xhci_discover_or_reset_device,
344 .get_frame_number = xhci_get_frame,
346 /* Root hub support */
347 .hub_control = xhci_hub_control,
348 .hub_status_data = xhci_hub_status_data,
349 .bus_suspend = xhci_bus_suspend,
350 .bus_resume = xhci_bus_resume,
352 * call back when device connected and addressed
354 .update_device = xhci_update_device,
355 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
358 /*-------------------------------------------------------------------------*/
360 /* PCI driver selection metadata; PCI hotplugging uses this */
361 static const struct pci_device_id pci_ids[] = { {
362 /* handle any USB 3.0 xHCI controller */
363 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
364 .driver_data = (unsigned long) &xhci_pci_hc_driver,
366 { /* end: all zeroes */ }
368 MODULE_DEVICE_TABLE(pci, pci_ids);
370 /* pci driver glue; this is a "new style" PCI driver module */
371 static struct pci_driver xhci_pci_driver = {
372 .name = (char *) hcd_name,
375 .probe = xhci_pci_probe,
376 .remove = xhci_pci_remove,
377 /* suspend and resume implemented later */
379 .shutdown = usb_hcd_pci_shutdown,
380 #ifdef CONFIG_PM_SLEEP
382 .pm = &usb_hcd_pci_pm_ops
387 int xhci_register_pci(void)
389 return pci_register_driver(&xhci_pci_driver);
392 void xhci_unregister_pci(void)
394 pci_unregister_driver(&xhci_pci_driver);