drivers/mmc/host/atmel-mci.c

   1 /*
   2  * Atmel MultiMedia Card Interface driver
   3  *
   4  * Copyright (C) 2004-2008 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/blkdev.h>
  11 #include <linux/clk.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/device.h>
  14 #include <linux/dmaengine.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/err.h>
  17 #include <linux/gpio.h>
  18 #include <linux/init.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/ioport.h>
  21 #include <linux/module.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/scatterlist.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/slab.h>
  26 #include <linux/stat.h>
  27
  28 #include <linux/mmc/host.h>
  29 #include <linux/mmc/sdio.h>
  30
  31 #include <mach/atmel-mci.h>
  32 #include <linux/atmel-mci.h>
  33 #include <linux/atmel_pdc.h>
  34
  35 #include <asm/io.h>
  36 #include <asm/unaligned.h>
  37
  38 #include <mach/cpu.h>
  39 #include <mach/board.h>
  40
  41 #include "atmel-mci-regs.h"
  42
  43 #define ATMCI_DATA_ERROR_FLAGS  (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE)
  44 #define ATMCI_DMA_THRESHOLD     16
  45
  46 enum {
  47         EVENT_CMD_COMPLETE = 0,
  48         EVENT_XFER_COMPLETE,
  49         EVENT_DATA_COMPLETE,
  50         EVENT_DATA_ERROR,
  51 };
  52
  53 enum atmel_mci_state {
  54         STATE_IDLE = 0,
  55         STATE_SENDING_CMD,
  56         STATE_SENDING_DATA,
  57         STATE_DATA_BUSY,
  58         STATE_SENDING_STOP,
  59         STATE_DATA_ERROR,
  60 };
  61
  62 enum atmci_xfer_dir {
  63         XFER_RECEIVE = 0,
  64         XFER_TRANSMIT,
  65 };
  66
  67 enum atmci_pdc_buf {
  68         PDC_FIRST_BUF = 0,
  69         PDC_SECOND_BUF,
  70 };
  71
  72 struct atmel_mci_caps {
  73         bool    has_dma;
  74         bool    has_pdc;
  75         bool    has_cfg_reg;
  76         bool    has_cstor_reg;
  77         bool    has_highspeed;
  78         bool    has_rwproof;
  79 };
  80
  81 struct atmel_mci_dma {
  82         struct dma_chan                 *chan;
  83         struct dma_async_tx_descriptor  *data_desc;
  84 };
  85
  86 /**
  87  * struct atmel_mci - MMC controller state shared between all slots
  88  * @lock: Spinlock protecting the queue and associated data.
  89  * @regs: Pointer to MMIO registers.
  90  * @sg: Scatterlist entry currently being processed by PIO or PDC code.
  91  * @pio_offset: Offset into the current scatterlist entry.
  92  * @cur_slot: The slot which is currently using the controller.
  93  * @mrq: The request currently being processed on @cur_slot,
  94  *      or NULL if the controller is idle.
  95  * @cmd: The command currently being sent to the card, or NULL.
  96  * @data: The data currently being transferred, or NULL if no data
  97  *      transfer is in progress.
  98  * @data_size: just data->blocks * data->blksz.
  99  * @dma: DMA client state.
 100  * @data_chan: DMA channel being used for the current data transfer.
 101  * @cmd_status: Snapshot of SR taken upon completion of the current
 102  *      command. Only valid when EVENT_CMD_COMPLETE is pending.
 103  * @data_status: Snapshot of SR taken upon completion of the current
 104  *      data transfer. Only valid when EVENT_DATA_COMPLETE or
 105  *      EVENT_DATA_ERROR is pending.
 106  * @stop_cmdr: Value to be loaded into CMDR when the stop command is
 107  *      to be sent.
 108  * @tasklet: Tasklet running the request state machine.
 109  * @pending_events: Bitmask of events flagged by the interrupt handler
 110  *      to be processed by the tasklet.
 111  * @completed_events: Bitmask of events which the state machine has
 112  *      processed.
 113  * @state: Tasklet state.
 114  * @queue: List of slots waiting for access to the controller.
 115  * @need_clock_update: Update the clock rate before the next request.
 116  * @need_reset: Reset controller before next request.
 117  * @mode_reg: Value of the MR register.
 118  * @cfg_reg: Value of the CFG register.
 119  * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
 120  *      rate and timeout calculations.
 121  * @mapbase: Physical address of the MMIO registers.
 122  * @mck: The peripheral bus clock hooked up to the MMC controller.
 123  * @pdev: Platform device associated with the MMC controller.
 124  * @slot: Slots sharing this MMC controller.
 125  * @caps: MCI capabilities depending on MCI version.
 126  * @prepare_data: function to setup MCI before data transfer which
 127  * depends on MCI capabilities.
 128  * @submit_data: function to start data transfer which depends on MCI
 129  * capabilities.
 130  * @stop_transfer: function to stop data transfer which depends on MCI
 131  * capabilities.
 132  *
 133  * Locking
 134  * =======
 135  *
 136  * @lock is a softirq-safe spinlock protecting @queue as well as
 137  * @cur_slot, @mrq and @state. These must always be updated
 138  * at the same time while holding @lock.
 139  *
 140  * @lock also protects mode_reg and need_clock_update since these are
 141  * used to synchronize mode register updates with the queue
 142  * processing.
 143  *
 144  * The @mrq field of struct atmel_mci_slot is also protected by @lock,
 145  * and must always be written at the same time as the slot is added to
 146  * @queue.
 147  *
 148  * @pending_events and @completed_events are accessed using atomic bit
 149  * operations, so they don't need any locking.
 150  *
 151  * None of the fields touched by the interrupt handler need any
 152  * locking. However, ordering is important: Before EVENT_DATA_ERROR or
 153  * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
 154  * interrupts must be disabled and @data_status updated with a
 155  * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
 156  * CMDRDY interrupt must be disabled and @cmd_status updated with a
 157  * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
 158  * bytes_xfered field of @data must be written. This is ensured by
 159  * using barriers.
 160  */
 161 struct atmel_mci {
 162         spinlock_t              lock;
 163         void __iomem            *regs;
 164
 165         struct scatterlist      *sg;
 166         unsigned int            pio_offset;
 167
 168         struct atmel_mci_slot   *cur_slot;
 169         struct mmc_request      *mrq;
 170         struct mmc_command      *cmd;
 171         struct mmc_data         *data;
 172         unsigned int            data_size;
 173
 174         struct atmel_mci_dma    dma;
 175         struct dma_chan         *data_chan;
 176
 177         u32                     cmd_status;
 178         u32                     data_status;
 179         u32                     stop_cmdr;
 180
 181         struct tasklet_struct   tasklet;
 182         unsigned long           pending_events;
 183         unsigned long           completed_events;
 184         enum atmel_mci_state    state;
 185         struct list_head        queue;
 186
 187         bool                    need_clock_update;
 188         bool                    need_reset;
 189         u32                     mode_reg;
 190         u32                     cfg_reg;
 191         unsigned long           bus_hz;
 192         unsigned long           mapbase;
 193         struct clk              *mck;
 194         struct platform_device  *pdev;
 195
 196         struct atmel_mci_slot   *slot[ATMCI_MAX_NR_SLOTS];
 197
 198         struct atmel_mci_caps   caps;
 199
 200         u32 (*prepare_data)(struct atmel_mci *host, struct mmc_data *data);
 201         void (*submit_data)(struct atmel_mci *host, struct mmc_data *data);
 202         void (*stop_transfer)(struct atmel_mci *host);
 203 };
 204
 205 /**
 206  * struct atmel_mci_slot - MMC slot state
 207  * @mmc: The mmc_host representing this slot.
 208  * @host: The MMC controller this slot is using.
 209  * @sdc_reg: Value of SDCR to be written before using this slot.
 210  * @sdio_irq: SDIO irq mask for this slot.
 211  * @mrq: mmc_request currently being processed or waiting to be
 212  *      processed, or NULL when the slot is idle.
 213  * @queue_node: List node for placing this node in the @queue list of
 214  *      &struct atmel_mci.
 215  * @clock: Clock rate configured by set_ios(). Protected by host->lock.
 216  * @flags: Random state bits associated with the slot.
 217  * @detect_pin: GPIO pin used for card detection, or negative if not
 218  *      available.
 219  * @wp_pin: GPIO pin used for card write protect sending, or negative
 220  *      if not available.
 221  * @detect_is_active_high: The state of the detect pin when it is active.
 222  * @detect_timer: Timer used for debouncing @detect_pin interrupts.
 223  */
 224 struct atmel_mci_slot {
 225         struct mmc_host         *mmc;
 226         struct atmel_mci        *host;
 227
 228         u32                     sdc_reg;
 229         u32                     sdio_irq;
 230
 231         struct mmc_request      *mrq;
 232         struct list_head        queue_node;
 233
 234         unsigned int            clock;
 235         unsigned long           flags;
 236 #define ATMCI_CARD_PRESENT      0
 237 #define ATMCI_CARD_NEED_INIT    1
 238 #define ATMCI_SHUTDOWN          2
 239 #define ATMCI_SUSPENDED         3
 240
 241         int                     detect_pin;
 242         int                     wp_pin;
 243         bool                    detect_is_active_high;
 244
 245         struct timer_list       detect_timer;
 246 };
 247
 248 #define atmci_test_and_clear_pending(host, event)               \
 249         test_and_clear_bit(event, &host->pending_events)
 250 #define atmci_set_completed(host, event)                        \
 251         set_bit(event, &host->completed_events)
 252 #define atmci_set_pending(host, event)                          \
 253         set_bit(event, &host->pending_events)
 254
 255 /*
 256  * The debugfs stuff below is mostly optimized away when
 257  * CONFIG_DEBUG_FS is not set.
 258  */
 259 static int atmci_req_show(struct seq_file *s, void *v)
 260 {
 261         struct atmel_mci_slot   *slot = s->private;
 262         struct mmc_request      *mrq;
 263         struct mmc_command      *cmd;
 264         struct mmc_command      *stop;
 265         struct mmc_data         *data;
 266
 267         /* Make sure we get a consistent snapshot */
 268         spin_lock_bh(&slot->host->lock);
 269         mrq = slot->mrq;
 270
 271         if (mrq) {
 272                 cmd = mrq->cmd;
 273                 data = mrq->data;
 274                 stop = mrq->stop;
 275
 276                 if (cmd)
 277                         seq_printf(s,
 278                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 279                                 cmd->opcode, cmd->arg, cmd->flags,
 280                                 cmd->resp[0], cmd->resp[1], cmd->resp[2],
 281                                 cmd->resp[3], cmd->error);
 282                 if (data)
 283                         seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
 284                                 data->bytes_xfered, data->blocks,
 285                                 data->blksz, data->flags, data->error);
 286                 if (stop)
 287                         seq_printf(s,
 288                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 289                                 stop->opcode, stop->arg, stop->flags,
 290                                 stop->resp[0], stop->resp[1], stop->resp[2],
 291                                 stop->resp[3], stop->error);
 292         }
 293
 294         spin_unlock_bh(&slot->host->lock);
 295
 296         return 0;
 297 }
 298
 299 static int atmci_req_open(struct inode *inode, struct file *file)
 300 {
 301         return single_open(file, atmci_req_show, inode->i_private);
 302 }
 303
 304 static const struct file_operations atmci_req_fops = {
 305         .owner          = THIS_MODULE,
 306         .open           = atmci_req_open,
 307         .read           = seq_read,
 308         .llseek         = seq_lseek,
 309         .release        = single_release,
 310 };
 311
 312 static void atmci_show_status_reg(struct seq_file *s,
 313                 const char *regname, u32 value)
 314 {
 315         static const char       *sr_bit[] = {
 316                 [0]     = "CMDRDY",
 317                 [1]     = "RXRDY",
 318                 [2]     = "TXRDY",
 319                 [3]     = "BLKE",
 320                 [4]     = "DTIP",
 321                 [5]     = "NOTBUSY",
 322                 [6]     = "ENDRX",
 323                 [7]     = "ENDTX",
 324                 [8]     = "SDIOIRQA",
 325                 [9]     = "SDIOIRQB",
 326                 [12]    = "SDIOWAIT",
 327                 [14]    = "RXBUFF",
 328                 [15]    = "TXBUFE",
 329                 [16]    = "RINDE",
 330                 [17]    = "RDIRE",
 331                 [18]    = "RCRCE",
 332                 [19]    = "RENDE",
 333                 [20]    = "RTOE",
 334                 [21]    = "DCRCE",
 335                 [22]    = "DTOE",
 336                 [23]    = "CSTOE",
 337                 [24]    = "BLKOVRE",
 338                 [25]    = "DMADONE",
 339                 [26]    = "FIFOEMPTY",
 340                 [27]    = "XFRDONE",
 341                 [30]    = "OVRE",
 342                 [31]    = "UNRE",
 343         };
 344         unsigned int            i;
 345
 346         seq_printf(s, "%s:\t0x%08x", regname, value);
 347         for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
 348                 if (value & (1 << i)) {
 349                         if (sr_bit[i])
 350                                 seq_printf(s, " %s", sr_bit[i]);
 351                         else
 352                                 seq_puts(s, " UNKNOWN");
 353                 }
 354         }
 355         seq_putc(s, '\n');
 356 }
 357
 358 static int atmci_regs_show(struct seq_file *s, void *v)
 359 {
 360         struct atmel_mci        *host = s->private;
 361         u32                     *buf;
 362
 363         buf = kmalloc(ATMCI_REGS_SIZE, GFP_KERNEL);
 364         if (!buf)
 365                 return -ENOMEM;
 366
 367         /*
 368          * Grab a more or less consistent snapshot. Note that we're
 369          * not disabling interrupts, so IMR and SR may not be
 370          * consistent.
 371          */
 372         spin_lock_bh(&host->lock);
 373         clk_enable(host->mck);
 374         memcpy_fromio(buf, host->regs, ATMCI_REGS_SIZE);
 375         clk_disable(host->mck);
 376         spin_unlock_bh(&host->lock);
 377
 378         seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
 379                         buf[ATMCI_MR / 4],
 380                         buf[ATMCI_MR / 4] & ATMCI_MR_RDPROOF ? " RDPROOF" : "",
 381                         buf[ATMCI_MR / 4] & ATMCI_MR_WRPROOF ? " WRPROOF" : "",
 382                         buf[ATMCI_MR / 4] & 0xff);
 383         seq_printf(s, "DTOR:\t0x%08x\n", buf[ATMCI_DTOR / 4]);
 384         seq_printf(s, "SDCR:\t0x%08x\n", buf[ATMCI_SDCR / 4]);
 385         seq_printf(s, "ARGR:\t0x%08x\n", buf[ATMCI_ARGR / 4]);
 386         seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
 387                         buf[ATMCI_BLKR / 4],
 388                         buf[ATMCI_BLKR / 4] & 0xffff,
 389                         (buf[ATMCI_BLKR / 4] >> 16) & 0xffff);
 390         if (host->caps.has_cstor_reg)
 391                 seq_printf(s, "CSTOR:\t0x%08x\n", buf[ATMCI_CSTOR / 4]);
 392
 393         /* Don't read RSPR and RDR; it will consume the data there */
 394
 395         atmci_show_status_reg(s, "SR", buf[ATMCI_SR / 4]);
 396         atmci_show_status_reg(s, "IMR", buf[ATMCI_IMR / 4]);
 397
 398         if (host->caps.has_dma) {
 399                 u32 val;
 400
 401                 val = buf[ATMCI_DMA / 4];
 402                 seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n",
 403                                 val, val & 3,
 404                                 ((val >> 4) & 3) ?
 405                                         1 << (((val >> 4) & 3) + 1) : 1,
 406                                 val & ATMCI_DMAEN ? " DMAEN" : "");
 407         }
 408         if (host->caps.has_cfg_reg) {
 409                 u32 val;
 410
 411                 val = buf[ATMCI_CFG / 4];
 412                 seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n",
 413                                 val,
 414                                 val & ATMCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "",
 415                                 val & ATMCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "",
 416                                 val & ATMCI_CFG_HSMODE ? " HSMODE" : "",
 417                                 val & ATMCI_CFG_LSYNC ? " LSYNC" : "");
 418         }
 419
 420         kfree(buf);
 421
 422         return 0;
 423 }
 424
 425 static int atmci_regs_open(struct inode *inode, struct file *file)
 426 {
 427         return single_open(file, atmci_regs_show, inode->i_private);
 428 }
 429
 430 static const struct file_operations atmci_regs_fops = {
 431         .owner          = THIS_MODULE,
 432         .open           = atmci_regs_open,
 433         .read           = seq_read,
 434         .llseek         = seq_lseek,
 435         .release        = single_release,
 436 };
 437
 438 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
 439 {
 440         struct mmc_host         *mmc = slot->mmc;
 441         struct atmel_mci        *host = slot->host;
 442         struct dentry           *root;
 443         struct dentry           *node;
 444
 445         root = mmc->debugfs_root;
 446         if (!root)
 447                 return;
 448
 449         node = debugfs_create_file("regs", S_IRUSR, root, host,
 450                         &atmci_regs_fops);
 451         if (IS_ERR(node))
 452                 return;
 453         if (!node)
 454                 goto err;
 455
 456         node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
 457         if (!node)
 458                 goto err;
 459
 460         node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
 461         if (!node)
 462                 goto err;
 463
 464         node = debugfs_create_x32("pending_events", S_IRUSR, root,
 465                                      (u32 *)&host->pending_events);
 466         if (!node)
 467                 goto err;
 468
 469         node = debugfs_create_x32("completed_events", S_IRUSR, root,
 470                                      (u32 *)&host->completed_events);
 471         if (!node)
 472                 goto err;
 473
 474         return;
 475
 476 err:
 477         dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
 478 }
 479
 480 static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host,
 481                                         unsigned int ns)
 482 {
 483         /*
 484          * It is easier here to use us instead of ns for the timeout,
 485          * it prevents from overflows during calculation.
 486          */
 487         unsigned int us = DIV_ROUND_UP(ns, 1000);
 488
 489         /* Maximum clock frequency is host->bus_hz/2 */
 490         return us * (DIV_ROUND_UP(host->bus_hz, 2000000));
 491 }
 492
 493 static void atmci_set_timeout(struct atmel_mci *host,
 494                 struct atmel_mci_slot *slot, struct mmc_data *data)
 495 {
 496         static unsigned dtomul_to_shift[] = {
 497                 0, 4, 7, 8, 10, 12, 16, 20
 498         };
 499         unsigned        timeout;
 500         unsigned        dtocyc;
 501         unsigned        dtomul;
 502
 503         timeout = atmci_ns_to_clocks(host, data->timeout_ns)
 504                 + data->timeout_clks;
 505
 506         for (dtomul = 0; dtomul < 8; dtomul++) {
 507                 unsigned shift = dtomul_to_shift[dtomul];
 508                 dtocyc = (timeout + (1 << shift) - 1) >> shift;
 509                 if (dtocyc < 15)
 510                         break;
 511         }
 512
 513         if (dtomul >= 8) {
 514                 dtomul = 7;
 515                 dtocyc = 15;
 516         }
 517
 518         dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
 519                         dtocyc << dtomul_to_shift[dtomul]);
 520         atmci_writel(host, ATMCI_DTOR, (ATMCI_DTOMUL(dtomul) | ATMCI_DTOCYC(dtocyc)));
 521 }
 522
 523 /*
 524  * Return mask with command flags to be enabled for this command.
 525  */
 526 static u32 atmci_prepare_command(struct mmc_host *mmc,
 527                                  struct mmc_command *cmd)
 528 {
 529         struct mmc_data *data;
 530         u32             cmdr;
 531
 532         cmd->error = -EINPROGRESS;
 533
 534         cmdr = ATMCI_CMDR_CMDNB(cmd->opcode);
 535
 536         if (cmd->flags & MMC_RSP_PRESENT) {
 537                 if (cmd->flags & MMC_RSP_136)
 538                         cmdr |= ATMCI_CMDR_RSPTYP_136BIT;
 539                 else
 540                         cmdr |= ATMCI_CMDR_RSPTYP_48BIT;
 541         }
 542
 543         /*
 544          * This should really be MAXLAT_5 for CMD2 and ACMD41, but
 545          * it's too difficult to determine whether this is an ACMD or
 546          * not. Better make it 64.
 547          */
 548         cmdr |= ATMCI_CMDR_MAXLAT_64CYC;
 549
 550         if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
 551                 cmdr |= ATMCI_CMDR_OPDCMD;
 552
 553         data = cmd->data;
 554         if (data) {
 555                 cmdr |= ATMCI_CMDR_START_XFER;
 556
 557                 if (cmd->opcode == SD_IO_RW_EXTENDED) {
 558                         cmdr |= ATMCI_CMDR_SDIO_BLOCK;
 559                 } else {
 560                         if (data->flags & MMC_DATA_STREAM)
 561                                 cmdr |= ATMCI_CMDR_STREAM;
 562                         else if (data->blocks > 1)
 563                                 cmdr |= ATMCI_CMDR_MULTI_BLOCK;
 564                         else
 565                                 cmdr |= ATMCI_CMDR_BLOCK;
 566                 }
 567
 568                 if (data->flags & MMC_DATA_READ)
 569                         cmdr |= ATMCI_CMDR_TRDIR_READ;
 570         }
 571
 572         return cmdr;
 573 }
 574
 575 static void atmci_send_command(struct atmel_mci *host,
 576                 struct mmc_command *cmd, u32 cmd_flags)
 577 {
 578         WARN_ON(host->cmd);
 579         host->cmd = cmd;
 580
 581         dev_vdbg(&host->pdev->dev,
 582                         "start command: ARGR=0x%08x CMDR=0x%08x\n",
 583                         cmd->arg, cmd_flags);
 584
 585         atmci_writel(host, ATMCI_ARGR, cmd->arg);
 586         atmci_writel(host, ATMCI_CMDR, cmd_flags);
 587 }
 588
 589 static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
 590 {
 591         atmci_send_command(host, data->stop, host->stop_cmdr);
 592         atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY);
 593 }
 594
 595 /*
 596  * Configure given PDC buffer taking care of alignement issues.
 597  * Update host->data_size and host->sg.
 598  */
 599 static void atmci_pdc_set_single_buf(struct atmel_mci *host,
 600         enum atmci_xfer_dir dir, enum atmci_pdc_buf buf_nb)
 601 {
 602         u32 pointer_reg, counter_reg;
 603
 604         if (dir == XFER_RECEIVE) {
 605                 pointer_reg = ATMEL_PDC_RPR;
 606                 counter_reg = ATMEL_PDC_RCR;
 607         } else {
 608                 pointer_reg = ATMEL_PDC_TPR;
 609                 counter_reg = ATMEL_PDC_TCR;
 610         }
 611
 612         if (buf_nb == PDC_SECOND_BUF) {
 613                 pointer_reg += ATMEL_PDC_SCND_BUF_OFF;
 614                 counter_reg += ATMEL_PDC_SCND_BUF_OFF;
 615         }
 616
 617         atmci_writel(host, pointer_reg, sg_dma_address(host->sg));
 618         if (host->data_size <= sg_dma_len(host->sg)) {
 619                 if (host->data_size & 0x3) {
 620                         /* If size is different from modulo 4, transfer bytes */
 621                         atmci_writel(host, counter_reg, host->data_size);
 622                         atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCFBYTE);
 623                 } else {
 624                         /* Else transfer 32-bits words */
 625                         atmci_writel(host, counter_reg, host->data_size / 4);
 626                 }
 627                 host->data_size = 0;
 628         } else {
 629                 /* We assume the size of a page is 32-bits aligned */
 630                 atmci_writel(host, counter_reg, sg_dma_len(host->sg) / 4);
 631                 host->data_size -= sg_dma_len(host->sg);
 632                 if (host->data_size)
 633                         host->sg = sg_next(host->sg);
 634         }
 635 }
 636
 637 /*
 638  * Configure PDC buffer according to the data size ie configuring one or two
 639  * buffers. Don't use this function if you want to configure only the second
 640  * buffer. In this case, use atmci_pdc_set_single_buf.
 641  */
 642 static void atmci_pdc_set_both_buf(struct atmel_mci *host, int dir)
 643 {
 644         atmci_pdc_set_single_buf(host, dir, PDC_FIRST_BUF);
 645         if (host->data_size)
 646                 atmci_pdc_set_single_buf(host, dir, PDC_SECOND_BUF);
 647 }
 648
 649 /*
 650  * Unmap sg lists, called when transfer is finished.
 651  */
 652 static void atmci_pdc_cleanup(struct atmel_mci *host)
 653 {
 654         struct mmc_data         *data = host->data;
 655
 656         if (data)
 657                 dma_unmap_sg(&host->pdev->dev,
 658                                 data->sg, data->sg_len,
 659                                 ((data->flags & MMC_DATA_WRITE)
 660                                  ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
 661 }
 662
 663 /*
 664  * Disable PDC transfers. Update pending flags to EVENT_XFER_COMPLETE after
 665  * having received ATMCI_TXBUFE or ATMCI_RXBUFF interrupt. Enable ATMCI_NOTBUSY
 666  * interrupt needed for both transfer directions.
 667  */
 668 static void atmci_pdc_complete(struct atmel_mci *host)
 669 {
 670         atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
 671         atmci_pdc_cleanup(host);
 672
 673         /*
 674          * If the card was removed, data will be NULL. No point trying
 675          * to send the stop command or waiting for NBUSY in this case.
 676          */
 677         if (host->data) {
 678                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 679                 tasklet_schedule(&host->tasklet);
 680                 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 681         }
 682 }
 683
 684 static void atmci_dma_cleanup(struct atmel_mci *host)
 685 {
 686         struct mmc_data                 *data = host->data;
 687
 688         if (data)
 689                 dma_unmap_sg(host->dma.chan->device->dev,
 690                                 data->sg, data->sg_len,
 691                                 ((data->flags & MMC_DATA_WRITE)
 692                                  ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
 693 }
 694
 695 /*
 696  * This function is called by the DMA driver from tasklet context.
 697  */
 698 static void atmci_dma_complete(void *arg)
 699 {
 700         struct atmel_mci        *host = arg;
 701         struct mmc_data         *data = host->data;
 702
 703         dev_vdbg(&host->pdev->dev, "DMA complete\n");
 704
 705         if (host->caps.has_dma)
 706                 /* Disable DMA hardware handshaking on MCI */
 707                 atmci_writel(host, ATMCI_DMA, atmci_readl(host, ATMCI_DMA) & ~ATMCI_DMAEN);
 708
 709         atmci_dma_cleanup(host);
 710
 711         /*
 712          * If the card was removed, data will be NULL. No point trying
 713          * to send the stop command or waiting for NBUSY in this case.
 714          */
 715         if (data) {
 716                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 717                 tasklet_schedule(&host->tasklet);
 718
 719                 /*
 720                  * Regardless of what the documentation says, we have
 721                  * to wait for NOTBUSY even after block read
 722                  * operations.
 723                  *
 724                  * When the DMA transfer is complete, the controller
 725                  * may still be reading the CRC from the card, i.e.
 726                  * the data transfer is still in progress and we
 727                  * haven't seen all the potential error bits yet.
 728                  *
 729                  * The interrupt handler will schedule a different
 730                  * tasklet to finish things up when the data transfer
 731                  * is completely done.
 732                  *
 733                  * We may not complete the mmc request here anyway
 734                  * because the mmc layer may call back and cause us to
 735                  * violate the "don't submit new operations from the
 736                  * completion callback" rule of the dma engine
 737                  * framework.
 738                  */
 739                 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 740         }
 741 }
 742
 743 /*
 744  * Returns a mask of interrupt flags to be enabled after the whole
 745  * request has been prepared.
 746  */
 747 static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data)
 748 {
 749         u32 iflags;
 750
 751         data->error = -EINPROGRESS;
 752
 753         host->sg = data->sg;
 754         host->data = data;
 755         host->data_chan = NULL;
 756
 757         iflags = ATMCI_DATA_ERROR_FLAGS;
 758
 759         /*
 760          * Errata: MMC data write operation with less than 12
 761          * bytes is impossible.
 762          *
 763          * Errata: MCI Transmit Data Register (TDR) FIFO
 764          * corruption when length is not multiple of 4.
 765          */
 766         if (data->blocks * data->blksz < 12
 767                         || (data->blocks * data->blksz) & 3)
 768                 host->need_reset = true;
 769
 770         host->pio_offset = 0;
 771         if (data->flags & MMC_DATA_READ)
 772                 iflags |= ATMCI_RXRDY;
 773         else
 774                 iflags |= ATMCI_TXRDY;
 775
 776         return iflags;
 777 }
 778
 779 /*
 780  * Set interrupt flags and set block length into the MCI mode register even
 781  * if this value is also accessible in the MCI block register. It seems to be
 782  * necessary before the High Speed MCI version. It also map sg and configure
 783  * PDC registers.
 784  */
 785 static u32
 786 atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data)
 787 {
 788         u32 iflags, tmp;
 789         unsigned int sg_len;
 790         enum dma_data_direction dir;
 791
 792         data->error = -EINPROGRESS;
 793
 794         host->data = data;
 795         host->sg = data->sg;
 796         iflags = ATMCI_DATA_ERROR_FLAGS;
 797
 798         /* Enable pdc mode */
 799         atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCMODE);
 800
 801         if (data->flags & MMC_DATA_READ) {
 802                 dir = DMA_FROM_DEVICE;
 803                 iflags |= ATMCI_ENDRX | ATMCI_RXBUFF;
 804         } else {
 805                 dir = DMA_TO_DEVICE;
 806                 iflags |= ATMCI_ENDTX | ATMCI_TXBUFE;
 807         }
 808
 809         /* Set BLKLEN */
 810         tmp = atmci_readl(host, ATMCI_MR);
 811         tmp &= 0x0000ffff;
 812         tmp |= ATMCI_BLKLEN(data->blksz);
 813         atmci_writel(host, ATMCI_MR, tmp);
 814
 815         /* Configure PDC */
 816         host->data_size = data->blocks * data->blksz;
 817         sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir);
 818         if (host->data_size)
 819                 atmci_pdc_set_both_buf(host,
 820                         ((dir == DMA_FROM_DEVICE) ? XFER_RECEIVE : XFER_TRANSMIT));
 821
 822         return iflags;
 823 }
 824
 825 static u32
 826 atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
 827 {
 828         struct dma_chan                 *chan;
 829         struct dma_async_tx_descriptor  *desc;
 830         struct scatterlist              *sg;
 831         unsigned int                    i;
 832         enum dma_data_direction         direction;
 833         unsigned int                    sglen;
 834         u32 iflags;
 835
 836         data->error = -EINPROGRESS;
 837
 838         WARN_ON(host->data);
 839         host->sg = NULL;
 840         host->data = data;
 841
 842         iflags = ATMCI_DATA_ERROR_FLAGS;
 843
 844         /*
 845          * We don't do DMA on "complex" transfers, i.e. with
 846          * non-word-aligned buffers or lengths. Also, we don't bother
 847          * with all the DMA setup overhead for short transfers.
 848          */
 849         if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
 850                 return atmci_prepare_data(host, data);
 851         if (data->blksz & 3)
 852                 return atmci_prepare_data(host, data);
 853
 854         for_each_sg(data->sg, sg, data->sg_len, i) {
 855                 if (sg->offset & 3 || sg->length & 3)
 856                         return atmci_prepare_data(host, data);
 857         }
 858
 859         /* If we don't have a channel, we can't do DMA */
 860         chan = host->dma.chan;
 861         if (chan)
 862                 host->data_chan = chan;
 863
 864         if (!chan)
 865                 return -ENODEV;
 866
 867         if (host->caps.has_dma)
 868                 atmci_writel(host, ATMCI_DMA, ATMCI_DMA_CHKSIZE(3) | ATMCI_DMAEN);
 869
 870         if (data->flags & MMC_DATA_READ)
 871                 direction = DMA_FROM_DEVICE;
 872         else
 873                 direction = DMA_TO_DEVICE;
 874
 875         sglen = dma_map_sg(chan->device->dev, data->sg,
 876                         data->sg_len, direction);
 877
 878         desc = chan->device->device_prep_slave_sg(chan,
 879                         data->sg, sglen, direction,
 880                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 881         if (!desc)
 882                 goto unmap_exit;
 883
 884         host->dma.data_desc = desc;
 885         desc->callback = atmci_dma_complete;
 886         desc->callback_param = host;
 887
 888         return iflags;
 889 unmap_exit:
 890         dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction);
 891         return -ENOMEM;
 892 }
 893
 894 static void
 895 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
 896 {
 897         return;
 898 }
 899
 900 /*
 901  * Start PDC according to transfer direction.
 902  */
 903 static void
 904 atmci_submit_data_pdc(struct atmel_mci *host, struct mmc_data *data)
 905 {
 906         if (data->flags & MMC_DATA_READ)
 907                 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
 908         else
 909                 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
 910 }
 911
 912 static void
 913 atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
 914 {
 915         struct dma_chan                 *chan = host->data_chan;
 916         struct dma_async_tx_descriptor  *desc = host->dma.data_desc;
 917
 918         if (chan) {
 919                 dmaengine_submit(desc);
 920                 dma_async_issue_pending(chan);
 921         }
 922 }
 923
 924 static void atmci_stop_transfer(struct atmel_mci *host)
 925 {
 926         atmci_set_pending(host, EVENT_XFER_COMPLETE);
 927         atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 928 }
 929
 930 /*
 931  * Stop data transfer because error(s) occured.
 932  */
 933 static void atmci_stop_transfer_pdc(struct atmel_mci *host)
 934 {
 935         atmci_set_pending(host, EVENT_XFER_COMPLETE);
 936         atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 937 }
 938
 939 static void atmci_stop_transfer_dma(struct atmel_mci *host)
 940 {
 941         struct dma_chan *chan = host->data_chan;
 942
 943         if (chan) {
 944                 dmaengine_terminate_all(chan);
 945                 atmci_dma_cleanup(host);
 946         } else {
 947                 /* Data transfer was stopped by the interrupt handler */
 948                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 949                 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 950         }
 951 }
 952
 953 /*
 954  * Start a request: prepare data if needed, prepare the command and activate
 955  * interrupts.
 956  */
 957 static void atmci_start_request(struct atmel_mci *host,
 958                 struct atmel_mci_slot *slot)
 959 {
 960         struct mmc_request      *mrq;
 961         struct mmc_command      *cmd;
 962         struct mmc_data         *data;
 963         u32                     iflags;
 964         u32                     cmdflags;
 965
 966         mrq = slot->mrq;
 967         host->cur_slot = slot;
 968         host->mrq = mrq;
 969
 970         host->pending_events = 0;
 971         host->completed_events = 0;
 972         host->data_status = 0;
 973
 974         if (host->need_reset) {
 975                 iflags = atmci_readl(host, ATMCI_IMR);
 976                 iflags &= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB);
 977                 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
 978                 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
 979                 atmci_writel(host, ATMCI_MR, host->mode_reg);
 980                 if (host->caps.has_cfg_reg)
 981                         atmci_writel(host, ATMCI_CFG, host->cfg_reg);
 982                 atmci_writel(host, ATMCI_IER, iflags);
 983                 host->need_reset = false;
 984         }
 985         atmci_writel(host, ATMCI_SDCR, slot->sdc_reg);
 986
 987         iflags = atmci_readl(host, ATMCI_IMR);
 988         if (iflags & ~(ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
 989                 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
 990                                 iflags);
 991
 992         if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
 993                 /* Send init sequence (74 clock cycles) */
 994                 atmci_writel(host, ATMCI_CMDR, ATMCI_CMDR_SPCMD_INIT);
 995                 while (!(atmci_readl(host, ATMCI_SR) & ATMCI_CMDRDY))
 996                         cpu_relax();
 997         }
 998         iflags = 0;
 999         data = mrq->data;
1000         if (data) {
1001                 atmci_set_timeout(host, slot, data);
1002
1003                 /* Must set block count/size before sending command */
1004                 atmci_writel(host, ATMCI_BLKR, ATMCI_BCNT(data->blocks)
1005                                 | ATMCI_BLKLEN(data->blksz));
1006                 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
1007                         ATMCI_BCNT(data->blocks) | ATMCI_BLKLEN(data->blksz));
1008
1009                 iflags |= host->prepare_data(host, data);
1010         }
1011
1012         iflags |= ATMCI_CMDRDY;
1013         cmd = mrq->cmd;
1014         cmdflags = atmci_prepare_command(slot->mmc, cmd);
1015         atmci_send_command(host, cmd, cmdflags);
1016
1017         if (data)
1018                 host->submit_data(host, data);
1019
1020         if (mrq->stop) {
1021                 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
1022                 host->stop_cmdr |= ATMCI_CMDR_STOP_XFER;
1023                 if (!(data->flags & MMC_DATA_WRITE))
1024                         host->stop_cmdr |= ATMCI_CMDR_TRDIR_READ;
1025                 if (data->flags & MMC_DATA_STREAM)
1026                         host->stop_cmdr |= ATMCI_CMDR_STREAM;
1027                 else
1028                         host->stop_cmdr |= ATMCI_CMDR_MULTI_BLOCK;
1029         }
1030
1031         /*
1032          * We could have enabled interrupts earlier, but I suspect
1033          * that would open up a nice can of interesting race
1034          * conditions (e.g. command and data complete, but stop not
1035          * prepared yet.)
1036          */
1037         atmci_writel(host, ATMCI_IER, iflags);
1038 }
1039
1040 static void atmci_queue_request(struct atmel_mci *host,
1041                 struct atmel_mci_slot *slot, struct mmc_request *mrq)
1042 {
1043         dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
1044                         host->state);
1045
1046         spin_lock_bh(&host->lock);
1047         slot->mrq = mrq;
1048         if (host->state == STATE_IDLE) {
1049                 host->state = STATE_SENDING_CMD;
1050                 atmci_start_request(host, slot);
1051         } else {
1052                 list_add_tail(&slot->queue_node, &host->queue);
1053         }
1054         spin_unlock_bh(&host->lock);
1055 }
1056
1057 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1058 {
1059         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1060         struct atmel_mci        *host = slot->host;
1061         struct mmc_data         *data;
1062
1063         WARN_ON(slot->mrq);
1064
1065         /*
1066          * We may "know" the card is gone even though there's still an
1067          * electrical connection. If so, we really need to communicate
1068          * this to the MMC core since there won't be any more
1069          * interrupts as the card is completely removed. Otherwise,
1070          * the MMC core might believe the card is still there even
1071          * though the card was just removed very slowly.
1072          */
1073         if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
1074                 mrq->cmd->error = -ENOMEDIUM;
1075                 mmc_request_done(mmc, mrq);
1076                 return;
1077         }
1078
1079         /* We don't support multiple blocks of weird lengths. */
1080         data = mrq->data;
1081         if (data && data->blocks > 1 && data->blksz & 3) {
1082                 mrq->cmd->error = -EINVAL;
1083                 mmc_request_done(mmc, mrq);
1084         }
1085
1086         atmci_queue_request(host, slot, mrq);
1087 }
1088
1089 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1090 {
1091         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1092         struct atmel_mci        *host = slot->host;
1093         unsigned int            i;
1094
1095         slot->sdc_reg &= ~ATMCI_SDCBUS_MASK;
1096         switch (ios->bus_width) {
1097         case MMC_BUS_WIDTH_1:
1098                 slot->sdc_reg |= ATMCI_SDCBUS_1BIT;
1099                 break;
1100         case MMC_BUS_WIDTH_4:
1101                 slot->sdc_reg |= ATMCI_SDCBUS_4BIT;
1102                 break;
1103         }
1104
1105         if (ios->clock) {
1106                 unsigned int clock_min = ~0U;
1107                 u32 clkdiv;
1108
1109                 spin_lock_bh(&host->lock);
1110                 if (!host->mode_reg) {
1111                         clk_enable(host->mck);
1112                         atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1113                         atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
1114                         if (host->caps.has_cfg_reg)
1115                                 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1116                 }
1117
1118                 /*
1119                  * Use mirror of ios->clock to prevent race with mmc
1120                  * core ios update when finding the minimum.
1121                  */
1122                 slot->clock = ios->clock;
1123                 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1124                         if (host->slot[i] && host->slot[i]->clock
1125                                         && host->slot[i]->clock < clock_min)
1126                                 clock_min = host->slot[i]->clock;
1127                 }
1128
1129                 /* Calculate clock divider */
1130                 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
1131                 if (clkdiv > 255) {
1132                         dev_warn(&mmc->class_dev,
1133                                 "clock %u too slow; using %lu\n",
1134                                 clock_min, host->bus_hz / (2 * 256));
1135                         clkdiv = 255;
1136                 }
1137
1138                 host->mode_reg = ATMCI_MR_CLKDIV(clkdiv);
1139
1140                 /*
1141                  * WRPROOF and RDPROOF prevent overruns/underruns by
1142                  * stopping the clock when the FIFO is full/empty.
1143                  * This state is not expected to last for long.
1144                  */
1145                 if (host->caps.has_rwproof)
1146                         host->mode_reg |= (ATMCI_MR_WRPROOF | ATMCI_MR_RDPROOF);
1147
1148                 if (host->caps.has_cfg_reg) {
1149                         /* setup High Speed mode in relation with card capacity */
1150                         if (ios->timing == MMC_TIMING_SD_HS)
1151                                 host->cfg_reg |= ATMCI_CFG_HSMODE;
1152                         else
1153                                 host->cfg_reg &= ~ATMCI_CFG_HSMODE;
1154                 }
1155
1156                 if (list_empty(&host->queue)) {
1157                         atmci_writel(host, ATMCI_MR, host->mode_reg);
1158                         if (host->caps.has_cfg_reg)
1159                                 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1160                 } else {
1161                         host->need_clock_update = true;
1162                 }
1163
1164                 spin_unlock_bh(&host->lock);
1165         } else {
1166                 bool any_slot_active = false;
1167
1168                 spin_lock_bh(&host->lock);
1169                 slot->clock = 0;
1170                 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1171                         if (host->slot[i] && host->slot[i]->clock) {
1172                                 any_slot_active = true;
1173                                 break;
1174                         }
1175                 }
1176                 if (!any_slot_active) {
1177                         atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
1178                         if (host->mode_reg) {
1179                                 atmci_readl(host, ATMCI_MR);
1180                                 clk_disable(host->mck);
1181                         }
1182                         host->mode_reg = 0;
1183                 }
1184                 spin_unlock_bh(&host->lock);
1185         }
1186
1187         switch (ios->power_mode) {
1188         case MMC_POWER_UP:
1189                 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
1190                 break;
1191         default:
1192                 /*
1193                  * TODO: None of the currently available AVR32-based
1194                  * boards allow MMC power to be turned off. Implement
1195                  * power control when this can be tested properly.
1196                  *
1197                  * We also need to hook this into the clock management
1198                  * somehow so that newly inserted cards aren't
1199                  * subjected to a fast clock before we have a chance
1200                  * to figure out what the maximum rate is. Currently,
1201                  * there's no way to avoid this, and there never will
1202                  * be for boards that don't support power control.
1203                  */
1204                 break;
1205         }
1206 }
1207
1208 static int atmci_get_ro(struct mmc_host *mmc)
1209 {
1210         int                     read_only = -ENOSYS;
1211         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1212
1213         if (gpio_is_valid(slot->wp_pin)) {
1214                 read_only = gpio_get_value(slot->wp_pin);
1215                 dev_dbg(&mmc->class_dev, "card is %s\n",
1216                                 read_only ? "read-only" : "read-write");
1217         }
1218
1219         return read_only;
1220 }
1221
1222 static int atmci_get_cd(struct mmc_host *mmc)
1223 {
1224         int                     present = -ENOSYS;
1225         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1226
1227         if (gpio_is_valid(slot->detect_pin)) {
1228                 present = !(gpio_get_value(slot->detect_pin) ^
1229                             slot->detect_is_active_high);
1230                 dev_dbg(&mmc->class_dev, "card is %spresent\n",
1231                                 present ? "" : "not ");
1232         }
1233
1234         return present;
1235 }
1236
1237 static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1238 {
1239         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1240         struct atmel_mci        *host = slot->host;
1241
1242         if (enable)
1243                 atmci_writel(host, ATMCI_IER, slot->sdio_irq);
1244         else
1245                 atmci_writel(host, ATMCI_IDR, slot->sdio_irq);
1246 }
1247
1248 static const struct mmc_host_ops atmci_ops = {
1249         .request        = atmci_request,
1250         .set_ios        = atmci_set_ios,
1251         .get_ro         = atmci_get_ro,
1252         .get_cd         = atmci_get_cd,
1253         .enable_sdio_irq = atmci_enable_sdio_irq,
1254 };
1255
1256 /* Called with host->lock held */
1257 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
1258         __releases(&host->lock)
1259         __acquires(&host->lock)
1260 {
1261         struct atmel_mci_slot   *slot = NULL;
1262         struct mmc_host         *prev_mmc = host->cur_slot->mmc;
1263
1264         WARN_ON(host->cmd || host->data);
1265
1266         /*
1267          * Update the MMC clock rate if necessary. This may be
1268          * necessary if set_ios() is called when a different slot is
1269          * busy transferring data.
1270          */
1271         if (host->need_clock_update) {
1272                 atmci_writel(host, ATMCI_MR, host->mode_reg);
1273                 if (host->caps.has_cfg_reg)
1274                         atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1275         }
1276
1277         host->cur_slot->mrq = NULL;
1278         host->mrq = NULL;
1279         if (!list_empty(&host->queue)) {
1280                 slot = list_entry(host->queue.next,
1281                                 struct atmel_mci_slot, queue_node);
1282                 list_del(&slot->queue_node);
1283                 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
1284                                 mmc_hostname(slot->mmc));
1285                 host->state = STATE_SENDING_CMD;
1286                 atmci_start_request(host, slot);
1287         } else {
1288                 dev_vdbg(&host->pdev->dev, "list empty\n");
1289                 host->state = STATE_IDLE;
1290         }
1291
1292         spin_unlock(&host->lock);
1293         mmc_request_done(prev_mmc, mrq);
1294         spin_lock(&host->lock);
1295 }
1296
1297 static void atmci_command_complete(struct atmel_mci *host,
1298                         struct mmc_command *cmd)
1299 {
1300         u32             status = host->cmd_status;
1301
1302         /* Read the response from the card (up to 16 bytes) */
1303         cmd->resp[0] = atmci_readl(host, ATMCI_RSPR);
1304         cmd->resp[1] = atmci_readl(host, ATMCI_RSPR);
1305         cmd->resp[2] = atmci_readl(host, ATMCI_RSPR);
1306         cmd->resp[3] = atmci_readl(host, ATMCI_RSPR);
1307
1308         if (status & ATMCI_RTOE)
1309                 cmd->error = -ETIMEDOUT;
1310         else if ((cmd->flags & MMC_RSP_CRC) && (status & ATMCI_RCRCE))
1311                 cmd->error = -EILSEQ;
1312         else if (status & (ATMCI_RINDE | ATMCI_RDIRE | ATMCI_RENDE))
1313                 cmd->error = -EIO;
1314         else
1315                 cmd->error = 0;
1316
1317         if (cmd->error) {
1318                 dev_dbg(&host->pdev->dev,
1319                         "command error: status=0x%08x\n", status);
1320
1321                 if (cmd->data) {
1322                         host->stop_transfer(host);
1323                         host->data = NULL;
1324                         atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY
1325                                         | ATMCI_TXRDY | ATMCI_RXRDY
1326                                         | ATMCI_DATA_ERROR_FLAGS);
1327                 }
1328         }
1329 }
1330
1331 static void atmci_detect_change(unsigned long data)
1332 {
1333         struct atmel_mci_slot   *slot = (struct atmel_mci_slot *)data;
1334         bool                    present;
1335         bool                    present_old;
1336
1337         /*
1338          * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1339          * freeing the interrupt. We must not re-enable the interrupt
1340          * if it has been freed, and if we're shutting down, it
1341          * doesn't really matter whether the card is present or not.
1342          */
1343         smp_rmb();
1344         if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1345                 return;
1346
1347         enable_irq(gpio_to_irq(slot->detect_pin));
1348         present = !(gpio_get_value(slot->detect_pin) ^
1349                     slot->detect_is_active_high);
1350         present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1351
1352         dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1353                         present, present_old);
1354
1355         if (present != present_old) {
1356                 struct atmel_mci        *host = slot->host;
1357                 struct mmc_request      *mrq;
1358
1359                 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1360                         present ? "inserted" : "removed");
1361
1362                 spin_lock(&host->lock);
1363
1364                 if (!present)
1365                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1366                 else
1367                         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1368
1369                 /* Clean up queue if present */
1370                 mrq = slot->mrq;
1371                 if (mrq) {
1372                         if (mrq == host->mrq) {
1373                                 /*
1374                                  * Reset controller to terminate any ongoing
1375                                  * commands or data transfers.
1376                                  */
1377                                 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1378                                 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
1379                                 atmci_writel(host, ATMCI_MR, host->mode_reg);
1380                                 if (host->caps.has_cfg_reg)
1381                                         atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1382
1383                                 host->data = NULL;
1384                                 host->cmd = NULL;
1385
1386                                 switch (host->state) {
1387                                 case STATE_IDLE:
1388                                         break;
1389                                 case STATE_SENDING_CMD:
1390                                         mrq->cmd->error = -ENOMEDIUM;
1391                                         if (!mrq->data)
1392                                                 break;
1393                                         /* fall through */
1394                                 case STATE_SENDING_DATA:
1395                                         mrq->data->error = -ENOMEDIUM;
1396                                         host->stop_transfer(host);
1397                                         break;
1398                                 case STATE_DATA_BUSY:
1399                                 case STATE_DATA_ERROR:
1400                                         if (mrq->data->error == -EINPROGRESS)
1401                                                 mrq->data->error = -ENOMEDIUM;
1402                                         if (!mrq->stop)
1403                                                 break;
1404                                         /* fall through */
1405                                 case STATE_SENDING_STOP:
1406                                         mrq->stop->error = -ENOMEDIUM;
1407                                         break;
1408                                 }
1409
1410                                 atmci_request_end(host, mrq);
1411                         } else {
1412                                 list_del(&slot->queue_node);
1413                                 mrq->cmd->error = -ENOMEDIUM;
1414                                 if (mrq->data)
1415                                         mrq->data->error = -ENOMEDIUM;
1416                                 if (mrq->stop)
1417                                         mrq->stop->error = -ENOMEDIUM;
1418
1419                                 spin_unlock(&host->lock);
1420                                 mmc_request_done(slot->mmc, mrq);
1421                                 spin_lock(&host->lock);
1422                         }
1423                 }
1424                 spin_unlock(&host->lock);
1425
1426                 mmc_detect_change(slot->mmc, 0);
1427         }
1428 }
1429
1430 static void atmci_tasklet_func(unsigned long priv)
1431 {
1432         struct atmel_mci        *host = (struct atmel_mci *)priv;
1433         struct mmc_request      *mrq = host->mrq;
1434         struct mmc_data         *data = host->data;
1435         struct mmc_command      *cmd = host->cmd;
1436         enum atmel_mci_state    state = host->state;
1437         enum atmel_mci_state    prev_state;
1438         u32                     status;
1439
1440         spin_lock(&host->lock);
1441
1442         state = host->state;
1443
1444         dev_vdbg(&host->pdev->dev,
1445                 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1446                 state, host->pending_events, host->completed_events,
1447                 atmci_readl(host, ATMCI_IMR));
1448
1449         do {
1450                 prev_state = state;
1451
1452                 switch (state) {
1453                 case STATE_IDLE:
1454                         break;
1455
1456                 case STATE_SENDING_CMD:
1457                         if (!atmci_test_and_clear_pending(host,
1458                                                 EVENT_CMD_COMPLETE))
1459                                 break;
1460
1461                         host->cmd = NULL;
1462                         atmci_set_completed(host, EVENT_CMD_COMPLETE);
1463                         atmci_command_complete(host, mrq->cmd);
1464                         if (!mrq->data || cmd->error) {
1465                                 atmci_request_end(host, host->mrq);
1466                                 goto unlock;
1467                         }
1468
1469                         prev_state = state = STATE_SENDING_DATA;
1470                         /* fall through */
1471
1472                 case STATE_SENDING_DATA:
1473                         if (atmci_test_and_clear_pending(host,
1474                                                 EVENT_DATA_ERROR)) {
1475                                 host->stop_transfer(host);
1476                                 if (data->stop)
1477                                         atmci_send_stop_cmd(host, data);
1478                                 state = STATE_DATA_ERROR;
1479                                 break;
1480                         }
1481
1482                         if (!atmci_test_and_clear_pending(host,
1483                                                 EVENT_XFER_COMPLETE))
1484                                 break;
1485
1486                         atmci_set_completed(host, EVENT_XFER_COMPLETE);
1487                         prev_state = state = STATE_DATA_BUSY;
1488                         /* fall through */
1489
1490                 case STATE_DATA_BUSY:
1491                         if (!atmci_test_and_clear_pending(host,
1492                                                 EVENT_DATA_COMPLETE))
1493                                 break;
1494
1495                         host->data = NULL;
1496                         atmci_set_completed(host, EVENT_DATA_COMPLETE);
1497                         status = host->data_status;
1498                         if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1499                                 if (status & ATMCI_DTOE) {
1500                                         dev_dbg(&host->pdev->dev,
1501                                                         "data timeout error\n");
1502                                         data->error = -ETIMEDOUT;
1503                                 } else if (status & ATMCI_DCRCE) {
1504                                         dev_dbg(&host->pdev->dev,
1505                                                         "data CRC error\n");
1506                                         data->error = -EILSEQ;
1507                                 } else {
1508                                         dev_dbg(&host->pdev->dev,
1509                                                 "data FIFO error (status=%08x)\n",
1510                                                 status);
1511                                         data->error = -EIO;
1512                                 }
1513                         } else {
1514                                 data->bytes_xfered = data->blocks * data->blksz;
1515                                 data->error = 0;
1516                                 atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS);
1517                         }
1518
1519                         if (!data->stop) {
1520                                 atmci_request_end(host, host->mrq);
1521                                 goto unlock;
1522                         }
1523
1524                         prev_state = state = STATE_SENDING_STOP;
1525                         if (!data->error)
1526                                 atmci_send_stop_cmd(host, data);
1527                         /* fall through */
1528
1529                 case STATE_SENDING_STOP:
1530                         if (!atmci_test_and_clear_pending(host,
1531                                                 EVENT_CMD_COMPLETE))
1532                                 break;
1533
1534                         host->cmd = NULL;
1535                         atmci_command_complete(host, mrq->stop);
1536                         atmci_request_end(host, host->mrq);
1537                         goto unlock;
1538
1539                 case STATE_DATA_ERROR:
1540                         if (!atmci_test_and_clear_pending(host,
1541                                                 EVENT_XFER_COMPLETE))
1542                                 break;
1543
1544                         state = STATE_DATA_BUSY;
1545                         break;
1546                 }
1547         } while (state != prev_state);
1548
1549         host->state = state;
1550
1551 unlock:
1552         spin_unlock(&host->lock);
1553 }
1554
1555 static void atmci_read_data_pio(struct atmel_mci *host)
1556 {
1557         struct scatterlist      *sg = host->sg;
1558         void                    *buf = sg_virt(sg);
1559         unsigned int            offset = host->pio_offset;
1560         struct mmc_data         *data = host->data;
1561         u32                     value;
1562         u32                     status;
1563         unsigned int            nbytes = 0;
1564
1565         do {
1566                 value = atmci_readl(host, ATMCI_RDR);
1567                 if (likely(offset + 4 <= sg->length)) {
1568                         put_unaligned(value, (u32 *)(buf + offset));
1569
1570                         offset += 4;
1571                         nbytes += 4;
1572
1573                         if (offset == sg->length) {
1574                                 flush_dcache_page(sg_page(sg));
1575                                 host->sg = sg = sg_next(sg);
1576                                 if (!sg)
1577                                         goto done;
1578
1579                                 offset = 0;
1580                                 buf = sg_virt(sg);
1581                         }
1582                 } else {
1583                         unsigned int remaining = sg->length - offset;
1584                         memcpy(buf + offset, &value, remaining);
1585                         nbytes += remaining;
1586
1587                         flush_dcache_page(sg_page(sg));
1588                         host->sg = sg = sg_next(sg);
1589                         if (!sg)
1590                                 goto done;
1591
1592                         offset = 4 - remaining;
1593                         buf = sg_virt(sg);
1594                         memcpy(buf, (u8 *)&value + remaining, offset);
1595                         nbytes += offset;
1596                 }
1597
1598                 status = atmci_readl(host, ATMCI_SR);
1599                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1600                         atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_RXRDY
1601                                                 | ATMCI_DATA_ERROR_FLAGS));
1602                         host->data_status = status;
1603                         data->bytes_xfered += nbytes;
1604                         smp_wmb();
1605                         atmci_set_pending(host, EVENT_DATA_ERROR);
1606                         tasklet_schedule(&host->tasklet);
1607                         return;
1608                 }
1609         } while (status & ATMCI_RXRDY);
1610
1611         host->pio_offset = offset;
1612         data->bytes_xfered += nbytes;
1613
1614         return;
1615
1616 done:
1617         atmci_writel(host, ATMCI_IDR, ATMCI_RXRDY);
1618         atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1619         data->bytes_xfered += nbytes;
1620         smp_wmb();
1621         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1622 }
1623
1624 static void atmci_write_data_pio(struct atmel_mci *host)
1625 {
1626         struct scatterlist      *sg = host->sg;
1627         void                    *buf = sg_virt(sg);
1628         unsigned int            offset = host->pio_offset;
1629         struct mmc_data         *data = host->data;
1630         u32                     value;
1631         u32                     status;
1632         unsigned int            nbytes = 0;
1633
1634         do {
1635                 if (likely(offset + 4 <= sg->length)) {
1636                         value = get_unaligned((u32 *)(buf + offset));
1637                         atmci_writel(host, ATMCI_TDR, value);
1638
1639                         offset += 4;
1640                         nbytes += 4;
1641                         if (offset == sg->length) {
1642                                 host->sg = sg = sg_next(sg);
1643                                 if (!sg)
1644                                         goto done;
1645
1646                                 offset = 0;
1647                                 buf = sg_virt(sg);
1648                         }
1649                 } else {
1650                         unsigned int remaining = sg->length - offset;
1651
1652                         value = 0;
1653                         memcpy(&value, buf + offset, remaining);
1654                         nbytes += remaining;
1655
1656                         host->sg = sg = sg_next(sg);
1657                         if (!sg) {
1658                                 atmci_writel(host, ATMCI_TDR, value);
1659                                 goto done;
1660                         }
1661
1662                         offset = 4 - remaining;
1663                         buf = sg_virt(sg);
1664                         memcpy((u8 *)&value + remaining, buf, offset);
1665                         atmci_writel(host, ATMCI_TDR, value);
1666                         nbytes += offset;
1667                 }
1668
1669                 status = atmci_readl(host, ATMCI_SR);
1670                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1671                         atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_TXRDY
1672                                                 | ATMCI_DATA_ERROR_FLAGS));
1673                         host->data_status = status;
1674                         data->bytes_xfered += nbytes;
1675                         smp_wmb();
1676                         atmci_set_pending(host, EVENT_DATA_ERROR);
1677                         tasklet_schedule(&host->tasklet);
1678                         return;
1679                 }
1680         } while (status & ATMCI_TXRDY);
1681
1682         host->pio_offset = offset;
1683         data->bytes_xfered += nbytes;
1684
1685         return;
1686
1687 done:
1688         atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY);
1689         atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1690         data->bytes_xfered += nbytes;
1691         smp_wmb();
1692         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1693 }
1694
1695 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1696 {
1697         atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY);
1698
1699         host->cmd_status = status;
1700         smp_wmb();
1701         atmci_set_pending(host, EVENT_CMD_COMPLETE);
1702         tasklet_schedule(&host->tasklet);
1703 }
1704
1705 static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status)
1706 {
1707         int     i;
1708
1709         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1710                 struct atmel_mci_slot *slot = host->slot[i];
1711                 if (slot && (status & slot->sdio_irq)) {
1712                         mmc_signal_sdio_irq(slot->mmc);
1713                 }
1714         }
1715 }
1716
1717
1718 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1719 {
1720         struct atmel_mci        *host = dev_id;
1721         u32                     status, mask, pending;
1722         unsigned int            pass_count = 0;
1723
1724         do {
1725                 status = atmci_readl(host, ATMCI_SR);
1726                 mask = atmci_readl(host, ATMCI_IMR);
1727                 pending = status & mask;
1728                 if (!pending)
1729                         break;
1730
1731                 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1732                         atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS
1733                                         | ATMCI_RXRDY | ATMCI_TXRDY);
1734                         pending &= atmci_readl(host, ATMCI_IMR);
1735
1736                         host->data_status = status;
1737                         smp_wmb();
1738                         atmci_set_pending(host, EVENT_DATA_ERROR);
1739                         tasklet_schedule(&host->tasklet);
1740                 }
1741
1742                 if (pending & ATMCI_TXBUFE) {
1743                         atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE);
1744                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
1745                         /*
1746                          * We can receive this interruption before having configured
1747                          * the second pdc buffer, so we need to reconfigure first and
1748                          * second buffers again
1749                          */
1750                         if (host->data_size) {
1751                                 atmci_pdc_set_both_buf(host, XFER_TRANSMIT);
1752                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDTX);
1753                                 atmci_writel(host, ATMCI_IER, ATMCI_TXBUFE);
1754                         } else {
1755                                 atmci_pdc_complete(host);
1756                         }
1757                 } else if (pending & ATMCI_ENDTX) {
1758                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
1759
1760                         if (host->data_size) {
1761                                 atmci_pdc_set_single_buf(host,
1762                                                 XFER_TRANSMIT, PDC_SECOND_BUF);
1763                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDTX);
1764                         }
1765                 }
1766
1767                 if (pending & ATMCI_RXBUFF) {
1768                         atmci_writel(host, ATMCI_IDR, ATMCI_RXBUFF);
1769                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);
1770                         /*
1771                          * We can receive this interruption before having configured
1772                          * the second pdc buffer, so we need to reconfigure first and
1773                          * second buffers again
1774                          */
1775                         if (host->data_size) {
1776                                 atmci_pdc_set_both_buf(host, XFER_RECEIVE);
1777                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDRX);
1778                                 atmci_writel(host, ATMCI_IER, ATMCI_RXBUFF);
1779                         } else {
1780                                 atmci_pdc_complete(host);
1781                         }
1782                 } else if (pending & ATMCI_ENDRX) {
1783                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);
1784
1785                         if (host->data_size) {
1786                                 atmci_pdc_set_single_buf(host,
1787                                                 XFER_RECEIVE, PDC_SECOND_BUF);
1788                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDRX);
1789                         }
1790                 }
1791
1792
1793                 if (pending & ATMCI_NOTBUSY) {
1794                         atmci_writel(host, ATMCI_IDR,
1795                                         ATMCI_DATA_ERROR_FLAGS | ATMCI_NOTBUSY);
1796                         if (!host->data_status)
1797                                 host->data_status = status;
1798                         smp_wmb();
1799                         atmci_set_pending(host, EVENT_DATA_COMPLETE);
1800                         tasklet_schedule(&host->tasklet);
1801                 }
1802                 if (pending & ATMCI_RXRDY)
1803                         atmci_read_data_pio(host);
1804                 if (pending & ATMCI_TXRDY)
1805                         atmci_write_data_pio(host);
1806
1807                 if (pending & ATMCI_CMDRDY)
1808                         atmci_cmd_interrupt(host, status);
1809
1810                 if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
1811                         atmci_sdio_interrupt(host, status);
1812
1813         } while (pass_count++ < 5);
1814
1815         return pass_count ? IRQ_HANDLED : IRQ_NONE;
1816 }
1817
1818 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1819 {
1820         struct atmel_mci_slot   *slot = dev_id;
1821
1822         /*
1823          * Disable interrupts until the pin has stabilized and check
1824          * the state then. Use mod_timer() since we may be in the
1825          * middle of the timer routine when this interrupt triggers.
1826          */
1827         disable_irq_nosync(irq);
1828         mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1829
1830         return IRQ_HANDLED;
1831 }
1832
1833 static int __init atmci_init_slot(struct atmel_mci *host,
1834                 struct mci_slot_pdata *slot_data, unsigned int id,
1835                 u32 sdc_reg, u32 sdio_irq)
1836 {
1837         struct mmc_host                 *mmc;
1838         struct atmel_mci_slot           *slot;
1839
1840         mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1841         if (!mmc)
1842                 return -ENOMEM;
1843
1844         slot = mmc_priv(mmc);
1845         slot->mmc = mmc;
1846         slot->host = host;
1847         slot->detect_pin = slot_data->detect_pin;
1848         slot->wp_pin = slot_data->wp_pin;
1849         slot->detect_is_active_high = slot_data->detect_is_active_high;
1850         slot->sdc_reg = sdc_reg;
1851         slot->sdio_irq = sdio_irq;
1852
1853         mmc->ops = &atmci_ops;
1854         mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1855         mmc->f_max = host->bus_hz / 2;
1856         mmc->ocr_avail  = MMC_VDD_32_33 | MMC_VDD_33_34;
1857         if (sdio_irq)
1858                 mmc->caps |= MMC_CAP_SDIO_IRQ;
1859         if (host->caps.has_highspeed)
1860                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1861         if (slot_data->bus_width >= 4)
1862                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1863
1864         mmc->max_segs = 64;
1865         mmc->max_req_size = 32768 * 512;
1866         mmc->max_blk_size = 32768;
1867         mmc->max_blk_count = 512;
1868
1869         /* Assume card is present initially */
1870         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1871         if (gpio_is_valid(slot->detect_pin)) {
1872                 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1873                         dev_dbg(&mmc->class_dev, "no detect pin available\n");
1874                         slot->detect_pin = -EBUSY;
1875                 } else if (gpio_get_value(slot->detect_pin) ^
1876                                 slot->detect_is_active_high) {
1877                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1878                 }
1879         }
1880
1881         if (!gpio_is_valid(slot->detect_pin))
1882                 mmc->caps |= MMC_CAP_NEEDS_POLL;
1883
1884         if (gpio_is_valid(slot->wp_pin)) {
1885                 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1886                         dev_dbg(&mmc->class_dev, "no WP pin available\n");
1887                         slot->wp_pin = -EBUSY;
1888                 }
1889         }
1890
1891         host->slot[id] = slot;
1892         mmc_add_host(mmc);
1893
1894         if (gpio_is_valid(slot->detect_pin)) {
1895                 int ret;
1896
1897                 setup_timer(&slot->detect_timer, atmci_detect_change,
1898                                 (unsigned long)slot);
1899
1900                 ret = request_irq(gpio_to_irq(slot->detect_pin),
1901                                 atmci_detect_interrupt,
1902                                 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1903                                 "mmc-detect", slot);
1904                 if (ret) {
1905                         dev_dbg(&mmc->class_dev,
1906                                 "could not request IRQ %d for detect pin\n",
1907                                 gpio_to_irq(slot->detect_pin));
1908                         gpio_free(slot->detect_pin);
1909                         slot->detect_pin = -EBUSY;
1910                 }
1911         }
1912
1913         atmci_init_debugfs(slot);
1914
1915         return 0;
1916 }
1917
1918 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1919                 unsigned int id)
1920 {
1921         /* Debugfs stuff is cleaned up by mmc core */
1922
1923         set_bit(ATMCI_SHUTDOWN, &slot->flags);
1924         smp_wmb();
1925
1926         mmc_remove_host(slot->mmc);
1927
1928         if (gpio_is_valid(slot->detect_pin)) {
1929                 int pin = slot->detect_pin;
1930
1931                 free_irq(gpio_to_irq(pin), slot);
1932                 del_timer_sync(&slot->detect_timer);
1933                 gpio_free(pin);
1934         }
1935         if (gpio_is_valid(slot->wp_pin))
1936                 gpio_free(slot->wp_pin);
1937
1938         slot->host->slot[id] = NULL;
1939         mmc_free_host(slot->mmc);
1940 }
1941
1942 static bool atmci_filter(struct dma_chan *chan, void *slave)
1943 {
1944         struct mci_dma_data     *sl = slave;
1945
1946         if (sl && find_slave_dev(sl) == chan->device->dev) {
1947                 chan->private = slave_data_ptr(sl);
1948                 return true;
1949         } else {
1950                 return false;
1951         }
1952 }
1953
1954 static bool atmci_configure_dma(struct atmel_mci *host)
1955 {
1956         struct mci_platform_data        *pdata;
1957
1958         if (host == NULL)
1959                 return false;
1960
1961         pdata = host->pdev->dev.platform_data;
1962
1963         if (pdata && find_slave_dev(pdata->dma_slave)) {
1964                 dma_cap_mask_t mask;
1965
1966                 setup_dma_addr(pdata->dma_slave,
1967                                host->mapbase + ATMCI_TDR,
1968                                host->mapbase + ATMCI_RDR);
1969
1970                 /* Try to grab a DMA channel */
1971                 dma_cap_zero(mask);
1972                 dma_cap_set(DMA_SLAVE, mask);
1973                 host->dma.chan =
1974                         dma_request_channel(mask, atmci_filter, pdata->dma_slave);
1975         }
1976         if (!host->dma.chan) {
1977                 dev_warn(&host->pdev->dev, "no DMA channel available\n");
1978                 return false;
1979         } else {
1980                 dev_info(&host->pdev->dev,
1981                                         "Using %s for DMA transfers\n",
1982                                         dma_chan_name(host->dma.chan));
1983                 return true;
1984         }
1985 }
1986
1987 static inline unsigned int atmci_get_version(struct atmel_mci *host)
1988 {
1989         return atmci_readl(host, ATMCI_VERSION) & 0x00000fff;
1990 }
1991
1992 /*
1993  * HSMCI (High Speed MCI) module is not fully compatible with MCI module.
1994  * HSMCI provides DMA support and a new config register but no more supports
1995  * PDC.
1996  */
1997 static void __init atmci_get_cap(struct atmel_mci *host)
1998 {
1999         unsigned int version;
2000
2001         version = atmci_get_version(host);
2002         dev_info(&host->pdev->dev,
2003                         "version: 0x%x\n", version);
2004
2005         host->caps.has_dma = 0;
2006         host->caps.has_pdc = 0;
2007         host->caps.has_cfg_reg = 0;
2008         host->caps.has_cstor_reg = 0;
2009         host->caps.has_highspeed = 0;
2010         host->caps.has_rwproof = 0;
2011
2012         /* keep only major version number */
2013         switch (version & 0xf00) {
2014         case 0x100:
2015         case 0x200:
2016                 host->caps.has_pdc = 1;
2017                 host->caps.has_rwproof = 1;
2018                 break;
2019         case 0x300:
2020         case 0x400:
2021         case 0x500:
2022 #ifdef CONFIG_AT_HDMAC
2023                 host->caps.has_dma = 1;
2024 #else
2025                 host->caps.has_dma = 0;
2026                 dev_info(&host->pdev->dev,
2027                         "has dma capability but dma engine is not selected, then use pio\n");
2028 #endif
2029                 host->caps.has_cfg_reg = 1;
2030                 host->caps.has_cstor_reg = 1;
2031                 host->caps.has_highspeed = 1;
2032                 host->caps.has_rwproof = 1;
2033                 break;
2034         default:
2035                 dev_warn(&host->pdev->dev,
2036                                 "Unmanaged mci version, set minimum capabilities\n");
2037                 break;
2038         }
2039 }
2040
2041 static int __init atmci_probe(struct platform_device *pdev)
2042 {
2043         struct mci_platform_data        *pdata;
2044         struct atmel_mci                *host;
2045         struct resource                 *regs;
2046         unsigned int                    nr_slots;
2047         int                             irq;
2048         int                             ret;
2049
2050         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2051         if (!regs)
2052                 return -ENXIO;
2053         pdata = pdev->dev.platform_data;
2054         if (!pdata)
2055                 return -ENXIO;
2056         irq = platform_get_irq(pdev, 0);
2057         if (irq < 0)
2058                 return irq;
2059
2060         host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
2061         if (!host)
2062                 return -ENOMEM;
2063
2064         host->pdev = pdev;
2065         spin_lock_init(&host->lock);
2066         INIT_LIST_HEAD(&host->queue);
2067
2068         host->mck = clk_get(&pdev->dev, "mci_clk");
2069         if (IS_ERR(host->mck)) {
2070                 ret = PTR_ERR(host->mck);
2071                 goto err_clk_get;
2072         }
2073
2074         ret = -ENOMEM;
2075         host->regs = ioremap(regs->start, resource_size(regs));
2076         if (!host->regs)
2077                 goto err_ioremap;
2078
2079         clk_enable(host->mck);
2080         atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
2081         host->bus_hz = clk_get_rate(host->mck);
2082         clk_disable(host->mck);
2083
2084         host->mapbase = regs->start;
2085
2086         tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
2087
2088         ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
2089         if (ret)
2090                 goto err_request_irq;
2091
2092         /* Get MCI capabilities and set operations according to it */
2093         atmci_get_cap(host);
2094         if (host->caps.has_dma && atmci_configure_dma(host)) {
2095                 host->prepare_data = &atmci_prepare_data_dma;
2096                 host->submit_data = &atmci_submit_data_dma;
2097                 host->stop_transfer = &atmci_stop_transfer_dma;
2098         } else if (host->caps.has_pdc) {
2099                 dev_info(&pdev->dev, "using PDC\n");
2100                 host->prepare_data = &atmci_prepare_data_pdc;
2101                 host->submit_data = &atmci_submit_data_pdc;
2102                 host->stop_transfer = &atmci_stop_transfer_pdc;
2103         } else {
2104                 dev_info(&pdev->dev, "using PIO\n");
2105                 host->prepare_data = &atmci_prepare_data;
2106                 host->submit_data = &atmci_submit_data;
2107                 host->stop_transfer = &atmci_stop_transfer;
2108         }
2109
2110         platform_set_drvdata(pdev, host);
2111
2112         /* We need at least one slot to succeed */
2113         nr_slots = 0;
2114         ret = -ENODEV;
2115         if (pdata->slot[0].bus_width) {
2116                 ret = atmci_init_slot(host, &pdata->slot[0],
2117                                 0, ATMCI_SDCSEL_SLOT_A, ATMCI_SDIOIRQA);
2118                 if (!ret)
2119                         nr_slots++;
2120         }
2121         if (pdata->slot[1].bus_width) {
2122                 ret = atmci_init_slot(host, &pdata->slot[1],
2123                                 1, ATMCI_SDCSEL_SLOT_B, ATMCI_SDIOIRQB);
2124                 if (!ret)
2125                         nr_slots++;
2126         }
2127
2128         if (!nr_slots) {
2129                 dev_err(&pdev->dev, "init failed: no slot defined\n");
2130                 goto err_init_slot;
2131         }
2132
2133         dev_info(&pdev->dev,
2134                         "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
2135                         host->mapbase, irq, nr_slots);
2136
2137         return 0;
2138
2139 err_init_slot:
2140         if (host->dma.chan)
2141                 dma_release_channel(host->dma.chan);
2142         free_irq(irq, host);
2143 err_request_irq:
2144         iounmap(host->regs);
2145 err_ioremap:
2146         clk_put(host->mck);
2147 err_clk_get:
2148         kfree(host);
2149         return ret;
2150 }
2151
2152 static int __exit atmci_remove(struct platform_device *pdev)
2153 {
2154         struct atmel_mci        *host = platform_get_drvdata(pdev);
2155         unsigned int            i;
2156
2157         platform_set_drvdata(pdev, NULL);
2158
2159         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
2160                 if (host->slot[i])
2161                         atmci_cleanup_slot(host->slot[i], i);
2162         }
2163
2164         clk_enable(host->mck);
2165         atmci_writel(host, ATMCI_IDR, ~0UL);
2166         atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
2167         atmci_readl(host, ATMCI_SR);
2168         clk_disable(host->mck);
2169
2170 #ifdef CONFIG_MMC_ATMELMCI_DMA
2171         if (host->dma.chan)
2172                 dma_release_channel(host->dma.chan);
2173 #endif
2174
2175         free_irq(platform_get_irq(pdev, 0), host);
2176         iounmap(host->regs);
2177
2178         clk_put(host->mck);
2179         kfree(host);
2180
2181         return 0;
2182 }
2183
2184 #ifdef CONFIG_PM
2185 static int atmci_suspend(struct device *dev)
2186 {
2187         struct atmel_mci *host = dev_get_drvdata(dev);
2188         int i;
2189
2190          for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
2191                 struct atmel_mci_slot *slot = host->slot[i];
2192                 int ret;
2193
2194                 if (!slot)
2195                         continue;
2196                 ret = mmc_suspend_host(slot->mmc);
2197                 if (ret < 0) {
2198                         while (--i >= 0) {
2199                                 slot = host->slot[i];
2200                                 if (slot
2201                                 && test_bit(ATMCI_SUSPENDED, &slot->flags)) {
2202                                         mmc_resume_host(host->slot[i]->mmc);
2203                                         clear_bit(ATMCI_SUSPENDED, &slot->flags);
2204                                 }
2205                         }
2206                         return ret;
2207                 } else {
2208                         set_bit(ATMCI_SUSPENDED, &slot->flags);
2209                 }
2210         }
2211
2212         return 0;
2213 }
2214
2215 static int atmci_resume(struct device *dev)
2216 {
2217         struct atmel_mci *host = dev_get_drvdata(dev);
2218         int i;
2219         int ret = 0;
2220
2221         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
2222                 struct atmel_mci_slot *slot = host->slot[i];
2223                 int err;
2224
2225                 slot = host->slot[i];
2226                 if (!slot)
2227                         continue;
2228                 if (!test_bit(ATMCI_SUSPENDED, &slot->flags))
2229                         continue;
2230                 err = mmc_resume_host(slot->mmc);
2231                 if (err < 0)
2232                         ret = err;
2233                 else
2234                         clear_bit(ATMCI_SUSPENDED, &slot->flags);
2235         }
2236
2237         return ret;
2238 }
2239 static SIMPLE_DEV_PM_OPS(atmci_pm, atmci_suspend, atmci_resume);
2240 #define ATMCI_PM_OPS    (&atmci_pm)
2241 #else
2242 #define ATMCI_PM_OPS    NULL
2243 #endif
2244
2245 static struct platform_driver atmci_driver = {
2246         .remove         = __exit_p(atmci_remove),
2247         .driver         = {
2248                 .name           = "atmel_mci",
2249                 .pm             = ATMCI_PM_OPS,
2250         },
2251 };
2252
2253 static int __init atmci_init(void)
2254 {
2255         return platform_driver_probe(&atmci_driver, atmci_probe);
2256 }
2257
2258 static void __exit atmci_exit(void)
2259 {
2260         platform_driver_unregister(&atmci_driver);
2261 }
2262
2263 late_initcall(atmci_init); /* try to load after dma driver when built-in */
2264 module_exit(atmci_exit);
2265
2266 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
2267 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2268 MODULE_LICENSE("GPL v2");