2 * Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59
16 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 * The full GNU General Public License is included in this distribution in the
19 * file called COPYING.
24 #include <linux/dmaengine.h>
26 #include <linux/init.h>
27 #include <linux/dmapool.h>
28 #include <linux/cache.h>
29 #include <linux/pci_ids.h>
32 #define IOAT_DMA_VERSION "3.64"
36 msix_multi_vector = 1,
37 msix_single_vector = 2,
42 #define IOAT_LOW_COMPLETION_MASK 0xffffffc0
43 #define IOAT_DMA_DCA_ANY_CPU ~0
44 #define IOAT_WATCHDOG_PERIOD (2 * HZ)
46 #define to_ioat_chan(chan) container_of(chan, struct ioat_dma_chan, common)
47 #define to_ioatdma_device(dev) container_of(dev, struct ioatdma_device, common)
48 #define to_ioat_desc(lh) container_of(lh, struct ioat_desc_sw, node)
49 #define tx_to_ioat_desc(tx) container_of(tx, struct ioat_desc_sw, async_tx)
51 #define chan_num(ch) ((int)((ch)->reg_base - (ch)->device->reg_base) / 0x80)
53 #define RESET_DELAY msecs_to_jiffies(100)
54 #define WATCHDOG_DELAY round_jiffies(msecs_to_jiffies(2000))
57 * workaround for IOAT ver.3.0 null descriptor issue
58 * (channel returns error when size is 0)
60 #define NULL_DESC_BUFFER_SIZE 1
64 * struct ioatdma_device - internal representation of a IOAT device
65 * @pdev: PCI-Express device
66 * @reg_base: MMIO register space base address
67 * @dma_pool: for allocating DMA descriptors
68 * @common: embedded struct dma_device
69 * @version: version of ioatdma device
70 * @irq_mode: which style irq to use
71 * @msix_entries: irq handlers
72 * @idx: per channel data
75 struct ioatdma_device {
77 void __iomem *reg_base;
78 struct pci_pool *dma_pool;
79 struct pci_pool *completion_pool;
80 struct dma_device common;
82 enum ioat_interrupt irq_mode;
83 struct delayed_work work;
84 struct msix_entry msix_entries[4];
85 struct ioat_dma_chan *idx[4];
89 * struct ioat_dma_chan - internal representation of a DMA channel
91 struct ioat_dma_chan {
93 void __iomem *reg_base;
95 dma_cookie_t completed_cookie;
96 unsigned long last_completion;
97 unsigned long last_completion_time;
99 size_t xfercap; /* XFERCAP register value expanded out */
101 spinlock_t cleanup_lock;
102 spinlock_t desc_lock;
103 struct list_head free_desc;
104 struct list_head used_desc;
105 unsigned long watchdog_completion;
106 int watchdog_tcp_cookie;
107 u32 watchdog_last_tcp_cookie;
108 struct delayed_work work;
114 struct ioatdma_device *device;
115 struct dma_chan common;
117 dma_addr_t completion_addr;
119 u64 full; /* HW completion writeback */
125 unsigned long last_compl_desc_addr_hw;
126 struct tasklet_struct cleanup_task;
129 /* wrapper around hardware descriptor format + additional software fields */
132 * struct ioat_desc_sw - wrapper around hardware descriptor
133 * @hw: hardware DMA descriptor
134 * @node: this descriptor will either be on the free list,
135 * or attached to a transaction list (async_tx.tx_list)
136 * @tx_cnt: number of descriptors required to complete the transaction
137 * @async_tx: the generic software descriptor for all engines
139 struct ioat_desc_sw {
140 struct ioat_dma_descriptor *hw;
141 struct list_head node;
146 struct dma_async_tx_descriptor async_tx;
149 static inline void ioat_set_tcp_copy_break(struct ioatdma_device *dev)
151 #ifdef CONFIG_NET_DMA
152 switch (dev->version) {
154 sysctl_tcp_dma_copybreak = 4096;
157 sysctl_tcp_dma_copybreak = 2048;
160 sysctl_tcp_dma_copybreak = 262144;
166 #if defined(CONFIG_INTEL_IOATDMA) || defined(CONFIG_INTEL_IOATDMA_MODULE)
167 struct ioatdma_device *ioat_dma_probe(struct pci_dev *pdev,
168 void __iomem *iobase);
169 void ioat_dma_remove(struct ioatdma_device *device);
170 struct dca_provider *ioat_dca_init(struct pci_dev *pdev, void __iomem *iobase);
171 struct dca_provider *ioat2_dca_init(struct pci_dev *pdev, void __iomem *iobase);
172 struct dca_provider *ioat3_dca_init(struct pci_dev *pdev, void __iomem *iobase);
174 #define ioat_dma_probe(pdev, iobase) NULL
175 #define ioat_dma_remove(device) do { } while (0)
176 #define ioat_dca_init(pdev, iobase) NULL
177 #define ioat2_dca_init(pdev, iobase) NULL
178 #define ioat3_dca_init(pdev, iobase) NULL
181 #endif /* IOATDMA_H */