drivers/net/wireless/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2010  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/export.h>
  31 #include "core.h"
  32 #include "wifi.h"
  33 #include "pci.h"
  34 #include "base.h"
  35 #include "ps.h"
  36 #include "efuse.h"
  37
  38 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  39         PCI_VENDOR_ID_INTEL,
  40         PCI_VENDOR_ID_ATI,
  41         PCI_VENDOR_ID_AMD,
  42         PCI_VENDOR_ID_SI
  43 };
  44
  45 static const u8 ac_to_hwq[] = {
  46         VO_QUEUE,
  47         VI_QUEUE,
  48         BE_QUEUE,
  49         BK_QUEUE
  50 };
  51
  52 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  53                        struct sk_buff *skb)
  54 {
  55         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  56         __le16 fc = rtl_get_fc(skb);
  57         u8 queue_index = skb_get_queue_mapping(skb);
  58
  59         if (unlikely(ieee80211_is_beacon(fc)))
  60                 return BEACON_QUEUE;
  61         if (ieee80211_is_mgmt(fc))
  62                 return MGNT_QUEUE;
  63         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  64                 if (ieee80211_is_nullfunc(fc))
  65                         return HIGH_QUEUE;
  66
  67         return ac_to_hwq[queue_index];
  68 }
  69
  70 /* Update PCI dependent default settings*/
  71 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  72 {
  73         struct rtl_priv *rtlpriv = rtl_priv(hw);
  74         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  75         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  76         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  77         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  78         u8 init_aspm;
  79
  80         ppsc->reg_rfps_level = 0;
  81         ppsc->support_aspm = 0;
  82
  83         /*Update PCI ASPM setting */
  84         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  85         switch (rtlpci->const_pci_aspm) {
  86         case 0:
  87                 /*No ASPM */
  88                 break;
  89
  90         case 1:
  91                 /*ASPM dynamically enabled/disable. */
  92                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  93                 break;
  94
  95         case 2:
  96                 /*ASPM with Clock Req dynamically enabled/disable. */
  97                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
  98                                          RT_RF_OFF_LEVL_CLK_REQ);
  99                 break;
 100
 101         case 3:
 102                 /*
 103                  * Always enable ASPM and Clock Req
 104                  * from initialization to halt.
 105                  * */
 106                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 107                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 108                                          RT_RF_OFF_LEVL_CLK_REQ);
 109                 break;
 110
 111         case 4:
 112                 /*
 113                  * Always enable ASPM without Clock Req
 114                  * from initialization to halt.
 115                  * */
 116                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 117                                           RT_RF_OFF_LEVL_CLK_REQ);
 118                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 119                 break;
 120         }
 121
 122         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 123
 124         /*Update Radio OFF setting */
 125         switch (rtlpci->const_hwsw_rfoff_d3) {
 126         case 1:
 127                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 128                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 129                 break;
 130
 131         case 2:
 132                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 133                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 134                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 135                 break;
 136
 137         case 3:
 138                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 139                 break;
 140         }
 141
 142         /*Set HW definition to determine if it supports ASPM. */
 143         switch (rtlpci->const_support_pciaspm) {
 144         case 0:{
 145                         /*Not support ASPM. */
 146                         bool support_aspm = false;
 147                         ppsc->support_aspm = support_aspm;
 148                         break;
 149                 }
 150         case 1:{
 151                         /*Support ASPM. */
 152                         bool support_aspm = true;
 153                         bool support_backdoor = true;
 154                         ppsc->support_aspm = support_aspm;
 155
 156                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 157                            !priv->ndis_adapter.amd_l1_patch)
 158                            support_backdoor = false; */
 159
 160                         ppsc->support_backdoor = support_backdoor;
 161
 162                         break;
 163                 }
 164         case 2:
 165                 /*ASPM value set by chipset. */
 166                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 167                         bool support_aspm = true;
 168                         ppsc->support_aspm = support_aspm;
 169                 }
 170                 break;
 171         default:
 172                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 173                          ("switch case not process\n"));
 174                 break;
 175         }
 176
 177         /* toshiba aspm issue, toshiba will set aspm selfly
 178          * so we should not set aspm in driver */
 179         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 180         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 181                 init_aspm == 0x43)
 182                 ppsc->support_aspm = false;
 183 }
 184
 185 static bool _rtl_pci_platform_switch_device_pci_aspm(
 186                         struct ieee80211_hw *hw,
 187                         u8 value)
 188 {
 189         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 190         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 191
 192         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 193                 value |= 0x40;
 194
 195         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 196
 197         return false;
 198 }
 199
 200 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 201 static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 202 {
 203         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 204         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 205
 206         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 207
 208         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 209                 udelay(100);
 210
 211         return true;
 212 }
 213
 214 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 215 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 216 {
 217         struct rtl_priv *rtlpriv = rtl_priv(hw);
 218         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 219         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 220         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 221         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 222         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 223         /*Retrieve original configuration settings. */
 224         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 225         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 226                                 pcibridge_linkctrlreg;
 227         u16 aspmlevel = 0;
 228         u8 tmp_u1b = 0;
 229
 230         if (!ppsc->support_aspm)
 231                 return;
 232
 233         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 234                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 235                          ("PCI(Bridge) UNKNOWN.\n"));
 236
 237                 return;
 238         }
 239
 240         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 241                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 242                 _rtl_pci_switch_clk_req(hw, 0x0);
 243         }
 244
 245         /*for promising device will in L0 state after an I/O. */
 246         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 247
 248         /*Set corresponding value. */
 249         aspmlevel |= BIT(0) | BIT(1);
 250         linkctrl_reg &= ~aspmlevel;
 251         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 252
 253         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 254         udelay(50);
 255
 256         /*4 Disable Pci Bridge ASPM */
 257         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 258                               pcibridge_linkctrlreg);
 259
 260         udelay(50);
 261 }
 262
 263 /*
 264  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 265  *power saving We should follow the sequence to enable
 266  *RTL8192SE first then enable Pci Bridge ASPM
 267  *or the system will show bluescreen.
 268  */
 269 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 270 {
 271         struct rtl_priv *rtlpriv = rtl_priv(hw);
 272         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 273         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 274         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 275         u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
 276         u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
 277         u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
 278         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 279         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 280         u16 aspmlevel;
 281         u8 u_pcibridge_aspmsetting;
 282         u8 u_device_aspmsetting;
 283
 284         if (!ppsc->support_aspm)
 285                 return;
 286
 287         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 288                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 289                          ("PCI(Bridge) UNKNOWN.\n"));
 290                 return;
 291         }
 292
 293         /*4 Enable Pci Bridge ASPM */
 294
 295         u_pcibridge_aspmsetting =
 296             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 297             rtlpci->const_hostpci_aspm_setting;
 298
 299         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 300                 u_pcibridge_aspmsetting &= ~BIT(0);
 301
 302         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 303                               u_pcibridge_aspmsetting);
 304
 305         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 306                  ("PlatformEnableASPM():PciBridge busnumber[%x], "
 307                   "DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
 308                   pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
 309                   (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 310                   u_pcibridge_aspmsetting));
 311
 312         udelay(50);
 313
 314         /*Get ASPM level (with/without Clock Req) */
 315         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 316         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 317
 318         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 319         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 320
 321         u_device_aspmsetting |= aspmlevel;
 322
 323         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 324
 325         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 326                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 327                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 328                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 329         }
 330         udelay(100);
 331 }
 332
 333 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 334 {
 335         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 336
 337         bool status = false;
 338         u8 offset_e0;
 339         unsigned offset_e4;
 340
 341         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 342
 343         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 344
 345         if (offset_e0 == 0xA0) {
 346                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 347                 if (offset_e4 & BIT(23))
 348                         status = true;
 349         }
 350
 351         return status;
 352 }
 353
 354 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 355 {
 356         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 357         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 358         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 359         u8 linkctrl_reg;
 360         u8 num4bbytes;
 361
 362         num4bbytes = (capabilityoffset + 0x10) / 4;
 363
 364         /*Read  Link Control Register */
 365         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 366
 367         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 368 }
 369
 370 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 371                 struct ieee80211_hw *hw)
 372 {
 373         struct rtl_priv *rtlpriv = rtl_priv(hw);
 374         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 375
 376         u8 tmp;
 377         int pos;
 378         u8 linkctrl_reg;
 379
 380         /*Link Control Register */
 381         pos = pci_pcie_cap(pdev);
 382         pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
 383         pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
 384
 385         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
 386                  ("Link Control Register =%x\n",
 387                   pcipriv->ndis_adapter.linkctrl_reg));
 388
 389         pci_read_config_byte(pdev, 0x98, &tmp);
 390         tmp |= BIT(4);
 391         pci_write_config_byte(pdev, 0x98, tmp);
 392
 393         tmp = 0x17;
 394         pci_write_config_byte(pdev, 0x70f, tmp);
 395 }
 396
 397 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 398 {
 399         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 400
 401         _rtl_pci_update_default_setting(hw);
 402
 403         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 404                 /*Always enable ASPM & Clock Req. */
 405                 rtl_pci_enable_aspm(hw);
 406                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 407         }
 408
 409 }
 410
 411 static void _rtl_pci_io_handler_init(struct device *dev,
 412                                      struct ieee80211_hw *hw)
 413 {
 414         struct rtl_priv *rtlpriv = rtl_priv(hw);
 415
 416         rtlpriv->io.dev = dev;
 417
 418         rtlpriv->io.write8_async = pci_write8_async;
 419         rtlpriv->io.write16_async = pci_write16_async;
 420         rtlpriv->io.write32_async = pci_write32_async;
 421
 422         rtlpriv->io.read8_sync = pci_read8_sync;
 423         rtlpriv->io.read16_sync = pci_read16_sync;
 424         rtlpriv->io.read32_sync = pci_read32_sync;
 425
 426 }
 427
 428 static void _rtl_pci_io_handler_release(struct ieee80211_hw *hw)
 429 {
 430 }
 431
 432 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 433                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 434 {
 435         struct rtl_priv *rtlpriv = rtl_priv(hw);
 436         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 437         u8 additionlen = FCS_LEN;
 438         struct sk_buff *next_skb;
 439
 440         /* here open is 4, wep/tkip is 8, aes is 12*/
 441         if (info->control.hw_key)
 442                 additionlen += info->control.hw_key->icv_len;
 443
 444         /* The most skb num is 6 */
 445         tcb_desc->empkt_num = 0;
 446         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 447         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 448                 struct ieee80211_tx_info *next_info;
 449
 450                 next_info = IEEE80211_SKB_CB(next_skb);
 451                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 452                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 453                                 next_skb->len + additionlen;
 454                         tcb_desc->empkt_num++;
 455                 } else {
 456                         break;
 457                 }
 458
 459                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 460                                       next_skb))
 461                         break;
 462
 463                 if (tcb_desc->empkt_num >= 5)
 464                         break;
 465         }
 466         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 467
 468         return true;
 469 }
 470
 471 /* just for early mode now */
 472 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 473 {
 474         struct rtl_priv *rtlpriv = rtl_priv(hw);
 475         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 476         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 477         struct sk_buff *skb = NULL;
 478         struct ieee80211_tx_info *info = NULL;
 479         int tid;
 480
 481         if (!rtlpriv->rtlhal.earlymode_enable)
 482                 return;
 483
 484         /* we juse use em for BE/BK/VI/VO */
 485         for (tid = 7; tid >= 0; tid--) {
 486                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(hw, tid)];
 487                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 488                 while (!mac->act_scanning &&
 489                        rtlpriv->psc.rfpwr_state == ERFON) {
 490                         struct rtl_tcb_desc tcb_desc;
 491                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 492
 493                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 494                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 495                            (ring->entries - skb_queue_len(&ring->queue) > 5)) {
 496                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 497                         } else {
 498                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 499                                 break;
 500                         }
 501                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 502
 503                         /* Some macaddr can't do early mode. like
 504                          * multicast/broadcast/no_qos data */
 505                         info = IEEE80211_SKB_CB(skb);
 506                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 507                                 _rtl_update_earlymode_info(hw, skb,
 508                                                            &tcb_desc, tid);
 509
 510                         rtlpriv->intf_ops->adapter_tx(hw, skb, &tcb_desc);
 511                 }
 512         }
 513 }
 514
 515
 516 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 517 {
 518         struct rtl_priv *rtlpriv = rtl_priv(hw);
 519         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 520
 521         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 522
 523         while (skb_queue_len(&ring->queue)) {
 524                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
 525                 struct sk_buff *skb;
 526                 struct ieee80211_tx_info *info;
 527                 __le16 fc;
 528                 u8 tid;
 529
 530                 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
 531                                                           HW_DESC_OWN);
 532
 533                 /*
 534                  *beacon packet will only use the first
 535                  *descriptor defautly,and the own may not
 536                  *be cleared by the hardware
 537                  */
 538                 if (own)
 539                         return;
 540                 ring->idx = (ring->idx + 1) % ring->entries;
 541
 542                 skb = __skb_dequeue(&ring->queue);
 543                 pci_unmap_single(rtlpci->pdev,
 544                                  rtlpriv->cfg->ops->
 545                                              get_desc((u8 *) entry, true,
 546                                                       HW_DESC_TXBUFF_ADDR),
 547                                  skb->len, PCI_DMA_TODEVICE);
 548
 549                 /* remove early mode header */
 550                 if (rtlpriv->rtlhal.earlymode_enable)
 551                         skb_pull(skb, EM_HDR_LEN);
 552
 553                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 554                          ("new ring->idx:%d, "
 555                           "free: skb_queue_len:%d, free: seq:%x\n",
 556                           ring->idx,
 557                           skb_queue_len(&ring->queue),
 558                           *(u16 *) (skb->data + 22)));
 559
 560                 if (prio == TXCMD_QUEUE) {
 561                         dev_kfree_skb(skb);
 562                         goto tx_status_ok;
 563
 564                 }
 565
 566                 /* for sw LPS, just after NULL skb send out, we can
 567                  * sure AP kown we are sleeped, our we should not let
 568                  * rf to sleep*/
 569                 fc = rtl_get_fc(skb);
 570                 if (ieee80211_is_nullfunc(fc)) {
 571                         if (ieee80211_has_pm(fc)) {
 572                                 rtlpriv->mac80211.offchan_delay = true;
 573                                 rtlpriv->psc.state_inap = 1;
 574                         } else {
 575                                 rtlpriv->psc.state_inap = 0;
 576                         }
 577                 }
 578
 579                 /* update tid tx pkt num */
 580                 tid = rtl_get_tid(skb);
 581                 if (tid <= 7)
 582                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 583
 584                 info = IEEE80211_SKB_CB(skb);
 585                 ieee80211_tx_info_clear_status(info);
 586
 587                 info->flags |= IEEE80211_TX_STAT_ACK;
 588                 /*info->status.rates[0].count = 1; */
 589
 590                 ieee80211_tx_status_irqsafe(hw, skb);
 591
 592                 if ((ring->entries - skb_queue_len(&ring->queue))
 593                                 == 2) {
 594
 595                         RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
 596                                         ("more desc left, wake"
 597                                          "skb_queue@%d,ring->idx = %d,"
 598                                          "skb_queue_len = 0x%d\n",
 599                                          prio, ring->idx,
 600                                          skb_queue_len(&ring->queue)));
 601
 602                         ieee80211_wake_queue(hw,
 603                                         skb_get_queue_mapping
 604                                         (skb));
 605                 }
 606 tx_status_ok:
 607                 skb = NULL;
 608         }
 609
 610         if (((rtlpriv->link_info.num_rx_inperiod +
 611                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 612                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 613                 tasklet_schedule(&rtlpriv->works.ips_leave_tasklet);
 614         }
 615 }
 616
 617 static void _rtl_receive_one(struct ieee80211_hw *hw, struct sk_buff *skb,
 618                              struct ieee80211_rx_status rx_status)
 619 {
 620         struct rtl_priv *rtlpriv = rtl_priv(hw);
 621         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
 622         __le16 fc = rtl_get_fc(skb);
 623         bool unicast = false;
 624         struct sk_buff *uskb = NULL;
 625         u8 *pdata;
 626
 627
 628         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 629
 630         if (is_broadcast_ether_addr(hdr->addr1)) {
 631                 ;/*TODO*/
 632         } else if (is_multicast_ether_addr(hdr->addr1)) {
 633                 ;/*TODO*/
 634         } else {
 635                 unicast = true;
 636                 rtlpriv->stats.rxbytesunicast += skb->len;
 637         }
 638
 639         rtl_is_special_data(hw, skb, false);
 640
 641         if (ieee80211_is_data(fc)) {
 642                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 643
 644                 if (unicast)
 645                         rtlpriv->link_info.num_rx_inperiod++;
 646         }
 647
 648         /* for sw lps */
 649         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 650         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 651         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 652             (rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G) &&
 653              (ieee80211_is_beacon(fc) || ieee80211_is_probe_resp(fc)))
 654                 return;
 655
 656         if (unlikely(!rtl_action_proc(hw, skb, false)))
 657                 return;
 658
 659         uskb = dev_alloc_skb(skb->len + 128);
 660         if (!uskb)
 661                 return;         /* exit if allocation failed */
 662         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status, sizeof(rx_status));
 663         pdata = (u8 *)skb_put(uskb, skb->len);
 664         memcpy(pdata, skb->data, skb->len);
 665
 666         ieee80211_rx_irqsafe(hw, uskb);
 667 }
 668
 669 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 670 {
 671         struct rtl_priv *rtlpriv = rtl_priv(hw);
 672         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 673         int rx_queue_idx = RTL_PCI_RX_MPDU_QUEUE;
 674
 675         struct ieee80211_rx_status rx_status = { 0 };
 676         unsigned int count = rtlpci->rxringcount;
 677         u8 own;
 678         u8 tmp_one;
 679         u32 bufferaddress;
 680
 681         struct rtl_stats stats = {
 682                 .signal = 0,
 683                 .noise = -98,
 684                 .rate = 0,
 685         };
 686         int index = rtlpci->rx_ring[rx_queue_idx].idx;
 687
 688         /*RX NORMAL PKT */
 689         while (count--) {
 690                 /*rx descriptor */
 691                 struct rtl_rx_desc *pdesc = &rtlpci->rx_ring[rx_queue_idx].desc[
 692                                 index];
 693                 /*rx pkt */
 694                 struct sk_buff *skb = rtlpci->rx_ring[rx_queue_idx].rx_buf[
 695                                 index];
 696                 struct sk_buff *new_skb = NULL;
 697
 698                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
 699                                                        false, HW_DESC_OWN);
 700
 701                 /*wait data to be filled by hardware */
 702                 if (own)
 703                         break;
 704
 705                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 706                                                  &rx_status,
 707                                                  (u8 *) pdesc, skb);
 708
 709                 if (stats.crc || stats.hwerror)
 710                         goto done;
 711
 712                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 713                 if (unlikely(!new_skb)) {
 714                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV),
 715                                  DBG_DMESG,
 716                                  ("can't alloc skb for rx\n"));
 717                         goto done;
 718                 }
 719
 720                 pci_unmap_single(rtlpci->pdev,
 721                                  *((dma_addr_t *) skb->cb),
 722                                  rtlpci->rxbuffersize,
 723                                  PCI_DMA_FROMDEVICE);
 724
 725                 skb_put(skb, rtlpriv->cfg->ops->get_desc((u8 *) pdesc, false,
 726                         HW_DESC_RXPKT_LEN));
 727                 skb_reserve(skb, stats.rx_drvinfo_size + stats.rx_bufshift);
 728
 729                 /*
 730                  * NOTICE This can not be use for mac80211,
 731                  * this is done in mac80211 code,
 732                  * if you done here sec DHCP will fail
 733                  * skb_trim(skb, skb->len - 4);
 734                  */
 735
 736                 _rtl_receive_one(hw, skb, rx_status);
 737
 738                 if (((rtlpriv->link_info.num_rx_inperiod +
 739                         rtlpriv->link_info.num_tx_inperiod) > 8) ||
 740                         (rtlpriv->link_info.num_rx_inperiod > 2)) {
 741                         tasklet_schedule(&rtlpriv->works.ips_leave_tasklet);
 742                 }
 743
 744                 dev_kfree_skb_any(skb);
 745                 skb = new_skb;
 746
 747                 rtlpci->rx_ring[rx_queue_idx].rx_buf[index] = skb;
 748                 *((dma_addr_t *) skb->cb) =
 749                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 750                                            rtlpci->rxbuffersize,
 751                                            PCI_DMA_FROMDEVICE);
 752
 753 done:
 754                 bufferaddress = (*((dma_addr_t *)skb->cb));
 755                 tmp_one = 1;
 756                 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
 757                                             HW_DESC_RXBUFF_ADDR,
 758                                             (u8 *)&bufferaddress);
 759                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 760                                             HW_DESC_RXPKT_LEN,
 761                                             (u8 *)&rtlpci->rxbuffersize);
 762
 763                 if (index == rtlpci->rxringcount - 1)
 764                         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 765                                                     HW_DESC_RXERO,
 766                                                     (u8 *)&tmp_one);
 767
 768                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
 769                                             (u8 *)&tmp_one);
 770
 771                 index = (index + 1) % rtlpci->rxringcount;
 772         }
 773
 774         rtlpci->rx_ring[rx_queue_idx].idx = index;
 775 }
 776
 777 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 778 {
 779         struct ieee80211_hw *hw = dev_id;
 780         struct rtl_priv *rtlpriv = rtl_priv(hw);
 781         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 782         unsigned long flags;
 783         u32 inta = 0;
 784         u32 intb = 0;
 785
 786         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 787
 788         /*read ISR: 4/8bytes */
 789         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 790
 791         /*Shared IRQ or HW disappared */
 792         if (!inta || inta == 0xffff)
 793                 goto done;
 794
 795         /*<1> beacon related */
 796         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 797                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 798                          ("beacon ok interrupt!\n"));
 799         }
 800
 801         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 802                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 803                          ("beacon err interrupt!\n"));
 804         }
 805
 806         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 807                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 808                          ("beacon interrupt!\n"));
 809         }
 810
 811         if (inta & rtlpriv->cfg->maps[RTL_IMR_BcnInt]) {
 812                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 813                          ("prepare beacon for interrupt!\n"));
 814                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 815         }
 816
 817         /*<3> Tx related */
 818         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 819                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("IMR_TXFOVW!\n"));
 820
 821         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 822                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 823                          ("Manage ok interrupt!\n"));
 824                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 825         }
 826
 827         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 828                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 829                          ("HIGH_QUEUE ok interrupt!\n"));
 830                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 831         }
 832
 833         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 834                 rtlpriv->link_info.num_tx_inperiod++;
 835
 836                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 837                          ("BK Tx OK interrupt!\n"));
 838                 _rtl_pci_tx_isr(hw, BK_QUEUE);
 839         }
 840
 841         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
 842                 rtlpriv->link_info.num_tx_inperiod++;
 843
 844                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 845                          ("BE TX OK interrupt!\n"));
 846                 _rtl_pci_tx_isr(hw, BE_QUEUE);
 847         }
 848
 849         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
 850                 rtlpriv->link_info.num_tx_inperiod++;
 851
 852                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 853                          ("VI TX OK interrupt!\n"));
 854                 _rtl_pci_tx_isr(hw, VI_QUEUE);
 855         }
 856
 857         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
 858                 rtlpriv->link_info.num_tx_inperiod++;
 859
 860                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 861                          ("Vo TX OK interrupt!\n"));
 862                 _rtl_pci_tx_isr(hw, VO_QUEUE);
 863         }
 864
 865         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
 866                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
 867                         rtlpriv->link_info.num_tx_inperiod++;
 868
 869                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 870                                         ("CMD TX OK interrupt!\n"));
 871                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
 872                 }
 873         }
 874
 875         /*<2> Rx related */
 876         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
 877                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, ("Rx ok interrupt!\n"));
 878                 _rtl_pci_rx_interrupt(hw);
 879         }
 880
 881         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
 882                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 883                          ("rx descriptor unavailable!\n"));
 884                 _rtl_pci_rx_interrupt(hw);
 885         }
 886
 887         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
 888                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("rx overflow !\n"));
 889                 _rtl_pci_rx_interrupt(hw);
 890         }
 891
 892         if (rtlpriv->rtlhal.earlymode_enable)
 893                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
 894
 895         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 896         return IRQ_HANDLED;
 897
 898 done:
 899         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 900         return IRQ_HANDLED;
 901 }
 902
 903 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
 904 {
 905         _rtl_pci_tx_chk_waitq(hw);
 906 }
 907
 908 static void _rtl_pci_ips_leave_tasklet(struct ieee80211_hw *hw)
 909 {
 910         rtl_lps_leave(hw);
 911 }
 912
 913 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
 914 {
 915         struct rtl_priv *rtlpriv = rtl_priv(hw);
 916         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 917         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 918         struct rtl8192_tx_ring *ring = NULL;
 919         struct ieee80211_hdr *hdr = NULL;
 920         struct ieee80211_tx_info *info = NULL;
 921         struct sk_buff *pskb = NULL;
 922         struct rtl_tx_desc *pdesc = NULL;
 923         struct rtl_tcb_desc tcb_desc;
 924         u8 temp_one = 1;
 925
 926         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 927         ring = &rtlpci->tx_ring[BEACON_QUEUE];
 928         pskb = __skb_dequeue(&ring->queue);
 929         if (pskb) {
 930                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
 931                 pci_unmap_single(rtlpci->pdev, rtlpriv->cfg->ops->get_desc(
 932                                  (u8 *) entry, true, HW_DESC_TXBUFF_ADDR),
 933                                  pskb->len, PCI_DMA_TODEVICE);
 934                 kfree_skb(pskb);
 935         }
 936
 937         /*NB: the beacon data buffer must be 32-bit aligned. */
 938         pskb = ieee80211_beacon_get(hw, mac->vif);
 939         if (pskb == NULL)
 940                 return;
 941         hdr = rtl_get_hdr(pskb);
 942         info = IEEE80211_SKB_CB(pskb);
 943         pdesc = &ring->desc[0];
 944         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
 945                 info, pskb, BEACON_QUEUE, &tcb_desc);
 946
 947         __skb_queue_tail(&ring->queue, pskb);
 948
 949         rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
 950                                     (u8 *)&temp_one);
 951
 952         return;
 953 }
 954
 955 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
 956 {
 957         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 958         u8 i;
 959
 960         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
 961                 rtlpci->txringcount[i] = RT_TXDESC_NUM;
 962
 963         /*
 964          *we just alloc 2 desc for beacon queue,
 965          *because we just need first desc in hw beacon.
 966          */
 967         rtlpci->txringcount[BEACON_QUEUE] = 2;
 968
 969         /*
 970          *BE queue need more descriptor for performance
 971          *consideration or, No more tx desc will happen,
 972          *and may cause mac80211 mem leakage.
 973          */
 974         rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
 975
 976         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
 977         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
 978 }
 979
 980 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
 981                 struct pci_dev *pdev)
 982 {
 983         struct rtl_priv *rtlpriv = rtl_priv(hw);
 984         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 985         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 986         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 987
 988         rtlpci->up_first_time = true;
 989         rtlpci->being_init_adapter = false;
 990
 991         rtlhal->hw = hw;
 992         rtlpci->pdev = pdev;
 993
 994         /*Tx/Rx related var */
 995         _rtl_pci_init_trx_var(hw);
 996
 997         /*IBSS*/ mac->beacon_interval = 100;
 998
 999         /*AMPDU*/
1000         mac->min_space_cfg = 0;
1001         mac->max_mss_density = 0;
1002         /*set sane AMPDU defaults */
1003         mac->current_ampdu_density = 7;
1004         mac->current_ampdu_factor = 3;
1005
1006         /*QOS*/
1007         rtlpci->acm_method = eAcmWay2_SW;
1008
1009         /*task */
1010         tasklet_init(&rtlpriv->works.irq_tasklet,
1011                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1012                      (unsigned long)hw);
1013         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1014                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1015                      (unsigned long)hw);
1016         tasklet_init(&rtlpriv->works.ips_leave_tasklet,
1017                      (void (*)(unsigned long))_rtl_pci_ips_leave_tasklet,
1018                      (unsigned long)hw);
1019 }
1020
1021 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1022                                  unsigned int prio, unsigned int entries)
1023 {
1024         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1025         struct rtl_priv *rtlpriv = rtl_priv(hw);
1026         struct rtl_tx_desc *ring;
1027         dma_addr_t dma;
1028         u32 nextdescaddress;
1029         int i;
1030
1031         ring = pci_alloc_consistent(rtlpci->pdev,
1032                                     sizeof(*ring) * entries, &dma);
1033
1034         if (!ring || (unsigned long)ring & 0xFF) {
1035                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1036                          ("Cannot allocate TX ring (prio = %d)\n", prio));
1037                 return -ENOMEM;
1038         }
1039
1040         memset(ring, 0, sizeof(*ring) * entries);
1041         rtlpci->tx_ring[prio].desc = ring;
1042         rtlpci->tx_ring[prio].dma = dma;
1043         rtlpci->tx_ring[prio].idx = 0;
1044         rtlpci->tx_ring[prio].entries = entries;
1045         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1046
1047         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1048                  ("queue:%d, ring_addr:%p\n", prio, ring));
1049
1050         for (i = 0; i < entries; i++) {
1051                 nextdescaddress = (u32) dma +
1052                                               ((i + 1) % entries) *
1053                                               sizeof(*ring);
1054
1055                 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
1056                                             true, HW_DESC_TX_NEXTDESC_ADDR,
1057                                             (u8 *)&nextdescaddress);
1058         }
1059
1060         return 0;
1061 }
1062
1063 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1064 {
1065         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1066         struct rtl_priv *rtlpriv = rtl_priv(hw);
1067         struct rtl_rx_desc *entry = NULL;
1068         int i, rx_queue_idx;
1069         u8 tmp_one = 1;
1070
1071         /*
1072          *rx_queue_idx 0:RX_MPDU_QUEUE
1073          *rx_queue_idx 1:RX_CMD_QUEUE
1074          */
1075         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1076              rx_queue_idx++) {
1077                 rtlpci->rx_ring[rx_queue_idx].desc =
1078                     pci_alloc_consistent(rtlpci->pdev,
1079                                          sizeof(*rtlpci->rx_ring[rx_queue_idx].
1080                                                 desc) * rtlpci->rxringcount,
1081                                          &rtlpci->rx_ring[rx_queue_idx].dma);
1082
1083                 if (!rtlpci->rx_ring[rx_queue_idx].desc ||
1084                     (unsigned long)rtlpci->rx_ring[rx_queue_idx].desc & 0xFF) {
1085                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1086                                  ("Cannot allocate RX ring\n"));
1087                         return -ENOMEM;
1088                 }
1089
1090                 memset(rtlpci->rx_ring[rx_queue_idx].desc, 0,
1091                        sizeof(*rtlpci->rx_ring[rx_queue_idx].desc) *
1092                        rtlpci->rxringcount);
1093
1094                 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1095
1096                 /* If amsdu_8k is disabled, set buffersize to 4096. This
1097                  * change will reduce memory fragmentation.
1098                  */
1099                 if (rtlpci->rxbuffersize > 4096 &&
1100                     rtlpriv->rtlhal.disable_amsdu_8k)
1101                         rtlpci->rxbuffersize = 4096;
1102
1103                 for (i = 0; i < rtlpci->rxringcount; i++) {
1104                         struct sk_buff *skb =
1105                             dev_alloc_skb(rtlpci->rxbuffersize);
1106                         u32 bufferaddress;
1107                         if (!skb)
1108                                 return 0;
1109                         entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1110
1111                         /*skb->dev = dev; */
1112
1113                         rtlpci->rx_ring[rx_queue_idx].rx_buf[i] = skb;
1114
1115                         /*
1116                          *just set skb->cb to mapping addr
1117                          *for pci_unmap_single use
1118                          */
1119                         *((dma_addr_t *) skb->cb) =
1120                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
1121                                            rtlpci->rxbuffersize,
1122                                            PCI_DMA_FROMDEVICE);
1123
1124                         bufferaddress = (*((dma_addr_t *)skb->cb));
1125                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1126                                                     HW_DESC_RXBUFF_ADDR,
1127                                                     (u8 *)&bufferaddress);
1128                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1129                                                     HW_DESC_RXPKT_LEN,
1130                                                     (u8 *)&rtlpci->
1131                                                     rxbuffersize);
1132                         rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1133                                                     HW_DESC_RXOWN,
1134                                                     (u8 *)&tmp_one);
1135                 }
1136
1137                 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1138                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1139         }
1140         return 0;
1141 }
1142
1143 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1144                 unsigned int prio)
1145 {
1146         struct rtl_priv *rtlpriv = rtl_priv(hw);
1147         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1148         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1149
1150         while (skb_queue_len(&ring->queue)) {
1151                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
1152                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1153
1154                 pci_unmap_single(rtlpci->pdev,
1155                                  rtlpriv->cfg->
1156                                              ops->get_desc((u8 *) entry, true,
1157                                                    HW_DESC_TXBUFF_ADDR),
1158                                  skb->len, PCI_DMA_TODEVICE);
1159                 kfree_skb(skb);
1160                 ring->idx = (ring->idx + 1) % ring->entries;
1161         }
1162
1163         if (ring->desc) {
1164                 pci_free_consistent(rtlpci->pdev,
1165                                     sizeof(*ring->desc) * ring->entries,
1166                                     ring->desc, ring->dma);
1167                 ring->desc = NULL;
1168         }
1169 }
1170
1171 static void _rtl_pci_free_rx_ring(struct rtl_pci *rtlpci)
1172 {
1173         int i, rx_queue_idx;
1174
1175         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1176         /*rx_queue_idx 1:RX_CMD_QUEUE */
1177         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1178              rx_queue_idx++) {
1179                 for (i = 0; i < rtlpci->rxringcount; i++) {
1180                         struct sk_buff *skb =
1181                             rtlpci->rx_ring[rx_queue_idx].rx_buf[i];
1182                         if (!skb)
1183                                 continue;
1184
1185                         pci_unmap_single(rtlpci->pdev,
1186                                          *((dma_addr_t *) skb->cb),
1187                                          rtlpci->rxbuffersize,
1188                                          PCI_DMA_FROMDEVICE);
1189                         kfree_skb(skb);
1190                 }
1191
1192                 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1193                         pci_free_consistent(rtlpci->pdev,
1194                                     sizeof(*rtlpci->rx_ring[rx_queue_idx].
1195                                            desc) * rtlpci->rxringcount,
1196                                     rtlpci->rx_ring[rx_queue_idx].desc,
1197                                     rtlpci->rx_ring[rx_queue_idx].dma);
1198                         rtlpci->rx_ring[rx_queue_idx].desc = NULL;
1199                 }
1200         }
1201 }
1202
1203 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1204 {
1205         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1206         int ret;
1207         int i;
1208
1209         ret = _rtl_pci_init_rx_ring(hw);
1210         if (ret)
1211                 return ret;
1212
1213         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1214                 ret = _rtl_pci_init_tx_ring(hw, i,
1215                                  rtlpci->txringcount[i]);
1216                 if (ret)
1217                         goto err_free_rings;
1218         }
1219
1220         return 0;
1221
1222 err_free_rings:
1223         _rtl_pci_free_rx_ring(rtlpci);
1224
1225         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1226                 if (rtlpci->tx_ring[i].desc)
1227                         _rtl_pci_free_tx_ring(hw, i);
1228
1229         return 1;
1230 }
1231
1232 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1233 {
1234         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1235         u32 i;
1236
1237         /*free rx rings */
1238         _rtl_pci_free_rx_ring(rtlpci);
1239
1240         /*free tx rings */
1241         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1242                 _rtl_pci_free_tx_ring(hw, i);
1243
1244         return 0;
1245 }
1246
1247 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1248 {
1249         struct rtl_priv *rtlpriv = rtl_priv(hw);
1250         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1251         int i, rx_queue_idx;
1252         unsigned long flags;
1253         u8 tmp_one = 1;
1254
1255         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1256         /*rx_queue_idx 1:RX_CMD_QUEUE */
1257         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1258              rx_queue_idx++) {
1259                 /*
1260                  *force the rx_ring[RX_MPDU_QUEUE/
1261                  *RX_CMD_QUEUE].idx to the first one
1262                  */
1263                 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1264                         struct rtl_rx_desc *entry = NULL;
1265
1266                         for (i = 0; i < rtlpci->rxringcount; i++) {
1267                                 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1268                                 rtlpriv->cfg->ops->set_desc((u8 *) entry,
1269                                                             false,
1270                                                             HW_DESC_RXOWN,
1271                                                             (u8 *)&tmp_one);
1272                         }
1273                         rtlpci->rx_ring[rx_queue_idx].idx = 0;
1274                 }
1275         }
1276
1277         /*
1278          *after reset, release previous pending packet,
1279          *and force the  tx idx to the first one
1280          */
1281         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1282         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1283                 if (rtlpci->tx_ring[i].desc) {
1284                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1285
1286                         while (skb_queue_len(&ring->queue)) {
1287                                 struct rtl_tx_desc *entry =
1288                                     &ring->desc[ring->idx];
1289                                 struct sk_buff *skb =
1290                                     __skb_dequeue(&ring->queue);
1291
1292                                 pci_unmap_single(rtlpci->pdev,
1293                                                  rtlpriv->cfg->ops->
1294                                                          get_desc((u8 *)
1295                                                          entry,
1296                                                          true,
1297                                                          HW_DESC_TXBUFF_ADDR),
1298                                                  skb->len, PCI_DMA_TODEVICE);
1299                                 kfree_skb(skb);
1300                                 ring->idx = (ring->idx + 1) % ring->entries;
1301                         }
1302                         ring->idx = 0;
1303                 }
1304         }
1305
1306         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1307
1308         return 0;
1309 }
1310
1311 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1312                                         struct sk_buff *skb)
1313 {
1314         struct rtl_priv *rtlpriv = rtl_priv(hw);
1315         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1316         struct ieee80211_sta *sta = info->control.sta;
1317         struct rtl_sta_info *sta_entry = NULL;
1318         u8 tid = rtl_get_tid(skb);
1319
1320         if (!sta)
1321                 return false;
1322         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1323
1324         if (!rtlpriv->rtlhal.earlymode_enable)
1325                 return false;
1326         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1327                 return false;
1328         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1329                 return false;
1330         if (tid > 7)
1331                 return false;
1332
1333         /* maybe every tid should be checked */
1334         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1335                 return false;
1336
1337         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1338         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1339         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1340
1341         return true;
1342 }
1343
1344 static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
1345                 struct rtl_tcb_desc *ptcb_desc)
1346 {
1347         struct rtl_priv *rtlpriv = rtl_priv(hw);
1348         struct rtl_sta_info *sta_entry = NULL;
1349         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1350         struct ieee80211_sta *sta = info->control.sta;
1351         struct rtl8192_tx_ring *ring;
1352         struct rtl_tx_desc *pdesc;
1353         u8 idx;
1354         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1355         unsigned long flags;
1356         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1357         __le16 fc = rtl_get_fc(skb);
1358         u8 *pda_addr = hdr->addr1;
1359         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1360         /*ssn */
1361         u8 tid = 0;
1362         u16 seq_number = 0;
1363         u8 own;
1364         u8 temp_one = 1;
1365
1366         if (ieee80211_is_auth(fc)) {
1367                 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
1368                 rtl_ips_nic_on(hw);
1369         }
1370
1371         if (rtlpriv->psc.sw_ps_enabled) {
1372                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1373                         !ieee80211_has_pm(fc))
1374                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1375         }
1376
1377         rtl_action_proc(hw, skb, true);
1378
1379         if (is_multicast_ether_addr(pda_addr))
1380                 rtlpriv->stats.txbytesmulticast += skb->len;
1381         else if (is_broadcast_ether_addr(pda_addr))
1382                 rtlpriv->stats.txbytesbroadcast += skb->len;
1383         else
1384                 rtlpriv->stats.txbytesunicast += skb->len;
1385
1386         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1387         ring = &rtlpci->tx_ring[hw_queue];
1388         if (hw_queue != BEACON_QUEUE)
1389                 idx = (ring->idx + skb_queue_len(&ring->queue)) %
1390                                 ring->entries;
1391         else
1392                 idx = 0;
1393
1394         pdesc = &ring->desc[idx];
1395         own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
1396                         true, HW_DESC_OWN);
1397
1398         if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1399                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1400                          ("No more TX desc@%d, ring->idx = %d,"
1401                           "idx = %d, skb_queue_len = 0x%d\n",
1402                           hw_queue, ring->idx, idx,
1403                           skb_queue_len(&ring->queue)));
1404
1405                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1406                 return skb->len;
1407         }
1408
1409         if (ieee80211_is_data_qos(fc)) {
1410                 tid = rtl_get_tid(skb);
1411                 if (sta) {
1412                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1413                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1414                                       IEEE80211_SCTL_SEQ) >> 4;
1415                         seq_number += 1;
1416
1417                         if (!ieee80211_has_morefrags(hdr->frame_control))
1418                                 sta_entry->tids[tid].seq_number = seq_number;
1419                 }
1420         }
1421
1422         if (ieee80211_is_data(fc))
1423                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1424
1425         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1426                         info, skb, hw_queue, ptcb_desc);
1427
1428         __skb_queue_tail(&ring->queue, skb);
1429
1430         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
1431                                     HW_DESC_OWN, (u8 *)&temp_one);
1432
1433
1434         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1435             hw_queue != BEACON_QUEUE) {
1436
1437                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1438                          ("less desc left, stop skb_queue@%d, "
1439                           "ring->idx = %d,"
1440                           "idx = %d, skb_queue_len = 0x%d\n",
1441                           hw_queue, ring->idx, idx,
1442                           skb_queue_len(&ring->queue)));
1443
1444                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1445         }
1446
1447         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1448
1449         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1450
1451         return 0;
1452 }
1453
1454 static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1455 {
1456         struct rtl_priv *rtlpriv = rtl_priv(hw);
1457         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1458         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1459         u16 i = 0;
1460         int queue_id;
1461         struct rtl8192_tx_ring *ring;
1462
1463         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1464                 u32 queue_len;
1465                 ring = &pcipriv->dev.tx_ring[queue_id];
1466                 queue_len = skb_queue_len(&ring->queue);
1467                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1468                         queue_id == TXCMD_QUEUE) {
1469                         queue_id--;
1470                         continue;
1471                 } else {
1472                         msleep(20);
1473                         i++;
1474                 }
1475
1476                 /* we just wait 1s for all queues */
1477                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1478                         is_hal_stop(rtlhal) || i >= 200)
1479                         return;
1480         }
1481 }
1482
1483 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1484 {
1485         struct rtl_priv *rtlpriv = rtl_priv(hw);
1486         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1487
1488         _rtl_pci_deinit_trx_ring(hw);
1489
1490         synchronize_irq(rtlpci->pdev->irq);
1491         tasklet_kill(&rtlpriv->works.irq_tasklet);
1492         tasklet_kill(&rtlpriv->works.ips_leave_tasklet);
1493
1494         flush_workqueue(rtlpriv->works.rtl_wq);
1495         destroy_workqueue(rtlpriv->works.rtl_wq);
1496
1497 }
1498
1499 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1500 {
1501         struct rtl_priv *rtlpriv = rtl_priv(hw);
1502         int err;
1503
1504         _rtl_pci_init_struct(hw, pdev);
1505
1506         err = _rtl_pci_init_trx_ring(hw);
1507         if (err) {
1508                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1509                          ("tx ring initialization failed"));
1510                 return err;
1511         }
1512
1513         return 1;
1514 }
1515
1516 static int rtl_pci_start(struct ieee80211_hw *hw)
1517 {
1518         struct rtl_priv *rtlpriv = rtl_priv(hw);
1519         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1520         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1521         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1522
1523         int err;
1524
1525         rtl_pci_reset_trx_ring(hw);
1526
1527         rtlpci->driver_is_goingto_unload = false;
1528         err = rtlpriv->cfg->ops->hw_init(hw);
1529         if (err) {
1530                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1531                          ("Failed to config hardware!\n"));
1532                 return err;
1533         }
1534
1535         rtlpriv->cfg->ops->enable_interrupt(hw);
1536         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("enable_interrupt OK\n"));
1537
1538         rtl_init_rx_config(hw);
1539
1540         /*should be after adapter start and interrupt enable. */
1541         set_hal_start(rtlhal);
1542
1543         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1544
1545         rtlpci->up_first_time = false;
1546
1547         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("OK\n"));
1548         return 0;
1549 }
1550
1551 static void rtl_pci_stop(struct ieee80211_hw *hw)
1552 {
1553         struct rtl_priv *rtlpriv = rtl_priv(hw);
1554         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1555         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1556         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1557         unsigned long flags;
1558         u8 RFInProgressTimeOut = 0;
1559
1560         /*
1561          *should be before disable interrupt&adapter
1562          *and will do it immediately.
1563          */
1564         set_hal_stop(rtlhal);
1565
1566         rtlpriv->cfg->ops->disable_interrupt(hw);
1567         tasklet_kill(&rtlpriv->works.ips_leave_tasklet);
1568
1569         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1570         while (ppsc->rfchange_inprogress) {
1571                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1572                 if (RFInProgressTimeOut > 100) {
1573                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1574                         break;
1575                 }
1576                 mdelay(1);
1577                 RFInProgressTimeOut++;
1578                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1579         }
1580         ppsc->rfchange_inprogress = true;
1581         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1582
1583         rtlpci->driver_is_goingto_unload = true;
1584         rtlpriv->cfg->ops->hw_disable(hw);
1585         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1586
1587         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1588         ppsc->rfchange_inprogress = false;
1589         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1590
1591         rtl_pci_enable_aspm(hw);
1592 }
1593
1594 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1595                 struct ieee80211_hw *hw)
1596 {
1597         struct rtl_priv *rtlpriv = rtl_priv(hw);
1598         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1599         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1600         struct pci_dev *bridge_pdev = pdev->bus->self;
1601         u16 venderid;
1602         u16 deviceid;
1603         u8 revisionid;
1604         u16 irqline;
1605         u8 tmp;
1606
1607         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1608         venderid = pdev->vendor;
1609         deviceid = pdev->device;
1610         pci_read_config_byte(pdev, 0x8, &revisionid);
1611         pci_read_config_word(pdev, 0x3C, &irqline);
1612
1613         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1614          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1615          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1616          * the correct driver is r8192e_pci, thus this routine should
1617          * return false.
1618          */
1619         if (deviceid == RTL_PCI_8192SE_DID &&
1620             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1621                 return false;
1622
1623         if (deviceid == RTL_PCI_8192_DID ||
1624             deviceid == RTL_PCI_0044_DID ||
1625             deviceid == RTL_PCI_0047_DID ||
1626             deviceid == RTL_PCI_8192SE_DID ||
1627             deviceid == RTL_PCI_8174_DID ||
1628             deviceid == RTL_PCI_8173_DID ||
1629             deviceid == RTL_PCI_8172_DID ||
1630             deviceid == RTL_PCI_8171_DID) {
1631                 switch (revisionid) {
1632                 case RTL_PCI_REVISION_ID_8192PCIE:
1633                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1634                                  ("8192 PCI-E is found - "
1635                                   "vid/did=%x/%x\n", venderid, deviceid));
1636                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1637                         break;
1638                 case RTL_PCI_REVISION_ID_8192SE:
1639                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1640                                  ("8192SE is found - "
1641                                   "vid/did=%x/%x\n", venderid, deviceid));
1642                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1643                         break;
1644                 default:
1645                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1646                                  ("Err: Unknown device - "
1647                                   "vid/did=%x/%x\n", venderid, deviceid));
1648                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1649                         break;
1650
1651                 }
1652         } else if (deviceid == RTL_PCI_8192CET_DID ||
1653                    deviceid == RTL_PCI_8192CE_DID ||
1654                    deviceid == RTL_PCI_8191CE_DID ||
1655                    deviceid == RTL_PCI_8188CE_DID) {
1656                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1657                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1658                          ("8192C PCI-E is found - "
1659                           "vid/did=%x/%x\n", venderid, deviceid));
1660         } else if (deviceid == RTL_PCI_8192DE_DID ||
1661                    deviceid == RTL_PCI_8192DE_DID2) {
1662                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1663                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1664                          ("8192D PCI-E is found - "
1665                           "vid/did=%x/%x\n", venderid, deviceid));
1666         } else {
1667                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1668                          ("Err: Unknown device -"
1669                           " vid/did=%x/%x\n", venderid, deviceid));
1670
1671                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1672         }
1673
1674         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1675                 if (revisionid == 0 || revisionid == 1) {
1676                         if (revisionid == 0) {
1677                                 RT_TRACE(rtlpriv, COMP_INIT,
1678                                          DBG_LOUD, ("Find 92DE MAC0.\n"));
1679                                 rtlhal->interfaceindex = 0;
1680                         } else if (revisionid == 1) {
1681                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1682                                         ("Find 92DE MAC1.\n"));
1683                                 rtlhal->interfaceindex = 1;
1684                         }
1685                 } else {
1686                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1687                                 ("Unknown device - "
1688                                 "VendorID/DeviceID=%x/%x, Revision=%x\n",
1689                                 venderid, deviceid, revisionid));
1690                         rtlhal->interfaceindex = 0;
1691                 }
1692         }
1693         /*find bus info */
1694         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
1695         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
1696         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
1697
1698         if (bridge_pdev) {
1699                 /*find bridge info if available */
1700                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
1701                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
1702                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
1703                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
1704                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1705                                          ("Pci Bridge Vendor is found index:"
1706                                          " %d\n", tmp));
1707                                 break;
1708                         }
1709                 }
1710         }
1711
1712         if (pcipriv->ndis_adapter.pcibridge_vendor !=
1713                 PCI_BRIDGE_VENDOR_UNKNOWN) {
1714                 pcipriv->ndis_adapter.pcibridge_busnum =
1715                     bridge_pdev->bus->number;
1716                 pcipriv->ndis_adapter.pcibridge_devnum =
1717                     PCI_SLOT(bridge_pdev->devfn);
1718                 pcipriv->ndis_adapter.pcibridge_funcnum =
1719                     PCI_FUNC(bridge_pdev->devfn);
1720                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1721                     pci_pcie_cap(bridge_pdev);
1722                 pcipriv->ndis_adapter.num4bytes =
1723                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
1724
1725                 rtl_pci_get_linkcontrol_field(hw);
1726
1727                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
1728                     PCI_BRIDGE_VENDOR_AMD) {
1729                         pcipriv->ndis_adapter.amd_l1_patch =
1730                             rtl_pci_get_amd_l1_patch(hw);
1731                 }
1732         }
1733
1734         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1735                  ("pcidev busnumber:devnumber:funcnumber:"
1736                   "vendor:link_ctl %d:%d:%d:%x:%x\n",
1737                   pcipriv->ndis_adapter.busnumber,
1738                   pcipriv->ndis_adapter.devnumber,
1739                   pcipriv->ndis_adapter.funcnumber,
1740                   pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg));
1741
1742         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1743                  ("pci_bridge busnumber:devnumber:funcnumber:vendor:"
1744                   "pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
1745                   pcipriv->ndis_adapter.pcibridge_busnum,
1746                   pcipriv->ndis_adapter.pcibridge_devnum,
1747                   pcipriv->ndis_adapter.pcibridge_funcnum,
1748                   pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
1749                   pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
1750                   pcipriv->ndis_adapter.pcibridge_linkctrlreg,
1751                   pcipriv->ndis_adapter.amd_l1_patch));
1752
1753         rtl_pci_parse_configuration(pdev, hw);
1754
1755         return true;
1756 }
1757
1758 int __devinit rtl_pci_probe(struct pci_dev *pdev,
1759                             const struct pci_device_id *id)
1760 {
1761         struct ieee80211_hw *hw = NULL;
1762
1763         struct rtl_priv *rtlpriv = NULL;
1764         struct rtl_pci_priv *pcipriv = NULL;
1765         struct rtl_pci *rtlpci;
1766         unsigned long pmem_start, pmem_len, pmem_flags;
1767         int err;
1768
1769         err = pci_enable_device(pdev);
1770         if (err) {
1771                 RT_ASSERT(false,
1772                           ("%s : Cannot enable new PCI device\n",
1773                            pci_name(pdev)));
1774                 return err;
1775         }
1776
1777         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1778                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1779                         RT_ASSERT(false, ("Unable to obtain 32bit DMA "
1780                                           "for consistent allocations\n"));
1781                         pci_disable_device(pdev);
1782                         return -ENOMEM;
1783                 }
1784         }
1785
1786         pci_set_master(pdev);
1787
1788         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
1789                                 sizeof(struct rtl_priv), &rtl_ops);
1790         if (!hw) {
1791                 RT_ASSERT(false,
1792                           ("%s : ieee80211 alloc failed\n", pci_name(pdev)));
1793                 err = -ENOMEM;
1794                 goto fail1;
1795         }
1796
1797         SET_IEEE80211_DEV(hw, &pdev->dev);
1798         pci_set_drvdata(pdev, hw);
1799
1800         rtlpriv = hw->priv;
1801         pcipriv = (void *)rtlpriv->priv;
1802         pcipriv->dev.pdev = pdev;
1803
1804         /* init cfg & intf_ops */
1805         rtlpriv->rtlhal.interface = INTF_PCI;
1806         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1807         rtlpriv->intf_ops = &rtl_pci_ops;
1808
1809         /*
1810          *init dbgp flags before all
1811          *other functions, because we will
1812          *use it in other funtions like
1813          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
1814          *you can not use these macro
1815          *before this
1816          */
1817         rtl_dbgp_flag_init(hw);
1818
1819         /* MEM map */
1820         err = pci_request_regions(pdev, KBUILD_MODNAME);
1821         if (err) {
1822                 RT_ASSERT(false, ("Can't obtain PCI resources\n"));
1823                 return err;
1824         }
1825
1826         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
1827         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
1828         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
1829
1830         /*shared mem start */
1831         rtlpriv->io.pci_mem_start =
1832                         (unsigned long)pci_iomap(pdev,
1833                         rtlpriv->cfg->bar_id, pmem_len);
1834         if (rtlpriv->io.pci_mem_start == 0) {
1835                 RT_ASSERT(false, ("Can't map PCI mem\n"));
1836                 goto fail2;
1837         }
1838
1839         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1840                  ("mem mapped space: start: 0x%08lx len:%08lx "
1841                   "flags:%08lx, after map:0x%08lx\n",
1842                   pmem_start, pmem_len, pmem_flags,
1843                   rtlpriv->io.pci_mem_start));
1844
1845         /* Disable Clk Request */
1846         pci_write_config_byte(pdev, 0x81, 0);
1847         /* leave D3 mode */
1848         pci_write_config_byte(pdev, 0x44, 0);
1849         pci_write_config_byte(pdev, 0x04, 0x06);
1850         pci_write_config_byte(pdev, 0x04, 0x07);
1851
1852         /* find adapter */
1853         if (!_rtl_pci_find_adapter(pdev, hw))
1854                 goto fail3;
1855
1856         /* Init IO handler */
1857         _rtl_pci_io_handler_init(&pdev->dev, hw);
1858
1859         /*like read eeprom and so on */
1860         rtlpriv->cfg->ops->read_eeprom_info(hw);
1861
1862         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
1863                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1864                          ("Can't init_sw_vars.\n"));
1865                 goto fail3;
1866         }
1867
1868         rtlpriv->cfg->ops->init_sw_leds(hw);
1869
1870         /*aspm */
1871         rtl_pci_init_aspm(hw);
1872
1873         /* Init mac80211 sw */
1874         err = rtl_init_core(hw);
1875         if (err) {
1876                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1877                          ("Can't allocate sw for mac80211.\n"));
1878                 goto fail3;
1879         }
1880
1881         /* Init PCI sw */
1882         err = !rtl_pci_init(hw, pdev);
1883         if (err) {
1884                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1885                          ("Failed to init PCI.\n"));
1886                 goto fail3;
1887         }
1888
1889         err = ieee80211_register_hw(hw);
1890         if (err) {
1891                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1892                          ("Can't register mac80211 hw.\n"));
1893                 goto fail3;
1894         } else {
1895                 rtlpriv->mac80211.mac80211_registered = 1;
1896         }
1897
1898         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
1899         if (err) {
1900                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1901                          ("failed to create sysfs device attributes\n"));
1902                 goto fail3;
1903         }
1904
1905         /*init rfkill */
1906         rtl_init_rfkill(hw);
1907
1908         rtlpci = rtl_pcidev(pcipriv);
1909         err = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
1910                           IRQF_SHARED, KBUILD_MODNAME, hw);
1911         if (err) {
1912                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1913                          ("%s: failed to register IRQ handler\n",
1914                           wiphy_name(hw->wiphy)));
1915                 goto fail3;
1916         } else {
1917                 rtlpci->irq_alloc = 1;
1918         }
1919
1920         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1921         return 0;
1922
1923 fail3:
1924         pci_set_drvdata(pdev, NULL);
1925         rtl_deinit_core(hw);
1926         _rtl_pci_io_handler_release(hw);
1927         ieee80211_free_hw(hw);
1928
1929         if (rtlpriv->io.pci_mem_start != 0)
1930                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1931
1932 fail2:
1933         pci_release_regions(pdev);
1934
1935 fail1:
1936
1937         pci_disable_device(pdev);
1938
1939         return -ENODEV;
1940
1941 }
1942 EXPORT_SYMBOL(rtl_pci_probe);
1943
1944 void rtl_pci_disconnect(struct pci_dev *pdev)
1945 {
1946         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1947         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1948         struct rtl_priv *rtlpriv = rtl_priv(hw);
1949         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
1950         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
1951
1952         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1953
1954         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
1955
1956         /*ieee80211_unregister_hw will call ops_stop */
1957         if (rtlmac->mac80211_registered == 1) {
1958                 ieee80211_unregister_hw(hw);
1959                 rtlmac->mac80211_registered = 0;
1960         } else {
1961                 rtl_deinit_deferred_work(hw);
1962                 rtlpriv->intf_ops->adapter_stop(hw);
1963         }
1964
1965         /*deinit rfkill */
1966         rtl_deinit_rfkill(hw);
1967
1968         rtl_pci_deinit(hw);
1969         rtl_deinit_core(hw);
1970         _rtl_pci_io_handler_release(hw);
1971         rtlpriv->cfg->ops->deinit_sw_vars(hw);
1972
1973         if (rtlpci->irq_alloc) {
1974                 free_irq(rtlpci->pdev->irq, hw);
1975                 rtlpci->irq_alloc = 0;
1976         }
1977
1978         if (rtlpriv->io.pci_mem_start != 0) {
1979                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1980                 pci_release_regions(pdev);
1981         }
1982
1983         pci_disable_device(pdev);
1984
1985         rtl_pci_disable_aspm(hw);
1986
1987         pci_set_drvdata(pdev, NULL);
1988
1989         ieee80211_free_hw(hw);
1990 }
1991 EXPORT_SYMBOL(rtl_pci_disconnect);
1992
1993 /***************************************
1994 kernel pci power state define:
1995 PCI_D0         ((pci_power_t __force) 0)
1996 PCI_D1         ((pci_power_t __force) 1)
1997 PCI_D2         ((pci_power_t __force) 2)
1998 PCI_D3hot      ((pci_power_t __force) 3)
1999 PCI_D3cold     ((pci_power_t __force) 4)
2000 PCI_UNKNOWN    ((pci_power_t __force) 5)
2001
2002 This function is called when system
2003 goes into suspend state mac80211 will
2004 call rtl_mac_stop() from the mac80211
2005 suspend function first, So there is
2006 no need to call hw_disable here.
2007 ****************************************/
2008 int rtl_pci_suspend(struct device *dev)
2009 {
2010         struct pci_dev *pdev = to_pci_dev(dev);
2011         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2012         struct rtl_priv *rtlpriv = rtl_priv(hw);
2013
2014         rtlpriv->cfg->ops->hw_suspend(hw);
2015         rtl_deinit_rfkill(hw);
2016
2017         return 0;
2018 }
2019 EXPORT_SYMBOL(rtl_pci_suspend);
2020
2021 int rtl_pci_resume(struct device *dev)
2022 {
2023         struct pci_dev *pdev = to_pci_dev(dev);
2024         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2025         struct rtl_priv *rtlpriv = rtl_priv(hw);
2026
2027         rtlpriv->cfg->ops->hw_resume(hw);
2028         rtl_init_rfkill(hw);
2029         return 0;
2030 }
2031 EXPORT_SYMBOL(rtl_pci_resume);
2032
2033 struct rtl_intf_ops rtl_pci_ops = {
2034         .read_efuse_byte = read_efuse_byte,
2035         .adapter_start = rtl_pci_start,
2036         .adapter_stop = rtl_pci_stop,
2037         .adapter_tx = rtl_pci_tx,
2038         .flush = rtl_pci_flush,
2039         .reset_trx_ring = rtl_pci_reset_trx_ring,
2040         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2041
2042         .disable_aspm = rtl_pci_disable_aspm,
2043         .enable_aspm = rtl_pci_enable_aspm,
2044 };