2 * pxa-ssp.c -- ALSA Soc Audio Layer
4 * Copyright 2005,2008 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 * o Test network mode for > 16bit sample size
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/slab.h>
20 #include <linux/platform_device.h>
21 #include <linux/clk.h>
26 #include <sound/core.h>
27 #include <sound/pcm.h>
28 #include <sound/initval.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/pxa2xx-lib.h>
33 #include <mach/hardware.h>
35 #include <mach/audio.h>
38 #include "pxa2xx-pcm.h"
42 * SSP audio private data
45 struct ssp_device *ssp;
56 static void dump_registers(struct ssp_device *ssp)
58 dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
59 pxa_ssp_read_reg(ssp, SSCR0), pxa_ssp_read_reg(ssp, SSCR1),
60 pxa_ssp_read_reg(ssp, SSTO));
62 dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
63 pxa_ssp_read_reg(ssp, SSPSP), pxa_ssp_read_reg(ssp, SSSR),
64 pxa_ssp_read_reg(ssp, SSACD));
67 static void pxa_ssp_enable(struct ssp_device *ssp)
71 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE;
72 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
75 static void pxa_ssp_disable(struct ssp_device *ssp)
79 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE;
80 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
83 struct pxa2xx_pcm_dma_data {
84 struct pxa2xx_pcm_dma_params params;
88 static struct pxa2xx_pcm_dma_params *
89 pxa_ssp_get_dma_params(struct ssp_device *ssp, int width4, int out)
91 struct pxa2xx_pcm_dma_data *dma;
93 dma = kzalloc(sizeof(struct pxa2xx_pcm_dma_data), GFP_KERNEL);
97 snprintf(dma->name, 20, "SSP%d PCM %s %s", ssp->port_id,
98 width4 ? "32-bit" : "16-bit", out ? "out" : "in");
100 dma->params.name = dma->name;
101 dma->params.drcmr = &DRCMR(out ? ssp->drcmr_tx : ssp->drcmr_rx);
102 dma->params.dcmd = (out ? (DCMD_INCSRCADDR | DCMD_FLOWTRG) :
103 (DCMD_INCTRGADDR | DCMD_FLOWSRC)) |
104 (width4 ? DCMD_WIDTH4 : DCMD_WIDTH2) | DCMD_BURST16;
105 dma->params.dev_addr = ssp->phys_base + SSDR;
110 static int pxa_ssp_startup(struct snd_pcm_substream *substream,
111 struct snd_soc_dai *cpu_dai)
113 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
114 struct ssp_device *ssp = priv->ssp;
117 if (!cpu_dai->active) {
118 clk_enable(ssp->clk);
119 pxa_ssp_disable(ssp);
122 kfree(snd_soc_dai_get_dma_data(cpu_dai, substream));
123 snd_soc_dai_set_dma_data(cpu_dai, substream, NULL);
128 static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
129 struct snd_soc_dai *cpu_dai)
131 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
132 struct ssp_device *ssp = priv->ssp;
134 if (!cpu_dai->active) {
135 pxa_ssp_disable(ssp);
136 clk_disable(ssp->clk);
139 kfree(snd_soc_dai_get_dma_data(cpu_dai, substream));
140 snd_soc_dai_set_dma_data(cpu_dai, substream, NULL);
145 static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
147 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
148 struct ssp_device *ssp = priv->ssp;
150 if (!cpu_dai->active)
151 clk_enable(ssp->clk);
153 priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
154 priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
155 priv->to = __raw_readl(ssp->mmio_base + SSTO);
156 priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
158 pxa_ssp_disable(ssp);
159 clk_disable(ssp->clk);
163 static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
165 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
166 struct ssp_device *ssp = priv->ssp;
167 uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
169 clk_enable(ssp->clk);
171 __raw_writel(sssr, ssp->mmio_base + SSSR);
172 __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
173 __raw_writel(priv->cr1, ssp->mmio_base + SSCR1);
174 __raw_writel(priv->to, ssp->mmio_base + SSTO);
175 __raw_writel(priv->psp, ssp->mmio_base + SSPSP);
180 clk_disable(ssp->clk);
186 #define pxa_ssp_suspend NULL
187 #define pxa_ssp_resume NULL
191 * ssp_set_clkdiv - set SSP clock divider
192 * @div: serial clock rate divider
194 static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div)
196 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
198 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) {
199 sscr0 &= ~0x0000ff00;
200 sscr0 |= ((div - 2)/2) << 8; /* 2..512 */
202 sscr0 &= ~0x000fff00;
203 sscr0 |= (div - 1) << 8; /* 1..4096 */
205 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
209 * pxa_ssp_get_clkdiv - get SSP clock divider
211 static u32 pxa_ssp_get_scr(struct ssp_device *ssp)
213 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
216 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP)
217 div = ((sscr0 >> 8) & 0xff) * 2 + 2;
219 div = ((sscr0 >> 8) & 0xfff) + 1;
224 * Set the SSP ports SYSCLK.
226 static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
227 int clk_id, unsigned int freq, int dir)
229 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
230 struct ssp_device *ssp = priv->ssp;
233 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
234 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
236 dev_dbg(&ssp->pdev->dev,
237 "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %u\n",
238 cpu_dai->id, clk_id, freq);
241 case PXA_SSP_CLK_NET_PLL:
244 case PXA_SSP_CLK_PLL:
245 /* Internal PLL is fixed */
247 priv->sysclk = 1843200;
249 priv->sysclk = 13000000;
251 case PXA_SSP_CLK_EXT:
255 case PXA_SSP_CLK_NET:
257 sscr0 |= SSCR0_NCS | SSCR0_MOD;
259 case PXA_SSP_CLK_AUDIO:
261 pxa_ssp_set_scr(ssp, 1);
268 /* The SSP clock must be disabled when changing SSP clock mode
269 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
270 if (!cpu_is_pxa3xx())
271 clk_disable(ssp->clk);
272 val = pxa_ssp_read_reg(ssp, SSCR0) | sscr0;
273 pxa_ssp_write_reg(ssp, SSCR0, val);
274 if (!cpu_is_pxa3xx())
275 clk_enable(ssp->clk);
281 * Set the SSP clock dividers.
283 static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
286 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
287 struct ssp_device *ssp = priv->ssp;
291 case PXA_SSP_AUDIO_DIV_ACDS:
292 val = (pxa_ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div);
293 pxa_ssp_write_reg(ssp, SSACD, val);
295 case PXA_SSP_AUDIO_DIV_SCDB:
296 val = pxa_ssp_read_reg(ssp, SSACD);
298 #if defined(CONFIG_PXA3xx)
303 case PXA_SSP_CLK_SCDB_1:
306 case PXA_SSP_CLK_SCDB_4:
308 #if defined(CONFIG_PXA3xx)
309 case PXA_SSP_CLK_SCDB_8:
319 pxa_ssp_write_reg(ssp, SSACD, val);
321 case PXA_SSP_DIV_SCR:
322 pxa_ssp_set_scr(ssp, div);
332 * Configure the PLL frequency pxa27x and (afaik - pxa320 only)
334 static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
335 int source, unsigned int freq_in, unsigned int freq_out)
337 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
338 struct ssp_device *ssp = priv->ssp;
339 u32 ssacd = pxa_ssp_read_reg(ssp, SSACD) & ~0x70;
341 #if defined(CONFIG_PXA3xx)
343 pxa_ssp_write_reg(ssp, SSACDD, 0);
370 /* PXA3xx has a clock ditherer which can be used to generate
371 * a wider range of frequencies - calculate a value for it.
373 if (cpu_is_pxa3xx()) {
377 do_div(tmp, freq_out);
380 val = (val << 16) | 64;
381 pxa_ssp_write_reg(ssp, SSACDD, val);
385 dev_dbg(&ssp->pdev->dev,
386 "Using SSACDD %x to supply %uHz\n",
395 pxa_ssp_write_reg(ssp, SSACD, ssacd);
401 * Set the active slots in TDM/Network mode
403 static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
404 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
406 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
407 struct ssp_device *ssp = priv->ssp;
410 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
411 sscr0 &= ~(SSCR0_MOD | SSCR0_SlotsPerFrm(8) | SSCR0_EDSS | SSCR0_DSS);
415 sscr0 |= SSCR0_EDSS | SSCR0_DataSize(slot_width - 16);
417 sscr0 |= SSCR0_DataSize(slot_width);
420 /* enable network mode */
423 /* set number of active slots */
424 sscr0 |= SSCR0_SlotsPerFrm(slots);
426 /* set active slot mask */
427 pxa_ssp_write_reg(ssp, SSTSA, tx_mask);
428 pxa_ssp_write_reg(ssp, SSRSA, rx_mask);
430 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
436 * Tristate the SSP DAI lines
438 static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
441 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
442 struct ssp_device *ssp = priv->ssp;
445 sscr1 = pxa_ssp_read_reg(ssp, SSCR1);
450 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
456 * Set up the SSP DAI format.
457 * The SSP Port must be inactive before calling this function as the
458 * physical interface format is changed.
460 static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
463 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
464 struct ssp_device *ssp = priv->ssp;
469 /* check if we need to change anything at all */
470 if (priv->dai_fmt == fmt)
473 /* we can only change the settings if the port is not in use */
474 if (pxa_ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) {
475 dev_err(&ssp->pdev->dev,
476 "can't change hardware dai format: stream is in use");
480 /* reset port settings */
481 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
482 (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
483 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
486 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
487 case SND_SOC_DAIFMT_CBM_CFM:
488 sscr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR;
490 case SND_SOC_DAIFMT_CBM_CFS:
491 sscr1 |= SSCR1_SCLKDIR;
493 case SND_SOC_DAIFMT_CBS_CFS:
499 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
500 case SND_SOC_DAIFMT_NB_NF:
501 sspsp |= SSPSP_SFRMP;
503 case SND_SOC_DAIFMT_NB_IF:
505 case SND_SOC_DAIFMT_IB_IF:
506 sspsp |= SSPSP_SCMODE(2);
508 case SND_SOC_DAIFMT_IB_NF:
509 sspsp |= SSPSP_SCMODE(2) | SSPSP_SFRMP;
515 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
516 case SND_SOC_DAIFMT_I2S:
518 sscr1 |= SSCR1_RWOT | SSCR1_TRAIL;
519 /* See hw_params() */
522 case SND_SOC_DAIFMT_DSP_A:
524 case SND_SOC_DAIFMT_DSP_B:
525 sscr0 |= SSCR0_MOD | SSCR0_PSP;
526 sscr1 |= SSCR1_TRAIL | SSCR1_RWOT;
533 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
534 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
535 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
539 /* Since we are configuring the timings for the format by hand
540 * we have to defer some things until hw_params() where we
541 * know parameters like the sample size.
549 * Set the SSP audio DMA parameters and sample size.
550 * Can be called multiple times by oss emulation.
552 static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
553 struct snd_pcm_hw_params *params,
554 struct snd_soc_dai *cpu_dai)
556 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
557 struct ssp_device *ssp = priv->ssp;
558 int chn = params_channels(params);
561 int width = snd_pcm_format_physical_width(params_format(params));
562 int ttsa = pxa_ssp_read_reg(ssp, SSTSA) & 0xf;
563 struct pxa2xx_pcm_dma_params *dma_data;
565 dma_data = snd_soc_dai_get_dma_data(cpu_dai, substream);
567 /* generate correct DMA params */
570 /* Network mode with one active slot (ttsa == 1) can be used
571 * to force 16-bit frame width on the wire (for S16_LE), even
572 * with two channels. Use 16-bit DMA transfers for this case.
574 dma_data = pxa_ssp_get_dma_params(ssp,
575 ((chn == 2) && (ttsa != 1)) || (width == 32),
576 substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
578 snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data);
580 /* we can only change the settings if the port is not in use */
581 if (pxa_ssp_read_reg(ssp, SSCR0) & SSCR0_SSE)
584 /* clear selected SSP bits */
585 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS);
586 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
589 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
590 switch (params_format(params)) {
591 case SNDRV_PCM_FORMAT_S16_LE:
594 sscr0 |= SSCR0_FPCKE;
596 sscr0 |= SSCR0_DataSize(16);
598 case SNDRV_PCM_FORMAT_S24_LE:
599 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(8));
601 case SNDRV_PCM_FORMAT_S32_LE:
602 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16));
605 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
607 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
608 case SND_SOC_DAIFMT_I2S:
609 sspsp = pxa_ssp_read_reg(ssp, SSPSP);
611 if ((pxa_ssp_get_scr(ssp) == 4) && (width == 16)) {
612 /* This is a special case where the bitclk is 64fs
613 * and we're not dealing with 2*32 bits of audio
616 * The SSP values used for that are all found out by
617 * trying and failing a lot; some of the registers
618 * needed for that mode are only available on PXA3xx.
622 if (!cpu_is_pxa3xx())
625 sspsp |= SSPSP_SFRMWDTH(width * 2);
626 sspsp |= SSPSP_SFRMDLY(width * 4);
627 sspsp |= SSPSP_EDMYSTOP(3);
628 sspsp |= SSPSP_DMYSTOP(3);
629 sspsp |= SSPSP_DMYSTRT(1);
634 /* The frame width is the width the LRCLK is
635 * asserted for; the delay is expressed in
636 * half cycle units. We need the extra cycle
637 * because the data starts clocking out one BCLK
638 * after LRCLK changes polarity.
640 sspsp |= SSPSP_SFRMWDTH(width + 1);
641 sspsp |= SSPSP_SFRMDLY((width + 1) * 2);
642 sspsp |= SSPSP_DMYSTRT(1);
645 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
651 /* When we use a network mode, we always require TDM slots
652 * - complain loudly and fail if they've not been set up yet.
654 if ((sscr0 & SSCR0_MOD) && !ttsa) {
655 dev_err(&ssp->pdev->dev, "No TDM timeslot configured\n");
664 static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
665 struct snd_soc_dai *cpu_dai)
668 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
669 struct ssp_device *ssp = priv->ssp;
673 case SNDRV_PCM_TRIGGER_RESUME:
676 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
677 val = pxa_ssp_read_reg(ssp, SSCR1);
678 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
682 pxa_ssp_write_reg(ssp, SSCR1, val);
683 val = pxa_ssp_read_reg(ssp, SSSR);
684 pxa_ssp_write_reg(ssp, SSSR, val);
686 case SNDRV_PCM_TRIGGER_START:
687 val = pxa_ssp_read_reg(ssp, SSCR1);
688 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
692 pxa_ssp_write_reg(ssp, SSCR1, val);
695 case SNDRV_PCM_TRIGGER_STOP:
696 val = pxa_ssp_read_reg(ssp, SSCR1);
697 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
701 pxa_ssp_write_reg(ssp, SSCR1, val);
703 case SNDRV_PCM_TRIGGER_SUSPEND:
704 pxa_ssp_disable(ssp);
706 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
707 val = pxa_ssp_read_reg(ssp, SSCR1);
708 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
712 pxa_ssp_write_reg(ssp, SSCR1, val);
724 static int pxa_ssp_probe(struct snd_soc_dai *dai)
726 struct ssp_priv *priv;
729 priv = kzalloc(sizeof(struct ssp_priv), GFP_KERNEL);
733 priv->ssp = pxa_ssp_request(dai->id + 1, "SoC audio");
734 if (priv->ssp == NULL) {
739 priv->dai_fmt = (unsigned int) -1;
740 snd_soc_dai_set_drvdata(dai, priv);
749 static int pxa_ssp_remove(struct snd_soc_dai *dai)
751 struct ssp_priv *priv = snd_soc_dai_get_drvdata(dai);
753 pxa_ssp_free(priv->ssp);
757 #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
758 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
759 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
760 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
762 #define PXA_SSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
763 SNDRV_PCM_FMTBIT_S24_LE | \
764 SNDRV_PCM_FMTBIT_S32_LE)
766 static struct snd_soc_dai_ops pxa_ssp_dai_ops = {
767 .startup = pxa_ssp_startup,
768 .shutdown = pxa_ssp_shutdown,
769 .trigger = pxa_ssp_trigger,
770 .hw_params = pxa_ssp_hw_params,
771 .set_sysclk = pxa_ssp_set_dai_sysclk,
772 .set_clkdiv = pxa_ssp_set_dai_clkdiv,
773 .set_pll = pxa_ssp_set_dai_pll,
774 .set_fmt = pxa_ssp_set_dai_fmt,
775 .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
776 .set_tristate = pxa_ssp_set_dai_tristate,
779 static struct snd_soc_dai_driver pxa_ssp_dai = {
780 .probe = pxa_ssp_probe,
781 .remove = pxa_ssp_remove,
782 .suspend = pxa_ssp_suspend,
783 .resume = pxa_ssp_resume,
787 .rates = PXA_SSP_RATES,
788 .formats = PXA_SSP_FORMATS,
793 .rates = PXA_SSP_RATES,
794 .formats = PXA_SSP_FORMATS,
796 .ops = &pxa_ssp_dai_ops,
799 static __devinit int asoc_ssp_probe(struct platform_device *pdev)
801 return snd_soc_register_dai(&pdev->dev, &pxa_ssp_dai);
804 static int __devexit asoc_ssp_remove(struct platform_device *pdev)
806 snd_soc_unregister_dai(&pdev->dev);
810 static struct platform_driver asoc_ssp_driver = {
812 .name = "pxa-ssp-dai",
813 .owner = THIS_MODULE,
816 .probe = asoc_ssp_probe,
817 .remove = __devexit_p(asoc_ssp_remove),
820 static int __init pxa_ssp_init(void)
822 return platform_driver_register(&asoc_ssp_driver);
824 module_init(pxa_ssp_init);
826 static void __exit pxa_ssp_exit(void)
828 platform_driver_unregister(&asoc_ssp_driver);
830 module_exit(pxa_ssp_exit);
832 /* Module information */
833 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
834 MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
835 MODULE_LICENSE("GPL");