2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affilates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
48 #define CREATE_TRACE_POINTS
51 #include <asm/debugreg.h>
58 #include <asm/pvclock.h>
59 #include <asm/div64.h>
61 #define MAX_IO_MSRS 256
62 #define CR0_RESERVED_BITS \
63 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
64 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
65 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
66 #define CR4_RESERVED_BITS \
67 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
68 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
69 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
71 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
75 #define KVM_MAX_MCE_BANKS 32
76 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
85 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
91 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
93 struct kvm_cpuid_entry2 __user *entries);
95 struct kvm_x86_ops *kvm_x86_ops;
96 EXPORT_SYMBOL_GPL(kvm_x86_ops);
99 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
101 #define KVM_NR_SHARED_MSRS 16
103 struct kvm_shared_msrs_global {
105 u32 msrs[KVM_NR_SHARED_MSRS];
108 struct kvm_shared_msrs {
109 struct user_return_notifier urn;
111 struct kvm_shared_msr_values {
114 } values[KVM_NR_SHARED_MSRS];
117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
118 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
120 struct kvm_stats_debugfs_item debugfs_entries[] = {
121 { "pf_fixed", VCPU_STAT(pf_fixed) },
122 { "pf_guest", VCPU_STAT(pf_guest) },
123 { "tlb_flush", VCPU_STAT(tlb_flush) },
124 { "invlpg", VCPU_STAT(invlpg) },
125 { "exits", VCPU_STAT(exits) },
126 { "io_exits", VCPU_STAT(io_exits) },
127 { "mmio_exits", VCPU_STAT(mmio_exits) },
128 { "signal_exits", VCPU_STAT(signal_exits) },
129 { "irq_window", VCPU_STAT(irq_window_exits) },
130 { "nmi_window", VCPU_STAT(nmi_window_exits) },
131 { "halt_exits", VCPU_STAT(halt_exits) },
132 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
133 { "hypercalls", VCPU_STAT(hypercalls) },
134 { "request_irq", VCPU_STAT(request_irq_exits) },
135 { "irq_exits", VCPU_STAT(irq_exits) },
136 { "host_state_reload", VCPU_STAT(host_state_reload) },
137 { "efer_reload", VCPU_STAT(efer_reload) },
138 { "fpu_reload", VCPU_STAT(fpu_reload) },
139 { "insn_emulation", VCPU_STAT(insn_emulation) },
140 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
141 { "irq_injections", VCPU_STAT(irq_injections) },
142 { "nmi_injections", VCPU_STAT(nmi_injections) },
143 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
144 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
145 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
146 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
147 { "mmu_flooded", VM_STAT(mmu_flooded) },
148 { "mmu_recycled", VM_STAT(mmu_recycled) },
149 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
150 { "mmu_unsync", VM_STAT(mmu_unsync) },
151 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
152 { "largepages", VM_STAT(lpages) },
156 u64 __read_mostly host_xcr0;
158 static inline u32 bit(int bitno)
160 return 1 << (bitno & 31);
163 static void kvm_on_user_return(struct user_return_notifier *urn)
166 struct kvm_shared_msrs *locals
167 = container_of(urn, struct kvm_shared_msrs, urn);
168 struct kvm_shared_msr_values *values;
170 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
171 values = &locals->values[slot];
172 if (values->host != values->curr) {
173 wrmsrl(shared_msrs_global.msrs[slot], values->host);
174 values->curr = values->host;
177 locals->registered = false;
178 user_return_notifier_unregister(urn);
181 static void shared_msr_update(unsigned slot, u32 msr)
183 struct kvm_shared_msrs *smsr;
186 smsr = &__get_cpu_var(shared_msrs);
187 /* only read, and nobody should modify it at this time,
188 * so don't need lock */
189 if (slot >= shared_msrs_global.nr) {
190 printk(KERN_ERR "kvm: invalid MSR slot!");
193 rdmsrl_safe(msr, &value);
194 smsr->values[slot].host = value;
195 smsr->values[slot].curr = value;
198 void kvm_define_shared_msr(unsigned slot, u32 msr)
200 if (slot >= shared_msrs_global.nr)
201 shared_msrs_global.nr = slot + 1;
202 shared_msrs_global.msrs[slot] = msr;
203 /* we need ensured the shared_msr_global have been updated */
206 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
208 static void kvm_shared_msr_cpu_online(void)
212 for (i = 0; i < shared_msrs_global.nr; ++i)
213 shared_msr_update(i, shared_msrs_global.msrs[i]);
216 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
218 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
220 if (((value ^ smsr->values[slot].curr) & mask) == 0)
222 smsr->values[slot].curr = value;
223 wrmsrl(shared_msrs_global.msrs[slot], value);
224 if (!smsr->registered) {
225 smsr->urn.on_user_return = kvm_on_user_return;
226 user_return_notifier_register(&smsr->urn);
227 smsr->registered = true;
230 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
232 static void drop_user_return_notifiers(void *ignore)
234 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
236 if (smsr->registered)
237 kvm_on_user_return(&smsr->urn);
240 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
242 if (irqchip_in_kernel(vcpu->kvm))
243 return vcpu->arch.apic_base;
245 return vcpu->arch.apic_base;
247 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
249 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
251 /* TODO: reserve bits check */
252 if (irqchip_in_kernel(vcpu->kvm))
253 kvm_lapic_set_base(vcpu, data);
255 vcpu->arch.apic_base = data;
257 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
259 #define EXCPT_BENIGN 0
260 #define EXCPT_CONTRIBUTORY 1
263 static int exception_class(int vector)
273 return EXCPT_CONTRIBUTORY;
280 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
281 unsigned nr, bool has_error, u32 error_code,
287 if (!vcpu->arch.exception.pending) {
289 vcpu->arch.exception.pending = true;
290 vcpu->arch.exception.has_error_code = has_error;
291 vcpu->arch.exception.nr = nr;
292 vcpu->arch.exception.error_code = error_code;
293 vcpu->arch.exception.reinject = reinject;
297 /* to check exception */
298 prev_nr = vcpu->arch.exception.nr;
299 if (prev_nr == DF_VECTOR) {
300 /* triple fault -> shutdown */
301 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
304 class1 = exception_class(prev_nr);
305 class2 = exception_class(nr);
306 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
307 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
308 /* generate double fault per SDM Table 5-5 */
309 vcpu->arch.exception.pending = true;
310 vcpu->arch.exception.has_error_code = true;
311 vcpu->arch.exception.nr = DF_VECTOR;
312 vcpu->arch.exception.error_code = 0;
314 /* replace previous exception with a new one in a hope
315 that instruction re-execution will regenerate lost
320 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
322 kvm_multiple_exception(vcpu, nr, false, 0, false);
324 EXPORT_SYMBOL_GPL(kvm_queue_exception);
326 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
328 kvm_multiple_exception(vcpu, nr, false, 0, true);
330 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
332 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
334 unsigned error_code = vcpu->arch.fault.error_code;
336 ++vcpu->stat.pf_guest;
337 vcpu->arch.cr2 = vcpu->arch.fault.address;
338 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
341 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
343 vcpu->arch.nmi_pending = 1;
345 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
347 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
349 kvm_multiple_exception(vcpu, nr, true, error_code, false);
351 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
353 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
355 kvm_multiple_exception(vcpu, nr, true, error_code, true);
357 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
360 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
361 * a #GP and return false.
363 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
365 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
367 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
370 EXPORT_SYMBOL_GPL(kvm_require_cpl);
373 * This function will be used to read from the physical memory of the currently
374 * running guest. The difference to kvm_read_guest_page is that this function
375 * can read from guest physical or from the guest's guest physical memory.
377 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
378 gfn_t ngfn, void *data, int offset, int len,
384 ngpa = gfn_to_gpa(ngfn);
385 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
386 if (real_gfn == UNMAPPED_GVA)
389 real_gfn = gpa_to_gfn(real_gfn);
391 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
393 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
396 * Load the pae pdptrs. Return true is they are all valid.
398 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
400 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
401 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
404 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
406 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
407 offset * sizeof(u64), sizeof(pdpte));
412 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
413 if (is_present_gpte(pdpte[i]) &&
414 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
421 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
422 __set_bit(VCPU_EXREG_PDPTR,
423 (unsigned long *)&vcpu->arch.regs_avail);
424 __set_bit(VCPU_EXREG_PDPTR,
425 (unsigned long *)&vcpu->arch.regs_dirty);
430 EXPORT_SYMBOL_GPL(load_pdptrs);
432 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
434 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
438 if (is_long_mode(vcpu) || !is_pae(vcpu))
441 if (!test_bit(VCPU_EXREG_PDPTR,
442 (unsigned long *)&vcpu->arch.regs_avail))
445 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
448 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
454 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
456 unsigned long old_cr0 = kvm_read_cr0(vcpu);
457 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
458 X86_CR0_CD | X86_CR0_NW;
463 if (cr0 & 0xffffffff00000000UL)
467 cr0 &= ~CR0_RESERVED_BITS;
469 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
472 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
475 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
477 if ((vcpu->arch.efer & EFER_LME)) {
482 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
487 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
491 kvm_x86_ops->set_cr0(vcpu, cr0);
493 if ((cr0 ^ old_cr0) & update_bits)
494 kvm_mmu_reset_context(vcpu);
497 EXPORT_SYMBOL_GPL(kvm_set_cr0);
499 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
501 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
503 EXPORT_SYMBOL_GPL(kvm_lmsw);
505 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
509 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
510 if (index != XCR_XFEATURE_ENABLED_MASK)
513 if (kvm_x86_ops->get_cpl(vcpu) != 0)
515 if (!(xcr0 & XSTATE_FP))
517 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
519 if (xcr0 & ~host_xcr0)
521 vcpu->arch.xcr0 = xcr0;
522 vcpu->guest_xcr0_loaded = 0;
526 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
528 if (__kvm_set_xcr(vcpu, index, xcr)) {
529 kvm_inject_gp(vcpu, 0);
534 EXPORT_SYMBOL_GPL(kvm_set_xcr);
536 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
538 struct kvm_cpuid_entry2 *best;
540 best = kvm_find_cpuid_entry(vcpu, 1, 0);
541 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
544 static void update_cpuid(struct kvm_vcpu *vcpu)
546 struct kvm_cpuid_entry2 *best;
548 best = kvm_find_cpuid_entry(vcpu, 1, 0);
552 /* Update OSXSAVE bit */
553 if (cpu_has_xsave && best->function == 0x1) {
554 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
555 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
556 best->ecx |= bit(X86_FEATURE_OSXSAVE);
560 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
562 unsigned long old_cr4 = kvm_read_cr4(vcpu);
563 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
565 if (cr4 & CR4_RESERVED_BITS)
568 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
571 if (is_long_mode(vcpu)) {
572 if (!(cr4 & X86_CR4_PAE))
574 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
575 && ((cr4 ^ old_cr4) & pdptr_bits)
576 && !load_pdptrs(vcpu, vcpu->arch.cr3))
579 if (cr4 & X86_CR4_VMXE)
582 kvm_x86_ops->set_cr4(vcpu, cr4);
584 if ((cr4 ^ old_cr4) & pdptr_bits)
585 kvm_mmu_reset_context(vcpu);
587 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
592 EXPORT_SYMBOL_GPL(kvm_set_cr4);
594 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
596 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
597 kvm_mmu_sync_roots(vcpu);
598 kvm_mmu_flush_tlb(vcpu);
602 if (is_long_mode(vcpu)) {
603 if (cr3 & CR3_L_MODE_RESERVED_BITS)
607 if (cr3 & CR3_PAE_RESERVED_BITS)
609 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
613 * We don't check reserved bits in nonpae mode, because
614 * this isn't enforced, and VMware depends on this.
619 * Does the new cr3 value map to physical memory? (Note, we
620 * catch an invalid cr3 even in real-mode, because it would
621 * cause trouble later on when we turn on paging anyway.)
623 * A real CPU would silently accept an invalid cr3 and would
624 * attempt to use it - with largely undefined (and often hard
625 * to debug) behavior on the guest side.
627 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
629 vcpu->arch.cr3 = cr3;
630 vcpu->arch.mmu.new_cr3(vcpu);
633 EXPORT_SYMBOL_GPL(kvm_set_cr3);
635 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
637 if (cr8 & CR8_RESERVED_BITS)
639 if (irqchip_in_kernel(vcpu->kvm))
640 kvm_lapic_set_tpr(vcpu, cr8);
642 vcpu->arch.cr8 = cr8;
646 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
648 if (__kvm_set_cr8(vcpu, cr8))
649 kvm_inject_gp(vcpu, 0);
651 EXPORT_SYMBOL_GPL(kvm_set_cr8);
653 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
655 if (irqchip_in_kernel(vcpu->kvm))
656 return kvm_lapic_get_cr8(vcpu);
658 return vcpu->arch.cr8;
660 EXPORT_SYMBOL_GPL(kvm_get_cr8);
662 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
666 vcpu->arch.db[dr] = val;
667 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
668 vcpu->arch.eff_db[dr] = val;
671 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
675 if (val & 0xffffffff00000000ULL)
677 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
680 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
684 if (val & 0xffffffff00000000ULL)
686 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
687 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
688 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
689 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
697 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
701 res = __kvm_set_dr(vcpu, dr, val);
703 kvm_queue_exception(vcpu, UD_VECTOR);
705 kvm_inject_gp(vcpu, 0);
709 EXPORT_SYMBOL_GPL(kvm_set_dr);
711 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
715 *val = vcpu->arch.db[dr];
718 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
722 *val = vcpu->arch.dr6;
725 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
729 *val = vcpu->arch.dr7;
736 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
738 if (_kvm_get_dr(vcpu, dr, val)) {
739 kvm_queue_exception(vcpu, UD_VECTOR);
744 EXPORT_SYMBOL_GPL(kvm_get_dr);
747 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
748 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
750 * This list is modified at module load time to reflect the
751 * capabilities of the host cpu. This capabilities test skips MSRs that are
752 * kvm-specific. Those are put in the beginning of the list.
755 #define KVM_SAVE_MSRS_BEGIN 7
756 static u32 msrs_to_save[] = {
757 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
758 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
759 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
760 HV_X64_MSR_APIC_ASSIST_PAGE,
761 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
764 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
766 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
769 static unsigned num_msrs_to_save;
771 static u32 emulated_msrs[] = {
772 MSR_IA32_MISC_ENABLE,
777 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
779 u64 old_efer = vcpu->arch.efer;
781 if (efer & efer_reserved_bits)
785 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
788 if (efer & EFER_FFXSR) {
789 struct kvm_cpuid_entry2 *feat;
791 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
792 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
796 if (efer & EFER_SVME) {
797 struct kvm_cpuid_entry2 *feat;
799 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
800 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
805 efer |= vcpu->arch.efer & EFER_LMA;
807 kvm_x86_ops->set_efer(vcpu, efer);
809 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
810 kvm_mmu_reset_context(vcpu);
812 /* Update reserved bits */
813 if ((efer ^ old_efer) & EFER_NX)
814 kvm_mmu_reset_context(vcpu);
819 void kvm_enable_efer_bits(u64 mask)
821 efer_reserved_bits &= ~mask;
823 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
827 * Writes msr value into into the appropriate "register".
828 * Returns 0 on success, non-0 otherwise.
829 * Assumes vcpu_load() was already called.
831 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
833 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
837 * Adapt set_msr() to msr_io()'s calling convention
839 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
841 return kvm_set_msr(vcpu, index, *data);
844 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
848 struct pvclock_wall_clock wc;
849 struct timespec boot;
854 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
859 ++version; /* first time write, random junk */
863 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
866 * The guest calculates current wall clock time by adding
867 * system time (updated by kvm_write_guest_time below) to the
868 * wall clock specified here. guest system time equals host
869 * system time for us, thus we must fill in host boot time here.
873 wc.sec = boot.tv_sec;
874 wc.nsec = boot.tv_nsec;
875 wc.version = version;
877 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
880 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
883 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
885 uint32_t quotient, remainder;
887 /* Don't try to replace with do_div(), this one calculates
888 * "(dividend << 32) / divisor" */
890 : "=a" (quotient), "=d" (remainder)
891 : "0" (0), "1" (dividend), "r" (divisor) );
895 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
897 uint64_t nsecs = 1000000000LL;
902 tps64 = tsc_khz * 1000LL;
903 while (tps64 > nsecs*2) {
908 tps32 = (uint32_t)tps64;
909 while (tps32 <= (uint32_t)nsecs) {
914 hv_clock->tsc_shift = shift;
915 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
917 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
918 __func__, tsc_khz, hv_clock->tsc_shift,
919 hv_clock->tsc_to_system_mul);
922 static inline u64 get_kernel_ns(void)
926 WARN_ON(preemptible());
928 monotonic_to_bootbased(&ts);
929 return timespec_to_ns(&ts);
932 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
934 static inline int kvm_tsc_changes_freq(void)
937 int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
938 cpufreq_quick_get(cpu) != 0;
943 static inline u64 nsec_to_cycles(u64 nsec)
947 WARN_ON(preemptible());
948 if (kvm_tsc_changes_freq())
949 printk_once(KERN_WARNING
950 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
951 ret = nsec * __get_cpu_var(cpu_tsc_khz);
952 do_div(ret, USEC_PER_SEC);
956 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
958 struct kvm *kvm = vcpu->kvm;
959 u64 offset, ns, elapsed;
963 spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
964 offset = data - native_read_tsc();
965 ns = get_kernel_ns();
966 elapsed = ns - kvm->arch.last_tsc_nsec;
967 sdiff = data - kvm->arch.last_tsc_write;
972 * Special case: close write to TSC within 5 seconds of
973 * another CPU is interpreted as an attempt to synchronize
974 * The 5 seconds is to accomodate host load / swapping as
975 * well as any reset of TSC during the boot process.
977 * In that case, for a reliable TSC, we can match TSC offsets,
978 * or make a best guest using elapsed value.
980 if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
981 elapsed < 5ULL * NSEC_PER_SEC) {
982 if (!check_tsc_unstable()) {
983 offset = kvm->arch.last_tsc_offset;
984 pr_debug("kvm: matched tsc offset for %llu\n", data);
986 u64 delta = nsec_to_cycles(elapsed);
988 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
990 ns = kvm->arch.last_tsc_nsec;
992 kvm->arch.last_tsc_nsec = ns;
993 kvm->arch.last_tsc_write = data;
994 kvm->arch.last_tsc_offset = offset;
995 kvm_x86_ops->write_tsc_offset(vcpu, offset);
996 spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
998 /* Reset of TSC must disable overshoot protection below */
999 vcpu->arch.hv_clock.tsc_timestamp = 0;
1001 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1003 static int kvm_write_guest_time(struct kvm_vcpu *v)
1005 unsigned long flags;
1006 struct kvm_vcpu_arch *vcpu = &v->arch;
1008 unsigned long this_tsc_khz;
1009 s64 kernel_ns, max_kernel_ns;
1012 if ((!vcpu->time_page))
1015 /* Keep irq disabled to prevent changes to the clock */
1016 local_irq_save(flags);
1017 kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1018 kernel_ns = get_kernel_ns();
1019 this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1020 local_irq_restore(flags);
1022 if (unlikely(this_tsc_khz == 0)) {
1023 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1028 * Time as measured by the TSC may go backwards when resetting the base
1029 * tsc_timestamp. The reason for this is that the TSC resolution is
1030 * higher than the resolution of the other clock scales. Thus, many
1031 * possible measurments of the TSC correspond to one measurement of any
1032 * other clock, and so a spread of values is possible. This is not a
1033 * problem for the computation of the nanosecond clock; with TSC rates
1034 * around 1GHZ, there can only be a few cycles which correspond to one
1035 * nanosecond value, and any path through this code will inevitably
1036 * take longer than that. However, with the kernel_ns value itself,
1037 * the precision may be much lower, down to HZ granularity. If the
1038 * first sampling of TSC against kernel_ns ends in the low part of the
1039 * range, and the second in the high end of the range, we can get:
1041 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1043 * As the sampling errors potentially range in the thousands of cycles,
1044 * it is possible such a time value has already been observed by the
1045 * guest. To protect against this, we must compute the system time as
1046 * observed by the guest and ensure the new system time is greater.
1049 if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1050 max_kernel_ns = vcpu->last_guest_tsc -
1051 vcpu->hv_clock.tsc_timestamp;
1052 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1053 vcpu->hv_clock.tsc_to_system_mul,
1054 vcpu->hv_clock.tsc_shift);
1055 max_kernel_ns += vcpu->last_kernel_ns;
1058 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1059 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
1060 vcpu->hw_tsc_khz = this_tsc_khz;
1063 if (max_kernel_ns > kernel_ns)
1064 kernel_ns = max_kernel_ns;
1066 /* With all the info we got, fill in the values */
1067 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1068 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1069 vcpu->last_kernel_ns = kernel_ns;
1070 vcpu->hv_clock.flags = 0;
1073 * The interface expects us to write an even number signaling that the
1074 * update is finished. Since the guest won't see the intermediate
1075 * state, we just increase by 2 at the end.
1077 vcpu->hv_clock.version += 2;
1079 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1081 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1082 sizeof(vcpu->hv_clock));
1084 kunmap_atomic(shared_kaddr, KM_USER0);
1086 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1090 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
1092 struct kvm_vcpu_arch *vcpu = &v->arch;
1094 if (!vcpu->time_page)
1096 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1100 static bool msr_mtrr_valid(unsigned msr)
1103 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1104 case MSR_MTRRfix64K_00000:
1105 case MSR_MTRRfix16K_80000:
1106 case MSR_MTRRfix16K_A0000:
1107 case MSR_MTRRfix4K_C0000:
1108 case MSR_MTRRfix4K_C8000:
1109 case MSR_MTRRfix4K_D0000:
1110 case MSR_MTRRfix4K_D8000:
1111 case MSR_MTRRfix4K_E0000:
1112 case MSR_MTRRfix4K_E8000:
1113 case MSR_MTRRfix4K_F0000:
1114 case MSR_MTRRfix4K_F8000:
1115 case MSR_MTRRdefType:
1116 case MSR_IA32_CR_PAT:
1124 static bool valid_pat_type(unsigned t)
1126 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1129 static bool valid_mtrr_type(unsigned t)
1131 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1134 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1138 if (!msr_mtrr_valid(msr))
1141 if (msr == MSR_IA32_CR_PAT) {
1142 for (i = 0; i < 8; i++)
1143 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1146 } else if (msr == MSR_MTRRdefType) {
1149 return valid_mtrr_type(data & 0xff);
1150 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1151 for (i = 0; i < 8 ; i++)
1152 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1157 /* variable MTRRs */
1158 return valid_mtrr_type(data & 0xff);
1161 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1163 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1165 if (!mtrr_valid(vcpu, msr, data))
1168 if (msr == MSR_MTRRdefType) {
1169 vcpu->arch.mtrr_state.def_type = data;
1170 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1171 } else if (msr == MSR_MTRRfix64K_00000)
1173 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1174 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1175 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1176 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1177 else if (msr == MSR_IA32_CR_PAT)
1178 vcpu->arch.pat = data;
1179 else { /* Variable MTRRs */
1180 int idx, is_mtrr_mask;
1183 idx = (msr - 0x200) / 2;
1184 is_mtrr_mask = msr - 0x200 - 2 * idx;
1187 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1190 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1194 kvm_mmu_reset_context(vcpu);
1198 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1200 u64 mcg_cap = vcpu->arch.mcg_cap;
1201 unsigned bank_num = mcg_cap & 0xff;
1204 case MSR_IA32_MCG_STATUS:
1205 vcpu->arch.mcg_status = data;
1207 case MSR_IA32_MCG_CTL:
1208 if (!(mcg_cap & MCG_CTL_P))
1210 if (data != 0 && data != ~(u64)0)
1212 vcpu->arch.mcg_ctl = data;
1215 if (msr >= MSR_IA32_MC0_CTL &&
1216 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1217 u32 offset = msr - MSR_IA32_MC0_CTL;
1218 /* only 0 or all 1s can be written to IA32_MCi_CTL
1219 * some Linux kernels though clear bit 10 in bank 4 to
1220 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1221 * this to avoid an uncatched #GP in the guest
1223 if ((offset & 0x3) == 0 &&
1224 data != 0 && (data | (1 << 10)) != ~(u64)0)
1226 vcpu->arch.mce_banks[offset] = data;
1234 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1236 struct kvm *kvm = vcpu->kvm;
1237 int lm = is_long_mode(vcpu);
1238 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1239 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1240 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1241 : kvm->arch.xen_hvm_config.blob_size_32;
1242 u32 page_num = data & ~PAGE_MASK;
1243 u64 page_addr = data & PAGE_MASK;
1248 if (page_num >= blob_size)
1251 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1255 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1257 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1266 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1268 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1271 static bool kvm_hv_msr_partition_wide(u32 msr)
1275 case HV_X64_MSR_GUEST_OS_ID:
1276 case HV_X64_MSR_HYPERCALL:
1284 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1286 struct kvm *kvm = vcpu->kvm;
1289 case HV_X64_MSR_GUEST_OS_ID:
1290 kvm->arch.hv_guest_os_id = data;
1291 /* setting guest os id to zero disables hypercall page */
1292 if (!kvm->arch.hv_guest_os_id)
1293 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1295 case HV_X64_MSR_HYPERCALL: {
1300 /* if guest os id is not set hypercall should remain disabled */
1301 if (!kvm->arch.hv_guest_os_id)
1303 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1304 kvm->arch.hv_hypercall = data;
1307 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1308 addr = gfn_to_hva(kvm, gfn);
1309 if (kvm_is_error_hva(addr))
1311 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1312 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1313 if (copy_to_user((void __user *)addr, instructions, 4))
1315 kvm->arch.hv_hypercall = data;
1319 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1320 "data 0x%llx\n", msr, data);
1326 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1329 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1332 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1333 vcpu->arch.hv_vapic = data;
1336 addr = gfn_to_hva(vcpu->kvm, data >>
1337 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1338 if (kvm_is_error_hva(addr))
1340 if (clear_user((void __user *)addr, PAGE_SIZE))
1342 vcpu->arch.hv_vapic = data;
1345 case HV_X64_MSR_EOI:
1346 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1347 case HV_X64_MSR_ICR:
1348 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1349 case HV_X64_MSR_TPR:
1350 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1352 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1353 "data 0x%llx\n", msr, data);
1360 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1364 return set_efer(vcpu, data);
1366 data &= ~(u64)0x40; /* ignore flush filter disable */
1367 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1369 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1374 case MSR_FAM10H_MMIO_CONF_BASE:
1376 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1381 case MSR_AMD64_NB_CFG:
1383 case MSR_IA32_DEBUGCTLMSR:
1385 /* We support the non-activated case already */
1387 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1388 /* Values other than LBR and BTF are vendor-specific,
1389 thus reserved and should throw a #GP */
1392 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1395 case MSR_IA32_UCODE_REV:
1396 case MSR_IA32_UCODE_WRITE:
1397 case MSR_VM_HSAVE_PA:
1398 case MSR_AMD64_PATCH_LOADER:
1400 case 0x200 ... 0x2ff:
1401 return set_msr_mtrr(vcpu, msr, data);
1402 case MSR_IA32_APICBASE:
1403 kvm_set_apic_base(vcpu, data);
1405 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1406 return kvm_x2apic_msr_write(vcpu, msr, data);
1407 case MSR_IA32_MISC_ENABLE:
1408 vcpu->arch.ia32_misc_enable_msr = data;
1410 case MSR_KVM_WALL_CLOCK_NEW:
1411 case MSR_KVM_WALL_CLOCK:
1412 vcpu->kvm->arch.wall_clock = data;
1413 kvm_write_wall_clock(vcpu->kvm, data);
1415 case MSR_KVM_SYSTEM_TIME_NEW:
1416 case MSR_KVM_SYSTEM_TIME: {
1417 if (vcpu->arch.time_page) {
1418 kvm_release_page_dirty(vcpu->arch.time_page);
1419 vcpu->arch.time_page = NULL;
1422 vcpu->arch.time = data;
1424 /* we verify if the enable bit is set... */
1428 /* ...but clean it before doing the actual write */
1429 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1431 vcpu->arch.time_page =
1432 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1434 if (is_error_page(vcpu->arch.time_page)) {
1435 kvm_release_page_clean(vcpu->arch.time_page);
1436 vcpu->arch.time_page = NULL;
1439 kvm_request_guest_time_update(vcpu);
1442 case MSR_IA32_MCG_CTL:
1443 case MSR_IA32_MCG_STATUS:
1444 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1445 return set_msr_mce(vcpu, msr, data);
1447 /* Performance counters are not protected by a CPUID bit,
1448 * so we should check all of them in the generic path for the sake of
1449 * cross vendor migration.
1450 * Writing a zero into the event select MSRs disables them,
1451 * which we perfectly emulate ;-). Any other value should be at least
1452 * reported, some guests depend on them.
1454 case MSR_P6_EVNTSEL0:
1455 case MSR_P6_EVNTSEL1:
1456 case MSR_K7_EVNTSEL0:
1457 case MSR_K7_EVNTSEL1:
1458 case MSR_K7_EVNTSEL2:
1459 case MSR_K7_EVNTSEL3:
1461 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1462 "0x%x data 0x%llx\n", msr, data);
1464 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1465 * so we ignore writes to make it happy.
1467 case MSR_P6_PERFCTR0:
1468 case MSR_P6_PERFCTR1:
1469 case MSR_K7_PERFCTR0:
1470 case MSR_K7_PERFCTR1:
1471 case MSR_K7_PERFCTR2:
1472 case MSR_K7_PERFCTR3:
1473 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1474 "0x%x data 0x%llx\n", msr, data);
1476 case MSR_K7_CLK_CTL:
1478 * Ignore all writes to this no longer documented MSR.
1479 * Writes are only relevant for old K7 processors,
1480 * all pre-dating SVM, but a recommended workaround from
1481 * AMD for these chips. It is possible to speicify the
1482 * affected processor models on the command line, hence
1483 * the need to ignore the workaround.
1486 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1487 if (kvm_hv_msr_partition_wide(msr)) {
1489 mutex_lock(&vcpu->kvm->lock);
1490 r = set_msr_hyperv_pw(vcpu, msr, data);
1491 mutex_unlock(&vcpu->kvm->lock);
1494 return set_msr_hyperv(vcpu, msr, data);
1497 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1498 return xen_hvm_config(vcpu, data);
1500 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1504 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1511 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1515 * Reads an msr value (of 'msr_index') into 'pdata'.
1516 * Returns 0 on success, non-0 otherwise.
1517 * Assumes vcpu_load() was already called.
1519 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1521 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1524 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1526 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1528 if (!msr_mtrr_valid(msr))
1531 if (msr == MSR_MTRRdefType)
1532 *pdata = vcpu->arch.mtrr_state.def_type +
1533 (vcpu->arch.mtrr_state.enabled << 10);
1534 else if (msr == MSR_MTRRfix64K_00000)
1536 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1537 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1538 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1539 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1540 else if (msr == MSR_IA32_CR_PAT)
1541 *pdata = vcpu->arch.pat;
1542 else { /* Variable MTRRs */
1543 int idx, is_mtrr_mask;
1546 idx = (msr - 0x200) / 2;
1547 is_mtrr_mask = msr - 0x200 - 2 * idx;
1550 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1553 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1560 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1563 u64 mcg_cap = vcpu->arch.mcg_cap;
1564 unsigned bank_num = mcg_cap & 0xff;
1567 case MSR_IA32_P5_MC_ADDR:
1568 case MSR_IA32_P5_MC_TYPE:
1571 case MSR_IA32_MCG_CAP:
1572 data = vcpu->arch.mcg_cap;
1574 case MSR_IA32_MCG_CTL:
1575 if (!(mcg_cap & MCG_CTL_P))
1577 data = vcpu->arch.mcg_ctl;
1579 case MSR_IA32_MCG_STATUS:
1580 data = vcpu->arch.mcg_status;
1583 if (msr >= MSR_IA32_MC0_CTL &&
1584 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1585 u32 offset = msr - MSR_IA32_MC0_CTL;
1586 data = vcpu->arch.mce_banks[offset];
1595 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1598 struct kvm *kvm = vcpu->kvm;
1601 case HV_X64_MSR_GUEST_OS_ID:
1602 data = kvm->arch.hv_guest_os_id;
1604 case HV_X64_MSR_HYPERCALL:
1605 data = kvm->arch.hv_hypercall;
1608 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1616 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1621 case HV_X64_MSR_VP_INDEX: {
1624 kvm_for_each_vcpu(r, v, vcpu->kvm)
1629 case HV_X64_MSR_EOI:
1630 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1631 case HV_X64_MSR_ICR:
1632 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1633 case HV_X64_MSR_TPR:
1634 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1636 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1643 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1648 case MSR_IA32_PLATFORM_ID:
1649 case MSR_IA32_UCODE_REV:
1650 case MSR_IA32_EBL_CR_POWERON:
1651 case MSR_IA32_DEBUGCTLMSR:
1652 case MSR_IA32_LASTBRANCHFROMIP:
1653 case MSR_IA32_LASTBRANCHTOIP:
1654 case MSR_IA32_LASTINTFROMIP:
1655 case MSR_IA32_LASTINTTOIP:
1658 case MSR_VM_HSAVE_PA:
1659 case MSR_P6_PERFCTR0:
1660 case MSR_P6_PERFCTR1:
1661 case MSR_P6_EVNTSEL0:
1662 case MSR_P6_EVNTSEL1:
1663 case MSR_K7_EVNTSEL0:
1664 case MSR_K7_PERFCTR0:
1665 case MSR_K8_INT_PENDING_MSG:
1666 case MSR_AMD64_NB_CFG:
1667 case MSR_FAM10H_MMIO_CONF_BASE:
1671 data = 0x500 | KVM_NR_VAR_MTRR;
1673 case 0x200 ... 0x2ff:
1674 return get_msr_mtrr(vcpu, msr, pdata);
1675 case 0xcd: /* fsb frequency */
1679 * MSR_EBC_FREQUENCY_ID
1680 * Conservative value valid for even the basic CPU models.
1681 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1682 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1683 * and 266MHz for model 3, or 4. Set Core Clock
1684 * Frequency to System Bus Frequency Ratio to 1 (bits
1685 * 31:24) even though these are only valid for CPU
1686 * models > 2, however guests may end up dividing or
1687 * multiplying by zero otherwise.
1689 case MSR_EBC_FREQUENCY_ID:
1692 case MSR_IA32_APICBASE:
1693 data = kvm_get_apic_base(vcpu);
1695 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1696 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1698 case MSR_IA32_MISC_ENABLE:
1699 data = vcpu->arch.ia32_misc_enable_msr;
1701 case MSR_IA32_PERF_STATUS:
1702 /* TSC increment by tick */
1704 /* CPU multiplier */
1705 data |= (((uint64_t)4ULL) << 40);
1708 data = vcpu->arch.efer;
1710 case MSR_KVM_WALL_CLOCK:
1711 case MSR_KVM_WALL_CLOCK_NEW:
1712 data = vcpu->kvm->arch.wall_clock;
1714 case MSR_KVM_SYSTEM_TIME:
1715 case MSR_KVM_SYSTEM_TIME_NEW:
1716 data = vcpu->arch.time;
1718 case MSR_IA32_P5_MC_ADDR:
1719 case MSR_IA32_P5_MC_TYPE:
1720 case MSR_IA32_MCG_CAP:
1721 case MSR_IA32_MCG_CTL:
1722 case MSR_IA32_MCG_STATUS:
1723 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1724 return get_msr_mce(vcpu, msr, pdata);
1725 case MSR_K7_CLK_CTL:
1727 * Provide expected ramp-up count for K7. All other
1728 * are set to zero, indicating minimum divisors for
1731 * This prevents guest kernels on AMD host with CPU
1732 * type 6, model 8 and higher from exploding due to
1733 * the rdmsr failing.
1737 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1738 if (kvm_hv_msr_partition_wide(msr)) {
1740 mutex_lock(&vcpu->kvm->lock);
1741 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1742 mutex_unlock(&vcpu->kvm->lock);
1745 return get_msr_hyperv(vcpu, msr, pdata);
1749 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1752 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1760 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1763 * Read or write a bunch of msrs. All parameters are kernel addresses.
1765 * @return number of msrs set successfully.
1767 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1768 struct kvm_msr_entry *entries,
1769 int (*do_msr)(struct kvm_vcpu *vcpu,
1770 unsigned index, u64 *data))
1774 idx = srcu_read_lock(&vcpu->kvm->srcu);
1775 for (i = 0; i < msrs->nmsrs; ++i)
1776 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1778 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1784 * Read or write a bunch of msrs. Parameters are user addresses.
1786 * @return number of msrs set successfully.
1788 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1789 int (*do_msr)(struct kvm_vcpu *vcpu,
1790 unsigned index, u64 *data),
1793 struct kvm_msrs msrs;
1794 struct kvm_msr_entry *entries;
1799 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1803 if (msrs.nmsrs >= MAX_IO_MSRS)
1807 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1808 entries = kmalloc(size, GFP_KERNEL);
1813 if (copy_from_user(entries, user_msrs->entries, size))
1816 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1821 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1832 int kvm_dev_ioctl_check_extension(long ext)
1837 case KVM_CAP_IRQCHIP:
1839 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1840 case KVM_CAP_SET_TSS_ADDR:
1841 case KVM_CAP_EXT_CPUID:
1842 case KVM_CAP_CLOCKSOURCE:
1844 case KVM_CAP_NOP_IO_DELAY:
1845 case KVM_CAP_MP_STATE:
1846 case KVM_CAP_SYNC_MMU:
1847 case KVM_CAP_REINJECT_CONTROL:
1848 case KVM_CAP_IRQ_INJECT_STATUS:
1849 case KVM_CAP_ASSIGN_DEV_IRQ:
1851 case KVM_CAP_IOEVENTFD:
1853 case KVM_CAP_PIT_STATE2:
1854 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1855 case KVM_CAP_XEN_HVM:
1856 case KVM_CAP_ADJUST_CLOCK:
1857 case KVM_CAP_VCPU_EVENTS:
1858 case KVM_CAP_HYPERV:
1859 case KVM_CAP_HYPERV_VAPIC:
1860 case KVM_CAP_HYPERV_SPIN:
1861 case KVM_CAP_PCI_SEGMENT:
1862 case KVM_CAP_DEBUGREGS:
1863 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1867 case KVM_CAP_COALESCED_MMIO:
1868 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1871 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1873 case KVM_CAP_NR_VCPUS:
1876 case KVM_CAP_NR_MEMSLOTS:
1877 r = KVM_MEMORY_SLOTS;
1879 case KVM_CAP_PV_MMU: /* obsolete */
1886 r = KVM_MAX_MCE_BANKS;
1899 long kvm_arch_dev_ioctl(struct file *filp,
1900 unsigned int ioctl, unsigned long arg)
1902 void __user *argp = (void __user *)arg;
1906 case KVM_GET_MSR_INDEX_LIST: {
1907 struct kvm_msr_list __user *user_msr_list = argp;
1908 struct kvm_msr_list msr_list;
1912 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1915 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1916 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1919 if (n < msr_list.nmsrs)
1922 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1923 num_msrs_to_save * sizeof(u32)))
1925 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1927 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1932 case KVM_GET_SUPPORTED_CPUID: {
1933 struct kvm_cpuid2 __user *cpuid_arg = argp;
1934 struct kvm_cpuid2 cpuid;
1937 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1939 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1940 cpuid_arg->entries);
1945 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1950 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1953 mce_cap = KVM_MCE_CAP_SUPPORTED;
1955 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1967 static void wbinvd_ipi(void *garbage)
1972 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
1974 return vcpu->kvm->arch.iommu_domain &&
1975 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
1978 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1980 /* Address WBINVD may be executed by guest */
1981 if (need_emulate_wbinvd(vcpu)) {
1982 if (kvm_x86_ops->has_wbinvd_exit())
1983 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
1984 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
1985 smp_call_function_single(vcpu->cpu,
1986 wbinvd_ipi, NULL, 1);
1989 kvm_x86_ops->vcpu_load(vcpu, cpu);
1990 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
1991 /* Make sure TSC doesn't go backwards */
1992 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
1993 native_read_tsc() - vcpu->arch.last_host_tsc;
1995 mark_tsc_unstable("KVM discovered backwards TSC");
1996 if (check_tsc_unstable())
1997 kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
1998 kvm_migrate_timers(vcpu);
2003 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2005 kvm_x86_ops->vcpu_put(vcpu);
2006 kvm_put_guest_fpu(vcpu);
2007 vcpu->arch.last_host_tsc = native_read_tsc();
2010 static int is_efer_nx(void)
2012 unsigned long long efer = 0;
2014 rdmsrl_safe(MSR_EFER, &efer);
2015 return efer & EFER_NX;
2018 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2021 struct kvm_cpuid_entry2 *e, *entry;
2024 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2025 e = &vcpu->arch.cpuid_entries[i];
2026 if (e->function == 0x80000001) {
2031 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2032 entry->edx &= ~(1 << 20);
2033 printk(KERN_INFO "kvm: guest NX capability removed\n");
2037 /* when an old userspace process fills a new kernel module */
2038 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2039 struct kvm_cpuid *cpuid,
2040 struct kvm_cpuid_entry __user *entries)
2043 struct kvm_cpuid_entry *cpuid_entries;
2046 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2049 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2053 if (copy_from_user(cpuid_entries, entries,
2054 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2056 for (i = 0; i < cpuid->nent; i++) {
2057 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2058 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2059 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2060 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2061 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2062 vcpu->arch.cpuid_entries[i].index = 0;
2063 vcpu->arch.cpuid_entries[i].flags = 0;
2064 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2065 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2066 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2068 vcpu->arch.cpuid_nent = cpuid->nent;
2069 cpuid_fix_nx_cap(vcpu);
2071 kvm_apic_set_version(vcpu);
2072 kvm_x86_ops->cpuid_update(vcpu);
2076 vfree(cpuid_entries);
2081 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2082 struct kvm_cpuid2 *cpuid,
2083 struct kvm_cpuid_entry2 __user *entries)
2088 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2091 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2092 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2094 vcpu->arch.cpuid_nent = cpuid->nent;
2095 kvm_apic_set_version(vcpu);
2096 kvm_x86_ops->cpuid_update(vcpu);
2104 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2105 struct kvm_cpuid2 *cpuid,
2106 struct kvm_cpuid_entry2 __user *entries)
2111 if (cpuid->nent < vcpu->arch.cpuid_nent)
2114 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2115 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2120 cpuid->nent = vcpu->arch.cpuid_nent;
2124 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2127 entry->function = function;
2128 entry->index = index;
2129 cpuid_count(entry->function, entry->index,
2130 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2134 #define F(x) bit(X86_FEATURE_##x)
2136 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2137 u32 index, int *nent, int maxnent)
2139 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2140 #ifdef CONFIG_X86_64
2141 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2143 unsigned f_lm = F(LM);
2145 unsigned f_gbpages = 0;
2148 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2151 const u32 kvm_supported_word0_x86_features =
2152 F(FPU) | F(VME) | F(DE) | F(PSE) |
2153 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2154 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2155 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2156 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2157 0 /* Reserved, DS, ACPI */ | F(MMX) |
2158 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2159 0 /* HTT, TM, Reserved, PBE */;
2160 /* cpuid 0x80000001.edx */
2161 const u32 kvm_supported_word1_x86_features =
2162 F(FPU) | F(VME) | F(DE) | F(PSE) |
2163 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2164 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2165 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2166 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2167 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2168 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2169 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2171 const u32 kvm_supported_word4_x86_features =
2172 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2173 0 /* DS-CPL, VMX, SMX, EST */ |
2174 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2175 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2176 0 /* Reserved, DCA */ | F(XMM4_1) |
2177 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2178 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
2179 /* cpuid 0x80000001.ecx */
2180 const u32 kvm_supported_word6_x86_features =
2181 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
2182 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2183 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
2184 0 /* SKINIT */ | 0 /* WDT */;
2186 /* all calls to cpuid_count() should be made on the same cpu */
2188 do_cpuid_1_ent(entry, function, index);
2193 entry->eax = min(entry->eax, (u32)0xd);
2196 entry->edx &= kvm_supported_word0_x86_features;
2197 entry->ecx &= kvm_supported_word4_x86_features;
2198 /* we support x2apic emulation even if host does not support
2199 * it since we emulate x2apic in software */
2200 entry->ecx |= F(X2APIC);
2202 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2203 * may return different values. This forces us to get_cpu() before
2204 * issuing the first command, and also to emulate this annoying behavior
2205 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2207 int t, times = entry->eax & 0xff;
2209 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2210 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2211 for (t = 1; t < times && *nent < maxnent; ++t) {
2212 do_cpuid_1_ent(&entry[t], function, 0);
2213 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2218 /* function 4 and 0xb have additional index. */
2222 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2223 /* read more entries until cache_type is zero */
2224 for (i = 1; *nent < maxnent; ++i) {
2225 cache_type = entry[i - 1].eax & 0x1f;
2228 do_cpuid_1_ent(&entry[i], function, i);
2230 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2238 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2239 /* read more entries until level_type is zero */
2240 for (i = 1; *nent < maxnent; ++i) {
2241 level_type = entry[i - 1].ecx & 0xff00;
2244 do_cpuid_1_ent(&entry[i], function, i);
2246 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2254 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2255 for (i = 1; *nent < maxnent; ++i) {
2256 if (entry[i - 1].eax == 0 && i != 2)
2258 do_cpuid_1_ent(&entry[i], function, i);
2260 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2265 case KVM_CPUID_SIGNATURE: {
2266 char signature[12] = "KVMKVMKVM\0\0";
2267 u32 *sigptr = (u32 *)signature;
2269 entry->ebx = sigptr[0];
2270 entry->ecx = sigptr[1];
2271 entry->edx = sigptr[2];
2274 case KVM_CPUID_FEATURES:
2275 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2276 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2277 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2278 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2284 entry->eax = min(entry->eax, 0x8000001a);
2287 entry->edx &= kvm_supported_word1_x86_features;
2288 entry->ecx &= kvm_supported_word6_x86_features;
2292 kvm_x86_ops->set_supported_cpuid(function, entry);
2299 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2300 struct kvm_cpuid_entry2 __user *entries)
2302 struct kvm_cpuid_entry2 *cpuid_entries;
2303 int limit, nent = 0, r = -E2BIG;
2306 if (cpuid->nent < 1)
2308 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2309 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2311 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2315 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2316 limit = cpuid_entries[0].eax;
2317 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2318 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2319 &nent, cpuid->nent);
2321 if (nent >= cpuid->nent)
2324 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2325 limit = cpuid_entries[nent - 1].eax;
2326 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2327 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2328 &nent, cpuid->nent);
2333 if (nent >= cpuid->nent)
2336 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2340 if (nent >= cpuid->nent)
2343 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2347 if (nent >= cpuid->nent)
2351 if (copy_to_user(entries, cpuid_entries,
2352 nent * sizeof(struct kvm_cpuid_entry2)))
2358 vfree(cpuid_entries);
2363 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2364 struct kvm_lapic_state *s)
2366 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2371 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2372 struct kvm_lapic_state *s)
2374 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2375 kvm_apic_post_state_restore(vcpu);
2376 update_cr8_intercept(vcpu);
2381 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2382 struct kvm_interrupt *irq)
2384 if (irq->irq < 0 || irq->irq >= 256)
2386 if (irqchip_in_kernel(vcpu->kvm))
2389 kvm_queue_interrupt(vcpu, irq->irq, false);
2394 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2396 kvm_inject_nmi(vcpu);
2401 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2402 struct kvm_tpr_access_ctl *tac)
2406 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2410 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2414 unsigned bank_num = mcg_cap & 0xff, bank;
2417 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2419 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2422 vcpu->arch.mcg_cap = mcg_cap;
2423 /* Init IA32_MCG_CTL to all 1s */
2424 if (mcg_cap & MCG_CTL_P)
2425 vcpu->arch.mcg_ctl = ~(u64)0;
2426 /* Init IA32_MCi_CTL to all 1s */
2427 for (bank = 0; bank < bank_num; bank++)
2428 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2433 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2434 struct kvm_x86_mce *mce)
2436 u64 mcg_cap = vcpu->arch.mcg_cap;
2437 unsigned bank_num = mcg_cap & 0xff;
2438 u64 *banks = vcpu->arch.mce_banks;
2440 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2443 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2444 * reporting is disabled
2446 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2447 vcpu->arch.mcg_ctl != ~(u64)0)
2449 banks += 4 * mce->bank;
2451 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2452 * reporting is disabled for the bank
2454 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2456 if (mce->status & MCI_STATUS_UC) {
2457 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2458 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2459 printk(KERN_DEBUG "kvm: set_mce: "
2460 "injects mce exception while "
2461 "previous one is in progress!\n");
2462 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2465 if (banks[1] & MCI_STATUS_VAL)
2466 mce->status |= MCI_STATUS_OVER;
2467 banks[2] = mce->addr;
2468 banks[3] = mce->misc;
2469 vcpu->arch.mcg_status = mce->mcg_status;
2470 banks[1] = mce->status;
2471 kvm_queue_exception(vcpu, MC_VECTOR);
2472 } else if (!(banks[1] & MCI_STATUS_VAL)
2473 || !(banks[1] & MCI_STATUS_UC)) {
2474 if (banks[1] & MCI_STATUS_VAL)
2475 mce->status |= MCI_STATUS_OVER;
2476 banks[2] = mce->addr;
2477 banks[3] = mce->misc;
2478 banks[1] = mce->status;
2480 banks[1] |= MCI_STATUS_OVER;
2484 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2485 struct kvm_vcpu_events *events)
2487 events->exception.injected =
2488 vcpu->arch.exception.pending &&
2489 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2490 events->exception.nr = vcpu->arch.exception.nr;
2491 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2492 events->exception.error_code = vcpu->arch.exception.error_code;
2494 events->interrupt.injected =
2495 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2496 events->interrupt.nr = vcpu->arch.interrupt.nr;
2497 events->interrupt.soft = 0;
2498 events->interrupt.shadow =
2499 kvm_x86_ops->get_interrupt_shadow(vcpu,
2500 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2502 events->nmi.injected = vcpu->arch.nmi_injected;
2503 events->nmi.pending = vcpu->arch.nmi_pending;
2504 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2506 events->sipi_vector = vcpu->arch.sipi_vector;
2508 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2509 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2510 | KVM_VCPUEVENT_VALID_SHADOW);
2513 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2514 struct kvm_vcpu_events *events)
2516 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2517 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2518 | KVM_VCPUEVENT_VALID_SHADOW))
2521 vcpu->arch.exception.pending = events->exception.injected;
2522 vcpu->arch.exception.nr = events->exception.nr;
2523 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2524 vcpu->arch.exception.error_code = events->exception.error_code;
2526 vcpu->arch.interrupt.pending = events->interrupt.injected;
2527 vcpu->arch.interrupt.nr = events->interrupt.nr;
2528 vcpu->arch.interrupt.soft = events->interrupt.soft;
2529 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2530 kvm_pic_clear_isr_ack(vcpu->kvm);
2531 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2532 kvm_x86_ops->set_interrupt_shadow(vcpu,
2533 events->interrupt.shadow);
2535 vcpu->arch.nmi_injected = events->nmi.injected;
2536 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2537 vcpu->arch.nmi_pending = events->nmi.pending;
2538 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2540 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2541 vcpu->arch.sipi_vector = events->sipi_vector;
2546 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2547 struct kvm_debugregs *dbgregs)
2549 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2550 dbgregs->dr6 = vcpu->arch.dr6;
2551 dbgregs->dr7 = vcpu->arch.dr7;
2555 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2556 struct kvm_debugregs *dbgregs)
2561 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2562 vcpu->arch.dr6 = dbgregs->dr6;
2563 vcpu->arch.dr7 = dbgregs->dr7;
2568 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2569 struct kvm_xsave *guest_xsave)
2572 memcpy(guest_xsave->region,
2573 &vcpu->arch.guest_fpu.state->xsave,
2576 memcpy(guest_xsave->region,
2577 &vcpu->arch.guest_fpu.state->fxsave,
2578 sizeof(struct i387_fxsave_struct));
2579 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2584 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2585 struct kvm_xsave *guest_xsave)
2588 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2591 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2592 guest_xsave->region, xstate_size);
2594 if (xstate_bv & ~XSTATE_FPSSE)
2596 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2597 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2602 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2603 struct kvm_xcrs *guest_xcrs)
2605 if (!cpu_has_xsave) {
2606 guest_xcrs->nr_xcrs = 0;
2610 guest_xcrs->nr_xcrs = 1;
2611 guest_xcrs->flags = 0;
2612 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2613 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2616 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2617 struct kvm_xcrs *guest_xcrs)
2624 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2627 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2628 /* Only support XCR0 currently */
2629 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2630 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2631 guest_xcrs->xcrs[0].value);
2639 long kvm_arch_vcpu_ioctl(struct file *filp,
2640 unsigned int ioctl, unsigned long arg)
2642 struct kvm_vcpu *vcpu = filp->private_data;
2643 void __user *argp = (void __user *)arg;
2646 struct kvm_lapic_state *lapic;
2647 struct kvm_xsave *xsave;
2648 struct kvm_xcrs *xcrs;
2654 case KVM_GET_LAPIC: {
2656 if (!vcpu->arch.apic)
2658 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2663 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2667 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2672 case KVM_SET_LAPIC: {
2674 if (!vcpu->arch.apic)
2676 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2681 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2683 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2689 case KVM_INTERRUPT: {
2690 struct kvm_interrupt irq;
2693 if (copy_from_user(&irq, argp, sizeof irq))
2695 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2702 r = kvm_vcpu_ioctl_nmi(vcpu);
2708 case KVM_SET_CPUID: {
2709 struct kvm_cpuid __user *cpuid_arg = argp;
2710 struct kvm_cpuid cpuid;
2713 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2715 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2720 case KVM_SET_CPUID2: {
2721 struct kvm_cpuid2 __user *cpuid_arg = argp;
2722 struct kvm_cpuid2 cpuid;
2725 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2727 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2728 cpuid_arg->entries);
2733 case KVM_GET_CPUID2: {
2734 struct kvm_cpuid2 __user *cpuid_arg = argp;
2735 struct kvm_cpuid2 cpuid;
2738 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2740 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2741 cpuid_arg->entries);
2745 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2751 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2754 r = msr_io(vcpu, argp, do_set_msr, 0);
2756 case KVM_TPR_ACCESS_REPORTING: {
2757 struct kvm_tpr_access_ctl tac;
2760 if (copy_from_user(&tac, argp, sizeof tac))
2762 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2766 if (copy_to_user(argp, &tac, sizeof tac))
2771 case KVM_SET_VAPIC_ADDR: {
2772 struct kvm_vapic_addr va;
2775 if (!irqchip_in_kernel(vcpu->kvm))
2778 if (copy_from_user(&va, argp, sizeof va))
2781 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2784 case KVM_X86_SETUP_MCE: {
2788 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2790 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2793 case KVM_X86_SET_MCE: {
2794 struct kvm_x86_mce mce;
2797 if (copy_from_user(&mce, argp, sizeof mce))
2799 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2802 case KVM_GET_VCPU_EVENTS: {
2803 struct kvm_vcpu_events events;
2805 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2808 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2813 case KVM_SET_VCPU_EVENTS: {
2814 struct kvm_vcpu_events events;
2817 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2820 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2823 case KVM_GET_DEBUGREGS: {
2824 struct kvm_debugregs dbgregs;
2826 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2829 if (copy_to_user(argp, &dbgregs,
2830 sizeof(struct kvm_debugregs)))
2835 case KVM_SET_DEBUGREGS: {
2836 struct kvm_debugregs dbgregs;
2839 if (copy_from_user(&dbgregs, argp,
2840 sizeof(struct kvm_debugregs)))
2843 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2846 case KVM_GET_XSAVE: {
2847 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2852 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2855 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2860 case KVM_SET_XSAVE: {
2861 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2867 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2870 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2873 case KVM_GET_XCRS: {
2874 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2879 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2882 if (copy_to_user(argp, u.xcrs,
2883 sizeof(struct kvm_xcrs)))
2888 case KVM_SET_XCRS: {
2889 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2895 if (copy_from_user(u.xcrs, argp,
2896 sizeof(struct kvm_xcrs)))
2899 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2910 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2914 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2916 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2920 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2923 kvm->arch.ept_identity_map_addr = ident_addr;
2927 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2928 u32 kvm_nr_mmu_pages)
2930 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2933 mutex_lock(&kvm->slots_lock);
2934 spin_lock(&kvm->mmu_lock);
2936 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2937 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2939 spin_unlock(&kvm->mmu_lock);
2940 mutex_unlock(&kvm->slots_lock);
2944 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2946 return kvm->arch.n_max_mmu_pages;
2949 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2954 switch (chip->chip_id) {
2955 case KVM_IRQCHIP_PIC_MASTER:
2956 memcpy(&chip->chip.pic,
2957 &pic_irqchip(kvm)->pics[0],
2958 sizeof(struct kvm_pic_state));
2960 case KVM_IRQCHIP_PIC_SLAVE:
2961 memcpy(&chip->chip.pic,
2962 &pic_irqchip(kvm)->pics[1],
2963 sizeof(struct kvm_pic_state));
2965 case KVM_IRQCHIP_IOAPIC:
2966 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2975 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2980 switch (chip->chip_id) {
2981 case KVM_IRQCHIP_PIC_MASTER:
2982 raw_spin_lock(&pic_irqchip(kvm)->lock);
2983 memcpy(&pic_irqchip(kvm)->pics[0],
2985 sizeof(struct kvm_pic_state));
2986 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2988 case KVM_IRQCHIP_PIC_SLAVE:
2989 raw_spin_lock(&pic_irqchip(kvm)->lock);
2990 memcpy(&pic_irqchip(kvm)->pics[1],
2992 sizeof(struct kvm_pic_state));
2993 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2995 case KVM_IRQCHIP_IOAPIC:
2996 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3002 kvm_pic_update_irq(pic_irqchip(kvm));
3006 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3010 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3011 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3012 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3016 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3020 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3021 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3022 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3023 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3027 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3031 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3032 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3033 sizeof(ps->channels));
3034 ps->flags = kvm->arch.vpit->pit_state.flags;
3035 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3039 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3041 int r = 0, start = 0;
3042 u32 prev_legacy, cur_legacy;
3043 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3044 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3045 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3046 if (!prev_legacy && cur_legacy)
3048 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3049 sizeof(kvm->arch.vpit->pit_state.channels));
3050 kvm->arch.vpit->pit_state.flags = ps->flags;
3051 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3052 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3056 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3057 struct kvm_reinject_control *control)
3059 if (!kvm->arch.vpit)
3061 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3062 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3063 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3068 * Get (and clear) the dirty memory log for a memory slot.
3070 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3071 struct kvm_dirty_log *log)
3074 struct kvm_memory_slot *memslot;
3076 unsigned long is_dirty = 0;
3078 mutex_lock(&kvm->slots_lock);
3081 if (log->slot >= KVM_MEMORY_SLOTS)
3084 memslot = &kvm->memslots->memslots[log->slot];
3086 if (!memslot->dirty_bitmap)
3089 n = kvm_dirty_bitmap_bytes(memslot);
3091 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3092 is_dirty = memslot->dirty_bitmap[i];
3094 /* If nothing is dirty, don't bother messing with page tables. */
3096 struct kvm_memslots *slots, *old_slots;
3097 unsigned long *dirty_bitmap;
3099 spin_lock(&kvm->mmu_lock);
3100 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3101 spin_unlock(&kvm->mmu_lock);
3104 dirty_bitmap = vmalloc(n);
3107 memset(dirty_bitmap, 0, n);
3110 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3112 vfree(dirty_bitmap);
3115 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3116 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3118 old_slots = kvm->memslots;
3119 rcu_assign_pointer(kvm->memslots, slots);
3120 synchronize_srcu_expedited(&kvm->srcu);
3121 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3125 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3126 vfree(dirty_bitmap);
3129 vfree(dirty_bitmap);
3132 if (clear_user(log->dirty_bitmap, n))
3138 mutex_unlock(&kvm->slots_lock);
3142 long kvm_arch_vm_ioctl(struct file *filp,
3143 unsigned int ioctl, unsigned long arg)
3145 struct kvm *kvm = filp->private_data;
3146 void __user *argp = (void __user *)arg;
3149 * This union makes it completely explicit to gcc-3.x
3150 * that these two variables' stack usage should be
3151 * combined, not added together.
3154 struct kvm_pit_state ps;
3155 struct kvm_pit_state2 ps2;
3156 struct kvm_pit_config pit_config;
3160 case KVM_SET_TSS_ADDR:
3161 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3165 case KVM_SET_IDENTITY_MAP_ADDR: {
3169 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3171 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3176 case KVM_SET_NR_MMU_PAGES:
3177 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3181 case KVM_GET_NR_MMU_PAGES:
3182 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3184 case KVM_CREATE_IRQCHIP: {
3185 struct kvm_pic *vpic;
3187 mutex_lock(&kvm->lock);
3190 goto create_irqchip_unlock;
3192 vpic = kvm_create_pic(kvm);
3194 r = kvm_ioapic_init(kvm);
3196 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3199 goto create_irqchip_unlock;
3202 goto create_irqchip_unlock;
3204 kvm->arch.vpic = vpic;
3206 r = kvm_setup_default_irq_routing(kvm);
3208 mutex_lock(&kvm->irq_lock);
3209 kvm_ioapic_destroy(kvm);
3210 kvm_destroy_pic(kvm);
3211 mutex_unlock(&kvm->irq_lock);
3213 create_irqchip_unlock:
3214 mutex_unlock(&kvm->lock);
3217 case KVM_CREATE_PIT:
3218 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3220 case KVM_CREATE_PIT2:
3222 if (copy_from_user(&u.pit_config, argp,
3223 sizeof(struct kvm_pit_config)))
3226 mutex_lock(&kvm->slots_lock);
3229 goto create_pit_unlock;
3231 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3235 mutex_unlock(&kvm->slots_lock);
3237 case KVM_IRQ_LINE_STATUS:
3238 case KVM_IRQ_LINE: {
3239 struct kvm_irq_level irq_event;
3242 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3245 if (irqchip_in_kernel(kvm)) {
3247 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3248 irq_event.irq, irq_event.level);
3249 if (ioctl == KVM_IRQ_LINE_STATUS) {
3251 irq_event.status = status;
3252 if (copy_to_user(argp, &irq_event,
3260 case KVM_GET_IRQCHIP: {
3261 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3262 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3268 if (copy_from_user(chip, argp, sizeof *chip))
3269 goto get_irqchip_out;
3271 if (!irqchip_in_kernel(kvm))
3272 goto get_irqchip_out;
3273 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3275 goto get_irqchip_out;
3277 if (copy_to_user(argp, chip, sizeof *chip))
3278 goto get_irqchip_out;
3286 case KVM_SET_IRQCHIP: {
3287 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3288 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3294 if (copy_from_user(chip, argp, sizeof *chip))
3295 goto set_irqchip_out;
3297 if (!irqchip_in_kernel(kvm))
3298 goto set_irqchip_out;
3299 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3301 goto set_irqchip_out;
3311 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3314 if (!kvm->arch.vpit)
3316 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3320 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3327 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3330 if (!kvm->arch.vpit)
3332 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3338 case KVM_GET_PIT2: {
3340 if (!kvm->arch.vpit)
3342 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3346 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3351 case KVM_SET_PIT2: {
3353 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3356 if (!kvm->arch.vpit)
3358 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3364 case KVM_REINJECT_CONTROL: {
3365 struct kvm_reinject_control control;
3367 if (copy_from_user(&control, argp, sizeof(control)))
3369 r = kvm_vm_ioctl_reinject(kvm, &control);
3375 case KVM_XEN_HVM_CONFIG: {
3377 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3378 sizeof(struct kvm_xen_hvm_config)))
3381 if (kvm->arch.xen_hvm_config.flags)
3386 case KVM_SET_CLOCK: {
3387 struct kvm_clock_data user_ns;
3392 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3400 now_ns = get_kernel_ns();
3401 delta = user_ns.clock - now_ns;
3402 kvm->arch.kvmclock_offset = delta;
3405 case KVM_GET_CLOCK: {
3406 struct kvm_clock_data user_ns;
3409 now_ns = get_kernel_ns();
3410 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3414 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3427 static void kvm_init_msr_list(void)
3432 /* skip the first msrs in the list. KVM-specific */
3433 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3434 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3437 msrs_to_save[j] = msrs_to_save[i];
3440 num_msrs_to_save = j;
3443 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3446 if (vcpu->arch.apic &&
3447 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3450 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3453 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3455 if (vcpu->arch.apic &&
3456 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3459 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3462 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3463 struct kvm_segment *var, int seg)
3465 kvm_x86_ops->set_segment(vcpu, var, seg);
3468 void kvm_get_segment(struct kvm_vcpu *vcpu,
3469 struct kvm_segment *var, int seg)
3471 kvm_x86_ops->get_segment(vcpu, var, seg);
3474 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3479 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3481 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3482 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3485 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3487 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3488 access |= PFERR_FETCH_MASK;
3489 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3492 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3494 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3495 access |= PFERR_WRITE_MASK;
3496 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3499 /* uses this to access any guest's mapped memory without checking CPL */
3500 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3502 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3505 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3506 struct kvm_vcpu *vcpu, u32 access,
3510 int r = X86EMUL_CONTINUE;
3513 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3515 unsigned offset = addr & (PAGE_SIZE-1);
3516 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3519 if (gpa == UNMAPPED_GVA) {
3520 r = X86EMUL_PROPAGATE_FAULT;
3523 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3525 r = X86EMUL_IO_NEEDED;
3537 /* used for instruction fetching */
3538 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3539 struct kvm_vcpu *vcpu, u32 *error)
3541 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3542 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3543 access | PFERR_FETCH_MASK, error);
3546 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3547 struct kvm_vcpu *vcpu, u32 *error)
3549 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3550 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3554 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3555 struct kvm_vcpu *vcpu, u32 *error)
3557 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3560 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3562 struct kvm_vcpu *vcpu,
3566 int r = X86EMUL_CONTINUE;
3569 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3572 unsigned offset = addr & (PAGE_SIZE-1);
3573 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3576 if (gpa == UNMAPPED_GVA) {
3577 r = X86EMUL_PROPAGATE_FAULT;
3580 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3582 r = X86EMUL_IO_NEEDED;
3594 static int emulator_read_emulated(unsigned long addr,
3597 unsigned int *error_code,
3598 struct kvm_vcpu *vcpu)
3602 if (vcpu->mmio_read_completed) {
3603 memcpy(val, vcpu->mmio_data, bytes);
3604 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3605 vcpu->mmio_phys_addr, *(u64 *)val);
3606 vcpu->mmio_read_completed = 0;
3607 return X86EMUL_CONTINUE;
3610 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3612 if (gpa == UNMAPPED_GVA)
3613 return X86EMUL_PROPAGATE_FAULT;
3615 /* For APIC access vmexit */
3616 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3619 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3620 == X86EMUL_CONTINUE)
3621 return X86EMUL_CONTINUE;
3625 * Is this MMIO handled locally?
3627 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3628 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3629 return X86EMUL_CONTINUE;
3632 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3634 vcpu->mmio_needed = 1;
3635 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3636 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3637 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3638 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3640 return X86EMUL_IO_NEEDED;
3643 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3644 const void *val, int bytes)
3648 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3651 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3655 static int emulator_write_emulated_onepage(unsigned long addr,
3658 unsigned int *error_code,
3659 struct kvm_vcpu *vcpu)
3663 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3665 if (gpa == UNMAPPED_GVA)
3666 return X86EMUL_PROPAGATE_FAULT;
3668 /* For APIC access vmexit */
3669 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3672 if (emulator_write_phys(vcpu, gpa, val, bytes))
3673 return X86EMUL_CONTINUE;
3676 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3678 * Is this MMIO handled locally?
3680 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3681 return X86EMUL_CONTINUE;
3683 vcpu->mmio_needed = 1;
3684 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3685 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3686 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3687 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3688 memcpy(vcpu->run->mmio.data, val, bytes);
3690 return X86EMUL_CONTINUE;
3693 int emulator_write_emulated(unsigned long addr,
3696 unsigned int *error_code,
3697 struct kvm_vcpu *vcpu)
3699 /* Crossing a page boundary? */
3700 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3703 now = -addr & ~PAGE_MASK;
3704 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3706 if (rc != X86EMUL_CONTINUE)
3712 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3716 #define CMPXCHG_TYPE(t, ptr, old, new) \
3717 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3719 #ifdef CONFIG_X86_64
3720 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3722 # define CMPXCHG64(ptr, old, new) \
3723 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3726 static int emulator_cmpxchg_emulated(unsigned long addr,
3730 unsigned int *error_code,
3731 struct kvm_vcpu *vcpu)
3738 /* guests cmpxchg8b have to be emulated atomically */
3739 if (bytes > 8 || (bytes & (bytes - 1)))
3742 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3744 if (gpa == UNMAPPED_GVA ||
3745 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3748 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3751 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3752 if (is_error_page(page)) {
3753 kvm_release_page_clean(page);
3757 kaddr = kmap_atomic(page, KM_USER0);
3758 kaddr += offset_in_page(gpa);
3761 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3764 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3767 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3770 exchanged = CMPXCHG64(kaddr, old, new);
3775 kunmap_atomic(kaddr, KM_USER0);
3776 kvm_release_page_dirty(page);
3779 return X86EMUL_CMPXCHG_FAILED;
3781 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3783 return X86EMUL_CONTINUE;
3786 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3788 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3791 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3793 /* TODO: String I/O for in kernel device */
3796 if (vcpu->arch.pio.in)
3797 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3798 vcpu->arch.pio.size, pd);
3800 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3801 vcpu->arch.pio.port, vcpu->arch.pio.size,
3807 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3808 unsigned int count, struct kvm_vcpu *vcpu)
3810 if (vcpu->arch.pio.count)
3813 trace_kvm_pio(0, port, size, 1);
3815 vcpu->arch.pio.port = port;
3816 vcpu->arch.pio.in = 1;
3817 vcpu->arch.pio.count = count;
3818 vcpu->arch.pio.size = size;
3820 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3822 memcpy(val, vcpu->arch.pio_data, size * count);
3823 vcpu->arch.pio.count = 0;
3827 vcpu->run->exit_reason = KVM_EXIT_IO;
3828 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3829 vcpu->run->io.size = size;
3830 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3831 vcpu->run->io.count = count;
3832 vcpu->run->io.port = port;
3837 static int emulator_pio_out_emulated(int size, unsigned short port,
3838 const void *val, unsigned int count,
3839 struct kvm_vcpu *vcpu)
3841 trace_kvm_pio(1, port, size, 1);
3843 vcpu->arch.pio.port = port;
3844 vcpu->arch.pio.in = 0;
3845 vcpu->arch.pio.count = count;
3846 vcpu->arch.pio.size = size;
3848 memcpy(vcpu->arch.pio_data, val, size * count);
3850 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3851 vcpu->arch.pio.count = 0;
3855 vcpu->run->exit_reason = KVM_EXIT_IO;
3856 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3857 vcpu->run->io.size = size;
3858 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3859 vcpu->run->io.count = count;
3860 vcpu->run->io.port = port;
3865 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3867 return kvm_x86_ops->get_segment_base(vcpu, seg);
3870 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3872 kvm_mmu_invlpg(vcpu, address);
3873 return X86EMUL_CONTINUE;
3876 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3878 if (!need_emulate_wbinvd(vcpu))
3879 return X86EMUL_CONTINUE;
3881 if (kvm_x86_ops->has_wbinvd_exit()) {
3882 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3883 wbinvd_ipi, NULL, 1);
3884 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3887 return X86EMUL_CONTINUE;
3889 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3891 int emulate_clts(struct kvm_vcpu *vcpu)
3893 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3894 kvm_x86_ops->fpu_activate(vcpu);
3895 return X86EMUL_CONTINUE;
3898 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3900 return _kvm_get_dr(vcpu, dr, dest);
3903 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3906 return __kvm_set_dr(vcpu, dr, value);
3909 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3911 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3914 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3916 unsigned long value;
3920 value = kvm_read_cr0(vcpu);
3923 value = vcpu->arch.cr2;
3926 value = vcpu->arch.cr3;
3929 value = kvm_read_cr4(vcpu);
3932 value = kvm_get_cr8(vcpu);
3935 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3942 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3948 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3951 vcpu->arch.cr2 = val;
3954 res = kvm_set_cr3(vcpu, val);
3957 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3960 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3963 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3970 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3972 return kvm_x86_ops->get_cpl(vcpu);
3975 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3977 kvm_x86_ops->get_gdt(vcpu, dt);
3980 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3982 kvm_x86_ops->get_idt(vcpu, dt);
3985 static unsigned long emulator_get_cached_segment_base(int seg,
3986 struct kvm_vcpu *vcpu)
3988 return get_segment_base(vcpu, seg);
3991 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3992 struct kvm_vcpu *vcpu)
3994 struct kvm_segment var;
3996 kvm_get_segment(vcpu, &var, seg);
4003 set_desc_limit(desc, var.limit);
4004 set_desc_base(desc, (unsigned long)var.base);
4005 desc->type = var.type;
4007 desc->dpl = var.dpl;
4008 desc->p = var.present;
4009 desc->avl = var.avl;
4017 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4018 struct kvm_vcpu *vcpu)
4020 struct kvm_segment var;
4022 /* needed to preserve selector */
4023 kvm_get_segment(vcpu, &var, seg);
4025 var.base = get_desc_base(desc);
4026 var.limit = get_desc_limit(desc);
4028 var.limit = (var.limit << 12) | 0xfff;
4029 var.type = desc->type;
4030 var.present = desc->p;
4031 var.dpl = desc->dpl;
4036 var.avl = desc->avl;
4037 var.present = desc->p;
4038 var.unusable = !var.present;
4041 kvm_set_segment(vcpu, &var, seg);
4045 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4047 struct kvm_segment kvm_seg;
4049 kvm_get_segment(vcpu, &kvm_seg, seg);
4050 return kvm_seg.selector;
4053 static void emulator_set_segment_selector(u16 sel, int seg,
4054 struct kvm_vcpu *vcpu)
4056 struct kvm_segment kvm_seg;
4058 kvm_get_segment(vcpu, &kvm_seg, seg);
4059 kvm_seg.selector = sel;
4060 kvm_set_segment(vcpu, &kvm_seg, seg);
4063 static struct x86_emulate_ops emulate_ops = {
4064 .read_std = kvm_read_guest_virt_system,
4065 .write_std = kvm_write_guest_virt_system,
4066 .fetch = kvm_fetch_guest_virt,
4067 .read_emulated = emulator_read_emulated,
4068 .write_emulated = emulator_write_emulated,
4069 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4070 .pio_in_emulated = emulator_pio_in_emulated,
4071 .pio_out_emulated = emulator_pio_out_emulated,
4072 .get_cached_descriptor = emulator_get_cached_descriptor,
4073 .set_cached_descriptor = emulator_set_cached_descriptor,
4074 .get_segment_selector = emulator_get_segment_selector,
4075 .set_segment_selector = emulator_set_segment_selector,
4076 .get_cached_segment_base = emulator_get_cached_segment_base,
4077 .get_gdt = emulator_get_gdt,
4078 .get_idt = emulator_get_idt,
4079 .get_cr = emulator_get_cr,
4080 .set_cr = emulator_set_cr,
4081 .cpl = emulator_get_cpl,
4082 .get_dr = emulator_get_dr,
4083 .set_dr = emulator_set_dr,
4084 .set_msr = kvm_set_msr,
4085 .get_msr = kvm_get_msr,
4088 static void cache_all_regs(struct kvm_vcpu *vcpu)
4090 kvm_register_read(vcpu, VCPU_REGS_RAX);
4091 kvm_register_read(vcpu, VCPU_REGS_RSP);
4092 kvm_register_read(vcpu, VCPU_REGS_RIP);
4093 vcpu->arch.regs_dirty = ~0;
4096 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4098 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4100 * an sti; sti; sequence only disable interrupts for the first
4101 * instruction. So, if the last instruction, be it emulated or
4102 * not, left the system with the INT_STI flag enabled, it
4103 * means that the last instruction is an sti. We should not
4104 * leave the flag on in this case. The same goes for mov ss
4106 if (!(int_shadow & mask))
4107 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4110 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4112 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4113 if (ctxt->exception == PF_VECTOR)
4114 kvm_inject_page_fault(vcpu);
4115 else if (ctxt->error_code_valid)
4116 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4118 kvm_queue_exception(vcpu, ctxt->exception);
4121 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4123 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4126 cache_all_regs(vcpu);
4128 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4130 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4131 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4132 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4133 vcpu->arch.emulate_ctxt.mode =
4134 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4135 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4136 ? X86EMUL_MODE_VM86 : cs_l
4137 ? X86EMUL_MODE_PROT64 : cs_db
4138 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4139 memset(c, 0, sizeof(struct decode_cache));
4140 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4143 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4145 ++vcpu->stat.insn_emulation_fail;
4146 trace_kvm_emulate_insn_failed(vcpu);
4147 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4148 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4149 vcpu->run->internal.ndata = 0;
4150 kvm_queue_exception(vcpu, UD_VECTOR);
4151 return EMULATE_FAIL;
4154 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4162 * if emulation was due to access to shadowed page table
4163 * and it failed try to unshadow page and re-entetr the
4164 * guest to let CPU execute the instruction.
4166 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4169 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4171 if (gpa == UNMAPPED_GVA)
4172 return true; /* let cpu generate fault */
4174 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4180 int emulate_instruction(struct kvm_vcpu *vcpu,
4186 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4188 kvm_clear_exception_queue(vcpu);
4189 vcpu->arch.mmio_fault_cr2 = cr2;
4191 * TODO: fix emulate.c to use guest_read/write_register
4192 * instead of direct ->regs accesses, can save hundred cycles
4193 * on Intel for instructions that don't read/change RSP, for
4196 cache_all_regs(vcpu);
4198 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4199 init_emulate_ctxt(vcpu);
4200 vcpu->arch.emulate_ctxt.interruptibility = 0;
4201 vcpu->arch.emulate_ctxt.exception = -1;
4202 vcpu->arch.emulate_ctxt.perm_ok = false;
4204 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4205 trace_kvm_emulate_insn_start(vcpu);
4207 /* Only allow emulation of specific instructions on #UD
4208 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4209 if (emulation_type & EMULTYPE_TRAP_UD) {
4211 return EMULATE_FAIL;
4213 case 0x01: /* VMMCALL */
4214 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4215 return EMULATE_FAIL;
4217 case 0x34: /* sysenter */
4218 case 0x35: /* sysexit */
4219 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4220 return EMULATE_FAIL;
4222 case 0x05: /* syscall */
4223 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4224 return EMULATE_FAIL;
4227 return EMULATE_FAIL;
4230 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4231 return EMULATE_FAIL;
4234 ++vcpu->stat.insn_emulation;
4236 if (reexecute_instruction(vcpu, cr2))
4237 return EMULATE_DONE;
4238 if (emulation_type & EMULTYPE_SKIP)
4239 return EMULATE_FAIL;
4240 return handle_emulation_failure(vcpu);
4244 if (emulation_type & EMULTYPE_SKIP) {
4245 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4246 return EMULATE_DONE;
4249 /* this is needed for vmware backdor interface to work since it
4250 changes registers values during IO operation */
4251 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4254 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4256 if (r == EMULATION_FAILED) {
4257 if (reexecute_instruction(vcpu, cr2))
4258 return EMULATE_DONE;
4260 return handle_emulation_failure(vcpu);
4263 if (vcpu->arch.emulate_ctxt.exception >= 0) {
4264 inject_emulated_exception(vcpu);
4266 } else if (vcpu->arch.pio.count) {
4267 if (!vcpu->arch.pio.in)
4268 vcpu->arch.pio.count = 0;
4269 r = EMULATE_DO_MMIO;
4270 } else if (vcpu->mmio_needed) {
4271 if (vcpu->mmio_is_write)
4272 vcpu->mmio_needed = 0;
4273 r = EMULATE_DO_MMIO;
4274 } else if (r == EMULATION_RESTART)
4279 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4280 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4281 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4282 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4286 EXPORT_SYMBOL_GPL(emulate_instruction);
4288 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4290 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4291 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4292 /* do not return to emulator after return from userspace */
4293 vcpu->arch.pio.count = 0;
4296 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4298 static void tsc_bad(void *info)
4300 __get_cpu_var(cpu_tsc_khz) = 0;
4303 static void tsc_khz_changed(void *data)
4305 struct cpufreq_freqs *freq = data;
4306 unsigned long khz = 0;
4310 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4311 khz = cpufreq_quick_get(raw_smp_processor_id());
4314 __get_cpu_var(cpu_tsc_khz) = khz;
4317 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4320 struct cpufreq_freqs *freq = data;
4322 struct kvm_vcpu *vcpu;
4323 int i, send_ipi = 0;
4326 * We allow guests to temporarily run on slowing clocks,
4327 * provided we notify them after, or to run on accelerating
4328 * clocks, provided we notify them before. Thus time never
4331 * However, we have a problem. We can't atomically update
4332 * the frequency of a given CPU from this function; it is
4333 * merely a notifier, which can be called from any CPU.
4334 * Changing the TSC frequency at arbitrary points in time
4335 * requires a recomputation of local variables related to
4336 * the TSC for each VCPU. We must flag these local variables
4337 * to be updated and be sure the update takes place with the
4338 * new frequency before any guests proceed.
4340 * Unfortunately, the combination of hotplug CPU and frequency
4341 * change creates an intractable locking scenario; the order
4342 * of when these callouts happen is undefined with respect to
4343 * CPU hotplug, and they can race with each other. As such,
4344 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4345 * undefined; you can actually have a CPU frequency change take
4346 * place in between the computation of X and the setting of the
4347 * variable. To protect against this problem, all updates of
4348 * the per_cpu tsc_khz variable are done in an interrupt
4349 * protected IPI, and all callers wishing to update the value
4350 * must wait for a synchronous IPI to complete (which is trivial
4351 * if the caller is on the CPU already). This establishes the
4352 * necessary total order on variable updates.
4354 * Note that because a guest time update may take place
4355 * anytime after the setting of the VCPU's request bit, the
4356 * correct TSC value must be set before the request. However,
4357 * to ensure the update actually makes it to any guest which
4358 * starts running in hardware virtualization between the set
4359 * and the acquisition of the spinlock, we must also ping the
4360 * CPU after setting the request bit.
4364 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4366 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4369 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4371 spin_lock(&kvm_lock);
4372 list_for_each_entry(kvm, &vm_list, vm_list) {
4373 kvm_for_each_vcpu(i, vcpu, kvm) {
4374 if (vcpu->cpu != freq->cpu)
4376 if (!kvm_request_guest_time_update(vcpu))
4378 if (vcpu->cpu != smp_processor_id())
4382 spin_unlock(&kvm_lock);
4384 if (freq->old < freq->new && send_ipi) {
4386 * We upscale the frequency. Must make the guest
4387 * doesn't see old kvmclock values while running with
4388 * the new frequency, otherwise we risk the guest sees
4389 * time go backwards.
4391 * In case we update the frequency for another cpu
4392 * (which might be in guest context) send an interrupt
4393 * to kick the cpu out of guest context. Next time
4394 * guest context is entered kvmclock will be updated,
4395 * so the guest will not see stale values.
4397 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4402 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4403 .notifier_call = kvmclock_cpufreq_notifier
4406 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4407 unsigned long action, void *hcpu)
4409 unsigned int cpu = (unsigned long)hcpu;
4413 case CPU_DOWN_FAILED:
4414 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4416 case CPU_DOWN_PREPARE:
4417 smp_call_function_single(cpu, tsc_bad, NULL, 1);
4423 static struct notifier_block kvmclock_cpu_notifier_block = {
4424 .notifier_call = kvmclock_cpu_notifier,
4425 .priority = -INT_MAX
4428 static void kvm_timer_init(void)
4432 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4433 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4434 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4435 CPUFREQ_TRANSITION_NOTIFIER);
4437 for_each_online_cpu(cpu)
4438 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4441 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4443 static int kvm_is_in_guest(void)
4445 return percpu_read(current_vcpu) != NULL;
4448 static int kvm_is_user_mode(void)
4452 if (percpu_read(current_vcpu))
4453 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4455 return user_mode != 0;
4458 static unsigned long kvm_get_guest_ip(void)
4460 unsigned long ip = 0;
4462 if (percpu_read(current_vcpu))
4463 ip = kvm_rip_read(percpu_read(current_vcpu));
4468 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4469 .is_in_guest = kvm_is_in_guest,
4470 .is_user_mode = kvm_is_user_mode,
4471 .get_guest_ip = kvm_get_guest_ip,
4474 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4476 percpu_write(current_vcpu, vcpu);
4478 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4480 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4482 percpu_write(current_vcpu, NULL);
4484 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4486 int kvm_arch_init(void *opaque)
4489 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4492 printk(KERN_ERR "kvm: already loaded the other module\n");
4497 if (!ops->cpu_has_kvm_support()) {
4498 printk(KERN_ERR "kvm: no hardware support\n");
4502 if (ops->disabled_by_bios()) {
4503 printk(KERN_ERR "kvm: disabled by bios\n");
4508 r = kvm_mmu_module_init();
4512 kvm_init_msr_list();
4515 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4516 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4517 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4518 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4522 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4525 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4533 void kvm_arch_exit(void)
4535 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4537 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4538 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4539 CPUFREQ_TRANSITION_NOTIFIER);
4540 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4542 kvm_mmu_module_exit();
4545 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4547 ++vcpu->stat.halt_exits;
4548 if (irqchip_in_kernel(vcpu->kvm)) {
4549 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4552 vcpu->run->exit_reason = KVM_EXIT_HLT;
4556 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4558 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4561 if (is_long_mode(vcpu))
4564 return a0 | ((gpa_t)a1 << 32);
4567 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4569 u64 param, ingpa, outgpa, ret;
4570 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4571 bool fast, longmode;
4575 * hypercall generates UD from non zero cpl and real mode
4578 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4579 kvm_queue_exception(vcpu, UD_VECTOR);
4583 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4584 longmode = is_long_mode(vcpu) && cs_l == 1;
4587 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4588 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4589 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4590 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4591 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4592 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4594 #ifdef CONFIG_X86_64
4596 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4597 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4598 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4602 code = param & 0xffff;
4603 fast = (param >> 16) & 0x1;
4604 rep_cnt = (param >> 32) & 0xfff;
4605 rep_idx = (param >> 48) & 0xfff;
4607 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4610 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4611 kvm_vcpu_on_spin(vcpu);
4614 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4618 ret = res | (((u64)rep_done & 0xfff) << 32);
4620 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4622 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4623 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4629 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4631 unsigned long nr, a0, a1, a2, a3, ret;
4634 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4635 return kvm_hv_hypercall(vcpu);
4637 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4638 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4639 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4640 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4641 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4643 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4645 if (!is_long_mode(vcpu)) {
4653 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4659 case KVM_HC_VAPIC_POLL_IRQ:
4663 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4670 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4671 ++vcpu->stat.hypercalls;
4674 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4676 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4678 char instruction[3];
4679 unsigned long rip = kvm_rip_read(vcpu);
4682 * Blow out the MMU to ensure that no other VCPU has an active mapping
4683 * to ensure that the updated hypercall appears atomically across all
4686 kvm_mmu_zap_all(vcpu->kvm);
4688 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4690 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4693 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4695 struct desc_ptr dt = { limit, base };
4697 kvm_x86_ops->set_gdt(vcpu, &dt);
4700 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4702 struct desc_ptr dt = { limit, base };
4704 kvm_x86_ops->set_idt(vcpu, &dt);
4707 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4709 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4710 int j, nent = vcpu->arch.cpuid_nent;
4712 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4713 /* when no next entry is found, the current entry[i] is reselected */
4714 for (j = i + 1; ; j = (j + 1) % nent) {
4715 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4716 if (ej->function == e->function) {
4717 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4721 return 0; /* silence gcc, even though control never reaches here */
4724 /* find an entry with matching function, matching index (if needed), and that
4725 * should be read next (if it's stateful) */
4726 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4727 u32 function, u32 index)
4729 if (e->function != function)
4731 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4733 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4734 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4739 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4740 u32 function, u32 index)
4743 struct kvm_cpuid_entry2 *best = NULL;
4745 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4746 struct kvm_cpuid_entry2 *e;
4748 e = &vcpu->arch.cpuid_entries[i];
4749 if (is_matching_cpuid_entry(e, function, index)) {
4750 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4751 move_to_next_stateful_cpuid_entry(vcpu, i);
4756 * Both basic or both extended?
4758 if (((e->function ^ function) & 0x80000000) == 0)
4759 if (!best || e->function > best->function)
4764 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4766 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4768 struct kvm_cpuid_entry2 *best;
4770 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4771 if (!best || best->eax < 0x80000008)
4773 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4775 return best->eax & 0xff;
4780 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4782 u32 function, index;
4783 struct kvm_cpuid_entry2 *best;
4785 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4786 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4787 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4788 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4789 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4790 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4791 best = kvm_find_cpuid_entry(vcpu, function, index);
4793 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4794 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4795 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4796 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4798 kvm_x86_ops->skip_emulated_instruction(vcpu);
4799 trace_kvm_cpuid(function,
4800 kvm_register_read(vcpu, VCPU_REGS_RAX),
4801 kvm_register_read(vcpu, VCPU_REGS_RBX),
4802 kvm_register_read(vcpu, VCPU_REGS_RCX),
4803 kvm_register_read(vcpu, VCPU_REGS_RDX));
4805 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4808 * Check if userspace requested an interrupt window, and that the
4809 * interrupt window is open.
4811 * No need to exit to userspace if we already have an interrupt queued.
4813 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4815 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4816 vcpu->run->request_interrupt_window &&
4817 kvm_arch_interrupt_allowed(vcpu));
4820 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4822 struct kvm_run *kvm_run = vcpu->run;
4824 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4825 kvm_run->cr8 = kvm_get_cr8(vcpu);
4826 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4827 if (irqchip_in_kernel(vcpu->kvm))
4828 kvm_run->ready_for_interrupt_injection = 1;
4830 kvm_run->ready_for_interrupt_injection =
4831 kvm_arch_interrupt_allowed(vcpu) &&
4832 !kvm_cpu_has_interrupt(vcpu) &&
4833 !kvm_event_needs_reinjection(vcpu);
4836 static void vapic_enter(struct kvm_vcpu *vcpu)
4838 struct kvm_lapic *apic = vcpu->arch.apic;
4841 if (!apic || !apic->vapic_addr)
4844 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4846 vcpu->arch.apic->vapic_page = page;
4849 static void vapic_exit(struct kvm_vcpu *vcpu)
4851 struct kvm_lapic *apic = vcpu->arch.apic;
4854 if (!apic || !apic->vapic_addr)
4857 idx = srcu_read_lock(&vcpu->kvm->srcu);
4858 kvm_release_page_dirty(apic->vapic_page);
4859 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4860 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4863 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4867 if (!kvm_x86_ops->update_cr8_intercept)
4870 if (!vcpu->arch.apic)
4873 if (!vcpu->arch.apic->vapic_addr)
4874 max_irr = kvm_lapic_find_highest_irr(vcpu);
4881 tpr = kvm_lapic_get_cr8(vcpu);
4883 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4886 static void inject_pending_event(struct kvm_vcpu *vcpu)
4888 /* try to reinject previous events if any */
4889 if (vcpu->arch.exception.pending) {
4890 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4891 vcpu->arch.exception.has_error_code,
4892 vcpu->arch.exception.error_code);
4893 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4894 vcpu->arch.exception.has_error_code,
4895 vcpu->arch.exception.error_code,
4896 vcpu->arch.exception.reinject);
4900 if (vcpu->arch.nmi_injected) {
4901 kvm_x86_ops->set_nmi(vcpu);
4905 if (vcpu->arch.interrupt.pending) {
4906 kvm_x86_ops->set_irq(vcpu);
4910 /* try to inject new event if pending */
4911 if (vcpu->arch.nmi_pending) {
4912 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4913 vcpu->arch.nmi_pending = false;
4914 vcpu->arch.nmi_injected = true;
4915 kvm_x86_ops->set_nmi(vcpu);
4917 } else if (kvm_cpu_has_interrupt(vcpu)) {
4918 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4919 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4921 kvm_x86_ops->set_irq(vcpu);
4926 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4928 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4929 !vcpu->guest_xcr0_loaded) {
4930 /* kvm_set_xcr() also depends on this */
4931 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4932 vcpu->guest_xcr0_loaded = 1;
4936 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4938 if (vcpu->guest_xcr0_loaded) {
4939 if (vcpu->arch.xcr0 != host_xcr0)
4940 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4941 vcpu->guest_xcr0_loaded = 0;
4945 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4948 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4949 vcpu->run->request_interrupt_window;
4951 if (vcpu->requests) {
4952 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
4953 kvm_mmu_unload(vcpu);
4954 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
4955 __kvm_migrate_timers(vcpu);
4956 if (kvm_check_request(KVM_REQ_KVMCLOCK_UPDATE, vcpu)) {
4957 r = kvm_write_guest_time(vcpu);
4961 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
4962 kvm_mmu_sync_roots(vcpu);
4963 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
4964 kvm_x86_ops->tlb_flush(vcpu);
4965 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
4966 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4970 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
4971 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4975 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
4976 vcpu->fpu_active = 0;
4977 kvm_x86_ops->fpu_deactivate(vcpu);
4981 r = kvm_mmu_reload(vcpu);
4987 kvm_x86_ops->prepare_guest_switch(vcpu);
4988 if (vcpu->fpu_active)
4989 kvm_load_guest_fpu(vcpu);
4990 kvm_load_guest_xcr0(vcpu);
4992 atomic_set(&vcpu->guest_mode, 1);
4995 local_irq_disable();
4997 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4998 || need_resched() || signal_pending(current)) {
4999 atomic_set(&vcpu->guest_mode, 0);
5007 inject_pending_event(vcpu);
5009 /* enable NMI/IRQ window open exits if needed */
5010 if (vcpu->arch.nmi_pending)
5011 kvm_x86_ops->enable_nmi_window(vcpu);
5012 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5013 kvm_x86_ops->enable_irq_window(vcpu);
5015 if (kvm_lapic_enabled(vcpu)) {
5016 update_cr8_intercept(vcpu);
5017 kvm_lapic_sync_to_vapic(vcpu);
5020 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5024 if (unlikely(vcpu->arch.switch_db_regs)) {
5026 set_debugreg(vcpu->arch.eff_db[0], 0);
5027 set_debugreg(vcpu->arch.eff_db[1], 1);
5028 set_debugreg(vcpu->arch.eff_db[2], 2);
5029 set_debugreg(vcpu->arch.eff_db[3], 3);
5032 trace_kvm_entry(vcpu->vcpu_id);
5033 kvm_x86_ops->run(vcpu);
5036 * If the guest has used debug registers, at least dr7
5037 * will be disabled while returning to the host.
5038 * If we don't have active breakpoints in the host, we don't
5039 * care about the messed up debug address registers. But if
5040 * we have some of them active, restore the old state.
5042 if (hw_breakpoint_active())
5043 hw_breakpoint_restore();
5045 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5047 atomic_set(&vcpu->guest_mode, 0);
5054 * We must have an instruction between local_irq_enable() and
5055 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5056 * the interrupt shadow. The stat.exits increment will do nicely.
5057 * But we need to prevent reordering, hence this barrier():
5065 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5068 * Profile KVM exit RIPs:
5070 if (unlikely(prof_on == KVM_PROFILING)) {
5071 unsigned long rip = kvm_rip_read(vcpu);
5072 profile_hit(KVM_PROFILING, (void *)rip);
5076 kvm_lapic_sync_from_vapic(vcpu);
5078 r = kvm_x86_ops->handle_exit(vcpu);
5084 static int __vcpu_run(struct kvm_vcpu *vcpu)
5087 struct kvm *kvm = vcpu->kvm;
5089 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5090 pr_debug("vcpu %d received sipi with vector # %x\n",
5091 vcpu->vcpu_id, vcpu->arch.sipi_vector);
5092 kvm_lapic_reset(vcpu);
5093 r = kvm_arch_vcpu_reset(vcpu);
5096 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5099 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5104 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
5105 r = vcpu_enter_guest(vcpu);
5107 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5108 kvm_vcpu_block(vcpu);
5109 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5110 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5112 switch(vcpu->arch.mp_state) {
5113 case KVM_MP_STATE_HALTED:
5114 vcpu->arch.mp_state =
5115 KVM_MP_STATE_RUNNABLE;
5116 case KVM_MP_STATE_RUNNABLE:
5118 case KVM_MP_STATE_SIPI_RECEIVED:
5129 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5130 if (kvm_cpu_has_pending_timer(vcpu))
5131 kvm_inject_pending_timer_irqs(vcpu);
5133 if (dm_request_for_irq_injection(vcpu)) {
5135 vcpu->run->exit_reason = KVM_EXIT_INTR;
5136 ++vcpu->stat.request_irq_exits;
5138 if (signal_pending(current)) {
5140 vcpu->run->exit_reason = KVM_EXIT_INTR;
5141 ++vcpu->stat.signal_exits;
5143 if (need_resched()) {
5144 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5146 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5150 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5157 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5162 if (vcpu->sigset_active)
5163 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5165 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5166 kvm_vcpu_block(vcpu);
5167 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5172 /* re-sync apic's tpr */
5173 if (!irqchip_in_kernel(vcpu->kvm))
5174 kvm_set_cr8(vcpu, kvm_run->cr8);
5176 if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5177 if (vcpu->mmio_needed) {
5178 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5179 vcpu->mmio_read_completed = 1;
5180 vcpu->mmio_needed = 0;
5182 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5183 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5184 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5185 if (r != EMULATE_DONE) {
5190 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5191 kvm_register_write(vcpu, VCPU_REGS_RAX,
5192 kvm_run->hypercall.ret);
5194 r = __vcpu_run(vcpu);
5197 post_kvm_run_save(vcpu);
5198 if (vcpu->sigset_active)
5199 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5204 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5206 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5207 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5208 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5209 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5210 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5211 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5212 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5213 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5214 #ifdef CONFIG_X86_64
5215 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5216 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5217 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5218 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5219 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5220 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5221 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5222 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5225 regs->rip = kvm_rip_read(vcpu);
5226 regs->rflags = kvm_get_rflags(vcpu);
5231 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5233 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5234 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5235 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5236 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5237 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5238 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5239 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5240 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5241 #ifdef CONFIG_X86_64
5242 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5243 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5244 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5245 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5246 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5247 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5248 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5249 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5252 kvm_rip_write(vcpu, regs->rip);
5253 kvm_set_rflags(vcpu, regs->rflags);
5255 vcpu->arch.exception.pending = false;
5260 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5262 struct kvm_segment cs;
5264 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5268 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5270 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5271 struct kvm_sregs *sregs)
5275 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5276 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5277 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5278 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5279 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5280 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5282 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5283 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5285 kvm_x86_ops->get_idt(vcpu, &dt);
5286 sregs->idt.limit = dt.size;
5287 sregs->idt.base = dt.address;
5288 kvm_x86_ops->get_gdt(vcpu, &dt);
5289 sregs->gdt.limit = dt.size;
5290 sregs->gdt.base = dt.address;
5292 sregs->cr0 = kvm_read_cr0(vcpu);
5293 sregs->cr2 = vcpu->arch.cr2;
5294 sregs->cr3 = vcpu->arch.cr3;
5295 sregs->cr4 = kvm_read_cr4(vcpu);
5296 sregs->cr8 = kvm_get_cr8(vcpu);
5297 sregs->efer = vcpu->arch.efer;
5298 sregs->apic_base = kvm_get_apic_base(vcpu);
5300 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5302 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5303 set_bit(vcpu->arch.interrupt.nr,
5304 (unsigned long *)sregs->interrupt_bitmap);
5309 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5310 struct kvm_mp_state *mp_state)
5312 mp_state->mp_state = vcpu->arch.mp_state;
5316 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5317 struct kvm_mp_state *mp_state)
5319 vcpu->arch.mp_state = mp_state->mp_state;
5323 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5324 bool has_error_code, u32 error_code)
5326 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5329 init_emulate_ctxt(vcpu);
5331 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5332 tss_selector, reason, has_error_code,
5336 return EMULATE_FAIL;
5338 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5339 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5340 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5341 return EMULATE_DONE;
5343 EXPORT_SYMBOL_GPL(kvm_task_switch);
5345 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5346 struct kvm_sregs *sregs)
5348 int mmu_reset_needed = 0;
5349 int pending_vec, max_bits;
5352 dt.size = sregs->idt.limit;
5353 dt.address = sregs->idt.base;
5354 kvm_x86_ops->set_idt(vcpu, &dt);
5355 dt.size = sregs->gdt.limit;
5356 dt.address = sregs->gdt.base;
5357 kvm_x86_ops->set_gdt(vcpu, &dt);
5359 vcpu->arch.cr2 = sregs->cr2;
5360 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5361 vcpu->arch.cr3 = sregs->cr3;
5363 kvm_set_cr8(vcpu, sregs->cr8);
5365 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5366 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5367 kvm_set_apic_base(vcpu, sregs->apic_base);
5369 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5370 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5371 vcpu->arch.cr0 = sregs->cr0;
5373 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5374 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5375 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5376 load_pdptrs(vcpu, vcpu->arch.cr3);
5377 mmu_reset_needed = 1;
5380 if (mmu_reset_needed)
5381 kvm_mmu_reset_context(vcpu);
5383 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5384 pending_vec = find_first_bit(
5385 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5386 if (pending_vec < max_bits) {
5387 kvm_queue_interrupt(vcpu, pending_vec, false);
5388 pr_debug("Set back pending irq %d\n", pending_vec);
5389 if (irqchip_in_kernel(vcpu->kvm))
5390 kvm_pic_clear_isr_ack(vcpu->kvm);
5393 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5394 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5395 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5396 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5397 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5398 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5400 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5401 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5403 update_cr8_intercept(vcpu);
5405 /* Older userspace won't unhalt the vcpu on reset. */
5406 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5407 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5409 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5414 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5415 struct kvm_guest_debug *dbg)
5417 unsigned long rflags;
5420 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5422 if (vcpu->arch.exception.pending)
5424 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5425 kvm_queue_exception(vcpu, DB_VECTOR);
5427 kvm_queue_exception(vcpu, BP_VECTOR);
5431 * Read rflags as long as potentially injected trace flags are still
5434 rflags = kvm_get_rflags(vcpu);
5436 vcpu->guest_debug = dbg->control;
5437 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5438 vcpu->guest_debug = 0;
5440 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5441 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5442 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5443 vcpu->arch.switch_db_regs =
5444 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5446 for (i = 0; i < KVM_NR_DB_REGS; i++)
5447 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5448 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5451 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5452 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5453 get_segment_base(vcpu, VCPU_SREG_CS);
5456 * Trigger an rflags update that will inject or remove the trace
5459 kvm_set_rflags(vcpu, rflags);
5461 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5471 * Translate a guest virtual address to a guest physical address.
5473 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5474 struct kvm_translation *tr)
5476 unsigned long vaddr = tr->linear_address;
5480 idx = srcu_read_lock(&vcpu->kvm->srcu);
5481 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5482 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5483 tr->physical_address = gpa;
5484 tr->valid = gpa != UNMAPPED_GVA;
5491 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5493 struct i387_fxsave_struct *fxsave =
5494 &vcpu->arch.guest_fpu.state->fxsave;
5496 memcpy(fpu->fpr, fxsave->st_space, 128);
5497 fpu->fcw = fxsave->cwd;
5498 fpu->fsw = fxsave->swd;
5499 fpu->ftwx = fxsave->twd;
5500 fpu->last_opcode = fxsave->fop;
5501 fpu->last_ip = fxsave->rip;
5502 fpu->last_dp = fxsave->rdp;
5503 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5508 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5510 struct i387_fxsave_struct *fxsave =
5511 &vcpu->arch.guest_fpu.state->fxsave;
5513 memcpy(fxsave->st_space, fpu->fpr, 128);
5514 fxsave->cwd = fpu->fcw;
5515 fxsave->swd = fpu->fsw;
5516 fxsave->twd = fpu->ftwx;
5517 fxsave->fop = fpu->last_opcode;
5518 fxsave->rip = fpu->last_ip;
5519 fxsave->rdp = fpu->last_dp;
5520 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5525 int fx_init(struct kvm_vcpu *vcpu)
5529 err = fpu_alloc(&vcpu->arch.guest_fpu);
5533 fpu_finit(&vcpu->arch.guest_fpu);
5536 * Ensure guest xcr0 is valid for loading
5538 vcpu->arch.xcr0 = XSTATE_FP;
5540 vcpu->arch.cr0 |= X86_CR0_ET;
5544 EXPORT_SYMBOL_GPL(fx_init);
5546 static void fx_free(struct kvm_vcpu *vcpu)
5548 fpu_free(&vcpu->arch.guest_fpu);
5551 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5553 if (vcpu->guest_fpu_loaded)
5557 * Restore all possible states in the guest,
5558 * and assume host would use all available bits.
5559 * Guest xcr0 would be loaded later.
5561 kvm_put_guest_xcr0(vcpu);
5562 vcpu->guest_fpu_loaded = 1;
5563 unlazy_fpu(current);
5564 fpu_restore_checking(&vcpu->arch.guest_fpu);
5568 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5570 kvm_put_guest_xcr0(vcpu);
5572 if (!vcpu->guest_fpu_loaded)
5575 vcpu->guest_fpu_loaded = 0;
5576 fpu_save_init(&vcpu->arch.guest_fpu);
5577 ++vcpu->stat.fpu_reload;
5578 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5582 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5584 if (vcpu->arch.time_page) {
5585 kvm_release_page_dirty(vcpu->arch.time_page);
5586 vcpu->arch.time_page = NULL;
5589 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5591 kvm_x86_ops->vcpu_free(vcpu);
5594 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5597 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5598 printk_once(KERN_WARNING
5599 "kvm: SMP vm created on host with unstable TSC; "
5600 "guest TSC will not be reliable\n");
5601 return kvm_x86_ops->vcpu_create(kvm, id);
5604 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5608 vcpu->arch.mtrr_state.have_fixed = 1;
5610 r = kvm_arch_vcpu_reset(vcpu);
5612 r = kvm_mmu_setup(vcpu);
5619 kvm_x86_ops->vcpu_free(vcpu);
5623 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5626 kvm_mmu_unload(vcpu);
5630 kvm_x86_ops->vcpu_free(vcpu);
5633 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5635 vcpu->arch.nmi_pending = false;
5636 vcpu->arch.nmi_injected = false;
5638 vcpu->arch.switch_db_regs = 0;
5639 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5640 vcpu->arch.dr6 = DR6_FIXED_1;
5641 vcpu->arch.dr7 = DR7_FIXED_1;
5643 return kvm_x86_ops->vcpu_reset(vcpu);
5646 int kvm_arch_hardware_enable(void *garbage)
5649 struct kvm_vcpu *vcpu;
5652 kvm_shared_msr_cpu_online();
5653 list_for_each_entry(kvm, &vm_list, vm_list)
5654 kvm_for_each_vcpu(i, vcpu, kvm)
5655 if (vcpu->cpu == smp_processor_id())
5656 kvm_request_guest_time_update(vcpu);
5657 return kvm_x86_ops->hardware_enable(garbage);
5660 void kvm_arch_hardware_disable(void *garbage)
5662 kvm_x86_ops->hardware_disable(garbage);
5663 drop_user_return_notifiers(garbage);
5666 int kvm_arch_hardware_setup(void)
5668 return kvm_x86_ops->hardware_setup();
5671 void kvm_arch_hardware_unsetup(void)
5673 kvm_x86_ops->hardware_unsetup();
5676 void kvm_arch_check_processor_compat(void *rtn)
5678 kvm_x86_ops->check_processor_compatibility(rtn);
5681 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5687 BUG_ON(vcpu->kvm == NULL);
5690 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5691 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5692 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5693 vcpu->arch.mmu.translate_gpa = translate_gpa;
5694 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5695 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5697 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5699 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5704 vcpu->arch.pio_data = page_address(page);
5706 r = kvm_mmu_create(vcpu);
5708 goto fail_free_pio_data;
5710 if (irqchip_in_kernel(kvm)) {
5711 r = kvm_create_lapic(vcpu);
5713 goto fail_mmu_destroy;
5716 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5718 if (!vcpu->arch.mce_banks) {
5720 goto fail_free_lapic;
5722 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5724 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5725 goto fail_free_mce_banks;
5728 fail_free_mce_banks:
5729 kfree(vcpu->arch.mce_banks);
5731 kvm_free_lapic(vcpu);
5733 kvm_mmu_destroy(vcpu);
5735 free_page((unsigned long)vcpu->arch.pio_data);
5740 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5744 kfree(vcpu->arch.mce_banks);
5745 kvm_free_lapic(vcpu);
5746 idx = srcu_read_lock(&vcpu->kvm->srcu);
5747 kvm_mmu_destroy(vcpu);
5748 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5749 free_page((unsigned long)vcpu->arch.pio_data);
5752 struct kvm *kvm_arch_create_vm(void)
5754 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5757 return ERR_PTR(-ENOMEM);
5759 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5760 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5762 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5763 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5765 spin_lock_init(&kvm->arch.tsc_write_lock);
5770 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5773 kvm_mmu_unload(vcpu);
5777 static void kvm_free_vcpus(struct kvm *kvm)
5780 struct kvm_vcpu *vcpu;
5783 * Unpin any mmu pages first.
5785 kvm_for_each_vcpu(i, vcpu, kvm)
5786 kvm_unload_vcpu_mmu(vcpu);
5787 kvm_for_each_vcpu(i, vcpu, kvm)
5788 kvm_arch_vcpu_free(vcpu);
5790 mutex_lock(&kvm->lock);
5791 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5792 kvm->vcpus[i] = NULL;
5794 atomic_set(&kvm->online_vcpus, 0);
5795 mutex_unlock(&kvm->lock);
5798 void kvm_arch_sync_events(struct kvm *kvm)
5800 kvm_free_all_assigned_devices(kvm);
5804 void kvm_arch_destroy_vm(struct kvm *kvm)
5806 kvm_iommu_unmap_guest(kvm);
5807 kfree(kvm->arch.vpic);
5808 kfree(kvm->arch.vioapic);
5809 kvm_free_vcpus(kvm);
5810 kvm_free_physmem(kvm);
5811 if (kvm->arch.apic_access_page)
5812 put_page(kvm->arch.apic_access_page);
5813 if (kvm->arch.ept_identity_pagetable)
5814 put_page(kvm->arch.ept_identity_pagetable);
5815 cleanup_srcu_struct(&kvm->srcu);
5819 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5820 struct kvm_memory_slot *memslot,
5821 struct kvm_memory_slot old,
5822 struct kvm_userspace_memory_region *mem,
5825 int npages = memslot->npages;
5826 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5828 /* Prevent internal slot pages from being moved by fork()/COW. */
5829 if (memslot->id >= KVM_MEMORY_SLOTS)
5830 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5832 /*To keep backward compatibility with older userspace,
5833 *x86 needs to hanlde !user_alloc case.
5836 if (npages && !old.rmap) {
5837 unsigned long userspace_addr;
5839 down_write(¤t->mm->mmap_sem);
5840 userspace_addr = do_mmap(NULL, 0,
5842 PROT_READ | PROT_WRITE,
5845 up_write(¤t->mm->mmap_sem);
5847 if (IS_ERR((void *)userspace_addr))
5848 return PTR_ERR((void *)userspace_addr);
5850 memslot->userspace_addr = userspace_addr;
5858 void kvm_arch_commit_memory_region(struct kvm *kvm,
5859 struct kvm_userspace_memory_region *mem,
5860 struct kvm_memory_slot old,
5864 int npages = mem->memory_size >> PAGE_SHIFT;
5866 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5869 down_write(¤t->mm->mmap_sem);
5870 ret = do_munmap(current->mm, old.userspace_addr,
5871 old.npages * PAGE_SIZE);
5872 up_write(¤t->mm->mmap_sem);
5875 "kvm_vm_ioctl_set_memory_region: "
5876 "failed to munmap memory\n");
5879 spin_lock(&kvm->mmu_lock);
5880 if (!kvm->arch.n_requested_mmu_pages) {
5881 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5882 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5885 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5886 spin_unlock(&kvm->mmu_lock);
5889 void kvm_arch_flush_shadow(struct kvm *kvm)
5891 kvm_mmu_zap_all(kvm);
5892 kvm_reload_remote_mmus(kvm);
5895 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5897 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5898 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5899 || vcpu->arch.nmi_pending ||
5900 (kvm_arch_interrupt_allowed(vcpu) &&
5901 kvm_cpu_has_interrupt(vcpu));
5904 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5907 int cpu = vcpu->cpu;
5909 if (waitqueue_active(&vcpu->wq)) {
5910 wake_up_interruptible(&vcpu->wq);
5911 ++vcpu->stat.halt_wakeup;
5915 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5916 if (atomic_xchg(&vcpu->guest_mode, 0))
5917 smp_send_reschedule(cpu);
5921 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5923 return kvm_x86_ops->interrupt_allowed(vcpu);
5926 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5928 unsigned long current_rip = kvm_rip_read(vcpu) +
5929 get_segment_base(vcpu, VCPU_SREG_CS);
5931 return current_rip == linear_rip;
5933 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5935 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5937 unsigned long rflags;
5939 rflags = kvm_x86_ops->get_rflags(vcpu);
5940 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5941 rflags &= ~X86_EFLAGS_TF;
5944 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5946 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5948 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5949 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5950 rflags |= X86_EFLAGS_TF;
5951 kvm_x86_ops->set_rflags(vcpu, rflags);
5953 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5955 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5956 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5957 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5958 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5959 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5960 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5961 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5962 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5963 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5964 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5965 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5966 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);