drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/pm_qos_params.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 static void ath_update_txpow(struct ath_softc *sc)
  23 {
  24         struct ath_hw *ah = sc->sc_ah;
  25
  26         if (sc->curtxpow != sc->config.txpowlimit) {
  27                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  28                 /* read back in case value is clamped */
  29                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  30         }
  31 }
  32
  33 static u8 parse_mpdudensity(u8 mpdudensity)
  34 {
  35         /*
  36          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  37          *   0 for no restriction
  38          *   1 for 1/4 us
  39          *   2 for 1/2 us
  40          *   3 for 1 us
  41          *   4 for 2 us
  42          *   5 for 4 us
  43          *   6 for 8 us
  44          *   7 for 16 us
  45          */
  46         switch (mpdudensity) {
  47         case 0:
  48                 return 0;
  49         case 1:
  50         case 2:
  51         case 3:
  52                 /* Our lower layer calculations limit our precision to
  53                    1 microsecond */
  54                 return 1;
  55         case 4:
  56                 return 2;
  57         case 5:
  58                 return 4;
  59         case 6:
  60                 return 8;
  61         case 7:
  62                 return 16;
  63         default:
  64                 return 0;
  65         }
  66 }
  67
  68 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  69                                                 struct ieee80211_hw *hw)
  70 {
  71         struct ieee80211_channel *curchan = hw->conf.channel;
  72         struct ath9k_channel *channel;
  73         u8 chan_idx;
  74
  75         chan_idx = curchan->hw_value;
  76         channel = &sc->sc_ah->channels[chan_idx];
  77         ath9k_update_ichannel(sc, hw, channel);
  78         return channel;
  79 }
  80
  81 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  82 {
  83         unsigned long flags;
  84         bool ret;
  85
  86         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  87         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  88         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  89
  90         return ret;
  91 }
  92
  93 void ath9k_ps_wakeup(struct ath_softc *sc)
  94 {
  95         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  96         unsigned long flags;
  97         enum ath9k_power_mode power_mode;
  98
  99         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 100         if (++sc->ps_usecount != 1)
 101                 goto unlock;
 102
 103         power_mode = sc->sc_ah->power_mode;
 104         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 105
 106         /*
 107          * While the hardware is asleep, the cycle counters contain no
 108          * useful data. Better clear them now so that they don't mess up
 109          * survey data results.
 110          */
 111         if (power_mode != ATH9K_PM_AWAKE) {
 112                 spin_lock(&common->cc_lock);
 113                 ath_hw_cycle_counters_update(common);
 114                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 115                 spin_unlock(&common->cc_lock);
 116         }
 117
 118  unlock:
 119         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 120 }
 121
 122 void ath9k_ps_restore(struct ath_softc *sc)
 123 {
 124         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 125         unsigned long flags;
 126
 127         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 128         if (--sc->ps_usecount != 0)
 129                 goto unlock;
 130
 131         spin_lock(&common->cc_lock);
 132         ath_hw_cycle_counters_update(common);
 133         spin_unlock(&common->cc_lock);
 134
 135         if (sc->ps_idle)
 136                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 137         else if (sc->ps_enabled &&
 138                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 139                               PS_WAIT_FOR_CAB |
 140                               PS_WAIT_FOR_PSPOLL_DATA |
 141                               PS_WAIT_FOR_TX_ACK)))
 142                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 143
 144  unlock:
 145         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 146 }
 147
 148 static void ath_start_ani(struct ath_common *common)
 149 {
 150         struct ath_hw *ah = common->ah;
 151         unsigned long timestamp = jiffies_to_msecs(jiffies);
 152         struct ath_softc *sc = (struct ath_softc *) common->priv;
 153
 154         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 155                 return;
 156
 157         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 158                 return;
 159
 160         common->ani.longcal_timer = timestamp;
 161         common->ani.shortcal_timer = timestamp;
 162         common->ani.checkani_timer = timestamp;
 163
 164         mod_timer(&common->ani.timer,
 165                   jiffies +
 166                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 167 }
 168
 169 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 170 {
 171         struct ath_hw *ah = sc->sc_ah;
 172         struct ath9k_channel *chan = &ah->channels[channel];
 173         struct survey_info *survey = &sc->survey[channel];
 174
 175         if (chan->noisefloor) {
 176                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 177                 survey->noise = chan->noisefloor;
 178         }
 179 }
 180
 181 static void ath_update_survey_stats(struct ath_softc *sc)
 182 {
 183         struct ath_hw *ah = sc->sc_ah;
 184         struct ath_common *common = ath9k_hw_common(ah);
 185         int pos = ah->curchan - &ah->channels[0];
 186         struct survey_info *survey = &sc->survey[pos];
 187         struct ath_cycle_counters *cc = &common->cc_survey;
 188         unsigned int div = common->clockrate * 1000;
 189
 190         if (!ah->curchan)
 191                 return;
 192
 193         if (ah->power_mode == ATH9K_PM_AWAKE)
 194                 ath_hw_cycle_counters_update(common);
 195
 196         if (cc->cycles > 0) {
 197                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 198                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 199                         SURVEY_INFO_CHANNEL_TIME_RX |
 200                         SURVEY_INFO_CHANNEL_TIME_TX;
 201                 survey->channel_time += cc->cycles / div;
 202                 survey->channel_time_busy += cc->rx_busy / div;
 203                 survey->channel_time_rx += cc->rx_frame / div;
 204                 survey->channel_time_tx += cc->tx_frame / div;
 205         }
 206         memset(cc, 0, sizeof(*cc));
 207
 208         ath_update_survey_nf(sc, pos);
 209 }
 210
 211 /*
 212  * Set/change channels.  If the channel is really being changed, it's done
 213  * by reseting the chip.  To accomplish this we must first cleanup any pending
 214  * DMA, then restart stuff.
 215 */
 216 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 217                     struct ath9k_channel *hchan)
 218 {
 219         struct ath_wiphy *aphy = hw->priv;
 220         struct ath_hw *ah = sc->sc_ah;
 221         struct ath_common *common = ath9k_hw_common(ah);
 222         struct ieee80211_conf *conf = &common->hw->conf;
 223         bool fastcc = true, stopped;
 224         struct ieee80211_channel *channel = hw->conf.channel;
 225         struct ath9k_hw_cal_data *caldata = NULL;
 226         int r;
 227
 228         if (sc->sc_flags & SC_OP_INVALID)
 229                 return -EIO;
 230
 231         del_timer_sync(&common->ani.timer);
 232         cancel_work_sync(&sc->paprd_work);
 233         cancel_work_sync(&sc->hw_check_work);
 234         cancel_delayed_work_sync(&sc->tx_complete_work);
 235
 236         ath9k_ps_wakeup(sc);
 237
 238         spin_lock_bh(&sc->sc_pcu_lock);
 239
 240         /*
 241          * This is only performed if the channel settings have
 242          * actually changed.
 243          *
 244          * To switch channels clear any pending DMA operations;
 245          * wait long enough for the RX fifo to drain, reset the
 246          * hardware at the new frequency, and then re-enable
 247          * the relevant bits of the h/w.
 248          */
 249         ath9k_hw_disable_interrupts(ah);
 250         ath_drain_all_txq(sc, false);
 251
 252         stopped = ath_stoprecv(sc);
 253
 254         /* XXX: do not flush receive queue here. We don't want
 255          * to flush data frames already in queue because of
 256          * changing channel. */
 257
 258         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 259                 fastcc = false;
 260
 261         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 262                 caldata = &aphy->caldata;
 263
 264         ath_print(common, ATH_DBG_CONFIG,
 265                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 266                   sc->sc_ah->curchan->channel,
 267                   channel->center_freq, conf_is_ht40(conf),
 268                   fastcc);
 269
 270         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 271         if (r) {
 272                 ath_print(common, ATH_DBG_FATAL,
 273                           "Unable to reset channel (%u MHz), "
 274                           "reset status %d\n",
 275                           channel->center_freq, r);
 276                 goto ps_restore;
 277         }
 278
 279         if (ath_startrecv(sc) != 0) {
 280                 ath_print(common, ATH_DBG_FATAL,
 281                           "Unable to restart recv logic\n");
 282                 r = -EIO;
 283                 goto ps_restore;
 284         }
 285
 286         ath_update_txpow(sc);
 287         ath9k_hw_set_interrupts(ah, ah->imask);
 288
 289         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 290                 ath_beacon_config(sc, NULL);
 291                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 292                 ath_start_ani(common);
 293         }
 294
 295  ps_restore:
 296         spin_unlock_bh(&sc->sc_pcu_lock);
 297
 298         ath9k_ps_restore(sc);
 299         return r;
 300 }
 301
 302 static void ath_paprd_activate(struct ath_softc *sc)
 303 {
 304         struct ath_hw *ah = sc->sc_ah;
 305         struct ath9k_hw_cal_data *caldata = ah->caldata;
 306         struct ath_common *common = ath9k_hw_common(ah);
 307         int chain;
 308
 309         if (!caldata || !caldata->paprd_done)
 310                 return;
 311
 312         ath9k_ps_wakeup(sc);
 313         ar9003_paprd_enable(ah, false);
 314         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 315                 if (!(common->tx_chainmask & BIT(chain)))
 316                         continue;
 317
 318                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 319         }
 320
 321         ar9003_paprd_enable(ah, true);
 322         ath9k_ps_restore(sc);
 323 }
 324
 325 void ath_paprd_calibrate(struct work_struct *work)
 326 {
 327         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 328         struct ieee80211_hw *hw = sc->hw;
 329         struct ath_hw *ah = sc->sc_ah;
 330         struct ieee80211_hdr *hdr;
 331         struct sk_buff *skb = NULL;
 332         struct ieee80211_tx_info *tx_info;
 333         int band = hw->conf.channel->band;
 334         struct ieee80211_supported_band *sband = &sc->sbands[band];
 335         struct ath_tx_control txctl;
 336         struct ath9k_hw_cal_data *caldata = ah->caldata;
 337         struct ath_common *common = ath9k_hw_common(ah);
 338         int ftype;
 339         int chain_ok = 0;
 340         int chain;
 341         int len = 1800;
 342         int time_left;
 343         int i;
 344
 345         if (!caldata)
 346                 return;
 347
 348         skb = alloc_skb(len, GFP_KERNEL);
 349         if (!skb)
 350                 return;
 351
 352         tx_info = IEEE80211_SKB_CB(skb);
 353
 354         skb_put(skb, len);
 355         memset(skb->data, 0, len);
 356         hdr = (struct ieee80211_hdr *)skb->data;
 357         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 358         hdr->frame_control = cpu_to_le16(ftype);
 359         hdr->duration_id = cpu_to_le16(10);
 360         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 361         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 362         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 363
 364         memset(&txctl, 0, sizeof(txctl));
 365         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 366
 367         ath9k_ps_wakeup(sc);
 368         ar9003_paprd_init_table(ah);
 369         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 370                 if (!(common->tx_chainmask & BIT(chain)))
 371                         continue;
 372
 373                 chain_ok = 0;
 374                 memset(tx_info, 0, sizeof(*tx_info));
 375                 tx_info->band = band;
 376
 377                 for (i = 0; i < 4; i++) {
 378                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 379                         tx_info->control.rates[i].count = 6;
 380                 }
 381
 382                 init_completion(&sc->paprd_complete);
 383                 sc->paprd_pending = true;
 384                 ar9003_paprd_setup_gain_table(ah, chain);
 385                 txctl.paprd = BIT(chain);
 386                 if (ath_tx_start(hw, skb, &txctl) != 0)
 387                         break;
 388
 389                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 390                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 391                 sc->paprd_pending = false;
 392                 if (!time_left) {
 393                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 394                                   "Timeout waiting for paprd training on "
 395                                   "TX chain %d\n",
 396                                   chain);
 397                         goto fail_paprd;
 398                 }
 399
 400                 if (!ar9003_paprd_is_done(ah))
 401                         break;
 402
 403                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 404                         break;
 405
 406                 chain_ok = 1;
 407         }
 408         kfree_skb(skb);
 409
 410         if (chain_ok) {
 411                 caldata->paprd_done = true;
 412                 ath_paprd_activate(sc);
 413         }
 414
 415 fail_paprd:
 416         ath9k_ps_restore(sc);
 417 }
 418
 419 /*
 420  *  This routine performs the periodic noise floor calibration function
 421  *  that is used to adjust and optimize the chip performance.  This
 422  *  takes environmental changes (location, temperature) into account.
 423  *  When the task is complete, it reschedules itself depending on the
 424  *  appropriate interval that was calculated.
 425  */
 426 void ath_ani_calibrate(unsigned long data)
 427 {
 428         struct ath_softc *sc = (struct ath_softc *)data;
 429         struct ath_hw *ah = sc->sc_ah;
 430         struct ath_common *common = ath9k_hw_common(ah);
 431         bool longcal = false;
 432         bool shortcal = false;
 433         bool aniflag = false;
 434         unsigned int timestamp = jiffies_to_msecs(jiffies);
 435         u32 cal_interval, short_cal_interval, long_cal_interval;
 436         unsigned long flags;
 437
 438         if (ah->caldata && ah->caldata->nfcal_interference)
 439                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 440         else
 441                 long_cal_interval = ATH_LONG_CALINTERVAL;
 442
 443         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 444                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 445
 446         /* Only calibrate if awake */
 447         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 448                 goto set_timer;
 449
 450         ath9k_ps_wakeup(sc);
 451
 452         /* Long calibration runs independently of short calibration. */
 453         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 454                 longcal = true;
 455                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 456                 common->ani.longcal_timer = timestamp;
 457         }
 458
 459         /* Short calibration applies only while caldone is false */
 460         if (!common->ani.caldone) {
 461                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 462                         shortcal = true;
 463                         ath_print(common, ATH_DBG_ANI,
 464                                   "shortcal @%lu\n", jiffies);
 465                         common->ani.shortcal_timer = timestamp;
 466                         common->ani.resetcal_timer = timestamp;
 467                 }
 468         } else {
 469                 if ((timestamp - common->ani.resetcal_timer) >=
 470                     ATH_RESTART_CALINTERVAL) {
 471                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 472                         if (common->ani.caldone)
 473                                 common->ani.resetcal_timer = timestamp;
 474                 }
 475         }
 476
 477         /* Verify whether we must check ANI */
 478         if ((timestamp - common->ani.checkani_timer) >=
 479              ah->config.ani_poll_interval) {
 480                 aniflag = true;
 481                 common->ani.checkani_timer = timestamp;
 482         }
 483
 484         /* Skip all processing if there's nothing to do. */
 485         if (longcal || shortcal || aniflag) {
 486                 /* Call ANI routine if necessary */
 487                 if (aniflag) {
 488                         spin_lock_irqsave(&common->cc_lock, flags);
 489                         ath9k_hw_ani_monitor(ah, ah->curchan);
 490                         ath_update_survey_stats(sc);
 491                         spin_unlock_irqrestore(&common->cc_lock, flags);
 492                 }
 493
 494                 /* Perform calibration if necessary */
 495                 if (longcal || shortcal) {
 496                         common->ani.caldone =
 497                                 ath9k_hw_calibrate(ah,
 498                                                    ah->curchan,
 499                                                    common->rx_chainmask,
 500                                                    longcal);
 501                 }
 502         }
 503
 504         ath9k_ps_restore(sc);
 505
 506 set_timer:
 507         /*
 508         * Set timer interval based on previous results.
 509         * The interval must be the shortest necessary to satisfy ANI,
 510         * short calibration and long calibration.
 511         */
 512         cal_interval = ATH_LONG_CALINTERVAL;
 513         if (sc->sc_ah->config.enable_ani)
 514                 cal_interval = min(cal_interval,
 515                                    (u32)ah->config.ani_poll_interval);
 516         if (!common->ani.caldone)
 517                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 518
 519         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 520         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 521                 if (!ah->caldata->paprd_done)
 522                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 523                 else
 524                         ath_paprd_activate(sc);
 525         }
 526 }
 527
 528 /*
 529  * Update tx/rx chainmask. For legacy association,
 530  * hard code chainmask to 1x1, for 11n association, use
 531  * the chainmask configuration, for bt coexistence, use
 532  * the chainmask configuration even in legacy mode.
 533  */
 534 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 535 {
 536         struct ath_hw *ah = sc->sc_ah;
 537         struct ath_common *common = ath9k_hw_common(ah);
 538
 539         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 540             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 541                 common->tx_chainmask = ah->caps.tx_chainmask;
 542                 common->rx_chainmask = ah->caps.rx_chainmask;
 543         } else {
 544                 common->tx_chainmask = 1;
 545                 common->rx_chainmask = 1;
 546         }
 547
 548         ath_print(common, ATH_DBG_CONFIG,
 549                   "tx chmask: %d, rx chmask: %d\n",
 550                   common->tx_chainmask,
 551                   common->rx_chainmask);
 552 }
 553
 554 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 555 {
 556         struct ath_node *an;
 557         struct ath_hw *ah = sc->sc_ah;
 558         an = (struct ath_node *)sta->drv_priv;
 559
 560         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 561                 sc->sc_flags |= SC_OP_ENABLE_APM;
 562
 563         if (sc->sc_flags & SC_OP_TXAGGR) {
 564                 ath_tx_node_init(sc, an);
 565                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 566                                      sta->ht_cap.ampdu_factor);
 567                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 568         }
 569 }
 570
 571 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 572 {
 573         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 574
 575         if (sc->sc_flags & SC_OP_TXAGGR)
 576                 ath_tx_node_cleanup(sc, an);
 577 }
 578
 579 void ath_hw_check(struct work_struct *work)
 580 {
 581         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 582         int i;
 583
 584         ath9k_ps_wakeup(sc);
 585
 586         for (i = 0; i < 3; i++) {
 587                 if (ath9k_hw_check_alive(sc->sc_ah))
 588                         goto out;
 589
 590                 msleep(1);
 591         }
 592         ath_reset(sc, true);
 593
 594 out:
 595         ath9k_ps_restore(sc);
 596 }
 597
 598 void ath9k_tasklet(unsigned long data)
 599 {
 600         struct ath_softc *sc = (struct ath_softc *)data;
 601         struct ath_hw *ah = sc->sc_ah;
 602         struct ath_common *common = ath9k_hw_common(ah);
 603
 604         u32 status = sc->intrstatus;
 605         u32 rxmask;
 606
 607         ath9k_ps_wakeup(sc);
 608
 609         if (status & ATH9K_INT_FATAL) {
 610                 ath_reset(sc, true);
 611                 ath9k_ps_restore(sc);
 612                 return;
 613         }
 614
 615         spin_lock_bh(&sc->sc_pcu_lock);
 616
 617         if (!ath9k_hw_check_alive(ah))
 618                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 619
 620         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 621                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 622                           ATH9K_INT_RXORN);
 623         else
 624                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 625
 626         if (status & rxmask) {
 627                 /* Check for high priority Rx first */
 628                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 629                     (status & ATH9K_INT_RXHP))
 630                         ath_rx_tasklet(sc, 0, true);
 631
 632                 ath_rx_tasklet(sc, 0, false);
 633         }
 634
 635         if (status & ATH9K_INT_TX) {
 636                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 637                         ath_tx_edma_tasklet(sc);
 638                 else
 639                         ath_tx_tasklet(sc);
 640         }
 641
 642         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 643                 /*
 644                  * TSF sync does not look correct; remain awake to sync with
 645                  * the next Beacon.
 646                  */
 647                 ath_print(common, ATH_DBG_PS,
 648                           "TSFOOR - Sync with next Beacon\n");
 649                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 650         }
 651
 652         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 653                 if (status & ATH9K_INT_GENTIMER)
 654                         ath_gen_timer_isr(sc->sc_ah);
 655
 656         /* re-enable hardware interrupt */
 657         ath9k_hw_enable_interrupts(ah);
 658
 659         spin_unlock_bh(&sc->sc_pcu_lock);
 660         ath9k_ps_restore(sc);
 661 }
 662
 663 irqreturn_t ath_isr(int irq, void *dev)
 664 {
 665 #define SCHED_INTR (                            \
 666                 ATH9K_INT_FATAL |               \
 667                 ATH9K_INT_RXORN |               \
 668                 ATH9K_INT_RXEOL |               \
 669                 ATH9K_INT_RX |                  \
 670                 ATH9K_INT_RXLP |                \
 671                 ATH9K_INT_RXHP |                \
 672                 ATH9K_INT_TX |                  \
 673                 ATH9K_INT_BMISS |               \
 674                 ATH9K_INT_CST |                 \
 675                 ATH9K_INT_TSFOOR |              \
 676                 ATH9K_INT_GENTIMER)
 677
 678         struct ath_softc *sc = dev;
 679         struct ath_hw *ah = sc->sc_ah;
 680         struct ath_common *common = ath9k_hw_common(ah);
 681         enum ath9k_int status;
 682         bool sched = false;
 683
 684         /*
 685          * The hardware is not ready/present, don't
 686          * touch anything. Note this can happen early
 687          * on if the IRQ is shared.
 688          */
 689         if (sc->sc_flags & SC_OP_INVALID)
 690                 return IRQ_NONE;
 691
 692
 693         /* shared irq, not for us */
 694
 695         if (!ath9k_hw_intrpend(ah))
 696                 return IRQ_NONE;
 697
 698         /*
 699          * Figure out the reason(s) for the interrupt.  Note
 700          * that the hal returns a pseudo-ISR that may include
 701          * bits we haven't explicitly enabled so we mask the
 702          * value to insure we only process bits we requested.
 703          */
 704         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 705         status &= ah->imask;    /* discard unasked-for bits */
 706
 707         /*
 708          * If there are no status bits set, then this interrupt was not
 709          * for me (should have been caught above).
 710          */
 711         if (!status)
 712                 return IRQ_NONE;
 713
 714         /* Cache the status */
 715         sc->intrstatus = status;
 716
 717         if (status & SCHED_INTR)
 718                 sched = true;
 719
 720         /*
 721          * If a FATAL or RXORN interrupt is received, we have to reset the
 722          * chip immediately.
 723          */
 724         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 725             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 726                 goto chip_reset;
 727
 728         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 729             (status & ATH9K_INT_BB_WATCHDOG)) {
 730
 731                 spin_lock(&common->cc_lock);
 732                 ath_hw_cycle_counters_update(common);
 733                 ar9003_hw_bb_watchdog_dbg_info(ah);
 734                 spin_unlock(&common->cc_lock);
 735
 736                 goto chip_reset;
 737         }
 738
 739         if (status & ATH9K_INT_SWBA)
 740                 tasklet_schedule(&sc->bcon_tasklet);
 741
 742         if (status & ATH9K_INT_TXURN)
 743                 ath9k_hw_updatetxtriglevel(ah, true);
 744
 745         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 746                 if (status & ATH9K_INT_RXEOL) {
 747                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 748                         ath9k_hw_set_interrupts(ah, ah->imask);
 749                 }
 750         }
 751
 752         if (status & ATH9K_INT_MIB) {
 753                 /*
 754                  * Disable interrupts until we service the MIB
 755                  * interrupt; otherwise it will continue to
 756                  * fire.
 757                  */
 758                 ath9k_hw_disable_interrupts(ah);
 759                 /*
 760                  * Let the hal handle the event. We assume
 761                  * it will clear whatever condition caused
 762                  * the interrupt.
 763                  */
 764                 spin_lock(&common->cc_lock);
 765                 ath9k_hw_proc_mib_event(ah);
 766                 spin_unlock(&common->cc_lock);
 767                 ath9k_hw_enable_interrupts(ah);
 768         }
 769
 770         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 771                 if (status & ATH9K_INT_TIM_TIMER) {
 772                         /* Clear RxAbort bit so that we can
 773                          * receive frames */
 774                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 775                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 776                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 777                 }
 778
 779 chip_reset:
 780
 781         ath_debug_stat_interrupt(sc, status);
 782
 783         if (sched) {
 784                 /* turn off every interrupt */
 785                 ath9k_hw_disable_interrupts(ah);
 786                 tasklet_schedule(&sc->intr_tq);
 787         }
 788
 789         return IRQ_HANDLED;
 790
 791 #undef SCHED_INTR
 792 }
 793
 794 static u32 ath_get_extchanmode(struct ath_softc *sc,
 795                                struct ieee80211_channel *chan,
 796                                enum nl80211_channel_type channel_type)
 797 {
 798         u32 chanmode = 0;
 799
 800         switch (chan->band) {
 801         case IEEE80211_BAND_2GHZ:
 802                 switch(channel_type) {
 803                 case NL80211_CHAN_NO_HT:
 804                 case NL80211_CHAN_HT20:
 805                         chanmode = CHANNEL_G_HT20;
 806                         break;
 807                 case NL80211_CHAN_HT40PLUS:
 808                         chanmode = CHANNEL_G_HT40PLUS;
 809                         break;
 810                 case NL80211_CHAN_HT40MINUS:
 811                         chanmode = CHANNEL_G_HT40MINUS;
 812                         break;
 813                 }
 814                 break;
 815         case IEEE80211_BAND_5GHZ:
 816                 switch(channel_type) {
 817                 case NL80211_CHAN_NO_HT:
 818                 case NL80211_CHAN_HT20:
 819                         chanmode = CHANNEL_A_HT20;
 820                         break;
 821                 case NL80211_CHAN_HT40PLUS:
 822                         chanmode = CHANNEL_A_HT40PLUS;
 823                         break;
 824                 case NL80211_CHAN_HT40MINUS:
 825                         chanmode = CHANNEL_A_HT40MINUS;
 826                         break;
 827                 }
 828                 break;
 829         default:
 830                 break;
 831         }
 832
 833         return chanmode;
 834 }
 835
 836 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 837                                  struct ieee80211_hw *hw,
 838                                  struct ieee80211_vif *vif,
 839                                  struct ieee80211_bss_conf *bss_conf)
 840 {
 841         struct ath_wiphy *aphy = hw->priv;
 842         struct ath_hw *ah = sc->sc_ah;
 843         struct ath_common *common = ath9k_hw_common(ah);
 844
 845         if (bss_conf->assoc) {
 846                 ath_print(common, ATH_DBG_CONFIG,
 847                           "Bss Info ASSOC %d, bssid: %pM\n",
 848                            bss_conf->aid, common->curbssid);
 849
 850                 /* New association, store aid */
 851                 common->curaid = bss_conf->aid;
 852                 ath9k_hw_write_associd(ah);
 853
 854                 /*
 855                  * Request a re-configuration of Beacon related timers
 856                  * on the receipt of the first Beacon frame (i.e.,
 857                  * after time sync with the AP).
 858                  */
 859                 sc->ps_flags |= PS_BEACON_SYNC;
 860
 861                 /* Configure the beacon */
 862                 ath_beacon_config(sc, vif);
 863
 864                 /* Reset rssi stats */
 865                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 866                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 867
 868                 sc->sc_flags |= SC_OP_ANI_RUN;
 869                 ath_start_ani(common);
 870         } else {
 871                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 872                 common->curaid = 0;
 873                 /* Stop ANI */
 874                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 875                 del_timer_sync(&common->ani.timer);
 876         }
 877 }
 878
 879 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 880 {
 881         struct ath_hw *ah = sc->sc_ah;
 882         struct ath_common *common = ath9k_hw_common(ah);
 883         struct ieee80211_channel *channel = hw->conf.channel;
 884         int r;
 885
 886         ath9k_ps_wakeup(sc);
 887         spin_lock_bh(&sc->sc_pcu_lock);
 888
 889         ath9k_hw_configpcipowersave(ah, 0, 0);
 890
 891         if (!ah->curchan)
 892                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 893
 894         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 895         if (r) {
 896                 ath_print(common, ATH_DBG_FATAL,
 897                           "Unable to reset channel (%u MHz), "
 898                           "reset status %d\n",
 899                           channel->center_freq, r);
 900         }
 901
 902         ath_update_txpow(sc);
 903         if (ath_startrecv(sc) != 0) {
 904                 ath_print(common, ATH_DBG_FATAL,
 905                           "Unable to restart recv logic\n");
 906                 spin_unlock_bh(&sc->sc_pcu_lock);
 907                 return;
 908         }
 909         if (sc->sc_flags & SC_OP_BEACONS)
 910                 ath_beacon_config(sc, NULL);    /* restart beacons */
 911
 912         /* Re-Enable  interrupts */
 913         ath9k_hw_set_interrupts(ah, ah->imask);
 914
 915         /* Enable LED */
 916         ath9k_hw_cfg_output(ah, ah->led_pin,
 917                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 918         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 919
 920         ieee80211_wake_queues(hw);
 921         spin_unlock_bh(&sc->sc_pcu_lock);
 922
 923         ath9k_ps_restore(sc);
 924 }
 925
 926 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 927 {
 928         struct ath_hw *ah = sc->sc_ah;
 929         struct ieee80211_channel *channel = hw->conf.channel;
 930         int r;
 931
 932         ath9k_ps_wakeup(sc);
 933         spin_lock_bh(&sc->sc_pcu_lock);
 934
 935         ieee80211_stop_queues(hw);
 936
 937         /*
 938          * Keep the LED on when the radio is disabled
 939          * during idle unassociated state.
 940          */
 941         if (!sc->ps_idle) {
 942                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 943                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 944         }
 945
 946         /* Disable interrupts */
 947         ath9k_hw_disable_interrupts(ah);
 948
 949         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 950
 951         ath_stoprecv(sc);               /* turn off frame recv */
 952         ath_flushrecv(sc);              /* flush recv queue */
 953
 954         if (!ah->curchan)
 955                 ah->curchan = ath_get_curchannel(sc, hw);
 956
 957         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 958         if (r) {
 959                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 960                           "Unable to reset channel (%u MHz), "
 961                           "reset status %d\n",
 962                           channel->center_freq, r);
 963         }
 964
 965         ath9k_hw_phy_disable(ah);
 966
 967         ath9k_hw_configpcipowersave(ah, 1, 1);
 968
 969         spin_unlock_bh(&sc->sc_pcu_lock);
 970         ath9k_ps_restore(sc);
 971
 972         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 973 }
 974
 975 int ath_reset(struct ath_softc *sc, bool retry_tx)
 976 {
 977         struct ath_hw *ah = sc->sc_ah;
 978         struct ath_common *common = ath9k_hw_common(ah);
 979         struct ieee80211_hw *hw = sc->hw;
 980         int r;
 981
 982         /* Stop ANI */
 983         del_timer_sync(&common->ani.timer);
 984
 985         spin_lock_bh(&sc->sc_pcu_lock);
 986
 987         ieee80211_stop_queues(hw);
 988
 989         ath9k_hw_disable_interrupts(ah);
 990         ath_drain_all_txq(sc, retry_tx);
 991
 992         ath_stoprecv(sc);
 993         ath_flushrecv(sc);
 994
 995         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 996         if (r)
 997                 ath_print(common, ATH_DBG_FATAL,
 998                           "Unable to reset hardware; reset status %d\n", r);
 999
1000         if (ath_startrecv(sc) != 0)
1001                 ath_print(common, ATH_DBG_FATAL,
1002                           "Unable to start recv logic\n");
1003
1004         /*
1005          * We may be doing a reset in response to a request
1006          * that changes the channel so update any state that
1007          * might change as a result.
1008          */
1009         ath_update_txpow(sc);
1010
1011         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1012                 ath_beacon_config(sc, NULL);    /* restart beacons */
1013
1014         ath9k_hw_set_interrupts(ah, ah->imask);
1015
1016         if (retry_tx) {
1017                 int i;
1018                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1019                         if (ATH_TXQ_SETUP(sc, i)) {
1020                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1021                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1022                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1023                         }
1024                 }
1025         }
1026
1027         ieee80211_wake_queues(hw);
1028         spin_unlock_bh(&sc->sc_pcu_lock);
1029
1030         /* Start ANI */
1031         ath_start_ani(common);
1032
1033         return r;
1034 }
1035
1036 /* XXX: Remove me once we don't depend on ath9k_channel for all
1037  * this redundant data */
1038 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1039                            struct ath9k_channel *ichan)
1040 {
1041         struct ieee80211_channel *chan = hw->conf.channel;
1042         struct ieee80211_conf *conf = &hw->conf;
1043
1044         ichan->channel = chan->center_freq;
1045         ichan->chan = chan;
1046
1047         if (chan->band == IEEE80211_BAND_2GHZ) {
1048                 ichan->chanmode = CHANNEL_G;
1049                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1050         } else {
1051                 ichan->chanmode = CHANNEL_A;
1052                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1053         }
1054
1055         if (conf_is_ht(conf))
1056                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1057                                             conf->channel_type);
1058 }
1059
1060 /**********************/
1061 /* mac80211 callbacks */
1062 /**********************/
1063
1064 static int ath9k_start(struct ieee80211_hw *hw)
1065 {
1066         struct ath_wiphy *aphy = hw->priv;
1067         struct ath_softc *sc = aphy->sc;
1068         struct ath_hw *ah = sc->sc_ah;
1069         struct ath_common *common = ath9k_hw_common(ah);
1070         struct ieee80211_channel *curchan = hw->conf.channel;
1071         struct ath9k_channel *init_channel;
1072         int r;
1073
1074         ath_print(common, ATH_DBG_CONFIG,
1075                   "Starting driver with initial channel: %d MHz\n",
1076                   curchan->center_freq);
1077
1078         mutex_lock(&sc->mutex);
1079
1080         if (ath9k_wiphy_started(sc)) {
1081                 if (sc->chan_idx == curchan->hw_value) {
1082                         /*
1083                          * Already on the operational channel, the new wiphy
1084                          * can be marked active.
1085                          */
1086                         aphy->state = ATH_WIPHY_ACTIVE;
1087                         ieee80211_wake_queues(hw);
1088                 } else {
1089                         /*
1090                          * Another wiphy is on another channel, start the new
1091                          * wiphy in paused state.
1092                          */
1093                         aphy->state = ATH_WIPHY_PAUSED;
1094                         ieee80211_stop_queues(hw);
1095                 }
1096                 mutex_unlock(&sc->mutex);
1097                 return 0;
1098         }
1099         aphy->state = ATH_WIPHY_ACTIVE;
1100
1101         /* setup initial channel */
1102
1103         sc->chan_idx = curchan->hw_value;
1104
1105         init_channel = ath_get_curchannel(sc, hw);
1106
1107         /* Reset SERDES registers */
1108         ath9k_hw_configpcipowersave(ah, 0, 0);
1109
1110         /*
1111          * The basic interface to setting the hardware in a good
1112          * state is ``reset''.  On return the hardware is known to
1113          * be powered up and with interrupts disabled.  This must
1114          * be followed by initialization of the appropriate bits
1115          * and then setup of the interrupt mask.
1116          */
1117         spin_lock_bh(&sc->sc_pcu_lock);
1118         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1119         if (r) {
1120                 ath_print(common, ATH_DBG_FATAL,
1121                           "Unable to reset hardware; reset status %d "
1122                           "(freq %u MHz)\n", r,
1123                           curchan->center_freq);
1124                 spin_unlock_bh(&sc->sc_pcu_lock);
1125                 goto mutex_unlock;
1126         }
1127
1128         /*
1129          * This is needed only to setup initial state
1130          * but it's best done after a reset.
1131          */
1132         ath_update_txpow(sc);
1133
1134         /*
1135          * Setup the hardware after reset:
1136          * The receive engine is set going.
1137          * Frame transmit is handled entirely
1138          * in the frame output path; there's nothing to do
1139          * here except setup the interrupt mask.
1140          */
1141         if (ath_startrecv(sc) != 0) {
1142                 ath_print(common, ATH_DBG_FATAL,
1143                           "Unable to start recv logic\n");
1144                 r = -EIO;
1145                 spin_unlock_bh(&sc->sc_pcu_lock);
1146                 goto mutex_unlock;
1147         }
1148         spin_unlock_bh(&sc->sc_pcu_lock);
1149
1150         /* Setup our intr mask. */
1151         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1152                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1153                     ATH9K_INT_GLOBAL;
1154
1155         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1156                 ah->imask |= ATH9K_INT_RXHP |
1157                              ATH9K_INT_RXLP |
1158                              ATH9K_INT_BB_WATCHDOG;
1159         else
1160                 ah->imask |= ATH9K_INT_RX;
1161
1162         ah->imask |= ATH9K_INT_GTT;
1163
1164         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1165                 ah->imask |= ATH9K_INT_CST;
1166
1167         sc->sc_flags &= ~SC_OP_INVALID;
1168         sc->sc_ah->is_monitoring = false;
1169
1170         /* Disable BMISS interrupt when we're not associated */
1171         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1172         ath9k_hw_set_interrupts(ah, ah->imask);
1173
1174         ieee80211_wake_queues(hw);
1175
1176         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1177
1178         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1179             !ah->btcoex_hw.enabled) {
1180                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1181                                            AR_STOMP_LOW_WLAN_WGHT);
1182                 ath9k_hw_btcoex_enable(ah);
1183
1184                 if (common->bus_ops->bt_coex_prep)
1185                         common->bus_ops->bt_coex_prep(common);
1186                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1187                         ath9k_btcoex_timer_resume(sc);
1188         }
1189
1190         pm_qos_update_request(&ath9k_pm_qos_req, 55);
1191
1192 mutex_unlock:
1193         mutex_unlock(&sc->mutex);
1194
1195         return r;
1196 }
1197
1198 static int ath9k_tx(struct ieee80211_hw *hw,
1199                     struct sk_buff *skb)
1200 {
1201         struct ath_wiphy *aphy = hw->priv;
1202         struct ath_softc *sc = aphy->sc;
1203         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1204         struct ath_tx_control txctl;
1205         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1206
1207         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1208                 ath_print(common, ATH_DBG_XMIT,
1209                           "ath9k: %s: TX in unexpected wiphy state "
1210                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1211                 goto exit;
1212         }
1213
1214         if (sc->ps_enabled) {
1215                 /*
1216                  * mac80211 does not set PM field for normal data frames, so we
1217                  * need to update that based on the current PS mode.
1218                  */
1219                 if (ieee80211_is_data(hdr->frame_control) &&
1220                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1221                     !ieee80211_has_pm(hdr->frame_control)) {
1222                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1223                                   "while in PS mode\n");
1224                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1225                 }
1226         }
1227
1228         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1229                 /*
1230                  * We are using PS-Poll and mac80211 can request TX while in
1231                  * power save mode. Need to wake up hardware for the TX to be
1232                  * completed and if needed, also for RX of buffered frames.
1233                  */
1234                 ath9k_ps_wakeup(sc);
1235                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1236                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1237                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1238                         ath_print(common, ATH_DBG_PS,
1239                                   "Sending PS-Poll to pick a buffered frame\n");
1240                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1241                 } else {
1242                         ath_print(common, ATH_DBG_PS,
1243                                   "Wake up to complete TX\n");
1244                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1245                 }
1246                 /*
1247                  * The actual restore operation will happen only after
1248                  * the sc_flags bit is cleared. We are just dropping
1249                  * the ps_usecount here.
1250                  */
1251                 ath9k_ps_restore(sc);
1252         }
1253
1254         memset(&txctl, 0, sizeof(struct ath_tx_control));
1255         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1256
1257         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1258
1259         if (ath_tx_start(hw, skb, &txctl) != 0) {
1260                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1261                 goto exit;
1262         }
1263
1264         return 0;
1265 exit:
1266         dev_kfree_skb_any(skb);
1267         return 0;
1268 }
1269
1270 static void ath9k_stop(struct ieee80211_hw *hw)
1271 {
1272         struct ath_wiphy *aphy = hw->priv;
1273         struct ath_softc *sc = aphy->sc;
1274         struct ath_hw *ah = sc->sc_ah;
1275         struct ath_common *common = ath9k_hw_common(ah);
1276         int i;
1277
1278         mutex_lock(&sc->mutex);
1279
1280         aphy->state = ATH_WIPHY_INACTIVE;
1281
1282         if (led_blink)
1283                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1284
1285         cancel_delayed_work_sync(&sc->tx_complete_work);
1286         cancel_work_sync(&sc->paprd_work);
1287         cancel_work_sync(&sc->hw_check_work);
1288
1289         for (i = 0; i < sc->num_sec_wiphy; i++) {
1290                 if (sc->sec_wiphy[i])
1291                         break;
1292         }
1293
1294         if (i == sc->num_sec_wiphy) {
1295                 cancel_delayed_work_sync(&sc->wiphy_work);
1296                 cancel_work_sync(&sc->chan_work);
1297         }
1298
1299         if (sc->sc_flags & SC_OP_INVALID) {
1300                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1301                 mutex_unlock(&sc->mutex);
1302                 return;
1303         }
1304
1305         if (ath9k_wiphy_started(sc)) {
1306                 mutex_unlock(&sc->mutex);
1307                 return; /* another wiphy still in use */
1308         }
1309
1310         /* Ensure HW is awake when we try to shut it down. */
1311         ath9k_ps_wakeup(sc);
1312
1313         if (ah->btcoex_hw.enabled) {
1314                 ath9k_hw_btcoex_disable(ah);
1315                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1316                         ath9k_btcoex_timer_pause(sc);
1317         }
1318
1319         spin_lock_bh(&sc->sc_pcu_lock);
1320
1321         /* make sure h/w will not generate any interrupt
1322          * before setting the invalid flag. */
1323         ath9k_hw_disable_interrupts(ah);
1324
1325         if (!(sc->sc_flags & SC_OP_INVALID)) {
1326                 ath_drain_all_txq(sc, false);
1327                 ath_stoprecv(sc);
1328                 ath9k_hw_phy_disable(ah);
1329         } else
1330                 sc->rx.rxlink = NULL;
1331
1332         /* disable HAL and put h/w to sleep */
1333         ath9k_hw_disable(ah);
1334         ath9k_hw_configpcipowersave(ah, 1, 1);
1335
1336         spin_unlock_bh(&sc->sc_pcu_lock);
1337
1338         ath9k_ps_restore(sc);
1339
1340         /* Finally, put the chip in FULL SLEEP mode */
1341         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1342
1343         sc->sc_flags |= SC_OP_INVALID;
1344
1345         pm_qos_update_request(&ath9k_pm_qos_req, PM_QOS_DEFAULT_VALUE);
1346
1347         mutex_unlock(&sc->mutex);
1348
1349         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1350 }
1351
1352 static int ath9k_add_interface(struct ieee80211_hw *hw,
1353                                struct ieee80211_vif *vif)
1354 {
1355         struct ath_wiphy *aphy = hw->priv;
1356         struct ath_softc *sc = aphy->sc;
1357         struct ath_hw *ah = sc->sc_ah;
1358         struct ath_common *common = ath9k_hw_common(ah);
1359         struct ath_vif *avp = (void *)vif->drv_priv;
1360         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1361         int ret = 0;
1362
1363         mutex_lock(&sc->mutex);
1364
1365         switch (vif->type) {
1366         case NL80211_IFTYPE_STATION:
1367                 ic_opmode = NL80211_IFTYPE_STATION;
1368                 break;
1369         case NL80211_IFTYPE_WDS:
1370                 ic_opmode = NL80211_IFTYPE_WDS;
1371                 break;
1372         case NL80211_IFTYPE_ADHOC:
1373         case NL80211_IFTYPE_AP:
1374         case NL80211_IFTYPE_MESH_POINT:
1375                 if (sc->nbcnvifs >= ATH_BCBUF) {
1376                         ret = -ENOBUFS;
1377                         goto out;
1378                 }
1379                 ic_opmode = vif->type;
1380                 break;
1381         default:
1382                 ath_print(common, ATH_DBG_FATAL,
1383                         "Interface type %d not yet supported\n", vif->type);
1384                 ret = -EOPNOTSUPP;
1385                 goto out;
1386         }
1387
1388         ath_print(common, ATH_DBG_CONFIG,
1389                   "Attach a VIF of type: %d\n", ic_opmode);
1390
1391         /* Set the VIF opmode */
1392         avp->av_opmode = ic_opmode;
1393         avp->av_bslot = -1;
1394
1395         sc->nvifs++;
1396
1397         ath9k_set_bssid_mask(hw, vif);
1398
1399         if (sc->nvifs > 1)
1400                 goto out; /* skip global settings for secondary vif */
1401
1402         if (ic_opmode == NL80211_IFTYPE_AP) {
1403                 ath9k_hw_set_tsfadjust(ah, 1);
1404                 sc->sc_flags |= SC_OP_TSF_RESET;
1405         }
1406
1407         /* Set the device opmode */
1408         ah->opmode = ic_opmode;
1409
1410         /*
1411          * Enable MIB interrupts when there are hardware phy counters.
1412          * Note we only do this (at the moment) for station mode.
1413          */
1414         if ((vif->type == NL80211_IFTYPE_STATION) ||
1415             (vif->type == NL80211_IFTYPE_ADHOC) ||
1416             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1417                 if (ah->config.enable_ani)
1418                         ah->imask |= ATH9K_INT_MIB;
1419                 ah->imask |= ATH9K_INT_TSFOOR;
1420         }
1421
1422         ath9k_hw_set_interrupts(ah, ah->imask);
1423
1424         if (vif->type == NL80211_IFTYPE_AP    ||
1425             vif->type == NL80211_IFTYPE_ADHOC) {
1426                 sc->sc_flags |= SC_OP_ANI_RUN;
1427                 ath_start_ani(common);
1428         }
1429
1430 out:
1431         mutex_unlock(&sc->mutex);
1432         return ret;
1433 }
1434
1435 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1436                                    struct ieee80211_vif *vif)
1437 {
1438         struct ath_wiphy *aphy = hw->priv;
1439         struct ath_softc *sc = aphy->sc;
1440         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1441         struct ath_vif *avp = (void *)vif->drv_priv;
1442         int i;
1443
1444         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1445
1446         mutex_lock(&sc->mutex);
1447
1448         /* Stop ANI */
1449         sc->sc_flags &= ~SC_OP_ANI_RUN;
1450         del_timer_sync(&common->ani.timer);
1451
1452         /* Reclaim beacon resources */
1453         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1454             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1455             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1456                 ath9k_ps_wakeup(sc);
1457                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1458                 ath9k_ps_restore(sc);
1459         }
1460
1461         ath_beacon_return(sc, avp);
1462         sc->sc_flags &= ~SC_OP_BEACONS;
1463
1464         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1465                 if (sc->beacon.bslot[i] == vif) {
1466                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1467                                "slot\n", __func__);
1468                         sc->beacon.bslot[i] = NULL;
1469                         sc->beacon.bslot_aphy[i] = NULL;
1470                 }
1471         }
1472
1473         sc->nvifs--;
1474
1475         mutex_unlock(&sc->mutex);
1476 }
1477
1478 static void ath9k_enable_ps(struct ath_softc *sc)
1479 {
1480         struct ath_hw *ah = sc->sc_ah;
1481
1482         sc->ps_enabled = true;
1483         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1484                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1485                         ah->imask |= ATH9K_INT_TIM_TIMER;
1486                         ath9k_hw_set_interrupts(ah, ah->imask);
1487                 }
1488                 ath9k_hw_setrxabort(ah, 1);
1489         }
1490 }
1491
1492 static void ath9k_disable_ps(struct ath_softc *sc)
1493 {
1494         struct ath_hw *ah = sc->sc_ah;
1495
1496         sc->ps_enabled = false;
1497         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1498         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1499                 ath9k_hw_setrxabort(ah, 0);
1500                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1501                                   PS_WAIT_FOR_CAB |
1502                                   PS_WAIT_FOR_PSPOLL_DATA |
1503                                   PS_WAIT_FOR_TX_ACK);
1504                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1505                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1506                         ath9k_hw_set_interrupts(ah, ah->imask);
1507                 }
1508         }
1509
1510 }
1511
1512 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1513 {
1514         struct ath_wiphy *aphy = hw->priv;
1515         struct ath_softc *sc = aphy->sc;
1516         struct ath_hw *ah = sc->sc_ah;
1517         struct ath_common *common = ath9k_hw_common(ah);
1518         struct ieee80211_conf *conf = &hw->conf;
1519         bool disable_radio;
1520
1521         mutex_lock(&sc->mutex);
1522
1523         /*
1524          * Leave this as the first check because we need to turn on the
1525          * radio if it was disabled before prior to processing the rest
1526          * of the changes. Likewise we must only disable the radio towards
1527          * the end.
1528          */
1529         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1530                 bool enable_radio;
1531                 bool all_wiphys_idle;
1532                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1533
1534                 spin_lock_bh(&sc->wiphy_lock);
1535                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1536                 ath9k_set_wiphy_idle(aphy, idle);
1537
1538                 enable_radio = (!idle && all_wiphys_idle);
1539
1540                 /*
1541                  * After we unlock here its possible another wiphy
1542                  * can be re-renabled so to account for that we will
1543                  * only disable the radio toward the end of this routine
1544                  * if by then all wiphys are still idle.
1545                  */
1546                 spin_unlock_bh(&sc->wiphy_lock);
1547
1548                 if (enable_radio) {
1549                         sc->ps_idle = false;
1550                         ath_radio_enable(sc, hw);
1551                         ath_print(common, ATH_DBG_CONFIG,
1552                                   "not-idle: enabling radio\n");
1553                 }
1554         }
1555
1556         /*
1557          * We just prepare to enable PS. We have to wait until our AP has
1558          * ACK'd our null data frame to disable RX otherwise we'll ignore
1559          * those ACKs and end up retransmitting the same null data frames.
1560          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1561          */
1562         if (changed & IEEE80211_CONF_CHANGE_PS) {
1563                 unsigned long flags;
1564                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1565                 if (conf->flags & IEEE80211_CONF_PS)
1566                         ath9k_enable_ps(sc);
1567                 else
1568                         ath9k_disable_ps(sc);
1569                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1570         }
1571
1572         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1573                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1574                         ath_print(common, ATH_DBG_CONFIG,
1575                                   "Monitor mode is enabled\n");
1576                         sc->sc_ah->is_monitoring = true;
1577                 } else {
1578                         ath_print(common, ATH_DBG_CONFIG,
1579                                   "Monitor mode is disabled\n");
1580                         sc->sc_ah->is_monitoring = false;
1581                 }
1582         }
1583
1584         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1585                 struct ieee80211_channel *curchan = hw->conf.channel;
1586                 int pos = curchan->hw_value;
1587                 int old_pos = -1;
1588                 unsigned long flags;
1589
1590                 if (ah->curchan)
1591                         old_pos = ah->curchan - &ah->channels[0];
1592
1593                 aphy->chan_idx = pos;
1594                 aphy->chan_is_ht = conf_is_ht(conf);
1595                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1596                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1597                 else
1598                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1599
1600                 if (aphy->state == ATH_WIPHY_SCAN ||
1601                     aphy->state == ATH_WIPHY_ACTIVE)
1602                         ath9k_wiphy_pause_all_forced(sc, aphy);
1603                 else {
1604                         /*
1605                          * Do not change operational channel based on a paused
1606                          * wiphy changes.
1607                          */
1608                         goto skip_chan_change;
1609                 }
1610
1611                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1612                           curchan->center_freq);
1613
1614                 /* XXX: remove me eventualy */
1615                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1616
1617                 ath_update_chainmask(sc, conf_is_ht(conf));
1618
1619                 /* update survey stats for the old channel before switching */
1620                 spin_lock_irqsave(&common->cc_lock, flags);
1621                 ath_update_survey_stats(sc);
1622                 spin_unlock_irqrestore(&common->cc_lock, flags);
1623
1624                 /*
1625                  * If the operating channel changes, change the survey in-use flags
1626                  * along with it.
1627                  * Reset the survey data for the new channel, unless we're switching
1628                  * back to the operating channel from an off-channel operation.
1629                  */
1630                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1631                     sc->cur_survey != &sc->survey[pos]) {
1632
1633                         if (sc->cur_survey)
1634                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1635
1636                         sc->cur_survey = &sc->survey[pos];
1637
1638                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1639                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1640                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1641                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1642                 }
1643
1644                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1645                         ath_print(common, ATH_DBG_FATAL,
1646                                   "Unable to set channel\n");
1647                         mutex_unlock(&sc->mutex);
1648                         return -EINVAL;
1649                 }
1650
1651                 /*
1652                  * The most recent snapshot of channel->noisefloor for the old
1653                  * channel is only available after the hardware reset. Copy it to
1654                  * the survey stats now.
1655                  */
1656                 if (old_pos >= 0)
1657                         ath_update_survey_nf(sc, old_pos);
1658         }
1659
1660 skip_chan_change:
1661         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1662                 sc->config.txpowlimit = 2 * conf->power_level;
1663                 ath_update_txpow(sc);
1664         }
1665
1666         spin_lock_bh(&sc->wiphy_lock);
1667         disable_radio = ath9k_all_wiphys_idle(sc);
1668         spin_unlock_bh(&sc->wiphy_lock);
1669
1670         if (disable_radio) {
1671                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1672                 sc->ps_idle = true;
1673                 ath_radio_disable(sc, hw);
1674         }
1675
1676         mutex_unlock(&sc->mutex);
1677
1678         return 0;
1679 }
1680
1681 #define SUPPORTED_FILTERS                       \
1682         (FIF_PROMISC_IN_BSS |                   \
1683         FIF_ALLMULTI |                          \
1684         FIF_CONTROL |                           \
1685         FIF_PSPOLL |                            \
1686         FIF_OTHER_BSS |                         \
1687         FIF_BCN_PRBRESP_PROMISC |               \
1688         FIF_PROBE_REQ |                         \
1689         FIF_FCSFAIL)
1690
1691 /* FIXME: sc->sc_full_reset ? */
1692 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1693                                    unsigned int changed_flags,
1694                                    unsigned int *total_flags,
1695                                    u64 multicast)
1696 {
1697         struct ath_wiphy *aphy = hw->priv;
1698         struct ath_softc *sc = aphy->sc;
1699         u32 rfilt;
1700
1701         changed_flags &= SUPPORTED_FILTERS;
1702         *total_flags &= SUPPORTED_FILTERS;
1703
1704         sc->rx.rxfilter = *total_flags;
1705         ath9k_ps_wakeup(sc);
1706         rfilt = ath_calcrxfilter(sc);
1707         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1708         ath9k_ps_restore(sc);
1709
1710         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1711                   "Set HW RX filter: 0x%x\n", rfilt);
1712 }
1713
1714 static int ath9k_sta_add(struct ieee80211_hw *hw,
1715                          struct ieee80211_vif *vif,
1716                          struct ieee80211_sta *sta)
1717 {
1718         struct ath_wiphy *aphy = hw->priv;
1719         struct ath_softc *sc = aphy->sc;
1720
1721         ath_node_attach(sc, sta);
1722
1723         return 0;
1724 }
1725
1726 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1727                             struct ieee80211_vif *vif,
1728                             struct ieee80211_sta *sta)
1729 {
1730         struct ath_wiphy *aphy = hw->priv;
1731         struct ath_softc *sc = aphy->sc;
1732
1733         ath_node_detach(sc, sta);
1734
1735         return 0;
1736 }
1737
1738 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1739                          const struct ieee80211_tx_queue_params *params)
1740 {
1741         struct ath_wiphy *aphy = hw->priv;
1742         struct ath_softc *sc = aphy->sc;
1743         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1744         struct ath_txq *txq;
1745         struct ath9k_tx_queue_info qi;
1746         int ret = 0;
1747
1748         if (queue >= WME_NUM_AC)
1749                 return 0;
1750
1751         txq = sc->tx.txq_map[queue];
1752
1753         mutex_lock(&sc->mutex);
1754
1755         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1756
1757         qi.tqi_aifs = params->aifs;
1758         qi.tqi_cwmin = params->cw_min;
1759         qi.tqi_cwmax = params->cw_max;
1760         qi.tqi_burstTime = params->txop;
1761
1762         ath_print(common, ATH_DBG_CONFIG,
1763                   "Configure tx [queue/halq] [%d/%d],  "
1764                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1765                   queue, txq->axq_qnum, params->aifs, params->cw_min,
1766                   params->cw_max, params->txop);
1767
1768         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1769         if (ret)
1770                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1771
1772         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1773                 if (queue == WME_AC_BE && !ret)
1774                         ath_beaconq_config(sc);
1775
1776         mutex_unlock(&sc->mutex);
1777
1778         return ret;
1779 }
1780
1781 static int ath9k_set_key(struct ieee80211_hw *hw,
1782                          enum set_key_cmd cmd,
1783                          struct ieee80211_vif *vif,
1784                          struct ieee80211_sta *sta,
1785                          struct ieee80211_key_conf *key)
1786 {
1787         struct ath_wiphy *aphy = hw->priv;
1788         struct ath_softc *sc = aphy->sc;
1789         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1790         int ret = 0;
1791
1792         if (modparam_nohwcrypt)
1793                 return -ENOSPC;
1794
1795         mutex_lock(&sc->mutex);
1796         ath9k_ps_wakeup(sc);
1797         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1798
1799         switch (cmd) {
1800         case SET_KEY:
1801                 ret = ath_key_config(common, vif, sta, key);
1802                 if (ret >= 0) {
1803                         key->hw_key_idx = ret;
1804                         /* push IV and Michael MIC generation to stack */
1805                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1806                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1807                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1808                         if (sc->sc_ah->sw_mgmt_crypto &&
1809                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1810                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1811                         ret = 0;
1812                 }
1813                 break;
1814         case DISABLE_KEY:
1815                 ath_key_delete(common, key);
1816                 break;
1817         default:
1818                 ret = -EINVAL;
1819         }
1820
1821         ath9k_ps_restore(sc);
1822         mutex_unlock(&sc->mutex);
1823
1824         return ret;
1825 }
1826
1827 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1828                                    struct ieee80211_vif *vif,
1829                                    struct ieee80211_bss_conf *bss_conf,
1830                                    u32 changed)
1831 {
1832         struct ath_wiphy *aphy = hw->priv;
1833         struct ath_softc *sc = aphy->sc;
1834         struct ath_hw *ah = sc->sc_ah;
1835         struct ath_common *common = ath9k_hw_common(ah);
1836         struct ath_vif *avp = (void *)vif->drv_priv;
1837         int slottime;
1838         int error;
1839
1840         mutex_lock(&sc->mutex);
1841
1842         if (changed & BSS_CHANGED_BSSID) {
1843                 /* Set BSSID */
1844                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1845                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1846                 common->curaid = 0;
1847                 ath9k_hw_write_associd(ah);
1848
1849                 /* Set aggregation protection mode parameters */
1850                 sc->config.ath_aggr_prot = 0;
1851
1852                 /* Only legacy IBSS for now */
1853                 if (vif->type == NL80211_IFTYPE_ADHOC)
1854                         ath_update_chainmask(sc, 0);
1855
1856                 ath_print(common, ATH_DBG_CONFIG,
1857                           "BSSID: %pM aid: 0x%x\n",
1858                           common->curbssid, common->curaid);
1859
1860                 /* need to reconfigure the beacon */
1861                 sc->sc_flags &= ~SC_OP_BEACONS ;
1862         }
1863
1864         /* Enable transmission of beacons (AP, IBSS, MESH) */
1865         if ((changed & BSS_CHANGED_BEACON) ||
1866             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1867                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1868                 error = ath_beacon_alloc(aphy, vif);
1869                 if (!error)
1870                         ath_beacon_config(sc, vif);
1871         }
1872
1873         if (changed & BSS_CHANGED_ERP_SLOT) {
1874                 if (bss_conf->use_short_slot)
1875                         slottime = 9;
1876                 else
1877                         slottime = 20;
1878                 if (vif->type == NL80211_IFTYPE_AP) {
1879                         /*
1880                          * Defer update, so that connected stations can adjust
1881                          * their settings at the same time.
1882                          * See beacon.c for more details
1883                          */
1884                         sc->beacon.slottime = slottime;
1885                         sc->beacon.updateslot = UPDATE;
1886                 } else {
1887                         ah->slottime = slottime;
1888                         ath9k_hw_init_global_settings(ah);
1889                 }
1890         }
1891
1892         /* Disable transmission of beacons */
1893         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1894                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1895
1896         if (changed & BSS_CHANGED_BEACON_INT) {
1897                 sc->beacon_interval = bss_conf->beacon_int;
1898                 /*
1899                  * In case of AP mode, the HW TSF has to be reset
1900                  * when the beacon interval changes.
1901                  */
1902                 if (vif->type == NL80211_IFTYPE_AP) {
1903                         sc->sc_flags |= SC_OP_TSF_RESET;
1904                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1905                         error = ath_beacon_alloc(aphy, vif);
1906                         if (!error)
1907                                 ath_beacon_config(sc, vif);
1908                 } else {
1909                         ath_beacon_config(sc, vif);
1910                 }
1911         }
1912
1913         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1914                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1915                           bss_conf->use_short_preamble);
1916                 if (bss_conf->use_short_preamble)
1917                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1918                 else
1919                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1920         }
1921
1922         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1923                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1924                           bss_conf->use_cts_prot);
1925                 if (bss_conf->use_cts_prot &&
1926                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1927                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1928                 else
1929                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1930         }
1931
1932         if (changed & BSS_CHANGED_ASSOC) {
1933                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1934                         bss_conf->assoc);
1935                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1936         }
1937
1938         mutex_unlock(&sc->mutex);
1939 }
1940
1941 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1942 {
1943         u64 tsf;
1944         struct ath_wiphy *aphy = hw->priv;
1945         struct ath_softc *sc = aphy->sc;
1946
1947         mutex_lock(&sc->mutex);
1948         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1949         mutex_unlock(&sc->mutex);
1950
1951         return tsf;
1952 }
1953
1954 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1955 {
1956         struct ath_wiphy *aphy = hw->priv;
1957         struct ath_softc *sc = aphy->sc;
1958
1959         mutex_lock(&sc->mutex);
1960         ath9k_hw_settsf64(sc->sc_ah, tsf);
1961         mutex_unlock(&sc->mutex);
1962 }
1963
1964 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1965 {
1966         struct ath_wiphy *aphy = hw->priv;
1967         struct ath_softc *sc = aphy->sc;
1968
1969         mutex_lock(&sc->mutex);
1970
1971         ath9k_ps_wakeup(sc);
1972         ath9k_hw_reset_tsf(sc->sc_ah);
1973         ath9k_ps_restore(sc);
1974
1975         mutex_unlock(&sc->mutex);
1976 }
1977
1978 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1979                               struct ieee80211_vif *vif,
1980                               enum ieee80211_ampdu_mlme_action action,
1981                               struct ieee80211_sta *sta,
1982                               u16 tid, u16 *ssn)
1983 {
1984         struct ath_wiphy *aphy = hw->priv;
1985         struct ath_softc *sc = aphy->sc;
1986         int ret = 0;
1987
1988         local_bh_disable();
1989
1990         switch (action) {
1991         case IEEE80211_AMPDU_RX_START:
1992                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1993                         ret = -ENOTSUPP;
1994                 break;
1995         case IEEE80211_AMPDU_RX_STOP:
1996                 break;
1997         case IEEE80211_AMPDU_TX_START:
1998                 if (!(sc->sc_flags & SC_OP_TXAGGR))
1999                         return -EOPNOTSUPP;
2000
2001                 ath9k_ps_wakeup(sc);
2002                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2003                 if (!ret)
2004                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2005                 ath9k_ps_restore(sc);
2006                 break;
2007         case IEEE80211_AMPDU_TX_STOP:
2008                 ath9k_ps_wakeup(sc);
2009                 ath_tx_aggr_stop(sc, sta, tid);
2010                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2011                 ath9k_ps_restore(sc);
2012                 break;
2013         case IEEE80211_AMPDU_TX_OPERATIONAL:
2014                 ath9k_ps_wakeup(sc);
2015                 ath_tx_aggr_resume(sc, sta, tid);
2016                 ath9k_ps_restore(sc);
2017                 break;
2018         default:
2019                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2020                           "Unknown AMPDU action\n");
2021         }
2022
2023         local_bh_enable();
2024
2025         return ret;
2026 }
2027
2028 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2029                              struct survey_info *survey)
2030 {
2031         struct ath_wiphy *aphy = hw->priv;
2032         struct ath_softc *sc = aphy->sc;
2033         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2034         struct ieee80211_supported_band *sband;
2035         struct ieee80211_channel *chan;
2036         unsigned long flags;
2037         int pos;
2038
2039         spin_lock_irqsave(&common->cc_lock, flags);
2040         if (idx == 0)
2041                 ath_update_survey_stats(sc);
2042
2043         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2044         if (sband && idx >= sband->n_channels) {
2045                 idx -= sband->n_channels;
2046                 sband = NULL;
2047         }
2048
2049         if (!sband)
2050                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2051
2052         if (!sband || idx >= sband->n_channels) {
2053                 spin_unlock_irqrestore(&common->cc_lock, flags);
2054                 return -ENOENT;
2055         }
2056
2057         chan = &sband->channels[idx];
2058         pos = chan->hw_value;
2059         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2060         survey->channel = chan;
2061         spin_unlock_irqrestore(&common->cc_lock, flags);
2062
2063         return 0;
2064 }
2065
2066 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2067 {
2068         struct ath_wiphy *aphy = hw->priv;
2069         struct ath_softc *sc = aphy->sc;
2070
2071         mutex_lock(&sc->mutex);
2072         if (ath9k_wiphy_scanning(sc)) {
2073                 /*
2074                  * There is a race here in mac80211 but fixing it requires
2075                  * we revisit how we handle the scan complete callback.
2076                  * After mac80211 fixes we will not have configured hardware
2077                  * to the home channel nor would we have configured the RX
2078                  * filter yet.
2079                  */
2080                 mutex_unlock(&sc->mutex);
2081                 return;
2082         }
2083
2084         aphy->state = ATH_WIPHY_SCAN;
2085         ath9k_wiphy_pause_all_forced(sc, aphy);
2086         mutex_unlock(&sc->mutex);
2087 }
2088
2089 /*
2090  * XXX: this requires a revisit after the driver
2091  * scan_complete gets moved to another place/removed in mac80211.
2092  */
2093 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2094 {
2095         struct ath_wiphy *aphy = hw->priv;
2096         struct ath_softc *sc = aphy->sc;
2097
2098         mutex_lock(&sc->mutex);
2099         aphy->state = ATH_WIPHY_ACTIVE;
2100         mutex_unlock(&sc->mutex);
2101 }
2102
2103 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2104 {
2105         struct ath_wiphy *aphy = hw->priv;
2106         struct ath_softc *sc = aphy->sc;
2107         struct ath_hw *ah = sc->sc_ah;
2108
2109         mutex_lock(&sc->mutex);
2110         ah->coverage_class = coverage_class;
2111         ath9k_hw_init_global_settings(ah);
2112         mutex_unlock(&sc->mutex);
2113 }
2114
2115 struct ieee80211_ops ath9k_ops = {
2116         .tx                 = ath9k_tx,
2117         .start              = ath9k_start,
2118         .stop               = ath9k_stop,
2119         .add_interface      = ath9k_add_interface,
2120         .remove_interface   = ath9k_remove_interface,
2121         .config             = ath9k_config,
2122         .configure_filter   = ath9k_configure_filter,
2123         .sta_add            = ath9k_sta_add,
2124         .sta_remove         = ath9k_sta_remove,
2125         .conf_tx            = ath9k_conf_tx,
2126         .bss_info_changed   = ath9k_bss_info_changed,
2127         .set_key            = ath9k_set_key,
2128         .get_tsf            = ath9k_get_tsf,
2129         .set_tsf            = ath9k_set_tsf,
2130         .reset_tsf          = ath9k_reset_tsf,
2131         .ampdu_action       = ath9k_ampdu_action,
2132         .get_survey         = ath9k_get_survey,
2133         .sw_scan_start      = ath9k_sw_scan_start,
2134         .sw_scan_complete   = ath9k_sw_scan_complete,
2135         .rfkill_poll        = ath9k_rfkill_poll_state,
2136         .set_coverage_class = ath9k_set_coverage_class,
2137 };