drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54
  55         if (sc->curtxpow != sc->config.txpowlimit) {
  56                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  57                 /* read back in case value is clamped */
  58                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  59         }
  60 }
  61
  62 static u8 parse_mpdudensity(u8 mpdudensity)
  63 {
  64         /*
  65          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  66          *   0 for no restriction
  67          *   1 for 1/4 us
  68          *   2 for 1/2 us
  69          *   3 for 1 us
  70          *   4 for 2 us
  71          *   5 for 4 us
  72          *   6 for 8 us
  73          *   7 for 16 us
  74          */
  75         switch (mpdudensity) {
  76         case 0:
  77                 return 0;
  78         case 1:
  79         case 2:
  80         case 3:
  81                 /* Our lower layer calculations limit our precision to
  82                    1 microsecond */
  83                 return 1;
  84         case 4:
  85                 return 2;
  86         case 5:
  87                 return 4;
  88         case 6:
  89                 return 8;
  90         case 7:
  91                 return 16;
  92         default:
  93                 return 0;
  94         }
  95 }
  96
  97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  98                                                 struct ieee80211_hw *hw)
  99 {
 100         struct ieee80211_channel *curchan = hw->conf.channel;
 101         struct ath9k_channel *channel;
 102         u8 chan_idx;
 103
 104         chan_idx = curchan->hw_value;
 105         channel = &sc->sc_ah->channels[chan_idx];
 106         ath9k_update_ichannel(sc, hw, channel);
 107         return channel;
 108 }
 109
 110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 111 {
 112         unsigned long flags;
 113         bool ret;
 114
 115         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 116         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 117         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 118
 119         return ret;
 120 }
 121
 122 void ath9k_ps_wakeup(struct ath_softc *sc)
 123 {
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (++sc->ps_usecount != 1)
 128                 goto unlock;
 129
 130         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 131
 132  unlock:
 133         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 134 }
 135
 136 void ath9k_ps_restore(struct ath_softc *sc)
 137 {
 138         unsigned long flags;
 139
 140         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 141         if (--sc->ps_usecount != 0)
 142                 goto unlock;
 143
 144         if (sc->ps_idle)
 145                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 146         else if (sc->ps_enabled &&
 147                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 148                               PS_WAIT_FOR_CAB |
 149                               PS_WAIT_FOR_PSPOLL_DATA |
 150                               PS_WAIT_FOR_TX_ACK)))
 151                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 152
 153  unlock:
 154         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 155 }
 156
 157 /*
 158  * Set/change channels.  If the channel is really being changed, it's done
 159  * by reseting the chip.  To accomplish this we must first cleanup any pending
 160  * DMA, then restart stuff.
 161 */
 162 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 163                     struct ath9k_channel *hchan)
 164 {
 165         struct ath_hw *ah = sc->sc_ah;
 166         struct ath_common *common = ath9k_hw_common(ah);
 167         struct ieee80211_conf *conf = &common->hw->conf;
 168         bool fastcc = true, stopped;
 169         struct ieee80211_channel *channel = hw->conf.channel;
 170         int r;
 171
 172         if (sc->sc_flags & SC_OP_INVALID)
 173                 return -EIO;
 174
 175         ath9k_ps_wakeup(sc);
 176
 177         /*
 178          * This is only performed if the channel settings have
 179          * actually changed.
 180          *
 181          * To switch channels clear any pending DMA operations;
 182          * wait long enough for the RX fifo to drain, reset the
 183          * hardware at the new frequency, and then re-enable
 184          * the relevant bits of the h/w.
 185          */
 186         ath9k_hw_set_interrupts(ah, 0);
 187         ath_drain_all_txq(sc, false);
 188         stopped = ath_stoprecv(sc);
 189
 190         /* XXX: do not flush receive queue here. We don't want
 191          * to flush data frames already in queue because of
 192          * changing channel. */
 193
 194         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 195                 fastcc = false;
 196
 197         ath_print(common, ATH_DBG_CONFIG,
 198                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 199                   sc->sc_ah->curchan->channel,
 200                   channel->center_freq, conf_is_ht40(conf));
 201
 202         spin_lock_bh(&sc->sc_resetlock);
 203
 204         r = ath9k_hw_reset(ah, hchan, fastcc);
 205         if (r) {
 206                 ath_print(common, ATH_DBG_FATAL,
 207                           "Unable to reset channel (%u MHz), "
 208                           "reset status %d\n",
 209                           channel->center_freq, r);
 210                 spin_unlock_bh(&sc->sc_resetlock);
 211                 goto ps_restore;
 212         }
 213         spin_unlock_bh(&sc->sc_resetlock);
 214
 215         sc->sc_flags &= ~SC_OP_FULL_RESET;
 216
 217         if (ath_startrecv(sc) != 0) {
 218                 ath_print(common, ATH_DBG_FATAL,
 219                           "Unable to restart recv logic\n");
 220                 r = -EIO;
 221                 goto ps_restore;
 222         }
 223
 224         ath_cache_conf_rate(sc, &hw->conf);
 225         ath_update_txpow(sc);
 226         ath9k_hw_set_interrupts(ah, ah->imask);
 227
 228  ps_restore:
 229         ath9k_ps_restore(sc);
 230         return r;
 231 }
 232
 233 static void ath_paprd_activate(struct ath_softc *sc)
 234 {
 235         struct ath_hw *ah = sc->sc_ah;
 236         int chain;
 237
 238         if (!ah->curchan->paprd_done)
 239                 return;
 240
 241         ath9k_ps_wakeup(sc);
 242         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 243                 if (!(ah->caps.tx_chainmask & BIT(chain)))
 244                         continue;
 245
 246                 ar9003_paprd_populate_single_table(ah, ah->curchan, chain);
 247         }
 248
 249         ar9003_paprd_enable(ah, true);
 250         ath9k_ps_restore(sc);
 251 }
 252
 253 void ath_paprd_calibrate(struct work_struct *work)
 254 {
 255         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 256         struct ieee80211_hw *hw = sc->hw;
 257         struct ath_hw *ah = sc->sc_ah;
 258         struct ieee80211_hdr *hdr;
 259         struct sk_buff *skb = NULL;
 260         struct ieee80211_tx_info *tx_info;
 261         int band = hw->conf.channel->band;
 262         struct ieee80211_supported_band *sband = &sc->sbands[band];
 263         struct ath_tx_control txctl;
 264         int qnum, ftype;
 265         int chain_ok = 0;
 266         int chain;
 267         int len = 1800;
 268         int time_left;
 269         int i;
 270
 271         skb = alloc_skb(len, GFP_KERNEL);
 272         if (!skb)
 273                 return;
 274
 275         tx_info = IEEE80211_SKB_CB(skb);
 276
 277         skb_put(skb, len);
 278         memset(skb->data, 0, len);
 279         hdr = (struct ieee80211_hdr *)skb->data;
 280         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 281         hdr->frame_control = cpu_to_le16(ftype);
 282         hdr->duration_id = 10;
 283         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 284         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 285         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 286
 287         memset(&txctl, 0, sizeof(txctl));
 288         qnum = sc->tx.hwq_map[WME_AC_BE];
 289         txctl.txq = &sc->tx.txq[qnum];
 290
 291         ath9k_ps_wakeup(sc);
 292         ar9003_paprd_init_table(ah);
 293         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 294                 if (!(ah->caps.tx_chainmask & BIT(chain)))
 295                         continue;
 296
 297                 chain_ok = 0;
 298                 memset(tx_info, 0, sizeof(*tx_info));
 299                 tx_info->band = band;
 300
 301                 for (i = 0; i < 4; i++) {
 302                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 303                         tx_info->control.rates[i].count = 6;
 304                 }
 305
 306                 init_completion(&sc->paprd_complete);
 307                 ar9003_paprd_setup_gain_table(ah, chain);
 308                 txctl.paprd = BIT(chain);
 309                 if (ath_tx_start(hw, skb, &txctl) != 0)
 310                         break;
 311
 312                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 313                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 314                 if (!time_left) {
 315                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 316                                   "Timeout waiting for paprd training on "
 317                                   "TX chain %d\n",
 318                                   chain);
 319                         goto fail_paprd;
 320                 }
 321
 322                 if (!ar9003_paprd_is_done(ah))
 323                         break;
 324
 325                 if (ar9003_paprd_create_curve(ah, ah->curchan, chain) != 0)
 326                         break;
 327
 328                 chain_ok = 1;
 329         }
 330         kfree_skb(skb);
 331
 332         if (chain_ok) {
 333                 ah->curchan->paprd_done = true;
 334                 ath_paprd_activate(sc);
 335         }
 336
 337 fail_paprd:
 338         ath9k_ps_restore(sc);
 339 }
 340
 341 /*
 342  *  This routine performs the periodic noise floor calibration function
 343  *  that is used to adjust and optimize the chip performance.  This
 344  *  takes environmental changes (location, temperature) into account.
 345  *  When the task is complete, it reschedules itself depending on the
 346  *  appropriate interval that was calculated.
 347  */
 348 void ath_ani_calibrate(unsigned long data)
 349 {
 350         struct ath_softc *sc = (struct ath_softc *)data;
 351         struct ath_hw *ah = sc->sc_ah;
 352         struct ath_common *common = ath9k_hw_common(ah);
 353         bool longcal = false;
 354         bool shortcal = false;
 355         bool aniflag = false;
 356         unsigned int timestamp = jiffies_to_msecs(jiffies);
 357         u32 cal_interval, short_cal_interval;
 358
 359         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 360                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 361
 362         /* Only calibrate if awake */
 363         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 364                 goto set_timer;
 365
 366         ath9k_ps_wakeup(sc);
 367
 368         /* Long calibration runs independently of short calibration. */
 369         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 370                 longcal = true;
 371                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 372                 common->ani.longcal_timer = timestamp;
 373         }
 374
 375         /* Short calibration applies only while caldone is false */
 376         if (!common->ani.caldone) {
 377                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 378                         shortcal = true;
 379                         ath_print(common, ATH_DBG_ANI,
 380                                   "shortcal @%lu\n", jiffies);
 381                         common->ani.shortcal_timer = timestamp;
 382                         common->ani.resetcal_timer = timestamp;
 383                 }
 384         } else {
 385                 if ((timestamp - common->ani.resetcal_timer) >=
 386                     ATH_RESTART_CALINTERVAL) {
 387                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 388                         if (common->ani.caldone)
 389                                 common->ani.resetcal_timer = timestamp;
 390                 }
 391         }
 392
 393         /* Verify whether we must check ANI */
 394         if ((timestamp - common->ani.checkani_timer) >=
 395              ah->config.ani_poll_interval) {
 396                 aniflag = true;
 397                 common->ani.checkani_timer = timestamp;
 398         }
 399
 400         /* Skip all processing if there's nothing to do. */
 401         if (longcal || shortcal || aniflag) {
 402                 /* Call ANI routine if necessary */
 403                 if (aniflag)
 404                         ath9k_hw_ani_monitor(ah, ah->curchan);
 405
 406                 /* Perform calibration if necessary */
 407                 if (longcal || shortcal) {
 408                         common->ani.caldone =
 409                                 ath9k_hw_calibrate(ah,
 410                                                    ah->curchan,
 411                                                    common->rx_chainmask,
 412                                                    longcal);
 413
 414                         if (longcal)
 415                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 416                                                                      ah->curchan);
 417
 418                         ath_print(common, ATH_DBG_ANI,
 419                                   " calibrate chan %u/%x nf: %d\n",
 420                                   ah->curchan->channel,
 421                                   ah->curchan->channelFlags,
 422                                   common->ani.noise_floor);
 423                 }
 424         }
 425
 426         ath9k_ps_restore(sc);
 427
 428 set_timer:
 429         /*
 430         * Set timer interval based on previous results.
 431         * The interval must be the shortest necessary to satisfy ANI,
 432         * short calibration and long calibration.
 433         */
 434         cal_interval = ATH_LONG_CALINTERVAL;
 435         if (sc->sc_ah->config.enable_ani)
 436                 cal_interval = min(cal_interval,
 437                                    (u32)ah->config.ani_poll_interval);
 438         if (!common->ani.caldone)
 439                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 440
 441         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 442         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) &&
 443             !(sc->sc_flags & SC_OP_SCANNING)) {
 444                 if (!sc->sc_ah->curchan->paprd_done)
 445                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 446                 else
 447                         ath_paprd_activate(sc);
 448         }
 449 }
 450
 451 static void ath_start_ani(struct ath_common *common)
 452 {
 453         struct ath_hw *ah = common->ah;
 454         unsigned long timestamp = jiffies_to_msecs(jiffies);
 455         struct ath_softc *sc = (struct ath_softc *) common->priv;
 456
 457         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 458                 return;
 459
 460         common->ani.longcal_timer = timestamp;
 461         common->ani.shortcal_timer = timestamp;
 462         common->ani.checkani_timer = timestamp;
 463
 464         mod_timer(&common->ani.timer,
 465                   jiffies +
 466                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 467 }
 468
 469 /*
 470  * Update tx/rx chainmask. For legacy association,
 471  * hard code chainmask to 1x1, for 11n association, use
 472  * the chainmask configuration, for bt coexistence, use
 473  * the chainmask configuration even in legacy mode.
 474  */
 475 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 476 {
 477         struct ath_hw *ah = sc->sc_ah;
 478         struct ath_common *common = ath9k_hw_common(ah);
 479
 480         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 481             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 482                 common->tx_chainmask = ah->caps.tx_chainmask;
 483                 common->rx_chainmask = ah->caps.rx_chainmask;
 484         } else {
 485                 common->tx_chainmask = 1;
 486                 common->rx_chainmask = 1;
 487         }
 488
 489         ath_print(common, ATH_DBG_CONFIG,
 490                   "tx chmask: %d, rx chmask: %d\n",
 491                   common->tx_chainmask,
 492                   common->rx_chainmask);
 493 }
 494
 495 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 496 {
 497         struct ath_node *an;
 498
 499         an = (struct ath_node *)sta->drv_priv;
 500
 501         if (sc->sc_flags & SC_OP_TXAGGR) {
 502                 ath_tx_node_init(sc, an);
 503                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 504                                      sta->ht_cap.ampdu_factor);
 505                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 506                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 507         }
 508 }
 509
 510 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 511 {
 512         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 513
 514         if (sc->sc_flags & SC_OP_TXAGGR)
 515                 ath_tx_node_cleanup(sc, an);
 516 }
 517
 518 void ath9k_tasklet(unsigned long data)
 519 {
 520         struct ath_softc *sc = (struct ath_softc *)data;
 521         struct ath_hw *ah = sc->sc_ah;
 522         struct ath_common *common = ath9k_hw_common(ah);
 523
 524         u32 status = sc->intrstatus;
 525         u32 rxmask;
 526
 527         ath9k_ps_wakeup(sc);
 528
 529         if ((status & ATH9K_INT_FATAL) ||
 530             !ath9k_hw_check_alive(ah)) {
 531                 ath_reset(sc, false);
 532                 ath9k_ps_restore(sc);
 533                 return;
 534         }
 535
 536         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 537                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 538                           ATH9K_INT_RXORN);
 539         else
 540                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 541
 542         if (status & rxmask) {
 543                 spin_lock_bh(&sc->rx.rxflushlock);
 544
 545                 /* Check for high priority Rx first */
 546                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 547                     (status & ATH9K_INT_RXHP))
 548                         ath_rx_tasklet(sc, 0, true);
 549
 550                 ath_rx_tasklet(sc, 0, false);
 551                 spin_unlock_bh(&sc->rx.rxflushlock);
 552         }
 553
 554         if (status & ATH9K_INT_TX) {
 555                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 556                         ath_tx_edma_tasklet(sc);
 557                 else
 558                         ath_tx_tasklet(sc);
 559         }
 560
 561         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 562                 /*
 563                  * TSF sync does not look correct; remain awake to sync with
 564                  * the next Beacon.
 565                  */
 566                 ath_print(common, ATH_DBG_PS,
 567                           "TSFOOR - Sync with next Beacon\n");
 568                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 569         }
 570
 571         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 572                 if (status & ATH9K_INT_GENTIMER)
 573                         ath_gen_timer_isr(sc->sc_ah);
 574
 575         /* re-enable hardware interrupt */
 576         ath9k_hw_set_interrupts(ah, ah->imask);
 577         ath9k_ps_restore(sc);
 578 }
 579
 580 irqreturn_t ath_isr(int irq, void *dev)
 581 {
 582 #define SCHED_INTR (                            \
 583                 ATH9K_INT_FATAL |               \
 584                 ATH9K_INT_RXORN |               \
 585                 ATH9K_INT_RXEOL |               \
 586                 ATH9K_INT_RX |                  \
 587                 ATH9K_INT_RXLP |                \
 588                 ATH9K_INT_RXHP |                \
 589                 ATH9K_INT_TX |                  \
 590                 ATH9K_INT_BMISS |               \
 591                 ATH9K_INT_CST |                 \
 592                 ATH9K_INT_TSFOOR |              \
 593                 ATH9K_INT_GENTIMER)
 594
 595         struct ath_softc *sc = dev;
 596         struct ath_hw *ah = sc->sc_ah;
 597         enum ath9k_int status;
 598         bool sched = false;
 599
 600         /*
 601          * The hardware is not ready/present, don't
 602          * touch anything. Note this can happen early
 603          * on if the IRQ is shared.
 604          */
 605         if (sc->sc_flags & SC_OP_INVALID)
 606                 return IRQ_NONE;
 607
 608
 609         /* shared irq, not for us */
 610
 611         if (!ath9k_hw_intrpend(ah))
 612                 return IRQ_NONE;
 613
 614         /*
 615          * Figure out the reason(s) for the interrupt.  Note
 616          * that the hal returns a pseudo-ISR that may include
 617          * bits we haven't explicitly enabled so we mask the
 618          * value to insure we only process bits we requested.
 619          */
 620         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 621         status &= ah->imask;    /* discard unasked-for bits */
 622
 623         /*
 624          * If there are no status bits set, then this interrupt was not
 625          * for me (should have been caught above).
 626          */
 627         if (!status)
 628                 return IRQ_NONE;
 629
 630         /* Cache the status */
 631         sc->intrstatus = status;
 632
 633         if (status & SCHED_INTR)
 634                 sched = true;
 635
 636         /*
 637          * If a FATAL or RXORN interrupt is received, we have to reset the
 638          * chip immediately.
 639          */
 640         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 641             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 642                 goto chip_reset;
 643
 644         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 645             (status & ATH9K_INT_BB_WATCHDOG)) {
 646                 ar9003_hw_bb_watchdog_dbg_info(ah);
 647                 goto chip_reset;
 648         }
 649
 650         if (status & ATH9K_INT_SWBA)
 651                 tasklet_schedule(&sc->bcon_tasklet);
 652
 653         if (status & ATH9K_INT_TXURN)
 654                 ath9k_hw_updatetxtriglevel(ah, true);
 655
 656         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 657                 if (status & ATH9K_INT_RXEOL) {
 658                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 659                         ath9k_hw_set_interrupts(ah, ah->imask);
 660                 }
 661         }
 662
 663         if (status & ATH9K_INT_MIB) {
 664                 /*
 665                  * Disable interrupts until we service the MIB
 666                  * interrupt; otherwise it will continue to
 667                  * fire.
 668                  */
 669                 ath9k_hw_set_interrupts(ah, 0);
 670                 /*
 671                  * Let the hal handle the event. We assume
 672                  * it will clear whatever condition caused
 673                  * the interrupt.
 674                  */
 675                 ath9k_hw_procmibevent(ah);
 676                 ath9k_hw_set_interrupts(ah, ah->imask);
 677         }
 678
 679         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 680                 if (status & ATH9K_INT_TIM_TIMER) {
 681                         /* Clear RxAbort bit so that we can
 682                          * receive frames */
 683                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 684                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 685                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 686                 }
 687
 688 chip_reset:
 689
 690         ath_debug_stat_interrupt(sc, status);
 691
 692         if (sched) {
 693                 /* turn off every interrupt except SWBA */
 694                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 695                 tasklet_schedule(&sc->intr_tq);
 696         }
 697
 698         return IRQ_HANDLED;
 699
 700 #undef SCHED_INTR
 701 }
 702
 703 static u32 ath_get_extchanmode(struct ath_softc *sc,
 704                                struct ieee80211_channel *chan,
 705                                enum nl80211_channel_type channel_type)
 706 {
 707         u32 chanmode = 0;
 708
 709         switch (chan->band) {
 710         case IEEE80211_BAND_2GHZ:
 711                 switch(channel_type) {
 712                 case NL80211_CHAN_NO_HT:
 713                 case NL80211_CHAN_HT20:
 714                         chanmode = CHANNEL_G_HT20;
 715                         break;
 716                 case NL80211_CHAN_HT40PLUS:
 717                         chanmode = CHANNEL_G_HT40PLUS;
 718                         break;
 719                 case NL80211_CHAN_HT40MINUS:
 720                         chanmode = CHANNEL_G_HT40MINUS;
 721                         break;
 722                 }
 723                 break;
 724         case IEEE80211_BAND_5GHZ:
 725                 switch(channel_type) {
 726                 case NL80211_CHAN_NO_HT:
 727                 case NL80211_CHAN_HT20:
 728                         chanmode = CHANNEL_A_HT20;
 729                         break;
 730                 case NL80211_CHAN_HT40PLUS:
 731                         chanmode = CHANNEL_A_HT40PLUS;
 732                         break;
 733                 case NL80211_CHAN_HT40MINUS:
 734                         chanmode = CHANNEL_A_HT40MINUS;
 735                         break;
 736                 }
 737                 break;
 738         default:
 739                 break;
 740         }
 741
 742         return chanmode;
 743 }
 744
 745 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 746                                  struct ieee80211_vif *vif,
 747                                  struct ieee80211_bss_conf *bss_conf)
 748 {
 749         struct ath_hw *ah = sc->sc_ah;
 750         struct ath_common *common = ath9k_hw_common(ah);
 751
 752         if (bss_conf->assoc) {
 753                 ath_print(common, ATH_DBG_CONFIG,
 754                           "Bss Info ASSOC %d, bssid: %pM\n",
 755                            bss_conf->aid, common->curbssid);
 756
 757                 /* New association, store aid */
 758                 common->curaid = bss_conf->aid;
 759                 ath9k_hw_write_associd(ah);
 760
 761                 /*
 762                  * Request a re-configuration of Beacon related timers
 763                  * on the receipt of the first Beacon frame (i.e.,
 764                  * after time sync with the AP).
 765                  */
 766                 sc->ps_flags |= PS_BEACON_SYNC;
 767
 768                 /* Configure the beacon */
 769                 ath_beacon_config(sc, vif);
 770
 771                 /* Reset rssi stats */
 772                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 773
 774                 sc->sc_flags |= SC_OP_ANI_RUN;
 775                 ath_start_ani(common);
 776         } else {
 777                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 778                 common->curaid = 0;
 779                 /* Stop ANI */
 780                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 781                 del_timer_sync(&common->ani.timer);
 782         }
 783 }
 784
 785 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 786 {
 787         struct ath_hw *ah = sc->sc_ah;
 788         struct ath_common *common = ath9k_hw_common(ah);
 789         struct ieee80211_channel *channel = hw->conf.channel;
 790         int r;
 791
 792         ath9k_ps_wakeup(sc);
 793         ath9k_hw_configpcipowersave(ah, 0, 0);
 794
 795         if (!ah->curchan)
 796                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 797
 798         spin_lock_bh(&sc->sc_resetlock);
 799         r = ath9k_hw_reset(ah, ah->curchan, false);
 800         if (r) {
 801                 ath_print(common, ATH_DBG_FATAL,
 802                           "Unable to reset channel (%u MHz), "
 803                           "reset status %d\n",
 804                           channel->center_freq, r);
 805         }
 806         spin_unlock_bh(&sc->sc_resetlock);
 807
 808         ath_update_txpow(sc);
 809         if (ath_startrecv(sc) != 0) {
 810                 ath_print(common, ATH_DBG_FATAL,
 811                           "Unable to restart recv logic\n");
 812                 return;
 813         }
 814
 815         if (sc->sc_flags & SC_OP_BEACONS)
 816                 ath_beacon_config(sc, NULL);    /* restart beacons */
 817
 818         /* Re-Enable  interrupts */
 819         ath9k_hw_set_interrupts(ah, ah->imask);
 820
 821         /* Enable LED */
 822         ath9k_hw_cfg_output(ah, ah->led_pin,
 823                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 824         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 825
 826         ieee80211_wake_queues(hw);
 827         ath9k_ps_restore(sc);
 828 }
 829
 830 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 831 {
 832         struct ath_hw *ah = sc->sc_ah;
 833         struct ieee80211_channel *channel = hw->conf.channel;
 834         int r;
 835
 836         ath9k_ps_wakeup(sc);
 837         ieee80211_stop_queues(hw);
 838
 839         /* Disable LED */
 840         ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 841         ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 842
 843         /* Disable interrupts */
 844         ath9k_hw_set_interrupts(ah, 0);
 845
 846         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 847         ath_stoprecv(sc);               /* turn off frame recv */
 848         ath_flushrecv(sc);              /* flush recv queue */
 849
 850         if (!ah->curchan)
 851                 ah->curchan = ath_get_curchannel(sc, hw);
 852
 853         spin_lock_bh(&sc->sc_resetlock);
 854         r = ath9k_hw_reset(ah, ah->curchan, false);
 855         if (r) {
 856                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 857                           "Unable to reset channel (%u MHz), "
 858                           "reset status %d\n",
 859                           channel->center_freq, r);
 860         }
 861         spin_unlock_bh(&sc->sc_resetlock);
 862
 863         ath9k_hw_phy_disable(ah);
 864         ath9k_hw_configpcipowersave(ah, 1, 1);
 865         ath9k_ps_restore(sc);
 866         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 867 }
 868
 869 int ath_reset(struct ath_softc *sc, bool retry_tx)
 870 {
 871         struct ath_hw *ah = sc->sc_ah;
 872         struct ath_common *common = ath9k_hw_common(ah);
 873         struct ieee80211_hw *hw = sc->hw;
 874         int r;
 875
 876         /* Stop ANI */
 877         del_timer_sync(&common->ani.timer);
 878
 879         ieee80211_stop_queues(hw);
 880
 881         ath9k_hw_set_interrupts(ah, 0);
 882         ath_drain_all_txq(sc, retry_tx);
 883         ath_stoprecv(sc);
 884         ath_flushrecv(sc);
 885
 886         spin_lock_bh(&sc->sc_resetlock);
 887         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 888         if (r)
 889                 ath_print(common, ATH_DBG_FATAL,
 890                           "Unable to reset hardware; reset status %d\n", r);
 891         spin_unlock_bh(&sc->sc_resetlock);
 892
 893         if (ath_startrecv(sc) != 0)
 894                 ath_print(common, ATH_DBG_FATAL,
 895                           "Unable to start recv logic\n");
 896
 897         /*
 898          * We may be doing a reset in response to a request
 899          * that changes the channel so update any state that
 900          * might change as a result.
 901          */
 902         ath_cache_conf_rate(sc, &hw->conf);
 903
 904         ath_update_txpow(sc);
 905
 906         if (sc->sc_flags & SC_OP_BEACONS)
 907                 ath_beacon_config(sc, NULL);    /* restart beacons */
 908
 909         ath9k_hw_set_interrupts(ah, ah->imask);
 910
 911         if (retry_tx) {
 912                 int i;
 913                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 914                         if (ATH_TXQ_SETUP(sc, i)) {
 915                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 916                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 917                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 918                         }
 919                 }
 920         }
 921
 922         ieee80211_wake_queues(hw);
 923
 924         /* Start ANI */
 925         ath_start_ani(common);
 926
 927         return r;
 928 }
 929
 930 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
 931 {
 932         int qnum;
 933
 934         switch (queue) {
 935         case 0:
 936                 qnum = sc->tx.hwq_map[WME_AC_VO];
 937                 break;
 938         case 1:
 939                 qnum = sc->tx.hwq_map[WME_AC_VI];
 940                 break;
 941         case 2:
 942                 qnum = sc->tx.hwq_map[WME_AC_BE];
 943                 break;
 944         case 3:
 945                 qnum = sc->tx.hwq_map[WME_AC_BK];
 946                 break;
 947         default:
 948                 qnum = sc->tx.hwq_map[WME_AC_BE];
 949                 break;
 950         }
 951
 952         return qnum;
 953 }
 954
 955 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
 956 {
 957         int qnum;
 958
 959         switch (queue) {
 960         case WME_AC_VO:
 961                 qnum = 0;
 962                 break;
 963         case WME_AC_VI:
 964                 qnum = 1;
 965                 break;
 966         case WME_AC_BE:
 967                 qnum = 2;
 968                 break;
 969         case WME_AC_BK:
 970                 qnum = 3;
 971                 break;
 972         default:
 973                 qnum = -1;
 974                 break;
 975         }
 976
 977         return qnum;
 978 }
 979
 980 /* XXX: Remove me once we don't depend on ath9k_channel for all
 981  * this redundant data */
 982 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
 983                            struct ath9k_channel *ichan)
 984 {
 985         struct ieee80211_channel *chan = hw->conf.channel;
 986         struct ieee80211_conf *conf = &hw->conf;
 987
 988         ichan->channel = chan->center_freq;
 989         ichan->chan = chan;
 990
 991         if (chan->band == IEEE80211_BAND_2GHZ) {
 992                 ichan->chanmode = CHANNEL_G;
 993                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
 994         } else {
 995                 ichan->chanmode = CHANNEL_A;
 996                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
 997         }
 998
 999         if (conf_is_ht(conf))
1000                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1001                                             conf->channel_type);
1002 }
1003
1004 /**********************/
1005 /* mac80211 callbacks */
1006 /**********************/
1007
1008 static int ath9k_start(struct ieee80211_hw *hw)
1009 {
1010         struct ath_wiphy *aphy = hw->priv;
1011         struct ath_softc *sc = aphy->sc;
1012         struct ath_hw *ah = sc->sc_ah;
1013         struct ath_common *common = ath9k_hw_common(ah);
1014         struct ieee80211_channel *curchan = hw->conf.channel;
1015         struct ath9k_channel *init_channel;
1016         int r;
1017
1018         ath_print(common, ATH_DBG_CONFIG,
1019                   "Starting driver with initial channel: %d MHz\n",
1020                   curchan->center_freq);
1021
1022         mutex_lock(&sc->mutex);
1023
1024         if (ath9k_wiphy_started(sc)) {
1025                 if (sc->chan_idx == curchan->hw_value) {
1026                         /*
1027                          * Already on the operational channel, the new wiphy
1028                          * can be marked active.
1029                          */
1030                         aphy->state = ATH_WIPHY_ACTIVE;
1031                         ieee80211_wake_queues(hw);
1032                 } else {
1033                         /*
1034                          * Another wiphy is on another channel, start the new
1035                          * wiphy in paused state.
1036                          */
1037                         aphy->state = ATH_WIPHY_PAUSED;
1038                         ieee80211_stop_queues(hw);
1039                 }
1040                 mutex_unlock(&sc->mutex);
1041                 return 0;
1042         }
1043         aphy->state = ATH_WIPHY_ACTIVE;
1044
1045         /* setup initial channel */
1046
1047         sc->chan_idx = curchan->hw_value;
1048
1049         init_channel = ath_get_curchannel(sc, hw);
1050
1051         /* Reset SERDES registers */
1052         ath9k_hw_configpcipowersave(ah, 0, 0);
1053
1054         /*
1055          * The basic interface to setting the hardware in a good
1056          * state is ``reset''.  On return the hardware is known to
1057          * be powered up and with interrupts disabled.  This must
1058          * be followed by initialization of the appropriate bits
1059          * and then setup of the interrupt mask.
1060          */
1061         spin_lock_bh(&sc->sc_resetlock);
1062         r = ath9k_hw_reset(ah, init_channel, false);
1063         if (r) {
1064                 ath_print(common, ATH_DBG_FATAL,
1065                           "Unable to reset hardware; reset status %d "
1066                           "(freq %u MHz)\n", r,
1067                           curchan->center_freq);
1068                 spin_unlock_bh(&sc->sc_resetlock);
1069                 goto mutex_unlock;
1070         }
1071         spin_unlock_bh(&sc->sc_resetlock);
1072
1073         /*
1074          * This is needed only to setup initial state
1075          * but it's best done after a reset.
1076          */
1077         ath_update_txpow(sc);
1078
1079         /*
1080          * Setup the hardware after reset:
1081          * The receive engine is set going.
1082          * Frame transmit is handled entirely
1083          * in the frame output path; there's nothing to do
1084          * here except setup the interrupt mask.
1085          */
1086         if (ath_startrecv(sc) != 0) {
1087                 ath_print(common, ATH_DBG_FATAL,
1088                           "Unable to start recv logic\n");
1089                 r = -EIO;
1090                 goto mutex_unlock;
1091         }
1092
1093         /* Setup our intr mask. */
1094         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1095                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1096                     ATH9K_INT_GLOBAL;
1097
1098         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1099                 ah->imask |= ATH9K_INT_RXHP |
1100                              ATH9K_INT_RXLP |
1101                              ATH9K_INT_BB_WATCHDOG;
1102         else
1103                 ah->imask |= ATH9K_INT_RX;
1104
1105         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1106                 ah->imask |= ATH9K_INT_GTT;
1107
1108         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1109                 ah->imask |= ATH9K_INT_CST;
1110
1111         ath_cache_conf_rate(sc, &hw->conf);
1112
1113         sc->sc_flags &= ~SC_OP_INVALID;
1114
1115         /* Disable BMISS interrupt when we're not associated */
1116         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1117         ath9k_hw_set_interrupts(ah, ah->imask);
1118
1119         ieee80211_wake_queues(hw);
1120
1121         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1122
1123         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1124             !ah->btcoex_hw.enabled) {
1125                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1126                                            AR_STOMP_LOW_WLAN_WGHT);
1127                 ath9k_hw_btcoex_enable(ah);
1128
1129                 if (common->bus_ops->bt_coex_prep)
1130                         common->bus_ops->bt_coex_prep(common);
1131                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1132                         ath9k_btcoex_timer_resume(sc);
1133         }
1134
1135 mutex_unlock:
1136         mutex_unlock(&sc->mutex);
1137
1138         return r;
1139 }
1140
1141 static int ath9k_tx(struct ieee80211_hw *hw,
1142                     struct sk_buff *skb)
1143 {
1144         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1145         struct ath_wiphy *aphy = hw->priv;
1146         struct ath_softc *sc = aphy->sc;
1147         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1148         struct ath_tx_control txctl;
1149         int padpos, padsize;
1150         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1151         int qnum;
1152
1153         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1154                 ath_print(common, ATH_DBG_XMIT,
1155                           "ath9k: %s: TX in unexpected wiphy state "
1156                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1157                 goto exit;
1158         }
1159
1160         if (sc->ps_enabled) {
1161                 /*
1162                  * mac80211 does not set PM field for normal data frames, so we
1163                  * need to update that based on the current PS mode.
1164                  */
1165                 if (ieee80211_is_data(hdr->frame_control) &&
1166                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1167                     !ieee80211_has_pm(hdr->frame_control)) {
1168                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1169                                   "while in PS mode\n");
1170                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1171                 }
1172         }
1173
1174         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1175                 /*
1176                  * We are using PS-Poll and mac80211 can request TX while in
1177                  * power save mode. Need to wake up hardware for the TX to be
1178                  * completed and if needed, also for RX of buffered frames.
1179                  */
1180                 ath9k_ps_wakeup(sc);
1181                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1182                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1183                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1184                         ath_print(common, ATH_DBG_PS,
1185                                   "Sending PS-Poll to pick a buffered frame\n");
1186                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1187                 } else {
1188                         ath_print(common, ATH_DBG_PS,
1189                                   "Wake up to complete TX\n");
1190                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1191                 }
1192                 /*
1193                  * The actual restore operation will happen only after
1194                  * the sc_flags bit is cleared. We are just dropping
1195                  * the ps_usecount here.
1196                  */
1197                 ath9k_ps_restore(sc);
1198         }
1199
1200         memset(&txctl, 0, sizeof(struct ath_tx_control));
1201
1202         /*
1203          * As a temporary workaround, assign seq# here; this will likely need
1204          * to be cleaned up to work better with Beacon transmission and virtual
1205          * BSSes.
1206          */
1207         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1208                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1209                         sc->tx.seq_no += 0x10;
1210                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1211                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1212         }
1213
1214         /* Add the padding after the header if this is not already done */
1215         padpos = ath9k_cmn_padpos(hdr->frame_control);
1216         padsize = padpos & 3;
1217         if (padsize && skb->len>padpos) {
1218                 if (skb_headroom(skb) < padsize)
1219                         return -1;
1220                 skb_push(skb, padsize);
1221                 memmove(skb->data, skb->data + padsize, padpos);
1222         }
1223
1224         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1225         txctl.txq = &sc->tx.txq[qnum];
1226
1227         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1228
1229         if (ath_tx_start(hw, skb, &txctl) != 0) {
1230                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1231                 goto exit;
1232         }
1233
1234         return 0;
1235 exit:
1236         dev_kfree_skb_any(skb);
1237         return 0;
1238 }
1239
1240 static void ath9k_stop(struct ieee80211_hw *hw)
1241 {
1242         struct ath_wiphy *aphy = hw->priv;
1243         struct ath_softc *sc = aphy->sc;
1244         struct ath_hw *ah = sc->sc_ah;
1245         struct ath_common *common = ath9k_hw_common(ah);
1246
1247         mutex_lock(&sc->mutex);
1248
1249         aphy->state = ATH_WIPHY_INACTIVE;
1250
1251         if (led_blink)
1252                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1253
1254         cancel_delayed_work_sync(&sc->tx_complete_work);
1255         cancel_work_sync(&sc->paprd_work);
1256
1257         if (!sc->num_sec_wiphy) {
1258                 cancel_delayed_work_sync(&sc->wiphy_work);
1259                 cancel_work_sync(&sc->chan_work);
1260         }
1261
1262         if (sc->sc_flags & SC_OP_INVALID) {
1263                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1264                 mutex_unlock(&sc->mutex);
1265                 return;
1266         }
1267
1268         if (ath9k_wiphy_started(sc)) {
1269                 mutex_unlock(&sc->mutex);
1270                 return; /* another wiphy still in use */
1271         }
1272
1273         /* Ensure HW is awake when we try to shut it down. */
1274         ath9k_ps_wakeup(sc);
1275
1276         if (ah->btcoex_hw.enabled) {
1277                 ath9k_hw_btcoex_disable(ah);
1278                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1279                         ath9k_btcoex_timer_pause(sc);
1280         }
1281
1282         /* make sure h/w will not generate any interrupt
1283          * before setting the invalid flag. */
1284         ath9k_hw_set_interrupts(ah, 0);
1285
1286         if (!(sc->sc_flags & SC_OP_INVALID)) {
1287                 ath_drain_all_txq(sc, false);
1288                 ath_stoprecv(sc);
1289                 ath9k_hw_phy_disable(ah);
1290         } else
1291                 sc->rx.rxlink = NULL;
1292
1293         /* disable HAL and put h/w to sleep */
1294         ath9k_hw_disable(ah);
1295         ath9k_hw_configpcipowersave(ah, 1, 1);
1296         ath9k_ps_restore(sc);
1297
1298         /* Finally, put the chip in FULL SLEEP mode */
1299         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1300
1301         sc->sc_flags |= SC_OP_INVALID;
1302
1303         mutex_unlock(&sc->mutex);
1304
1305         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1306 }
1307
1308 static int ath9k_add_interface(struct ieee80211_hw *hw,
1309                                struct ieee80211_vif *vif)
1310 {
1311         struct ath_wiphy *aphy = hw->priv;
1312         struct ath_softc *sc = aphy->sc;
1313         struct ath_hw *ah = sc->sc_ah;
1314         struct ath_common *common = ath9k_hw_common(ah);
1315         struct ath_vif *avp = (void *)vif->drv_priv;
1316         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1317         int ret = 0;
1318
1319         mutex_lock(&sc->mutex);
1320
1321         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1322             sc->nvifs > 0) {
1323                 ret = -ENOBUFS;
1324                 goto out;
1325         }
1326
1327         switch (vif->type) {
1328         case NL80211_IFTYPE_STATION:
1329                 ic_opmode = NL80211_IFTYPE_STATION;
1330                 break;
1331         case NL80211_IFTYPE_ADHOC:
1332         case NL80211_IFTYPE_AP:
1333         case NL80211_IFTYPE_MESH_POINT:
1334                 if (sc->nbcnvifs >= ATH_BCBUF) {
1335                         ret = -ENOBUFS;
1336                         goto out;
1337                 }
1338                 ic_opmode = vif->type;
1339                 break;
1340         default:
1341                 ath_print(common, ATH_DBG_FATAL,
1342                         "Interface type %d not yet supported\n", vif->type);
1343                 ret = -EOPNOTSUPP;
1344                 goto out;
1345         }
1346
1347         ath_print(common, ATH_DBG_CONFIG,
1348                   "Attach a VIF of type: %d\n", ic_opmode);
1349
1350         /* Set the VIF opmode */
1351         avp->av_opmode = ic_opmode;
1352         avp->av_bslot = -1;
1353
1354         sc->nvifs++;
1355
1356         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1357                 ath9k_set_bssid_mask(hw);
1358
1359         if (sc->nvifs > 1)
1360                 goto out; /* skip global settings for secondary vif */
1361
1362         if (ic_opmode == NL80211_IFTYPE_AP) {
1363                 ath9k_hw_set_tsfadjust(ah, 1);
1364                 sc->sc_flags |= SC_OP_TSF_RESET;
1365         }
1366
1367         /* Set the device opmode */
1368         ah->opmode = ic_opmode;
1369
1370         /*
1371          * Enable MIB interrupts when there are hardware phy counters.
1372          * Note we only do this (at the moment) for station mode.
1373          */
1374         if ((vif->type == NL80211_IFTYPE_STATION) ||
1375             (vif->type == NL80211_IFTYPE_ADHOC) ||
1376             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1377                 if (ah->config.enable_ani)
1378                         ah->imask |= ATH9K_INT_MIB;
1379                 ah->imask |= ATH9K_INT_TSFOOR;
1380         }
1381
1382         ath9k_hw_set_interrupts(ah, ah->imask);
1383
1384         if (vif->type == NL80211_IFTYPE_AP    ||
1385             vif->type == NL80211_IFTYPE_ADHOC ||
1386             vif->type == NL80211_IFTYPE_MONITOR) {
1387                 sc->sc_flags |= SC_OP_ANI_RUN;
1388                 ath_start_ani(common);
1389         }
1390
1391 out:
1392         mutex_unlock(&sc->mutex);
1393         return ret;
1394 }
1395
1396 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1397                                    struct ieee80211_vif *vif)
1398 {
1399         struct ath_wiphy *aphy = hw->priv;
1400         struct ath_softc *sc = aphy->sc;
1401         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1402         struct ath_vif *avp = (void *)vif->drv_priv;
1403         int i;
1404
1405         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1406
1407         mutex_lock(&sc->mutex);
1408
1409         /* Stop ANI */
1410         sc->sc_flags &= ~SC_OP_ANI_RUN;
1411         del_timer_sync(&common->ani.timer);
1412
1413         /* Reclaim beacon resources */
1414         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1415             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1416             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1417                 ath9k_ps_wakeup(sc);
1418                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1419                 ath9k_ps_restore(sc);
1420         }
1421
1422         ath_beacon_return(sc, avp);
1423         sc->sc_flags &= ~SC_OP_BEACONS;
1424
1425         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1426                 if (sc->beacon.bslot[i] == vif) {
1427                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1428                                "slot\n", __func__);
1429                         sc->beacon.bslot[i] = NULL;
1430                         sc->beacon.bslot_aphy[i] = NULL;
1431                 }
1432         }
1433
1434         sc->nvifs--;
1435
1436         mutex_unlock(&sc->mutex);
1437 }
1438
1439 void ath9k_enable_ps(struct ath_softc *sc)
1440 {
1441         struct ath_hw *ah = sc->sc_ah;
1442
1443         sc->ps_enabled = true;
1444         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1445                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1446                         ah->imask |= ATH9K_INT_TIM_TIMER;
1447                         ath9k_hw_set_interrupts(ah, ah->imask);
1448                 }
1449                 ath9k_hw_setrxabort(ah, 1);
1450         }
1451 }
1452
1453 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1454 {
1455         struct ath_wiphy *aphy = hw->priv;
1456         struct ath_softc *sc = aphy->sc;
1457         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1458         struct ieee80211_conf *conf = &hw->conf;
1459         struct ath_hw *ah = sc->sc_ah;
1460         bool disable_radio;
1461
1462         mutex_lock(&sc->mutex);
1463
1464         /*
1465          * Leave this as the first check because we need to turn on the
1466          * radio if it was disabled before prior to processing the rest
1467          * of the changes. Likewise we must only disable the radio towards
1468          * the end.
1469          */
1470         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1471                 bool enable_radio;
1472                 bool all_wiphys_idle;
1473                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1474
1475                 spin_lock_bh(&sc->wiphy_lock);
1476                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1477                 ath9k_set_wiphy_idle(aphy, idle);
1478
1479                 enable_radio = (!idle && all_wiphys_idle);
1480
1481                 /*
1482                  * After we unlock here its possible another wiphy
1483                  * can be re-renabled so to account for that we will
1484                  * only disable the radio toward the end of this routine
1485                  * if by then all wiphys are still idle.
1486                  */
1487                 spin_unlock_bh(&sc->wiphy_lock);
1488
1489                 if (enable_radio) {
1490                         sc->ps_idle = false;
1491                         ath_radio_enable(sc, hw);
1492                         ath_print(common, ATH_DBG_CONFIG,
1493                                   "not-idle: enabling radio\n");
1494                 }
1495         }
1496
1497         /*
1498          * We just prepare to enable PS. We have to wait until our AP has
1499          * ACK'd our null data frame to disable RX otherwise we'll ignore
1500          * those ACKs and end up retransmitting the same null data frames.
1501          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1502          */
1503         if (changed & IEEE80211_CONF_CHANGE_PS) {
1504                 if (conf->flags & IEEE80211_CONF_PS) {
1505                         sc->ps_flags |= PS_ENABLED;
1506                         /*
1507                          * At this point we know hardware has received an ACK
1508                          * of a previously sent null data frame.
1509                          */
1510                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1511                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1512                                 ath9k_enable_ps(sc);
1513                         }
1514                 } else {
1515                         sc->ps_enabled = false;
1516                         sc->ps_flags &= ~(PS_ENABLED |
1517                                           PS_NULLFUNC_COMPLETED);
1518                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1519                         if (!(ah->caps.hw_caps &
1520                               ATH9K_HW_CAP_AUTOSLEEP)) {
1521                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1522                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1523                                                   PS_WAIT_FOR_CAB |
1524                                                   PS_WAIT_FOR_PSPOLL_DATA |
1525                                                   PS_WAIT_FOR_TX_ACK);
1526                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1527                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1528                                         ath9k_hw_set_interrupts(sc->sc_ah,
1529                                                         ah->imask);
1530                                 }
1531                         }
1532                 }
1533         }
1534
1535         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1536                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1537                         ath_print(common, ATH_DBG_CONFIG,
1538                                   "HW opmode set to Monitor mode\n");
1539                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1540                 }
1541         }
1542
1543         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1544                 struct ieee80211_channel *curchan = hw->conf.channel;
1545                 int pos = curchan->hw_value;
1546
1547                 aphy->chan_idx = pos;
1548                 aphy->chan_is_ht = conf_is_ht(conf);
1549
1550                 if (aphy->state == ATH_WIPHY_SCAN ||
1551                     aphy->state == ATH_WIPHY_ACTIVE)
1552                         ath9k_wiphy_pause_all_forced(sc, aphy);
1553                 else {
1554                         /*
1555                          * Do not change operational channel based on a paused
1556                          * wiphy changes.
1557                          */
1558                         goto skip_chan_change;
1559                 }
1560
1561                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1562                           curchan->center_freq);
1563
1564                 /* XXX: remove me eventualy */
1565                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1566
1567                 ath_update_chainmask(sc, conf_is_ht(conf));
1568
1569                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1570                         ath_print(common, ATH_DBG_FATAL,
1571                                   "Unable to set channel\n");
1572                         mutex_unlock(&sc->mutex);
1573                         return -EINVAL;
1574                 }
1575         }
1576
1577 skip_chan_change:
1578         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1579                 sc->config.txpowlimit = 2 * conf->power_level;
1580                 ath_update_txpow(sc);
1581         }
1582
1583         spin_lock_bh(&sc->wiphy_lock);
1584         disable_radio = ath9k_all_wiphys_idle(sc);
1585         spin_unlock_bh(&sc->wiphy_lock);
1586
1587         if (disable_radio) {
1588                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1589                 sc->ps_idle = true;
1590                 ath_radio_disable(sc, hw);
1591         }
1592
1593         mutex_unlock(&sc->mutex);
1594
1595         return 0;
1596 }
1597
1598 #define SUPPORTED_FILTERS                       \
1599         (FIF_PROMISC_IN_BSS |                   \
1600         FIF_ALLMULTI |                          \
1601         FIF_CONTROL |                           \
1602         FIF_PSPOLL |                            \
1603         FIF_OTHER_BSS |                         \
1604         FIF_BCN_PRBRESP_PROMISC |               \
1605         FIF_FCSFAIL)
1606
1607 /* FIXME: sc->sc_full_reset ? */
1608 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1609                                    unsigned int changed_flags,
1610                                    unsigned int *total_flags,
1611                                    u64 multicast)
1612 {
1613         struct ath_wiphy *aphy = hw->priv;
1614         struct ath_softc *sc = aphy->sc;
1615         u32 rfilt;
1616
1617         changed_flags &= SUPPORTED_FILTERS;
1618         *total_flags &= SUPPORTED_FILTERS;
1619
1620         sc->rx.rxfilter = *total_flags;
1621         ath9k_ps_wakeup(sc);
1622         rfilt = ath_calcrxfilter(sc);
1623         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1624         ath9k_ps_restore(sc);
1625
1626         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1627                   "Set HW RX filter: 0x%x\n", rfilt);
1628 }
1629
1630 static int ath9k_sta_add(struct ieee80211_hw *hw,
1631                          struct ieee80211_vif *vif,
1632                          struct ieee80211_sta *sta)
1633 {
1634         struct ath_wiphy *aphy = hw->priv;
1635         struct ath_softc *sc = aphy->sc;
1636
1637         ath_node_attach(sc, sta);
1638
1639         return 0;
1640 }
1641
1642 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1643                             struct ieee80211_vif *vif,
1644                             struct ieee80211_sta *sta)
1645 {
1646         struct ath_wiphy *aphy = hw->priv;
1647         struct ath_softc *sc = aphy->sc;
1648
1649         ath_node_detach(sc, sta);
1650
1651         return 0;
1652 }
1653
1654 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1655                          const struct ieee80211_tx_queue_params *params)
1656 {
1657         struct ath_wiphy *aphy = hw->priv;
1658         struct ath_softc *sc = aphy->sc;
1659         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1660         struct ath9k_tx_queue_info qi;
1661         int ret = 0, qnum;
1662
1663         if (queue >= WME_NUM_AC)
1664                 return 0;
1665
1666         mutex_lock(&sc->mutex);
1667
1668         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1669
1670         qi.tqi_aifs = params->aifs;
1671         qi.tqi_cwmin = params->cw_min;
1672         qi.tqi_cwmax = params->cw_max;
1673         qi.tqi_burstTime = params->txop;
1674         qnum = ath_get_hal_qnum(queue, sc);
1675
1676         ath_print(common, ATH_DBG_CONFIG,
1677                   "Configure tx [queue/halq] [%d/%d],  "
1678                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1679                   queue, qnum, params->aifs, params->cw_min,
1680                   params->cw_max, params->txop);
1681
1682         ret = ath_txq_update(sc, qnum, &qi);
1683         if (ret)
1684                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1685
1686         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1687                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1688                         ath_beaconq_config(sc);
1689
1690         mutex_unlock(&sc->mutex);
1691
1692         return ret;
1693 }
1694
1695 static int ath9k_set_key(struct ieee80211_hw *hw,
1696                          enum set_key_cmd cmd,
1697                          struct ieee80211_vif *vif,
1698                          struct ieee80211_sta *sta,
1699                          struct ieee80211_key_conf *key)
1700 {
1701         struct ath_wiphy *aphy = hw->priv;
1702         struct ath_softc *sc = aphy->sc;
1703         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1704         int ret = 0;
1705
1706         if (modparam_nohwcrypt)
1707                 return -ENOSPC;
1708
1709         mutex_lock(&sc->mutex);
1710         ath9k_ps_wakeup(sc);
1711         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1712
1713         switch (cmd) {
1714         case SET_KEY:
1715                 ret = ath9k_cmn_key_config(common, vif, sta, key);
1716                 if (ret >= 0) {
1717                         key->hw_key_idx = ret;
1718                         /* push IV and Michael MIC generation to stack */
1719                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1720                         if (key->alg == ALG_TKIP)
1721                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1722                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1723                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1724                         ret = 0;
1725                 }
1726                 break;
1727         case DISABLE_KEY:
1728                 ath9k_cmn_key_delete(common, key);
1729                 break;
1730         default:
1731                 ret = -EINVAL;
1732         }
1733
1734         ath9k_ps_restore(sc);
1735         mutex_unlock(&sc->mutex);
1736
1737         return ret;
1738 }
1739
1740 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1741                                    struct ieee80211_vif *vif,
1742                                    struct ieee80211_bss_conf *bss_conf,
1743                                    u32 changed)
1744 {
1745         struct ath_wiphy *aphy = hw->priv;
1746         struct ath_softc *sc = aphy->sc;
1747         struct ath_hw *ah = sc->sc_ah;
1748         struct ath_common *common = ath9k_hw_common(ah);
1749         struct ath_vif *avp = (void *)vif->drv_priv;
1750         int slottime;
1751         int error;
1752
1753         mutex_lock(&sc->mutex);
1754
1755         if (changed & BSS_CHANGED_BSSID) {
1756                 /* Set BSSID */
1757                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1758                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1759                 common->curaid = 0;
1760                 ath9k_hw_write_associd(ah);
1761
1762                 /* Set aggregation protection mode parameters */
1763                 sc->config.ath_aggr_prot = 0;
1764
1765                 /* Only legacy IBSS for now */
1766                 if (vif->type == NL80211_IFTYPE_ADHOC)
1767                         ath_update_chainmask(sc, 0);
1768
1769                 ath_print(common, ATH_DBG_CONFIG,
1770                           "BSSID: %pM aid: 0x%x\n",
1771                           common->curbssid, common->curaid);
1772
1773                 /* need to reconfigure the beacon */
1774                 sc->sc_flags &= ~SC_OP_BEACONS ;
1775         }
1776
1777         /* Enable transmission of beacons (AP, IBSS, MESH) */
1778         if ((changed & BSS_CHANGED_BEACON) ||
1779             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1780                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1781                 error = ath_beacon_alloc(aphy, vif);
1782                 if (!error)
1783                         ath_beacon_config(sc, vif);
1784         }
1785
1786         if (changed & BSS_CHANGED_ERP_SLOT) {
1787                 if (bss_conf->use_short_slot)
1788                         slottime = 9;
1789                 else
1790                         slottime = 20;
1791                 if (vif->type == NL80211_IFTYPE_AP) {
1792                         /*
1793                          * Defer update, so that connected stations can adjust
1794                          * their settings at the same time.
1795                          * See beacon.c for more details
1796                          */
1797                         sc->beacon.slottime = slottime;
1798                         sc->beacon.updateslot = UPDATE;
1799                 } else {
1800                         ah->slottime = slottime;
1801                         ath9k_hw_init_global_settings(ah);
1802                 }
1803         }
1804
1805         /* Disable transmission of beacons */
1806         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1807                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1808
1809         if (changed & BSS_CHANGED_BEACON_INT) {
1810                 sc->beacon_interval = bss_conf->beacon_int;
1811                 /*
1812                  * In case of AP mode, the HW TSF has to be reset
1813                  * when the beacon interval changes.
1814                  */
1815                 if (vif->type == NL80211_IFTYPE_AP) {
1816                         sc->sc_flags |= SC_OP_TSF_RESET;
1817                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1818                         error = ath_beacon_alloc(aphy, vif);
1819                         if (!error)
1820                                 ath_beacon_config(sc, vif);
1821                 } else {
1822                         ath_beacon_config(sc, vif);
1823                 }
1824         }
1825
1826         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1827                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1828                           bss_conf->use_short_preamble);
1829                 if (bss_conf->use_short_preamble)
1830                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1831                 else
1832                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1833         }
1834
1835         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1836                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1837                           bss_conf->use_cts_prot);
1838                 if (bss_conf->use_cts_prot &&
1839                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1840                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1841                 else
1842                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1843         }
1844
1845         if (changed & BSS_CHANGED_ASSOC) {
1846                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1847                         bss_conf->assoc);
1848                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1849         }
1850
1851         mutex_unlock(&sc->mutex);
1852 }
1853
1854 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1855 {
1856         u64 tsf;
1857         struct ath_wiphy *aphy = hw->priv;
1858         struct ath_softc *sc = aphy->sc;
1859
1860         mutex_lock(&sc->mutex);
1861         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1862         mutex_unlock(&sc->mutex);
1863
1864         return tsf;
1865 }
1866
1867 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1868 {
1869         struct ath_wiphy *aphy = hw->priv;
1870         struct ath_softc *sc = aphy->sc;
1871
1872         mutex_lock(&sc->mutex);
1873         ath9k_hw_settsf64(sc->sc_ah, tsf);
1874         mutex_unlock(&sc->mutex);
1875 }
1876
1877 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1878 {
1879         struct ath_wiphy *aphy = hw->priv;
1880         struct ath_softc *sc = aphy->sc;
1881
1882         mutex_lock(&sc->mutex);
1883
1884         ath9k_ps_wakeup(sc);
1885         ath9k_hw_reset_tsf(sc->sc_ah);
1886         ath9k_ps_restore(sc);
1887
1888         mutex_unlock(&sc->mutex);
1889 }
1890
1891 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1892                               struct ieee80211_vif *vif,
1893                               enum ieee80211_ampdu_mlme_action action,
1894                               struct ieee80211_sta *sta,
1895                               u16 tid, u16 *ssn)
1896 {
1897         struct ath_wiphy *aphy = hw->priv;
1898         struct ath_softc *sc = aphy->sc;
1899         int ret = 0;
1900
1901         local_bh_disable();
1902
1903         switch (action) {
1904         case IEEE80211_AMPDU_RX_START:
1905                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1906                         ret = -ENOTSUPP;
1907                 break;
1908         case IEEE80211_AMPDU_RX_STOP:
1909                 break;
1910         case IEEE80211_AMPDU_TX_START:
1911                 ath9k_ps_wakeup(sc);
1912                 ath_tx_aggr_start(sc, sta, tid, ssn);
1913                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1914                 ath9k_ps_restore(sc);
1915                 break;
1916         case IEEE80211_AMPDU_TX_STOP:
1917                 ath9k_ps_wakeup(sc);
1918                 ath_tx_aggr_stop(sc, sta, tid);
1919                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1920                 ath9k_ps_restore(sc);
1921                 break;
1922         case IEEE80211_AMPDU_TX_OPERATIONAL:
1923                 ath9k_ps_wakeup(sc);
1924                 ath_tx_aggr_resume(sc, sta, tid);
1925                 ath9k_ps_restore(sc);
1926                 break;
1927         default:
1928                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1929                           "Unknown AMPDU action\n");
1930         }
1931
1932         local_bh_enable();
1933
1934         return ret;
1935 }
1936
1937 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1938                              struct survey_info *survey)
1939 {
1940         struct ath_wiphy *aphy = hw->priv;
1941         struct ath_softc *sc = aphy->sc;
1942         struct ath_hw *ah = sc->sc_ah;
1943         struct ath_common *common = ath9k_hw_common(ah);
1944         struct ieee80211_conf *conf = &hw->conf;
1945
1946          if (idx != 0)
1947                 return -ENOENT;
1948
1949         survey->channel = conf->channel;
1950         survey->filled = SURVEY_INFO_NOISE_DBM;
1951         survey->noise = common->ani.noise_floor;
1952
1953         return 0;
1954 }
1955
1956 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1957 {
1958         struct ath_wiphy *aphy = hw->priv;
1959         struct ath_softc *sc = aphy->sc;
1960         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1961
1962         mutex_lock(&sc->mutex);
1963         if (ath9k_wiphy_scanning(sc)) {
1964                 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
1965                        "same time\n");
1966                 /*
1967                  * Do not allow the concurrent scanning state for now. This
1968                  * could be improved with scanning control moved into ath9k.
1969                  */
1970                 mutex_unlock(&sc->mutex);
1971                 return;
1972         }
1973
1974         aphy->state = ATH_WIPHY_SCAN;
1975         ath9k_wiphy_pause_all_forced(sc, aphy);
1976         sc->sc_flags |= SC_OP_SCANNING;
1977         del_timer_sync(&common->ani.timer);
1978         cancel_work_sync(&sc->paprd_work);
1979         cancel_delayed_work_sync(&sc->tx_complete_work);
1980         mutex_unlock(&sc->mutex);
1981 }
1982
1983 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
1984 {
1985         struct ath_wiphy *aphy = hw->priv;
1986         struct ath_softc *sc = aphy->sc;
1987         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1988
1989         mutex_lock(&sc->mutex);
1990         aphy->state = ATH_WIPHY_ACTIVE;
1991         sc->sc_flags &= ~SC_OP_SCANNING;
1992         sc->sc_flags |= SC_OP_FULL_RESET;
1993         ath_start_ani(common);
1994         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1995         ath_beacon_config(sc, NULL);
1996         mutex_unlock(&sc->mutex);
1997 }
1998
1999 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2000 {
2001         struct ath_wiphy *aphy = hw->priv;
2002         struct ath_softc *sc = aphy->sc;
2003         struct ath_hw *ah = sc->sc_ah;
2004
2005         mutex_lock(&sc->mutex);
2006         ah->coverage_class = coverage_class;
2007         ath9k_hw_init_global_settings(ah);
2008         mutex_unlock(&sc->mutex);
2009 }
2010
2011 struct ieee80211_ops ath9k_ops = {
2012         .tx                 = ath9k_tx,
2013         .start              = ath9k_start,
2014         .stop               = ath9k_stop,
2015         .add_interface      = ath9k_add_interface,
2016         .remove_interface   = ath9k_remove_interface,
2017         .config             = ath9k_config,
2018         .configure_filter   = ath9k_configure_filter,
2019         .sta_add            = ath9k_sta_add,
2020         .sta_remove         = ath9k_sta_remove,
2021         .conf_tx            = ath9k_conf_tx,
2022         .bss_info_changed   = ath9k_bss_info_changed,
2023         .set_key            = ath9k_set_key,
2024         .get_tsf            = ath9k_get_tsf,
2025         .set_tsf            = ath9k_set_tsf,
2026         .reset_tsf          = ath9k_reset_tsf,
2027         .ampdu_action       = ath9k_ampdu_action,
2028         .get_survey         = ath9k_get_survey,
2029         .sw_scan_start      = ath9k_sw_scan_start,
2030         .sw_scan_complete   = ath9k_sw_scan_complete,
2031         .rfkill_poll        = ath9k_rfkill_poll_state,
2032         .set_coverage_class = ath9k_set_coverage_class,
2033 };