arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define CR0_RESERVED_BITS                                               \
  64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  67 #define CR4_RESERVED_BITS                                               \
  68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  71                           | X86_CR4_OSXSAVE \
  72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  73
  74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  75
  76 #define KVM_MAX_MCE_BANKS 32
  77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  94                                     struct kvm_cpuid_entry2 __user *entries);
  95
  96 struct kvm_x86_ops *kvm_x86_ops;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 int ignore_msrs = 0;
 100 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 #define KVM_NR_SHARED_MSRS 16
 103
 104 struct kvm_shared_msrs_global {
 105         int nr;
 106         u32 msrs[KVM_NR_SHARED_MSRS];
 107 };
 108
 109 struct kvm_shared_msrs {
 110         struct user_return_notifier urn;
 111         bool registered;
 112         struct kvm_shared_msr_values {
 113                 u64 host;
 114                 u64 curr;
 115         } values[KVM_NR_SHARED_MSRS];
 116 };
 117
 118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 119 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 120
 121 struct kvm_stats_debugfs_item debugfs_entries[] = {
 122         { "pf_fixed", VCPU_STAT(pf_fixed) },
 123         { "pf_guest", VCPU_STAT(pf_guest) },
 124         { "tlb_flush", VCPU_STAT(tlb_flush) },
 125         { "invlpg", VCPU_STAT(invlpg) },
 126         { "exits", VCPU_STAT(exits) },
 127         { "io_exits", VCPU_STAT(io_exits) },
 128         { "mmio_exits", VCPU_STAT(mmio_exits) },
 129         { "signal_exits", VCPU_STAT(signal_exits) },
 130         { "irq_window", VCPU_STAT(irq_window_exits) },
 131         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 132         { "halt_exits", VCPU_STAT(halt_exits) },
 133         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 134         { "hypercalls", VCPU_STAT(hypercalls) },
 135         { "request_irq", VCPU_STAT(request_irq_exits) },
 136         { "irq_exits", VCPU_STAT(irq_exits) },
 137         { "host_state_reload", VCPU_STAT(host_state_reload) },
 138         { "efer_reload", VCPU_STAT(efer_reload) },
 139         { "fpu_reload", VCPU_STAT(fpu_reload) },
 140         { "insn_emulation", VCPU_STAT(insn_emulation) },
 141         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 142         { "irq_injections", VCPU_STAT(irq_injections) },
 143         { "nmi_injections", VCPU_STAT(nmi_injections) },
 144         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 145         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 146         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 147         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 148         { "mmu_flooded", VM_STAT(mmu_flooded) },
 149         { "mmu_recycled", VM_STAT(mmu_recycled) },
 150         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 151         { "mmu_unsync", VM_STAT(mmu_unsync) },
 152         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 153         { "largepages", VM_STAT(lpages) },
 154         { NULL }
 155 };
 156
 157 u64 __read_mostly host_xcr0;
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 338 {
 339         if (err)
 340                 kvm_inject_gp(vcpu, 0);
 341         else
 342                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 345
 346 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 347 {
 348         ++vcpu->stat.pf_guest;
 349         vcpu->arch.cr2 = fault->address;
 350         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 351 }
 352
 353 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 354 {
 355         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 356                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 357         else
 358                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 359 }
 360
 361 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 362 {
 363         kvm_make_request(KVM_REQ_EVENT, vcpu);
 364         vcpu->arch.nmi_pending = 1;
 365 }
 366 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 367
 368 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 369 {
 370         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 371 }
 372 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 373
 374 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 375 {
 376         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 377 }
 378 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 379
 380 /*
 381  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 382  * a #GP and return false.
 383  */
 384 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 385 {
 386         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 387                 return true;
 388         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 389         return false;
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 392
 393 /*
 394  * This function will be used to read from the physical memory of the currently
 395  * running guest. The difference to kvm_read_guest_page is that this function
 396  * can read from guest physical or from the guest's guest physical memory.
 397  */
 398 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 399                             gfn_t ngfn, void *data, int offset, int len,
 400                             u32 access)
 401 {
 402         gfn_t real_gfn;
 403         gpa_t ngpa;
 404
 405         ngpa     = gfn_to_gpa(ngfn);
 406         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 407         if (real_gfn == UNMAPPED_GVA)
 408                 return -EFAULT;
 409
 410         real_gfn = gpa_to_gfn(real_gfn);
 411
 412         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 413 }
 414 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 415
 416 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 417                                void *data, int offset, int len, u32 access)
 418 {
 419         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 420                                        data, offset, len, access);
 421 }
 422
 423 /*
 424  * Load the pae pdptrs.  Return true is they are all valid.
 425  */
 426 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 427 {
 428         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 429         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 430         int i;
 431         int ret;
 432         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 433
 434         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 435                                       offset * sizeof(u64), sizeof(pdpte),
 436                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 437         if (ret < 0) {
 438                 ret = 0;
 439                 goto out;
 440         }
 441         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 442                 if (is_present_gpte(pdpte[i]) &&
 443                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 444                         ret = 0;
 445                         goto out;
 446                 }
 447         }
 448         ret = 1;
 449
 450         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 451         __set_bit(VCPU_EXREG_PDPTR,
 452                   (unsigned long *)&vcpu->arch.regs_avail);
 453         __set_bit(VCPU_EXREG_PDPTR,
 454                   (unsigned long *)&vcpu->arch.regs_dirty);
 455 out:
 456
 457         return ret;
 458 }
 459 EXPORT_SYMBOL_GPL(load_pdptrs);
 460
 461 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 462 {
 463         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 464         bool changed = true;
 465         int offset;
 466         gfn_t gfn;
 467         int r;
 468
 469         if (is_long_mode(vcpu) || !is_pae(vcpu))
 470                 return false;
 471
 472         if (!test_bit(VCPU_EXREG_PDPTR,
 473                       (unsigned long *)&vcpu->arch.regs_avail))
 474                 return true;
 475
 476         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
 477         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
 478         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 479                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 480         if (r < 0)
 481                 goto out;
 482         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 483 out:
 484
 485         return changed;
 486 }
 487
 488 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 489 {
 490         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 491         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 492                                     X86_CR0_CD | X86_CR0_NW;
 493
 494         cr0 |= X86_CR0_ET;
 495
 496 #ifdef CONFIG_X86_64
 497         if (cr0 & 0xffffffff00000000UL)
 498                 return 1;
 499 #endif
 500
 501         cr0 &= ~CR0_RESERVED_BITS;
 502
 503         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 504                 return 1;
 505
 506         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 507                 return 1;
 508
 509         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 510 #ifdef CONFIG_X86_64
 511                 if ((vcpu->arch.efer & EFER_LME)) {
 512                         int cs_db, cs_l;
 513
 514                         if (!is_pae(vcpu))
 515                                 return 1;
 516                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 517                         if (cs_l)
 518                                 return 1;
 519                 } else
 520 #endif
 521                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 522                                                  vcpu->arch.cr3))
 523                         return 1;
 524         }
 525
 526         kvm_x86_ops->set_cr0(vcpu, cr0);
 527
 528         if ((cr0 ^ old_cr0) & X86_CR0_PG)
 529                 kvm_clear_async_pf_completion_queue(vcpu);
 530
 531         if ((cr0 ^ old_cr0) & update_bits)
 532                 kvm_mmu_reset_context(vcpu);
 533         return 0;
 534 }
 535 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 536
 537 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 538 {
 539         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_lmsw);
 542
 543 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 544 {
 545         u64 xcr0;
 546
 547         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 548         if (index != XCR_XFEATURE_ENABLED_MASK)
 549                 return 1;
 550         xcr0 = xcr;
 551         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 552                 return 1;
 553         if (!(xcr0 & XSTATE_FP))
 554                 return 1;
 555         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 556                 return 1;
 557         if (xcr0 & ~host_xcr0)
 558                 return 1;
 559         vcpu->arch.xcr0 = xcr0;
 560         vcpu->guest_xcr0_loaded = 0;
 561         return 0;
 562 }
 563
 564 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 565 {
 566         if (__kvm_set_xcr(vcpu, index, xcr)) {
 567                 kvm_inject_gp(vcpu, 0);
 568                 return 1;
 569         }
 570         return 0;
 571 }
 572 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 573
 574 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 575 {
 576         struct kvm_cpuid_entry2 *best;
 577
 578         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 579         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 580 }
 581
 582 static void update_cpuid(struct kvm_vcpu *vcpu)
 583 {
 584         struct kvm_cpuid_entry2 *best;
 585
 586         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 587         if (!best)
 588                 return;
 589
 590         /* Update OSXSAVE bit */
 591         if (cpu_has_xsave && best->function == 0x1) {
 592                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 593                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 594                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 595         }
 596 }
 597
 598 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 599 {
 600         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 601         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 602
 603         if (cr4 & CR4_RESERVED_BITS)
 604                 return 1;
 605
 606         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 607                 return 1;
 608
 609         if (is_long_mode(vcpu)) {
 610                 if (!(cr4 & X86_CR4_PAE))
 611                         return 1;
 612         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 613                    && ((cr4 ^ old_cr4) & pdptr_bits)
 614                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
 615                 return 1;
 616
 617         if (cr4 & X86_CR4_VMXE)
 618                 return 1;
 619
 620         kvm_x86_ops->set_cr4(vcpu, cr4);
 621
 622         if ((cr4 ^ old_cr4) & pdptr_bits)
 623                 kvm_mmu_reset_context(vcpu);
 624
 625         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 626                 update_cpuid(vcpu);
 627
 628         return 0;
 629 }
 630 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 631
 632 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 633 {
 634         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 635                 kvm_mmu_sync_roots(vcpu);
 636                 kvm_mmu_flush_tlb(vcpu);
 637                 return 0;
 638         }
 639
 640         if (is_long_mode(vcpu)) {
 641                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 642                         return 1;
 643         } else {
 644                 if (is_pae(vcpu)) {
 645                         if (cr3 & CR3_PAE_RESERVED_BITS)
 646                                 return 1;
 647                         if (is_paging(vcpu) &&
 648                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 649                                 return 1;
 650                 }
 651                 /*
 652                  * We don't check reserved bits in nonpae mode, because
 653                  * this isn't enforced, and VMware depends on this.
 654                  */
 655         }
 656
 657         /*
 658          * Does the new cr3 value map to physical memory? (Note, we
 659          * catch an invalid cr3 even in real-mode, because it would
 660          * cause trouble later on when we turn on paging anyway.)
 661          *
 662          * A real CPU would silently accept an invalid cr3 and would
 663          * attempt to use it - with largely undefined (and often hard
 664          * to debug) behavior on the guest side.
 665          */
 666         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 667                 return 1;
 668         vcpu->arch.cr3 = cr3;
 669         vcpu->arch.mmu.new_cr3(vcpu);
 670         return 0;
 671 }
 672 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 673
 674 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 675 {
 676         if (cr8 & CR8_RESERVED_BITS)
 677                 return 1;
 678         if (irqchip_in_kernel(vcpu->kvm))
 679                 kvm_lapic_set_tpr(vcpu, cr8);
 680         else
 681                 vcpu->arch.cr8 = cr8;
 682         return 0;
 683 }
 684 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 685
 686 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 687 {
 688         if (irqchip_in_kernel(vcpu->kvm))
 689                 return kvm_lapic_get_cr8(vcpu);
 690         else
 691                 return vcpu->arch.cr8;
 692 }
 693 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 694
 695 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 696 {
 697         switch (dr) {
 698         case 0 ... 3:
 699                 vcpu->arch.db[dr] = val;
 700                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 701                         vcpu->arch.eff_db[dr] = val;
 702                 break;
 703         case 4:
 704                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 705                         return 1; /* #UD */
 706                 /* fall through */
 707         case 6:
 708                 if (val & 0xffffffff00000000ULL)
 709                         return -1; /* #GP */
 710                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 711                 break;
 712         case 5:
 713                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 714                         return 1; /* #UD */
 715                 /* fall through */
 716         default: /* 7 */
 717                 if (val & 0xffffffff00000000ULL)
 718                         return -1; /* #GP */
 719                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 720                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 721                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 722                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 723                 }
 724                 break;
 725         }
 726
 727         return 0;
 728 }
 729
 730 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 731 {
 732         int res;
 733
 734         res = __kvm_set_dr(vcpu, dr, val);
 735         if (res > 0)
 736                 kvm_queue_exception(vcpu, UD_VECTOR);
 737         else if (res < 0)
 738                 kvm_inject_gp(vcpu, 0);
 739
 740         return res;
 741 }
 742 EXPORT_SYMBOL_GPL(kvm_set_dr);
 743
 744 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 745 {
 746         switch (dr) {
 747         case 0 ... 3:
 748                 *val = vcpu->arch.db[dr];
 749                 break;
 750         case 4:
 751                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 752                         return 1;
 753                 /* fall through */
 754         case 6:
 755                 *val = vcpu->arch.dr6;
 756                 break;
 757         case 5:
 758                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 759                         return 1;
 760                 /* fall through */
 761         default: /* 7 */
 762                 *val = vcpu->arch.dr7;
 763                 break;
 764         }
 765
 766         return 0;
 767 }
 768
 769 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 770 {
 771         if (_kvm_get_dr(vcpu, dr, val)) {
 772                 kvm_queue_exception(vcpu, UD_VECTOR);
 773                 return 1;
 774         }
 775         return 0;
 776 }
 777 EXPORT_SYMBOL_GPL(kvm_get_dr);
 778
 779 /*
 780  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 781  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 782  *
 783  * This list is modified at module load time to reflect the
 784  * capabilities of the host cpu. This capabilities test skips MSRs that are
 785  * kvm-specific. Those are put in the beginning of the list.
 786  */
 787
 788 #define KVM_SAVE_MSRS_BEGIN     8
 789 static u32 msrs_to_save[] = {
 790         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 791         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 792         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 793         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 794         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 795         MSR_STAR,
 796 #ifdef CONFIG_X86_64
 797         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 798 #endif
 799         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 800 };
 801
 802 static unsigned num_msrs_to_save;
 803
 804 static u32 emulated_msrs[] = {
 805         MSR_IA32_MISC_ENABLE,
 806         MSR_IA32_MCG_STATUS,
 807         MSR_IA32_MCG_CTL,
 808 };
 809
 810 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 811 {
 812         u64 old_efer = vcpu->arch.efer;
 813
 814         if (efer & efer_reserved_bits)
 815                 return 1;
 816
 817         if (is_paging(vcpu)
 818             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 819                 return 1;
 820
 821         if (efer & EFER_FFXSR) {
 822                 struct kvm_cpuid_entry2 *feat;
 823
 824                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 825                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 826                         return 1;
 827         }
 828
 829         if (efer & EFER_SVME) {
 830                 struct kvm_cpuid_entry2 *feat;
 831
 832                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 833                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 834                         return 1;
 835         }
 836
 837         efer &= ~EFER_LMA;
 838         efer |= vcpu->arch.efer & EFER_LMA;
 839
 840         kvm_x86_ops->set_efer(vcpu, efer);
 841
 842         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 843
 844         /* Update reserved bits */
 845         if ((efer ^ old_efer) & EFER_NX)
 846                 kvm_mmu_reset_context(vcpu);
 847
 848         return 0;
 849 }
 850
 851 void kvm_enable_efer_bits(u64 mask)
 852 {
 853        efer_reserved_bits &= ~mask;
 854 }
 855 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 856
 857
 858 /*
 859  * Writes msr value into into the appropriate "register".
 860  * Returns 0 on success, non-0 otherwise.
 861  * Assumes vcpu_load() was already called.
 862  */
 863 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 864 {
 865         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 866 }
 867
 868 /*
 869  * Adapt set_msr() to msr_io()'s calling convention
 870  */
 871 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 872 {
 873         return kvm_set_msr(vcpu, index, *data);
 874 }
 875
 876 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 877 {
 878         int version;
 879         int r;
 880         struct pvclock_wall_clock wc;
 881         struct timespec boot;
 882
 883         if (!wall_clock)
 884                 return;
 885
 886         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 887         if (r)
 888                 return;
 889
 890         if (version & 1)
 891                 ++version;  /* first time write, random junk */
 892
 893         ++version;
 894
 895         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 896
 897         /*
 898          * The guest calculates current wall clock time by adding
 899          * system time (updated by kvm_guest_time_update below) to the
 900          * wall clock specified here.  guest system time equals host
 901          * system time for us, thus we must fill in host boot time here.
 902          */
 903         getboottime(&boot);
 904
 905         wc.sec = boot.tv_sec;
 906         wc.nsec = boot.tv_nsec;
 907         wc.version = version;
 908
 909         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 910
 911         version++;
 912         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 913 }
 914
 915 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 916 {
 917         uint32_t quotient, remainder;
 918
 919         /* Don't try to replace with do_div(), this one calculates
 920          * "(dividend << 32) / divisor" */
 921         __asm__ ( "divl %4"
 922                   : "=a" (quotient), "=d" (remainder)
 923                   : "0" (0), "1" (dividend), "r" (divisor) );
 924         return quotient;
 925 }
 926
 927 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 928                                s8 *pshift, u32 *pmultiplier)
 929 {
 930         uint64_t scaled64;
 931         int32_t  shift = 0;
 932         uint64_t tps64;
 933         uint32_t tps32;
 934
 935         tps64 = base_khz * 1000LL;
 936         scaled64 = scaled_khz * 1000LL;
 937         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 938                 tps64 >>= 1;
 939                 shift--;
 940         }
 941
 942         tps32 = (uint32_t)tps64;
 943         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 944                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 945                         scaled64 >>= 1;
 946                 else
 947                         tps32 <<= 1;
 948                 shift++;
 949         }
 950
 951         *pshift = shift;
 952         *pmultiplier = div_frac(scaled64, tps32);
 953
 954         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 955                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 956 }
 957
 958 static inline u64 get_kernel_ns(void)
 959 {
 960         struct timespec ts;
 961
 962         WARN_ON(preemptible());
 963         ktime_get_ts(&ts);
 964         monotonic_to_bootbased(&ts);
 965         return timespec_to_ns(&ts);
 966 }
 967
 968 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 969 unsigned long max_tsc_khz;
 970
 971 static inline int kvm_tsc_changes_freq(void)
 972 {
 973         int cpu = get_cpu();
 974         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 975                   cpufreq_quick_get(cpu) != 0;
 976         put_cpu();
 977         return ret;
 978 }
 979
 980 static inline u64 nsec_to_cycles(u64 nsec)
 981 {
 982         u64 ret;
 983
 984         WARN_ON(preemptible());
 985         if (kvm_tsc_changes_freq())
 986                 printk_once(KERN_WARNING
 987                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 988         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 989         do_div(ret, USEC_PER_SEC);
 990         return ret;
 991 }
 992
 993 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 994 {
 995         /* Compute a scale to convert nanoseconds in TSC cycles */
 996         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 997                            &kvm->arch.virtual_tsc_shift,
 998                            &kvm->arch.virtual_tsc_mult);
 999         kvm->arch.virtual_tsc_khz = this_tsc_khz;
1000 }
1001
1002 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1003 {
1004         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1005                                       vcpu->kvm->arch.virtual_tsc_mult,
1006                                       vcpu->kvm->arch.virtual_tsc_shift);
1007         tsc += vcpu->arch.last_tsc_write;
1008         return tsc;
1009 }
1010
1011 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1012 {
1013         struct kvm *kvm = vcpu->kvm;
1014         u64 offset, ns, elapsed;
1015         unsigned long flags;
1016         s64 sdiff;
1017
1018         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1019         offset = data - native_read_tsc();
1020         ns = get_kernel_ns();
1021         elapsed = ns - kvm->arch.last_tsc_nsec;
1022         sdiff = data - kvm->arch.last_tsc_write;
1023         if (sdiff < 0)
1024                 sdiff = -sdiff;
1025
1026         /*
1027          * Special case: close write to TSC within 5 seconds of
1028          * another CPU is interpreted as an attempt to synchronize
1029          * The 5 seconds is to accomodate host load / swapping as
1030          * well as any reset of TSC during the boot process.
1031          *
1032          * In that case, for a reliable TSC, we can match TSC offsets,
1033          * or make a best guest using elapsed value.
1034          */
1035         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1036             elapsed < 5ULL * NSEC_PER_SEC) {
1037                 if (!check_tsc_unstable()) {
1038                         offset = kvm->arch.last_tsc_offset;
1039                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1040                 } else {
1041                         u64 delta = nsec_to_cycles(elapsed);
1042                         offset += delta;
1043                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1044                 }
1045                 ns = kvm->arch.last_tsc_nsec;
1046         }
1047         kvm->arch.last_tsc_nsec = ns;
1048         kvm->arch.last_tsc_write = data;
1049         kvm->arch.last_tsc_offset = offset;
1050         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1051         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1052
1053         /* Reset of TSC must disable overshoot protection below */
1054         vcpu->arch.hv_clock.tsc_timestamp = 0;
1055         vcpu->arch.last_tsc_write = data;
1056         vcpu->arch.last_tsc_nsec = ns;
1057 }
1058 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1059
1060 static int kvm_guest_time_update(struct kvm_vcpu *v)
1061 {
1062         unsigned long flags;
1063         struct kvm_vcpu_arch *vcpu = &v->arch;
1064         void *shared_kaddr;
1065         unsigned long this_tsc_khz;
1066         s64 kernel_ns, max_kernel_ns;
1067         u64 tsc_timestamp;
1068
1069         /* Keep irq disabled to prevent changes to the clock */
1070         local_irq_save(flags);
1071         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1072         kernel_ns = get_kernel_ns();
1073         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1074
1075         if (unlikely(this_tsc_khz == 0)) {
1076                 local_irq_restore(flags);
1077                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1078                 return 1;
1079         }
1080
1081         /*
1082          * We may have to catch up the TSC to match elapsed wall clock
1083          * time for two reasons, even if kvmclock is used.
1084          *   1) CPU could have been running below the maximum TSC rate
1085          *   2) Broken TSC compensation resets the base at each VCPU
1086          *      entry to avoid unknown leaps of TSC even when running
1087          *      again on the same CPU.  This may cause apparent elapsed
1088          *      time to disappear, and the guest to stand still or run
1089          *      very slowly.
1090          */
1091         if (vcpu->tsc_catchup) {
1092                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1093                 if (tsc > tsc_timestamp) {
1094                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1095                         tsc_timestamp = tsc;
1096                 }
1097         }
1098
1099         local_irq_restore(flags);
1100
1101         if (!vcpu->time_page)
1102                 return 0;
1103
1104         /*
1105          * Time as measured by the TSC may go backwards when resetting the base
1106          * tsc_timestamp.  The reason for this is that the TSC resolution is
1107          * higher than the resolution of the other clock scales.  Thus, many
1108          * possible measurments of the TSC correspond to one measurement of any
1109          * other clock, and so a spread of values is possible.  This is not a
1110          * problem for the computation of the nanosecond clock; with TSC rates
1111          * around 1GHZ, there can only be a few cycles which correspond to one
1112          * nanosecond value, and any path through this code will inevitably
1113          * take longer than that.  However, with the kernel_ns value itself,
1114          * the precision may be much lower, down to HZ granularity.  If the
1115          * first sampling of TSC against kernel_ns ends in the low part of the
1116          * range, and the second in the high end of the range, we can get:
1117          *
1118          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1119          *
1120          * As the sampling errors potentially range in the thousands of cycles,
1121          * it is possible such a time value has already been observed by the
1122          * guest.  To protect against this, we must compute the system time as
1123          * observed by the guest and ensure the new system time is greater.
1124          */
1125         max_kernel_ns = 0;
1126         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1127                 max_kernel_ns = vcpu->last_guest_tsc -
1128                                 vcpu->hv_clock.tsc_timestamp;
1129                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1130                                     vcpu->hv_clock.tsc_to_system_mul,
1131                                     vcpu->hv_clock.tsc_shift);
1132                 max_kernel_ns += vcpu->last_kernel_ns;
1133         }
1134
1135         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1136                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1137                                    &vcpu->hv_clock.tsc_shift,
1138                                    &vcpu->hv_clock.tsc_to_system_mul);
1139                 vcpu->hw_tsc_khz = this_tsc_khz;
1140         }
1141
1142         if (max_kernel_ns > kernel_ns)
1143                 kernel_ns = max_kernel_ns;
1144
1145         /* With all the info we got, fill in the values */
1146         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1147         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1148         vcpu->last_kernel_ns = kernel_ns;
1149         vcpu->last_guest_tsc = tsc_timestamp;
1150         vcpu->hv_clock.flags = 0;
1151
1152         /*
1153          * The interface expects us to write an even number signaling that the
1154          * update is finished. Since the guest won't see the intermediate
1155          * state, we just increase by 2 at the end.
1156          */
1157         vcpu->hv_clock.version += 2;
1158
1159         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1160
1161         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1162                sizeof(vcpu->hv_clock));
1163
1164         kunmap_atomic(shared_kaddr, KM_USER0);
1165
1166         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1167         return 0;
1168 }
1169
1170 static bool msr_mtrr_valid(unsigned msr)
1171 {
1172         switch (msr) {
1173         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1174         case MSR_MTRRfix64K_00000:
1175         case MSR_MTRRfix16K_80000:
1176         case MSR_MTRRfix16K_A0000:
1177         case MSR_MTRRfix4K_C0000:
1178         case MSR_MTRRfix4K_C8000:
1179         case MSR_MTRRfix4K_D0000:
1180         case MSR_MTRRfix4K_D8000:
1181         case MSR_MTRRfix4K_E0000:
1182         case MSR_MTRRfix4K_E8000:
1183         case MSR_MTRRfix4K_F0000:
1184         case MSR_MTRRfix4K_F8000:
1185         case MSR_MTRRdefType:
1186         case MSR_IA32_CR_PAT:
1187                 return true;
1188         case 0x2f8:
1189                 return true;
1190         }
1191         return false;
1192 }
1193
1194 static bool valid_pat_type(unsigned t)
1195 {
1196         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1197 }
1198
1199 static bool valid_mtrr_type(unsigned t)
1200 {
1201         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1202 }
1203
1204 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1205 {
1206         int i;
1207
1208         if (!msr_mtrr_valid(msr))
1209                 return false;
1210
1211         if (msr == MSR_IA32_CR_PAT) {
1212                 for (i = 0; i < 8; i++)
1213                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1214                                 return false;
1215                 return true;
1216         } else if (msr == MSR_MTRRdefType) {
1217                 if (data & ~0xcff)
1218                         return false;
1219                 return valid_mtrr_type(data & 0xff);
1220         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1221                 for (i = 0; i < 8 ; i++)
1222                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1223                                 return false;
1224                 return true;
1225         }
1226
1227         /* variable MTRRs */
1228         return valid_mtrr_type(data & 0xff);
1229 }
1230
1231 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1232 {
1233         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1234
1235         if (!mtrr_valid(vcpu, msr, data))
1236                 return 1;
1237
1238         if (msr == MSR_MTRRdefType) {
1239                 vcpu->arch.mtrr_state.def_type = data;
1240                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1241         } else if (msr == MSR_MTRRfix64K_00000)
1242                 p[0] = data;
1243         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1244                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1245         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1246                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1247         else if (msr == MSR_IA32_CR_PAT)
1248                 vcpu->arch.pat = data;
1249         else {  /* Variable MTRRs */
1250                 int idx, is_mtrr_mask;
1251                 u64 *pt;
1252
1253                 idx = (msr - 0x200) / 2;
1254                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1255                 if (!is_mtrr_mask)
1256                         pt =
1257                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1258                 else
1259                         pt =
1260                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1261                 *pt = data;
1262         }
1263
1264         kvm_mmu_reset_context(vcpu);
1265         return 0;
1266 }
1267
1268 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1269 {
1270         u64 mcg_cap = vcpu->arch.mcg_cap;
1271         unsigned bank_num = mcg_cap & 0xff;
1272
1273         switch (msr) {
1274         case MSR_IA32_MCG_STATUS:
1275                 vcpu->arch.mcg_status = data;
1276                 break;
1277         case MSR_IA32_MCG_CTL:
1278                 if (!(mcg_cap & MCG_CTL_P))
1279                         return 1;
1280                 if (data != 0 && data != ~(u64)0)
1281                         return -1;
1282                 vcpu->arch.mcg_ctl = data;
1283                 break;
1284         default:
1285                 if (msr >= MSR_IA32_MC0_CTL &&
1286                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1287                         u32 offset = msr - MSR_IA32_MC0_CTL;
1288                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1289                          * some Linux kernels though clear bit 10 in bank 4 to
1290                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1291                          * this to avoid an uncatched #GP in the guest
1292                          */
1293                         if ((offset & 0x3) == 0 &&
1294                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1295                                 return -1;
1296                         vcpu->arch.mce_banks[offset] = data;
1297                         break;
1298                 }
1299                 return 1;
1300         }
1301         return 0;
1302 }
1303
1304 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1305 {
1306         struct kvm *kvm = vcpu->kvm;
1307         int lm = is_long_mode(vcpu);
1308         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1309                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1310         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1311                 : kvm->arch.xen_hvm_config.blob_size_32;
1312         u32 page_num = data & ~PAGE_MASK;
1313         u64 page_addr = data & PAGE_MASK;
1314         u8 *page;
1315         int r;
1316
1317         r = -E2BIG;
1318         if (page_num >= blob_size)
1319                 goto out;
1320         r = -ENOMEM;
1321         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1322         if (!page)
1323                 goto out;
1324         r = -EFAULT;
1325         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1326                 goto out_free;
1327         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1328                 goto out_free;
1329         r = 0;
1330 out_free:
1331         kfree(page);
1332 out:
1333         return r;
1334 }
1335
1336 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1337 {
1338         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1339 }
1340
1341 static bool kvm_hv_msr_partition_wide(u32 msr)
1342 {
1343         bool r = false;
1344         switch (msr) {
1345         case HV_X64_MSR_GUEST_OS_ID:
1346         case HV_X64_MSR_HYPERCALL:
1347                 r = true;
1348                 break;
1349         }
1350
1351         return r;
1352 }
1353
1354 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1355 {
1356         struct kvm *kvm = vcpu->kvm;
1357
1358         switch (msr) {
1359         case HV_X64_MSR_GUEST_OS_ID:
1360                 kvm->arch.hv_guest_os_id = data;
1361                 /* setting guest os id to zero disables hypercall page */
1362                 if (!kvm->arch.hv_guest_os_id)
1363                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1364                 break;
1365         case HV_X64_MSR_HYPERCALL: {
1366                 u64 gfn;
1367                 unsigned long addr;
1368                 u8 instructions[4];
1369
1370                 /* if guest os id is not set hypercall should remain disabled */
1371                 if (!kvm->arch.hv_guest_os_id)
1372                         break;
1373                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1374                         kvm->arch.hv_hypercall = data;
1375                         break;
1376                 }
1377                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1378                 addr = gfn_to_hva(kvm, gfn);
1379                 if (kvm_is_error_hva(addr))
1380                         return 1;
1381                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1382                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1383                 if (copy_to_user((void __user *)addr, instructions, 4))
1384                         return 1;
1385                 kvm->arch.hv_hypercall = data;
1386                 break;
1387         }
1388         default:
1389                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1390                           "data 0x%llx\n", msr, data);
1391                 return 1;
1392         }
1393         return 0;
1394 }
1395
1396 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1397 {
1398         switch (msr) {
1399         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1400                 unsigned long addr;
1401
1402                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1403                         vcpu->arch.hv_vapic = data;
1404                         break;
1405                 }
1406                 addr = gfn_to_hva(vcpu->kvm, data >>
1407                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1408                 if (kvm_is_error_hva(addr))
1409                         return 1;
1410                 if (clear_user((void __user *)addr, PAGE_SIZE))
1411                         return 1;
1412                 vcpu->arch.hv_vapic = data;
1413                 break;
1414         }
1415         case HV_X64_MSR_EOI:
1416                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1417         case HV_X64_MSR_ICR:
1418                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1419         case HV_X64_MSR_TPR:
1420                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1421         default:
1422                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1423                           "data 0x%llx\n", msr, data);
1424                 return 1;
1425         }
1426
1427         return 0;
1428 }
1429
1430 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1431 {
1432         gpa_t gpa = data & ~0x3f;
1433
1434         /* Bits 2:5 are resrved, Should be zero */
1435         if (data & 0x3c)
1436                 return 1;
1437
1438         vcpu->arch.apf.msr_val = data;
1439
1440         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1441                 kvm_clear_async_pf_completion_queue(vcpu);
1442                 kvm_async_pf_hash_reset(vcpu);
1443                 return 0;
1444         }
1445
1446         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1447                 return 1;
1448
1449         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1450         kvm_async_pf_wakeup_all(vcpu);
1451         return 0;
1452 }
1453
1454 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1455 {
1456         switch (msr) {
1457         case MSR_EFER:
1458                 return set_efer(vcpu, data);
1459         case MSR_K7_HWCR:
1460                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1461                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1462                 if (data != 0) {
1463                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1464                                 data);
1465                         return 1;
1466                 }
1467                 break;
1468         case MSR_FAM10H_MMIO_CONF_BASE:
1469                 if (data != 0) {
1470                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1471                                 "0x%llx\n", data);
1472                         return 1;
1473                 }
1474                 break;
1475         case MSR_AMD64_NB_CFG:
1476                 break;
1477         case MSR_IA32_DEBUGCTLMSR:
1478                 if (!data) {
1479                         /* We support the non-activated case already */
1480                         break;
1481                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1482                         /* Values other than LBR and BTF are vendor-specific,
1483                            thus reserved and should throw a #GP */
1484                         return 1;
1485                 }
1486                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1487                         __func__, data);
1488                 break;
1489         case MSR_IA32_UCODE_REV:
1490         case MSR_IA32_UCODE_WRITE:
1491         case MSR_VM_HSAVE_PA:
1492         case MSR_AMD64_PATCH_LOADER:
1493                 break;
1494         case 0x200 ... 0x2ff:
1495                 return set_msr_mtrr(vcpu, msr, data);
1496         case MSR_IA32_APICBASE:
1497                 kvm_set_apic_base(vcpu, data);
1498                 break;
1499         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1500                 return kvm_x2apic_msr_write(vcpu, msr, data);
1501         case MSR_IA32_MISC_ENABLE:
1502                 vcpu->arch.ia32_misc_enable_msr = data;
1503                 break;
1504         case MSR_KVM_WALL_CLOCK_NEW:
1505         case MSR_KVM_WALL_CLOCK:
1506                 vcpu->kvm->arch.wall_clock = data;
1507                 kvm_write_wall_clock(vcpu->kvm, data);
1508                 break;
1509         case MSR_KVM_SYSTEM_TIME_NEW:
1510         case MSR_KVM_SYSTEM_TIME: {
1511                 if (vcpu->arch.time_page) {
1512                         kvm_release_page_dirty(vcpu->arch.time_page);
1513                         vcpu->arch.time_page = NULL;
1514                 }
1515
1516                 vcpu->arch.time = data;
1517                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1518
1519                 /* we verify if the enable bit is set... */
1520                 if (!(data & 1))
1521                         break;
1522
1523                 /* ...but clean it before doing the actual write */
1524                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1525
1526                 vcpu->arch.time_page =
1527                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1528
1529                 if (is_error_page(vcpu->arch.time_page)) {
1530                         kvm_release_page_clean(vcpu->arch.time_page);
1531                         vcpu->arch.time_page = NULL;
1532                 }
1533                 break;
1534         }
1535         case MSR_KVM_ASYNC_PF_EN:
1536                 if (kvm_pv_enable_async_pf(vcpu, data))
1537                         return 1;
1538                 break;
1539         case MSR_IA32_MCG_CTL:
1540         case MSR_IA32_MCG_STATUS:
1541         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1542                 return set_msr_mce(vcpu, msr, data);
1543
1544         /* Performance counters are not protected by a CPUID bit,
1545          * so we should check all of them in the generic path for the sake of
1546          * cross vendor migration.
1547          * Writing a zero into the event select MSRs disables them,
1548          * which we perfectly emulate ;-). Any other value should be at least
1549          * reported, some guests depend on them.
1550          */
1551         case MSR_P6_EVNTSEL0:
1552         case MSR_P6_EVNTSEL1:
1553         case MSR_K7_EVNTSEL0:
1554         case MSR_K7_EVNTSEL1:
1555         case MSR_K7_EVNTSEL2:
1556         case MSR_K7_EVNTSEL3:
1557                 if (data != 0)
1558                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1559                                 "0x%x data 0x%llx\n", msr, data);
1560                 break;
1561         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1562          * so we ignore writes to make it happy.
1563          */
1564         case MSR_P6_PERFCTR0:
1565         case MSR_P6_PERFCTR1:
1566         case MSR_K7_PERFCTR0:
1567         case MSR_K7_PERFCTR1:
1568         case MSR_K7_PERFCTR2:
1569         case MSR_K7_PERFCTR3:
1570                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1571                         "0x%x data 0x%llx\n", msr, data);
1572                 break;
1573         case MSR_K7_CLK_CTL:
1574                 /*
1575                  * Ignore all writes to this no longer documented MSR.
1576                  * Writes are only relevant for old K7 processors,
1577                  * all pre-dating SVM, but a recommended workaround from
1578                  * AMD for these chips. It is possible to speicify the
1579                  * affected processor models on the command line, hence
1580                  * the need to ignore the workaround.
1581                  */
1582                 break;
1583         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1584                 if (kvm_hv_msr_partition_wide(msr)) {
1585                         int r;
1586                         mutex_lock(&vcpu->kvm->lock);
1587                         r = set_msr_hyperv_pw(vcpu, msr, data);
1588                         mutex_unlock(&vcpu->kvm->lock);
1589                         return r;
1590                 } else
1591                         return set_msr_hyperv(vcpu, msr, data);
1592                 break;
1593         default:
1594                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1595                         return xen_hvm_config(vcpu, data);
1596                 if (!ignore_msrs) {
1597                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1598                                 msr, data);
1599                         return 1;
1600                 } else {
1601                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1602                                 msr, data);
1603                         break;
1604                 }
1605         }
1606         return 0;
1607 }
1608 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1609
1610
1611 /*
1612  * Reads an msr value (of 'msr_index') into 'pdata'.
1613  * Returns 0 on success, non-0 otherwise.
1614  * Assumes vcpu_load() was already called.
1615  */
1616 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1617 {
1618         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1619 }
1620
1621 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1622 {
1623         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1624
1625         if (!msr_mtrr_valid(msr))
1626                 return 1;
1627
1628         if (msr == MSR_MTRRdefType)
1629                 *pdata = vcpu->arch.mtrr_state.def_type +
1630                          (vcpu->arch.mtrr_state.enabled << 10);
1631         else if (msr == MSR_MTRRfix64K_00000)
1632                 *pdata = p[0];
1633         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1634                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1635         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1636                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1637         else if (msr == MSR_IA32_CR_PAT)
1638                 *pdata = vcpu->arch.pat;
1639         else {  /* Variable MTRRs */
1640                 int idx, is_mtrr_mask;
1641                 u64 *pt;
1642
1643                 idx = (msr - 0x200) / 2;
1644                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1645                 if (!is_mtrr_mask)
1646                         pt =
1647                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1648                 else
1649                         pt =
1650                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1651                 *pdata = *pt;
1652         }
1653
1654         return 0;
1655 }
1656
1657 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1658 {
1659         u64 data;
1660         u64 mcg_cap = vcpu->arch.mcg_cap;
1661         unsigned bank_num = mcg_cap & 0xff;
1662
1663         switch (msr) {
1664         case MSR_IA32_P5_MC_ADDR:
1665         case MSR_IA32_P5_MC_TYPE:
1666                 data = 0;
1667                 break;
1668         case MSR_IA32_MCG_CAP:
1669                 data = vcpu->arch.mcg_cap;
1670                 break;
1671         case MSR_IA32_MCG_CTL:
1672                 if (!(mcg_cap & MCG_CTL_P))
1673                         return 1;
1674                 data = vcpu->arch.mcg_ctl;
1675                 break;
1676         case MSR_IA32_MCG_STATUS:
1677                 data = vcpu->arch.mcg_status;
1678                 break;
1679         default:
1680                 if (msr >= MSR_IA32_MC0_CTL &&
1681                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1682                         u32 offset = msr - MSR_IA32_MC0_CTL;
1683                         data = vcpu->arch.mce_banks[offset];
1684                         break;
1685                 }
1686                 return 1;
1687         }
1688         *pdata = data;
1689         return 0;
1690 }
1691
1692 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1693 {
1694         u64 data = 0;
1695         struct kvm *kvm = vcpu->kvm;
1696
1697         switch (msr) {
1698         case HV_X64_MSR_GUEST_OS_ID:
1699                 data = kvm->arch.hv_guest_os_id;
1700                 break;
1701         case HV_X64_MSR_HYPERCALL:
1702                 data = kvm->arch.hv_hypercall;
1703                 break;
1704         default:
1705                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1706                 return 1;
1707         }
1708
1709         *pdata = data;
1710         return 0;
1711 }
1712
1713 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1714 {
1715         u64 data = 0;
1716
1717         switch (msr) {
1718         case HV_X64_MSR_VP_INDEX: {
1719                 int r;
1720                 struct kvm_vcpu *v;
1721                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1722                         if (v == vcpu)
1723                                 data = r;
1724                 break;
1725         }
1726         case HV_X64_MSR_EOI:
1727                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1728         case HV_X64_MSR_ICR:
1729                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1730         case HV_X64_MSR_TPR:
1731                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1732         default:
1733                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1734                 return 1;
1735         }
1736         *pdata = data;
1737         return 0;
1738 }
1739
1740 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1741 {
1742         u64 data;
1743
1744         switch (msr) {
1745         case MSR_IA32_PLATFORM_ID:
1746         case MSR_IA32_UCODE_REV:
1747         case MSR_IA32_EBL_CR_POWERON:
1748         case MSR_IA32_DEBUGCTLMSR:
1749         case MSR_IA32_LASTBRANCHFROMIP:
1750         case MSR_IA32_LASTBRANCHTOIP:
1751         case MSR_IA32_LASTINTFROMIP:
1752         case MSR_IA32_LASTINTTOIP:
1753         case MSR_K8_SYSCFG:
1754         case MSR_K7_HWCR:
1755         case MSR_VM_HSAVE_PA:
1756         case MSR_P6_PERFCTR0:
1757         case MSR_P6_PERFCTR1:
1758         case MSR_P6_EVNTSEL0:
1759         case MSR_P6_EVNTSEL1:
1760         case MSR_K7_EVNTSEL0:
1761         case MSR_K7_PERFCTR0:
1762         case MSR_K8_INT_PENDING_MSG:
1763         case MSR_AMD64_NB_CFG:
1764         case MSR_FAM10H_MMIO_CONF_BASE:
1765                 data = 0;
1766                 break;
1767         case MSR_MTRRcap:
1768                 data = 0x500 | KVM_NR_VAR_MTRR;
1769                 break;
1770         case 0x200 ... 0x2ff:
1771                 return get_msr_mtrr(vcpu, msr, pdata);
1772         case 0xcd: /* fsb frequency */
1773                 data = 3;
1774                 break;
1775                 /*
1776                  * MSR_EBC_FREQUENCY_ID
1777                  * Conservative value valid for even the basic CPU models.
1778                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1779                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1780                  * and 266MHz for model 3, or 4. Set Core Clock
1781                  * Frequency to System Bus Frequency Ratio to 1 (bits
1782                  * 31:24) even though these are only valid for CPU
1783                  * models > 2, however guests may end up dividing or
1784                  * multiplying by zero otherwise.
1785                  */
1786         case MSR_EBC_FREQUENCY_ID:
1787                 data = 1 << 24;
1788                 break;
1789         case MSR_IA32_APICBASE:
1790                 data = kvm_get_apic_base(vcpu);
1791                 break;
1792         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1793                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1794                 break;
1795         case MSR_IA32_MISC_ENABLE:
1796                 data = vcpu->arch.ia32_misc_enable_msr;
1797                 break;
1798         case MSR_IA32_PERF_STATUS:
1799                 /* TSC increment by tick */
1800                 data = 1000ULL;
1801                 /* CPU multiplier */
1802                 data |= (((uint64_t)4ULL) << 40);
1803                 break;
1804         case MSR_EFER:
1805                 data = vcpu->arch.efer;
1806                 break;
1807         case MSR_KVM_WALL_CLOCK:
1808         case MSR_KVM_WALL_CLOCK_NEW:
1809                 data = vcpu->kvm->arch.wall_clock;
1810                 break;
1811         case MSR_KVM_SYSTEM_TIME:
1812         case MSR_KVM_SYSTEM_TIME_NEW:
1813                 data = vcpu->arch.time;
1814                 break;
1815         case MSR_KVM_ASYNC_PF_EN:
1816                 data = vcpu->arch.apf.msr_val;
1817                 break;
1818         case MSR_IA32_P5_MC_ADDR:
1819         case MSR_IA32_P5_MC_TYPE:
1820         case MSR_IA32_MCG_CAP:
1821         case MSR_IA32_MCG_CTL:
1822         case MSR_IA32_MCG_STATUS:
1823         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1824                 return get_msr_mce(vcpu, msr, pdata);
1825         case MSR_K7_CLK_CTL:
1826                 /*
1827                  * Provide expected ramp-up count for K7. All other
1828                  * are set to zero, indicating minimum divisors for
1829                  * every field.
1830                  *
1831                  * This prevents guest kernels on AMD host with CPU
1832                  * type 6, model 8 and higher from exploding due to
1833                  * the rdmsr failing.
1834                  */
1835                 data = 0x20000000;
1836                 break;
1837         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1838                 if (kvm_hv_msr_partition_wide(msr)) {
1839                         int r;
1840                         mutex_lock(&vcpu->kvm->lock);
1841                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1842                         mutex_unlock(&vcpu->kvm->lock);
1843                         return r;
1844                 } else
1845                         return get_msr_hyperv(vcpu, msr, pdata);
1846                 break;
1847         default:
1848                 if (!ignore_msrs) {
1849                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1850                         return 1;
1851                 } else {
1852                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1853                         data = 0;
1854                 }
1855                 break;
1856         }
1857         *pdata = data;
1858         return 0;
1859 }
1860 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1861
1862 /*
1863  * Read or write a bunch of msrs. All parameters are kernel addresses.
1864  *
1865  * @return number of msrs set successfully.
1866  */
1867 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1868                     struct kvm_msr_entry *entries,
1869                     int (*do_msr)(struct kvm_vcpu *vcpu,
1870                                   unsigned index, u64 *data))
1871 {
1872         int i, idx;
1873
1874         idx = srcu_read_lock(&vcpu->kvm->srcu);
1875         for (i = 0; i < msrs->nmsrs; ++i)
1876                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1877                         break;
1878         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1879
1880         return i;
1881 }
1882
1883 /*
1884  * Read or write a bunch of msrs. Parameters are user addresses.
1885  *
1886  * @return number of msrs set successfully.
1887  */
1888 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1889                   int (*do_msr)(struct kvm_vcpu *vcpu,
1890                                 unsigned index, u64 *data),
1891                   int writeback)
1892 {
1893         struct kvm_msrs msrs;
1894         struct kvm_msr_entry *entries;
1895         int r, n;
1896         unsigned size;
1897
1898         r = -EFAULT;
1899         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1900                 goto out;
1901
1902         r = -E2BIG;
1903         if (msrs.nmsrs >= MAX_IO_MSRS)
1904                 goto out;
1905
1906         r = -ENOMEM;
1907         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1908         entries = kmalloc(size, GFP_KERNEL);
1909         if (!entries)
1910                 goto out;
1911
1912         r = -EFAULT;
1913         if (copy_from_user(entries, user_msrs->entries, size))
1914                 goto out_free;
1915
1916         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1917         if (r < 0)
1918                 goto out_free;
1919
1920         r = -EFAULT;
1921         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1922                 goto out_free;
1923
1924         r = n;
1925
1926 out_free:
1927         kfree(entries);
1928 out:
1929         return r;
1930 }
1931
1932 int kvm_dev_ioctl_check_extension(long ext)
1933 {
1934         int r;
1935
1936         switch (ext) {
1937         case KVM_CAP_IRQCHIP:
1938         case KVM_CAP_HLT:
1939         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1940         case KVM_CAP_SET_TSS_ADDR:
1941         case KVM_CAP_EXT_CPUID:
1942         case KVM_CAP_CLOCKSOURCE:
1943         case KVM_CAP_PIT:
1944         case KVM_CAP_NOP_IO_DELAY:
1945         case KVM_CAP_MP_STATE:
1946         case KVM_CAP_SYNC_MMU:
1947         case KVM_CAP_USER_NMI:
1948         case KVM_CAP_REINJECT_CONTROL:
1949         case KVM_CAP_IRQ_INJECT_STATUS:
1950         case KVM_CAP_ASSIGN_DEV_IRQ:
1951         case KVM_CAP_IRQFD:
1952         case KVM_CAP_IOEVENTFD:
1953         case KVM_CAP_PIT2:
1954         case KVM_CAP_PIT_STATE2:
1955         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1956         case KVM_CAP_XEN_HVM:
1957         case KVM_CAP_ADJUST_CLOCK:
1958         case KVM_CAP_VCPU_EVENTS:
1959         case KVM_CAP_HYPERV:
1960         case KVM_CAP_HYPERV_VAPIC:
1961         case KVM_CAP_HYPERV_SPIN:
1962         case KVM_CAP_PCI_SEGMENT:
1963         case KVM_CAP_DEBUGREGS:
1964         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1965         case KVM_CAP_XSAVE:
1966         case KVM_CAP_ASYNC_PF:
1967                 r = 1;
1968                 break;
1969         case KVM_CAP_COALESCED_MMIO:
1970                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1971                 break;
1972         case KVM_CAP_VAPIC:
1973                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1974                 break;
1975         case KVM_CAP_NR_VCPUS:
1976                 r = KVM_MAX_VCPUS;
1977                 break;
1978         case KVM_CAP_NR_MEMSLOTS:
1979                 r = KVM_MEMORY_SLOTS;
1980                 break;
1981         case KVM_CAP_PV_MMU:    /* obsolete */
1982                 r = 0;
1983                 break;
1984         case KVM_CAP_IOMMU:
1985                 r = iommu_found();
1986                 break;
1987         case KVM_CAP_MCE:
1988                 r = KVM_MAX_MCE_BANKS;
1989                 break;
1990         case KVM_CAP_XCRS:
1991                 r = cpu_has_xsave;
1992                 break;
1993         default:
1994                 r = 0;
1995                 break;
1996         }
1997         return r;
1998
1999 }
2000
2001 long kvm_arch_dev_ioctl(struct file *filp,
2002                         unsigned int ioctl, unsigned long arg)
2003 {
2004         void __user *argp = (void __user *)arg;
2005         long r;
2006
2007         switch (ioctl) {
2008         case KVM_GET_MSR_INDEX_LIST: {
2009                 struct kvm_msr_list __user *user_msr_list = argp;
2010                 struct kvm_msr_list msr_list;
2011                 unsigned n;
2012
2013                 r = -EFAULT;
2014                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2015                         goto out;
2016                 n = msr_list.nmsrs;
2017                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2018                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2019                         goto out;
2020                 r = -E2BIG;
2021                 if (n < msr_list.nmsrs)
2022                         goto out;
2023                 r = -EFAULT;
2024                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2025                                  num_msrs_to_save * sizeof(u32)))
2026                         goto out;
2027                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2028                                  &emulated_msrs,
2029                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2030                         goto out;
2031                 r = 0;
2032                 break;
2033         }
2034         case KVM_GET_SUPPORTED_CPUID: {
2035                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2036                 struct kvm_cpuid2 cpuid;
2037
2038                 r = -EFAULT;
2039                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2040                         goto out;
2041                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2042                                                       cpuid_arg->entries);
2043                 if (r)
2044                         goto out;
2045
2046                 r = -EFAULT;
2047                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2048                         goto out;
2049                 r = 0;
2050                 break;
2051         }
2052         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2053                 u64 mce_cap;
2054
2055                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2056                 r = -EFAULT;
2057                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2058                         goto out;
2059                 r = 0;
2060                 break;
2061         }
2062         default:
2063                 r = -EINVAL;
2064         }
2065 out:
2066         return r;
2067 }
2068
2069 static void wbinvd_ipi(void *garbage)
2070 {
2071         wbinvd();
2072 }
2073
2074 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2075 {
2076         return vcpu->kvm->arch.iommu_domain &&
2077                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2078 }
2079
2080 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2081 {
2082         /* Address WBINVD may be executed by guest */
2083         if (need_emulate_wbinvd(vcpu)) {
2084                 if (kvm_x86_ops->has_wbinvd_exit())
2085                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2086                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2087                         smp_call_function_single(vcpu->cpu,
2088                                         wbinvd_ipi, NULL, 1);
2089         }
2090
2091         kvm_x86_ops->vcpu_load(vcpu, cpu);
2092         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2093                 /* Make sure TSC doesn't go backwards */
2094                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2095                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2096                 if (tsc_delta < 0)
2097                         mark_tsc_unstable("KVM discovered backwards TSC");
2098                 if (check_tsc_unstable()) {
2099                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2100                         vcpu->arch.tsc_catchup = 1;
2101                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2102                 }
2103                 if (vcpu->cpu != cpu)
2104                         kvm_migrate_timers(vcpu);
2105                 vcpu->cpu = cpu;
2106         }
2107 }
2108
2109 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2110 {
2111         kvm_x86_ops->vcpu_put(vcpu);
2112         kvm_put_guest_fpu(vcpu);
2113         vcpu->arch.last_host_tsc = native_read_tsc();
2114 }
2115
2116 static int is_efer_nx(void)
2117 {
2118         unsigned long long efer = 0;
2119
2120         rdmsrl_safe(MSR_EFER, &efer);
2121         return efer & EFER_NX;
2122 }
2123
2124 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2125 {
2126         int i;
2127         struct kvm_cpuid_entry2 *e, *entry;
2128
2129         entry = NULL;
2130         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2131                 e = &vcpu->arch.cpuid_entries[i];
2132                 if (e->function == 0x80000001) {
2133                         entry = e;
2134                         break;
2135                 }
2136         }
2137         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2138                 entry->edx &= ~(1 << 20);
2139                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2140         }
2141 }
2142
2143 /* when an old userspace process fills a new kernel module */
2144 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2145                                     struct kvm_cpuid *cpuid,
2146                                     struct kvm_cpuid_entry __user *entries)
2147 {
2148         int r, i;
2149         struct kvm_cpuid_entry *cpuid_entries;
2150
2151         r = -E2BIG;
2152         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2153                 goto out;
2154         r = -ENOMEM;
2155         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2156         if (!cpuid_entries)
2157                 goto out;
2158         r = -EFAULT;
2159         if (copy_from_user(cpuid_entries, entries,
2160                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2161                 goto out_free;
2162         for (i = 0; i < cpuid->nent; i++) {
2163                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2164                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2165                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2166                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2167                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2168                 vcpu->arch.cpuid_entries[i].index = 0;
2169                 vcpu->arch.cpuid_entries[i].flags = 0;
2170                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2171                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2172                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2173         }
2174         vcpu->arch.cpuid_nent = cpuid->nent;
2175         cpuid_fix_nx_cap(vcpu);
2176         r = 0;
2177         kvm_apic_set_version(vcpu);
2178         kvm_x86_ops->cpuid_update(vcpu);
2179         update_cpuid(vcpu);
2180
2181 out_free:
2182         vfree(cpuid_entries);
2183 out:
2184         return r;
2185 }
2186
2187 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2188                                      struct kvm_cpuid2 *cpuid,
2189                                      struct kvm_cpuid_entry2 __user *entries)
2190 {
2191         int r;
2192
2193         r = -E2BIG;
2194         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2195                 goto out;
2196         r = -EFAULT;
2197         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2198                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2199                 goto out;
2200         vcpu->arch.cpuid_nent = cpuid->nent;
2201         kvm_apic_set_version(vcpu);
2202         kvm_x86_ops->cpuid_update(vcpu);
2203         update_cpuid(vcpu);
2204         return 0;
2205
2206 out:
2207         return r;
2208 }
2209
2210 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2211                                      struct kvm_cpuid2 *cpuid,
2212                                      struct kvm_cpuid_entry2 __user *entries)
2213 {
2214         int r;
2215
2216         r = -E2BIG;
2217         if (cpuid->nent < vcpu->arch.cpuid_nent)
2218                 goto out;
2219         r = -EFAULT;
2220         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2221                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2222                 goto out;
2223         return 0;
2224
2225 out:
2226         cpuid->nent = vcpu->arch.cpuid_nent;
2227         return r;
2228 }
2229
2230 static void cpuid_mask(u32 *word, int wordnum)
2231 {
2232         *word &= boot_cpu_data.x86_capability[wordnum];
2233 }
2234
2235 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2236                            u32 index)
2237 {
2238         entry->function = function;
2239         entry->index = index;
2240         cpuid_count(entry->function, entry->index,
2241                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2242         entry->flags = 0;
2243 }
2244
2245 #define F(x) bit(X86_FEATURE_##x)
2246
2247 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2248                          u32 index, int *nent, int maxnent)
2249 {
2250         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2251 #ifdef CONFIG_X86_64
2252         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2253                                 ? F(GBPAGES) : 0;
2254         unsigned f_lm = F(LM);
2255 #else
2256         unsigned f_gbpages = 0;
2257         unsigned f_lm = 0;
2258 #endif
2259         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2260
2261         /* cpuid 1.edx */
2262         const u32 kvm_supported_word0_x86_features =
2263                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2264                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2265                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2266                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2267                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2268                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2269                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2270                 0 /* HTT, TM, Reserved, PBE */;
2271         /* cpuid 0x80000001.edx */
2272         const u32 kvm_supported_word1_x86_features =
2273                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2274                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2275                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2276                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2277                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2278                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2279                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2280                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2281         /* cpuid 1.ecx */
2282         const u32 kvm_supported_word4_x86_features =
2283                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2284                 0 /* DS-CPL, VMX, SMX, EST */ |
2285                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2286                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2287                 0 /* Reserved, DCA */ | F(XMM4_1) |
2288                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2289                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2290                 F(F16C);
2291         /* cpuid 0x80000001.ecx */
2292         const u32 kvm_supported_word6_x86_features =
2293                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2294                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2295                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2296                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2297
2298         /* all calls to cpuid_count() should be made on the same cpu */
2299         get_cpu();
2300         do_cpuid_1_ent(entry, function, index);
2301         ++*nent;
2302
2303         switch (function) {
2304         case 0:
2305                 entry->eax = min(entry->eax, (u32)0xd);
2306                 break;
2307         case 1:
2308                 entry->edx &= kvm_supported_word0_x86_features;
2309                 cpuid_mask(&entry->edx, 0);
2310                 entry->ecx &= kvm_supported_word4_x86_features;
2311                 cpuid_mask(&entry->ecx, 4);
2312                 /* we support x2apic emulation even if host does not support
2313                  * it since we emulate x2apic in software */
2314                 entry->ecx |= F(X2APIC);
2315                 break;
2316         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2317          * may return different values. This forces us to get_cpu() before
2318          * issuing the first command, and also to emulate this annoying behavior
2319          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2320         case 2: {
2321                 int t, times = entry->eax & 0xff;
2322
2323                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2324                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2325                 for (t = 1; t < times && *nent < maxnent; ++t) {
2326                         do_cpuid_1_ent(&entry[t], function, 0);
2327                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2328                         ++*nent;
2329                 }
2330                 break;
2331         }
2332         /* function 4 and 0xb have additional index. */
2333         case 4: {
2334                 int i, cache_type;
2335
2336                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2337                 /* read more entries until cache_type is zero */
2338                 for (i = 1; *nent < maxnent; ++i) {
2339                         cache_type = entry[i - 1].eax & 0x1f;
2340                         if (!cache_type)
2341                                 break;
2342                         do_cpuid_1_ent(&entry[i], function, i);
2343                         entry[i].flags |=
2344                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2345                         ++*nent;
2346                 }
2347                 break;
2348         }
2349         case 0xb: {
2350                 int i, level_type;
2351
2352                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2353                 /* read more entries until level_type is zero */
2354                 for (i = 1; *nent < maxnent; ++i) {
2355                         level_type = entry[i - 1].ecx & 0xff00;
2356                         if (!level_type)
2357                                 break;
2358                         do_cpuid_1_ent(&entry[i], function, i);
2359                         entry[i].flags |=
2360                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2361                         ++*nent;
2362                 }
2363                 break;
2364         }
2365         case 0xd: {
2366                 int i;
2367
2368                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2369                 for (i = 1; *nent < maxnent; ++i) {
2370                         if (entry[i - 1].eax == 0 && i != 2)
2371                                 break;
2372                         do_cpuid_1_ent(&entry[i], function, i);
2373                         entry[i].flags |=
2374                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2375                         ++*nent;
2376                 }
2377                 break;
2378         }
2379         case KVM_CPUID_SIGNATURE: {
2380                 char signature[12] = "KVMKVMKVM\0\0";
2381                 u32 *sigptr = (u32 *)signature;
2382                 entry->eax = 0;
2383                 entry->ebx = sigptr[0];
2384                 entry->ecx = sigptr[1];
2385                 entry->edx = sigptr[2];
2386                 break;
2387         }
2388         case KVM_CPUID_FEATURES:
2389                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2390                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2391                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2392                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2393                 entry->ebx = 0;
2394                 entry->ecx = 0;
2395                 entry->edx = 0;
2396                 break;
2397         case 0x80000000:
2398                 entry->eax = min(entry->eax, 0x8000001a);
2399                 break;
2400         case 0x80000001:
2401                 entry->edx &= kvm_supported_word1_x86_features;
2402                 cpuid_mask(&entry->edx, 1);
2403                 entry->ecx &= kvm_supported_word6_x86_features;
2404                 cpuid_mask(&entry->ecx, 6);
2405                 break;
2406         }
2407
2408         kvm_x86_ops->set_supported_cpuid(function, entry);
2409
2410         put_cpu();
2411 }
2412
2413 #undef F
2414
2415 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2416                                      struct kvm_cpuid_entry2 __user *entries)
2417 {
2418         struct kvm_cpuid_entry2 *cpuid_entries;
2419         int limit, nent = 0, r = -E2BIG;
2420         u32 func;
2421
2422         if (cpuid->nent < 1)
2423                 goto out;
2424         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2425                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2426         r = -ENOMEM;
2427         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2428         if (!cpuid_entries)
2429                 goto out;
2430
2431         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2432         limit = cpuid_entries[0].eax;
2433         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2434                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2435                              &nent, cpuid->nent);
2436         r = -E2BIG;
2437         if (nent >= cpuid->nent)
2438                 goto out_free;
2439
2440         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2441         limit = cpuid_entries[nent - 1].eax;
2442         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2443                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2444                              &nent, cpuid->nent);
2445
2446
2447
2448         r = -E2BIG;
2449         if (nent >= cpuid->nent)
2450                 goto out_free;
2451
2452         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2453                      cpuid->nent);
2454
2455         r = -E2BIG;
2456         if (nent >= cpuid->nent)
2457                 goto out_free;
2458
2459         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2460                      cpuid->nent);
2461
2462         r = -E2BIG;
2463         if (nent >= cpuid->nent)
2464                 goto out_free;
2465
2466         r = -EFAULT;
2467         if (copy_to_user(entries, cpuid_entries,
2468                          nent * sizeof(struct kvm_cpuid_entry2)))
2469                 goto out_free;
2470         cpuid->nent = nent;
2471         r = 0;
2472
2473 out_free:
2474         vfree(cpuid_entries);
2475 out:
2476         return r;
2477 }
2478
2479 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2480                                     struct kvm_lapic_state *s)
2481 {
2482         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2483
2484         return 0;
2485 }
2486
2487 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2488                                     struct kvm_lapic_state *s)
2489 {
2490         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2491         kvm_apic_post_state_restore(vcpu);
2492         update_cr8_intercept(vcpu);
2493
2494         return 0;
2495 }
2496
2497 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2498                                     struct kvm_interrupt *irq)
2499 {
2500         if (irq->irq < 0 || irq->irq >= 256)
2501                 return -EINVAL;
2502         if (irqchip_in_kernel(vcpu->kvm))
2503                 return -ENXIO;
2504
2505         kvm_queue_interrupt(vcpu, irq->irq, false);
2506         kvm_make_request(KVM_REQ_EVENT, vcpu);
2507
2508         return 0;
2509 }
2510
2511 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2512 {
2513         kvm_inject_nmi(vcpu);
2514
2515         return 0;
2516 }
2517
2518 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2519                                            struct kvm_tpr_access_ctl *tac)
2520 {
2521         if (tac->flags)
2522                 return -EINVAL;
2523         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2524         return 0;
2525 }
2526
2527 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2528                                         u64 mcg_cap)
2529 {
2530         int r;
2531         unsigned bank_num = mcg_cap & 0xff, bank;
2532
2533         r = -EINVAL;
2534         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2535                 goto out;
2536         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2537                 goto out;
2538         r = 0;
2539         vcpu->arch.mcg_cap = mcg_cap;
2540         /* Init IA32_MCG_CTL to all 1s */
2541         if (mcg_cap & MCG_CTL_P)
2542                 vcpu->arch.mcg_ctl = ~(u64)0;
2543         /* Init IA32_MCi_CTL to all 1s */
2544         for (bank = 0; bank < bank_num; bank++)
2545                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2546 out:
2547         return r;
2548 }
2549
2550 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2551                                       struct kvm_x86_mce *mce)
2552 {
2553         u64 mcg_cap = vcpu->arch.mcg_cap;
2554         unsigned bank_num = mcg_cap & 0xff;
2555         u64 *banks = vcpu->arch.mce_banks;
2556
2557         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2558                 return -EINVAL;
2559         /*
2560          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2561          * reporting is disabled
2562          */
2563         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2564             vcpu->arch.mcg_ctl != ~(u64)0)
2565                 return 0;
2566         banks += 4 * mce->bank;
2567         /*
2568          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2569          * reporting is disabled for the bank
2570          */
2571         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2572                 return 0;
2573         if (mce->status & MCI_STATUS_UC) {
2574                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2575                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2576                         printk(KERN_DEBUG "kvm: set_mce: "
2577                                "injects mce exception while "
2578                                "previous one is in progress!\n");
2579                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2580                         return 0;
2581                 }
2582                 if (banks[1] & MCI_STATUS_VAL)
2583                         mce->status |= MCI_STATUS_OVER;
2584                 banks[2] = mce->addr;
2585                 banks[3] = mce->misc;
2586                 vcpu->arch.mcg_status = mce->mcg_status;
2587                 banks[1] = mce->status;
2588                 kvm_queue_exception(vcpu, MC_VECTOR);
2589         } else if (!(banks[1] & MCI_STATUS_VAL)
2590                    || !(banks[1] & MCI_STATUS_UC)) {
2591                 if (banks[1] & MCI_STATUS_VAL)
2592                         mce->status |= MCI_STATUS_OVER;
2593                 banks[2] = mce->addr;
2594                 banks[3] = mce->misc;
2595                 banks[1] = mce->status;
2596         } else
2597                 banks[1] |= MCI_STATUS_OVER;
2598         return 0;
2599 }
2600
2601 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2602                                                struct kvm_vcpu_events *events)
2603 {
2604         events->exception.injected =
2605                 vcpu->arch.exception.pending &&
2606                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2607         events->exception.nr = vcpu->arch.exception.nr;
2608         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2609         events->exception.pad = 0;
2610         events->exception.error_code = vcpu->arch.exception.error_code;
2611
2612         events->interrupt.injected =
2613                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2614         events->interrupt.nr = vcpu->arch.interrupt.nr;
2615         events->interrupt.soft = 0;
2616         events->interrupt.shadow =
2617                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2618                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2619
2620         events->nmi.injected = vcpu->arch.nmi_injected;
2621         events->nmi.pending = vcpu->arch.nmi_pending;
2622         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2623         events->nmi.pad = 0;
2624
2625         events->sipi_vector = vcpu->arch.sipi_vector;
2626
2627         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2628                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2629                          | KVM_VCPUEVENT_VALID_SHADOW);
2630         memset(&events->reserved, 0, sizeof(events->reserved));
2631 }
2632
2633 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2634                                               struct kvm_vcpu_events *events)
2635 {
2636         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2637                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2638                               | KVM_VCPUEVENT_VALID_SHADOW))
2639                 return -EINVAL;
2640
2641         vcpu->arch.exception.pending = events->exception.injected;
2642         vcpu->arch.exception.nr = events->exception.nr;
2643         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2644         vcpu->arch.exception.error_code = events->exception.error_code;
2645
2646         vcpu->arch.interrupt.pending = events->interrupt.injected;
2647         vcpu->arch.interrupt.nr = events->interrupt.nr;
2648         vcpu->arch.interrupt.soft = events->interrupt.soft;
2649         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2650                 kvm_pic_clear_isr_ack(vcpu->kvm);
2651         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2652                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2653                                                   events->interrupt.shadow);
2654
2655         vcpu->arch.nmi_injected = events->nmi.injected;
2656         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2657                 vcpu->arch.nmi_pending = events->nmi.pending;
2658         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2659
2660         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2661                 vcpu->arch.sipi_vector = events->sipi_vector;
2662
2663         kvm_make_request(KVM_REQ_EVENT, vcpu);
2664
2665         return 0;
2666 }
2667
2668 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2669                                              struct kvm_debugregs *dbgregs)
2670 {
2671         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2672         dbgregs->dr6 = vcpu->arch.dr6;
2673         dbgregs->dr7 = vcpu->arch.dr7;
2674         dbgregs->flags = 0;
2675         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2676 }
2677
2678 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2679                                             struct kvm_debugregs *dbgregs)
2680 {
2681         if (dbgregs->flags)
2682                 return -EINVAL;
2683
2684         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2685         vcpu->arch.dr6 = dbgregs->dr6;
2686         vcpu->arch.dr7 = dbgregs->dr7;
2687
2688         return 0;
2689 }
2690
2691 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2692                                          struct kvm_xsave *guest_xsave)
2693 {
2694         if (cpu_has_xsave)
2695                 memcpy(guest_xsave->region,
2696                         &vcpu->arch.guest_fpu.state->xsave,
2697                         xstate_size);
2698         else {
2699                 memcpy(guest_xsave->region,
2700                         &vcpu->arch.guest_fpu.state->fxsave,
2701                         sizeof(struct i387_fxsave_struct));
2702                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2703                         XSTATE_FPSSE;
2704         }
2705 }
2706
2707 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2708                                         struct kvm_xsave *guest_xsave)
2709 {
2710         u64 xstate_bv =
2711                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2712
2713         if (cpu_has_xsave)
2714                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2715                         guest_xsave->region, xstate_size);
2716         else {
2717                 if (xstate_bv & ~XSTATE_FPSSE)
2718                         return -EINVAL;
2719                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2720                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2721         }
2722         return 0;
2723 }
2724
2725 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2726                                         struct kvm_xcrs *guest_xcrs)
2727 {
2728         if (!cpu_has_xsave) {
2729                 guest_xcrs->nr_xcrs = 0;
2730                 return;
2731         }
2732
2733         guest_xcrs->nr_xcrs = 1;
2734         guest_xcrs->flags = 0;
2735         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2736         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2737 }
2738
2739 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2740                                        struct kvm_xcrs *guest_xcrs)
2741 {
2742         int i, r = 0;
2743
2744         if (!cpu_has_xsave)
2745                 return -EINVAL;
2746
2747         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2748                 return -EINVAL;
2749
2750         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2751                 /* Only support XCR0 currently */
2752                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2753                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2754                                 guest_xcrs->xcrs[0].value);
2755                         break;
2756                 }
2757         if (r)
2758                 r = -EINVAL;
2759         return r;
2760 }
2761
2762 long kvm_arch_vcpu_ioctl(struct file *filp,
2763                          unsigned int ioctl, unsigned long arg)
2764 {
2765         struct kvm_vcpu *vcpu = filp->private_data;
2766         void __user *argp = (void __user *)arg;
2767         int r;
2768         union {
2769                 struct kvm_lapic_state *lapic;
2770                 struct kvm_xsave *xsave;
2771                 struct kvm_xcrs *xcrs;
2772                 void *buffer;
2773         } u;
2774
2775         u.buffer = NULL;
2776         switch (ioctl) {
2777         case KVM_GET_LAPIC: {
2778                 r = -EINVAL;
2779                 if (!vcpu->arch.apic)
2780                         goto out;
2781                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2782
2783                 r = -ENOMEM;
2784                 if (!u.lapic)
2785                         goto out;
2786                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2787                 if (r)
2788                         goto out;
2789                 r = -EFAULT;
2790                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2791                         goto out;
2792                 r = 0;
2793                 break;
2794         }
2795         case KVM_SET_LAPIC: {
2796                 r = -EINVAL;
2797                 if (!vcpu->arch.apic)
2798                         goto out;
2799                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2800                 r = -ENOMEM;
2801                 if (!u.lapic)
2802                         goto out;
2803                 r = -EFAULT;
2804                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2805                         goto out;
2806                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2807                 if (r)
2808                         goto out;
2809                 r = 0;
2810                 break;
2811         }
2812         case KVM_INTERRUPT: {
2813                 struct kvm_interrupt irq;
2814
2815                 r = -EFAULT;
2816                 if (copy_from_user(&irq, argp, sizeof irq))
2817                         goto out;
2818                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2819                 if (r)
2820                         goto out;
2821                 r = 0;
2822                 break;
2823         }
2824         case KVM_NMI: {
2825                 r = kvm_vcpu_ioctl_nmi(vcpu);
2826                 if (r)
2827                         goto out;
2828                 r = 0;
2829                 break;
2830         }
2831         case KVM_SET_CPUID: {
2832                 struct kvm_cpuid __user *cpuid_arg = argp;
2833                 struct kvm_cpuid cpuid;
2834
2835                 r = -EFAULT;
2836                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2837                         goto out;
2838                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2839                 if (r)
2840                         goto out;
2841                 break;
2842         }
2843         case KVM_SET_CPUID2: {
2844                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2845                 struct kvm_cpuid2 cpuid;
2846
2847                 r = -EFAULT;
2848                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2849                         goto out;
2850                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2851                                               cpuid_arg->entries);
2852                 if (r)
2853                         goto out;
2854                 break;
2855         }
2856         case KVM_GET_CPUID2: {
2857                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2858                 struct kvm_cpuid2 cpuid;
2859
2860                 r = -EFAULT;
2861                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2862                         goto out;
2863                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2864                                               cpuid_arg->entries);
2865                 if (r)
2866                         goto out;
2867                 r = -EFAULT;
2868                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2869                         goto out;
2870                 r = 0;
2871                 break;
2872         }
2873         case KVM_GET_MSRS:
2874                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2875                 break;
2876         case KVM_SET_MSRS:
2877                 r = msr_io(vcpu, argp, do_set_msr, 0);
2878                 break;
2879         case KVM_TPR_ACCESS_REPORTING: {
2880                 struct kvm_tpr_access_ctl tac;
2881
2882                 r = -EFAULT;
2883                 if (copy_from_user(&tac, argp, sizeof tac))
2884                         goto out;
2885                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2886                 if (r)
2887                         goto out;
2888                 r = -EFAULT;
2889                 if (copy_to_user(argp, &tac, sizeof tac))
2890                         goto out;
2891                 r = 0;
2892                 break;
2893         };
2894         case KVM_SET_VAPIC_ADDR: {
2895                 struct kvm_vapic_addr va;
2896
2897                 r = -EINVAL;
2898                 if (!irqchip_in_kernel(vcpu->kvm))
2899                         goto out;
2900                 r = -EFAULT;
2901                 if (copy_from_user(&va, argp, sizeof va))
2902                         goto out;
2903                 r = 0;
2904                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2905                 break;
2906         }
2907         case KVM_X86_SETUP_MCE: {
2908                 u64 mcg_cap;
2909
2910                 r = -EFAULT;
2911                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2912                         goto out;
2913                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2914                 break;
2915         }
2916         case KVM_X86_SET_MCE: {
2917                 struct kvm_x86_mce mce;
2918
2919                 r = -EFAULT;
2920                 if (copy_from_user(&mce, argp, sizeof mce))
2921                         goto out;
2922                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2923                 break;
2924         }
2925         case KVM_GET_VCPU_EVENTS: {
2926                 struct kvm_vcpu_events events;
2927
2928                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2929
2930                 r = -EFAULT;
2931                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2932                         break;
2933                 r = 0;
2934                 break;
2935         }
2936         case KVM_SET_VCPU_EVENTS: {
2937                 struct kvm_vcpu_events events;
2938
2939                 r = -EFAULT;
2940                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2941                         break;
2942
2943                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2944                 break;
2945         }
2946         case KVM_GET_DEBUGREGS: {
2947                 struct kvm_debugregs dbgregs;
2948
2949                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2950
2951                 r = -EFAULT;
2952                 if (copy_to_user(argp, &dbgregs,
2953                                  sizeof(struct kvm_debugregs)))
2954                         break;
2955                 r = 0;
2956                 break;
2957         }
2958         case KVM_SET_DEBUGREGS: {
2959                 struct kvm_debugregs dbgregs;
2960
2961                 r = -EFAULT;
2962                 if (copy_from_user(&dbgregs, argp,
2963                                    sizeof(struct kvm_debugregs)))
2964                         break;
2965
2966                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2967                 break;
2968         }
2969         case KVM_GET_XSAVE: {
2970                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2971                 r = -ENOMEM;
2972                 if (!u.xsave)
2973                         break;
2974
2975                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2976
2977                 r = -EFAULT;
2978                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2979                         break;
2980                 r = 0;
2981                 break;
2982         }
2983         case KVM_SET_XSAVE: {
2984                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2985                 r = -ENOMEM;
2986                 if (!u.xsave)
2987                         break;
2988
2989                 r = -EFAULT;
2990                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2991                         break;
2992
2993                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2994                 break;
2995         }
2996         case KVM_GET_XCRS: {
2997                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2998                 r = -ENOMEM;
2999                 if (!u.xcrs)
3000                         break;
3001
3002                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3003
3004                 r = -EFAULT;
3005                 if (copy_to_user(argp, u.xcrs,
3006                                  sizeof(struct kvm_xcrs)))
3007                         break;
3008                 r = 0;
3009                 break;
3010         }
3011         case KVM_SET_XCRS: {
3012                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3013                 r = -ENOMEM;
3014                 if (!u.xcrs)
3015                         break;
3016
3017                 r = -EFAULT;
3018                 if (copy_from_user(u.xcrs, argp,
3019                                    sizeof(struct kvm_xcrs)))
3020                         break;
3021
3022                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3023                 break;
3024         }
3025         default:
3026                 r = -EINVAL;
3027         }
3028 out:
3029         kfree(u.buffer);
3030         return r;
3031 }
3032
3033 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3034 {
3035         int ret;
3036
3037         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3038                 return -1;
3039         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3040         return ret;
3041 }
3042
3043 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3044                                               u64 ident_addr)
3045 {
3046         kvm->arch.ept_identity_map_addr = ident_addr;
3047         return 0;
3048 }
3049
3050 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3051                                           u32 kvm_nr_mmu_pages)
3052 {
3053         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3054                 return -EINVAL;
3055
3056         mutex_lock(&kvm->slots_lock);
3057         spin_lock(&kvm->mmu_lock);
3058
3059         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3060         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3061
3062         spin_unlock(&kvm->mmu_lock);
3063         mutex_unlock(&kvm->slots_lock);
3064         return 0;
3065 }
3066
3067 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3068 {
3069         return kvm->arch.n_max_mmu_pages;
3070 }
3071
3072 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3073 {
3074         int r;
3075
3076         r = 0;
3077         switch (chip->chip_id) {
3078         case KVM_IRQCHIP_PIC_MASTER:
3079                 memcpy(&chip->chip.pic,
3080                         &pic_irqchip(kvm)->pics[0],
3081                         sizeof(struct kvm_pic_state));
3082                 break;
3083         case KVM_IRQCHIP_PIC_SLAVE:
3084                 memcpy(&chip->chip.pic,
3085                         &pic_irqchip(kvm)->pics[1],
3086                         sizeof(struct kvm_pic_state));
3087                 break;
3088         case KVM_IRQCHIP_IOAPIC:
3089                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3090                 break;
3091         default:
3092                 r = -EINVAL;
3093                 break;
3094         }
3095         return r;
3096 }
3097
3098 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3099 {
3100         int r;
3101
3102         r = 0;
3103         switch (chip->chip_id) {
3104         case KVM_IRQCHIP_PIC_MASTER:
3105                 spin_lock(&pic_irqchip(kvm)->lock);
3106                 memcpy(&pic_irqchip(kvm)->pics[0],
3107                         &chip->chip.pic,
3108                         sizeof(struct kvm_pic_state));
3109                 spin_unlock(&pic_irqchip(kvm)->lock);
3110                 break;
3111         case KVM_IRQCHIP_PIC_SLAVE:
3112                 spin_lock(&pic_irqchip(kvm)->lock);
3113                 memcpy(&pic_irqchip(kvm)->pics[1],
3114                         &chip->chip.pic,
3115                         sizeof(struct kvm_pic_state));
3116                 spin_unlock(&pic_irqchip(kvm)->lock);
3117                 break;
3118         case KVM_IRQCHIP_IOAPIC:
3119                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3120                 break;
3121         default:
3122                 r = -EINVAL;
3123                 break;
3124         }
3125         kvm_pic_update_irq(pic_irqchip(kvm));
3126         return r;
3127 }
3128
3129 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3130 {
3131         int r = 0;
3132
3133         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3134         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3135         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3136         return r;
3137 }
3138
3139 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3140 {
3141         int r = 0;
3142
3143         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3144         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3145         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3146         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3147         return r;
3148 }
3149
3150 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3151 {
3152         int r = 0;
3153
3154         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3155         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3156                 sizeof(ps->channels));
3157         ps->flags = kvm->arch.vpit->pit_state.flags;
3158         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3159         memset(&ps->reserved, 0, sizeof(ps->reserved));
3160         return r;
3161 }
3162
3163 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3164 {
3165         int r = 0, start = 0;
3166         u32 prev_legacy, cur_legacy;
3167         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3168         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3169         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3170         if (!prev_legacy && cur_legacy)
3171                 start = 1;
3172         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3173                sizeof(kvm->arch.vpit->pit_state.channels));
3174         kvm->arch.vpit->pit_state.flags = ps->flags;
3175         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3176         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3177         return r;
3178 }
3179
3180 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3181                                  struct kvm_reinject_control *control)
3182 {
3183         if (!kvm->arch.vpit)
3184                 return -ENXIO;
3185         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3186         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3187         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3188         return 0;
3189 }
3190
3191 /*
3192  * Get (and clear) the dirty memory log for a memory slot.
3193  */
3194 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3195                                       struct kvm_dirty_log *log)
3196 {
3197         int r, i;
3198         struct kvm_memory_slot *memslot;
3199         unsigned long n;
3200         unsigned long is_dirty = 0;
3201
3202         mutex_lock(&kvm->slots_lock);
3203
3204         r = -EINVAL;
3205         if (log->slot >= KVM_MEMORY_SLOTS)
3206                 goto out;
3207
3208         memslot = &kvm->memslots->memslots[log->slot];
3209         r = -ENOENT;
3210         if (!memslot->dirty_bitmap)
3211                 goto out;
3212
3213         n = kvm_dirty_bitmap_bytes(memslot);
3214
3215         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3216                 is_dirty = memslot->dirty_bitmap[i];
3217
3218         /* If nothing is dirty, don't bother messing with page tables. */
3219         if (is_dirty) {
3220                 struct kvm_memslots *slots, *old_slots;
3221                 unsigned long *dirty_bitmap;
3222
3223                 dirty_bitmap = memslot->dirty_bitmap_head;
3224                 if (memslot->dirty_bitmap == dirty_bitmap)
3225                         dirty_bitmap += n / sizeof(long);
3226                 memset(dirty_bitmap, 0, n);
3227
3228                 r = -ENOMEM;
3229                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3230                 if (!slots)
3231                         goto out;
3232                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3233                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3234                 slots->generation++;
3235
3236                 old_slots = kvm->memslots;
3237                 rcu_assign_pointer(kvm->memslots, slots);
3238                 synchronize_srcu_expedited(&kvm->srcu);
3239                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3240                 kfree(old_slots);
3241
3242                 spin_lock(&kvm->mmu_lock);
3243                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3244                 spin_unlock(&kvm->mmu_lock);
3245
3246                 r = -EFAULT;
3247                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3248                         goto out;
3249         } else {
3250                 r = -EFAULT;
3251                 if (clear_user(log->dirty_bitmap, n))
3252                         goto out;
3253         }
3254
3255         r = 0;
3256 out:
3257         mutex_unlock(&kvm->slots_lock);
3258         return r;
3259 }
3260
3261 long kvm_arch_vm_ioctl(struct file *filp,
3262                        unsigned int ioctl, unsigned long arg)
3263 {
3264         struct kvm *kvm = filp->private_data;
3265         void __user *argp = (void __user *)arg;
3266         int r = -ENOTTY;
3267         /*
3268          * This union makes it completely explicit to gcc-3.x
3269          * that these two variables' stack usage should be
3270          * combined, not added together.
3271          */
3272         union {
3273                 struct kvm_pit_state ps;
3274                 struct kvm_pit_state2 ps2;
3275                 struct kvm_pit_config pit_config;
3276         } u;
3277
3278         switch (ioctl) {
3279         case KVM_SET_TSS_ADDR:
3280                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3281                 if (r < 0)
3282                         goto out;
3283                 break;
3284         case KVM_SET_IDENTITY_MAP_ADDR: {
3285                 u64 ident_addr;
3286
3287                 r = -EFAULT;
3288                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3289                         goto out;
3290                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3291                 if (r < 0)
3292                         goto out;
3293                 break;
3294         }
3295         case KVM_SET_NR_MMU_PAGES:
3296                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3297                 if (r)
3298                         goto out;
3299                 break;
3300         case KVM_GET_NR_MMU_PAGES:
3301                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3302                 break;
3303         case KVM_CREATE_IRQCHIP: {
3304                 struct kvm_pic *vpic;
3305
3306                 mutex_lock(&kvm->lock);
3307                 r = -EEXIST;
3308                 if (kvm->arch.vpic)
3309                         goto create_irqchip_unlock;
3310                 r = -ENOMEM;
3311                 vpic = kvm_create_pic(kvm);
3312                 if (vpic) {
3313                         r = kvm_ioapic_init(kvm);
3314                         if (r) {
3315                                 mutex_lock(&kvm->slots_lock);
3316                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3317                                                           &vpic->dev);
3318                                 mutex_unlock(&kvm->slots_lock);
3319                                 kfree(vpic);
3320                                 goto create_irqchip_unlock;
3321                         }
3322                 } else
3323                         goto create_irqchip_unlock;
3324                 smp_wmb();
3325                 kvm->arch.vpic = vpic;
3326                 smp_wmb();
3327                 r = kvm_setup_default_irq_routing(kvm);
3328                 if (r) {
3329                         mutex_lock(&kvm->slots_lock);
3330                         mutex_lock(&kvm->irq_lock);
3331                         kvm_ioapic_destroy(kvm);
3332                         kvm_destroy_pic(kvm);
3333                         mutex_unlock(&kvm->irq_lock);
3334                         mutex_unlock(&kvm->slots_lock);
3335                 }
3336         create_irqchip_unlock:
3337                 mutex_unlock(&kvm->lock);
3338                 break;
3339         }
3340         case KVM_CREATE_PIT:
3341                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3342                 goto create_pit;
3343         case KVM_CREATE_PIT2:
3344                 r = -EFAULT;
3345                 if (copy_from_user(&u.pit_config, argp,
3346                                    sizeof(struct kvm_pit_config)))
3347                         goto out;
3348         create_pit:
3349                 mutex_lock(&kvm->slots_lock);
3350                 r = -EEXIST;
3351                 if (kvm->arch.vpit)
3352                         goto create_pit_unlock;
3353                 r = -ENOMEM;
3354                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3355                 if (kvm->arch.vpit)
3356                         r = 0;
3357         create_pit_unlock:
3358                 mutex_unlock(&kvm->slots_lock);
3359                 break;
3360         case KVM_IRQ_LINE_STATUS:
3361         case KVM_IRQ_LINE: {
3362                 struct kvm_irq_level irq_event;
3363
3364                 r = -EFAULT;
3365                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3366                         goto out;
3367                 r = -ENXIO;
3368                 if (irqchip_in_kernel(kvm)) {
3369                         __s32 status;
3370                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3371                                         irq_event.irq, irq_event.level);
3372                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3373                                 r = -EFAULT;
3374                                 irq_event.status = status;
3375                                 if (copy_to_user(argp, &irq_event,
3376                                                         sizeof irq_event))
3377                                         goto out;
3378                         }
3379                         r = 0;
3380                 }
3381                 break;
3382         }
3383         case KVM_GET_IRQCHIP: {
3384                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3385                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3386
3387                 r = -ENOMEM;
3388                 if (!chip)
3389                         goto out;
3390                 r = -EFAULT;
3391                 if (copy_from_user(chip, argp, sizeof *chip))
3392                         goto get_irqchip_out;
3393                 r = -ENXIO;
3394                 if (!irqchip_in_kernel(kvm))
3395                         goto get_irqchip_out;
3396                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3397                 if (r)
3398                         goto get_irqchip_out;
3399                 r = -EFAULT;
3400                 if (copy_to_user(argp, chip, sizeof *chip))
3401                         goto get_irqchip_out;
3402                 r = 0;
3403         get_irqchip_out:
3404                 kfree(chip);
3405                 if (r)
3406                         goto out;
3407                 break;
3408         }
3409         case KVM_SET_IRQCHIP: {
3410                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3411                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3412
3413                 r = -ENOMEM;
3414                 if (!chip)
3415                         goto out;
3416                 r = -EFAULT;
3417                 if (copy_from_user(chip, argp, sizeof *chip))
3418                         goto set_irqchip_out;
3419                 r = -ENXIO;
3420                 if (!irqchip_in_kernel(kvm))
3421                         goto set_irqchip_out;
3422                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3423                 if (r)
3424                         goto set_irqchip_out;
3425                 r = 0;
3426         set_irqchip_out:
3427                 kfree(chip);
3428                 if (r)
3429                         goto out;
3430                 break;
3431         }
3432         case KVM_GET_PIT: {
3433                 r = -EFAULT;
3434                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3435                         goto out;
3436                 r = -ENXIO;
3437                 if (!kvm->arch.vpit)
3438                         goto out;
3439                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3440                 if (r)
3441                         goto out;
3442                 r = -EFAULT;
3443                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3444                         goto out;
3445                 r = 0;
3446                 break;
3447         }
3448         case KVM_SET_PIT: {
3449                 r = -EFAULT;
3450                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3451                         goto out;
3452                 r = -ENXIO;
3453                 if (!kvm->arch.vpit)
3454                         goto out;
3455                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3456                 if (r)
3457                         goto out;
3458                 r = 0;
3459                 break;
3460         }
3461         case KVM_GET_PIT2: {
3462                 r = -ENXIO;
3463                 if (!kvm->arch.vpit)
3464                         goto out;
3465                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3466                 if (r)
3467                         goto out;
3468                 r = -EFAULT;
3469                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3470                         goto out;
3471                 r = 0;
3472                 break;
3473         }
3474         case KVM_SET_PIT2: {
3475                 r = -EFAULT;
3476                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3477                         goto out;
3478                 r = -ENXIO;
3479                 if (!kvm->arch.vpit)
3480                         goto out;
3481                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3482                 if (r)
3483                         goto out;
3484                 r = 0;
3485                 break;
3486         }
3487         case KVM_REINJECT_CONTROL: {
3488                 struct kvm_reinject_control control;
3489                 r =  -EFAULT;
3490                 if (copy_from_user(&control, argp, sizeof(control)))
3491                         goto out;
3492                 r = kvm_vm_ioctl_reinject(kvm, &control);
3493                 if (r)
3494                         goto out;
3495                 r = 0;
3496                 break;
3497         }
3498         case KVM_XEN_HVM_CONFIG: {
3499                 r = -EFAULT;
3500                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3501                                    sizeof(struct kvm_xen_hvm_config)))
3502                         goto out;
3503                 r = -EINVAL;
3504                 if (kvm->arch.xen_hvm_config.flags)
3505                         goto out;
3506                 r = 0;
3507                 break;
3508         }
3509         case KVM_SET_CLOCK: {
3510                 struct kvm_clock_data user_ns;
3511                 u64 now_ns;
3512                 s64 delta;
3513
3514                 r = -EFAULT;
3515                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3516                         goto out;
3517
3518                 r = -EINVAL;
3519                 if (user_ns.flags)
3520                         goto out;
3521
3522                 r = 0;
3523                 local_irq_disable();
3524                 now_ns = get_kernel_ns();
3525                 delta = user_ns.clock - now_ns;
3526                 local_irq_enable();
3527                 kvm->arch.kvmclock_offset = delta;
3528                 break;
3529         }
3530         case KVM_GET_CLOCK: {
3531                 struct kvm_clock_data user_ns;
3532                 u64 now_ns;
3533
3534                 local_irq_disable();
3535                 now_ns = get_kernel_ns();
3536                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3537                 local_irq_enable();
3538                 user_ns.flags = 0;
3539                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3540
3541                 r = -EFAULT;
3542                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3543                         goto out;
3544                 r = 0;
3545                 break;
3546         }
3547
3548         default:
3549                 ;
3550         }
3551 out:
3552         return r;
3553 }
3554
3555 static void kvm_init_msr_list(void)
3556 {
3557         u32 dummy[2];
3558         unsigned i, j;
3559
3560         /* skip the first msrs in the list. KVM-specific */
3561         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3562                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3563                         continue;
3564                 if (j < i)
3565                         msrs_to_save[j] = msrs_to_save[i];
3566                 j++;
3567         }
3568         num_msrs_to_save = j;
3569 }
3570
3571 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3572                            const void *v)
3573 {
3574         if (vcpu->arch.apic &&
3575             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3576                 return 0;
3577
3578         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3579 }
3580
3581 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3582 {
3583         if (vcpu->arch.apic &&
3584             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3585                 return 0;
3586
3587         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3588 }
3589
3590 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3591                         struct kvm_segment *var, int seg)
3592 {
3593         kvm_x86_ops->set_segment(vcpu, var, seg);
3594 }
3595
3596 void kvm_get_segment(struct kvm_vcpu *vcpu,
3597                      struct kvm_segment *var, int seg)
3598 {
3599         kvm_x86_ops->get_segment(vcpu, var, seg);
3600 }
3601
3602 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3603 {
3604         return gpa;
3605 }
3606
3607 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3608 {
3609         gpa_t t_gpa;
3610         struct x86_exception exception;
3611
3612         BUG_ON(!mmu_is_nested(vcpu));
3613
3614         /* NPT walks are always user-walks */
3615         access |= PFERR_USER_MASK;
3616         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3617
3618         return t_gpa;
3619 }
3620
3621 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3622                               struct x86_exception *exception)
3623 {
3624         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3625         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3626 }
3627
3628  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3629                                 struct x86_exception *exception)
3630 {
3631         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3632         access |= PFERR_FETCH_MASK;
3633         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3634 }
3635
3636 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3637                                struct x86_exception *exception)
3638 {
3639         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3640         access |= PFERR_WRITE_MASK;
3641         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3642 }
3643
3644 /* uses this to access any guest's mapped memory without checking CPL */
3645 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3646                                 struct x86_exception *exception)
3647 {
3648         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3649 }
3650
3651 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3652                                       struct kvm_vcpu *vcpu, u32 access,
3653                                       struct x86_exception *exception)
3654 {
3655         void *data = val;
3656         int r = X86EMUL_CONTINUE;
3657
3658         while (bytes) {
3659                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3660                                                             exception);
3661                 unsigned offset = addr & (PAGE_SIZE-1);
3662                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3663                 int ret;
3664
3665                 if (gpa == UNMAPPED_GVA)
3666                         return X86EMUL_PROPAGATE_FAULT;
3667                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3668                 if (ret < 0) {
3669                         r = X86EMUL_IO_NEEDED;
3670                         goto out;
3671                 }
3672
3673                 bytes -= toread;
3674                 data += toread;
3675                 addr += toread;
3676         }
3677 out:
3678         return r;
3679 }
3680
3681 /* used for instruction fetching */
3682 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3683                                 struct kvm_vcpu *vcpu,
3684                                 struct x86_exception *exception)
3685 {
3686         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3687         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3688                                           access | PFERR_FETCH_MASK,
3689                                           exception);
3690 }
3691
3692 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3693                                struct kvm_vcpu *vcpu,
3694                                struct x86_exception *exception)
3695 {
3696         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3697         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3698                                           exception);
3699 }
3700
3701 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3702                                       struct kvm_vcpu *vcpu,
3703                                       struct x86_exception *exception)
3704 {
3705         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3706 }
3707
3708 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3709                                        unsigned int bytes,
3710                                        struct kvm_vcpu *vcpu,
3711                                        struct x86_exception *exception)
3712 {
3713         void *data = val;
3714         int r = X86EMUL_CONTINUE;
3715
3716         while (bytes) {
3717                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3718                                                              PFERR_WRITE_MASK,
3719                                                              exception);
3720                 unsigned offset = addr & (PAGE_SIZE-1);
3721                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3722                 int ret;
3723
3724                 if (gpa == UNMAPPED_GVA)
3725                         return X86EMUL_PROPAGATE_FAULT;
3726                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3727                 if (ret < 0) {
3728                         r = X86EMUL_IO_NEEDED;
3729                         goto out;
3730                 }
3731
3732                 bytes -= towrite;
3733                 data += towrite;
3734                 addr += towrite;
3735         }
3736 out:
3737         return r;
3738 }
3739
3740 static int emulator_read_emulated(unsigned long addr,
3741                                   void *val,
3742                                   unsigned int bytes,
3743                                   struct x86_exception *exception,
3744                                   struct kvm_vcpu *vcpu)
3745 {
3746         gpa_t                 gpa;
3747
3748         if (vcpu->mmio_read_completed) {
3749                 memcpy(val, vcpu->mmio_data, bytes);
3750                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3751                                vcpu->mmio_phys_addr, *(u64 *)val);
3752                 vcpu->mmio_read_completed = 0;
3753                 return X86EMUL_CONTINUE;
3754         }
3755
3756         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3757
3758         if (gpa == UNMAPPED_GVA)
3759                 return X86EMUL_PROPAGATE_FAULT;
3760
3761         /* For APIC access vmexit */
3762         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3763                 goto mmio;
3764
3765         if (kvm_read_guest_virt(addr, val, bytes, vcpu, exception)
3766             == X86EMUL_CONTINUE)
3767                 return X86EMUL_CONTINUE;
3768
3769 mmio:
3770         /*
3771          * Is this MMIO handled locally?
3772          */
3773         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3774                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3775                 return X86EMUL_CONTINUE;
3776         }
3777
3778         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3779
3780         vcpu->mmio_needed = 1;
3781         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3782         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3783         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3784         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3785
3786         return X86EMUL_IO_NEEDED;
3787 }
3788
3789 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3790                         const void *val, int bytes)
3791 {
3792         int ret;
3793
3794         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3795         if (ret < 0)
3796                 return 0;
3797         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3798         return 1;
3799 }
3800
3801 static int emulator_write_emulated_onepage(unsigned long addr,
3802                                            const void *val,
3803                                            unsigned int bytes,
3804                                            struct x86_exception *exception,
3805                                            struct kvm_vcpu *vcpu)
3806 {
3807         gpa_t                 gpa;
3808
3809         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3810
3811         if (gpa == UNMAPPED_GVA)
3812                 return X86EMUL_PROPAGATE_FAULT;
3813
3814         /* For APIC access vmexit */
3815         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3816                 goto mmio;
3817
3818         if (emulator_write_phys(vcpu, gpa, val, bytes))
3819                 return X86EMUL_CONTINUE;
3820
3821 mmio:
3822         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3823         /*
3824          * Is this MMIO handled locally?
3825          */
3826         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3827                 return X86EMUL_CONTINUE;
3828
3829         vcpu->mmio_needed = 1;
3830         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3831         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3832         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3833         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3834         memcpy(vcpu->run->mmio.data, val, bytes);
3835
3836         return X86EMUL_CONTINUE;
3837 }
3838
3839 int emulator_write_emulated(unsigned long addr,
3840                             const void *val,
3841                             unsigned int bytes,
3842                             struct x86_exception *exception,
3843                             struct kvm_vcpu *vcpu)
3844 {
3845         /* Crossing a page boundary? */
3846         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3847                 int rc, now;
3848
3849                 now = -addr & ~PAGE_MASK;
3850                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
3851                                                      vcpu);
3852                 if (rc != X86EMUL_CONTINUE)
3853                         return rc;
3854                 addr += now;
3855                 val += now;
3856                 bytes -= now;
3857         }
3858         return emulator_write_emulated_onepage(addr, val, bytes, exception,
3859                                                vcpu);
3860 }
3861
3862 #define CMPXCHG_TYPE(t, ptr, old, new) \
3863         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3864
3865 #ifdef CONFIG_X86_64
3866 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3867 #else
3868 #  define CMPXCHG64(ptr, old, new) \
3869         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3870 #endif
3871
3872 static int emulator_cmpxchg_emulated(unsigned long addr,
3873                                      const void *old,
3874                                      const void *new,
3875                                      unsigned int bytes,
3876                                      struct x86_exception *exception,
3877                                      struct kvm_vcpu *vcpu)
3878 {
3879         gpa_t gpa;
3880         struct page *page;
3881         char *kaddr;
3882         bool exchanged;
3883
3884         /* guests cmpxchg8b have to be emulated atomically */
3885         if (bytes > 8 || (bytes & (bytes - 1)))
3886                 goto emul_write;
3887
3888         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3889
3890         if (gpa == UNMAPPED_GVA ||
3891             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3892                 goto emul_write;
3893
3894         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3895                 goto emul_write;
3896
3897         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3898         if (is_error_page(page)) {
3899                 kvm_release_page_clean(page);
3900                 goto emul_write;
3901         }
3902
3903         kaddr = kmap_atomic(page, KM_USER0);
3904         kaddr += offset_in_page(gpa);
3905         switch (bytes) {
3906         case 1:
3907                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3908                 break;
3909         case 2:
3910                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3911                 break;
3912         case 4:
3913                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3914                 break;
3915         case 8:
3916                 exchanged = CMPXCHG64(kaddr, old, new);
3917                 break;
3918         default:
3919                 BUG();
3920         }
3921         kunmap_atomic(kaddr, KM_USER0);
3922         kvm_release_page_dirty(page);
3923
3924         if (!exchanged)
3925                 return X86EMUL_CMPXCHG_FAILED;
3926
3927         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3928
3929         return X86EMUL_CONTINUE;
3930
3931 emul_write:
3932         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3933
3934         return emulator_write_emulated(addr, new, bytes, exception, vcpu);
3935 }
3936
3937 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3938 {
3939         /* TODO: String I/O for in kernel device */
3940         int r;
3941
3942         if (vcpu->arch.pio.in)
3943                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3944                                     vcpu->arch.pio.size, pd);
3945         else
3946                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3947                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3948                                      pd);
3949         return r;
3950 }
3951
3952
3953 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3954                              unsigned int count, struct kvm_vcpu *vcpu)
3955 {
3956         if (vcpu->arch.pio.count)
3957                 goto data_avail;
3958
3959         trace_kvm_pio(0, port, size, count);
3960
3961         vcpu->arch.pio.port = port;
3962         vcpu->arch.pio.in = 1;
3963         vcpu->arch.pio.count  = count;
3964         vcpu->arch.pio.size = size;
3965
3966         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3967         data_avail:
3968                 memcpy(val, vcpu->arch.pio_data, size * count);
3969                 vcpu->arch.pio.count = 0;
3970                 return 1;
3971         }
3972
3973         vcpu->run->exit_reason = KVM_EXIT_IO;
3974         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3975         vcpu->run->io.size = size;
3976         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3977         vcpu->run->io.count = count;
3978         vcpu->run->io.port = port;
3979
3980         return 0;
3981 }
3982
3983 static int emulator_pio_out_emulated(int size, unsigned short port,
3984                               const void *val, unsigned int count,
3985                               struct kvm_vcpu *vcpu)
3986 {
3987         trace_kvm_pio(1, port, size, count);
3988
3989         vcpu->arch.pio.port = port;
3990         vcpu->arch.pio.in = 0;
3991         vcpu->arch.pio.count = count;
3992         vcpu->arch.pio.size = size;
3993
3994         memcpy(vcpu->arch.pio_data, val, size * count);
3995
3996         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3997                 vcpu->arch.pio.count = 0;
3998                 return 1;
3999         }
4000
4001         vcpu->run->exit_reason = KVM_EXIT_IO;
4002         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4003         vcpu->run->io.size = size;
4004         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4005         vcpu->run->io.count = count;
4006         vcpu->run->io.port = port;
4007
4008         return 0;
4009 }
4010
4011 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4012 {
4013         return kvm_x86_ops->get_segment_base(vcpu, seg);
4014 }
4015
4016 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4017 {
4018         kvm_mmu_invlpg(vcpu, address);
4019         return X86EMUL_CONTINUE;
4020 }
4021
4022 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4023 {
4024         if (!need_emulate_wbinvd(vcpu))
4025                 return X86EMUL_CONTINUE;
4026
4027         if (kvm_x86_ops->has_wbinvd_exit()) {
4028                 int cpu = get_cpu();
4029
4030                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4031                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4032                                 wbinvd_ipi, NULL, 1);
4033                 put_cpu();
4034                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4035         } else
4036                 wbinvd();
4037         return X86EMUL_CONTINUE;
4038 }
4039 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4040
4041 int emulate_clts(struct kvm_vcpu *vcpu)
4042 {
4043         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4044         kvm_x86_ops->fpu_activate(vcpu);
4045         return X86EMUL_CONTINUE;
4046 }
4047
4048 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4049 {
4050         return _kvm_get_dr(vcpu, dr, dest);
4051 }
4052
4053 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4054 {
4055
4056         return __kvm_set_dr(vcpu, dr, value);
4057 }
4058
4059 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4060 {
4061         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4062 }
4063
4064 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4065 {
4066         unsigned long value;
4067
4068         switch (cr) {
4069         case 0:
4070                 value = kvm_read_cr0(vcpu);
4071                 break;
4072         case 2:
4073                 value = vcpu->arch.cr2;
4074                 break;
4075         case 3:
4076                 value = vcpu->arch.cr3;
4077                 break;
4078         case 4:
4079                 value = kvm_read_cr4(vcpu);
4080                 break;
4081         case 8:
4082                 value = kvm_get_cr8(vcpu);
4083                 break;
4084         default:
4085                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4086                 return 0;
4087         }
4088
4089         return value;
4090 }
4091
4092 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4093 {
4094         int res = 0;
4095
4096         switch (cr) {
4097         case 0:
4098                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4099                 break;
4100         case 2:
4101                 vcpu->arch.cr2 = val;
4102                 break;
4103         case 3:
4104                 res = kvm_set_cr3(vcpu, val);
4105                 break;
4106         case 4:
4107                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4108                 break;
4109         case 8:
4110                 res = kvm_set_cr8(vcpu, val);
4111                 break;
4112         default:
4113                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4114                 res = -1;
4115         }
4116
4117         return res;
4118 }
4119
4120 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4121 {
4122         return kvm_x86_ops->get_cpl(vcpu);
4123 }
4124
4125 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4126 {
4127         kvm_x86_ops->get_gdt(vcpu, dt);
4128 }
4129
4130 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4131 {
4132         kvm_x86_ops->get_idt(vcpu, dt);
4133 }
4134
4135 static unsigned long emulator_get_cached_segment_base(int seg,
4136                                                       struct kvm_vcpu *vcpu)
4137 {
4138         return get_segment_base(vcpu, seg);
4139 }
4140
4141 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4142                                            struct kvm_vcpu *vcpu)
4143 {
4144         struct kvm_segment var;
4145
4146         kvm_get_segment(vcpu, &var, seg);
4147
4148         if (var.unusable)
4149                 return false;
4150
4151         if (var.g)
4152                 var.limit >>= 12;
4153         set_desc_limit(desc, var.limit);
4154         set_desc_base(desc, (unsigned long)var.base);
4155         desc->type = var.type;
4156         desc->s = var.s;
4157         desc->dpl = var.dpl;
4158         desc->p = var.present;
4159         desc->avl = var.avl;
4160         desc->l = var.l;
4161         desc->d = var.db;
4162         desc->g = var.g;
4163
4164         return true;
4165 }
4166
4167 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4168                                            struct kvm_vcpu *vcpu)
4169 {
4170         struct kvm_segment var;
4171
4172         /* needed to preserve selector */
4173         kvm_get_segment(vcpu, &var, seg);
4174
4175         var.base = get_desc_base(desc);
4176         var.limit = get_desc_limit(desc);
4177         if (desc->g)
4178                 var.limit = (var.limit << 12) | 0xfff;
4179         var.type = desc->type;
4180         var.present = desc->p;
4181         var.dpl = desc->dpl;
4182         var.db = desc->d;
4183         var.s = desc->s;
4184         var.l = desc->l;
4185         var.g = desc->g;
4186         var.avl = desc->avl;
4187         var.present = desc->p;
4188         var.unusable = !var.present;
4189         var.padding = 0;
4190
4191         kvm_set_segment(vcpu, &var, seg);
4192         return;
4193 }
4194
4195 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4196 {
4197         struct kvm_segment kvm_seg;
4198
4199         kvm_get_segment(vcpu, &kvm_seg, seg);
4200         return kvm_seg.selector;
4201 }
4202
4203 static void emulator_set_segment_selector(u16 sel, int seg,
4204                                           struct kvm_vcpu *vcpu)
4205 {
4206         struct kvm_segment kvm_seg;
4207
4208         kvm_get_segment(vcpu, &kvm_seg, seg);
4209         kvm_seg.selector = sel;
4210         kvm_set_segment(vcpu, &kvm_seg, seg);
4211 }
4212
4213 static struct x86_emulate_ops emulate_ops = {
4214         .read_std            = kvm_read_guest_virt_system,
4215         .write_std           = kvm_write_guest_virt_system,
4216         .fetch               = kvm_fetch_guest_virt,
4217         .read_emulated       = emulator_read_emulated,
4218         .write_emulated      = emulator_write_emulated,
4219         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4220         .pio_in_emulated     = emulator_pio_in_emulated,
4221         .pio_out_emulated    = emulator_pio_out_emulated,
4222         .get_cached_descriptor = emulator_get_cached_descriptor,
4223         .set_cached_descriptor = emulator_set_cached_descriptor,
4224         .get_segment_selector = emulator_get_segment_selector,
4225         .set_segment_selector = emulator_set_segment_selector,
4226         .get_cached_segment_base = emulator_get_cached_segment_base,
4227         .get_gdt             = emulator_get_gdt,
4228         .get_idt             = emulator_get_idt,
4229         .get_cr              = emulator_get_cr,
4230         .set_cr              = emulator_set_cr,
4231         .cpl                 = emulator_get_cpl,
4232         .get_dr              = emulator_get_dr,
4233         .set_dr              = emulator_set_dr,
4234         .set_msr             = kvm_set_msr,
4235         .get_msr             = kvm_get_msr,
4236 };
4237
4238 static void cache_all_regs(struct kvm_vcpu *vcpu)
4239 {
4240         kvm_register_read(vcpu, VCPU_REGS_RAX);
4241         kvm_register_read(vcpu, VCPU_REGS_RSP);
4242         kvm_register_read(vcpu, VCPU_REGS_RIP);
4243         vcpu->arch.regs_dirty = ~0;
4244 }
4245
4246 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4247 {
4248         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4249         /*
4250          * an sti; sti; sequence only disable interrupts for the first
4251          * instruction. So, if the last instruction, be it emulated or
4252          * not, left the system with the INT_STI flag enabled, it
4253          * means that the last instruction is an sti. We should not
4254          * leave the flag on in this case. The same goes for mov ss
4255          */
4256         if (!(int_shadow & mask))
4257                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4258 }
4259
4260 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4261 {
4262         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4263         if (ctxt->exception.vector == PF_VECTOR)
4264                 kvm_propagate_fault(vcpu, &ctxt->exception);
4265         else if (ctxt->exception.error_code_valid)
4266                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4267                                       ctxt->exception.error_code);
4268         else
4269                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4270 }
4271
4272 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4273 {
4274         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4275         int cs_db, cs_l;
4276
4277         cache_all_regs(vcpu);
4278
4279         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4280
4281         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4282         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4283         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4284         vcpu->arch.emulate_ctxt.mode =
4285                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4286                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4287                 ? X86EMUL_MODE_VM86 : cs_l
4288                 ? X86EMUL_MODE_PROT64 : cs_db
4289                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4290         memset(c, 0, sizeof(struct decode_cache));
4291         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4292 }
4293
4294 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4295 {
4296         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4297         int ret;
4298
4299         init_emulate_ctxt(vcpu);
4300
4301         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4302         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4303         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4304         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4305
4306         if (ret != X86EMUL_CONTINUE)
4307                 return EMULATE_FAIL;
4308
4309         vcpu->arch.emulate_ctxt.eip = c->eip;
4310         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4311         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4312         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4313
4314         if (irq == NMI_VECTOR)
4315                 vcpu->arch.nmi_pending = false;
4316         else
4317                 vcpu->arch.interrupt.pending = false;
4318
4319         return EMULATE_DONE;
4320 }
4321 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4322
4323 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4324 {
4325         int r = EMULATE_DONE;
4326
4327         ++vcpu->stat.insn_emulation_fail;
4328         trace_kvm_emulate_insn_failed(vcpu);
4329         if (!is_guest_mode(vcpu)) {
4330                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4331                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4332                 vcpu->run->internal.ndata = 0;
4333                 r = EMULATE_FAIL;
4334         }
4335         kvm_queue_exception(vcpu, UD_VECTOR);
4336
4337         return r;
4338 }
4339
4340 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4341 {
4342         gpa_t gpa;
4343
4344         if (tdp_enabled)
4345                 return false;
4346
4347         /*
4348          * if emulation was due to access to shadowed page table
4349          * and it failed try to unshadow page and re-entetr the
4350          * guest to let CPU execute the instruction.
4351          */
4352         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4353                 return true;
4354
4355         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4356
4357         if (gpa == UNMAPPED_GVA)
4358                 return true; /* let cpu generate fault */
4359
4360         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4361                 return true;
4362
4363         return false;
4364 }
4365
4366 int emulate_instruction(struct kvm_vcpu *vcpu,
4367                         unsigned long cr2,
4368                         u16 error_code,
4369                         int emulation_type)
4370 {
4371         int r;
4372         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4373
4374         kvm_clear_exception_queue(vcpu);
4375         vcpu->arch.mmio_fault_cr2 = cr2;
4376         /*
4377          * TODO: fix emulate.c to use guest_read/write_register
4378          * instead of direct ->regs accesses, can save hundred cycles
4379          * on Intel for instructions that don't read/change RSP, for
4380          * for example.
4381          */
4382         cache_all_regs(vcpu);
4383
4384         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4385                 init_emulate_ctxt(vcpu);
4386                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4387                 vcpu->arch.emulate_ctxt.have_exception = false;
4388                 vcpu->arch.emulate_ctxt.perm_ok = false;
4389
4390                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4391                 if (r == X86EMUL_PROPAGATE_FAULT)
4392                         goto done;
4393
4394                 trace_kvm_emulate_insn_start(vcpu);
4395
4396                 /* Only allow emulation of specific instructions on #UD
4397                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4398                 if (emulation_type & EMULTYPE_TRAP_UD) {
4399                         if (!c->twobyte)
4400                                 return EMULATE_FAIL;
4401                         switch (c->b) {
4402                         case 0x01: /* VMMCALL */
4403                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4404                                         return EMULATE_FAIL;
4405                                 break;
4406                         case 0x34: /* sysenter */
4407                         case 0x35: /* sysexit */
4408                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4409                                         return EMULATE_FAIL;
4410                                 break;
4411                         case 0x05: /* syscall */
4412                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4413                                         return EMULATE_FAIL;
4414                                 break;
4415                         default:
4416                                 return EMULATE_FAIL;
4417                         }
4418
4419                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4420                                 return EMULATE_FAIL;
4421                 }
4422
4423                 ++vcpu->stat.insn_emulation;
4424                 if (r)  {
4425                         if (reexecute_instruction(vcpu, cr2))
4426                                 return EMULATE_DONE;
4427                         if (emulation_type & EMULTYPE_SKIP)
4428                                 return EMULATE_FAIL;
4429                         return handle_emulation_failure(vcpu);
4430                 }
4431         }
4432
4433         if (emulation_type & EMULTYPE_SKIP) {
4434                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4435                 return EMULATE_DONE;
4436         }
4437
4438         /* this is needed for vmware backdor interface to work since it
4439            changes registers values  during IO operation */
4440         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4441
4442 restart:
4443         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4444
4445         if (r == EMULATION_FAILED) {
4446                 if (reexecute_instruction(vcpu, cr2))
4447                         return EMULATE_DONE;
4448
4449                 return handle_emulation_failure(vcpu);
4450         }
4451
4452 done:
4453         if (vcpu->arch.emulate_ctxt.have_exception) {
4454                 inject_emulated_exception(vcpu);
4455                 r = EMULATE_DONE;
4456         } else if (vcpu->arch.pio.count) {
4457                 if (!vcpu->arch.pio.in)
4458                         vcpu->arch.pio.count = 0;
4459                 r = EMULATE_DO_MMIO;
4460         } else if (vcpu->mmio_needed) {
4461                 if (vcpu->mmio_is_write)
4462                         vcpu->mmio_needed = 0;
4463                 r = EMULATE_DO_MMIO;
4464         } else if (r == EMULATION_RESTART)
4465                 goto restart;
4466         else
4467                 r = EMULATE_DONE;
4468
4469         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4470         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4471         kvm_make_request(KVM_REQ_EVENT, vcpu);
4472         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4473         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4474
4475         return r;
4476 }
4477 EXPORT_SYMBOL_GPL(emulate_instruction);
4478
4479 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4480 {
4481         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4482         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4483         /* do not return to emulator after return from userspace */
4484         vcpu->arch.pio.count = 0;
4485         return ret;
4486 }
4487 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4488
4489 static void tsc_bad(void *info)
4490 {
4491         __get_cpu_var(cpu_tsc_khz) = 0;
4492 }
4493
4494 static void tsc_khz_changed(void *data)
4495 {
4496         struct cpufreq_freqs *freq = data;
4497         unsigned long khz = 0;
4498
4499         if (data)
4500                 khz = freq->new;
4501         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4502                 khz = cpufreq_quick_get(raw_smp_processor_id());
4503         if (!khz)
4504                 khz = tsc_khz;
4505         __get_cpu_var(cpu_tsc_khz) = khz;
4506 }
4507
4508 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4509                                      void *data)
4510 {
4511         struct cpufreq_freqs *freq = data;
4512         struct kvm *kvm;
4513         struct kvm_vcpu *vcpu;
4514         int i, send_ipi = 0;
4515
4516         /*
4517          * We allow guests to temporarily run on slowing clocks,
4518          * provided we notify them after, or to run on accelerating
4519          * clocks, provided we notify them before.  Thus time never
4520          * goes backwards.
4521          *
4522          * However, we have a problem.  We can't atomically update
4523          * the frequency of a given CPU from this function; it is
4524          * merely a notifier, which can be called from any CPU.
4525          * Changing the TSC frequency at arbitrary points in time
4526          * requires a recomputation of local variables related to
4527          * the TSC for each VCPU.  We must flag these local variables
4528          * to be updated and be sure the update takes place with the
4529          * new frequency before any guests proceed.
4530          *
4531          * Unfortunately, the combination of hotplug CPU and frequency
4532          * change creates an intractable locking scenario; the order
4533          * of when these callouts happen is undefined with respect to
4534          * CPU hotplug, and they can race with each other.  As such,
4535          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4536          * undefined; you can actually have a CPU frequency change take
4537          * place in between the computation of X and the setting of the
4538          * variable.  To protect against this problem, all updates of
4539          * the per_cpu tsc_khz variable are done in an interrupt
4540          * protected IPI, and all callers wishing to update the value
4541          * must wait for a synchronous IPI to complete (which is trivial
4542          * if the caller is on the CPU already).  This establishes the
4543          * necessary total order on variable updates.
4544          *
4545          * Note that because a guest time update may take place
4546          * anytime after the setting of the VCPU's request bit, the
4547          * correct TSC value must be set before the request.  However,
4548          * to ensure the update actually makes it to any guest which
4549          * starts running in hardware virtualization between the set
4550          * and the acquisition of the spinlock, we must also ping the
4551          * CPU after setting the request bit.
4552          *
4553          */
4554
4555         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4556                 return 0;
4557         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4558                 return 0;
4559
4560         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4561
4562         spin_lock(&kvm_lock);
4563         list_for_each_entry(kvm, &vm_list, vm_list) {
4564                 kvm_for_each_vcpu(i, vcpu, kvm) {
4565                         if (vcpu->cpu != freq->cpu)
4566                                 continue;
4567                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4568                         if (vcpu->cpu != smp_processor_id())
4569                                 send_ipi = 1;
4570                 }
4571         }
4572         spin_unlock(&kvm_lock);
4573
4574         if (freq->old < freq->new && send_ipi) {
4575                 /*
4576                  * We upscale the frequency.  Must make the guest
4577                  * doesn't see old kvmclock values while running with
4578                  * the new frequency, otherwise we risk the guest sees
4579                  * time go backwards.
4580                  *
4581                  * In case we update the frequency for another cpu
4582                  * (which might be in guest context) send an interrupt
4583                  * to kick the cpu out of guest context.  Next time
4584                  * guest context is entered kvmclock will be updated,
4585                  * so the guest will not see stale values.
4586                  */
4587                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4588         }
4589         return 0;
4590 }
4591
4592 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4593         .notifier_call  = kvmclock_cpufreq_notifier
4594 };
4595
4596 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4597                                         unsigned long action, void *hcpu)
4598 {
4599         unsigned int cpu = (unsigned long)hcpu;
4600
4601         switch (action) {
4602                 case CPU_ONLINE:
4603                 case CPU_DOWN_FAILED:
4604                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4605                         break;
4606                 case CPU_DOWN_PREPARE:
4607                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4608                         break;
4609         }
4610         return NOTIFY_OK;
4611 }
4612
4613 static struct notifier_block kvmclock_cpu_notifier_block = {
4614         .notifier_call  = kvmclock_cpu_notifier,
4615         .priority = -INT_MAX
4616 };
4617
4618 static void kvm_timer_init(void)
4619 {
4620         int cpu;
4621
4622         max_tsc_khz = tsc_khz;
4623         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4624         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4625 #ifdef CONFIG_CPU_FREQ
4626                 struct cpufreq_policy policy;
4627                 memset(&policy, 0, sizeof(policy));
4628                 cpu = get_cpu();
4629                 cpufreq_get_policy(&policy, cpu);
4630                 if (policy.cpuinfo.max_freq)
4631                         max_tsc_khz = policy.cpuinfo.max_freq;
4632                 put_cpu();
4633 #endif
4634                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4635                                           CPUFREQ_TRANSITION_NOTIFIER);
4636         }
4637         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4638         for_each_online_cpu(cpu)
4639                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4640 }
4641
4642 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4643
4644 static int kvm_is_in_guest(void)
4645 {
4646         return percpu_read(current_vcpu) != NULL;
4647 }
4648
4649 static int kvm_is_user_mode(void)
4650 {
4651         int user_mode = 3;
4652
4653         if (percpu_read(current_vcpu))
4654                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4655
4656         return user_mode != 0;
4657 }
4658
4659 static unsigned long kvm_get_guest_ip(void)
4660 {
4661         unsigned long ip = 0;
4662
4663         if (percpu_read(current_vcpu))
4664                 ip = kvm_rip_read(percpu_read(current_vcpu));
4665
4666         return ip;
4667 }
4668
4669 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4670         .is_in_guest            = kvm_is_in_guest,
4671         .is_user_mode           = kvm_is_user_mode,
4672         .get_guest_ip           = kvm_get_guest_ip,
4673 };
4674
4675 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4676 {
4677         percpu_write(current_vcpu, vcpu);
4678 }
4679 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4680
4681 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4682 {
4683         percpu_write(current_vcpu, NULL);
4684 }
4685 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4686
4687 int kvm_arch_init(void *opaque)
4688 {
4689         int r;
4690         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4691
4692         if (kvm_x86_ops) {
4693                 printk(KERN_ERR "kvm: already loaded the other module\n");
4694                 r = -EEXIST;
4695                 goto out;
4696         }
4697
4698         if (!ops->cpu_has_kvm_support()) {
4699                 printk(KERN_ERR "kvm: no hardware support\n");
4700                 r = -EOPNOTSUPP;
4701                 goto out;
4702         }
4703         if (ops->disabled_by_bios()) {
4704                 printk(KERN_ERR "kvm: disabled by bios\n");
4705                 r = -EOPNOTSUPP;
4706                 goto out;
4707         }
4708
4709         r = kvm_mmu_module_init();
4710         if (r)
4711                 goto out;
4712
4713         kvm_init_msr_list();
4714
4715         kvm_x86_ops = ops;
4716         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4717         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4718                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4719
4720         kvm_timer_init();
4721
4722         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4723
4724         if (cpu_has_xsave)
4725                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4726
4727         return 0;
4728
4729 out:
4730         return r;
4731 }
4732
4733 void kvm_arch_exit(void)
4734 {
4735         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4736
4737         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4738                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4739                                             CPUFREQ_TRANSITION_NOTIFIER);
4740         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4741         kvm_x86_ops = NULL;
4742         kvm_mmu_module_exit();
4743 }
4744
4745 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4746 {
4747         ++vcpu->stat.halt_exits;
4748         if (irqchip_in_kernel(vcpu->kvm)) {
4749                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4750                 return 1;
4751         } else {
4752                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4753                 return 0;
4754         }
4755 }
4756 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4757
4758 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4759                            unsigned long a1)
4760 {
4761         if (is_long_mode(vcpu))
4762                 return a0;
4763         else
4764                 return a0 | ((gpa_t)a1 << 32);
4765 }
4766
4767 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4768 {
4769         u64 param, ingpa, outgpa, ret;
4770         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4771         bool fast, longmode;
4772         int cs_db, cs_l;
4773
4774         /*
4775          * hypercall generates UD from non zero cpl and real mode
4776          * per HYPER-V spec
4777          */
4778         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4779                 kvm_queue_exception(vcpu, UD_VECTOR);
4780                 return 0;
4781         }
4782
4783         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4784         longmode = is_long_mode(vcpu) && cs_l == 1;
4785
4786         if (!longmode) {
4787                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4788                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4789                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4790                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4791                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4792                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4793         }
4794 #ifdef CONFIG_X86_64
4795         else {
4796                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4797                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4798                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4799         }
4800 #endif
4801
4802         code = param & 0xffff;
4803         fast = (param >> 16) & 0x1;
4804         rep_cnt = (param >> 32) & 0xfff;
4805         rep_idx = (param >> 48) & 0xfff;
4806
4807         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4808
4809         switch (code) {
4810         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4811                 kvm_vcpu_on_spin(vcpu);
4812                 break;
4813         default:
4814                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4815                 break;
4816         }
4817
4818         ret = res | (((u64)rep_done & 0xfff) << 32);
4819         if (longmode) {
4820                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4821         } else {
4822                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4823                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4824         }
4825
4826         return 1;
4827 }
4828
4829 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4830 {
4831         unsigned long nr, a0, a1, a2, a3, ret;
4832         int r = 1;
4833
4834         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4835                 return kvm_hv_hypercall(vcpu);
4836
4837         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4838         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4839         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4840         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4841         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4842
4843         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4844
4845         if (!is_long_mode(vcpu)) {
4846                 nr &= 0xFFFFFFFF;
4847                 a0 &= 0xFFFFFFFF;
4848                 a1 &= 0xFFFFFFFF;
4849                 a2 &= 0xFFFFFFFF;
4850                 a3 &= 0xFFFFFFFF;
4851         }
4852
4853         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4854                 ret = -KVM_EPERM;
4855                 goto out;
4856         }
4857
4858         switch (nr) {
4859         case KVM_HC_VAPIC_POLL_IRQ:
4860                 ret = 0;
4861                 break;
4862         case KVM_HC_MMU_OP:
4863                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4864                 break;
4865         default:
4866                 ret = -KVM_ENOSYS;
4867                 break;
4868         }
4869 out:
4870         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4871         ++vcpu->stat.hypercalls;
4872         return r;
4873 }
4874 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4875
4876 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4877 {
4878         char instruction[3];
4879         unsigned long rip = kvm_rip_read(vcpu);
4880
4881         /*
4882          * Blow out the MMU to ensure that no other VCPU has an active mapping
4883          * to ensure that the updated hypercall appears atomically across all
4884          * VCPUs.
4885          */
4886         kvm_mmu_zap_all(vcpu->kvm);
4887
4888         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4889
4890         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4891 }
4892
4893 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4894 {
4895         struct desc_ptr dt = { limit, base };
4896
4897         kvm_x86_ops->set_gdt(vcpu, &dt);
4898 }
4899
4900 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4901 {
4902         struct desc_ptr dt = { limit, base };
4903
4904         kvm_x86_ops->set_idt(vcpu, &dt);
4905 }
4906
4907 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4908 {
4909         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4910         int j, nent = vcpu->arch.cpuid_nent;
4911
4912         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4913         /* when no next entry is found, the current entry[i] is reselected */
4914         for (j = i + 1; ; j = (j + 1) % nent) {
4915                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4916                 if (ej->function == e->function) {
4917                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4918                         return j;
4919                 }
4920         }
4921         return 0; /* silence gcc, even though control never reaches here */
4922 }
4923
4924 /* find an entry with matching function, matching index (if needed), and that
4925  * should be read next (if it's stateful) */
4926 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4927         u32 function, u32 index)
4928 {
4929         if (e->function != function)
4930                 return 0;
4931         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4932                 return 0;
4933         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4934             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4935                 return 0;
4936         return 1;
4937 }
4938
4939 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4940                                               u32 function, u32 index)
4941 {
4942         int i;
4943         struct kvm_cpuid_entry2 *best = NULL;
4944
4945         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4946                 struct kvm_cpuid_entry2 *e;
4947
4948                 e = &vcpu->arch.cpuid_entries[i];
4949                 if (is_matching_cpuid_entry(e, function, index)) {
4950                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4951                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4952                         best = e;
4953                         break;
4954                 }
4955                 /*
4956                  * Both basic or both extended?
4957                  */
4958                 if (((e->function ^ function) & 0x80000000) == 0)
4959                         if (!best || e->function > best->function)
4960                                 best = e;
4961         }
4962         return best;
4963 }
4964 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4965
4966 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4967 {
4968         struct kvm_cpuid_entry2 *best;
4969
4970         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4971         if (!best || best->eax < 0x80000008)
4972                 goto not_found;
4973         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4974         if (best)
4975                 return best->eax & 0xff;
4976 not_found:
4977         return 36;
4978 }
4979
4980 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4981 {
4982         u32 function, index;
4983         struct kvm_cpuid_entry2 *best;
4984
4985         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4986         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4987         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4988         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4989         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4990         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4991         best = kvm_find_cpuid_entry(vcpu, function, index);
4992         if (best) {
4993                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4994                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4995                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4996                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4997         }
4998         kvm_x86_ops->skip_emulated_instruction(vcpu);
4999         trace_kvm_cpuid(function,
5000                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5001                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5002                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5003                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5004 }
5005 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5006
5007 /*
5008  * Check if userspace requested an interrupt window, and that the
5009  * interrupt window is open.
5010  *
5011  * No need to exit to userspace if we already have an interrupt queued.
5012  */
5013 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5014 {
5015         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5016                 vcpu->run->request_interrupt_window &&
5017                 kvm_arch_interrupt_allowed(vcpu));
5018 }
5019
5020 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5021 {
5022         struct kvm_run *kvm_run = vcpu->run;
5023
5024         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5025         kvm_run->cr8 = kvm_get_cr8(vcpu);
5026         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5027         if (irqchip_in_kernel(vcpu->kvm))
5028                 kvm_run->ready_for_interrupt_injection = 1;
5029         else
5030                 kvm_run->ready_for_interrupt_injection =
5031                         kvm_arch_interrupt_allowed(vcpu) &&
5032                         !kvm_cpu_has_interrupt(vcpu) &&
5033                         !kvm_event_needs_reinjection(vcpu);
5034 }
5035
5036 static void vapic_enter(struct kvm_vcpu *vcpu)
5037 {
5038         struct kvm_lapic *apic = vcpu->arch.apic;
5039         struct page *page;
5040
5041         if (!apic || !apic->vapic_addr)
5042                 return;
5043
5044         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5045
5046         vcpu->arch.apic->vapic_page = page;
5047 }
5048
5049 static void vapic_exit(struct kvm_vcpu *vcpu)
5050 {
5051         struct kvm_lapic *apic = vcpu->arch.apic;
5052         int idx;
5053
5054         if (!apic || !apic->vapic_addr)
5055                 return;
5056
5057         idx = srcu_read_lock(&vcpu->kvm->srcu);
5058         kvm_release_page_dirty(apic->vapic_page);
5059         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5060         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5061 }
5062
5063 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5064 {
5065         int max_irr, tpr;
5066
5067         if (!kvm_x86_ops->update_cr8_intercept)
5068                 return;
5069
5070         if (!vcpu->arch.apic)
5071                 return;
5072
5073         if (!vcpu->arch.apic->vapic_addr)
5074                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5075         else
5076                 max_irr = -1;
5077
5078         if (max_irr != -1)
5079                 max_irr >>= 4;
5080
5081         tpr = kvm_lapic_get_cr8(vcpu);
5082
5083         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5084 }
5085
5086 static void inject_pending_event(struct kvm_vcpu *vcpu)
5087 {
5088         /* try to reinject previous events if any */
5089         if (vcpu->arch.exception.pending) {
5090                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5091                                         vcpu->arch.exception.has_error_code,
5092                                         vcpu->arch.exception.error_code);
5093                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5094                                           vcpu->arch.exception.has_error_code,
5095                                           vcpu->arch.exception.error_code,
5096                                           vcpu->arch.exception.reinject);
5097                 return;
5098         }
5099
5100         if (vcpu->arch.nmi_injected) {
5101                 kvm_x86_ops->set_nmi(vcpu);
5102                 return;
5103         }
5104
5105         if (vcpu->arch.interrupt.pending) {
5106                 kvm_x86_ops->set_irq(vcpu);
5107                 return;
5108         }
5109
5110         /* try to inject new event if pending */
5111         if (vcpu->arch.nmi_pending) {
5112                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5113                         vcpu->arch.nmi_pending = false;
5114                         vcpu->arch.nmi_injected = true;
5115                         kvm_x86_ops->set_nmi(vcpu);
5116                 }
5117         } else if (kvm_cpu_has_interrupt(vcpu)) {
5118                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5119                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5120                                             false);
5121                         kvm_x86_ops->set_irq(vcpu);
5122                 }
5123         }
5124 }
5125
5126 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5127 {
5128         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5129                         !vcpu->guest_xcr0_loaded) {
5130                 /* kvm_set_xcr() also depends on this */
5131                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5132                 vcpu->guest_xcr0_loaded = 1;
5133         }
5134 }
5135
5136 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5137 {
5138         if (vcpu->guest_xcr0_loaded) {
5139                 if (vcpu->arch.xcr0 != host_xcr0)
5140                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5141                 vcpu->guest_xcr0_loaded = 0;
5142         }
5143 }
5144
5145 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5146 {
5147         int r;
5148         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5149                 vcpu->run->request_interrupt_window;
5150
5151         if (vcpu->requests) {
5152                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5153                         kvm_mmu_unload(vcpu);
5154                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5155                         __kvm_migrate_timers(vcpu);
5156                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5157                         r = kvm_guest_time_update(vcpu);
5158                         if (unlikely(r))
5159                                 goto out;
5160                 }
5161                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5162                         kvm_mmu_sync_roots(vcpu);
5163                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5164                         kvm_x86_ops->tlb_flush(vcpu);
5165                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5166                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5167                         r = 0;
5168                         goto out;
5169                 }
5170                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5171                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5172                         r = 0;
5173                         goto out;
5174                 }
5175                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5176                         vcpu->fpu_active = 0;
5177                         kvm_x86_ops->fpu_deactivate(vcpu);
5178                 }
5179                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5180                         /* Page is swapped out. Do synthetic halt */
5181                         vcpu->arch.apf.halted = true;
5182                         r = 1;
5183                         goto out;
5184                 }
5185         }
5186
5187         r = kvm_mmu_reload(vcpu);
5188         if (unlikely(r))
5189                 goto out;
5190
5191         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5192                 inject_pending_event(vcpu);
5193
5194                 /* enable NMI/IRQ window open exits if needed */
5195                 if (vcpu->arch.nmi_pending)
5196                         kvm_x86_ops->enable_nmi_window(vcpu);
5197                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5198                         kvm_x86_ops->enable_irq_window(vcpu);
5199
5200                 if (kvm_lapic_enabled(vcpu)) {
5201                         update_cr8_intercept(vcpu);
5202                         kvm_lapic_sync_to_vapic(vcpu);
5203                 }
5204         }
5205
5206         preempt_disable();
5207
5208         kvm_x86_ops->prepare_guest_switch(vcpu);
5209         if (vcpu->fpu_active)
5210                 kvm_load_guest_fpu(vcpu);
5211         kvm_load_guest_xcr0(vcpu);
5212
5213         atomic_set(&vcpu->guest_mode, 1);
5214         smp_wmb();
5215
5216         local_irq_disable();
5217
5218         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5219             || need_resched() || signal_pending(current)) {
5220                 atomic_set(&vcpu->guest_mode, 0);
5221                 smp_wmb();
5222                 local_irq_enable();
5223                 preempt_enable();
5224                 kvm_x86_ops->cancel_injection(vcpu);
5225                 r = 1;
5226                 goto out;
5227         }
5228
5229         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5230
5231         kvm_guest_enter();
5232
5233         if (unlikely(vcpu->arch.switch_db_regs)) {
5234                 set_debugreg(0, 7);
5235                 set_debugreg(vcpu->arch.eff_db[0], 0);
5236                 set_debugreg(vcpu->arch.eff_db[1], 1);
5237                 set_debugreg(vcpu->arch.eff_db[2], 2);
5238                 set_debugreg(vcpu->arch.eff_db[3], 3);
5239         }
5240
5241         trace_kvm_entry(vcpu->vcpu_id);
5242         kvm_x86_ops->run(vcpu);
5243
5244         /*
5245          * If the guest has used debug registers, at least dr7
5246          * will be disabled while returning to the host.
5247          * If we don't have active breakpoints in the host, we don't
5248          * care about the messed up debug address registers. But if
5249          * we have some of them active, restore the old state.
5250          */
5251         if (hw_breakpoint_active())
5252                 hw_breakpoint_restore();
5253
5254         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5255
5256         atomic_set(&vcpu->guest_mode, 0);
5257         smp_wmb();
5258         local_irq_enable();
5259
5260         ++vcpu->stat.exits;
5261
5262         /*
5263          * We must have an instruction between local_irq_enable() and
5264          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5265          * the interrupt shadow.  The stat.exits increment will do nicely.
5266          * But we need to prevent reordering, hence this barrier():
5267          */
5268         barrier();
5269
5270         kvm_guest_exit();
5271
5272         preempt_enable();
5273
5274         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5275
5276         /*
5277          * Profile KVM exit RIPs:
5278          */
5279         if (unlikely(prof_on == KVM_PROFILING)) {
5280                 unsigned long rip = kvm_rip_read(vcpu);
5281                 profile_hit(KVM_PROFILING, (void *)rip);
5282         }
5283
5284
5285         kvm_lapic_sync_from_vapic(vcpu);
5286
5287         r = kvm_x86_ops->handle_exit(vcpu);
5288 out:
5289         return r;
5290 }
5291
5292
5293 static int __vcpu_run(struct kvm_vcpu *vcpu)
5294 {
5295         int r;
5296         struct kvm *kvm = vcpu->kvm;
5297
5298         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5299                 pr_debug("vcpu %d received sipi with vector # %x\n",
5300                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5301                 kvm_lapic_reset(vcpu);
5302                 r = kvm_arch_vcpu_reset(vcpu);
5303                 if (r)
5304                         return r;
5305                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5306         }
5307
5308         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5309         vapic_enter(vcpu);
5310
5311         r = 1;
5312         while (r > 0) {
5313                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5314                     !vcpu->arch.apf.halted)
5315                         r = vcpu_enter_guest(vcpu);
5316                 else {
5317                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5318                         kvm_vcpu_block(vcpu);
5319                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5320                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5321                         {
5322                                 switch(vcpu->arch.mp_state) {
5323                                 case KVM_MP_STATE_HALTED:
5324                                         vcpu->arch.mp_state =
5325                                                 KVM_MP_STATE_RUNNABLE;
5326                                 case KVM_MP_STATE_RUNNABLE:
5327                                         vcpu->arch.apf.halted = false;
5328                                         break;
5329                                 case KVM_MP_STATE_SIPI_RECEIVED:
5330                                 default:
5331                                         r = -EINTR;
5332                                         break;
5333                                 }
5334                         }
5335                 }
5336
5337                 if (r <= 0)
5338                         break;
5339
5340                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5341                 if (kvm_cpu_has_pending_timer(vcpu))
5342                         kvm_inject_pending_timer_irqs(vcpu);
5343
5344                 if (dm_request_for_irq_injection(vcpu)) {
5345                         r = -EINTR;
5346                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5347                         ++vcpu->stat.request_irq_exits;
5348                 }
5349
5350                 kvm_check_async_pf_completion(vcpu);
5351
5352                 if (signal_pending(current)) {
5353                         r = -EINTR;
5354                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5355                         ++vcpu->stat.signal_exits;
5356                 }
5357                 if (need_resched()) {
5358                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5359                         kvm_resched(vcpu);
5360                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5361                 }
5362         }
5363
5364         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5365
5366         vapic_exit(vcpu);
5367
5368         return r;
5369 }
5370
5371 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5372 {
5373         int r;
5374         sigset_t sigsaved;
5375
5376         if (vcpu->sigset_active)
5377                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5378
5379         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5380                 kvm_vcpu_block(vcpu);
5381                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5382                 r = -EAGAIN;
5383                 goto out;
5384         }
5385
5386         /* re-sync apic's tpr */
5387         if (!irqchip_in_kernel(vcpu->kvm)) {
5388                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5389                         r = -EINVAL;
5390                         goto out;
5391                 }
5392         }
5393
5394         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5395                 if (vcpu->mmio_needed) {
5396                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5397                         vcpu->mmio_read_completed = 1;
5398                         vcpu->mmio_needed = 0;
5399                 }
5400                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5401                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5402                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5403                 if (r != EMULATE_DONE) {
5404                         r = 0;
5405                         goto out;
5406                 }
5407         }
5408         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5409                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5410                                      kvm_run->hypercall.ret);
5411
5412         r = __vcpu_run(vcpu);
5413
5414 out:
5415         post_kvm_run_save(vcpu);
5416         if (vcpu->sigset_active)
5417                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5418
5419         return r;
5420 }
5421
5422 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5423 {
5424         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5425         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5426         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5427         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5428         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5429         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5430         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5431         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5432 #ifdef CONFIG_X86_64
5433         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5434         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5435         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5436         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5437         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5438         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5439         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5440         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5441 #endif
5442
5443         regs->rip = kvm_rip_read(vcpu);
5444         regs->rflags = kvm_get_rflags(vcpu);
5445
5446         return 0;
5447 }
5448
5449 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5450 {
5451         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5452         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5453         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5454         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5455         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5456         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5457         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5458         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5459 #ifdef CONFIG_X86_64
5460         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5461         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5462         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5463         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5464         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5465         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5466         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5467         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5468 #endif
5469
5470         kvm_rip_write(vcpu, regs->rip);
5471         kvm_set_rflags(vcpu, regs->rflags);
5472
5473         vcpu->arch.exception.pending = false;
5474
5475         kvm_make_request(KVM_REQ_EVENT, vcpu);
5476
5477         return 0;
5478 }
5479
5480 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5481 {
5482         struct kvm_segment cs;
5483
5484         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5485         *db = cs.db;
5486         *l = cs.l;
5487 }
5488 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5489
5490 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5491                                   struct kvm_sregs *sregs)
5492 {
5493         struct desc_ptr dt;
5494
5495         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5496         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5497         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5498         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5499         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5500         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5501
5502         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5503         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5504
5505         kvm_x86_ops->get_idt(vcpu, &dt);
5506         sregs->idt.limit = dt.size;
5507         sregs->idt.base = dt.address;
5508         kvm_x86_ops->get_gdt(vcpu, &dt);
5509         sregs->gdt.limit = dt.size;
5510         sregs->gdt.base = dt.address;
5511
5512         sregs->cr0 = kvm_read_cr0(vcpu);
5513         sregs->cr2 = vcpu->arch.cr2;
5514         sregs->cr3 = vcpu->arch.cr3;
5515         sregs->cr4 = kvm_read_cr4(vcpu);
5516         sregs->cr8 = kvm_get_cr8(vcpu);
5517         sregs->efer = vcpu->arch.efer;
5518         sregs->apic_base = kvm_get_apic_base(vcpu);
5519
5520         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5521
5522         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5523                 set_bit(vcpu->arch.interrupt.nr,
5524                         (unsigned long *)sregs->interrupt_bitmap);
5525
5526         return 0;
5527 }
5528
5529 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5530                                     struct kvm_mp_state *mp_state)
5531 {
5532         mp_state->mp_state = vcpu->arch.mp_state;
5533         return 0;
5534 }
5535
5536 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5537                                     struct kvm_mp_state *mp_state)
5538 {
5539         vcpu->arch.mp_state = mp_state->mp_state;
5540         kvm_make_request(KVM_REQ_EVENT, vcpu);
5541         return 0;
5542 }
5543
5544 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5545                     bool has_error_code, u32 error_code)
5546 {
5547         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5548         int ret;
5549
5550         init_emulate_ctxt(vcpu);
5551
5552         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5553                                    tss_selector, reason, has_error_code,
5554                                    error_code);
5555
5556         if (ret)
5557                 return EMULATE_FAIL;
5558
5559         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5560         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5561         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5562         kvm_make_request(KVM_REQ_EVENT, vcpu);
5563         return EMULATE_DONE;
5564 }
5565 EXPORT_SYMBOL_GPL(kvm_task_switch);
5566
5567 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5568                                   struct kvm_sregs *sregs)
5569 {
5570         int mmu_reset_needed = 0;
5571         int pending_vec, max_bits;
5572         struct desc_ptr dt;
5573
5574         dt.size = sregs->idt.limit;
5575         dt.address = sregs->idt.base;
5576         kvm_x86_ops->set_idt(vcpu, &dt);
5577         dt.size = sregs->gdt.limit;
5578         dt.address = sregs->gdt.base;
5579         kvm_x86_ops->set_gdt(vcpu, &dt);
5580
5581         vcpu->arch.cr2 = sregs->cr2;
5582         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5583         vcpu->arch.cr3 = sregs->cr3;
5584
5585         kvm_set_cr8(vcpu, sregs->cr8);
5586
5587         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5588         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5589         kvm_set_apic_base(vcpu, sregs->apic_base);
5590
5591         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5592         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5593         vcpu->arch.cr0 = sregs->cr0;
5594
5595         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5596         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5597         if (sregs->cr4 & X86_CR4_OSXSAVE)
5598                 update_cpuid(vcpu);
5599         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5600                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5601                 mmu_reset_needed = 1;
5602         }
5603
5604         if (mmu_reset_needed)
5605                 kvm_mmu_reset_context(vcpu);
5606
5607         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5608         pending_vec = find_first_bit(
5609                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5610         if (pending_vec < max_bits) {
5611                 kvm_queue_interrupt(vcpu, pending_vec, false);
5612                 pr_debug("Set back pending irq %d\n", pending_vec);
5613                 if (irqchip_in_kernel(vcpu->kvm))
5614                         kvm_pic_clear_isr_ack(vcpu->kvm);
5615         }
5616
5617         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5618         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5619         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5620         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5621         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5622         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5623
5624         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5625         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5626
5627         update_cr8_intercept(vcpu);
5628
5629         /* Older userspace won't unhalt the vcpu on reset. */
5630         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5631             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5632             !is_protmode(vcpu))
5633                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5634
5635         kvm_make_request(KVM_REQ_EVENT, vcpu);
5636
5637         return 0;
5638 }
5639
5640 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5641                                         struct kvm_guest_debug *dbg)
5642 {
5643         unsigned long rflags;
5644         int i, r;
5645
5646         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5647                 r = -EBUSY;
5648                 if (vcpu->arch.exception.pending)
5649                         goto out;
5650                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5651                         kvm_queue_exception(vcpu, DB_VECTOR);
5652                 else
5653                         kvm_queue_exception(vcpu, BP_VECTOR);
5654         }
5655
5656         /*
5657          * Read rflags as long as potentially injected trace flags are still
5658          * filtered out.
5659          */
5660         rflags = kvm_get_rflags(vcpu);
5661
5662         vcpu->guest_debug = dbg->control;
5663         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5664                 vcpu->guest_debug = 0;
5665
5666         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5667                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5668                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5669                 vcpu->arch.switch_db_regs =
5670                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5671         } else {
5672                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5673                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5674                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5675         }
5676
5677         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5678                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5679                         get_segment_base(vcpu, VCPU_SREG_CS);
5680
5681         /*
5682          * Trigger an rflags update that will inject or remove the trace
5683          * flags.
5684          */
5685         kvm_set_rflags(vcpu, rflags);
5686
5687         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5688
5689         r = 0;
5690
5691 out:
5692
5693         return r;
5694 }
5695
5696 /*
5697  * Translate a guest virtual address to a guest physical address.
5698  */
5699 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5700                                     struct kvm_translation *tr)
5701 {
5702         unsigned long vaddr = tr->linear_address;
5703         gpa_t gpa;
5704         int idx;
5705
5706         idx = srcu_read_lock(&vcpu->kvm->srcu);
5707         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5708         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5709         tr->physical_address = gpa;
5710         tr->valid = gpa != UNMAPPED_GVA;
5711         tr->writeable = 1;
5712         tr->usermode = 0;
5713
5714         return 0;
5715 }
5716
5717 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5718 {
5719         struct i387_fxsave_struct *fxsave =
5720                         &vcpu->arch.guest_fpu.state->fxsave;
5721
5722         memcpy(fpu->fpr, fxsave->st_space, 128);
5723         fpu->fcw = fxsave->cwd;
5724         fpu->fsw = fxsave->swd;
5725         fpu->ftwx = fxsave->twd;
5726         fpu->last_opcode = fxsave->fop;
5727         fpu->last_ip = fxsave->rip;
5728         fpu->last_dp = fxsave->rdp;
5729         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5730
5731         return 0;
5732 }
5733
5734 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5735 {
5736         struct i387_fxsave_struct *fxsave =
5737                         &vcpu->arch.guest_fpu.state->fxsave;
5738
5739         memcpy(fxsave->st_space, fpu->fpr, 128);
5740         fxsave->cwd = fpu->fcw;
5741         fxsave->swd = fpu->fsw;
5742         fxsave->twd = fpu->ftwx;
5743         fxsave->fop = fpu->last_opcode;
5744         fxsave->rip = fpu->last_ip;
5745         fxsave->rdp = fpu->last_dp;
5746         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5747
5748         return 0;
5749 }
5750
5751 int fx_init(struct kvm_vcpu *vcpu)
5752 {
5753         int err;
5754
5755         err = fpu_alloc(&vcpu->arch.guest_fpu);
5756         if (err)
5757                 return err;
5758
5759         fpu_finit(&vcpu->arch.guest_fpu);
5760
5761         /*
5762          * Ensure guest xcr0 is valid for loading
5763          */
5764         vcpu->arch.xcr0 = XSTATE_FP;
5765
5766         vcpu->arch.cr0 |= X86_CR0_ET;
5767
5768         return 0;
5769 }
5770 EXPORT_SYMBOL_GPL(fx_init);
5771
5772 static void fx_free(struct kvm_vcpu *vcpu)
5773 {
5774         fpu_free(&vcpu->arch.guest_fpu);
5775 }
5776
5777 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5778 {
5779         if (vcpu->guest_fpu_loaded)
5780                 return;
5781
5782         /*
5783          * Restore all possible states in the guest,
5784          * and assume host would use all available bits.
5785          * Guest xcr0 would be loaded later.
5786          */
5787         kvm_put_guest_xcr0(vcpu);
5788         vcpu->guest_fpu_loaded = 1;
5789         unlazy_fpu(current);
5790         fpu_restore_checking(&vcpu->arch.guest_fpu);
5791         trace_kvm_fpu(1);
5792 }
5793
5794 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5795 {
5796         kvm_put_guest_xcr0(vcpu);
5797
5798         if (!vcpu->guest_fpu_loaded)
5799                 return;
5800
5801         vcpu->guest_fpu_loaded = 0;
5802         fpu_save_init(&vcpu->arch.guest_fpu);
5803         ++vcpu->stat.fpu_reload;
5804         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5805         trace_kvm_fpu(0);
5806 }
5807
5808 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5809 {
5810         if (vcpu->arch.time_page) {
5811                 kvm_release_page_dirty(vcpu->arch.time_page);
5812                 vcpu->arch.time_page = NULL;
5813         }
5814
5815         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5816         fx_free(vcpu);
5817         kvm_x86_ops->vcpu_free(vcpu);
5818 }
5819
5820 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5821                                                 unsigned int id)
5822 {
5823         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5824                 printk_once(KERN_WARNING
5825                 "kvm: SMP vm created on host with unstable TSC; "
5826                 "guest TSC will not be reliable\n");
5827         return kvm_x86_ops->vcpu_create(kvm, id);
5828 }
5829
5830 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5831 {
5832         int r;
5833
5834         vcpu->arch.mtrr_state.have_fixed = 1;
5835         vcpu_load(vcpu);
5836         r = kvm_arch_vcpu_reset(vcpu);
5837         if (r == 0)
5838                 r = kvm_mmu_setup(vcpu);
5839         vcpu_put(vcpu);
5840         if (r < 0)
5841                 goto free_vcpu;
5842
5843         return 0;
5844 free_vcpu:
5845         kvm_x86_ops->vcpu_free(vcpu);
5846         return r;
5847 }
5848
5849 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5850 {
5851         vcpu->arch.apf.msr_val = 0;
5852
5853         vcpu_load(vcpu);
5854         kvm_mmu_unload(vcpu);
5855         vcpu_put(vcpu);
5856
5857         fx_free(vcpu);
5858         kvm_x86_ops->vcpu_free(vcpu);
5859 }
5860
5861 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5862 {
5863         vcpu->arch.nmi_pending = false;
5864         vcpu->arch.nmi_injected = false;
5865
5866         vcpu->arch.switch_db_regs = 0;
5867         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5868         vcpu->arch.dr6 = DR6_FIXED_1;
5869         vcpu->arch.dr7 = DR7_FIXED_1;
5870
5871         kvm_make_request(KVM_REQ_EVENT, vcpu);
5872         vcpu->arch.apf.msr_val = 0;
5873
5874         kvm_clear_async_pf_completion_queue(vcpu);
5875         kvm_async_pf_hash_reset(vcpu);
5876         vcpu->arch.apf.halted = false;
5877
5878         return kvm_x86_ops->vcpu_reset(vcpu);
5879 }
5880
5881 int kvm_arch_hardware_enable(void *garbage)
5882 {
5883         struct kvm *kvm;
5884         struct kvm_vcpu *vcpu;
5885         int i;
5886
5887         kvm_shared_msr_cpu_online();
5888         list_for_each_entry(kvm, &vm_list, vm_list)
5889                 kvm_for_each_vcpu(i, vcpu, kvm)
5890                         if (vcpu->cpu == smp_processor_id())
5891                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5892         return kvm_x86_ops->hardware_enable(garbage);
5893 }
5894
5895 void kvm_arch_hardware_disable(void *garbage)
5896 {
5897         kvm_x86_ops->hardware_disable(garbage);
5898         drop_user_return_notifiers(garbage);
5899 }
5900
5901 int kvm_arch_hardware_setup(void)
5902 {
5903         return kvm_x86_ops->hardware_setup();
5904 }
5905
5906 void kvm_arch_hardware_unsetup(void)
5907 {
5908         kvm_x86_ops->hardware_unsetup();
5909 }
5910
5911 void kvm_arch_check_processor_compat(void *rtn)
5912 {
5913         kvm_x86_ops->check_processor_compatibility(rtn);
5914 }
5915
5916 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5917 {
5918         struct page *page;
5919         struct kvm *kvm;
5920         int r;
5921
5922         BUG_ON(vcpu->kvm == NULL);
5923         kvm = vcpu->kvm;
5924
5925         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5926         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5927         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5928         vcpu->arch.mmu.translate_gpa = translate_gpa;
5929         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5930         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5931                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5932         else
5933                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5934
5935         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5936         if (!page) {
5937                 r = -ENOMEM;
5938                 goto fail;
5939         }
5940         vcpu->arch.pio_data = page_address(page);
5941
5942         if (!kvm->arch.virtual_tsc_khz)
5943                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5944
5945         r = kvm_mmu_create(vcpu);
5946         if (r < 0)
5947                 goto fail_free_pio_data;
5948
5949         if (irqchip_in_kernel(kvm)) {
5950                 r = kvm_create_lapic(vcpu);
5951                 if (r < 0)
5952                         goto fail_mmu_destroy;
5953         }
5954
5955         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5956                                        GFP_KERNEL);
5957         if (!vcpu->arch.mce_banks) {
5958                 r = -ENOMEM;
5959                 goto fail_free_lapic;
5960         }
5961         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5962
5963         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5964                 goto fail_free_mce_banks;
5965
5966         kvm_async_pf_hash_reset(vcpu);
5967
5968         return 0;
5969 fail_free_mce_banks:
5970         kfree(vcpu->arch.mce_banks);
5971 fail_free_lapic:
5972         kvm_free_lapic(vcpu);
5973 fail_mmu_destroy:
5974         kvm_mmu_destroy(vcpu);
5975 fail_free_pio_data:
5976         free_page((unsigned long)vcpu->arch.pio_data);
5977 fail:
5978         return r;
5979 }
5980
5981 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5982 {
5983         int idx;
5984
5985         kfree(vcpu->arch.mce_banks);
5986         kvm_free_lapic(vcpu);
5987         idx = srcu_read_lock(&vcpu->kvm->srcu);
5988         kvm_mmu_destroy(vcpu);
5989         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5990         free_page((unsigned long)vcpu->arch.pio_data);
5991 }
5992
5993 int kvm_arch_init_vm(struct kvm *kvm)
5994 {
5995         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5996         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5997
5998         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5999         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6000
6001         spin_lock_init(&kvm->arch.tsc_write_lock);
6002
6003         return 0;
6004 }
6005
6006 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6007 {
6008         vcpu_load(vcpu);
6009         kvm_mmu_unload(vcpu);
6010         vcpu_put(vcpu);
6011 }
6012
6013 static void kvm_free_vcpus(struct kvm *kvm)
6014 {
6015         unsigned int i;
6016         struct kvm_vcpu *vcpu;
6017
6018         /*
6019          * Unpin any mmu pages first.
6020          */
6021         kvm_for_each_vcpu(i, vcpu, kvm) {
6022                 kvm_clear_async_pf_completion_queue(vcpu);
6023                 kvm_unload_vcpu_mmu(vcpu);
6024         }
6025         kvm_for_each_vcpu(i, vcpu, kvm)
6026                 kvm_arch_vcpu_free(vcpu);
6027
6028         mutex_lock(&kvm->lock);
6029         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6030                 kvm->vcpus[i] = NULL;
6031
6032         atomic_set(&kvm->online_vcpus, 0);
6033         mutex_unlock(&kvm->lock);
6034 }
6035
6036 void kvm_arch_sync_events(struct kvm *kvm)
6037 {
6038         kvm_free_all_assigned_devices(kvm);
6039         kvm_free_pit(kvm);
6040 }
6041
6042 void kvm_arch_destroy_vm(struct kvm *kvm)
6043 {
6044         kvm_iommu_unmap_guest(kvm);
6045         kfree(kvm->arch.vpic);
6046         kfree(kvm->arch.vioapic);
6047         kvm_free_vcpus(kvm);
6048         if (kvm->arch.apic_access_page)
6049                 put_page(kvm->arch.apic_access_page);
6050         if (kvm->arch.ept_identity_pagetable)
6051                 put_page(kvm->arch.ept_identity_pagetable);
6052 }
6053
6054 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6055                                 struct kvm_memory_slot *memslot,
6056                                 struct kvm_memory_slot old,
6057                                 struct kvm_userspace_memory_region *mem,
6058                                 int user_alloc)
6059 {
6060         int npages = memslot->npages;
6061         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6062
6063         /* Prevent internal slot pages from being moved by fork()/COW. */
6064         if (memslot->id >= KVM_MEMORY_SLOTS)
6065                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6066
6067         /*To keep backward compatibility with older userspace,
6068          *x86 needs to hanlde !user_alloc case.
6069          */
6070         if (!user_alloc) {
6071                 if (npages && !old.rmap) {
6072                         unsigned long userspace_addr;
6073
6074                         down_write(&current->mm->mmap_sem);
6075                         userspace_addr = do_mmap(NULL, 0,
6076                                                  npages * PAGE_SIZE,
6077                                                  PROT_READ | PROT_WRITE,
6078                                                  map_flags,
6079                                                  0);
6080                         up_write(&current->mm->mmap_sem);
6081
6082                         if (IS_ERR((void *)userspace_addr))
6083                                 return PTR_ERR((void *)userspace_addr);
6084
6085                         memslot->userspace_addr = userspace_addr;
6086                 }
6087         }
6088
6089
6090         return 0;
6091 }
6092
6093 void kvm_arch_commit_memory_region(struct kvm *kvm,
6094                                 struct kvm_userspace_memory_region *mem,
6095                                 struct kvm_memory_slot old,
6096                                 int user_alloc)
6097 {
6098
6099         int npages = mem->memory_size >> PAGE_SHIFT;
6100
6101         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6102                 int ret;
6103
6104                 down_write(&current->mm->mmap_sem);
6105                 ret = do_munmap(current->mm, old.userspace_addr,
6106                                 old.npages * PAGE_SIZE);
6107                 up_write(&current->mm->mmap_sem);
6108                 if (ret < 0)
6109                         printk(KERN_WARNING
6110                                "kvm_vm_ioctl_set_memory_region: "
6111                                "failed to munmap memory\n");
6112         }
6113
6114         spin_lock(&kvm->mmu_lock);
6115         if (!kvm->arch.n_requested_mmu_pages) {
6116                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6117                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6118         }
6119
6120         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6121         spin_unlock(&kvm->mmu_lock);
6122 }
6123
6124 void kvm_arch_flush_shadow(struct kvm *kvm)
6125 {
6126         kvm_mmu_zap_all(kvm);
6127         kvm_reload_remote_mmus(kvm);
6128 }
6129
6130 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6131 {
6132         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6133                 !vcpu->arch.apf.halted)
6134                 || !list_empty_careful(&vcpu->async_pf.done)
6135                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6136                 || vcpu->arch.nmi_pending ||
6137                 (kvm_arch_interrupt_allowed(vcpu) &&
6138                  kvm_cpu_has_interrupt(vcpu));
6139 }
6140
6141 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6142 {
6143         int me;
6144         int cpu = vcpu->cpu;
6145
6146         if (waitqueue_active(&vcpu->wq)) {
6147                 wake_up_interruptible(&vcpu->wq);
6148                 ++vcpu->stat.halt_wakeup;
6149         }
6150
6151         me = get_cpu();
6152         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6153                 if (atomic_xchg(&vcpu->guest_mode, 0))
6154                         smp_send_reschedule(cpu);
6155         put_cpu();
6156 }
6157
6158 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6159 {
6160         return kvm_x86_ops->interrupt_allowed(vcpu);
6161 }
6162
6163 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6164 {
6165         unsigned long current_rip = kvm_rip_read(vcpu) +
6166                 get_segment_base(vcpu, VCPU_SREG_CS);
6167
6168         return current_rip == linear_rip;
6169 }
6170 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6171
6172 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6173 {
6174         unsigned long rflags;
6175
6176         rflags = kvm_x86_ops->get_rflags(vcpu);
6177         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6178                 rflags &= ~X86_EFLAGS_TF;
6179         return rflags;
6180 }
6181 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6182
6183 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6184 {
6185         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6186             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6187                 rflags |= X86_EFLAGS_TF;
6188         kvm_x86_ops->set_rflags(vcpu, rflags);
6189         kvm_make_request(KVM_REQ_EVENT, vcpu);
6190 }
6191 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6192
6193 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6194 {
6195         int r;
6196
6197         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6198               is_error_page(work->page))
6199                 return;
6200
6201         r = kvm_mmu_reload(vcpu);
6202         if (unlikely(r))
6203                 return;
6204
6205         if (!vcpu->arch.mmu.direct_map &&
6206               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6207                 return;
6208
6209         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6210 }
6211
6212 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6213 {
6214         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6215 }
6216
6217 static inline u32 kvm_async_pf_next_probe(u32 key)
6218 {
6219         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6220 }
6221
6222 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6223 {
6224         u32 key = kvm_async_pf_hash_fn(gfn);
6225
6226         while (vcpu->arch.apf.gfns[key] != ~0)
6227                 key = kvm_async_pf_next_probe(key);
6228
6229         vcpu->arch.apf.gfns[key] = gfn;
6230 }
6231
6232 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6233 {
6234         int i;
6235         u32 key = kvm_async_pf_hash_fn(gfn);
6236
6237         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6238                      (vcpu->arch.apf.gfns[key] != gfn &&
6239                       vcpu->arch.apf.gfns[key] != ~0); i++)
6240                 key = kvm_async_pf_next_probe(key);
6241
6242         return key;
6243 }
6244
6245 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6246 {
6247         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6248 }
6249
6250 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6251 {
6252         u32 i, j, k;
6253
6254         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6255         while (true) {
6256                 vcpu->arch.apf.gfns[i] = ~0;
6257                 do {
6258                         j = kvm_async_pf_next_probe(j);
6259                         if (vcpu->arch.apf.gfns[j] == ~0)
6260                                 return;
6261                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6262                         /*
6263                          * k lies cyclically in ]i,j]
6264                          * |    i.k.j |
6265                          * |....j i.k.| or  |.k..j i...|
6266                          */
6267                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6268                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6269                 i = j;
6270         }
6271 }
6272
6273 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6274 {
6275
6276         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6277                                       sizeof(val));
6278 }
6279
6280 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6281                                      struct kvm_async_pf *work)
6282 {
6283         struct x86_exception fault;
6284
6285         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6286         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6287
6288         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6289             (vcpu->arch.apf.send_user_only &&
6290              kvm_x86_ops->get_cpl(vcpu) == 0))
6291                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6292         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6293                 fault.vector = PF_VECTOR;
6294                 fault.error_code_valid = true;
6295                 fault.error_code = 0;
6296                 fault.nested_page_fault = false;
6297                 fault.address = work->arch.token;
6298                 kvm_inject_page_fault(vcpu, &fault);
6299         }
6300 }
6301
6302 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6303                                  struct kvm_async_pf *work)
6304 {
6305         struct x86_exception fault;
6306
6307         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6308         if (is_error_page(work->page))
6309                 work->arch.token = ~0; /* broadcast wakeup */
6310         else
6311                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6312
6313         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6314             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6315                 fault.vector = PF_VECTOR;
6316                 fault.error_code_valid = true;
6317                 fault.error_code = 0;
6318                 fault.nested_page_fault = false;
6319                 fault.address = work->arch.token;
6320                 kvm_inject_page_fault(vcpu, &fault);
6321         }
6322         vcpu->arch.apf.halted = false;
6323 }
6324
6325 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6326 {
6327         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6328                 return true;
6329         else
6330                 return !kvm_event_needs_reinjection(vcpu) &&
6331                         kvm_x86_ops->interrupt_allowed(vcpu);
6332 }
6333
6334 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6335 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6336 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6337 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6338 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6339 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6340 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6341 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6342 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6343 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6344 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6345 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);