1 #ifndef _ASM_X86_DESC_H
2 #define _ASM_X86_DESC_H
4 #include <asm/desc_defs.h>
8 #include <linux/mm_types.h>
10 static inline void fill_ldt(struct desc_struct *desc,
11 const struct user_desc *info)
13 desc->limit0 = info->limit & 0x0ffff;
14 desc->base0 = info->base_addr & 0x0000ffff;
16 desc->base1 = (info->base_addr & 0x00ff0000) >> 16;
17 desc->type = (info->read_exec_only ^ 1) << 1;
18 desc->type |= info->contents << 2;
21 desc->p = info->seg_not_present ^ 1;
22 desc->limit = (info->limit & 0xf0000) >> 16;
23 desc->avl = info->useable;
24 desc->d = info->seg_32bit;
25 desc->g = info->limit_in_pages;
26 desc->base2 = (info->base_addr & 0xff000000) >> 24;
28 * Don't allow setting of the lm bit. It is useless anyway
29 * because 64bit system calls require __USER_CS:
34 extern struct desc_ptr idt_descr;
35 extern gate_desc idt_table[];
38 struct desc_struct gdt[GDT_ENTRIES];
39 } __attribute__((aligned(PAGE_SIZE)));
40 DECLARE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page);
42 static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
44 return per_cpu(gdt_page, cpu).gdt;
49 static inline void pack_gate(gate_desc *gate, unsigned type, unsigned long func,
50 unsigned dpl, unsigned ist, unsigned seg)
52 gate->offset_low = PTR_LOW(func);
53 gate->segment = __KERNEL_CS;
60 gate->offset_middle = PTR_MIDDLE(func);
61 gate->offset_high = PTR_HIGH(func);
65 static inline void pack_gate(gate_desc *gate, unsigned char type,
66 unsigned long base, unsigned dpl, unsigned flags,
69 gate->a = (seg << 16) | (base & 0xffff);
70 gate->b = (base & 0xffff0000) |
71 (((0x80 | type | (dpl << 5)) & 0xff) << 8);
76 static inline int desc_empty(const void *ptr)
78 const u32 *desc = ptr;
79 return !(desc[0] | desc[1]);
82 #ifdef CONFIG_PARAVIRT
83 #include <asm/paravirt.h>
85 #define load_TR_desc() native_load_tr_desc()
86 #define load_gdt(dtr) native_load_gdt(dtr)
87 #define load_idt(dtr) native_load_idt(dtr)
88 #define load_tr(tr) asm volatile("ltr %0"::"m" (tr))
89 #define load_ldt(ldt) asm volatile("lldt %0"::"m" (ldt))
91 #define store_gdt(dtr) native_store_gdt(dtr)
92 #define store_idt(dtr) native_store_idt(dtr)
93 #define store_tr(tr) (tr = native_store_tr())
95 #define load_TLS(t, cpu) native_load_tls(t, cpu)
96 #define set_ldt native_set_ldt
98 #define load_user_cs_desc native_load_user_cs_desc
99 #endif /*CONFIG_X86_32*/
101 #define write_ldt_entry(dt, entry, desc) \
102 native_write_ldt_entry(dt, entry, desc)
103 #define write_gdt_entry(dt, entry, desc, type) \
104 native_write_gdt_entry(dt, entry, desc, type)
105 #define write_idt_entry(dt, entry, g) \
106 native_write_idt_entry(dt, entry, g)
108 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
112 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
115 #endif /* CONFIG_PARAVIRT */
117 #define store_ldt(ldt) asm("sldt %0" : "=m"(ldt))
119 static inline void native_write_idt_entry(gate_desc *idt, int entry,
120 const gate_desc *gate)
122 memcpy(&idt[entry], gate, sizeof(*gate));
125 static inline void native_write_ldt_entry(struct desc_struct *ldt, int entry,
128 memcpy(&ldt[entry], desc, 8);
131 static inline void native_write_gdt_entry(struct desc_struct *gdt, int entry,
132 const void *desc, int type)
137 size = sizeof(tss_desc);
140 size = sizeof(ldt_desc);
143 size = sizeof(struct desc_struct);
146 memcpy(&gdt[entry], desc, size);
149 static inline void pack_descriptor(struct desc_struct *desc, unsigned long base,
150 unsigned long limit, unsigned char type,
153 desc->a = ((base & 0xffff) << 16) | (limit & 0xffff);
154 desc->b = (base & 0xff000000) | ((base & 0xff0000) >> 16) |
155 (limit & 0x000f0000) | ((type & 0xff) << 8) |
156 ((flags & 0xf) << 20);
161 static inline void set_tssldt_descriptor(void *d, unsigned long addr,
162 unsigned type, unsigned size)
165 struct ldttss_desc64 *desc = d;
166 memset(desc, 0, sizeof(*desc));
167 desc->limit0 = size & 0xFFFF;
168 desc->base0 = PTR_LOW(addr);
169 desc->base1 = PTR_MIDDLE(addr) & 0xFF;
172 desc->limit1 = (size >> 16) & 0xF;
173 desc->base2 = (PTR_MIDDLE(addr) >> 8) & 0xFF;
174 desc->base3 = PTR_HIGH(addr);
176 pack_descriptor((struct desc_struct *)d, addr, size, 0x80 | type, 0);
180 static inline void __set_tss_desc(unsigned cpu, unsigned int entry, void *addr)
182 struct desc_struct *d = get_cpu_gdt_table(cpu);
186 * sizeof(unsigned long) coming from an extra "long" at the end
187 * of the iobitmap. See tss_struct definition in processor.h
189 * -1? seg base+limit should be pointing to the address of the
192 set_tssldt_descriptor(&tss, (unsigned long)addr, DESC_TSS,
193 IO_BITMAP_OFFSET + IO_BITMAP_BYTES +
194 sizeof(unsigned long) - 1);
195 write_gdt_entry(d, entry, &tss, DESC_TSS);
198 #define set_tss_desc(cpu, addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)
200 static inline void native_set_ldt(const void *addr, unsigned int entries)
202 if (likely(entries == 0))
203 asm volatile("lldt %w0"::"q" (0));
205 unsigned cpu = smp_processor_id();
208 set_tssldt_descriptor(&ldt, (unsigned long)addr, DESC_LDT,
209 entries * LDT_ENTRY_SIZE - 1);
210 write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT,
212 asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8));
216 static inline void native_load_tr_desc(void)
218 asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8));
221 static inline void native_load_gdt(const struct desc_ptr *dtr)
223 asm volatile("lgdt %0"::"m" (*dtr));
226 static inline void native_load_idt(const struct desc_ptr *dtr)
228 asm volatile("lidt %0"::"m" (*dtr));
231 static inline void native_store_gdt(struct desc_ptr *dtr)
233 asm volatile("sgdt %0":"=m" (*dtr));
236 static inline void native_store_idt(struct desc_ptr *dtr)
238 asm volatile("sidt %0":"=m" (*dtr));
241 static inline unsigned long native_store_tr(void)
244 asm volatile("str %0":"=r" (tr));
248 static inline void native_load_tls(struct thread_struct *t, unsigned int cpu)
251 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
253 for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++)
254 gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i];
257 #define _LDT_empty(info) \
258 ((info)->base_addr == 0 && \
259 (info)->limit == 0 && \
260 (info)->contents == 0 && \
261 (info)->read_exec_only == 1 && \
262 (info)->seg_32bit == 0 && \
263 (info)->limit_in_pages == 0 && \
264 (info)->seg_not_present == 1 && \
265 (info)->useable == 0)
268 #define LDT_empty(info) (_LDT_empty(info) && ((info)->lm == 0))
270 #define LDT_empty(info) (_LDT_empty(info))
273 static inline void clear_LDT(void)
279 * load one particular LDT into the current CPU
281 static inline void load_LDT_nolock(mm_context_t *pc)
283 set_ldt(pc->ldt, pc->size);
286 static inline void load_LDT(mm_context_t *pc)
293 static inline unsigned long get_desc_base(const struct desc_struct *desc)
295 return (unsigned)(desc->base0 | ((desc->base1) << 16) | ((desc->base2) << 24));
298 static inline void set_desc_base(struct desc_struct *desc, unsigned long base)
300 desc->base0 = base & 0xffff;
301 desc->base1 = (base >> 16) & 0xff;
302 desc->base2 = (base >> 24) & 0xff;
305 static inline unsigned long get_desc_limit(const struct desc_struct *desc)
307 return desc->limit0 | (desc->limit << 16);
310 static inline void set_desc_limit(struct desc_struct *desc, unsigned long limit)
312 desc->limit0 = limit & 0xffff;
313 desc->limit = (limit >> 16) & 0xf;
316 static inline void _set_gate(int gate, unsigned type, void *addr,
317 unsigned dpl, unsigned ist, unsigned seg)
320 pack_gate(&s, type, (unsigned long)addr, dpl, ist, seg);
322 * does not need to be atomic because it is only done once at
325 write_idt_entry(idt_table, gate, &s);
329 * This needs to use 'idt_table' rather than 'idt', and
330 * thus use the _nonmapped_ version of the IDT, as the
331 * Pentium F0 0F bugfix can have resulted in the mapped
332 * IDT being write-protected.
334 static inline void set_intr_gate(unsigned int n, void *addr)
336 BUG_ON((unsigned)n > 0xFF);
337 _set_gate(n, GATE_INTERRUPT, addr, 0, 0, __KERNEL_CS);
340 extern int first_system_vector;
341 /* used_vectors is BITMAP for irq is not managed by percpu vector_irq */
342 extern unsigned long used_vectors[];
344 static inline void alloc_system_vector(int vector)
346 if (!test_bit(vector, used_vectors)) {
347 set_bit(vector, used_vectors);
348 if (first_system_vector > vector)
349 first_system_vector = vector;
354 static inline void alloc_intr_gate(unsigned int n, void *addr)
356 alloc_system_vector(n);
357 set_intr_gate(n, addr);
361 * This routine sets up an interrupt gate at directory privilege level 3.
363 static inline void set_system_intr_gate(unsigned int n, void *addr)
365 BUG_ON((unsigned)n > 0xFF);
366 _set_gate(n, GATE_INTERRUPT, addr, 0x3, 0, __KERNEL_CS);
369 static inline void set_system_trap_gate(unsigned int n, void *addr)
371 BUG_ON((unsigned)n > 0xFF);
372 _set_gate(n, GATE_TRAP, addr, 0x3, 0, __KERNEL_CS);
375 static inline void set_trap_gate(unsigned int n, void *addr)
377 BUG_ON((unsigned)n > 0xFF);
378 _set_gate(n, GATE_TRAP, addr, 0, 0, __KERNEL_CS);
381 static inline void set_task_gate(unsigned int n, unsigned int gdt_entry)
383 BUG_ON((unsigned)n > 0xFF);
384 _set_gate(n, GATE_TASK, (void *)0, 0, 0, (gdt_entry<<3));
387 static inline void set_intr_gate_ist(int n, void *addr, unsigned ist)
389 BUG_ON((unsigned)n > 0xFF);
390 _set_gate(n, GATE_INTERRUPT, addr, 0, ist, __KERNEL_CS);
393 static inline void set_system_intr_gate_ist(int n, void *addr, unsigned ist)
395 BUG_ON((unsigned)n > 0xFF);
396 _set_gate(n, GATE_INTERRUPT, addr, 0x3, ist, __KERNEL_CS);
400 static inline void set_user_cs(struct desc_struct *desc, unsigned long limit)
402 limit = (limit - 1) / PAGE_SIZE;
403 desc->a = limit & 0xffff;
404 desc->b = (limit & 0xf0000) | 0x00c0fb00;
407 static inline void native_load_user_cs_desc(int cpu, struct mm_struct *mm)
409 get_cpu_gdt_table(cpu)[GDT_ENTRY_DEFAULT_USER_CS] = (mm)->context.user_cs;
412 #define arch_add_exec_range arch_add_exec_range
413 #define arch_remove_exec_range arch_remove_exec_range
414 #define arch_flush_exec_range arch_flush_exec_range
415 extern void arch_add_exec_range(struct mm_struct *mm, unsigned long limit);
416 extern void arch_remove_exec_range(struct mm_struct *mm, unsigned long limit);
417 extern void arch_flush_exec_range(struct mm_struct *mm);
418 #endif /* CONFIG_X86_32 */
420 #endif /* _ASM_X86_DESC_H */