arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define CR0_RESERVED_BITS                                               \
  64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  67 #define CR4_RESERVED_BITS                                               \
  68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  71                           | X86_CR4_OSXSAVE \
  72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  73
  74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  75
  76 #define KVM_MAX_MCE_BANKS 32
  77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  94                                     struct kvm_cpuid_entry2 __user *entries);
  95
  96 struct kvm_x86_ops *kvm_x86_ops;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 int ignore_msrs = 0;
 100 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 #define KVM_NR_SHARED_MSRS 16
 103
 104 struct kvm_shared_msrs_global {
 105         int nr;
 106         u32 msrs[KVM_NR_SHARED_MSRS];
 107 };
 108
 109 struct kvm_shared_msrs {
 110         struct user_return_notifier urn;
 111         bool registered;
 112         struct kvm_shared_msr_values {
 113                 u64 host;
 114                 u64 curr;
 115         } values[KVM_NR_SHARED_MSRS];
 116 };
 117
 118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 119 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 120
 121 struct kvm_stats_debugfs_item debugfs_entries[] = {
 122         { "pf_fixed", VCPU_STAT(pf_fixed) },
 123         { "pf_guest", VCPU_STAT(pf_guest) },
 124         { "tlb_flush", VCPU_STAT(tlb_flush) },
 125         { "invlpg", VCPU_STAT(invlpg) },
 126         { "exits", VCPU_STAT(exits) },
 127         { "io_exits", VCPU_STAT(io_exits) },
 128         { "mmio_exits", VCPU_STAT(mmio_exits) },
 129         { "signal_exits", VCPU_STAT(signal_exits) },
 130         { "irq_window", VCPU_STAT(irq_window_exits) },
 131         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 132         { "halt_exits", VCPU_STAT(halt_exits) },
 133         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 134         { "hypercalls", VCPU_STAT(hypercalls) },
 135         { "request_irq", VCPU_STAT(request_irq_exits) },
 136         { "irq_exits", VCPU_STAT(irq_exits) },
 137         { "host_state_reload", VCPU_STAT(host_state_reload) },
 138         { "efer_reload", VCPU_STAT(efer_reload) },
 139         { "fpu_reload", VCPU_STAT(fpu_reload) },
 140         { "insn_emulation", VCPU_STAT(insn_emulation) },
 141         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 142         { "irq_injections", VCPU_STAT(irq_injections) },
 143         { "nmi_injections", VCPU_STAT(nmi_injections) },
 144         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 145         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 146         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 147         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 148         { "mmu_flooded", VM_STAT(mmu_flooded) },
 149         { "mmu_recycled", VM_STAT(mmu_recycled) },
 150         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 151         { "mmu_unsync", VM_STAT(mmu_unsync) },
 152         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 153         { "largepages", VM_STAT(lpages) },
 154         { NULL }
 155 };
 156
 157 u64 __read_mostly host_xcr0;
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
 338 {
 339         unsigned error_code = vcpu->arch.fault.error_code;
 340
 341         ++vcpu->stat.pf_guest;
 342         vcpu->arch.cr2 = vcpu->arch.fault.address;
 343         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 344 }
 345
 346 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
 347 {
 348         if (mmu_is_nested(vcpu) && !vcpu->arch.fault.nested)
 349                 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
 350         else
 351                 vcpu->arch.mmu.inject_page_fault(vcpu);
 352
 353         vcpu->arch.fault.nested = false;
 354 }
 355
 356 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 357 {
 358         kvm_make_request(KVM_REQ_EVENT, vcpu);
 359         vcpu->arch.nmi_pending = 1;
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 362
 363 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 364 {
 365         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 368
 369 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 374
 375 /*
 376  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 377  * a #GP and return false.
 378  */
 379 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 380 {
 381         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 382                 return true;
 383         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 384         return false;
 385 }
 386 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 387
 388 /*
 389  * This function will be used to read from the physical memory of the currently
 390  * running guest. The difference to kvm_read_guest_page is that this function
 391  * can read from guest physical or from the guest's guest physical memory.
 392  */
 393 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 394                             gfn_t ngfn, void *data, int offset, int len,
 395                             u32 access)
 396 {
 397         gfn_t real_gfn;
 398         gpa_t ngpa;
 399
 400         ngpa     = gfn_to_gpa(ngfn);
 401         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 402         if (real_gfn == UNMAPPED_GVA)
 403                 return -EFAULT;
 404
 405         real_gfn = gpa_to_gfn(real_gfn);
 406
 407         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 410
 411 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 412                                void *data, int offset, int len, u32 access)
 413 {
 414         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 415                                        data, offset, len, access);
 416 }
 417
 418 /*
 419  * Load the pae pdptrs.  Return true is they are all valid.
 420  */
 421 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 422 {
 423         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 424         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 425         int i;
 426         int ret;
 427         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 428
 429         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 430                                       offset * sizeof(u64), sizeof(pdpte),
 431                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 432         if (ret < 0) {
 433                 ret = 0;
 434                 goto out;
 435         }
 436         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 437                 if (is_present_gpte(pdpte[i]) &&
 438                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 439                         ret = 0;
 440                         goto out;
 441                 }
 442         }
 443         ret = 1;
 444
 445         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 446         __set_bit(VCPU_EXREG_PDPTR,
 447                   (unsigned long *)&vcpu->arch.regs_avail);
 448         __set_bit(VCPU_EXREG_PDPTR,
 449                   (unsigned long *)&vcpu->arch.regs_dirty);
 450 out:
 451
 452         return ret;
 453 }
 454 EXPORT_SYMBOL_GPL(load_pdptrs);
 455
 456 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 457 {
 458         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 459         bool changed = true;
 460         int offset;
 461         gfn_t gfn;
 462         int r;
 463
 464         if (is_long_mode(vcpu) || !is_pae(vcpu))
 465                 return false;
 466
 467         if (!test_bit(VCPU_EXREG_PDPTR,
 468                       (unsigned long *)&vcpu->arch.regs_avail))
 469                 return true;
 470
 471         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
 472         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
 473         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 474                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 475         if (r < 0)
 476                 goto out;
 477         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 478 out:
 479
 480         return changed;
 481 }
 482
 483 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 484 {
 485         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 486         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 487                                     X86_CR0_CD | X86_CR0_NW;
 488
 489         cr0 |= X86_CR0_ET;
 490
 491 #ifdef CONFIG_X86_64
 492         if (cr0 & 0xffffffff00000000UL)
 493                 return 1;
 494 #endif
 495
 496         cr0 &= ~CR0_RESERVED_BITS;
 497
 498         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 499                 return 1;
 500
 501         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 502                 return 1;
 503
 504         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 505 #ifdef CONFIG_X86_64
 506                 if ((vcpu->arch.efer & EFER_LME)) {
 507                         int cs_db, cs_l;
 508
 509                         if (!is_pae(vcpu))
 510                                 return 1;
 511                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 512                         if (cs_l)
 513                                 return 1;
 514                 } else
 515 #endif
 516                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 517                                                  vcpu->arch.cr3))
 518                         return 1;
 519         }
 520
 521         kvm_x86_ops->set_cr0(vcpu, cr0);
 522
 523         if ((cr0 ^ old_cr0) & update_bits)
 524                 kvm_mmu_reset_context(vcpu);
 525         return 0;
 526 }
 527 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 528
 529 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 530 {
 531         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 532 }
 533 EXPORT_SYMBOL_GPL(kvm_lmsw);
 534
 535 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 536 {
 537         u64 xcr0;
 538
 539         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 540         if (index != XCR_XFEATURE_ENABLED_MASK)
 541                 return 1;
 542         xcr0 = xcr;
 543         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 544                 return 1;
 545         if (!(xcr0 & XSTATE_FP))
 546                 return 1;
 547         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 548                 return 1;
 549         if (xcr0 & ~host_xcr0)
 550                 return 1;
 551         vcpu->arch.xcr0 = xcr0;
 552         vcpu->guest_xcr0_loaded = 0;
 553         return 0;
 554 }
 555
 556 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 557 {
 558         if (__kvm_set_xcr(vcpu, index, xcr)) {
 559                 kvm_inject_gp(vcpu, 0);
 560                 return 1;
 561         }
 562         return 0;
 563 }
 564 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 565
 566 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 567 {
 568         struct kvm_cpuid_entry2 *best;
 569
 570         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 571         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 572 }
 573
 574 static void update_cpuid(struct kvm_vcpu *vcpu)
 575 {
 576         struct kvm_cpuid_entry2 *best;
 577
 578         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 579         if (!best)
 580                 return;
 581
 582         /* Update OSXSAVE bit */
 583         if (cpu_has_xsave && best->function == 0x1) {
 584                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 585                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 586                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 587         }
 588 }
 589
 590 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 591 {
 592         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 593         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 594
 595         if (cr4 & CR4_RESERVED_BITS)
 596                 return 1;
 597
 598         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 599                 return 1;
 600
 601         if (is_long_mode(vcpu)) {
 602                 if (!(cr4 & X86_CR4_PAE))
 603                         return 1;
 604         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 605                    && ((cr4 ^ old_cr4) & pdptr_bits)
 606                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
 607                 return 1;
 608
 609         if (cr4 & X86_CR4_VMXE)
 610                 return 1;
 611
 612         kvm_x86_ops->set_cr4(vcpu, cr4);
 613
 614         if ((cr4 ^ old_cr4) & pdptr_bits)
 615                 kvm_mmu_reset_context(vcpu);
 616
 617         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 618                 update_cpuid(vcpu);
 619
 620         return 0;
 621 }
 622 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 623
 624 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 625 {
 626         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 627                 kvm_mmu_sync_roots(vcpu);
 628                 kvm_mmu_flush_tlb(vcpu);
 629                 return 0;
 630         }
 631
 632         if (is_long_mode(vcpu)) {
 633                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 634                         return 1;
 635         } else {
 636                 if (is_pae(vcpu)) {
 637                         if (cr3 & CR3_PAE_RESERVED_BITS)
 638                                 return 1;
 639                         if (is_paging(vcpu) &&
 640                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 641                                 return 1;
 642                 }
 643                 /*
 644                  * We don't check reserved bits in nonpae mode, because
 645                  * this isn't enforced, and VMware depends on this.
 646                  */
 647         }
 648
 649         /*
 650          * Does the new cr3 value map to physical memory? (Note, we
 651          * catch an invalid cr3 even in real-mode, because it would
 652          * cause trouble later on when we turn on paging anyway.)
 653          *
 654          * A real CPU would silently accept an invalid cr3 and would
 655          * attempt to use it - with largely undefined (and often hard
 656          * to debug) behavior on the guest side.
 657          */
 658         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 659                 return 1;
 660         vcpu->arch.cr3 = cr3;
 661         vcpu->arch.mmu.new_cr3(vcpu);
 662         return 0;
 663 }
 664 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 665
 666 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 667 {
 668         if (cr8 & CR8_RESERVED_BITS)
 669                 return 1;
 670         if (irqchip_in_kernel(vcpu->kvm))
 671                 kvm_lapic_set_tpr(vcpu, cr8);
 672         else
 673                 vcpu->arch.cr8 = cr8;
 674         return 0;
 675 }
 676
 677 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 678 {
 679         if (__kvm_set_cr8(vcpu, cr8))
 680                 kvm_inject_gp(vcpu, 0);
 681 }
 682 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 683
 684 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 685 {
 686         if (irqchip_in_kernel(vcpu->kvm))
 687                 return kvm_lapic_get_cr8(vcpu);
 688         else
 689                 return vcpu->arch.cr8;
 690 }
 691 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 692
 693 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 694 {
 695         switch (dr) {
 696         case 0 ... 3:
 697                 vcpu->arch.db[dr] = val;
 698                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 699                         vcpu->arch.eff_db[dr] = val;
 700                 break;
 701         case 4:
 702                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 703                         return 1; /* #UD */
 704                 /* fall through */
 705         case 6:
 706                 if (val & 0xffffffff00000000ULL)
 707                         return -1; /* #GP */
 708                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 709                 break;
 710         case 5:
 711                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 712                         return 1; /* #UD */
 713                 /* fall through */
 714         default: /* 7 */
 715                 if (val & 0xffffffff00000000ULL)
 716                         return -1; /* #GP */
 717                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 718                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 719                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 720                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 721                 }
 722                 break;
 723         }
 724
 725         return 0;
 726 }
 727
 728 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 729 {
 730         int res;
 731
 732         res = __kvm_set_dr(vcpu, dr, val);
 733         if (res > 0)
 734                 kvm_queue_exception(vcpu, UD_VECTOR);
 735         else if (res < 0)
 736                 kvm_inject_gp(vcpu, 0);
 737
 738         return res;
 739 }
 740 EXPORT_SYMBOL_GPL(kvm_set_dr);
 741
 742 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 743 {
 744         switch (dr) {
 745         case 0 ... 3:
 746                 *val = vcpu->arch.db[dr];
 747                 break;
 748         case 4:
 749                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 750                         return 1;
 751                 /* fall through */
 752         case 6:
 753                 *val = vcpu->arch.dr6;
 754                 break;
 755         case 5:
 756                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 757                         return 1;
 758                 /* fall through */
 759         default: /* 7 */
 760                 *val = vcpu->arch.dr7;
 761                 break;
 762         }
 763
 764         return 0;
 765 }
 766
 767 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 768 {
 769         if (_kvm_get_dr(vcpu, dr, val)) {
 770                 kvm_queue_exception(vcpu, UD_VECTOR);
 771                 return 1;
 772         }
 773         return 0;
 774 }
 775 EXPORT_SYMBOL_GPL(kvm_get_dr);
 776
 777 /*
 778  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 779  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 780  *
 781  * This list is modified at module load time to reflect the
 782  * capabilities of the host cpu. This capabilities test skips MSRs that are
 783  * kvm-specific. Those are put in the beginning of the list.
 784  */
 785
 786 #define KVM_SAVE_MSRS_BEGIN     7
 787 static u32 msrs_to_save[] = {
 788         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 789         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 790         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 791         HV_X64_MSR_APIC_ASSIST_PAGE,
 792         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 793         MSR_STAR,
 794 #ifdef CONFIG_X86_64
 795         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 796 #endif
 797         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 798 };
 799
 800 static unsigned num_msrs_to_save;
 801
 802 static u32 emulated_msrs[] = {
 803         MSR_IA32_MISC_ENABLE,
 804         MSR_IA32_MCG_STATUS,
 805         MSR_IA32_MCG_CTL,
 806 };
 807
 808 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 809 {
 810         u64 old_efer = vcpu->arch.efer;
 811
 812         if (efer & efer_reserved_bits)
 813                 return 1;
 814
 815         if (is_paging(vcpu)
 816             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 817                 return 1;
 818
 819         if (efer & EFER_FFXSR) {
 820                 struct kvm_cpuid_entry2 *feat;
 821
 822                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 823                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 824                         return 1;
 825         }
 826
 827         if (efer & EFER_SVME) {
 828                 struct kvm_cpuid_entry2 *feat;
 829
 830                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 831                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 832                         return 1;
 833         }
 834
 835         efer &= ~EFER_LMA;
 836         efer |= vcpu->arch.efer & EFER_LMA;
 837
 838         kvm_x86_ops->set_efer(vcpu, efer);
 839
 840         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 841
 842         /* Update reserved bits */
 843         if ((efer ^ old_efer) & EFER_NX)
 844                 kvm_mmu_reset_context(vcpu);
 845
 846         return 0;
 847 }
 848
 849 void kvm_enable_efer_bits(u64 mask)
 850 {
 851        efer_reserved_bits &= ~mask;
 852 }
 853 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 854
 855
 856 /*
 857  * Writes msr value into into the appropriate "register".
 858  * Returns 0 on success, non-0 otherwise.
 859  * Assumes vcpu_load() was already called.
 860  */
 861 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 862 {
 863         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 864 }
 865
 866 /*
 867  * Adapt set_msr() to msr_io()'s calling convention
 868  */
 869 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 870 {
 871         return kvm_set_msr(vcpu, index, *data);
 872 }
 873
 874 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 875 {
 876         int version;
 877         int r;
 878         struct pvclock_wall_clock wc;
 879         struct timespec boot;
 880
 881         if (!wall_clock)
 882                 return;
 883
 884         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 885         if (r)
 886                 return;
 887
 888         if (version & 1)
 889                 ++version;  /* first time write, random junk */
 890
 891         ++version;
 892
 893         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 894
 895         /*
 896          * The guest calculates current wall clock time by adding
 897          * system time (updated by kvm_guest_time_update below) to the
 898          * wall clock specified here.  guest system time equals host
 899          * system time for us, thus we must fill in host boot time here.
 900          */
 901         getboottime(&boot);
 902
 903         wc.sec = boot.tv_sec;
 904         wc.nsec = boot.tv_nsec;
 905         wc.version = version;
 906
 907         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 908
 909         version++;
 910         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 911 }
 912
 913 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 914 {
 915         uint32_t quotient, remainder;
 916
 917         /* Don't try to replace with do_div(), this one calculates
 918          * "(dividend << 32) / divisor" */
 919         __asm__ ( "divl %4"
 920                   : "=a" (quotient), "=d" (remainder)
 921                   : "0" (0), "1" (dividend), "r" (divisor) );
 922         return quotient;
 923 }
 924
 925 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 926                                s8 *pshift, u32 *pmultiplier)
 927 {
 928         uint64_t scaled64;
 929         int32_t  shift = 0;
 930         uint64_t tps64;
 931         uint32_t tps32;
 932
 933         tps64 = base_khz * 1000LL;
 934         scaled64 = scaled_khz * 1000LL;
 935         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 936                 tps64 >>= 1;
 937                 shift--;
 938         }
 939
 940         tps32 = (uint32_t)tps64;
 941         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 942                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 943                         scaled64 >>= 1;
 944                 else
 945                         tps32 <<= 1;
 946                 shift++;
 947         }
 948
 949         *pshift = shift;
 950         *pmultiplier = div_frac(scaled64, tps32);
 951
 952         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 953                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 954 }
 955
 956 static inline u64 get_kernel_ns(void)
 957 {
 958         struct timespec ts;
 959
 960         WARN_ON(preemptible());
 961         ktime_get_ts(&ts);
 962         monotonic_to_bootbased(&ts);
 963         return timespec_to_ns(&ts);
 964 }
 965
 966 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 967 unsigned long max_tsc_khz;
 968
 969 static inline int kvm_tsc_changes_freq(void)
 970 {
 971         int cpu = get_cpu();
 972         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 973                   cpufreq_quick_get(cpu) != 0;
 974         put_cpu();
 975         return ret;
 976 }
 977
 978 static inline u64 nsec_to_cycles(u64 nsec)
 979 {
 980         u64 ret;
 981
 982         WARN_ON(preemptible());
 983         if (kvm_tsc_changes_freq())
 984                 printk_once(KERN_WARNING
 985                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 986         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 987         do_div(ret, USEC_PER_SEC);
 988         return ret;
 989 }
 990
 991 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 992 {
 993         /* Compute a scale to convert nanoseconds in TSC cycles */
 994         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 995                            &kvm->arch.virtual_tsc_shift,
 996                            &kvm->arch.virtual_tsc_mult);
 997         kvm->arch.virtual_tsc_khz = this_tsc_khz;
 998 }
 999
1000 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1001 {
1002         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1003                                       vcpu->kvm->arch.virtual_tsc_mult,
1004                                       vcpu->kvm->arch.virtual_tsc_shift);
1005         tsc += vcpu->arch.last_tsc_write;
1006         return tsc;
1007 }
1008
1009 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1010 {
1011         struct kvm *kvm = vcpu->kvm;
1012         u64 offset, ns, elapsed;
1013         unsigned long flags;
1014         s64 sdiff;
1015
1016         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1017         offset = data - native_read_tsc();
1018         ns = get_kernel_ns();
1019         elapsed = ns - kvm->arch.last_tsc_nsec;
1020         sdiff = data - kvm->arch.last_tsc_write;
1021         if (sdiff < 0)
1022                 sdiff = -sdiff;
1023
1024         /*
1025          * Special case: close write to TSC within 5 seconds of
1026          * another CPU is interpreted as an attempt to synchronize
1027          * The 5 seconds is to accomodate host load / swapping as
1028          * well as any reset of TSC during the boot process.
1029          *
1030          * In that case, for a reliable TSC, we can match TSC offsets,
1031          * or make a best guest using elapsed value.
1032          */
1033         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1034             elapsed < 5ULL * NSEC_PER_SEC) {
1035                 if (!check_tsc_unstable()) {
1036                         offset = kvm->arch.last_tsc_offset;
1037                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1038                 } else {
1039                         u64 delta = nsec_to_cycles(elapsed);
1040                         offset += delta;
1041                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1042                 }
1043                 ns = kvm->arch.last_tsc_nsec;
1044         }
1045         kvm->arch.last_tsc_nsec = ns;
1046         kvm->arch.last_tsc_write = data;
1047         kvm->arch.last_tsc_offset = offset;
1048         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1049         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1050
1051         /* Reset of TSC must disable overshoot protection below */
1052         vcpu->arch.hv_clock.tsc_timestamp = 0;
1053         vcpu->arch.last_tsc_write = data;
1054         vcpu->arch.last_tsc_nsec = ns;
1055 }
1056 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1057
1058 static int kvm_guest_time_update(struct kvm_vcpu *v)
1059 {
1060         unsigned long flags;
1061         struct kvm_vcpu_arch *vcpu = &v->arch;
1062         void *shared_kaddr;
1063         unsigned long this_tsc_khz;
1064         s64 kernel_ns, max_kernel_ns;
1065         u64 tsc_timestamp;
1066
1067         /* Keep irq disabled to prevent changes to the clock */
1068         local_irq_save(flags);
1069         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1070         kernel_ns = get_kernel_ns();
1071         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1072
1073         if (unlikely(this_tsc_khz == 0)) {
1074                 local_irq_restore(flags);
1075                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1076                 return 1;
1077         }
1078
1079         /*
1080          * We may have to catch up the TSC to match elapsed wall clock
1081          * time for two reasons, even if kvmclock is used.
1082          *   1) CPU could have been running below the maximum TSC rate
1083          *   2) Broken TSC compensation resets the base at each VCPU
1084          *      entry to avoid unknown leaps of TSC even when running
1085          *      again on the same CPU.  This may cause apparent elapsed
1086          *      time to disappear, and the guest to stand still or run
1087          *      very slowly.
1088          */
1089         if (vcpu->tsc_catchup) {
1090                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1091                 if (tsc > tsc_timestamp) {
1092                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1093                         tsc_timestamp = tsc;
1094                 }
1095         }
1096
1097         local_irq_restore(flags);
1098
1099         if (!vcpu->time_page)
1100                 return 0;
1101
1102         /*
1103          * Time as measured by the TSC may go backwards when resetting the base
1104          * tsc_timestamp.  The reason for this is that the TSC resolution is
1105          * higher than the resolution of the other clock scales.  Thus, many
1106          * possible measurments of the TSC correspond to one measurement of any
1107          * other clock, and so a spread of values is possible.  This is not a
1108          * problem for the computation of the nanosecond clock; with TSC rates
1109          * around 1GHZ, there can only be a few cycles which correspond to one
1110          * nanosecond value, and any path through this code will inevitably
1111          * take longer than that.  However, with the kernel_ns value itself,
1112          * the precision may be much lower, down to HZ granularity.  If the
1113          * first sampling of TSC against kernel_ns ends in the low part of the
1114          * range, and the second in the high end of the range, we can get:
1115          *
1116          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1117          *
1118          * As the sampling errors potentially range in the thousands of cycles,
1119          * it is possible such a time value has already been observed by the
1120          * guest.  To protect against this, we must compute the system time as
1121          * observed by the guest and ensure the new system time is greater.
1122          */
1123         max_kernel_ns = 0;
1124         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1125                 max_kernel_ns = vcpu->last_guest_tsc -
1126                                 vcpu->hv_clock.tsc_timestamp;
1127                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1128                                     vcpu->hv_clock.tsc_to_system_mul,
1129                                     vcpu->hv_clock.tsc_shift);
1130                 max_kernel_ns += vcpu->last_kernel_ns;
1131         }
1132
1133         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1134                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1135                                    &vcpu->hv_clock.tsc_shift,
1136                                    &vcpu->hv_clock.tsc_to_system_mul);
1137                 vcpu->hw_tsc_khz = this_tsc_khz;
1138         }
1139
1140         if (max_kernel_ns > kernel_ns)
1141                 kernel_ns = max_kernel_ns;
1142
1143         /* With all the info we got, fill in the values */
1144         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1145         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1146         vcpu->last_kernel_ns = kernel_ns;
1147         vcpu->last_guest_tsc = tsc_timestamp;
1148         vcpu->hv_clock.flags = 0;
1149
1150         /*
1151          * The interface expects us to write an even number signaling that the
1152          * update is finished. Since the guest won't see the intermediate
1153          * state, we just increase by 2 at the end.
1154          */
1155         vcpu->hv_clock.version += 2;
1156
1157         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1158
1159         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1160                sizeof(vcpu->hv_clock));
1161
1162         kunmap_atomic(shared_kaddr, KM_USER0);
1163
1164         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1165         return 0;
1166 }
1167
1168 static bool msr_mtrr_valid(unsigned msr)
1169 {
1170         switch (msr) {
1171         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1172         case MSR_MTRRfix64K_00000:
1173         case MSR_MTRRfix16K_80000:
1174         case MSR_MTRRfix16K_A0000:
1175         case MSR_MTRRfix4K_C0000:
1176         case MSR_MTRRfix4K_C8000:
1177         case MSR_MTRRfix4K_D0000:
1178         case MSR_MTRRfix4K_D8000:
1179         case MSR_MTRRfix4K_E0000:
1180         case MSR_MTRRfix4K_E8000:
1181         case MSR_MTRRfix4K_F0000:
1182         case MSR_MTRRfix4K_F8000:
1183         case MSR_MTRRdefType:
1184         case MSR_IA32_CR_PAT:
1185                 return true;
1186         case 0x2f8:
1187                 return true;
1188         }
1189         return false;
1190 }
1191
1192 static bool valid_pat_type(unsigned t)
1193 {
1194         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1195 }
1196
1197 static bool valid_mtrr_type(unsigned t)
1198 {
1199         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1200 }
1201
1202 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1203 {
1204         int i;
1205
1206         if (!msr_mtrr_valid(msr))
1207                 return false;
1208
1209         if (msr == MSR_IA32_CR_PAT) {
1210                 for (i = 0; i < 8; i++)
1211                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1212                                 return false;
1213                 return true;
1214         } else if (msr == MSR_MTRRdefType) {
1215                 if (data & ~0xcff)
1216                         return false;
1217                 return valid_mtrr_type(data & 0xff);
1218         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1219                 for (i = 0; i < 8 ; i++)
1220                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1221                                 return false;
1222                 return true;
1223         }
1224
1225         /* variable MTRRs */
1226         return valid_mtrr_type(data & 0xff);
1227 }
1228
1229 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1230 {
1231         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1232
1233         if (!mtrr_valid(vcpu, msr, data))
1234                 return 1;
1235
1236         if (msr == MSR_MTRRdefType) {
1237                 vcpu->arch.mtrr_state.def_type = data;
1238                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1239         } else if (msr == MSR_MTRRfix64K_00000)
1240                 p[0] = data;
1241         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1242                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1243         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1244                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1245         else if (msr == MSR_IA32_CR_PAT)
1246                 vcpu->arch.pat = data;
1247         else {  /* Variable MTRRs */
1248                 int idx, is_mtrr_mask;
1249                 u64 *pt;
1250
1251                 idx = (msr - 0x200) / 2;
1252                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1253                 if (!is_mtrr_mask)
1254                         pt =
1255                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1256                 else
1257                         pt =
1258                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1259                 *pt = data;
1260         }
1261
1262         kvm_mmu_reset_context(vcpu);
1263         return 0;
1264 }
1265
1266 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1267 {
1268         u64 mcg_cap = vcpu->arch.mcg_cap;
1269         unsigned bank_num = mcg_cap & 0xff;
1270
1271         switch (msr) {
1272         case MSR_IA32_MCG_STATUS:
1273                 vcpu->arch.mcg_status = data;
1274                 break;
1275         case MSR_IA32_MCG_CTL:
1276                 if (!(mcg_cap & MCG_CTL_P))
1277                         return 1;
1278                 if (data != 0 && data != ~(u64)0)
1279                         return -1;
1280                 vcpu->arch.mcg_ctl = data;
1281                 break;
1282         default:
1283                 if (msr >= MSR_IA32_MC0_CTL &&
1284                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1285                         u32 offset = msr - MSR_IA32_MC0_CTL;
1286                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1287                          * some Linux kernels though clear bit 10 in bank 4 to
1288                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1289                          * this to avoid an uncatched #GP in the guest
1290                          */
1291                         if ((offset & 0x3) == 0 &&
1292                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1293                                 return -1;
1294                         vcpu->arch.mce_banks[offset] = data;
1295                         break;
1296                 }
1297                 return 1;
1298         }
1299         return 0;
1300 }
1301
1302 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1303 {
1304         struct kvm *kvm = vcpu->kvm;
1305         int lm = is_long_mode(vcpu);
1306         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1307                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1308         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1309                 : kvm->arch.xen_hvm_config.blob_size_32;
1310         u32 page_num = data & ~PAGE_MASK;
1311         u64 page_addr = data & PAGE_MASK;
1312         u8 *page;
1313         int r;
1314
1315         r = -E2BIG;
1316         if (page_num >= blob_size)
1317                 goto out;
1318         r = -ENOMEM;
1319         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1320         if (!page)
1321                 goto out;
1322         r = -EFAULT;
1323         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1324                 goto out_free;
1325         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1326                 goto out_free;
1327         r = 0;
1328 out_free:
1329         kfree(page);
1330 out:
1331         return r;
1332 }
1333
1334 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1335 {
1336         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1337 }
1338
1339 static bool kvm_hv_msr_partition_wide(u32 msr)
1340 {
1341         bool r = false;
1342         switch (msr) {
1343         case HV_X64_MSR_GUEST_OS_ID:
1344         case HV_X64_MSR_HYPERCALL:
1345                 r = true;
1346                 break;
1347         }
1348
1349         return r;
1350 }
1351
1352 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1353 {
1354         struct kvm *kvm = vcpu->kvm;
1355
1356         switch (msr) {
1357         case HV_X64_MSR_GUEST_OS_ID:
1358                 kvm->arch.hv_guest_os_id = data;
1359                 /* setting guest os id to zero disables hypercall page */
1360                 if (!kvm->arch.hv_guest_os_id)
1361                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1362                 break;
1363         case HV_X64_MSR_HYPERCALL: {
1364                 u64 gfn;
1365                 unsigned long addr;
1366                 u8 instructions[4];
1367
1368                 /* if guest os id is not set hypercall should remain disabled */
1369                 if (!kvm->arch.hv_guest_os_id)
1370                         break;
1371                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1372                         kvm->arch.hv_hypercall = data;
1373                         break;
1374                 }
1375                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1376                 addr = gfn_to_hva(kvm, gfn);
1377                 if (kvm_is_error_hva(addr))
1378                         return 1;
1379                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1380                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1381                 if (copy_to_user((void __user *)addr, instructions, 4))
1382                         return 1;
1383                 kvm->arch.hv_hypercall = data;
1384                 break;
1385         }
1386         default:
1387                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1388                           "data 0x%llx\n", msr, data);
1389                 return 1;
1390         }
1391         return 0;
1392 }
1393
1394 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1395 {
1396         switch (msr) {
1397         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1398                 unsigned long addr;
1399
1400                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1401                         vcpu->arch.hv_vapic = data;
1402                         break;
1403                 }
1404                 addr = gfn_to_hva(vcpu->kvm, data >>
1405                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1406                 if (kvm_is_error_hva(addr))
1407                         return 1;
1408                 if (clear_user((void __user *)addr, PAGE_SIZE))
1409                         return 1;
1410                 vcpu->arch.hv_vapic = data;
1411                 break;
1412         }
1413         case HV_X64_MSR_EOI:
1414                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1415         case HV_X64_MSR_ICR:
1416                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1417         case HV_X64_MSR_TPR:
1418                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1419         default:
1420                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1421                           "data 0x%llx\n", msr, data);
1422                 return 1;
1423         }
1424
1425         return 0;
1426 }
1427
1428 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1429 {
1430         switch (msr) {
1431         case MSR_EFER:
1432                 return set_efer(vcpu, data);
1433         case MSR_K7_HWCR:
1434                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1435                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1436                 if (data != 0) {
1437                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1438                                 data);
1439                         return 1;
1440                 }
1441                 break;
1442         case MSR_FAM10H_MMIO_CONF_BASE:
1443                 if (data != 0) {
1444                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1445                                 "0x%llx\n", data);
1446                         return 1;
1447                 }
1448                 break;
1449         case MSR_AMD64_NB_CFG:
1450                 break;
1451         case MSR_IA32_DEBUGCTLMSR:
1452                 if (!data) {
1453                         /* We support the non-activated case already */
1454                         break;
1455                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1456                         /* Values other than LBR and BTF are vendor-specific,
1457                            thus reserved and should throw a #GP */
1458                         return 1;
1459                 }
1460                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1461                         __func__, data);
1462                 break;
1463         case MSR_IA32_UCODE_REV:
1464         case MSR_IA32_UCODE_WRITE:
1465         case MSR_VM_HSAVE_PA:
1466         case MSR_AMD64_PATCH_LOADER:
1467                 break;
1468         case 0x200 ... 0x2ff:
1469                 return set_msr_mtrr(vcpu, msr, data);
1470         case MSR_IA32_APICBASE:
1471                 kvm_set_apic_base(vcpu, data);
1472                 break;
1473         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1474                 return kvm_x2apic_msr_write(vcpu, msr, data);
1475         case MSR_IA32_MISC_ENABLE:
1476                 vcpu->arch.ia32_misc_enable_msr = data;
1477                 break;
1478         case MSR_KVM_WALL_CLOCK_NEW:
1479         case MSR_KVM_WALL_CLOCK:
1480                 vcpu->kvm->arch.wall_clock = data;
1481                 kvm_write_wall_clock(vcpu->kvm, data);
1482                 break;
1483         case MSR_KVM_SYSTEM_TIME_NEW:
1484         case MSR_KVM_SYSTEM_TIME: {
1485                 if (vcpu->arch.time_page) {
1486                         kvm_release_page_dirty(vcpu->arch.time_page);
1487                         vcpu->arch.time_page = NULL;
1488                 }
1489
1490                 vcpu->arch.time = data;
1491                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1492
1493                 /* we verify if the enable bit is set... */
1494                 if (!(data & 1))
1495                         break;
1496
1497                 /* ...but clean it before doing the actual write */
1498                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1499
1500                 vcpu->arch.time_page =
1501                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1502
1503                 if (is_error_page(vcpu->arch.time_page)) {
1504                         kvm_release_page_clean(vcpu->arch.time_page);
1505                         vcpu->arch.time_page = NULL;
1506                 }
1507                 break;
1508         }
1509         case MSR_IA32_MCG_CTL:
1510         case MSR_IA32_MCG_STATUS:
1511         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1512                 return set_msr_mce(vcpu, msr, data);
1513
1514         /* Performance counters are not protected by a CPUID bit,
1515          * so we should check all of them in the generic path for the sake of
1516          * cross vendor migration.
1517          * Writing a zero into the event select MSRs disables them,
1518          * which we perfectly emulate ;-). Any other value should be at least
1519          * reported, some guests depend on them.
1520          */
1521         case MSR_P6_EVNTSEL0:
1522         case MSR_P6_EVNTSEL1:
1523         case MSR_K7_EVNTSEL0:
1524         case MSR_K7_EVNTSEL1:
1525         case MSR_K7_EVNTSEL2:
1526         case MSR_K7_EVNTSEL3:
1527                 if (data != 0)
1528                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1529                                 "0x%x data 0x%llx\n", msr, data);
1530                 break;
1531         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1532          * so we ignore writes to make it happy.
1533          */
1534         case MSR_P6_PERFCTR0:
1535         case MSR_P6_PERFCTR1:
1536         case MSR_K7_PERFCTR0:
1537         case MSR_K7_PERFCTR1:
1538         case MSR_K7_PERFCTR2:
1539         case MSR_K7_PERFCTR3:
1540                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1541                         "0x%x data 0x%llx\n", msr, data);
1542                 break;
1543         case MSR_K7_CLK_CTL:
1544                 /*
1545                  * Ignore all writes to this no longer documented MSR.
1546                  * Writes are only relevant for old K7 processors,
1547                  * all pre-dating SVM, but a recommended workaround from
1548                  * AMD for these chips. It is possible to speicify the
1549                  * affected processor models on the command line, hence
1550                  * the need to ignore the workaround.
1551                  */
1552                 break;
1553         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1554                 if (kvm_hv_msr_partition_wide(msr)) {
1555                         int r;
1556                         mutex_lock(&vcpu->kvm->lock);
1557                         r = set_msr_hyperv_pw(vcpu, msr, data);
1558                         mutex_unlock(&vcpu->kvm->lock);
1559                         return r;
1560                 } else
1561                         return set_msr_hyperv(vcpu, msr, data);
1562                 break;
1563         default:
1564                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1565                         return xen_hvm_config(vcpu, data);
1566                 if (!ignore_msrs) {
1567                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1568                                 msr, data);
1569                         return 1;
1570                 } else {
1571                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1572                                 msr, data);
1573                         break;
1574                 }
1575         }
1576         return 0;
1577 }
1578 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1579
1580
1581 /*
1582  * Reads an msr value (of 'msr_index') into 'pdata'.
1583  * Returns 0 on success, non-0 otherwise.
1584  * Assumes vcpu_load() was already called.
1585  */
1586 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1587 {
1588         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1589 }
1590
1591 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1592 {
1593         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1594
1595         if (!msr_mtrr_valid(msr))
1596                 return 1;
1597
1598         if (msr == MSR_MTRRdefType)
1599                 *pdata = vcpu->arch.mtrr_state.def_type +
1600                          (vcpu->arch.mtrr_state.enabled << 10);
1601         else if (msr == MSR_MTRRfix64K_00000)
1602                 *pdata = p[0];
1603         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1604                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1605         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1606                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1607         else if (msr == MSR_IA32_CR_PAT)
1608                 *pdata = vcpu->arch.pat;
1609         else {  /* Variable MTRRs */
1610                 int idx, is_mtrr_mask;
1611                 u64 *pt;
1612
1613                 idx = (msr - 0x200) / 2;
1614                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1615                 if (!is_mtrr_mask)
1616                         pt =
1617                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1618                 else
1619                         pt =
1620                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1621                 *pdata = *pt;
1622         }
1623
1624         return 0;
1625 }
1626
1627 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1628 {
1629         u64 data;
1630         u64 mcg_cap = vcpu->arch.mcg_cap;
1631         unsigned bank_num = mcg_cap & 0xff;
1632
1633         switch (msr) {
1634         case MSR_IA32_P5_MC_ADDR:
1635         case MSR_IA32_P5_MC_TYPE:
1636                 data = 0;
1637                 break;
1638         case MSR_IA32_MCG_CAP:
1639                 data = vcpu->arch.mcg_cap;
1640                 break;
1641         case MSR_IA32_MCG_CTL:
1642                 if (!(mcg_cap & MCG_CTL_P))
1643                         return 1;
1644                 data = vcpu->arch.mcg_ctl;
1645                 break;
1646         case MSR_IA32_MCG_STATUS:
1647                 data = vcpu->arch.mcg_status;
1648                 break;
1649         default:
1650                 if (msr >= MSR_IA32_MC0_CTL &&
1651                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1652                         u32 offset = msr - MSR_IA32_MC0_CTL;
1653                         data = vcpu->arch.mce_banks[offset];
1654                         break;
1655                 }
1656                 return 1;
1657         }
1658         *pdata = data;
1659         return 0;
1660 }
1661
1662 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1663 {
1664         u64 data = 0;
1665         struct kvm *kvm = vcpu->kvm;
1666
1667         switch (msr) {
1668         case HV_X64_MSR_GUEST_OS_ID:
1669                 data = kvm->arch.hv_guest_os_id;
1670                 break;
1671         case HV_X64_MSR_HYPERCALL:
1672                 data = kvm->arch.hv_hypercall;
1673                 break;
1674         default:
1675                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1676                 return 1;
1677         }
1678
1679         *pdata = data;
1680         return 0;
1681 }
1682
1683 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1684 {
1685         u64 data = 0;
1686
1687         switch (msr) {
1688         case HV_X64_MSR_VP_INDEX: {
1689                 int r;
1690                 struct kvm_vcpu *v;
1691                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1692                         if (v == vcpu)
1693                                 data = r;
1694                 break;
1695         }
1696         case HV_X64_MSR_EOI:
1697                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1698         case HV_X64_MSR_ICR:
1699                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1700         case HV_X64_MSR_TPR:
1701                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1702         default:
1703                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1704                 return 1;
1705         }
1706         *pdata = data;
1707         return 0;
1708 }
1709
1710 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1711 {
1712         u64 data;
1713
1714         switch (msr) {
1715         case MSR_IA32_PLATFORM_ID:
1716         case MSR_IA32_UCODE_REV:
1717         case MSR_IA32_EBL_CR_POWERON:
1718         case MSR_IA32_DEBUGCTLMSR:
1719         case MSR_IA32_LASTBRANCHFROMIP:
1720         case MSR_IA32_LASTBRANCHTOIP:
1721         case MSR_IA32_LASTINTFROMIP:
1722         case MSR_IA32_LASTINTTOIP:
1723         case MSR_K8_SYSCFG:
1724         case MSR_K7_HWCR:
1725         case MSR_VM_HSAVE_PA:
1726         case MSR_P6_PERFCTR0:
1727         case MSR_P6_PERFCTR1:
1728         case MSR_P6_EVNTSEL0:
1729         case MSR_P6_EVNTSEL1:
1730         case MSR_K7_EVNTSEL0:
1731         case MSR_K7_PERFCTR0:
1732         case MSR_K8_INT_PENDING_MSG:
1733         case MSR_AMD64_NB_CFG:
1734         case MSR_FAM10H_MMIO_CONF_BASE:
1735                 data = 0;
1736                 break;
1737         case MSR_MTRRcap:
1738                 data = 0x500 | KVM_NR_VAR_MTRR;
1739                 break;
1740         case 0x200 ... 0x2ff:
1741                 return get_msr_mtrr(vcpu, msr, pdata);
1742         case 0xcd: /* fsb frequency */
1743                 data = 3;
1744                 break;
1745                 /*
1746                  * MSR_EBC_FREQUENCY_ID
1747                  * Conservative value valid for even the basic CPU models.
1748                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1749                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1750                  * and 266MHz for model 3, or 4. Set Core Clock
1751                  * Frequency to System Bus Frequency Ratio to 1 (bits
1752                  * 31:24) even though these are only valid for CPU
1753                  * models > 2, however guests may end up dividing or
1754                  * multiplying by zero otherwise.
1755                  */
1756         case MSR_EBC_FREQUENCY_ID:
1757                 data = 1 << 24;
1758                 break;
1759         case MSR_IA32_APICBASE:
1760                 data = kvm_get_apic_base(vcpu);
1761                 break;
1762         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1763                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1764                 break;
1765         case MSR_IA32_MISC_ENABLE:
1766                 data = vcpu->arch.ia32_misc_enable_msr;
1767                 break;
1768         case MSR_IA32_PERF_STATUS:
1769                 /* TSC increment by tick */
1770                 data = 1000ULL;
1771                 /* CPU multiplier */
1772                 data |= (((uint64_t)4ULL) << 40);
1773                 break;
1774         case MSR_EFER:
1775                 data = vcpu->arch.efer;
1776                 break;
1777         case MSR_KVM_WALL_CLOCK:
1778         case MSR_KVM_WALL_CLOCK_NEW:
1779                 data = vcpu->kvm->arch.wall_clock;
1780                 break;
1781         case MSR_KVM_SYSTEM_TIME:
1782         case MSR_KVM_SYSTEM_TIME_NEW:
1783                 data = vcpu->arch.time;
1784                 break;
1785         case MSR_IA32_P5_MC_ADDR:
1786         case MSR_IA32_P5_MC_TYPE:
1787         case MSR_IA32_MCG_CAP:
1788         case MSR_IA32_MCG_CTL:
1789         case MSR_IA32_MCG_STATUS:
1790         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1791                 return get_msr_mce(vcpu, msr, pdata);
1792         case MSR_K7_CLK_CTL:
1793                 /*
1794                  * Provide expected ramp-up count for K7. All other
1795                  * are set to zero, indicating minimum divisors for
1796                  * every field.
1797                  *
1798                  * This prevents guest kernels on AMD host with CPU
1799                  * type 6, model 8 and higher from exploding due to
1800                  * the rdmsr failing.
1801                  */
1802                 data = 0x20000000;
1803                 break;
1804         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1805                 if (kvm_hv_msr_partition_wide(msr)) {
1806                         int r;
1807                         mutex_lock(&vcpu->kvm->lock);
1808                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1809                         mutex_unlock(&vcpu->kvm->lock);
1810                         return r;
1811                 } else
1812                         return get_msr_hyperv(vcpu, msr, pdata);
1813                 break;
1814         default:
1815                 if (!ignore_msrs) {
1816                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1817                         return 1;
1818                 } else {
1819                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1820                         data = 0;
1821                 }
1822                 break;
1823         }
1824         *pdata = data;
1825         return 0;
1826 }
1827 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1828
1829 /*
1830  * Read or write a bunch of msrs. All parameters are kernel addresses.
1831  *
1832  * @return number of msrs set successfully.
1833  */
1834 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1835                     struct kvm_msr_entry *entries,
1836                     int (*do_msr)(struct kvm_vcpu *vcpu,
1837                                   unsigned index, u64 *data))
1838 {
1839         int i, idx;
1840
1841         idx = srcu_read_lock(&vcpu->kvm->srcu);
1842         for (i = 0; i < msrs->nmsrs; ++i)
1843                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1844                         break;
1845         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1846
1847         return i;
1848 }
1849
1850 /*
1851  * Read or write a bunch of msrs. Parameters are user addresses.
1852  *
1853  * @return number of msrs set successfully.
1854  */
1855 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1856                   int (*do_msr)(struct kvm_vcpu *vcpu,
1857                                 unsigned index, u64 *data),
1858                   int writeback)
1859 {
1860         struct kvm_msrs msrs;
1861         struct kvm_msr_entry *entries;
1862         int r, n;
1863         unsigned size;
1864
1865         r = -EFAULT;
1866         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1867                 goto out;
1868
1869         r = -E2BIG;
1870         if (msrs.nmsrs >= MAX_IO_MSRS)
1871                 goto out;
1872
1873         r = -ENOMEM;
1874         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1875         entries = kmalloc(size, GFP_KERNEL);
1876         if (!entries)
1877                 goto out;
1878
1879         r = -EFAULT;
1880         if (copy_from_user(entries, user_msrs->entries, size))
1881                 goto out_free;
1882
1883         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1884         if (r < 0)
1885                 goto out_free;
1886
1887         r = -EFAULT;
1888         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1889                 goto out_free;
1890
1891         r = n;
1892
1893 out_free:
1894         kfree(entries);
1895 out:
1896         return r;
1897 }
1898
1899 int kvm_dev_ioctl_check_extension(long ext)
1900 {
1901         int r;
1902
1903         switch (ext) {
1904         case KVM_CAP_IRQCHIP:
1905         case KVM_CAP_HLT:
1906         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1907         case KVM_CAP_SET_TSS_ADDR:
1908         case KVM_CAP_EXT_CPUID:
1909         case KVM_CAP_CLOCKSOURCE:
1910         case KVM_CAP_PIT:
1911         case KVM_CAP_NOP_IO_DELAY:
1912         case KVM_CAP_MP_STATE:
1913         case KVM_CAP_SYNC_MMU:
1914         case KVM_CAP_REINJECT_CONTROL:
1915         case KVM_CAP_IRQ_INJECT_STATUS:
1916         case KVM_CAP_ASSIGN_DEV_IRQ:
1917         case KVM_CAP_IRQFD:
1918         case KVM_CAP_IOEVENTFD:
1919         case KVM_CAP_PIT2:
1920         case KVM_CAP_PIT_STATE2:
1921         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1922         case KVM_CAP_XEN_HVM:
1923         case KVM_CAP_ADJUST_CLOCK:
1924         case KVM_CAP_VCPU_EVENTS:
1925         case KVM_CAP_HYPERV:
1926         case KVM_CAP_HYPERV_VAPIC:
1927         case KVM_CAP_HYPERV_SPIN:
1928         case KVM_CAP_PCI_SEGMENT:
1929         case KVM_CAP_DEBUGREGS:
1930         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1931         case KVM_CAP_XSAVE:
1932                 r = 1;
1933                 break;
1934         case KVM_CAP_COALESCED_MMIO:
1935                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1936                 break;
1937         case KVM_CAP_VAPIC:
1938                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1939                 break;
1940         case KVM_CAP_NR_VCPUS:
1941                 r = KVM_MAX_VCPUS;
1942                 break;
1943         case KVM_CAP_NR_MEMSLOTS:
1944                 r = KVM_MEMORY_SLOTS;
1945                 break;
1946         case KVM_CAP_PV_MMU:    /* obsolete */
1947                 r = 0;
1948                 break;
1949         case KVM_CAP_IOMMU:
1950                 r = iommu_found();
1951                 break;
1952         case KVM_CAP_MCE:
1953                 r = KVM_MAX_MCE_BANKS;
1954                 break;
1955         case KVM_CAP_XCRS:
1956                 r = cpu_has_xsave;
1957                 break;
1958         default:
1959                 r = 0;
1960                 break;
1961         }
1962         return r;
1963
1964 }
1965
1966 long kvm_arch_dev_ioctl(struct file *filp,
1967                         unsigned int ioctl, unsigned long arg)
1968 {
1969         void __user *argp = (void __user *)arg;
1970         long r;
1971
1972         switch (ioctl) {
1973         case KVM_GET_MSR_INDEX_LIST: {
1974                 struct kvm_msr_list __user *user_msr_list = argp;
1975                 struct kvm_msr_list msr_list;
1976                 unsigned n;
1977
1978                 r = -EFAULT;
1979                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1980                         goto out;
1981                 n = msr_list.nmsrs;
1982                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1983                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1984                         goto out;
1985                 r = -E2BIG;
1986                 if (n < msr_list.nmsrs)
1987                         goto out;
1988                 r = -EFAULT;
1989                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1990                                  num_msrs_to_save * sizeof(u32)))
1991                         goto out;
1992                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1993                                  &emulated_msrs,
1994                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1995                         goto out;
1996                 r = 0;
1997                 break;
1998         }
1999         case KVM_GET_SUPPORTED_CPUID: {
2000                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2001                 struct kvm_cpuid2 cpuid;
2002
2003                 r = -EFAULT;
2004                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2005                         goto out;
2006                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2007                                                       cpuid_arg->entries);
2008                 if (r)
2009                         goto out;
2010
2011                 r = -EFAULT;
2012                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2013                         goto out;
2014                 r = 0;
2015                 break;
2016         }
2017         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2018                 u64 mce_cap;
2019
2020                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2021                 r = -EFAULT;
2022                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2023                         goto out;
2024                 r = 0;
2025                 break;
2026         }
2027         default:
2028                 r = -EINVAL;
2029         }
2030 out:
2031         return r;
2032 }
2033
2034 static void wbinvd_ipi(void *garbage)
2035 {
2036         wbinvd();
2037 }
2038
2039 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2040 {
2041         return vcpu->kvm->arch.iommu_domain &&
2042                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2043 }
2044
2045 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2046 {
2047         /* Address WBINVD may be executed by guest */
2048         if (need_emulate_wbinvd(vcpu)) {
2049                 if (kvm_x86_ops->has_wbinvd_exit())
2050                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2051                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2052                         smp_call_function_single(vcpu->cpu,
2053                                         wbinvd_ipi, NULL, 1);
2054         }
2055
2056         kvm_x86_ops->vcpu_load(vcpu, cpu);
2057         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2058                 /* Make sure TSC doesn't go backwards */
2059                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2060                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2061                 if (tsc_delta < 0)
2062                         mark_tsc_unstable("KVM discovered backwards TSC");
2063                 if (check_tsc_unstable()) {
2064                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2065                         vcpu->arch.tsc_catchup = 1;
2066                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2067                 }
2068                 if (vcpu->cpu != cpu)
2069                         kvm_migrate_timers(vcpu);
2070                 vcpu->cpu = cpu;
2071         }
2072 }
2073
2074 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2075 {
2076         kvm_x86_ops->vcpu_put(vcpu);
2077         kvm_put_guest_fpu(vcpu);
2078         vcpu->arch.last_host_tsc = native_read_tsc();
2079 }
2080
2081 static int is_efer_nx(void)
2082 {
2083         unsigned long long efer = 0;
2084
2085         rdmsrl_safe(MSR_EFER, &efer);
2086         return efer & EFER_NX;
2087 }
2088
2089 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2090 {
2091         int i;
2092         struct kvm_cpuid_entry2 *e, *entry;
2093
2094         entry = NULL;
2095         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2096                 e = &vcpu->arch.cpuid_entries[i];
2097                 if (e->function == 0x80000001) {
2098                         entry = e;
2099                         break;
2100                 }
2101         }
2102         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2103                 entry->edx &= ~(1 << 20);
2104                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2105         }
2106 }
2107
2108 /* when an old userspace process fills a new kernel module */
2109 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2110                                     struct kvm_cpuid *cpuid,
2111                                     struct kvm_cpuid_entry __user *entries)
2112 {
2113         int r, i;
2114         struct kvm_cpuid_entry *cpuid_entries;
2115
2116         r = -E2BIG;
2117         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2118                 goto out;
2119         r = -ENOMEM;
2120         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2121         if (!cpuid_entries)
2122                 goto out;
2123         r = -EFAULT;
2124         if (copy_from_user(cpuid_entries, entries,
2125                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2126                 goto out_free;
2127         for (i = 0; i < cpuid->nent; i++) {
2128                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2129                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2130                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2131                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2132                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2133                 vcpu->arch.cpuid_entries[i].index = 0;
2134                 vcpu->arch.cpuid_entries[i].flags = 0;
2135                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2136                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2137                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2138         }
2139         vcpu->arch.cpuid_nent = cpuid->nent;
2140         cpuid_fix_nx_cap(vcpu);
2141         r = 0;
2142         kvm_apic_set_version(vcpu);
2143         kvm_x86_ops->cpuid_update(vcpu);
2144         update_cpuid(vcpu);
2145
2146 out_free:
2147         vfree(cpuid_entries);
2148 out:
2149         return r;
2150 }
2151
2152 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2153                                      struct kvm_cpuid2 *cpuid,
2154                                      struct kvm_cpuid_entry2 __user *entries)
2155 {
2156         int r;
2157
2158         r = -E2BIG;
2159         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2160                 goto out;
2161         r = -EFAULT;
2162         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2163                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2164                 goto out;
2165         vcpu->arch.cpuid_nent = cpuid->nent;
2166         kvm_apic_set_version(vcpu);
2167         kvm_x86_ops->cpuid_update(vcpu);
2168         update_cpuid(vcpu);
2169         return 0;
2170
2171 out:
2172         return r;
2173 }
2174
2175 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2176                                      struct kvm_cpuid2 *cpuid,
2177                                      struct kvm_cpuid_entry2 __user *entries)
2178 {
2179         int r;
2180
2181         r = -E2BIG;
2182         if (cpuid->nent < vcpu->arch.cpuid_nent)
2183                 goto out;
2184         r = -EFAULT;
2185         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2186                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2187                 goto out;
2188         return 0;
2189
2190 out:
2191         cpuid->nent = vcpu->arch.cpuid_nent;
2192         return r;
2193 }
2194
2195 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2196                            u32 index)
2197 {
2198         entry->function = function;
2199         entry->index = index;
2200         cpuid_count(entry->function, entry->index,
2201                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2202         entry->flags = 0;
2203 }
2204
2205 #define F(x) bit(X86_FEATURE_##x)
2206
2207 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2208                          u32 index, int *nent, int maxnent)
2209 {
2210         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2211 #ifdef CONFIG_X86_64
2212         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2213                                 ? F(GBPAGES) : 0;
2214         unsigned f_lm = F(LM);
2215 #else
2216         unsigned f_gbpages = 0;
2217         unsigned f_lm = 0;
2218 #endif
2219         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2220
2221         /* cpuid 1.edx */
2222         const u32 kvm_supported_word0_x86_features =
2223                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2224                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2225                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2226                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2227                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2228                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2229                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2230                 0 /* HTT, TM, Reserved, PBE */;
2231         /* cpuid 0x80000001.edx */
2232         const u32 kvm_supported_word1_x86_features =
2233                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2234                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2235                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2236                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2237                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2238                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2239                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2240                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2241         /* cpuid 1.ecx */
2242         const u32 kvm_supported_word4_x86_features =
2243                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2244                 0 /* DS-CPL, VMX, SMX, EST */ |
2245                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2246                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2247                 0 /* Reserved, DCA */ | F(XMM4_1) |
2248                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2249                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2250                 F(F16C);
2251         /* cpuid 0x80000001.ecx */
2252         const u32 kvm_supported_word6_x86_features =
2253                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2254                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2255                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2256                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2257
2258         /* all calls to cpuid_count() should be made on the same cpu */
2259         get_cpu();
2260         do_cpuid_1_ent(entry, function, index);
2261         ++*nent;
2262
2263         switch (function) {
2264         case 0:
2265                 entry->eax = min(entry->eax, (u32)0xd);
2266                 break;
2267         case 1:
2268                 entry->edx &= kvm_supported_word0_x86_features;
2269                 entry->ecx &= kvm_supported_word4_x86_features;
2270                 /* we support x2apic emulation even if host does not support
2271                  * it since we emulate x2apic in software */
2272                 entry->ecx |= F(X2APIC);
2273                 break;
2274         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2275          * may return different values. This forces us to get_cpu() before
2276          * issuing the first command, and also to emulate this annoying behavior
2277          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2278         case 2: {
2279                 int t, times = entry->eax & 0xff;
2280
2281                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2282                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2283                 for (t = 1; t < times && *nent < maxnent; ++t) {
2284                         do_cpuid_1_ent(&entry[t], function, 0);
2285                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2286                         ++*nent;
2287                 }
2288                 break;
2289         }
2290         /* function 4 and 0xb have additional index. */
2291         case 4: {
2292                 int i, cache_type;
2293
2294                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2295                 /* read more entries until cache_type is zero */
2296                 for (i = 1; *nent < maxnent; ++i) {
2297                         cache_type = entry[i - 1].eax & 0x1f;
2298                         if (!cache_type)
2299                                 break;
2300                         do_cpuid_1_ent(&entry[i], function, i);
2301                         entry[i].flags |=
2302                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2303                         ++*nent;
2304                 }
2305                 break;
2306         }
2307         case 0xb: {
2308                 int i, level_type;
2309
2310                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2311                 /* read more entries until level_type is zero */
2312                 for (i = 1; *nent < maxnent; ++i) {
2313                         level_type = entry[i - 1].ecx & 0xff00;
2314                         if (!level_type)
2315                                 break;
2316                         do_cpuid_1_ent(&entry[i], function, i);
2317                         entry[i].flags |=
2318                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2319                         ++*nent;
2320                 }
2321                 break;
2322         }
2323         case 0xd: {
2324                 int i;
2325
2326                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2327                 for (i = 1; *nent < maxnent; ++i) {
2328                         if (entry[i - 1].eax == 0 && i != 2)
2329                                 break;
2330                         do_cpuid_1_ent(&entry[i], function, i);
2331                         entry[i].flags |=
2332                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2333                         ++*nent;
2334                 }
2335                 break;
2336         }
2337         case KVM_CPUID_SIGNATURE: {
2338                 char signature[12] = "KVMKVMKVM\0\0";
2339                 u32 *sigptr = (u32 *)signature;
2340                 entry->eax = 0;
2341                 entry->ebx = sigptr[0];
2342                 entry->ecx = sigptr[1];
2343                 entry->edx = sigptr[2];
2344                 break;
2345         }
2346         case KVM_CPUID_FEATURES:
2347                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2348                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2349                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2350                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2351                 entry->ebx = 0;
2352                 entry->ecx = 0;
2353                 entry->edx = 0;
2354                 break;
2355         case 0x80000000:
2356                 entry->eax = min(entry->eax, 0x8000001a);
2357                 break;
2358         case 0x80000001:
2359                 entry->edx &= kvm_supported_word1_x86_features;
2360                 entry->ecx &= kvm_supported_word6_x86_features;
2361                 break;
2362         }
2363
2364         kvm_x86_ops->set_supported_cpuid(function, entry);
2365
2366         put_cpu();
2367 }
2368
2369 #undef F
2370
2371 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2372                                      struct kvm_cpuid_entry2 __user *entries)
2373 {
2374         struct kvm_cpuid_entry2 *cpuid_entries;
2375         int limit, nent = 0, r = -E2BIG;
2376         u32 func;
2377
2378         if (cpuid->nent < 1)
2379                 goto out;
2380         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2381                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2382         r = -ENOMEM;
2383         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2384         if (!cpuid_entries)
2385                 goto out;
2386
2387         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2388         limit = cpuid_entries[0].eax;
2389         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2390                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2391                              &nent, cpuid->nent);
2392         r = -E2BIG;
2393         if (nent >= cpuid->nent)
2394                 goto out_free;
2395
2396         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2397         limit = cpuid_entries[nent - 1].eax;
2398         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2399                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2400                              &nent, cpuid->nent);
2401
2402
2403
2404         r = -E2BIG;
2405         if (nent >= cpuid->nent)
2406                 goto out_free;
2407
2408         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2409                      cpuid->nent);
2410
2411         r = -E2BIG;
2412         if (nent >= cpuid->nent)
2413                 goto out_free;
2414
2415         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2416                      cpuid->nent);
2417
2418         r = -E2BIG;
2419         if (nent >= cpuid->nent)
2420                 goto out_free;
2421
2422         r = -EFAULT;
2423         if (copy_to_user(entries, cpuid_entries,
2424                          nent * sizeof(struct kvm_cpuid_entry2)))
2425                 goto out_free;
2426         cpuid->nent = nent;
2427         r = 0;
2428
2429 out_free:
2430         vfree(cpuid_entries);
2431 out:
2432         return r;
2433 }
2434
2435 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2436                                     struct kvm_lapic_state *s)
2437 {
2438         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2439
2440         return 0;
2441 }
2442
2443 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2444                                     struct kvm_lapic_state *s)
2445 {
2446         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2447         kvm_apic_post_state_restore(vcpu);
2448         update_cr8_intercept(vcpu);
2449
2450         return 0;
2451 }
2452
2453 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2454                                     struct kvm_interrupt *irq)
2455 {
2456         if (irq->irq < 0 || irq->irq >= 256)
2457                 return -EINVAL;
2458         if (irqchip_in_kernel(vcpu->kvm))
2459                 return -ENXIO;
2460
2461         kvm_queue_interrupt(vcpu, irq->irq, false);
2462         kvm_make_request(KVM_REQ_EVENT, vcpu);
2463
2464         return 0;
2465 }
2466
2467 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2468 {
2469         kvm_inject_nmi(vcpu);
2470
2471         return 0;
2472 }
2473
2474 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2475                                            struct kvm_tpr_access_ctl *tac)
2476 {
2477         if (tac->flags)
2478                 return -EINVAL;
2479         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2480         return 0;
2481 }
2482
2483 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2484                                         u64 mcg_cap)
2485 {
2486         int r;
2487         unsigned bank_num = mcg_cap & 0xff, bank;
2488
2489         r = -EINVAL;
2490         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2491                 goto out;
2492         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2493                 goto out;
2494         r = 0;
2495         vcpu->arch.mcg_cap = mcg_cap;
2496         /* Init IA32_MCG_CTL to all 1s */
2497         if (mcg_cap & MCG_CTL_P)
2498                 vcpu->arch.mcg_ctl = ~(u64)0;
2499         /* Init IA32_MCi_CTL to all 1s */
2500         for (bank = 0; bank < bank_num; bank++)
2501                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2502 out:
2503         return r;
2504 }
2505
2506 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2507                                       struct kvm_x86_mce *mce)
2508 {
2509         u64 mcg_cap = vcpu->arch.mcg_cap;
2510         unsigned bank_num = mcg_cap & 0xff;
2511         u64 *banks = vcpu->arch.mce_banks;
2512
2513         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2514                 return -EINVAL;
2515         /*
2516          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2517          * reporting is disabled
2518          */
2519         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2520             vcpu->arch.mcg_ctl != ~(u64)0)
2521                 return 0;
2522         banks += 4 * mce->bank;
2523         /*
2524          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2525          * reporting is disabled for the bank
2526          */
2527         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2528                 return 0;
2529         if (mce->status & MCI_STATUS_UC) {
2530                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2531                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2532                         printk(KERN_DEBUG "kvm: set_mce: "
2533                                "injects mce exception while "
2534                                "previous one is in progress!\n");
2535                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2536                         return 0;
2537                 }
2538                 if (banks[1] & MCI_STATUS_VAL)
2539                         mce->status |= MCI_STATUS_OVER;
2540                 banks[2] = mce->addr;
2541                 banks[3] = mce->misc;
2542                 vcpu->arch.mcg_status = mce->mcg_status;
2543                 banks[1] = mce->status;
2544                 kvm_queue_exception(vcpu, MC_VECTOR);
2545         } else if (!(banks[1] & MCI_STATUS_VAL)
2546                    || !(banks[1] & MCI_STATUS_UC)) {
2547                 if (banks[1] & MCI_STATUS_VAL)
2548                         mce->status |= MCI_STATUS_OVER;
2549                 banks[2] = mce->addr;
2550                 banks[3] = mce->misc;
2551                 banks[1] = mce->status;
2552         } else
2553                 banks[1] |= MCI_STATUS_OVER;
2554         return 0;
2555 }
2556
2557 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2558                                                struct kvm_vcpu_events *events)
2559 {
2560         events->exception.injected =
2561                 vcpu->arch.exception.pending &&
2562                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2563         events->exception.nr = vcpu->arch.exception.nr;
2564         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2565         events->exception.pad = 0;
2566         events->exception.error_code = vcpu->arch.exception.error_code;
2567
2568         events->interrupt.injected =
2569                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2570         events->interrupt.nr = vcpu->arch.interrupt.nr;
2571         events->interrupt.soft = 0;
2572         events->interrupt.shadow =
2573                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2574                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2575
2576         events->nmi.injected = vcpu->arch.nmi_injected;
2577         events->nmi.pending = vcpu->arch.nmi_pending;
2578         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2579         events->nmi.pad = 0;
2580
2581         events->sipi_vector = vcpu->arch.sipi_vector;
2582
2583         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2584                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2585                          | KVM_VCPUEVENT_VALID_SHADOW);
2586         memset(&events->reserved, 0, sizeof(events->reserved));
2587 }
2588
2589 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2590                                               struct kvm_vcpu_events *events)
2591 {
2592         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2593                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2594                               | KVM_VCPUEVENT_VALID_SHADOW))
2595                 return -EINVAL;
2596
2597         vcpu->arch.exception.pending = events->exception.injected;
2598         vcpu->arch.exception.nr = events->exception.nr;
2599         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2600         vcpu->arch.exception.error_code = events->exception.error_code;
2601
2602         vcpu->arch.interrupt.pending = events->interrupt.injected;
2603         vcpu->arch.interrupt.nr = events->interrupt.nr;
2604         vcpu->arch.interrupt.soft = events->interrupt.soft;
2605         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2606                 kvm_pic_clear_isr_ack(vcpu->kvm);
2607         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2608                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2609                                                   events->interrupt.shadow);
2610
2611         vcpu->arch.nmi_injected = events->nmi.injected;
2612         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2613                 vcpu->arch.nmi_pending = events->nmi.pending;
2614         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2615
2616         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2617                 vcpu->arch.sipi_vector = events->sipi_vector;
2618
2619         kvm_make_request(KVM_REQ_EVENT, vcpu);
2620
2621         return 0;
2622 }
2623
2624 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2625                                              struct kvm_debugregs *dbgregs)
2626 {
2627         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2628         dbgregs->dr6 = vcpu->arch.dr6;
2629         dbgregs->dr7 = vcpu->arch.dr7;
2630         dbgregs->flags = 0;
2631         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2632 }
2633
2634 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2635                                             struct kvm_debugregs *dbgregs)
2636 {
2637         if (dbgregs->flags)
2638                 return -EINVAL;
2639
2640         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2641         vcpu->arch.dr6 = dbgregs->dr6;
2642         vcpu->arch.dr7 = dbgregs->dr7;
2643
2644         return 0;
2645 }
2646
2647 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2648                                          struct kvm_xsave *guest_xsave)
2649 {
2650         if (cpu_has_xsave)
2651                 memcpy(guest_xsave->region,
2652                         &vcpu->arch.guest_fpu.state->xsave,
2653                         xstate_size);
2654         else {
2655                 memcpy(guest_xsave->region,
2656                         &vcpu->arch.guest_fpu.state->fxsave,
2657                         sizeof(struct i387_fxsave_struct));
2658                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2659                         XSTATE_FPSSE;
2660         }
2661 }
2662
2663 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2664                                         struct kvm_xsave *guest_xsave)
2665 {
2666         u64 xstate_bv =
2667                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2668
2669         if (cpu_has_xsave)
2670                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2671                         guest_xsave->region, xstate_size);
2672         else {
2673                 if (xstate_bv & ~XSTATE_FPSSE)
2674                         return -EINVAL;
2675                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2676                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2677         }
2678         return 0;
2679 }
2680
2681 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2682                                         struct kvm_xcrs *guest_xcrs)
2683 {
2684         if (!cpu_has_xsave) {
2685                 guest_xcrs->nr_xcrs = 0;
2686                 return;
2687         }
2688
2689         guest_xcrs->nr_xcrs = 1;
2690         guest_xcrs->flags = 0;
2691         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2692         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2693 }
2694
2695 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2696                                        struct kvm_xcrs *guest_xcrs)
2697 {
2698         int i, r = 0;
2699
2700         if (!cpu_has_xsave)
2701                 return -EINVAL;
2702
2703         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2704                 return -EINVAL;
2705
2706         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2707                 /* Only support XCR0 currently */
2708                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2709                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2710                                 guest_xcrs->xcrs[0].value);
2711                         break;
2712                 }
2713         if (r)
2714                 r = -EINVAL;
2715         return r;
2716 }
2717
2718 long kvm_arch_vcpu_ioctl(struct file *filp,
2719                          unsigned int ioctl, unsigned long arg)
2720 {
2721         struct kvm_vcpu *vcpu = filp->private_data;
2722         void __user *argp = (void __user *)arg;
2723         int r;
2724         union {
2725                 struct kvm_lapic_state *lapic;
2726                 struct kvm_xsave *xsave;
2727                 struct kvm_xcrs *xcrs;
2728                 void *buffer;
2729         } u;
2730
2731         u.buffer = NULL;
2732         switch (ioctl) {
2733         case KVM_GET_LAPIC: {
2734                 r = -EINVAL;
2735                 if (!vcpu->arch.apic)
2736                         goto out;
2737                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2738
2739                 r = -ENOMEM;
2740                 if (!u.lapic)
2741                         goto out;
2742                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2743                 if (r)
2744                         goto out;
2745                 r = -EFAULT;
2746                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2747                         goto out;
2748                 r = 0;
2749                 break;
2750         }
2751         case KVM_SET_LAPIC: {
2752                 r = -EINVAL;
2753                 if (!vcpu->arch.apic)
2754                         goto out;
2755                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2756                 r = -ENOMEM;
2757                 if (!u.lapic)
2758                         goto out;
2759                 r = -EFAULT;
2760                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2761                         goto out;
2762                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2763                 if (r)
2764                         goto out;
2765                 r = 0;
2766                 break;
2767         }
2768         case KVM_INTERRUPT: {
2769                 struct kvm_interrupt irq;
2770
2771                 r = -EFAULT;
2772                 if (copy_from_user(&irq, argp, sizeof irq))
2773                         goto out;
2774                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2775                 if (r)
2776                         goto out;
2777                 r = 0;
2778                 break;
2779         }
2780         case KVM_NMI: {
2781                 r = kvm_vcpu_ioctl_nmi(vcpu);
2782                 if (r)
2783                         goto out;
2784                 r = 0;
2785                 break;
2786         }
2787         case KVM_SET_CPUID: {
2788                 struct kvm_cpuid __user *cpuid_arg = argp;
2789                 struct kvm_cpuid cpuid;
2790
2791                 r = -EFAULT;
2792                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2793                         goto out;
2794                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2795                 if (r)
2796                         goto out;
2797                 break;
2798         }
2799         case KVM_SET_CPUID2: {
2800                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2801                 struct kvm_cpuid2 cpuid;
2802
2803                 r = -EFAULT;
2804                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2805                         goto out;
2806                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2807                                               cpuid_arg->entries);
2808                 if (r)
2809                         goto out;
2810                 break;
2811         }
2812         case KVM_GET_CPUID2: {
2813                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2814                 struct kvm_cpuid2 cpuid;
2815
2816                 r = -EFAULT;
2817                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2818                         goto out;
2819                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2820                                               cpuid_arg->entries);
2821                 if (r)
2822                         goto out;
2823                 r = -EFAULT;
2824                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2825                         goto out;
2826                 r = 0;
2827                 break;
2828         }
2829         case KVM_GET_MSRS:
2830                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2831                 break;
2832         case KVM_SET_MSRS:
2833                 r = msr_io(vcpu, argp, do_set_msr, 0);
2834                 break;
2835         case KVM_TPR_ACCESS_REPORTING: {
2836                 struct kvm_tpr_access_ctl tac;
2837
2838                 r = -EFAULT;
2839                 if (copy_from_user(&tac, argp, sizeof tac))
2840                         goto out;
2841                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2842                 if (r)
2843                         goto out;
2844                 r = -EFAULT;
2845                 if (copy_to_user(argp, &tac, sizeof tac))
2846                         goto out;
2847                 r = 0;
2848                 break;
2849         };
2850         case KVM_SET_VAPIC_ADDR: {
2851                 struct kvm_vapic_addr va;
2852
2853                 r = -EINVAL;
2854                 if (!irqchip_in_kernel(vcpu->kvm))
2855                         goto out;
2856                 r = -EFAULT;
2857                 if (copy_from_user(&va, argp, sizeof va))
2858                         goto out;
2859                 r = 0;
2860                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2861                 break;
2862         }
2863         case KVM_X86_SETUP_MCE: {
2864                 u64 mcg_cap;
2865
2866                 r = -EFAULT;
2867                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2868                         goto out;
2869                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2870                 break;
2871         }
2872         case KVM_X86_SET_MCE: {
2873                 struct kvm_x86_mce mce;
2874
2875                 r = -EFAULT;
2876                 if (copy_from_user(&mce, argp, sizeof mce))
2877                         goto out;
2878                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2879                 break;
2880         }
2881         case KVM_GET_VCPU_EVENTS: {
2882                 struct kvm_vcpu_events events;
2883
2884                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2885
2886                 r = -EFAULT;
2887                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2888                         break;
2889                 r = 0;
2890                 break;
2891         }
2892         case KVM_SET_VCPU_EVENTS: {
2893                 struct kvm_vcpu_events events;
2894
2895                 r = -EFAULT;
2896                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2897                         break;
2898
2899                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2900                 break;
2901         }
2902         case KVM_GET_DEBUGREGS: {
2903                 struct kvm_debugregs dbgregs;
2904
2905                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2906
2907                 r = -EFAULT;
2908                 if (copy_to_user(argp, &dbgregs,
2909                                  sizeof(struct kvm_debugregs)))
2910                         break;
2911                 r = 0;
2912                 break;
2913         }
2914         case KVM_SET_DEBUGREGS: {
2915                 struct kvm_debugregs dbgregs;
2916
2917                 r = -EFAULT;
2918                 if (copy_from_user(&dbgregs, argp,
2919                                    sizeof(struct kvm_debugregs)))
2920                         break;
2921
2922                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2923                 break;
2924         }
2925         case KVM_GET_XSAVE: {
2926                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2927                 r = -ENOMEM;
2928                 if (!u.xsave)
2929                         break;
2930
2931                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2932
2933                 r = -EFAULT;
2934                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2935                         break;
2936                 r = 0;
2937                 break;
2938         }
2939         case KVM_SET_XSAVE: {
2940                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2941                 r = -ENOMEM;
2942                 if (!u.xsave)
2943                         break;
2944
2945                 r = -EFAULT;
2946                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2947                         break;
2948
2949                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2950                 break;
2951         }
2952         case KVM_GET_XCRS: {
2953                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2954                 r = -ENOMEM;
2955                 if (!u.xcrs)
2956                         break;
2957
2958                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2959
2960                 r = -EFAULT;
2961                 if (copy_to_user(argp, u.xcrs,
2962                                  sizeof(struct kvm_xcrs)))
2963                         break;
2964                 r = 0;
2965                 break;
2966         }
2967         case KVM_SET_XCRS: {
2968                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2969                 r = -ENOMEM;
2970                 if (!u.xcrs)
2971                         break;
2972
2973                 r = -EFAULT;
2974                 if (copy_from_user(u.xcrs, argp,
2975                                    sizeof(struct kvm_xcrs)))
2976                         break;
2977
2978                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2979                 break;
2980         }
2981         default:
2982                 r = -EINVAL;
2983         }
2984 out:
2985         kfree(u.buffer);
2986         return r;
2987 }
2988
2989 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2990 {
2991         int ret;
2992
2993         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2994                 return -1;
2995         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2996         return ret;
2997 }
2998
2999 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3000                                               u64 ident_addr)
3001 {
3002         kvm->arch.ept_identity_map_addr = ident_addr;
3003         return 0;
3004 }
3005
3006 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3007                                           u32 kvm_nr_mmu_pages)
3008 {
3009         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3010                 return -EINVAL;
3011
3012         mutex_lock(&kvm->slots_lock);
3013         spin_lock(&kvm->mmu_lock);
3014
3015         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3016         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3017
3018         spin_unlock(&kvm->mmu_lock);
3019         mutex_unlock(&kvm->slots_lock);
3020         return 0;
3021 }
3022
3023 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3024 {
3025         return kvm->arch.n_max_mmu_pages;
3026 }
3027
3028 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3029 {
3030         int r;
3031
3032         r = 0;
3033         switch (chip->chip_id) {
3034         case KVM_IRQCHIP_PIC_MASTER:
3035                 memcpy(&chip->chip.pic,
3036                         &pic_irqchip(kvm)->pics[0],
3037                         sizeof(struct kvm_pic_state));
3038                 break;
3039         case KVM_IRQCHIP_PIC_SLAVE:
3040                 memcpy(&chip->chip.pic,
3041                         &pic_irqchip(kvm)->pics[1],
3042                         sizeof(struct kvm_pic_state));
3043                 break;
3044         case KVM_IRQCHIP_IOAPIC:
3045                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3046                 break;
3047         default:
3048                 r = -EINVAL;
3049                 break;
3050         }
3051         return r;
3052 }
3053
3054 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3055 {
3056         int r;
3057
3058         r = 0;
3059         switch (chip->chip_id) {
3060         case KVM_IRQCHIP_PIC_MASTER:
3061                 spin_lock(&pic_irqchip(kvm)->lock);
3062                 memcpy(&pic_irqchip(kvm)->pics[0],
3063                         &chip->chip.pic,
3064                         sizeof(struct kvm_pic_state));
3065                 spin_unlock(&pic_irqchip(kvm)->lock);
3066                 break;
3067         case KVM_IRQCHIP_PIC_SLAVE:
3068                 spin_lock(&pic_irqchip(kvm)->lock);
3069                 memcpy(&pic_irqchip(kvm)->pics[1],
3070                         &chip->chip.pic,
3071                         sizeof(struct kvm_pic_state));
3072                 spin_unlock(&pic_irqchip(kvm)->lock);
3073                 break;
3074         case KVM_IRQCHIP_IOAPIC:
3075                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3076                 break;
3077         default:
3078                 r = -EINVAL;
3079                 break;
3080         }
3081         kvm_pic_update_irq(pic_irqchip(kvm));
3082         return r;
3083 }
3084
3085 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3086 {
3087         int r = 0;
3088
3089         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3090         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3091         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3092         return r;
3093 }
3094
3095 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3096 {
3097         int r = 0;
3098
3099         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3100         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3101         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3102         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3103         return r;
3104 }
3105
3106 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3107 {
3108         int r = 0;
3109
3110         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3111         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3112                 sizeof(ps->channels));
3113         ps->flags = kvm->arch.vpit->pit_state.flags;
3114         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3115         memset(&ps->reserved, 0, sizeof(ps->reserved));
3116         return r;
3117 }
3118
3119 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3120 {
3121         int r = 0, start = 0;
3122         u32 prev_legacy, cur_legacy;
3123         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3124         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3125         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3126         if (!prev_legacy && cur_legacy)
3127                 start = 1;
3128         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3129                sizeof(kvm->arch.vpit->pit_state.channels));
3130         kvm->arch.vpit->pit_state.flags = ps->flags;
3131         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3132         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3133         return r;
3134 }
3135
3136 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3137                                  struct kvm_reinject_control *control)
3138 {
3139         if (!kvm->arch.vpit)
3140                 return -ENXIO;
3141         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3142         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3143         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3144         return 0;
3145 }
3146
3147 /*
3148  * Get (and clear) the dirty memory log for a memory slot.
3149  */
3150 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3151                                       struct kvm_dirty_log *log)
3152 {
3153         int r, i;
3154         struct kvm_memory_slot *memslot;
3155         unsigned long n;
3156         unsigned long is_dirty = 0;
3157
3158         mutex_lock(&kvm->slots_lock);
3159
3160         r = -EINVAL;
3161         if (log->slot >= KVM_MEMORY_SLOTS)
3162                 goto out;
3163
3164         memslot = &kvm->memslots->memslots[log->slot];
3165         r = -ENOENT;
3166         if (!memslot->dirty_bitmap)
3167                 goto out;
3168
3169         n = kvm_dirty_bitmap_bytes(memslot);
3170
3171         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3172                 is_dirty = memslot->dirty_bitmap[i];
3173
3174         /* If nothing is dirty, don't bother messing with page tables. */
3175         if (is_dirty) {
3176                 struct kvm_memslots *slots, *old_slots;
3177                 unsigned long *dirty_bitmap;
3178
3179                 r = -ENOMEM;
3180                 dirty_bitmap = vmalloc(n);
3181                 if (!dirty_bitmap)
3182                         goto out;
3183                 memset(dirty_bitmap, 0, n);
3184
3185                 r = -ENOMEM;
3186                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3187                 if (!slots) {
3188                         vfree(dirty_bitmap);
3189                         goto out;
3190                 }
3191                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3192                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3193
3194                 old_slots = kvm->memslots;
3195                 rcu_assign_pointer(kvm->memslots, slots);
3196                 synchronize_srcu_expedited(&kvm->srcu);
3197                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3198                 kfree(old_slots);
3199
3200                 spin_lock(&kvm->mmu_lock);
3201                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3202                 spin_unlock(&kvm->mmu_lock);
3203
3204                 r = -EFAULT;
3205                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3206                         vfree(dirty_bitmap);
3207                         goto out;
3208                 }
3209                 vfree(dirty_bitmap);
3210         } else {
3211                 r = -EFAULT;
3212                 if (clear_user(log->dirty_bitmap, n))
3213                         goto out;
3214         }
3215
3216         r = 0;
3217 out:
3218         mutex_unlock(&kvm->slots_lock);
3219         return r;
3220 }
3221
3222 long kvm_arch_vm_ioctl(struct file *filp,
3223                        unsigned int ioctl, unsigned long arg)
3224 {
3225         struct kvm *kvm = filp->private_data;
3226         void __user *argp = (void __user *)arg;
3227         int r = -ENOTTY;
3228         /*
3229          * This union makes it completely explicit to gcc-3.x
3230          * that these two variables' stack usage should be
3231          * combined, not added together.
3232          */
3233         union {
3234                 struct kvm_pit_state ps;
3235                 struct kvm_pit_state2 ps2;
3236                 struct kvm_pit_config pit_config;
3237         } u;
3238
3239         switch (ioctl) {
3240         case KVM_SET_TSS_ADDR:
3241                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3242                 if (r < 0)
3243                         goto out;
3244                 break;
3245         case KVM_SET_IDENTITY_MAP_ADDR: {
3246                 u64 ident_addr;
3247
3248                 r = -EFAULT;
3249                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3250                         goto out;
3251                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3252                 if (r < 0)
3253                         goto out;
3254                 break;
3255         }
3256         case KVM_SET_NR_MMU_PAGES:
3257                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3258                 if (r)
3259                         goto out;
3260                 break;
3261         case KVM_GET_NR_MMU_PAGES:
3262                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3263                 break;
3264         case KVM_CREATE_IRQCHIP: {
3265                 struct kvm_pic *vpic;
3266
3267                 mutex_lock(&kvm->lock);
3268                 r = -EEXIST;
3269                 if (kvm->arch.vpic)
3270                         goto create_irqchip_unlock;
3271                 r = -ENOMEM;
3272                 vpic = kvm_create_pic(kvm);
3273                 if (vpic) {
3274                         r = kvm_ioapic_init(kvm);
3275                         if (r) {
3276                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3277                                                           &vpic->dev);
3278                                 kfree(vpic);
3279                                 goto create_irqchip_unlock;
3280                         }
3281                 } else
3282                         goto create_irqchip_unlock;
3283                 smp_wmb();
3284                 kvm->arch.vpic = vpic;
3285                 smp_wmb();
3286                 r = kvm_setup_default_irq_routing(kvm);
3287                 if (r) {
3288                         mutex_lock(&kvm->irq_lock);
3289                         kvm_ioapic_destroy(kvm);
3290                         kvm_destroy_pic(kvm);
3291                         mutex_unlock(&kvm->irq_lock);
3292                 }
3293         create_irqchip_unlock:
3294                 mutex_unlock(&kvm->lock);
3295                 break;
3296         }
3297         case KVM_CREATE_PIT:
3298                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3299                 goto create_pit;
3300         case KVM_CREATE_PIT2:
3301                 r = -EFAULT;
3302                 if (copy_from_user(&u.pit_config, argp,
3303                                    sizeof(struct kvm_pit_config)))
3304                         goto out;
3305         create_pit:
3306                 mutex_lock(&kvm->slots_lock);
3307                 r = -EEXIST;
3308                 if (kvm->arch.vpit)
3309                         goto create_pit_unlock;
3310                 r = -ENOMEM;
3311                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3312                 if (kvm->arch.vpit)
3313                         r = 0;
3314         create_pit_unlock:
3315                 mutex_unlock(&kvm->slots_lock);
3316                 break;
3317         case KVM_IRQ_LINE_STATUS:
3318         case KVM_IRQ_LINE: {
3319                 struct kvm_irq_level irq_event;
3320
3321                 r = -EFAULT;
3322                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3323                         goto out;
3324                 r = -ENXIO;
3325                 if (irqchip_in_kernel(kvm)) {
3326                         __s32 status;
3327                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3328                                         irq_event.irq, irq_event.level);
3329                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3330                                 r = -EFAULT;
3331                                 irq_event.status = status;
3332                                 if (copy_to_user(argp, &irq_event,
3333                                                         sizeof irq_event))
3334                                         goto out;
3335                         }
3336                         r = 0;
3337                 }
3338                 break;
3339         }
3340         case KVM_GET_IRQCHIP: {
3341                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3342                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3343
3344                 r = -ENOMEM;
3345                 if (!chip)
3346                         goto out;
3347                 r = -EFAULT;
3348                 if (copy_from_user(chip, argp, sizeof *chip))
3349                         goto get_irqchip_out;
3350                 r = -ENXIO;
3351                 if (!irqchip_in_kernel(kvm))
3352                         goto get_irqchip_out;
3353                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3354                 if (r)
3355                         goto get_irqchip_out;
3356                 r = -EFAULT;
3357                 if (copy_to_user(argp, chip, sizeof *chip))
3358                         goto get_irqchip_out;
3359                 r = 0;
3360         get_irqchip_out:
3361                 kfree(chip);
3362                 if (r)
3363                         goto out;
3364                 break;
3365         }
3366         case KVM_SET_IRQCHIP: {
3367                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3368                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3369
3370                 r = -ENOMEM;
3371                 if (!chip)
3372                         goto out;
3373                 r = -EFAULT;
3374                 if (copy_from_user(chip, argp, sizeof *chip))
3375                         goto set_irqchip_out;
3376                 r = -ENXIO;
3377                 if (!irqchip_in_kernel(kvm))
3378                         goto set_irqchip_out;
3379                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3380                 if (r)
3381                         goto set_irqchip_out;
3382                 r = 0;
3383         set_irqchip_out:
3384                 kfree(chip);
3385                 if (r)
3386                         goto out;
3387                 break;
3388         }
3389         case KVM_GET_PIT: {
3390                 r = -EFAULT;
3391                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3392                         goto out;
3393                 r = -ENXIO;
3394                 if (!kvm->arch.vpit)
3395                         goto out;
3396                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3397                 if (r)
3398                         goto out;
3399                 r = -EFAULT;
3400                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3401                         goto out;
3402                 r = 0;
3403                 break;
3404         }
3405         case KVM_SET_PIT: {
3406                 r = -EFAULT;
3407                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3408                         goto out;
3409                 r = -ENXIO;
3410                 if (!kvm->arch.vpit)
3411                         goto out;
3412                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3413                 if (r)
3414                         goto out;
3415                 r = 0;
3416                 break;
3417         }
3418         case KVM_GET_PIT2: {
3419                 r = -ENXIO;
3420                 if (!kvm->arch.vpit)
3421                         goto out;
3422                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3423                 if (r)
3424                         goto out;
3425                 r = -EFAULT;
3426                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3427                         goto out;
3428                 r = 0;
3429                 break;
3430         }
3431         case KVM_SET_PIT2: {
3432                 r = -EFAULT;
3433                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3434                         goto out;
3435                 r = -ENXIO;
3436                 if (!kvm->arch.vpit)
3437                         goto out;
3438                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3439                 if (r)
3440                         goto out;
3441                 r = 0;
3442                 break;
3443         }
3444         case KVM_REINJECT_CONTROL: {
3445                 struct kvm_reinject_control control;
3446                 r =  -EFAULT;
3447                 if (copy_from_user(&control, argp, sizeof(control)))
3448                         goto out;
3449                 r = kvm_vm_ioctl_reinject(kvm, &control);
3450                 if (r)
3451                         goto out;
3452                 r = 0;
3453                 break;
3454         }
3455         case KVM_XEN_HVM_CONFIG: {
3456                 r = -EFAULT;
3457                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3458                                    sizeof(struct kvm_xen_hvm_config)))
3459                         goto out;
3460                 r = -EINVAL;
3461                 if (kvm->arch.xen_hvm_config.flags)
3462                         goto out;
3463                 r = 0;
3464                 break;
3465         }
3466         case KVM_SET_CLOCK: {
3467                 struct kvm_clock_data user_ns;
3468                 u64 now_ns;
3469                 s64 delta;
3470
3471                 r = -EFAULT;
3472                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3473                         goto out;
3474
3475                 r = -EINVAL;
3476                 if (user_ns.flags)
3477                         goto out;
3478
3479                 r = 0;
3480                 local_irq_disable();
3481                 now_ns = get_kernel_ns();
3482                 delta = user_ns.clock - now_ns;
3483                 local_irq_enable();
3484                 kvm->arch.kvmclock_offset = delta;
3485                 break;
3486         }
3487         case KVM_GET_CLOCK: {
3488                 struct kvm_clock_data user_ns;
3489                 u64 now_ns;
3490
3491                 local_irq_disable();
3492                 now_ns = get_kernel_ns();
3493                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3494                 local_irq_enable();
3495                 user_ns.flags = 0;
3496                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3497
3498                 r = -EFAULT;
3499                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3500                         goto out;
3501                 r = 0;
3502                 break;
3503         }
3504
3505         default:
3506                 ;
3507         }
3508 out:
3509         return r;
3510 }
3511
3512 static void kvm_init_msr_list(void)
3513 {
3514         u32 dummy[2];
3515         unsigned i, j;
3516
3517         /* skip the first msrs in the list. KVM-specific */
3518         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3519                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3520                         continue;
3521                 if (j < i)
3522                         msrs_to_save[j] = msrs_to_save[i];
3523                 j++;
3524         }
3525         num_msrs_to_save = j;
3526 }
3527
3528 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3529                            const void *v)
3530 {
3531         if (vcpu->arch.apic &&
3532             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3533                 return 0;
3534
3535         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3536 }
3537
3538 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3539 {
3540         if (vcpu->arch.apic &&
3541             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3542                 return 0;
3543
3544         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3545 }
3546
3547 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3548                         struct kvm_segment *var, int seg)
3549 {
3550         kvm_x86_ops->set_segment(vcpu, var, seg);
3551 }
3552
3553 void kvm_get_segment(struct kvm_vcpu *vcpu,
3554                      struct kvm_segment *var, int seg)
3555 {
3556         kvm_x86_ops->get_segment(vcpu, var, seg);
3557 }
3558
3559 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3560 {
3561         return gpa;
3562 }
3563
3564 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3565 {
3566         gpa_t t_gpa;
3567         u32 error;
3568
3569         BUG_ON(!mmu_is_nested(vcpu));
3570
3571         /* NPT walks are always user-walks */
3572         access |= PFERR_USER_MASK;
3573         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &error);
3574         if (t_gpa == UNMAPPED_GVA)
3575                 vcpu->arch.fault.nested = true;
3576
3577         return t_gpa;
3578 }
3579
3580 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3581 {
3582         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3583         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3584 }
3585
3586  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3587 {
3588         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3589         access |= PFERR_FETCH_MASK;
3590         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3591 }
3592
3593 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3594 {
3595         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3596         access |= PFERR_WRITE_MASK;
3597         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3598 }
3599
3600 /* uses this to access any guest's mapped memory without checking CPL */
3601 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3602 {
3603         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3604 }
3605
3606 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3607                                       struct kvm_vcpu *vcpu, u32 access,
3608                                       u32 *error)
3609 {
3610         void *data = val;
3611         int r = X86EMUL_CONTINUE;
3612
3613         while (bytes) {
3614                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3615                                                             error);
3616                 unsigned offset = addr & (PAGE_SIZE-1);
3617                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3618                 int ret;
3619
3620                 if (gpa == UNMAPPED_GVA) {
3621                         r = X86EMUL_PROPAGATE_FAULT;
3622                         goto out;
3623                 }
3624                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3625                 if (ret < 0) {
3626                         r = X86EMUL_IO_NEEDED;
3627                         goto out;
3628                 }
3629
3630                 bytes -= toread;
3631                 data += toread;
3632                 addr += toread;
3633         }
3634 out:
3635         return r;
3636 }
3637
3638 /* used for instruction fetching */
3639 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3640                                 struct kvm_vcpu *vcpu, u32 *error)
3641 {
3642         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3643         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3644                                           access | PFERR_FETCH_MASK, error);
3645 }
3646
3647 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3648                                struct kvm_vcpu *vcpu, u32 *error)
3649 {
3650         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3651         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3652                                           error);
3653 }
3654
3655 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3656                                struct kvm_vcpu *vcpu, u32 *error)
3657 {
3658         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3659 }
3660
3661 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3662                                        unsigned int bytes,
3663                                        struct kvm_vcpu *vcpu,
3664                                        u32 *error)
3665 {
3666         void *data = val;
3667         int r = X86EMUL_CONTINUE;
3668
3669         while (bytes) {
3670                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3671                                                              PFERR_WRITE_MASK,
3672                                                              error);
3673                 unsigned offset = addr & (PAGE_SIZE-1);
3674                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3675                 int ret;
3676
3677                 if (gpa == UNMAPPED_GVA) {
3678                         r = X86EMUL_PROPAGATE_FAULT;
3679                         goto out;
3680                 }
3681                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3682                 if (ret < 0) {
3683                         r = X86EMUL_IO_NEEDED;
3684                         goto out;
3685                 }
3686
3687                 bytes -= towrite;
3688                 data += towrite;
3689                 addr += towrite;
3690         }
3691 out:
3692         return r;
3693 }
3694
3695 static int emulator_read_emulated(unsigned long addr,
3696                                   void *val,
3697                                   unsigned int bytes,
3698                                   unsigned int *error_code,
3699                                   struct kvm_vcpu *vcpu)
3700 {
3701         gpa_t                 gpa;
3702
3703         if (vcpu->mmio_read_completed) {
3704                 memcpy(val, vcpu->mmio_data, bytes);
3705                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3706                                vcpu->mmio_phys_addr, *(u64 *)val);
3707                 vcpu->mmio_read_completed = 0;
3708                 return X86EMUL_CONTINUE;
3709         }
3710
3711         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3712
3713         if (gpa == UNMAPPED_GVA)
3714                 return X86EMUL_PROPAGATE_FAULT;
3715
3716         /* For APIC access vmexit */
3717         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3718                 goto mmio;
3719
3720         if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3721                                 == X86EMUL_CONTINUE)
3722                 return X86EMUL_CONTINUE;
3723
3724 mmio:
3725         /*
3726          * Is this MMIO handled locally?
3727          */
3728         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3729                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3730                 return X86EMUL_CONTINUE;
3731         }
3732
3733         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3734
3735         vcpu->mmio_needed = 1;
3736         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3737         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3738         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3739         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3740
3741         return X86EMUL_IO_NEEDED;
3742 }
3743
3744 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3745                           const void *val, int bytes)
3746 {
3747         int ret;
3748
3749         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3750         if (ret < 0)
3751                 return 0;
3752         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3753         return 1;
3754 }
3755
3756 static int emulator_write_emulated_onepage(unsigned long addr,
3757                                            const void *val,
3758                                            unsigned int bytes,
3759                                            unsigned int *error_code,
3760                                            struct kvm_vcpu *vcpu)
3761 {
3762         gpa_t                 gpa;
3763
3764         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3765
3766         if (gpa == UNMAPPED_GVA)
3767                 return X86EMUL_PROPAGATE_FAULT;
3768
3769         /* For APIC access vmexit */
3770         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3771                 goto mmio;
3772
3773         if (emulator_write_phys(vcpu, gpa, val, bytes))
3774                 return X86EMUL_CONTINUE;
3775
3776 mmio:
3777         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3778         /*
3779          * Is this MMIO handled locally?
3780          */
3781         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3782                 return X86EMUL_CONTINUE;
3783
3784         vcpu->mmio_needed = 1;
3785         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3786         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3787         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3788         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3789         memcpy(vcpu->run->mmio.data, val, bytes);
3790
3791         return X86EMUL_CONTINUE;
3792 }
3793
3794 int emulator_write_emulated(unsigned long addr,
3795                             const void *val,
3796                             unsigned int bytes,
3797                             unsigned int *error_code,
3798                             struct kvm_vcpu *vcpu)
3799 {
3800         /* Crossing a page boundary? */
3801         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3802                 int rc, now;
3803
3804                 now = -addr & ~PAGE_MASK;
3805                 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3806                                                      vcpu);
3807                 if (rc != X86EMUL_CONTINUE)
3808                         return rc;
3809                 addr += now;
3810                 val += now;
3811                 bytes -= now;
3812         }
3813         return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3814                                                vcpu);
3815 }
3816
3817 #define CMPXCHG_TYPE(t, ptr, old, new) \
3818         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3819
3820 #ifdef CONFIG_X86_64
3821 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3822 #else
3823 #  define CMPXCHG64(ptr, old, new) \
3824         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3825 #endif
3826
3827 static int emulator_cmpxchg_emulated(unsigned long addr,
3828                                      const void *old,
3829                                      const void *new,
3830                                      unsigned int bytes,
3831                                      unsigned int *error_code,
3832                                      struct kvm_vcpu *vcpu)
3833 {
3834         gpa_t gpa;
3835         struct page *page;
3836         char *kaddr;
3837         bool exchanged;
3838
3839         /* guests cmpxchg8b have to be emulated atomically */
3840         if (bytes > 8 || (bytes & (bytes - 1)))
3841                 goto emul_write;
3842
3843         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3844
3845         if (gpa == UNMAPPED_GVA ||
3846             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3847                 goto emul_write;
3848
3849         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3850                 goto emul_write;
3851
3852         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3853         if (is_error_page(page)) {
3854                 kvm_release_page_clean(page);
3855                 goto emul_write;
3856         }
3857
3858         kaddr = kmap_atomic(page, KM_USER0);
3859         kaddr += offset_in_page(gpa);
3860         switch (bytes) {
3861         case 1:
3862                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3863                 break;
3864         case 2:
3865                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3866                 break;
3867         case 4:
3868                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3869                 break;
3870         case 8:
3871                 exchanged = CMPXCHG64(kaddr, old, new);
3872                 break;
3873         default:
3874                 BUG();
3875         }
3876         kunmap_atomic(kaddr, KM_USER0);
3877         kvm_release_page_dirty(page);
3878
3879         if (!exchanged)
3880                 return X86EMUL_CMPXCHG_FAILED;
3881
3882         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3883
3884         return X86EMUL_CONTINUE;
3885
3886 emul_write:
3887         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3888
3889         return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3890 }
3891
3892 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3893 {
3894         /* TODO: String I/O for in kernel device */
3895         int r;
3896
3897         if (vcpu->arch.pio.in)
3898                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3899                                     vcpu->arch.pio.size, pd);
3900         else
3901                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3902                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3903                                      pd);
3904         return r;
3905 }
3906
3907
3908 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3909                              unsigned int count, struct kvm_vcpu *vcpu)
3910 {
3911         if (vcpu->arch.pio.count)
3912                 goto data_avail;
3913
3914         trace_kvm_pio(0, port, size, 1);
3915
3916         vcpu->arch.pio.port = port;
3917         vcpu->arch.pio.in = 1;
3918         vcpu->arch.pio.count  = count;
3919         vcpu->arch.pio.size = size;
3920
3921         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3922         data_avail:
3923                 memcpy(val, vcpu->arch.pio_data, size * count);
3924                 vcpu->arch.pio.count = 0;
3925                 return 1;
3926         }
3927
3928         vcpu->run->exit_reason = KVM_EXIT_IO;
3929         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3930         vcpu->run->io.size = size;
3931         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3932         vcpu->run->io.count = count;
3933         vcpu->run->io.port = port;
3934
3935         return 0;
3936 }
3937
3938 static int emulator_pio_out_emulated(int size, unsigned short port,
3939                               const void *val, unsigned int count,
3940                               struct kvm_vcpu *vcpu)
3941 {
3942         trace_kvm_pio(1, port, size, 1);
3943
3944         vcpu->arch.pio.port = port;
3945         vcpu->arch.pio.in = 0;
3946         vcpu->arch.pio.count = count;
3947         vcpu->arch.pio.size = size;
3948
3949         memcpy(vcpu->arch.pio_data, val, size * count);
3950
3951         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3952                 vcpu->arch.pio.count = 0;
3953                 return 1;
3954         }
3955
3956         vcpu->run->exit_reason = KVM_EXIT_IO;
3957         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3958         vcpu->run->io.size = size;
3959         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3960         vcpu->run->io.count = count;
3961         vcpu->run->io.port = port;
3962
3963         return 0;
3964 }
3965
3966 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3967 {
3968         return kvm_x86_ops->get_segment_base(vcpu, seg);
3969 }
3970
3971 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3972 {
3973         kvm_mmu_invlpg(vcpu, address);
3974         return X86EMUL_CONTINUE;
3975 }
3976
3977 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3978 {
3979         if (!need_emulate_wbinvd(vcpu))
3980                 return X86EMUL_CONTINUE;
3981
3982         if (kvm_x86_ops->has_wbinvd_exit()) {
3983                 preempt_disable();
3984                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3985                                 wbinvd_ipi, NULL, 1);
3986                 preempt_enable();
3987                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3988         }
3989         wbinvd();
3990         return X86EMUL_CONTINUE;
3991 }
3992 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3993
3994 int emulate_clts(struct kvm_vcpu *vcpu)
3995 {
3996         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3997         kvm_x86_ops->fpu_activate(vcpu);
3998         return X86EMUL_CONTINUE;
3999 }
4000
4001 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4002 {
4003         return _kvm_get_dr(vcpu, dr, dest);
4004 }
4005
4006 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4007 {
4008
4009         return __kvm_set_dr(vcpu, dr, value);
4010 }
4011
4012 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4013 {
4014         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4015 }
4016
4017 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4018 {
4019         unsigned long value;
4020
4021         switch (cr) {
4022         case 0:
4023                 value = kvm_read_cr0(vcpu);
4024                 break;
4025         case 2:
4026                 value = vcpu->arch.cr2;
4027                 break;
4028         case 3:
4029                 value = vcpu->arch.cr3;
4030                 break;
4031         case 4:
4032                 value = kvm_read_cr4(vcpu);
4033                 break;
4034         case 8:
4035                 value = kvm_get_cr8(vcpu);
4036                 break;
4037         default:
4038                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4039                 return 0;
4040         }
4041
4042         return value;
4043 }
4044
4045 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4046 {
4047         int res = 0;
4048
4049         switch (cr) {
4050         case 0:
4051                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4052                 break;
4053         case 2:
4054                 vcpu->arch.cr2 = val;
4055                 break;
4056         case 3:
4057                 res = kvm_set_cr3(vcpu, val);
4058                 break;
4059         case 4:
4060                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4061                 break;
4062         case 8:
4063                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4064                 break;
4065         default:
4066                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4067                 res = -1;
4068         }
4069
4070         return res;
4071 }
4072
4073 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4074 {
4075         return kvm_x86_ops->get_cpl(vcpu);
4076 }
4077
4078 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4079 {
4080         kvm_x86_ops->get_gdt(vcpu, dt);
4081 }
4082
4083 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4084 {
4085         kvm_x86_ops->get_idt(vcpu, dt);
4086 }
4087
4088 static unsigned long emulator_get_cached_segment_base(int seg,
4089                                                       struct kvm_vcpu *vcpu)
4090 {
4091         return get_segment_base(vcpu, seg);
4092 }
4093
4094 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4095                                            struct kvm_vcpu *vcpu)
4096 {
4097         struct kvm_segment var;
4098
4099         kvm_get_segment(vcpu, &var, seg);
4100
4101         if (var.unusable)
4102                 return false;
4103
4104         if (var.g)
4105                 var.limit >>= 12;
4106         set_desc_limit(desc, var.limit);
4107         set_desc_base(desc, (unsigned long)var.base);
4108         desc->type = var.type;
4109         desc->s = var.s;
4110         desc->dpl = var.dpl;
4111         desc->p = var.present;
4112         desc->avl = var.avl;
4113         desc->l = var.l;
4114         desc->d = var.db;
4115         desc->g = var.g;
4116
4117         return true;
4118 }
4119
4120 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4121                                            struct kvm_vcpu *vcpu)
4122 {
4123         struct kvm_segment var;
4124
4125         /* needed to preserve selector */
4126         kvm_get_segment(vcpu, &var, seg);
4127
4128         var.base = get_desc_base(desc);
4129         var.limit = get_desc_limit(desc);
4130         if (desc->g)
4131                 var.limit = (var.limit << 12) | 0xfff;
4132         var.type = desc->type;
4133         var.present = desc->p;
4134         var.dpl = desc->dpl;
4135         var.db = desc->d;
4136         var.s = desc->s;
4137         var.l = desc->l;
4138         var.g = desc->g;
4139         var.avl = desc->avl;
4140         var.present = desc->p;
4141         var.unusable = !var.present;
4142         var.padding = 0;
4143
4144         kvm_set_segment(vcpu, &var, seg);
4145         return;
4146 }
4147
4148 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4149 {
4150         struct kvm_segment kvm_seg;
4151
4152         kvm_get_segment(vcpu, &kvm_seg, seg);
4153         return kvm_seg.selector;
4154 }
4155
4156 static void emulator_set_segment_selector(u16 sel, int seg,
4157                                           struct kvm_vcpu *vcpu)
4158 {
4159         struct kvm_segment kvm_seg;
4160
4161         kvm_get_segment(vcpu, &kvm_seg, seg);
4162         kvm_seg.selector = sel;
4163         kvm_set_segment(vcpu, &kvm_seg, seg);
4164 }
4165
4166 static struct x86_emulate_ops emulate_ops = {
4167         .read_std            = kvm_read_guest_virt_system,
4168         .write_std           = kvm_write_guest_virt_system,
4169         .fetch               = kvm_fetch_guest_virt,
4170         .read_emulated       = emulator_read_emulated,
4171         .write_emulated      = emulator_write_emulated,
4172         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4173         .pio_in_emulated     = emulator_pio_in_emulated,
4174         .pio_out_emulated    = emulator_pio_out_emulated,
4175         .get_cached_descriptor = emulator_get_cached_descriptor,
4176         .set_cached_descriptor = emulator_set_cached_descriptor,
4177         .get_segment_selector = emulator_get_segment_selector,
4178         .set_segment_selector = emulator_set_segment_selector,
4179         .get_cached_segment_base = emulator_get_cached_segment_base,
4180         .get_gdt             = emulator_get_gdt,
4181         .get_idt             = emulator_get_idt,
4182         .get_cr              = emulator_get_cr,
4183         .set_cr              = emulator_set_cr,
4184         .cpl                 = emulator_get_cpl,
4185         .get_dr              = emulator_get_dr,
4186         .set_dr              = emulator_set_dr,
4187         .set_msr             = kvm_set_msr,
4188         .get_msr             = kvm_get_msr,
4189 };
4190
4191 static void cache_all_regs(struct kvm_vcpu *vcpu)
4192 {
4193         kvm_register_read(vcpu, VCPU_REGS_RAX);
4194         kvm_register_read(vcpu, VCPU_REGS_RSP);
4195         kvm_register_read(vcpu, VCPU_REGS_RIP);
4196         vcpu->arch.regs_dirty = ~0;
4197 }
4198
4199 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4200 {
4201         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4202         /*
4203          * an sti; sti; sequence only disable interrupts for the first
4204          * instruction. So, if the last instruction, be it emulated or
4205          * not, left the system with the INT_STI flag enabled, it
4206          * means that the last instruction is an sti. We should not
4207          * leave the flag on in this case. The same goes for mov ss
4208          */
4209         if (!(int_shadow & mask))
4210                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4211 }
4212
4213 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4214 {
4215         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4216         if (ctxt->exception == PF_VECTOR)
4217                 kvm_propagate_fault(vcpu);
4218         else if (ctxt->error_code_valid)
4219                 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4220         else
4221                 kvm_queue_exception(vcpu, ctxt->exception);
4222 }
4223
4224 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4225 {
4226         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4227         int cs_db, cs_l;
4228
4229         cache_all_regs(vcpu);
4230
4231         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4232
4233         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4234         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4235         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4236         vcpu->arch.emulate_ctxt.mode =
4237                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4238                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4239                 ? X86EMUL_MODE_VM86 : cs_l
4240                 ? X86EMUL_MODE_PROT64 : cs_db
4241                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4242         memset(c, 0, sizeof(struct decode_cache));
4243         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4244 }
4245
4246 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4247 {
4248         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4249         int ret;
4250
4251         init_emulate_ctxt(vcpu);
4252
4253         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4254         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4255         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4256         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4257
4258         if (ret != X86EMUL_CONTINUE)
4259                 return EMULATE_FAIL;
4260
4261         vcpu->arch.emulate_ctxt.eip = c->eip;
4262         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4263         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4264         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4265
4266         if (irq == NMI_VECTOR)
4267                 vcpu->arch.nmi_pending = false;
4268         else
4269                 vcpu->arch.interrupt.pending = false;
4270
4271         return EMULATE_DONE;
4272 }
4273 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4274
4275 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4276 {
4277         ++vcpu->stat.insn_emulation_fail;
4278         trace_kvm_emulate_insn_failed(vcpu);
4279         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4280         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4281         vcpu->run->internal.ndata = 0;
4282         kvm_queue_exception(vcpu, UD_VECTOR);
4283         return EMULATE_FAIL;
4284 }
4285
4286 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4287 {
4288         gpa_t gpa;
4289
4290         if (tdp_enabled)
4291                 return false;
4292
4293         /*
4294          * if emulation was due to access to shadowed page table
4295          * and it failed try to unshadow page and re-entetr the
4296          * guest to let CPU execute the instruction.
4297          */
4298         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4299                 return true;
4300
4301         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4302
4303         if (gpa == UNMAPPED_GVA)
4304                 return true; /* let cpu generate fault */
4305
4306         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4307                 return true;
4308
4309         return false;
4310 }
4311
4312 int emulate_instruction(struct kvm_vcpu *vcpu,
4313                         unsigned long cr2,
4314                         u16 error_code,
4315                         int emulation_type)
4316 {
4317         int r;
4318         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4319
4320         kvm_clear_exception_queue(vcpu);
4321         vcpu->arch.mmio_fault_cr2 = cr2;
4322         /*
4323          * TODO: fix emulate.c to use guest_read/write_register
4324          * instead of direct ->regs accesses, can save hundred cycles
4325          * on Intel for instructions that don't read/change RSP, for
4326          * for example.
4327          */
4328         cache_all_regs(vcpu);
4329
4330         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4331                 init_emulate_ctxt(vcpu);
4332                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4333                 vcpu->arch.emulate_ctxt.exception = -1;
4334                 vcpu->arch.emulate_ctxt.perm_ok = false;
4335
4336                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4337                 if (r == X86EMUL_PROPAGATE_FAULT)
4338                         goto done;
4339
4340                 trace_kvm_emulate_insn_start(vcpu);
4341
4342                 /* Only allow emulation of specific instructions on #UD
4343                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4344                 if (emulation_type & EMULTYPE_TRAP_UD) {
4345                         if (!c->twobyte)
4346                                 return EMULATE_FAIL;
4347                         switch (c->b) {
4348                         case 0x01: /* VMMCALL */
4349                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4350                                         return EMULATE_FAIL;
4351                                 break;
4352                         case 0x34: /* sysenter */
4353                         case 0x35: /* sysexit */
4354                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4355                                         return EMULATE_FAIL;
4356                                 break;
4357                         case 0x05: /* syscall */
4358                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4359                                         return EMULATE_FAIL;
4360                                 break;
4361                         default:
4362                                 return EMULATE_FAIL;
4363                         }
4364
4365                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4366                                 return EMULATE_FAIL;
4367                 }
4368
4369                 ++vcpu->stat.insn_emulation;
4370                 if (r)  {
4371                         if (reexecute_instruction(vcpu, cr2))
4372                                 return EMULATE_DONE;
4373                         if (emulation_type & EMULTYPE_SKIP)
4374                                 return EMULATE_FAIL;
4375                         return handle_emulation_failure(vcpu);
4376                 }
4377         }
4378
4379         if (emulation_type & EMULTYPE_SKIP) {
4380                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4381                 return EMULATE_DONE;
4382         }
4383
4384         /* this is needed for vmware backdor interface to work since it
4385            changes registers values  during IO operation */
4386         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4387
4388 restart:
4389         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4390
4391         if (r == EMULATION_FAILED) {
4392                 if (reexecute_instruction(vcpu, cr2))
4393                         return EMULATE_DONE;
4394
4395                 return handle_emulation_failure(vcpu);
4396         }
4397
4398 done:
4399         if (vcpu->arch.emulate_ctxt.exception >= 0) {
4400                 inject_emulated_exception(vcpu);
4401                 r = EMULATE_DONE;
4402         } else if (vcpu->arch.pio.count) {
4403                 if (!vcpu->arch.pio.in)
4404                         vcpu->arch.pio.count = 0;
4405                 r = EMULATE_DO_MMIO;
4406         } else if (vcpu->mmio_needed) {
4407                 if (vcpu->mmio_is_write)
4408                         vcpu->mmio_needed = 0;
4409                 r = EMULATE_DO_MMIO;
4410         } else if (r == EMULATION_RESTART)
4411                 goto restart;
4412         else
4413                 r = EMULATE_DONE;
4414
4415         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4416         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4417         kvm_make_request(KVM_REQ_EVENT, vcpu);
4418         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4419         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4420
4421         return r;
4422 }
4423 EXPORT_SYMBOL_GPL(emulate_instruction);
4424
4425 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4426 {
4427         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4428         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4429         /* do not return to emulator after return from userspace */
4430         vcpu->arch.pio.count = 0;
4431         return ret;
4432 }
4433 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4434
4435 static void tsc_bad(void *info)
4436 {
4437         __get_cpu_var(cpu_tsc_khz) = 0;
4438 }
4439
4440 static void tsc_khz_changed(void *data)
4441 {
4442         struct cpufreq_freqs *freq = data;
4443         unsigned long khz = 0;
4444
4445         if (data)
4446                 khz = freq->new;
4447         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4448                 khz = cpufreq_quick_get(raw_smp_processor_id());
4449         if (!khz)
4450                 khz = tsc_khz;
4451         __get_cpu_var(cpu_tsc_khz) = khz;
4452 }
4453
4454 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4455                                      void *data)
4456 {
4457         struct cpufreq_freqs *freq = data;
4458         struct kvm *kvm;
4459         struct kvm_vcpu *vcpu;
4460         int i, send_ipi = 0;
4461
4462         /*
4463          * We allow guests to temporarily run on slowing clocks,
4464          * provided we notify them after, or to run on accelerating
4465          * clocks, provided we notify them before.  Thus time never
4466          * goes backwards.
4467          *
4468          * However, we have a problem.  We can't atomically update
4469          * the frequency of a given CPU from this function; it is
4470          * merely a notifier, which can be called from any CPU.
4471          * Changing the TSC frequency at arbitrary points in time
4472          * requires a recomputation of local variables related to
4473          * the TSC for each VCPU.  We must flag these local variables
4474          * to be updated and be sure the update takes place with the
4475          * new frequency before any guests proceed.
4476          *
4477          * Unfortunately, the combination of hotplug CPU and frequency
4478          * change creates an intractable locking scenario; the order
4479          * of when these callouts happen is undefined with respect to
4480          * CPU hotplug, and they can race with each other.  As such,
4481          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4482          * undefined; you can actually have a CPU frequency change take
4483          * place in between the computation of X and the setting of the
4484          * variable.  To protect against this problem, all updates of
4485          * the per_cpu tsc_khz variable are done in an interrupt
4486          * protected IPI, and all callers wishing to update the value
4487          * must wait for a synchronous IPI to complete (which is trivial
4488          * if the caller is on the CPU already).  This establishes the
4489          * necessary total order on variable updates.
4490          *
4491          * Note that because a guest time update may take place
4492          * anytime after the setting of the VCPU's request bit, the
4493          * correct TSC value must be set before the request.  However,
4494          * to ensure the update actually makes it to any guest which
4495          * starts running in hardware virtualization between the set
4496          * and the acquisition of the spinlock, we must also ping the
4497          * CPU after setting the request bit.
4498          *
4499          */
4500
4501         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4502                 return 0;
4503         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4504                 return 0;
4505
4506         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4507
4508         spin_lock(&kvm_lock);
4509         list_for_each_entry(kvm, &vm_list, vm_list) {
4510                 kvm_for_each_vcpu(i, vcpu, kvm) {
4511                         if (vcpu->cpu != freq->cpu)
4512                                 continue;
4513                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4514                         if (vcpu->cpu != smp_processor_id())
4515                                 send_ipi = 1;
4516                 }
4517         }
4518         spin_unlock(&kvm_lock);
4519
4520         if (freq->old < freq->new && send_ipi) {
4521                 /*
4522                  * We upscale the frequency.  Must make the guest
4523                  * doesn't see old kvmclock values while running with
4524                  * the new frequency, otherwise we risk the guest sees
4525                  * time go backwards.
4526                  *
4527                  * In case we update the frequency for another cpu
4528                  * (which might be in guest context) send an interrupt
4529                  * to kick the cpu out of guest context.  Next time
4530                  * guest context is entered kvmclock will be updated,
4531                  * so the guest will not see stale values.
4532                  */
4533                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4534         }
4535         return 0;
4536 }
4537
4538 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4539         .notifier_call  = kvmclock_cpufreq_notifier
4540 };
4541
4542 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4543                                         unsigned long action, void *hcpu)
4544 {
4545         unsigned int cpu = (unsigned long)hcpu;
4546
4547         switch (action) {
4548                 case CPU_ONLINE:
4549                 case CPU_DOWN_FAILED:
4550                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4551                         break;
4552                 case CPU_DOWN_PREPARE:
4553                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4554                         break;
4555         }
4556         return NOTIFY_OK;
4557 }
4558
4559 static struct notifier_block kvmclock_cpu_notifier_block = {
4560         .notifier_call  = kvmclock_cpu_notifier,
4561         .priority = -INT_MAX
4562 };
4563
4564 static void kvm_timer_init(void)
4565 {
4566         int cpu;
4567
4568         max_tsc_khz = tsc_khz;
4569         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4570         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4571 #ifdef CONFIG_CPU_FREQ
4572                 struct cpufreq_policy policy;
4573                 memset(&policy, 0, sizeof(policy));
4574                 cpu = get_cpu();
4575                 cpufreq_get_policy(&policy, cpu);
4576                 if (policy.cpuinfo.max_freq)
4577                         max_tsc_khz = policy.cpuinfo.max_freq;
4578                 put_cpu();
4579 #endif
4580                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4581                                           CPUFREQ_TRANSITION_NOTIFIER);
4582         }
4583         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4584         for_each_online_cpu(cpu)
4585                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4586 }
4587
4588 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4589
4590 static int kvm_is_in_guest(void)
4591 {
4592         return percpu_read(current_vcpu) != NULL;
4593 }
4594
4595 static int kvm_is_user_mode(void)
4596 {
4597         int user_mode = 3;
4598
4599         if (percpu_read(current_vcpu))
4600                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4601
4602         return user_mode != 0;
4603 }
4604
4605 static unsigned long kvm_get_guest_ip(void)
4606 {
4607         unsigned long ip = 0;
4608
4609         if (percpu_read(current_vcpu))
4610                 ip = kvm_rip_read(percpu_read(current_vcpu));
4611
4612         return ip;
4613 }
4614
4615 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4616         .is_in_guest            = kvm_is_in_guest,
4617         .is_user_mode           = kvm_is_user_mode,
4618         .get_guest_ip           = kvm_get_guest_ip,
4619 };
4620
4621 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4622 {
4623         percpu_write(current_vcpu, vcpu);
4624 }
4625 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4626
4627 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4628 {
4629         percpu_write(current_vcpu, NULL);
4630 }
4631 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4632
4633 int kvm_arch_init(void *opaque)
4634 {
4635         int r;
4636         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4637
4638         if (kvm_x86_ops) {
4639                 printk(KERN_ERR "kvm: already loaded the other module\n");
4640                 r = -EEXIST;
4641                 goto out;
4642         }
4643
4644         if (!ops->cpu_has_kvm_support()) {
4645                 printk(KERN_ERR "kvm: no hardware support\n");
4646                 r = -EOPNOTSUPP;
4647                 goto out;
4648         }
4649         if (ops->disabled_by_bios()) {
4650                 printk(KERN_ERR "kvm: disabled by bios\n");
4651                 r = -EOPNOTSUPP;
4652                 goto out;
4653         }
4654
4655         r = kvm_mmu_module_init();
4656         if (r)
4657                 goto out;
4658
4659         kvm_init_msr_list();
4660
4661         kvm_x86_ops = ops;
4662         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4663         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4664         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4665                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4666
4667         kvm_timer_init();
4668
4669         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4670
4671         if (cpu_has_xsave)
4672                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4673
4674         return 0;
4675
4676 out:
4677         return r;
4678 }
4679
4680 void kvm_arch_exit(void)
4681 {
4682         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4683
4684         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4685                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4686                                             CPUFREQ_TRANSITION_NOTIFIER);
4687         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4688         kvm_x86_ops = NULL;
4689         kvm_mmu_module_exit();
4690 }
4691
4692 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4693 {
4694         ++vcpu->stat.halt_exits;
4695         if (irqchip_in_kernel(vcpu->kvm)) {
4696                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4697                 return 1;
4698         } else {
4699                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4700                 return 0;
4701         }
4702 }
4703 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4704
4705 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4706                            unsigned long a1)
4707 {
4708         if (is_long_mode(vcpu))
4709                 return a0;
4710         else
4711                 return a0 | ((gpa_t)a1 << 32);
4712 }
4713
4714 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4715 {
4716         u64 param, ingpa, outgpa, ret;
4717         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4718         bool fast, longmode;
4719         int cs_db, cs_l;
4720
4721         /*
4722          * hypercall generates UD from non zero cpl and real mode
4723          * per HYPER-V spec
4724          */
4725         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4726                 kvm_queue_exception(vcpu, UD_VECTOR);
4727                 return 0;
4728         }
4729
4730         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4731         longmode = is_long_mode(vcpu) && cs_l == 1;
4732
4733         if (!longmode) {
4734                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4735                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4736                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4737                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4738                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4739                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4740         }
4741 #ifdef CONFIG_X86_64
4742         else {
4743                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4744                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4745                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4746         }
4747 #endif
4748
4749         code = param & 0xffff;
4750         fast = (param >> 16) & 0x1;
4751         rep_cnt = (param >> 32) & 0xfff;
4752         rep_idx = (param >> 48) & 0xfff;
4753
4754         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4755
4756         switch (code) {
4757         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4758                 kvm_vcpu_on_spin(vcpu);
4759                 break;
4760         default:
4761                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4762                 break;
4763         }
4764
4765         ret = res | (((u64)rep_done & 0xfff) << 32);
4766         if (longmode) {
4767                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4768         } else {
4769                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4770                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4771         }
4772
4773         return 1;
4774 }
4775
4776 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4777 {
4778         unsigned long nr, a0, a1, a2, a3, ret;
4779         int r = 1;
4780
4781         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4782                 return kvm_hv_hypercall(vcpu);
4783
4784         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4785         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4786         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4787         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4788         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4789
4790         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4791
4792         if (!is_long_mode(vcpu)) {
4793                 nr &= 0xFFFFFFFF;
4794                 a0 &= 0xFFFFFFFF;
4795                 a1 &= 0xFFFFFFFF;
4796                 a2 &= 0xFFFFFFFF;
4797                 a3 &= 0xFFFFFFFF;
4798         }
4799
4800         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4801                 ret = -KVM_EPERM;
4802                 goto out;
4803         }
4804
4805         switch (nr) {
4806         case KVM_HC_VAPIC_POLL_IRQ:
4807                 ret = 0;
4808                 break;
4809         case KVM_HC_MMU_OP:
4810                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4811                 break;
4812         default:
4813                 ret = -KVM_ENOSYS;
4814                 break;
4815         }
4816 out:
4817         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4818         ++vcpu->stat.hypercalls;
4819         return r;
4820 }
4821 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4822
4823 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4824 {
4825         char instruction[3];
4826         unsigned long rip = kvm_rip_read(vcpu);
4827
4828         /*
4829          * Blow out the MMU to ensure that no other VCPU has an active mapping
4830          * to ensure that the updated hypercall appears atomically across all
4831          * VCPUs.
4832          */
4833         kvm_mmu_zap_all(vcpu->kvm);
4834
4835         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4836
4837         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4838 }
4839
4840 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4841 {
4842         struct desc_ptr dt = { limit, base };
4843
4844         kvm_x86_ops->set_gdt(vcpu, &dt);
4845 }
4846
4847 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4848 {
4849         struct desc_ptr dt = { limit, base };
4850
4851         kvm_x86_ops->set_idt(vcpu, &dt);
4852 }
4853
4854 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4855 {
4856         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4857         int j, nent = vcpu->arch.cpuid_nent;
4858
4859         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4860         /* when no next entry is found, the current entry[i] is reselected */
4861         for (j = i + 1; ; j = (j + 1) % nent) {
4862                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4863                 if (ej->function == e->function) {
4864                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4865                         return j;
4866                 }
4867         }
4868         return 0; /* silence gcc, even though control never reaches here */
4869 }
4870
4871 /* find an entry with matching function, matching index (if needed), and that
4872  * should be read next (if it's stateful) */
4873 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4874         u32 function, u32 index)
4875 {
4876         if (e->function != function)
4877                 return 0;
4878         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4879                 return 0;
4880         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4881             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4882                 return 0;
4883         return 1;
4884 }
4885
4886 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4887                                               u32 function, u32 index)
4888 {
4889         int i;
4890         struct kvm_cpuid_entry2 *best = NULL;
4891
4892         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4893                 struct kvm_cpuid_entry2 *e;
4894
4895                 e = &vcpu->arch.cpuid_entries[i];
4896                 if (is_matching_cpuid_entry(e, function, index)) {
4897                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4898                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4899                         best = e;
4900                         break;
4901                 }
4902                 /*
4903                  * Both basic or both extended?
4904                  */
4905                 if (((e->function ^ function) & 0x80000000) == 0)
4906                         if (!best || e->function > best->function)
4907                                 best = e;
4908         }
4909         return best;
4910 }
4911 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4912
4913 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4914 {
4915         struct kvm_cpuid_entry2 *best;
4916
4917         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4918         if (!best || best->eax < 0x80000008)
4919                 goto not_found;
4920         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4921         if (best)
4922                 return best->eax & 0xff;
4923 not_found:
4924         return 36;
4925 }
4926
4927 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4928 {
4929         u32 function, index;
4930         struct kvm_cpuid_entry2 *best;
4931
4932         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4933         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4934         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4935         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4936         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4937         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4938         best = kvm_find_cpuid_entry(vcpu, function, index);
4939         if (best) {
4940                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4941                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4942                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4943                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4944         }
4945         kvm_x86_ops->skip_emulated_instruction(vcpu);
4946         trace_kvm_cpuid(function,
4947                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4948                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4949                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4950                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4951 }
4952 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4953
4954 /*
4955  * Check if userspace requested an interrupt window, and that the
4956  * interrupt window is open.
4957  *
4958  * No need to exit to userspace if we already have an interrupt queued.
4959  */
4960 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4961 {
4962         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4963                 vcpu->run->request_interrupt_window &&
4964                 kvm_arch_interrupt_allowed(vcpu));
4965 }
4966
4967 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4968 {
4969         struct kvm_run *kvm_run = vcpu->run;
4970
4971         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4972         kvm_run->cr8 = kvm_get_cr8(vcpu);
4973         kvm_run->apic_base = kvm_get_apic_base(vcpu);
4974         if (irqchip_in_kernel(vcpu->kvm))
4975                 kvm_run->ready_for_interrupt_injection = 1;
4976         else
4977                 kvm_run->ready_for_interrupt_injection =
4978                         kvm_arch_interrupt_allowed(vcpu) &&
4979                         !kvm_cpu_has_interrupt(vcpu) &&
4980                         !kvm_event_needs_reinjection(vcpu);
4981 }
4982
4983 static void vapic_enter(struct kvm_vcpu *vcpu)
4984 {
4985         struct kvm_lapic *apic = vcpu->arch.apic;
4986         struct page *page;
4987
4988         if (!apic || !apic->vapic_addr)
4989                 return;
4990
4991         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4992
4993         vcpu->arch.apic->vapic_page = page;
4994 }
4995
4996 static void vapic_exit(struct kvm_vcpu *vcpu)
4997 {
4998         struct kvm_lapic *apic = vcpu->arch.apic;
4999         int idx;
5000
5001         if (!apic || !apic->vapic_addr)
5002                 return;
5003
5004         idx = srcu_read_lock(&vcpu->kvm->srcu);
5005         kvm_release_page_dirty(apic->vapic_page);
5006         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5007         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5008 }
5009
5010 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5011 {
5012         int max_irr, tpr;
5013
5014         if (!kvm_x86_ops->update_cr8_intercept)
5015                 return;
5016
5017         if (!vcpu->arch.apic)
5018                 return;
5019
5020         if (!vcpu->arch.apic->vapic_addr)
5021                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5022         else
5023                 max_irr = -1;
5024
5025         if (max_irr != -1)
5026                 max_irr >>= 4;
5027
5028         tpr = kvm_lapic_get_cr8(vcpu);
5029
5030         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5031 }
5032
5033 static void inject_pending_event(struct kvm_vcpu *vcpu)
5034 {
5035         /* try to reinject previous events if any */
5036         if (vcpu->arch.exception.pending) {
5037                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5038                                         vcpu->arch.exception.has_error_code,
5039                                         vcpu->arch.exception.error_code);
5040                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5041                                           vcpu->arch.exception.has_error_code,
5042                                           vcpu->arch.exception.error_code,
5043                                           vcpu->arch.exception.reinject);
5044                 return;
5045         }
5046
5047         if (vcpu->arch.nmi_injected) {
5048                 kvm_x86_ops->set_nmi(vcpu);
5049                 return;
5050         }
5051
5052         if (vcpu->arch.interrupt.pending) {
5053                 kvm_x86_ops->set_irq(vcpu);
5054                 return;
5055         }
5056
5057         /* try to inject new event if pending */
5058         if (vcpu->arch.nmi_pending) {
5059                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5060                         vcpu->arch.nmi_pending = false;
5061                         vcpu->arch.nmi_injected = true;
5062                         kvm_x86_ops->set_nmi(vcpu);
5063                 }
5064         } else if (kvm_cpu_has_interrupt(vcpu)) {
5065                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5066                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5067                                             false);
5068                         kvm_x86_ops->set_irq(vcpu);
5069                 }
5070         }
5071 }
5072
5073 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5074 {
5075         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5076                         !vcpu->guest_xcr0_loaded) {
5077                 /* kvm_set_xcr() also depends on this */
5078                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5079                 vcpu->guest_xcr0_loaded = 1;
5080         }
5081 }
5082
5083 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5084 {
5085         if (vcpu->guest_xcr0_loaded) {
5086                 if (vcpu->arch.xcr0 != host_xcr0)
5087                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5088                 vcpu->guest_xcr0_loaded = 0;
5089         }
5090 }
5091
5092 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5093 {
5094         int r;
5095         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5096                 vcpu->run->request_interrupt_window;
5097
5098         if (vcpu->requests) {
5099                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5100                         kvm_mmu_unload(vcpu);
5101                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5102                         __kvm_migrate_timers(vcpu);
5103                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5104                         r = kvm_guest_time_update(vcpu);
5105                         if (unlikely(r))
5106                                 goto out;
5107                 }
5108                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5109                         kvm_mmu_sync_roots(vcpu);
5110                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5111                         kvm_x86_ops->tlb_flush(vcpu);
5112                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5113                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5114                         r = 0;
5115                         goto out;
5116                 }
5117                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5118                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5119                         r = 0;
5120                         goto out;
5121                 }
5122                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5123                         vcpu->fpu_active = 0;
5124                         kvm_x86_ops->fpu_deactivate(vcpu);
5125                 }
5126                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5127                         /* Page is swapped out. Do synthetic halt */
5128                         vcpu->arch.apf.halted = true;
5129                         r = 1;
5130                         goto out;
5131                 }
5132         }
5133
5134         r = kvm_mmu_reload(vcpu);
5135         if (unlikely(r))
5136                 goto out;
5137
5138         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5139                 inject_pending_event(vcpu);
5140
5141                 /* enable NMI/IRQ window open exits if needed */
5142                 if (vcpu->arch.nmi_pending)
5143                         kvm_x86_ops->enable_nmi_window(vcpu);
5144                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5145                         kvm_x86_ops->enable_irq_window(vcpu);
5146
5147                 if (kvm_lapic_enabled(vcpu)) {
5148                         update_cr8_intercept(vcpu);
5149                         kvm_lapic_sync_to_vapic(vcpu);
5150                 }
5151         }
5152
5153         preempt_disable();
5154
5155         kvm_x86_ops->prepare_guest_switch(vcpu);
5156         if (vcpu->fpu_active)
5157                 kvm_load_guest_fpu(vcpu);
5158         kvm_load_guest_xcr0(vcpu);
5159
5160         atomic_set(&vcpu->guest_mode, 1);
5161         smp_wmb();
5162
5163         local_irq_disable();
5164
5165         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5166             || need_resched() || signal_pending(current)) {
5167                 atomic_set(&vcpu->guest_mode, 0);
5168                 smp_wmb();
5169                 local_irq_enable();
5170                 preempt_enable();
5171                 kvm_x86_ops->cancel_injection(vcpu);
5172                 r = 1;
5173                 goto out;
5174         }
5175
5176         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5177
5178         kvm_guest_enter();
5179
5180         if (unlikely(vcpu->arch.switch_db_regs)) {
5181                 set_debugreg(0, 7);
5182                 set_debugreg(vcpu->arch.eff_db[0], 0);
5183                 set_debugreg(vcpu->arch.eff_db[1], 1);
5184                 set_debugreg(vcpu->arch.eff_db[2], 2);
5185                 set_debugreg(vcpu->arch.eff_db[3], 3);
5186         }
5187
5188         trace_kvm_entry(vcpu->vcpu_id);
5189         kvm_x86_ops->run(vcpu);
5190
5191         /*
5192          * If the guest has used debug registers, at least dr7
5193          * will be disabled while returning to the host.
5194          * If we don't have active breakpoints in the host, we don't
5195          * care about the messed up debug address registers. But if
5196          * we have some of them active, restore the old state.
5197          */
5198         if (hw_breakpoint_active())
5199                 hw_breakpoint_restore();
5200
5201         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5202
5203         atomic_set(&vcpu->guest_mode, 0);
5204         smp_wmb();
5205         local_irq_enable();
5206
5207         ++vcpu->stat.exits;
5208
5209         /*
5210          * We must have an instruction between local_irq_enable() and
5211          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5212          * the interrupt shadow.  The stat.exits increment will do nicely.
5213          * But we need to prevent reordering, hence this barrier():
5214          */
5215         barrier();
5216
5217         kvm_guest_exit();
5218
5219         preempt_enable();
5220
5221         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5222
5223         /*
5224          * Profile KVM exit RIPs:
5225          */
5226         if (unlikely(prof_on == KVM_PROFILING)) {
5227                 unsigned long rip = kvm_rip_read(vcpu);
5228                 profile_hit(KVM_PROFILING, (void *)rip);
5229         }
5230
5231
5232         kvm_lapic_sync_from_vapic(vcpu);
5233
5234         r = kvm_x86_ops->handle_exit(vcpu);
5235 out:
5236         return r;
5237 }
5238
5239
5240 static int __vcpu_run(struct kvm_vcpu *vcpu)
5241 {
5242         int r;
5243         struct kvm *kvm = vcpu->kvm;
5244
5245         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5246                 pr_debug("vcpu %d received sipi with vector # %x\n",
5247                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5248                 kvm_lapic_reset(vcpu);
5249                 r = kvm_arch_vcpu_reset(vcpu);
5250                 if (r)
5251                         return r;
5252                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5253         }
5254
5255         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5256         vapic_enter(vcpu);
5257
5258         r = 1;
5259         while (r > 0) {
5260                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5261                     !vcpu->arch.apf.halted)
5262                         r = vcpu_enter_guest(vcpu);
5263                 else {
5264                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5265                         kvm_vcpu_block(vcpu);
5266                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5267                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5268                         {
5269                                 switch(vcpu->arch.mp_state) {
5270                                 case KVM_MP_STATE_HALTED:
5271                                         vcpu->arch.mp_state =
5272                                                 KVM_MP_STATE_RUNNABLE;
5273                                 case KVM_MP_STATE_RUNNABLE:
5274                                         vcpu->arch.apf.halted = false;
5275                                         break;
5276                                 case KVM_MP_STATE_SIPI_RECEIVED:
5277                                 default:
5278                                         r = -EINTR;
5279                                         break;
5280                                 }
5281                         }
5282                 }
5283
5284                 if (r <= 0)
5285                         break;
5286
5287                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5288                 if (kvm_cpu_has_pending_timer(vcpu))
5289                         kvm_inject_pending_timer_irqs(vcpu);
5290
5291                 if (dm_request_for_irq_injection(vcpu)) {
5292                         r = -EINTR;
5293                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5294                         ++vcpu->stat.request_irq_exits;
5295                 }
5296
5297                 kvm_check_async_pf_completion(vcpu);
5298
5299                 if (signal_pending(current)) {
5300                         r = -EINTR;
5301                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5302                         ++vcpu->stat.signal_exits;
5303                 }
5304                 if (need_resched()) {
5305                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5306                         kvm_resched(vcpu);
5307                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5308                 }
5309         }
5310
5311         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5312
5313         vapic_exit(vcpu);
5314
5315         return r;
5316 }
5317
5318 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5319 {
5320         int r;
5321         sigset_t sigsaved;
5322
5323         if (vcpu->sigset_active)
5324                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5325
5326         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5327                 kvm_vcpu_block(vcpu);
5328                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5329                 r = -EAGAIN;
5330                 goto out;
5331         }
5332
5333         /* re-sync apic's tpr */
5334         if (!irqchip_in_kernel(vcpu->kvm))
5335                 kvm_set_cr8(vcpu, kvm_run->cr8);
5336
5337         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5338                 if (vcpu->mmio_needed) {
5339                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5340                         vcpu->mmio_read_completed = 1;
5341                         vcpu->mmio_needed = 0;
5342                 }
5343                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5344                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5345                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5346                 if (r != EMULATE_DONE) {
5347                         r = 0;
5348                         goto out;
5349                 }
5350         }
5351         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5352                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5353                                      kvm_run->hypercall.ret);
5354
5355         r = __vcpu_run(vcpu);
5356
5357 out:
5358         post_kvm_run_save(vcpu);
5359         if (vcpu->sigset_active)
5360                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5361
5362         return r;
5363 }
5364
5365 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5366 {
5367         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5368         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5369         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5370         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5371         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5372         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5373         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5374         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5375 #ifdef CONFIG_X86_64
5376         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5377         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5378         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5379         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5380         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5381         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5382         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5383         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5384 #endif
5385
5386         regs->rip = kvm_rip_read(vcpu);
5387         regs->rflags = kvm_get_rflags(vcpu);
5388
5389         return 0;
5390 }
5391
5392 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5393 {
5394         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5395         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5396         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5397         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5398         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5399         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5400         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5401         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5402 #ifdef CONFIG_X86_64
5403         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5404         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5405         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5406         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5407         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5408         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5409         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5410         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5411 #endif
5412
5413         kvm_rip_write(vcpu, regs->rip);
5414         kvm_set_rflags(vcpu, regs->rflags);
5415
5416         vcpu->arch.exception.pending = false;
5417
5418         kvm_make_request(KVM_REQ_EVENT, vcpu);
5419
5420         return 0;
5421 }
5422
5423 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5424 {
5425         struct kvm_segment cs;
5426
5427         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5428         *db = cs.db;
5429         *l = cs.l;
5430 }
5431 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5432
5433 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5434                                   struct kvm_sregs *sregs)
5435 {
5436         struct desc_ptr dt;
5437
5438         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5439         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5440         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5441         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5442         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5443         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5444
5445         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5446         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5447
5448         kvm_x86_ops->get_idt(vcpu, &dt);
5449         sregs->idt.limit = dt.size;
5450         sregs->idt.base = dt.address;
5451         kvm_x86_ops->get_gdt(vcpu, &dt);
5452         sregs->gdt.limit = dt.size;
5453         sregs->gdt.base = dt.address;
5454
5455         sregs->cr0 = kvm_read_cr0(vcpu);
5456         sregs->cr2 = vcpu->arch.cr2;
5457         sregs->cr3 = vcpu->arch.cr3;
5458         sregs->cr4 = kvm_read_cr4(vcpu);
5459         sregs->cr8 = kvm_get_cr8(vcpu);
5460         sregs->efer = vcpu->arch.efer;
5461         sregs->apic_base = kvm_get_apic_base(vcpu);
5462
5463         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5464
5465         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5466                 set_bit(vcpu->arch.interrupt.nr,
5467                         (unsigned long *)sregs->interrupt_bitmap);
5468
5469         return 0;
5470 }
5471
5472 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5473                                     struct kvm_mp_state *mp_state)
5474 {
5475         mp_state->mp_state = vcpu->arch.mp_state;
5476         return 0;
5477 }
5478
5479 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5480                                     struct kvm_mp_state *mp_state)
5481 {
5482         vcpu->arch.mp_state = mp_state->mp_state;
5483         kvm_make_request(KVM_REQ_EVENT, vcpu);
5484         return 0;
5485 }
5486
5487 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5488                     bool has_error_code, u32 error_code)
5489 {
5490         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5491         int ret;
5492
5493         init_emulate_ctxt(vcpu);
5494
5495         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5496                                    tss_selector, reason, has_error_code,
5497                                    error_code);
5498
5499         if (ret)
5500                 return EMULATE_FAIL;
5501
5502         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5503         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5504         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5505         kvm_make_request(KVM_REQ_EVENT, vcpu);
5506         return EMULATE_DONE;
5507 }
5508 EXPORT_SYMBOL_GPL(kvm_task_switch);
5509
5510 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5511                                   struct kvm_sregs *sregs)
5512 {
5513         int mmu_reset_needed = 0;
5514         int pending_vec, max_bits;
5515         struct desc_ptr dt;
5516
5517         dt.size = sregs->idt.limit;
5518         dt.address = sregs->idt.base;
5519         kvm_x86_ops->set_idt(vcpu, &dt);
5520         dt.size = sregs->gdt.limit;
5521         dt.address = sregs->gdt.base;
5522         kvm_x86_ops->set_gdt(vcpu, &dt);
5523
5524         vcpu->arch.cr2 = sregs->cr2;
5525         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5526         vcpu->arch.cr3 = sregs->cr3;
5527
5528         kvm_set_cr8(vcpu, sregs->cr8);
5529
5530         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5531         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5532         kvm_set_apic_base(vcpu, sregs->apic_base);
5533
5534         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5535         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5536         vcpu->arch.cr0 = sregs->cr0;
5537
5538         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5539         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5540         if (sregs->cr4 & X86_CR4_OSXSAVE)
5541                 update_cpuid(vcpu);
5542         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5543                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5544                 mmu_reset_needed = 1;
5545         }
5546
5547         if (mmu_reset_needed)
5548                 kvm_mmu_reset_context(vcpu);
5549
5550         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5551         pending_vec = find_first_bit(
5552                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5553         if (pending_vec < max_bits) {
5554                 kvm_queue_interrupt(vcpu, pending_vec, false);
5555                 pr_debug("Set back pending irq %d\n", pending_vec);
5556                 if (irqchip_in_kernel(vcpu->kvm))
5557                         kvm_pic_clear_isr_ack(vcpu->kvm);
5558         }
5559
5560         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5561         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5562         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5563         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5564         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5565         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5566
5567         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5568         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5569
5570         update_cr8_intercept(vcpu);
5571
5572         /* Older userspace won't unhalt the vcpu on reset. */
5573         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5574             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5575             !is_protmode(vcpu))
5576                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5577
5578         kvm_make_request(KVM_REQ_EVENT, vcpu);
5579
5580         return 0;
5581 }
5582
5583 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5584                                         struct kvm_guest_debug *dbg)
5585 {
5586         unsigned long rflags;
5587         int i, r;
5588
5589         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5590                 r = -EBUSY;
5591                 if (vcpu->arch.exception.pending)
5592                         goto out;
5593                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5594                         kvm_queue_exception(vcpu, DB_VECTOR);
5595                 else
5596                         kvm_queue_exception(vcpu, BP_VECTOR);
5597         }
5598
5599         /*
5600          * Read rflags as long as potentially injected trace flags are still
5601          * filtered out.
5602          */
5603         rflags = kvm_get_rflags(vcpu);
5604
5605         vcpu->guest_debug = dbg->control;
5606         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5607                 vcpu->guest_debug = 0;
5608
5609         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5610                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5611                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5612                 vcpu->arch.switch_db_regs =
5613                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5614         } else {
5615                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5616                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5617                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5618         }
5619
5620         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5621                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5622                         get_segment_base(vcpu, VCPU_SREG_CS);
5623
5624         /*
5625          * Trigger an rflags update that will inject or remove the trace
5626          * flags.
5627          */
5628         kvm_set_rflags(vcpu, rflags);
5629
5630         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5631
5632         r = 0;
5633
5634 out:
5635
5636         return r;
5637 }
5638
5639 /*
5640  * Translate a guest virtual address to a guest physical address.
5641  */
5642 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5643                                     struct kvm_translation *tr)
5644 {
5645         unsigned long vaddr = tr->linear_address;
5646         gpa_t gpa;
5647         int idx;
5648
5649         idx = srcu_read_lock(&vcpu->kvm->srcu);
5650         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5651         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5652         tr->physical_address = gpa;
5653         tr->valid = gpa != UNMAPPED_GVA;
5654         tr->writeable = 1;
5655         tr->usermode = 0;
5656
5657         return 0;
5658 }
5659
5660 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5661 {
5662         struct i387_fxsave_struct *fxsave =
5663                         &vcpu->arch.guest_fpu.state->fxsave;
5664
5665         memcpy(fpu->fpr, fxsave->st_space, 128);
5666         fpu->fcw = fxsave->cwd;
5667         fpu->fsw = fxsave->swd;
5668         fpu->ftwx = fxsave->twd;
5669         fpu->last_opcode = fxsave->fop;
5670         fpu->last_ip = fxsave->rip;
5671         fpu->last_dp = fxsave->rdp;
5672         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5673
5674         return 0;
5675 }
5676
5677 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5678 {
5679         struct i387_fxsave_struct *fxsave =
5680                         &vcpu->arch.guest_fpu.state->fxsave;
5681
5682         memcpy(fxsave->st_space, fpu->fpr, 128);
5683         fxsave->cwd = fpu->fcw;
5684         fxsave->swd = fpu->fsw;
5685         fxsave->twd = fpu->ftwx;
5686         fxsave->fop = fpu->last_opcode;
5687         fxsave->rip = fpu->last_ip;
5688         fxsave->rdp = fpu->last_dp;
5689         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5690
5691         return 0;
5692 }
5693
5694 int fx_init(struct kvm_vcpu *vcpu)
5695 {
5696         int err;
5697
5698         err = fpu_alloc(&vcpu->arch.guest_fpu);
5699         if (err)
5700                 return err;
5701
5702         fpu_finit(&vcpu->arch.guest_fpu);
5703
5704         /*
5705          * Ensure guest xcr0 is valid for loading
5706          */
5707         vcpu->arch.xcr0 = XSTATE_FP;
5708
5709         vcpu->arch.cr0 |= X86_CR0_ET;
5710
5711         return 0;
5712 }
5713 EXPORT_SYMBOL_GPL(fx_init);
5714
5715 static void fx_free(struct kvm_vcpu *vcpu)
5716 {
5717         fpu_free(&vcpu->arch.guest_fpu);
5718 }
5719
5720 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5721 {
5722         if (vcpu->guest_fpu_loaded)
5723                 return;
5724
5725         /*
5726          * Restore all possible states in the guest,
5727          * and assume host would use all available bits.
5728          * Guest xcr0 would be loaded later.
5729          */
5730         kvm_put_guest_xcr0(vcpu);
5731         vcpu->guest_fpu_loaded = 1;
5732         unlazy_fpu(current);
5733         fpu_restore_checking(&vcpu->arch.guest_fpu);
5734         trace_kvm_fpu(1);
5735 }
5736
5737 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5738 {
5739         kvm_put_guest_xcr0(vcpu);
5740
5741         if (!vcpu->guest_fpu_loaded)
5742                 return;
5743
5744         vcpu->guest_fpu_loaded = 0;
5745         fpu_save_init(&vcpu->arch.guest_fpu);
5746         ++vcpu->stat.fpu_reload;
5747         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5748         trace_kvm_fpu(0);
5749 }
5750
5751 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5752 {
5753         if (vcpu->arch.time_page) {
5754                 kvm_release_page_dirty(vcpu->arch.time_page);
5755                 vcpu->arch.time_page = NULL;
5756         }
5757
5758         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5759         fx_free(vcpu);
5760         kvm_x86_ops->vcpu_free(vcpu);
5761 }
5762
5763 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5764                                                 unsigned int id)
5765 {
5766         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5767                 printk_once(KERN_WARNING
5768                 "kvm: SMP vm created on host with unstable TSC; "
5769                 "guest TSC will not be reliable\n");
5770         return kvm_x86_ops->vcpu_create(kvm, id);
5771 }
5772
5773 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5774 {
5775         int r;
5776
5777         vcpu->arch.mtrr_state.have_fixed = 1;
5778         vcpu_load(vcpu);
5779         r = kvm_arch_vcpu_reset(vcpu);
5780         if (r == 0)
5781                 r = kvm_mmu_setup(vcpu);
5782         vcpu_put(vcpu);
5783         if (r < 0)
5784                 goto free_vcpu;
5785
5786         return 0;
5787 free_vcpu:
5788         kvm_x86_ops->vcpu_free(vcpu);
5789         return r;
5790 }
5791
5792 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5793 {
5794         vcpu_load(vcpu);
5795         kvm_mmu_unload(vcpu);
5796         vcpu_put(vcpu);
5797
5798         fx_free(vcpu);
5799         kvm_x86_ops->vcpu_free(vcpu);
5800 }
5801
5802 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5803 {
5804         vcpu->arch.nmi_pending = false;
5805         vcpu->arch.nmi_injected = false;
5806
5807         vcpu->arch.switch_db_regs = 0;
5808         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5809         vcpu->arch.dr6 = DR6_FIXED_1;
5810         vcpu->arch.dr7 = DR7_FIXED_1;
5811
5812         kvm_make_request(KVM_REQ_EVENT, vcpu);
5813
5814         kvm_clear_async_pf_completion_queue(vcpu);
5815         kvm_async_pf_hash_reset(vcpu);
5816         vcpu->arch.apf.halted = false;
5817
5818         return kvm_x86_ops->vcpu_reset(vcpu);
5819 }
5820
5821 int kvm_arch_hardware_enable(void *garbage)
5822 {
5823         struct kvm *kvm;
5824         struct kvm_vcpu *vcpu;
5825         int i;
5826
5827         kvm_shared_msr_cpu_online();
5828         list_for_each_entry(kvm, &vm_list, vm_list)
5829                 kvm_for_each_vcpu(i, vcpu, kvm)
5830                         if (vcpu->cpu == smp_processor_id())
5831                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5832         return kvm_x86_ops->hardware_enable(garbage);
5833 }
5834
5835 void kvm_arch_hardware_disable(void *garbage)
5836 {
5837         kvm_x86_ops->hardware_disable(garbage);
5838         drop_user_return_notifiers(garbage);
5839 }
5840
5841 int kvm_arch_hardware_setup(void)
5842 {
5843         return kvm_x86_ops->hardware_setup();
5844 }
5845
5846 void kvm_arch_hardware_unsetup(void)
5847 {
5848         kvm_x86_ops->hardware_unsetup();
5849 }
5850
5851 void kvm_arch_check_processor_compat(void *rtn)
5852 {
5853         kvm_x86_ops->check_processor_compatibility(rtn);
5854 }
5855
5856 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5857 {
5858         struct page *page;
5859         struct kvm *kvm;
5860         int r;
5861
5862         BUG_ON(vcpu->kvm == NULL);
5863         kvm = vcpu->kvm;
5864
5865         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5866         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5867         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5868         vcpu->arch.mmu.translate_gpa = translate_gpa;
5869         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5870         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5871                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5872         else
5873                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5874
5875         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5876         if (!page) {
5877                 r = -ENOMEM;
5878                 goto fail;
5879         }
5880         vcpu->arch.pio_data = page_address(page);
5881
5882         if (!kvm->arch.virtual_tsc_khz)
5883                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5884
5885         r = kvm_mmu_create(vcpu);
5886         if (r < 0)
5887                 goto fail_free_pio_data;
5888
5889         if (irqchip_in_kernel(kvm)) {
5890                 r = kvm_create_lapic(vcpu);
5891                 if (r < 0)
5892                         goto fail_mmu_destroy;
5893         }
5894
5895         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5896                                        GFP_KERNEL);
5897         if (!vcpu->arch.mce_banks) {
5898                 r = -ENOMEM;
5899                 goto fail_free_lapic;
5900         }
5901         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5902
5903         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5904                 goto fail_free_mce_banks;
5905
5906         kvm_async_pf_hash_reset(vcpu);
5907
5908         return 0;
5909 fail_free_mce_banks:
5910         kfree(vcpu->arch.mce_banks);
5911 fail_free_lapic:
5912         kvm_free_lapic(vcpu);
5913 fail_mmu_destroy:
5914         kvm_mmu_destroy(vcpu);
5915 fail_free_pio_data:
5916         free_page((unsigned long)vcpu->arch.pio_data);
5917 fail:
5918         return r;
5919 }
5920
5921 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5922 {
5923         int idx;
5924
5925         kfree(vcpu->arch.mce_banks);
5926         kvm_free_lapic(vcpu);
5927         idx = srcu_read_lock(&vcpu->kvm->srcu);
5928         kvm_mmu_destroy(vcpu);
5929         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5930         free_page((unsigned long)vcpu->arch.pio_data);
5931 }
5932
5933 struct  kvm *kvm_arch_create_vm(void)
5934 {
5935         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5936
5937         if (!kvm)
5938                 return ERR_PTR(-ENOMEM);
5939
5940         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5941         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5942
5943         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5944         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5945
5946         spin_lock_init(&kvm->arch.tsc_write_lock);
5947
5948         return kvm;
5949 }
5950
5951 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5952 {
5953         vcpu_load(vcpu);
5954         kvm_mmu_unload(vcpu);
5955         vcpu_put(vcpu);
5956 }
5957
5958 static void kvm_free_vcpus(struct kvm *kvm)
5959 {
5960         unsigned int i;
5961         struct kvm_vcpu *vcpu;
5962
5963         /*
5964          * Unpin any mmu pages first.
5965          */
5966         kvm_for_each_vcpu(i, vcpu, kvm) {
5967                 kvm_clear_async_pf_completion_queue(vcpu);
5968                 kvm_unload_vcpu_mmu(vcpu);
5969         }
5970         kvm_for_each_vcpu(i, vcpu, kvm)
5971                 kvm_arch_vcpu_free(vcpu);
5972
5973         mutex_lock(&kvm->lock);
5974         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5975                 kvm->vcpus[i] = NULL;
5976
5977         atomic_set(&kvm->online_vcpus, 0);
5978         mutex_unlock(&kvm->lock);
5979 }
5980
5981 void kvm_arch_sync_events(struct kvm *kvm)
5982 {
5983         kvm_free_all_assigned_devices(kvm);
5984         kvm_free_pit(kvm);
5985 }
5986
5987 void kvm_arch_destroy_vm(struct kvm *kvm)
5988 {
5989         kvm_iommu_unmap_guest(kvm);
5990         kfree(kvm->arch.vpic);
5991         kfree(kvm->arch.vioapic);
5992         kvm_free_vcpus(kvm);
5993         kvm_free_physmem(kvm);
5994         if (kvm->arch.apic_access_page)
5995                 put_page(kvm->arch.apic_access_page);
5996         if (kvm->arch.ept_identity_pagetable)
5997                 put_page(kvm->arch.ept_identity_pagetable);
5998         cleanup_srcu_struct(&kvm->srcu);
5999         kfree(kvm);
6000 }
6001
6002 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6003                                 struct kvm_memory_slot *memslot,
6004                                 struct kvm_memory_slot old,
6005                                 struct kvm_userspace_memory_region *mem,
6006                                 int user_alloc)
6007 {
6008         int npages = memslot->npages;
6009         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6010
6011         /* Prevent internal slot pages from being moved by fork()/COW. */
6012         if (memslot->id >= KVM_MEMORY_SLOTS)
6013                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6014
6015         /*To keep backward compatibility with older userspace,
6016          *x86 needs to hanlde !user_alloc case.
6017          */
6018         if (!user_alloc) {
6019                 if (npages && !old.rmap) {
6020                         unsigned long userspace_addr;
6021
6022                         down_write(&current->mm->mmap_sem);
6023                         userspace_addr = do_mmap(NULL, 0,
6024                                                  npages * PAGE_SIZE,
6025                                                  PROT_READ | PROT_WRITE,
6026                                                  map_flags,
6027                                                  0);
6028                         up_write(&current->mm->mmap_sem);
6029
6030                         if (IS_ERR((void *)userspace_addr))
6031                                 return PTR_ERR((void *)userspace_addr);
6032
6033                         memslot->userspace_addr = userspace_addr;
6034                 }
6035         }
6036
6037
6038         return 0;
6039 }
6040
6041 void kvm_arch_commit_memory_region(struct kvm *kvm,
6042                                 struct kvm_userspace_memory_region *mem,
6043                                 struct kvm_memory_slot old,
6044                                 int user_alloc)
6045 {
6046
6047         int npages = mem->memory_size >> PAGE_SHIFT;
6048
6049         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6050                 int ret;
6051
6052                 down_write(&current->mm->mmap_sem);
6053                 ret = do_munmap(current->mm, old.userspace_addr,
6054                                 old.npages * PAGE_SIZE);
6055                 up_write(&current->mm->mmap_sem);
6056                 if (ret < 0)
6057                         printk(KERN_WARNING
6058                                "kvm_vm_ioctl_set_memory_region: "
6059                                "failed to munmap memory\n");
6060         }
6061
6062         spin_lock(&kvm->mmu_lock);
6063         if (!kvm->arch.n_requested_mmu_pages) {
6064                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6065                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6066         }
6067
6068         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6069         spin_unlock(&kvm->mmu_lock);
6070 }
6071
6072 void kvm_arch_flush_shadow(struct kvm *kvm)
6073 {
6074         kvm_mmu_zap_all(kvm);
6075         kvm_reload_remote_mmus(kvm);
6076 }
6077
6078 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6079 {
6080         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6081                 !vcpu->arch.apf.halted)
6082                 || !list_empty_careful(&vcpu->async_pf.done)
6083                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6084                 || vcpu->arch.nmi_pending ||
6085                 (kvm_arch_interrupt_allowed(vcpu) &&
6086                  kvm_cpu_has_interrupt(vcpu));
6087 }
6088
6089 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6090 {
6091         int me;
6092         int cpu = vcpu->cpu;
6093
6094         if (waitqueue_active(&vcpu->wq)) {
6095                 wake_up_interruptible(&vcpu->wq);
6096                 ++vcpu->stat.halt_wakeup;
6097         }
6098
6099         me = get_cpu();
6100         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6101                 if (atomic_xchg(&vcpu->guest_mode, 0))
6102                         smp_send_reschedule(cpu);
6103         put_cpu();
6104 }
6105
6106 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6107 {
6108         return kvm_x86_ops->interrupt_allowed(vcpu);
6109 }
6110
6111 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6112 {
6113         unsigned long current_rip = kvm_rip_read(vcpu) +
6114                 get_segment_base(vcpu, VCPU_SREG_CS);
6115
6116         return current_rip == linear_rip;
6117 }
6118 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6119
6120 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6121 {
6122         unsigned long rflags;
6123
6124         rflags = kvm_x86_ops->get_rflags(vcpu);
6125         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6126                 rflags &= ~X86_EFLAGS_TF;
6127         return rflags;
6128 }
6129 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6130
6131 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6132 {
6133         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6134             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6135                 rflags |= X86_EFLAGS_TF;
6136         kvm_x86_ops->set_rflags(vcpu, rflags);
6137         kvm_make_request(KVM_REQ_EVENT, vcpu);
6138 }
6139 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6140
6141 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6142 {
6143         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6144 }
6145
6146 static inline u32 kvm_async_pf_next_probe(u32 key)
6147 {
6148         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6149 }
6150
6151 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6152 {
6153         u32 key = kvm_async_pf_hash_fn(gfn);
6154
6155         while (vcpu->arch.apf.gfns[key] != ~0)
6156                 key = kvm_async_pf_next_probe(key);
6157
6158         vcpu->arch.apf.gfns[key] = gfn;
6159 }
6160
6161 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6162 {
6163         int i;
6164         u32 key = kvm_async_pf_hash_fn(gfn);
6165
6166         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6167                      (vcpu->arch.apf.gfns[key] != gfn ||
6168                       vcpu->arch.apf.gfns[key] == ~0); i++)
6169                 key = kvm_async_pf_next_probe(key);
6170
6171         return key;
6172 }
6173
6174 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6175 {
6176         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6177 }
6178
6179 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6180 {
6181         u32 i, j, k;
6182
6183         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6184         while (true) {
6185                 vcpu->arch.apf.gfns[i] = ~0;
6186                 do {
6187                         j = kvm_async_pf_next_probe(j);
6188                         if (vcpu->arch.apf.gfns[j] == ~0)
6189                                 return;
6190                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6191                         /*
6192                          * k lies cyclically in ]i,j]
6193                          * |    i.k.j |
6194                          * |....j i.k.| or  |.k..j i...|
6195                          */
6196                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6197                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6198                 i = j;
6199         }
6200 }
6201
6202 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6203                                      struct kvm_async_pf *work)
6204 {
6205         trace_kvm_async_pf_not_present(work->gva);
6206
6207         kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6208         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6209 }
6210
6211 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6212                                  struct kvm_async_pf *work)
6213 {
6214         trace_kvm_async_pf_ready(work->gva);
6215         kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6216 }
6217
6218 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6219 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6220 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6221 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6222 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6223 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6224 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6225 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6226 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6227 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6228 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6229 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);