arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define CR0_RESERVED_BITS                                               \
  64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  67 #define CR4_RESERVED_BITS                                               \
  68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  71                           | X86_CR4_OSXSAVE \
  72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  73
  74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  75
  76 #define KVM_MAX_MCE_BANKS 32
  77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  94                                     struct kvm_cpuid_entry2 __user *entries);
  95
  96 struct kvm_x86_ops *kvm_x86_ops;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 int ignore_msrs = 0;
 100 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 #define KVM_NR_SHARED_MSRS 16
 103
 104 struct kvm_shared_msrs_global {
 105         int nr;
 106         u32 msrs[KVM_NR_SHARED_MSRS];
 107 };
 108
 109 struct kvm_shared_msrs {
 110         struct user_return_notifier urn;
 111         bool registered;
 112         struct kvm_shared_msr_values {
 113                 u64 host;
 114                 u64 curr;
 115         } values[KVM_NR_SHARED_MSRS];
 116 };
 117
 118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 119 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 120
 121 struct kvm_stats_debugfs_item debugfs_entries[] = {
 122         { "pf_fixed", VCPU_STAT(pf_fixed) },
 123         { "pf_guest", VCPU_STAT(pf_guest) },
 124         { "tlb_flush", VCPU_STAT(tlb_flush) },
 125         { "invlpg", VCPU_STAT(invlpg) },
 126         { "exits", VCPU_STAT(exits) },
 127         { "io_exits", VCPU_STAT(io_exits) },
 128         { "mmio_exits", VCPU_STAT(mmio_exits) },
 129         { "signal_exits", VCPU_STAT(signal_exits) },
 130         { "irq_window", VCPU_STAT(irq_window_exits) },
 131         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 132         { "halt_exits", VCPU_STAT(halt_exits) },
 133         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 134         { "hypercalls", VCPU_STAT(hypercalls) },
 135         { "request_irq", VCPU_STAT(request_irq_exits) },
 136         { "irq_exits", VCPU_STAT(irq_exits) },
 137         { "host_state_reload", VCPU_STAT(host_state_reload) },
 138         { "efer_reload", VCPU_STAT(efer_reload) },
 139         { "fpu_reload", VCPU_STAT(fpu_reload) },
 140         { "insn_emulation", VCPU_STAT(insn_emulation) },
 141         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 142         { "irq_injections", VCPU_STAT(irq_injections) },
 143         { "nmi_injections", VCPU_STAT(nmi_injections) },
 144         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 145         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 146         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 147         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 148         { "mmu_flooded", VM_STAT(mmu_flooded) },
 149         { "mmu_recycled", VM_STAT(mmu_recycled) },
 150         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 151         { "mmu_unsync", VM_STAT(mmu_unsync) },
 152         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 153         { "largepages", VM_STAT(lpages) },
 154         { NULL }
 155 };
 156
 157 u64 __read_mostly host_xcr0;
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
 338 {
 339         unsigned error_code = vcpu->arch.fault.error_code;
 340
 341         ++vcpu->stat.pf_guest;
 342         vcpu->arch.cr2 = vcpu->arch.fault.address;
 343         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 344 }
 345
 346 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
 347 {
 348         if (mmu_is_nested(vcpu) && !vcpu->arch.fault.nested)
 349                 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
 350         else
 351                 vcpu->arch.mmu.inject_page_fault(vcpu);
 352
 353         vcpu->arch.fault.nested = false;
 354 }
 355
 356 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 357 {
 358         kvm_make_request(KVM_REQ_EVENT, vcpu);
 359         vcpu->arch.nmi_pending = 1;
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 362
 363 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 364 {
 365         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 368
 369 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 374
 375 /*
 376  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 377  * a #GP and return false.
 378  */
 379 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 380 {
 381         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 382                 return true;
 383         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 384         return false;
 385 }
 386 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 387
 388 /*
 389  * This function will be used to read from the physical memory of the currently
 390  * running guest. The difference to kvm_read_guest_page is that this function
 391  * can read from guest physical or from the guest's guest physical memory.
 392  */
 393 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 394                             gfn_t ngfn, void *data, int offset, int len,
 395                             u32 access)
 396 {
 397         gfn_t real_gfn;
 398         gpa_t ngpa;
 399
 400         ngpa     = gfn_to_gpa(ngfn);
 401         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 402         if (real_gfn == UNMAPPED_GVA)
 403                 return -EFAULT;
 404
 405         real_gfn = gpa_to_gfn(real_gfn);
 406
 407         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 410
 411 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 412                                void *data, int offset, int len, u32 access)
 413 {
 414         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 415                                        data, offset, len, access);
 416 }
 417
 418 /*
 419  * Load the pae pdptrs.  Return true is they are all valid.
 420  */
 421 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 422 {
 423         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 424         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 425         int i;
 426         int ret;
 427         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 428
 429         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 430                                       offset * sizeof(u64), sizeof(pdpte),
 431                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 432         if (ret < 0) {
 433                 ret = 0;
 434                 goto out;
 435         }
 436         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 437                 if (is_present_gpte(pdpte[i]) &&
 438                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 439                         ret = 0;
 440                         goto out;
 441                 }
 442         }
 443         ret = 1;
 444
 445         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 446         __set_bit(VCPU_EXREG_PDPTR,
 447                   (unsigned long *)&vcpu->arch.regs_avail);
 448         __set_bit(VCPU_EXREG_PDPTR,
 449                   (unsigned long *)&vcpu->arch.regs_dirty);
 450 out:
 451
 452         return ret;
 453 }
 454 EXPORT_SYMBOL_GPL(load_pdptrs);
 455
 456 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 457 {
 458         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 459         bool changed = true;
 460         int offset;
 461         gfn_t gfn;
 462         int r;
 463
 464         if (is_long_mode(vcpu) || !is_pae(vcpu))
 465                 return false;
 466
 467         if (!test_bit(VCPU_EXREG_PDPTR,
 468                       (unsigned long *)&vcpu->arch.regs_avail))
 469                 return true;
 470
 471         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
 472         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
 473         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 474                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 475         if (r < 0)
 476                 goto out;
 477         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 478 out:
 479
 480         return changed;
 481 }
 482
 483 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 484 {
 485         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 486         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 487                                     X86_CR0_CD | X86_CR0_NW;
 488
 489         cr0 |= X86_CR0_ET;
 490
 491 #ifdef CONFIG_X86_64
 492         if (cr0 & 0xffffffff00000000UL)
 493                 return 1;
 494 #endif
 495
 496         cr0 &= ~CR0_RESERVED_BITS;
 497
 498         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 499                 return 1;
 500
 501         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 502                 return 1;
 503
 504         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 505 #ifdef CONFIG_X86_64
 506                 if ((vcpu->arch.efer & EFER_LME)) {
 507                         int cs_db, cs_l;
 508
 509                         if (!is_pae(vcpu))
 510                                 return 1;
 511                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 512                         if (cs_l)
 513                                 return 1;
 514                 } else
 515 #endif
 516                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 517                                                  vcpu->arch.cr3))
 518                         return 1;
 519         }
 520
 521         kvm_x86_ops->set_cr0(vcpu, cr0);
 522
 523         if ((cr0 ^ old_cr0) & X86_CR0_PG)
 524                 kvm_clear_async_pf_completion_queue(vcpu);
 525
 526         if ((cr0 ^ old_cr0) & update_bits)
 527                 kvm_mmu_reset_context(vcpu);
 528         return 0;
 529 }
 530 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 531
 532 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 533 {
 534         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 535 }
 536 EXPORT_SYMBOL_GPL(kvm_lmsw);
 537
 538 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 539 {
 540         u64 xcr0;
 541
 542         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 543         if (index != XCR_XFEATURE_ENABLED_MASK)
 544                 return 1;
 545         xcr0 = xcr;
 546         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 547                 return 1;
 548         if (!(xcr0 & XSTATE_FP))
 549                 return 1;
 550         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 551                 return 1;
 552         if (xcr0 & ~host_xcr0)
 553                 return 1;
 554         vcpu->arch.xcr0 = xcr0;
 555         vcpu->guest_xcr0_loaded = 0;
 556         return 0;
 557 }
 558
 559 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 560 {
 561         if (__kvm_set_xcr(vcpu, index, xcr)) {
 562                 kvm_inject_gp(vcpu, 0);
 563                 return 1;
 564         }
 565         return 0;
 566 }
 567 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 568
 569 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 570 {
 571         struct kvm_cpuid_entry2 *best;
 572
 573         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 574         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 575 }
 576
 577 static void update_cpuid(struct kvm_vcpu *vcpu)
 578 {
 579         struct kvm_cpuid_entry2 *best;
 580
 581         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 582         if (!best)
 583                 return;
 584
 585         /* Update OSXSAVE bit */
 586         if (cpu_has_xsave && best->function == 0x1) {
 587                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 588                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 589                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 590         }
 591 }
 592
 593 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 594 {
 595         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 596         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 597
 598         if (cr4 & CR4_RESERVED_BITS)
 599                 return 1;
 600
 601         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 602                 return 1;
 603
 604         if (is_long_mode(vcpu)) {
 605                 if (!(cr4 & X86_CR4_PAE))
 606                         return 1;
 607         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 608                    && ((cr4 ^ old_cr4) & pdptr_bits)
 609                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
 610                 return 1;
 611
 612         if (cr4 & X86_CR4_VMXE)
 613                 return 1;
 614
 615         kvm_x86_ops->set_cr4(vcpu, cr4);
 616
 617         if ((cr4 ^ old_cr4) & pdptr_bits)
 618                 kvm_mmu_reset_context(vcpu);
 619
 620         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 621                 update_cpuid(vcpu);
 622
 623         return 0;
 624 }
 625 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 626
 627 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 628 {
 629         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 630                 kvm_mmu_sync_roots(vcpu);
 631                 kvm_mmu_flush_tlb(vcpu);
 632                 return 0;
 633         }
 634
 635         if (is_long_mode(vcpu)) {
 636                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 637                         return 1;
 638         } else {
 639                 if (is_pae(vcpu)) {
 640                         if (cr3 & CR3_PAE_RESERVED_BITS)
 641                                 return 1;
 642                         if (is_paging(vcpu) &&
 643                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 644                                 return 1;
 645                 }
 646                 /*
 647                  * We don't check reserved bits in nonpae mode, because
 648                  * this isn't enforced, and VMware depends on this.
 649                  */
 650         }
 651
 652         /*
 653          * Does the new cr3 value map to physical memory? (Note, we
 654          * catch an invalid cr3 even in real-mode, because it would
 655          * cause trouble later on when we turn on paging anyway.)
 656          *
 657          * A real CPU would silently accept an invalid cr3 and would
 658          * attempt to use it - with largely undefined (and often hard
 659          * to debug) behavior on the guest side.
 660          */
 661         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 662                 return 1;
 663         vcpu->arch.cr3 = cr3;
 664         vcpu->arch.mmu.new_cr3(vcpu);
 665         return 0;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 668
 669 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 670 {
 671         if (cr8 & CR8_RESERVED_BITS)
 672                 return 1;
 673         if (irqchip_in_kernel(vcpu->kvm))
 674                 kvm_lapic_set_tpr(vcpu, cr8);
 675         else
 676                 vcpu->arch.cr8 = cr8;
 677         return 0;
 678 }
 679
 680 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 681 {
 682         if (__kvm_set_cr8(vcpu, cr8))
 683                 kvm_inject_gp(vcpu, 0);
 684 }
 685 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 686
 687 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 688 {
 689         if (irqchip_in_kernel(vcpu->kvm))
 690                 return kvm_lapic_get_cr8(vcpu);
 691         else
 692                 return vcpu->arch.cr8;
 693 }
 694 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 695
 696 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 697 {
 698         switch (dr) {
 699         case 0 ... 3:
 700                 vcpu->arch.db[dr] = val;
 701                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 702                         vcpu->arch.eff_db[dr] = val;
 703                 break;
 704         case 4:
 705                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 706                         return 1; /* #UD */
 707                 /* fall through */
 708         case 6:
 709                 if (val & 0xffffffff00000000ULL)
 710                         return -1; /* #GP */
 711                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 712                 break;
 713         case 5:
 714                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 715                         return 1; /* #UD */
 716                 /* fall through */
 717         default: /* 7 */
 718                 if (val & 0xffffffff00000000ULL)
 719                         return -1; /* #GP */
 720                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 721                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 722                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 723                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 724                 }
 725                 break;
 726         }
 727
 728         return 0;
 729 }
 730
 731 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 732 {
 733         int res;
 734
 735         res = __kvm_set_dr(vcpu, dr, val);
 736         if (res > 0)
 737                 kvm_queue_exception(vcpu, UD_VECTOR);
 738         else if (res < 0)
 739                 kvm_inject_gp(vcpu, 0);
 740
 741         return res;
 742 }
 743 EXPORT_SYMBOL_GPL(kvm_set_dr);
 744
 745 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 746 {
 747         switch (dr) {
 748         case 0 ... 3:
 749                 *val = vcpu->arch.db[dr];
 750                 break;
 751         case 4:
 752                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 753                         return 1;
 754                 /* fall through */
 755         case 6:
 756                 *val = vcpu->arch.dr6;
 757                 break;
 758         case 5:
 759                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 760                         return 1;
 761                 /* fall through */
 762         default: /* 7 */
 763                 *val = vcpu->arch.dr7;
 764                 break;
 765         }
 766
 767         return 0;
 768 }
 769
 770 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 771 {
 772         if (_kvm_get_dr(vcpu, dr, val)) {
 773                 kvm_queue_exception(vcpu, UD_VECTOR);
 774                 return 1;
 775         }
 776         return 0;
 777 }
 778 EXPORT_SYMBOL_GPL(kvm_get_dr);
 779
 780 /*
 781  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 782  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 783  *
 784  * This list is modified at module load time to reflect the
 785  * capabilities of the host cpu. This capabilities test skips MSRs that are
 786  * kvm-specific. Those are put in the beginning of the list.
 787  */
 788
 789 #define KVM_SAVE_MSRS_BEGIN     8
 790 static u32 msrs_to_save[] = {
 791         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 792         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 793         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 794         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 795         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 796         MSR_STAR,
 797 #ifdef CONFIG_X86_64
 798         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 799 #endif
 800         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 801 };
 802
 803 static unsigned num_msrs_to_save;
 804
 805 static u32 emulated_msrs[] = {
 806         MSR_IA32_MISC_ENABLE,
 807         MSR_IA32_MCG_STATUS,
 808         MSR_IA32_MCG_CTL,
 809 };
 810
 811 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 812 {
 813         u64 old_efer = vcpu->arch.efer;
 814
 815         if (efer & efer_reserved_bits)
 816                 return 1;
 817
 818         if (is_paging(vcpu)
 819             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 820                 return 1;
 821
 822         if (efer & EFER_FFXSR) {
 823                 struct kvm_cpuid_entry2 *feat;
 824
 825                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 826                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 827                         return 1;
 828         }
 829
 830         if (efer & EFER_SVME) {
 831                 struct kvm_cpuid_entry2 *feat;
 832
 833                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 834                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 835                         return 1;
 836         }
 837
 838         efer &= ~EFER_LMA;
 839         efer |= vcpu->arch.efer & EFER_LMA;
 840
 841         kvm_x86_ops->set_efer(vcpu, efer);
 842
 843         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 844
 845         /* Update reserved bits */
 846         if ((efer ^ old_efer) & EFER_NX)
 847                 kvm_mmu_reset_context(vcpu);
 848
 849         return 0;
 850 }
 851
 852 void kvm_enable_efer_bits(u64 mask)
 853 {
 854        efer_reserved_bits &= ~mask;
 855 }
 856 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 857
 858
 859 /*
 860  * Writes msr value into into the appropriate "register".
 861  * Returns 0 on success, non-0 otherwise.
 862  * Assumes vcpu_load() was already called.
 863  */
 864 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 865 {
 866         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 867 }
 868
 869 /*
 870  * Adapt set_msr() to msr_io()'s calling convention
 871  */
 872 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 873 {
 874         return kvm_set_msr(vcpu, index, *data);
 875 }
 876
 877 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 878 {
 879         int version;
 880         int r;
 881         struct pvclock_wall_clock wc;
 882         struct timespec boot;
 883
 884         if (!wall_clock)
 885                 return;
 886
 887         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 888         if (r)
 889                 return;
 890
 891         if (version & 1)
 892                 ++version;  /* first time write, random junk */
 893
 894         ++version;
 895
 896         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 897
 898         /*
 899          * The guest calculates current wall clock time by adding
 900          * system time (updated by kvm_guest_time_update below) to the
 901          * wall clock specified here.  guest system time equals host
 902          * system time for us, thus we must fill in host boot time here.
 903          */
 904         getboottime(&boot);
 905
 906         wc.sec = boot.tv_sec;
 907         wc.nsec = boot.tv_nsec;
 908         wc.version = version;
 909
 910         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 911
 912         version++;
 913         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 914 }
 915
 916 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 917 {
 918         uint32_t quotient, remainder;
 919
 920         /* Don't try to replace with do_div(), this one calculates
 921          * "(dividend << 32) / divisor" */
 922         __asm__ ( "divl %4"
 923                   : "=a" (quotient), "=d" (remainder)
 924                   : "0" (0), "1" (dividend), "r" (divisor) );
 925         return quotient;
 926 }
 927
 928 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 929                                s8 *pshift, u32 *pmultiplier)
 930 {
 931         uint64_t scaled64;
 932         int32_t  shift = 0;
 933         uint64_t tps64;
 934         uint32_t tps32;
 935
 936         tps64 = base_khz * 1000LL;
 937         scaled64 = scaled_khz * 1000LL;
 938         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 939                 tps64 >>= 1;
 940                 shift--;
 941         }
 942
 943         tps32 = (uint32_t)tps64;
 944         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 945                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 946                         scaled64 >>= 1;
 947                 else
 948                         tps32 <<= 1;
 949                 shift++;
 950         }
 951
 952         *pshift = shift;
 953         *pmultiplier = div_frac(scaled64, tps32);
 954
 955         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 956                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 957 }
 958
 959 static inline u64 get_kernel_ns(void)
 960 {
 961         struct timespec ts;
 962
 963         WARN_ON(preemptible());
 964         ktime_get_ts(&ts);
 965         monotonic_to_bootbased(&ts);
 966         return timespec_to_ns(&ts);
 967 }
 968
 969 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 970 unsigned long max_tsc_khz;
 971
 972 static inline int kvm_tsc_changes_freq(void)
 973 {
 974         int cpu = get_cpu();
 975         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 976                   cpufreq_quick_get(cpu) != 0;
 977         put_cpu();
 978         return ret;
 979 }
 980
 981 static inline u64 nsec_to_cycles(u64 nsec)
 982 {
 983         u64 ret;
 984
 985         WARN_ON(preemptible());
 986         if (kvm_tsc_changes_freq())
 987                 printk_once(KERN_WARNING
 988                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 989         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 990         do_div(ret, USEC_PER_SEC);
 991         return ret;
 992 }
 993
 994 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 995 {
 996         /* Compute a scale to convert nanoseconds in TSC cycles */
 997         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 998                            &kvm->arch.virtual_tsc_shift,
 999                            &kvm->arch.virtual_tsc_mult);
1000         kvm->arch.virtual_tsc_khz = this_tsc_khz;
1001 }
1002
1003 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1004 {
1005         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1006                                       vcpu->kvm->arch.virtual_tsc_mult,
1007                                       vcpu->kvm->arch.virtual_tsc_shift);
1008         tsc += vcpu->arch.last_tsc_write;
1009         return tsc;
1010 }
1011
1012 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1013 {
1014         struct kvm *kvm = vcpu->kvm;
1015         u64 offset, ns, elapsed;
1016         unsigned long flags;
1017         s64 sdiff;
1018
1019         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1020         offset = data - native_read_tsc();
1021         ns = get_kernel_ns();
1022         elapsed = ns - kvm->arch.last_tsc_nsec;
1023         sdiff = data - kvm->arch.last_tsc_write;
1024         if (sdiff < 0)
1025                 sdiff = -sdiff;
1026
1027         /*
1028          * Special case: close write to TSC within 5 seconds of
1029          * another CPU is interpreted as an attempt to synchronize
1030          * The 5 seconds is to accomodate host load / swapping as
1031          * well as any reset of TSC during the boot process.
1032          *
1033          * In that case, for a reliable TSC, we can match TSC offsets,
1034          * or make a best guest using elapsed value.
1035          */
1036         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1037             elapsed < 5ULL * NSEC_PER_SEC) {
1038                 if (!check_tsc_unstable()) {
1039                         offset = kvm->arch.last_tsc_offset;
1040                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1041                 } else {
1042                         u64 delta = nsec_to_cycles(elapsed);
1043                         offset += delta;
1044                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1045                 }
1046                 ns = kvm->arch.last_tsc_nsec;
1047         }
1048         kvm->arch.last_tsc_nsec = ns;
1049         kvm->arch.last_tsc_write = data;
1050         kvm->arch.last_tsc_offset = offset;
1051         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1052         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1053
1054         /* Reset of TSC must disable overshoot protection below */
1055         vcpu->arch.hv_clock.tsc_timestamp = 0;
1056         vcpu->arch.last_tsc_write = data;
1057         vcpu->arch.last_tsc_nsec = ns;
1058 }
1059 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1060
1061 static int kvm_guest_time_update(struct kvm_vcpu *v)
1062 {
1063         unsigned long flags;
1064         struct kvm_vcpu_arch *vcpu = &v->arch;
1065         void *shared_kaddr;
1066         unsigned long this_tsc_khz;
1067         s64 kernel_ns, max_kernel_ns;
1068         u64 tsc_timestamp;
1069
1070         /* Keep irq disabled to prevent changes to the clock */
1071         local_irq_save(flags);
1072         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1073         kernel_ns = get_kernel_ns();
1074         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1075
1076         if (unlikely(this_tsc_khz == 0)) {
1077                 local_irq_restore(flags);
1078                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1079                 return 1;
1080         }
1081
1082         /*
1083          * We may have to catch up the TSC to match elapsed wall clock
1084          * time for two reasons, even if kvmclock is used.
1085          *   1) CPU could have been running below the maximum TSC rate
1086          *   2) Broken TSC compensation resets the base at each VCPU
1087          *      entry to avoid unknown leaps of TSC even when running
1088          *      again on the same CPU.  This may cause apparent elapsed
1089          *      time to disappear, and the guest to stand still or run
1090          *      very slowly.
1091          */
1092         if (vcpu->tsc_catchup) {
1093                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1094                 if (tsc > tsc_timestamp) {
1095                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1096                         tsc_timestamp = tsc;
1097                 }
1098         }
1099
1100         local_irq_restore(flags);
1101
1102         if (!vcpu->time_page)
1103                 return 0;
1104
1105         /*
1106          * Time as measured by the TSC may go backwards when resetting the base
1107          * tsc_timestamp.  The reason for this is that the TSC resolution is
1108          * higher than the resolution of the other clock scales.  Thus, many
1109          * possible measurments of the TSC correspond to one measurement of any
1110          * other clock, and so a spread of values is possible.  This is not a
1111          * problem for the computation of the nanosecond clock; with TSC rates
1112          * around 1GHZ, there can only be a few cycles which correspond to one
1113          * nanosecond value, and any path through this code will inevitably
1114          * take longer than that.  However, with the kernel_ns value itself,
1115          * the precision may be much lower, down to HZ granularity.  If the
1116          * first sampling of TSC against kernel_ns ends in the low part of the
1117          * range, and the second in the high end of the range, we can get:
1118          *
1119          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1120          *
1121          * As the sampling errors potentially range in the thousands of cycles,
1122          * it is possible such a time value has already been observed by the
1123          * guest.  To protect against this, we must compute the system time as
1124          * observed by the guest and ensure the new system time is greater.
1125          */
1126         max_kernel_ns = 0;
1127         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1128                 max_kernel_ns = vcpu->last_guest_tsc -
1129                                 vcpu->hv_clock.tsc_timestamp;
1130                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1131                                     vcpu->hv_clock.tsc_to_system_mul,
1132                                     vcpu->hv_clock.tsc_shift);
1133                 max_kernel_ns += vcpu->last_kernel_ns;
1134         }
1135
1136         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1137                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1138                                    &vcpu->hv_clock.tsc_shift,
1139                                    &vcpu->hv_clock.tsc_to_system_mul);
1140                 vcpu->hw_tsc_khz = this_tsc_khz;
1141         }
1142
1143         if (max_kernel_ns > kernel_ns)
1144                 kernel_ns = max_kernel_ns;
1145
1146         /* With all the info we got, fill in the values */
1147         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1148         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1149         vcpu->last_kernel_ns = kernel_ns;
1150         vcpu->last_guest_tsc = tsc_timestamp;
1151         vcpu->hv_clock.flags = 0;
1152
1153         /*
1154          * The interface expects us to write an even number signaling that the
1155          * update is finished. Since the guest won't see the intermediate
1156          * state, we just increase by 2 at the end.
1157          */
1158         vcpu->hv_clock.version += 2;
1159
1160         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1161
1162         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1163                sizeof(vcpu->hv_clock));
1164
1165         kunmap_atomic(shared_kaddr, KM_USER0);
1166
1167         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1168         return 0;
1169 }
1170
1171 static bool msr_mtrr_valid(unsigned msr)
1172 {
1173         switch (msr) {
1174         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1175         case MSR_MTRRfix64K_00000:
1176         case MSR_MTRRfix16K_80000:
1177         case MSR_MTRRfix16K_A0000:
1178         case MSR_MTRRfix4K_C0000:
1179         case MSR_MTRRfix4K_C8000:
1180         case MSR_MTRRfix4K_D0000:
1181         case MSR_MTRRfix4K_D8000:
1182         case MSR_MTRRfix4K_E0000:
1183         case MSR_MTRRfix4K_E8000:
1184         case MSR_MTRRfix4K_F0000:
1185         case MSR_MTRRfix4K_F8000:
1186         case MSR_MTRRdefType:
1187         case MSR_IA32_CR_PAT:
1188                 return true;
1189         case 0x2f8:
1190                 return true;
1191         }
1192         return false;
1193 }
1194
1195 static bool valid_pat_type(unsigned t)
1196 {
1197         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1198 }
1199
1200 static bool valid_mtrr_type(unsigned t)
1201 {
1202         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1203 }
1204
1205 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1206 {
1207         int i;
1208
1209         if (!msr_mtrr_valid(msr))
1210                 return false;
1211
1212         if (msr == MSR_IA32_CR_PAT) {
1213                 for (i = 0; i < 8; i++)
1214                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1215                                 return false;
1216                 return true;
1217         } else if (msr == MSR_MTRRdefType) {
1218                 if (data & ~0xcff)
1219                         return false;
1220                 return valid_mtrr_type(data & 0xff);
1221         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1222                 for (i = 0; i < 8 ; i++)
1223                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1224                                 return false;
1225                 return true;
1226         }
1227
1228         /* variable MTRRs */
1229         return valid_mtrr_type(data & 0xff);
1230 }
1231
1232 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1233 {
1234         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1235
1236         if (!mtrr_valid(vcpu, msr, data))
1237                 return 1;
1238
1239         if (msr == MSR_MTRRdefType) {
1240                 vcpu->arch.mtrr_state.def_type = data;
1241                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1242         } else if (msr == MSR_MTRRfix64K_00000)
1243                 p[0] = data;
1244         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1245                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1246         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1247                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1248         else if (msr == MSR_IA32_CR_PAT)
1249                 vcpu->arch.pat = data;
1250         else {  /* Variable MTRRs */
1251                 int idx, is_mtrr_mask;
1252                 u64 *pt;
1253
1254                 idx = (msr - 0x200) / 2;
1255                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1256                 if (!is_mtrr_mask)
1257                         pt =
1258                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1259                 else
1260                         pt =
1261                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1262                 *pt = data;
1263         }
1264
1265         kvm_mmu_reset_context(vcpu);
1266         return 0;
1267 }
1268
1269 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1270 {
1271         u64 mcg_cap = vcpu->arch.mcg_cap;
1272         unsigned bank_num = mcg_cap & 0xff;
1273
1274         switch (msr) {
1275         case MSR_IA32_MCG_STATUS:
1276                 vcpu->arch.mcg_status = data;
1277                 break;
1278         case MSR_IA32_MCG_CTL:
1279                 if (!(mcg_cap & MCG_CTL_P))
1280                         return 1;
1281                 if (data != 0 && data != ~(u64)0)
1282                         return -1;
1283                 vcpu->arch.mcg_ctl = data;
1284                 break;
1285         default:
1286                 if (msr >= MSR_IA32_MC0_CTL &&
1287                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1288                         u32 offset = msr - MSR_IA32_MC0_CTL;
1289                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1290                          * some Linux kernels though clear bit 10 in bank 4 to
1291                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1292                          * this to avoid an uncatched #GP in the guest
1293                          */
1294                         if ((offset & 0x3) == 0 &&
1295                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1296                                 return -1;
1297                         vcpu->arch.mce_banks[offset] = data;
1298                         break;
1299                 }
1300                 return 1;
1301         }
1302         return 0;
1303 }
1304
1305 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1306 {
1307         struct kvm *kvm = vcpu->kvm;
1308         int lm = is_long_mode(vcpu);
1309         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1310                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1311         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1312                 : kvm->arch.xen_hvm_config.blob_size_32;
1313         u32 page_num = data & ~PAGE_MASK;
1314         u64 page_addr = data & PAGE_MASK;
1315         u8 *page;
1316         int r;
1317
1318         r = -E2BIG;
1319         if (page_num >= blob_size)
1320                 goto out;
1321         r = -ENOMEM;
1322         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1323         if (!page)
1324                 goto out;
1325         r = -EFAULT;
1326         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1327                 goto out_free;
1328         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1329                 goto out_free;
1330         r = 0;
1331 out_free:
1332         kfree(page);
1333 out:
1334         return r;
1335 }
1336
1337 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1338 {
1339         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1340 }
1341
1342 static bool kvm_hv_msr_partition_wide(u32 msr)
1343 {
1344         bool r = false;
1345         switch (msr) {
1346         case HV_X64_MSR_GUEST_OS_ID:
1347         case HV_X64_MSR_HYPERCALL:
1348                 r = true;
1349                 break;
1350         }
1351
1352         return r;
1353 }
1354
1355 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1356 {
1357         struct kvm *kvm = vcpu->kvm;
1358
1359         switch (msr) {
1360         case HV_X64_MSR_GUEST_OS_ID:
1361                 kvm->arch.hv_guest_os_id = data;
1362                 /* setting guest os id to zero disables hypercall page */
1363                 if (!kvm->arch.hv_guest_os_id)
1364                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1365                 break;
1366         case HV_X64_MSR_HYPERCALL: {
1367                 u64 gfn;
1368                 unsigned long addr;
1369                 u8 instructions[4];
1370
1371                 /* if guest os id is not set hypercall should remain disabled */
1372                 if (!kvm->arch.hv_guest_os_id)
1373                         break;
1374                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1375                         kvm->arch.hv_hypercall = data;
1376                         break;
1377                 }
1378                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1379                 addr = gfn_to_hva(kvm, gfn);
1380                 if (kvm_is_error_hva(addr))
1381                         return 1;
1382                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1383                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1384                 if (copy_to_user((void __user *)addr, instructions, 4))
1385                         return 1;
1386                 kvm->arch.hv_hypercall = data;
1387                 break;
1388         }
1389         default:
1390                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1391                           "data 0x%llx\n", msr, data);
1392                 return 1;
1393         }
1394         return 0;
1395 }
1396
1397 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1398 {
1399         switch (msr) {
1400         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1401                 unsigned long addr;
1402
1403                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1404                         vcpu->arch.hv_vapic = data;
1405                         break;
1406                 }
1407                 addr = gfn_to_hva(vcpu->kvm, data >>
1408                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1409                 if (kvm_is_error_hva(addr))
1410                         return 1;
1411                 if (clear_user((void __user *)addr, PAGE_SIZE))
1412                         return 1;
1413                 vcpu->arch.hv_vapic = data;
1414                 break;
1415         }
1416         case HV_X64_MSR_EOI:
1417                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1418         case HV_X64_MSR_ICR:
1419                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1420         case HV_X64_MSR_TPR:
1421                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1422         default:
1423                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1424                           "data 0x%llx\n", msr, data);
1425                 return 1;
1426         }
1427
1428         return 0;
1429 }
1430
1431 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1432 {
1433         gpa_t gpa = data & ~0x3f;
1434
1435         /* Bits 2:5 are resrved, Should be zero */
1436         if (data & 0x3c)
1437                 return 1;
1438
1439         vcpu->arch.apf.msr_val = data;
1440
1441         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1442                 kvm_clear_async_pf_completion_queue(vcpu);
1443                 kvm_async_pf_hash_reset(vcpu);
1444                 return 0;
1445         }
1446
1447         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1448                 return 1;
1449
1450         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1451         kvm_async_pf_wakeup_all(vcpu);
1452         return 0;
1453 }
1454
1455 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1456 {
1457         switch (msr) {
1458         case MSR_EFER:
1459                 return set_efer(vcpu, data);
1460         case MSR_K7_HWCR:
1461                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1462                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1463                 if (data != 0) {
1464                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1465                                 data);
1466                         return 1;
1467                 }
1468                 break;
1469         case MSR_FAM10H_MMIO_CONF_BASE:
1470                 if (data != 0) {
1471                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1472                                 "0x%llx\n", data);
1473                         return 1;
1474                 }
1475                 break;
1476         case MSR_AMD64_NB_CFG:
1477                 break;
1478         case MSR_IA32_DEBUGCTLMSR:
1479                 if (!data) {
1480                         /* We support the non-activated case already */
1481                         break;
1482                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1483                         /* Values other than LBR and BTF are vendor-specific,
1484                            thus reserved and should throw a #GP */
1485                         return 1;
1486                 }
1487                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1488                         __func__, data);
1489                 break;
1490         case MSR_IA32_UCODE_REV:
1491         case MSR_IA32_UCODE_WRITE:
1492         case MSR_VM_HSAVE_PA:
1493         case MSR_AMD64_PATCH_LOADER:
1494                 break;
1495         case 0x200 ... 0x2ff:
1496                 return set_msr_mtrr(vcpu, msr, data);
1497         case MSR_IA32_APICBASE:
1498                 kvm_set_apic_base(vcpu, data);
1499                 break;
1500         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1501                 return kvm_x2apic_msr_write(vcpu, msr, data);
1502         case MSR_IA32_MISC_ENABLE:
1503                 vcpu->arch.ia32_misc_enable_msr = data;
1504                 break;
1505         case MSR_KVM_WALL_CLOCK_NEW:
1506         case MSR_KVM_WALL_CLOCK:
1507                 vcpu->kvm->arch.wall_clock = data;
1508                 kvm_write_wall_clock(vcpu->kvm, data);
1509                 break;
1510         case MSR_KVM_SYSTEM_TIME_NEW:
1511         case MSR_KVM_SYSTEM_TIME: {
1512                 if (vcpu->arch.time_page) {
1513                         kvm_release_page_dirty(vcpu->arch.time_page);
1514                         vcpu->arch.time_page = NULL;
1515                 }
1516
1517                 vcpu->arch.time = data;
1518                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1519
1520                 /* we verify if the enable bit is set... */
1521                 if (!(data & 1))
1522                         break;
1523
1524                 /* ...but clean it before doing the actual write */
1525                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1526
1527                 vcpu->arch.time_page =
1528                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1529
1530                 if (is_error_page(vcpu->arch.time_page)) {
1531                         kvm_release_page_clean(vcpu->arch.time_page);
1532                         vcpu->arch.time_page = NULL;
1533                 }
1534                 break;
1535         }
1536         case MSR_KVM_ASYNC_PF_EN:
1537                 if (kvm_pv_enable_async_pf(vcpu, data))
1538                         return 1;
1539                 break;
1540         case MSR_IA32_MCG_CTL:
1541         case MSR_IA32_MCG_STATUS:
1542         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1543                 return set_msr_mce(vcpu, msr, data);
1544
1545         /* Performance counters are not protected by a CPUID bit,
1546          * so we should check all of them in the generic path for the sake of
1547          * cross vendor migration.
1548          * Writing a zero into the event select MSRs disables them,
1549          * which we perfectly emulate ;-). Any other value should be at least
1550          * reported, some guests depend on them.
1551          */
1552         case MSR_P6_EVNTSEL0:
1553         case MSR_P6_EVNTSEL1:
1554         case MSR_K7_EVNTSEL0:
1555         case MSR_K7_EVNTSEL1:
1556         case MSR_K7_EVNTSEL2:
1557         case MSR_K7_EVNTSEL3:
1558                 if (data != 0)
1559                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1560                                 "0x%x data 0x%llx\n", msr, data);
1561                 break;
1562         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1563          * so we ignore writes to make it happy.
1564          */
1565         case MSR_P6_PERFCTR0:
1566         case MSR_P6_PERFCTR1:
1567         case MSR_K7_PERFCTR0:
1568         case MSR_K7_PERFCTR1:
1569         case MSR_K7_PERFCTR2:
1570         case MSR_K7_PERFCTR3:
1571                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1572                         "0x%x data 0x%llx\n", msr, data);
1573                 break;
1574         case MSR_K7_CLK_CTL:
1575                 /*
1576                  * Ignore all writes to this no longer documented MSR.
1577                  * Writes are only relevant for old K7 processors,
1578                  * all pre-dating SVM, but a recommended workaround from
1579                  * AMD for these chips. It is possible to speicify the
1580                  * affected processor models on the command line, hence
1581                  * the need to ignore the workaround.
1582                  */
1583                 break;
1584         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1585                 if (kvm_hv_msr_partition_wide(msr)) {
1586                         int r;
1587                         mutex_lock(&vcpu->kvm->lock);
1588                         r = set_msr_hyperv_pw(vcpu, msr, data);
1589                         mutex_unlock(&vcpu->kvm->lock);
1590                         return r;
1591                 } else
1592                         return set_msr_hyperv(vcpu, msr, data);
1593                 break;
1594         default:
1595                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1596                         return xen_hvm_config(vcpu, data);
1597                 if (!ignore_msrs) {
1598                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1599                                 msr, data);
1600                         return 1;
1601                 } else {
1602                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1603                                 msr, data);
1604                         break;
1605                 }
1606         }
1607         return 0;
1608 }
1609 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1610
1611
1612 /*
1613  * Reads an msr value (of 'msr_index') into 'pdata'.
1614  * Returns 0 on success, non-0 otherwise.
1615  * Assumes vcpu_load() was already called.
1616  */
1617 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1618 {
1619         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1620 }
1621
1622 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1623 {
1624         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1625
1626         if (!msr_mtrr_valid(msr))
1627                 return 1;
1628
1629         if (msr == MSR_MTRRdefType)
1630                 *pdata = vcpu->arch.mtrr_state.def_type +
1631                          (vcpu->arch.mtrr_state.enabled << 10);
1632         else if (msr == MSR_MTRRfix64K_00000)
1633                 *pdata = p[0];
1634         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1635                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1636         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1637                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1638         else if (msr == MSR_IA32_CR_PAT)
1639                 *pdata = vcpu->arch.pat;
1640         else {  /* Variable MTRRs */
1641                 int idx, is_mtrr_mask;
1642                 u64 *pt;
1643
1644                 idx = (msr - 0x200) / 2;
1645                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1646                 if (!is_mtrr_mask)
1647                         pt =
1648                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1649                 else
1650                         pt =
1651                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1652                 *pdata = *pt;
1653         }
1654
1655         return 0;
1656 }
1657
1658 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1659 {
1660         u64 data;
1661         u64 mcg_cap = vcpu->arch.mcg_cap;
1662         unsigned bank_num = mcg_cap & 0xff;
1663
1664         switch (msr) {
1665         case MSR_IA32_P5_MC_ADDR:
1666         case MSR_IA32_P5_MC_TYPE:
1667                 data = 0;
1668                 break;
1669         case MSR_IA32_MCG_CAP:
1670                 data = vcpu->arch.mcg_cap;
1671                 break;
1672         case MSR_IA32_MCG_CTL:
1673                 if (!(mcg_cap & MCG_CTL_P))
1674                         return 1;
1675                 data = vcpu->arch.mcg_ctl;
1676                 break;
1677         case MSR_IA32_MCG_STATUS:
1678                 data = vcpu->arch.mcg_status;
1679                 break;
1680         default:
1681                 if (msr >= MSR_IA32_MC0_CTL &&
1682                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1683                         u32 offset = msr - MSR_IA32_MC0_CTL;
1684                         data = vcpu->arch.mce_banks[offset];
1685                         break;
1686                 }
1687                 return 1;
1688         }
1689         *pdata = data;
1690         return 0;
1691 }
1692
1693 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1694 {
1695         u64 data = 0;
1696         struct kvm *kvm = vcpu->kvm;
1697
1698         switch (msr) {
1699         case HV_X64_MSR_GUEST_OS_ID:
1700                 data = kvm->arch.hv_guest_os_id;
1701                 break;
1702         case HV_X64_MSR_HYPERCALL:
1703                 data = kvm->arch.hv_hypercall;
1704                 break;
1705         default:
1706                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1707                 return 1;
1708         }
1709
1710         *pdata = data;
1711         return 0;
1712 }
1713
1714 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1715 {
1716         u64 data = 0;
1717
1718         switch (msr) {
1719         case HV_X64_MSR_VP_INDEX: {
1720                 int r;
1721                 struct kvm_vcpu *v;
1722                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1723                         if (v == vcpu)
1724                                 data = r;
1725                 break;
1726         }
1727         case HV_X64_MSR_EOI:
1728                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1729         case HV_X64_MSR_ICR:
1730                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1731         case HV_X64_MSR_TPR:
1732                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1733         default:
1734                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1735                 return 1;
1736         }
1737         *pdata = data;
1738         return 0;
1739 }
1740
1741 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1742 {
1743         u64 data;
1744
1745         switch (msr) {
1746         case MSR_IA32_PLATFORM_ID:
1747         case MSR_IA32_UCODE_REV:
1748         case MSR_IA32_EBL_CR_POWERON:
1749         case MSR_IA32_DEBUGCTLMSR:
1750         case MSR_IA32_LASTBRANCHFROMIP:
1751         case MSR_IA32_LASTBRANCHTOIP:
1752         case MSR_IA32_LASTINTFROMIP:
1753         case MSR_IA32_LASTINTTOIP:
1754         case MSR_K8_SYSCFG:
1755         case MSR_K7_HWCR:
1756         case MSR_VM_HSAVE_PA:
1757         case MSR_P6_PERFCTR0:
1758         case MSR_P6_PERFCTR1:
1759         case MSR_P6_EVNTSEL0:
1760         case MSR_P6_EVNTSEL1:
1761         case MSR_K7_EVNTSEL0:
1762         case MSR_K7_PERFCTR0:
1763         case MSR_K8_INT_PENDING_MSG:
1764         case MSR_AMD64_NB_CFG:
1765         case MSR_FAM10H_MMIO_CONF_BASE:
1766                 data = 0;
1767                 break;
1768         case MSR_MTRRcap:
1769                 data = 0x500 | KVM_NR_VAR_MTRR;
1770                 break;
1771         case 0x200 ... 0x2ff:
1772                 return get_msr_mtrr(vcpu, msr, pdata);
1773         case 0xcd: /* fsb frequency */
1774                 data = 3;
1775                 break;
1776                 /*
1777                  * MSR_EBC_FREQUENCY_ID
1778                  * Conservative value valid for even the basic CPU models.
1779                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1780                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1781                  * and 266MHz for model 3, or 4. Set Core Clock
1782                  * Frequency to System Bus Frequency Ratio to 1 (bits
1783                  * 31:24) even though these are only valid for CPU
1784                  * models > 2, however guests may end up dividing or
1785                  * multiplying by zero otherwise.
1786                  */
1787         case MSR_EBC_FREQUENCY_ID:
1788                 data = 1 << 24;
1789                 break;
1790         case MSR_IA32_APICBASE:
1791                 data = kvm_get_apic_base(vcpu);
1792                 break;
1793         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1794                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1795                 break;
1796         case MSR_IA32_MISC_ENABLE:
1797                 data = vcpu->arch.ia32_misc_enable_msr;
1798                 break;
1799         case MSR_IA32_PERF_STATUS:
1800                 /* TSC increment by tick */
1801                 data = 1000ULL;
1802                 /* CPU multiplier */
1803                 data |= (((uint64_t)4ULL) << 40);
1804                 break;
1805         case MSR_EFER:
1806                 data = vcpu->arch.efer;
1807                 break;
1808         case MSR_KVM_WALL_CLOCK:
1809         case MSR_KVM_WALL_CLOCK_NEW:
1810                 data = vcpu->kvm->arch.wall_clock;
1811                 break;
1812         case MSR_KVM_SYSTEM_TIME:
1813         case MSR_KVM_SYSTEM_TIME_NEW:
1814                 data = vcpu->arch.time;
1815                 break;
1816         case MSR_KVM_ASYNC_PF_EN:
1817                 data = vcpu->arch.apf.msr_val;
1818                 break;
1819         case MSR_IA32_P5_MC_ADDR:
1820         case MSR_IA32_P5_MC_TYPE:
1821         case MSR_IA32_MCG_CAP:
1822         case MSR_IA32_MCG_CTL:
1823         case MSR_IA32_MCG_STATUS:
1824         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1825                 return get_msr_mce(vcpu, msr, pdata);
1826         case MSR_K7_CLK_CTL:
1827                 /*
1828                  * Provide expected ramp-up count for K7. All other
1829                  * are set to zero, indicating minimum divisors for
1830                  * every field.
1831                  *
1832                  * This prevents guest kernels on AMD host with CPU
1833                  * type 6, model 8 and higher from exploding due to
1834                  * the rdmsr failing.
1835                  */
1836                 data = 0x20000000;
1837                 break;
1838         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1839                 if (kvm_hv_msr_partition_wide(msr)) {
1840                         int r;
1841                         mutex_lock(&vcpu->kvm->lock);
1842                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1843                         mutex_unlock(&vcpu->kvm->lock);
1844                         return r;
1845                 } else
1846                         return get_msr_hyperv(vcpu, msr, pdata);
1847                 break;
1848         default:
1849                 if (!ignore_msrs) {
1850                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1851                         return 1;
1852                 } else {
1853                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1854                         data = 0;
1855                 }
1856                 break;
1857         }
1858         *pdata = data;
1859         return 0;
1860 }
1861 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1862
1863 /*
1864  * Read or write a bunch of msrs. All parameters are kernel addresses.
1865  *
1866  * @return number of msrs set successfully.
1867  */
1868 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1869                     struct kvm_msr_entry *entries,
1870                     int (*do_msr)(struct kvm_vcpu *vcpu,
1871                                   unsigned index, u64 *data))
1872 {
1873         int i, idx;
1874
1875         idx = srcu_read_lock(&vcpu->kvm->srcu);
1876         for (i = 0; i < msrs->nmsrs; ++i)
1877                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1878                         break;
1879         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1880
1881         return i;
1882 }
1883
1884 /*
1885  * Read or write a bunch of msrs. Parameters are user addresses.
1886  *
1887  * @return number of msrs set successfully.
1888  */
1889 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1890                   int (*do_msr)(struct kvm_vcpu *vcpu,
1891                                 unsigned index, u64 *data),
1892                   int writeback)
1893 {
1894         struct kvm_msrs msrs;
1895         struct kvm_msr_entry *entries;
1896         int r, n;
1897         unsigned size;
1898
1899         r = -EFAULT;
1900         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1901                 goto out;
1902
1903         r = -E2BIG;
1904         if (msrs.nmsrs >= MAX_IO_MSRS)
1905                 goto out;
1906
1907         r = -ENOMEM;
1908         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1909         entries = kmalloc(size, GFP_KERNEL);
1910         if (!entries)
1911                 goto out;
1912
1913         r = -EFAULT;
1914         if (copy_from_user(entries, user_msrs->entries, size))
1915                 goto out_free;
1916
1917         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1918         if (r < 0)
1919                 goto out_free;
1920
1921         r = -EFAULT;
1922         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1923                 goto out_free;
1924
1925         r = n;
1926
1927 out_free:
1928         kfree(entries);
1929 out:
1930         return r;
1931 }
1932
1933 int kvm_dev_ioctl_check_extension(long ext)
1934 {
1935         int r;
1936
1937         switch (ext) {
1938         case KVM_CAP_IRQCHIP:
1939         case KVM_CAP_HLT:
1940         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1941         case KVM_CAP_SET_TSS_ADDR:
1942         case KVM_CAP_EXT_CPUID:
1943         case KVM_CAP_CLOCKSOURCE:
1944         case KVM_CAP_PIT:
1945         case KVM_CAP_NOP_IO_DELAY:
1946         case KVM_CAP_MP_STATE:
1947         case KVM_CAP_SYNC_MMU:
1948         case KVM_CAP_REINJECT_CONTROL:
1949         case KVM_CAP_IRQ_INJECT_STATUS:
1950         case KVM_CAP_ASSIGN_DEV_IRQ:
1951         case KVM_CAP_IRQFD:
1952         case KVM_CAP_IOEVENTFD:
1953         case KVM_CAP_PIT2:
1954         case KVM_CAP_PIT_STATE2:
1955         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1956         case KVM_CAP_XEN_HVM:
1957         case KVM_CAP_ADJUST_CLOCK:
1958         case KVM_CAP_VCPU_EVENTS:
1959         case KVM_CAP_HYPERV:
1960         case KVM_CAP_HYPERV_VAPIC:
1961         case KVM_CAP_HYPERV_SPIN:
1962         case KVM_CAP_PCI_SEGMENT:
1963         case KVM_CAP_DEBUGREGS:
1964         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1965         case KVM_CAP_XSAVE:
1966         case KVM_CAP_ASYNC_PF:
1967                 r = 1;
1968                 break;
1969         case KVM_CAP_COALESCED_MMIO:
1970                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1971                 break;
1972         case KVM_CAP_VAPIC:
1973                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1974                 break;
1975         case KVM_CAP_NR_VCPUS:
1976                 r = KVM_MAX_VCPUS;
1977                 break;
1978         case KVM_CAP_NR_MEMSLOTS:
1979                 r = KVM_MEMORY_SLOTS;
1980                 break;
1981         case KVM_CAP_PV_MMU:    /* obsolete */
1982                 r = 0;
1983                 break;
1984         case KVM_CAP_IOMMU:
1985                 r = iommu_found();
1986                 break;
1987         case KVM_CAP_MCE:
1988                 r = KVM_MAX_MCE_BANKS;
1989                 break;
1990         case KVM_CAP_XCRS:
1991                 r = cpu_has_xsave;
1992                 break;
1993         default:
1994                 r = 0;
1995                 break;
1996         }
1997         return r;
1998
1999 }
2000
2001 long kvm_arch_dev_ioctl(struct file *filp,
2002                         unsigned int ioctl, unsigned long arg)
2003 {
2004         void __user *argp = (void __user *)arg;
2005         long r;
2006
2007         switch (ioctl) {
2008         case KVM_GET_MSR_INDEX_LIST: {
2009                 struct kvm_msr_list __user *user_msr_list = argp;
2010                 struct kvm_msr_list msr_list;
2011                 unsigned n;
2012
2013                 r = -EFAULT;
2014                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2015                         goto out;
2016                 n = msr_list.nmsrs;
2017                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2018                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2019                         goto out;
2020                 r = -E2BIG;
2021                 if (n < msr_list.nmsrs)
2022                         goto out;
2023                 r = -EFAULT;
2024                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2025                                  num_msrs_to_save * sizeof(u32)))
2026                         goto out;
2027                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2028                                  &emulated_msrs,
2029                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2030                         goto out;
2031                 r = 0;
2032                 break;
2033         }
2034         case KVM_GET_SUPPORTED_CPUID: {
2035                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2036                 struct kvm_cpuid2 cpuid;
2037
2038                 r = -EFAULT;
2039                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2040                         goto out;
2041                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2042                                                       cpuid_arg->entries);
2043                 if (r)
2044                         goto out;
2045
2046                 r = -EFAULT;
2047                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2048                         goto out;
2049                 r = 0;
2050                 break;
2051         }
2052         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2053                 u64 mce_cap;
2054
2055                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2056                 r = -EFAULT;
2057                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2058                         goto out;
2059                 r = 0;
2060                 break;
2061         }
2062         default:
2063                 r = -EINVAL;
2064         }
2065 out:
2066         return r;
2067 }
2068
2069 static void wbinvd_ipi(void *garbage)
2070 {
2071         wbinvd();
2072 }
2073
2074 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2075 {
2076         return vcpu->kvm->arch.iommu_domain &&
2077                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2078 }
2079
2080 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2081 {
2082         /* Address WBINVD may be executed by guest */
2083         if (need_emulate_wbinvd(vcpu)) {
2084                 if (kvm_x86_ops->has_wbinvd_exit())
2085                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2086                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2087                         smp_call_function_single(vcpu->cpu,
2088                                         wbinvd_ipi, NULL, 1);
2089         }
2090
2091         kvm_x86_ops->vcpu_load(vcpu, cpu);
2092         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2093                 /* Make sure TSC doesn't go backwards */
2094                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2095                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2096                 if (tsc_delta < 0)
2097                         mark_tsc_unstable("KVM discovered backwards TSC");
2098                 if (check_tsc_unstable()) {
2099                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2100                         vcpu->arch.tsc_catchup = 1;
2101                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2102                 }
2103                 if (vcpu->cpu != cpu)
2104                         kvm_migrate_timers(vcpu);
2105                 vcpu->cpu = cpu;
2106         }
2107 }
2108
2109 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2110 {
2111         kvm_x86_ops->vcpu_put(vcpu);
2112         kvm_put_guest_fpu(vcpu);
2113         vcpu->arch.last_host_tsc = native_read_tsc();
2114 }
2115
2116 static int is_efer_nx(void)
2117 {
2118         unsigned long long efer = 0;
2119
2120         rdmsrl_safe(MSR_EFER, &efer);
2121         return efer & EFER_NX;
2122 }
2123
2124 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2125 {
2126         int i;
2127         struct kvm_cpuid_entry2 *e, *entry;
2128
2129         entry = NULL;
2130         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2131                 e = &vcpu->arch.cpuid_entries[i];
2132                 if (e->function == 0x80000001) {
2133                         entry = e;
2134                         break;
2135                 }
2136         }
2137         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2138                 entry->edx &= ~(1 << 20);
2139                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2140         }
2141 }
2142
2143 /* when an old userspace process fills a new kernel module */
2144 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2145                                     struct kvm_cpuid *cpuid,
2146                                     struct kvm_cpuid_entry __user *entries)
2147 {
2148         int r, i;
2149         struct kvm_cpuid_entry *cpuid_entries;
2150
2151         r = -E2BIG;
2152         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2153                 goto out;
2154         r = -ENOMEM;
2155         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2156         if (!cpuid_entries)
2157                 goto out;
2158         r = -EFAULT;
2159         if (copy_from_user(cpuid_entries, entries,
2160                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2161                 goto out_free;
2162         for (i = 0; i < cpuid->nent; i++) {
2163                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2164                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2165                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2166                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2167                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2168                 vcpu->arch.cpuid_entries[i].index = 0;
2169                 vcpu->arch.cpuid_entries[i].flags = 0;
2170                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2171                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2172                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2173         }
2174         vcpu->arch.cpuid_nent = cpuid->nent;
2175         cpuid_fix_nx_cap(vcpu);
2176         r = 0;
2177         kvm_apic_set_version(vcpu);
2178         kvm_x86_ops->cpuid_update(vcpu);
2179         update_cpuid(vcpu);
2180
2181 out_free:
2182         vfree(cpuid_entries);
2183 out:
2184         return r;
2185 }
2186
2187 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2188                                      struct kvm_cpuid2 *cpuid,
2189                                      struct kvm_cpuid_entry2 __user *entries)
2190 {
2191         int r;
2192
2193         r = -E2BIG;
2194         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2195                 goto out;
2196         r = -EFAULT;
2197         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2198                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2199                 goto out;
2200         vcpu->arch.cpuid_nent = cpuid->nent;
2201         kvm_apic_set_version(vcpu);
2202         kvm_x86_ops->cpuid_update(vcpu);
2203         update_cpuid(vcpu);
2204         return 0;
2205
2206 out:
2207         return r;
2208 }
2209
2210 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2211                                      struct kvm_cpuid2 *cpuid,
2212                                      struct kvm_cpuid_entry2 __user *entries)
2213 {
2214         int r;
2215
2216         r = -E2BIG;
2217         if (cpuid->nent < vcpu->arch.cpuid_nent)
2218                 goto out;
2219         r = -EFAULT;
2220         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2221                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2222                 goto out;
2223         return 0;
2224
2225 out:
2226         cpuid->nent = vcpu->arch.cpuid_nent;
2227         return r;
2228 }
2229
2230 static void cpuid_mask(u32 *word, int wordnum)
2231 {
2232         *word &= boot_cpu_data.x86_capability[wordnum];
2233 }
2234
2235 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2236                            u32 index)
2237 {
2238         entry->function = function;
2239         entry->index = index;
2240         cpuid_count(entry->function, entry->index,
2241                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2242         entry->flags = 0;
2243 }
2244
2245 #define F(x) bit(X86_FEATURE_##x)
2246
2247 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2248                          u32 index, int *nent, int maxnent)
2249 {
2250         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2251 #ifdef CONFIG_X86_64
2252         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2253                                 ? F(GBPAGES) : 0;
2254         unsigned f_lm = F(LM);
2255 #else
2256         unsigned f_gbpages = 0;
2257         unsigned f_lm = 0;
2258 #endif
2259         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2260
2261         /* cpuid 1.edx */
2262         const u32 kvm_supported_word0_x86_features =
2263                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2264                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2265                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2266                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2267                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2268                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2269                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2270                 0 /* HTT, TM, Reserved, PBE */;
2271         /* cpuid 0x80000001.edx */
2272         const u32 kvm_supported_word1_x86_features =
2273                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2274                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2275                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2276                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2277                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2278                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2279                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2280                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2281         /* cpuid 1.ecx */
2282         const u32 kvm_supported_word4_x86_features =
2283                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2284                 0 /* DS-CPL, VMX, SMX, EST */ |
2285                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2286                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2287                 0 /* Reserved, DCA */ | F(XMM4_1) |
2288                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2289                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2290                 F(F16C);
2291         /* cpuid 0x80000001.ecx */
2292         const u32 kvm_supported_word6_x86_features =
2293                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2294                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2295                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2296                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2297
2298         /* all calls to cpuid_count() should be made on the same cpu */
2299         get_cpu();
2300         do_cpuid_1_ent(entry, function, index);
2301         ++*nent;
2302
2303         switch (function) {
2304         case 0:
2305                 entry->eax = min(entry->eax, (u32)0xd);
2306                 break;
2307         case 1:
2308                 entry->edx &= kvm_supported_word0_x86_features;
2309                 cpuid_mask(&entry->edx, 0);
2310                 entry->ecx &= kvm_supported_word4_x86_features;
2311                 cpuid_mask(&entry->ecx, 4);
2312                 /* we support x2apic emulation even if host does not support
2313                  * it since we emulate x2apic in software */
2314                 entry->ecx |= F(X2APIC);
2315                 break;
2316         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2317          * may return different values. This forces us to get_cpu() before
2318          * issuing the first command, and also to emulate this annoying behavior
2319          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2320         case 2: {
2321                 int t, times = entry->eax & 0xff;
2322
2323                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2324                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2325                 for (t = 1; t < times && *nent < maxnent; ++t) {
2326                         do_cpuid_1_ent(&entry[t], function, 0);
2327                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2328                         ++*nent;
2329                 }
2330                 break;
2331         }
2332         /* function 4 and 0xb have additional index. */
2333         case 4: {
2334                 int i, cache_type;
2335
2336                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2337                 /* read more entries until cache_type is zero */
2338                 for (i = 1; *nent < maxnent; ++i) {
2339                         cache_type = entry[i - 1].eax & 0x1f;
2340                         if (!cache_type)
2341                                 break;
2342                         do_cpuid_1_ent(&entry[i], function, i);
2343                         entry[i].flags |=
2344                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2345                         ++*nent;
2346                 }
2347                 break;
2348         }
2349         case 0xb: {
2350                 int i, level_type;
2351
2352                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2353                 /* read more entries until level_type is zero */
2354                 for (i = 1; *nent < maxnent; ++i) {
2355                         level_type = entry[i - 1].ecx & 0xff00;
2356                         if (!level_type)
2357                                 break;
2358                         do_cpuid_1_ent(&entry[i], function, i);
2359                         entry[i].flags |=
2360                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2361                         ++*nent;
2362                 }
2363                 break;
2364         }
2365         case 0xd: {
2366                 int i;
2367
2368                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2369                 for (i = 1; *nent < maxnent; ++i) {
2370                         if (entry[i - 1].eax == 0 && i != 2)
2371                                 break;
2372                         do_cpuid_1_ent(&entry[i], function, i);
2373                         entry[i].flags |=
2374                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2375                         ++*nent;
2376                 }
2377                 break;
2378         }
2379         case KVM_CPUID_SIGNATURE: {
2380                 char signature[12] = "KVMKVMKVM\0\0";
2381                 u32 *sigptr = (u32 *)signature;
2382                 entry->eax = 0;
2383                 entry->ebx = sigptr[0];
2384                 entry->ecx = sigptr[1];
2385                 entry->edx = sigptr[2];
2386                 break;
2387         }
2388         case KVM_CPUID_FEATURES:
2389                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2390                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2391                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2392                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2393                 entry->ebx = 0;
2394                 entry->ecx = 0;
2395                 entry->edx = 0;
2396                 break;
2397         case 0x80000000:
2398                 entry->eax = min(entry->eax, 0x8000001a);
2399                 break;
2400         case 0x80000001:
2401                 entry->edx &= kvm_supported_word1_x86_features;
2402                 cpuid_mask(&entry->edx, 1);
2403                 entry->ecx &= kvm_supported_word6_x86_features;
2404                 cpuid_mask(&entry->ecx, 6);
2405                 break;
2406         }
2407
2408         kvm_x86_ops->set_supported_cpuid(function, entry);
2409
2410         put_cpu();
2411 }
2412
2413 #undef F
2414
2415 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2416                                      struct kvm_cpuid_entry2 __user *entries)
2417 {
2418         struct kvm_cpuid_entry2 *cpuid_entries;
2419         int limit, nent = 0, r = -E2BIG;
2420         u32 func;
2421
2422         if (cpuid->nent < 1)
2423                 goto out;
2424         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2425                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2426         r = -ENOMEM;
2427         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2428         if (!cpuid_entries)
2429                 goto out;
2430
2431         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2432         limit = cpuid_entries[0].eax;
2433         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2434                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2435                              &nent, cpuid->nent);
2436         r = -E2BIG;
2437         if (nent >= cpuid->nent)
2438                 goto out_free;
2439
2440         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2441         limit = cpuid_entries[nent - 1].eax;
2442         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2443                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2444                              &nent, cpuid->nent);
2445
2446
2447
2448         r = -E2BIG;
2449         if (nent >= cpuid->nent)
2450                 goto out_free;
2451
2452         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2453                      cpuid->nent);
2454
2455         r = -E2BIG;
2456         if (nent >= cpuid->nent)
2457                 goto out_free;
2458
2459         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2460                      cpuid->nent);
2461
2462         r = -E2BIG;
2463         if (nent >= cpuid->nent)
2464                 goto out_free;
2465
2466         r = -EFAULT;
2467         if (copy_to_user(entries, cpuid_entries,
2468                          nent * sizeof(struct kvm_cpuid_entry2)))
2469                 goto out_free;
2470         cpuid->nent = nent;
2471         r = 0;
2472
2473 out_free:
2474         vfree(cpuid_entries);
2475 out:
2476         return r;
2477 }
2478
2479 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2480                                     struct kvm_lapic_state *s)
2481 {
2482         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2483
2484         return 0;
2485 }
2486
2487 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2488                                     struct kvm_lapic_state *s)
2489 {
2490         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2491         kvm_apic_post_state_restore(vcpu);
2492         update_cr8_intercept(vcpu);
2493
2494         return 0;
2495 }
2496
2497 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2498                                     struct kvm_interrupt *irq)
2499 {
2500         if (irq->irq < 0 || irq->irq >= 256)
2501                 return -EINVAL;
2502         if (irqchip_in_kernel(vcpu->kvm))
2503                 return -ENXIO;
2504
2505         kvm_queue_interrupt(vcpu, irq->irq, false);
2506         kvm_make_request(KVM_REQ_EVENT, vcpu);
2507
2508         return 0;
2509 }
2510
2511 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2512 {
2513         kvm_inject_nmi(vcpu);
2514
2515         return 0;
2516 }
2517
2518 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2519                                            struct kvm_tpr_access_ctl *tac)
2520 {
2521         if (tac->flags)
2522                 return -EINVAL;
2523         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2524         return 0;
2525 }
2526
2527 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2528                                         u64 mcg_cap)
2529 {
2530         int r;
2531         unsigned bank_num = mcg_cap & 0xff, bank;
2532
2533         r = -EINVAL;
2534         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2535                 goto out;
2536         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2537                 goto out;
2538         r = 0;
2539         vcpu->arch.mcg_cap = mcg_cap;
2540         /* Init IA32_MCG_CTL to all 1s */
2541         if (mcg_cap & MCG_CTL_P)
2542                 vcpu->arch.mcg_ctl = ~(u64)0;
2543         /* Init IA32_MCi_CTL to all 1s */
2544         for (bank = 0; bank < bank_num; bank++)
2545                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2546 out:
2547         return r;
2548 }
2549
2550 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2551                                       struct kvm_x86_mce *mce)
2552 {
2553         u64 mcg_cap = vcpu->arch.mcg_cap;
2554         unsigned bank_num = mcg_cap & 0xff;
2555         u64 *banks = vcpu->arch.mce_banks;
2556
2557         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2558                 return -EINVAL;
2559         /*
2560          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2561          * reporting is disabled
2562          */
2563         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2564             vcpu->arch.mcg_ctl != ~(u64)0)
2565                 return 0;
2566         banks += 4 * mce->bank;
2567         /*
2568          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2569          * reporting is disabled for the bank
2570          */
2571         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2572                 return 0;
2573         if (mce->status & MCI_STATUS_UC) {
2574                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2575                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2576                         printk(KERN_DEBUG "kvm: set_mce: "
2577                                "injects mce exception while "
2578                                "previous one is in progress!\n");
2579                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2580                         return 0;
2581                 }
2582                 if (banks[1] & MCI_STATUS_VAL)
2583                         mce->status |= MCI_STATUS_OVER;
2584                 banks[2] = mce->addr;
2585                 banks[3] = mce->misc;
2586                 vcpu->arch.mcg_status = mce->mcg_status;
2587                 banks[1] = mce->status;
2588                 kvm_queue_exception(vcpu, MC_VECTOR);
2589         } else if (!(banks[1] & MCI_STATUS_VAL)
2590                    || !(banks[1] & MCI_STATUS_UC)) {
2591                 if (banks[1] & MCI_STATUS_VAL)
2592                         mce->status |= MCI_STATUS_OVER;
2593                 banks[2] = mce->addr;
2594                 banks[3] = mce->misc;
2595                 banks[1] = mce->status;
2596         } else
2597                 banks[1] |= MCI_STATUS_OVER;
2598         return 0;
2599 }
2600
2601 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2602                                                struct kvm_vcpu_events *events)
2603 {
2604         events->exception.injected =
2605                 vcpu->arch.exception.pending &&
2606                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2607         events->exception.nr = vcpu->arch.exception.nr;
2608         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2609         events->exception.pad = 0;
2610         events->exception.error_code = vcpu->arch.exception.error_code;
2611
2612         events->interrupt.injected =
2613                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2614         events->interrupt.nr = vcpu->arch.interrupt.nr;
2615         events->interrupt.soft = 0;
2616         events->interrupt.shadow =
2617                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2618                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2619
2620         events->nmi.injected = vcpu->arch.nmi_injected;
2621         events->nmi.pending = vcpu->arch.nmi_pending;
2622         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2623         events->nmi.pad = 0;
2624
2625         events->sipi_vector = vcpu->arch.sipi_vector;
2626
2627         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2628                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2629                          | KVM_VCPUEVENT_VALID_SHADOW);
2630         memset(&events->reserved, 0, sizeof(events->reserved));
2631 }
2632
2633 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2634                                               struct kvm_vcpu_events *events)
2635 {
2636         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2637                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2638                               | KVM_VCPUEVENT_VALID_SHADOW))
2639                 return -EINVAL;
2640
2641         vcpu->arch.exception.pending = events->exception.injected;
2642         vcpu->arch.exception.nr = events->exception.nr;
2643         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2644         vcpu->arch.exception.error_code = events->exception.error_code;
2645
2646         vcpu->arch.interrupt.pending = events->interrupt.injected;
2647         vcpu->arch.interrupt.nr = events->interrupt.nr;
2648         vcpu->arch.interrupt.soft = events->interrupt.soft;
2649         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2650                 kvm_pic_clear_isr_ack(vcpu->kvm);
2651         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2652                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2653                                                   events->interrupt.shadow);
2654
2655         vcpu->arch.nmi_injected = events->nmi.injected;
2656         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2657                 vcpu->arch.nmi_pending = events->nmi.pending;
2658         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2659
2660         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2661                 vcpu->arch.sipi_vector = events->sipi_vector;
2662
2663         kvm_make_request(KVM_REQ_EVENT, vcpu);
2664
2665         return 0;
2666 }
2667
2668 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2669                                              struct kvm_debugregs *dbgregs)
2670 {
2671         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2672         dbgregs->dr6 = vcpu->arch.dr6;
2673         dbgregs->dr7 = vcpu->arch.dr7;
2674         dbgregs->flags = 0;
2675         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2676 }
2677
2678 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2679                                             struct kvm_debugregs *dbgregs)
2680 {
2681         if (dbgregs->flags)
2682                 return -EINVAL;
2683
2684         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2685         vcpu->arch.dr6 = dbgregs->dr6;
2686         vcpu->arch.dr7 = dbgregs->dr7;
2687
2688         return 0;
2689 }
2690
2691 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2692                                          struct kvm_xsave *guest_xsave)
2693 {
2694         if (cpu_has_xsave)
2695                 memcpy(guest_xsave->region,
2696                         &vcpu->arch.guest_fpu.state->xsave,
2697                         xstate_size);
2698         else {
2699                 memcpy(guest_xsave->region,
2700                         &vcpu->arch.guest_fpu.state->fxsave,
2701                         sizeof(struct i387_fxsave_struct));
2702                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2703                         XSTATE_FPSSE;
2704         }
2705 }
2706
2707 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2708                                         struct kvm_xsave *guest_xsave)
2709 {
2710         u64 xstate_bv =
2711                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2712
2713         if (cpu_has_xsave)
2714                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2715                         guest_xsave->region, xstate_size);
2716         else {
2717                 if (xstate_bv & ~XSTATE_FPSSE)
2718                         return -EINVAL;
2719                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2720                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2721         }
2722         return 0;
2723 }
2724
2725 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2726                                         struct kvm_xcrs *guest_xcrs)
2727 {
2728         if (!cpu_has_xsave) {
2729                 guest_xcrs->nr_xcrs = 0;
2730                 return;
2731         }
2732
2733         guest_xcrs->nr_xcrs = 1;
2734         guest_xcrs->flags = 0;
2735         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2736         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2737 }
2738
2739 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2740                                        struct kvm_xcrs *guest_xcrs)
2741 {
2742         int i, r = 0;
2743
2744         if (!cpu_has_xsave)
2745                 return -EINVAL;
2746
2747         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2748                 return -EINVAL;
2749
2750         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2751                 /* Only support XCR0 currently */
2752                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2753                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2754                                 guest_xcrs->xcrs[0].value);
2755                         break;
2756                 }
2757         if (r)
2758                 r = -EINVAL;
2759         return r;
2760 }
2761
2762 long kvm_arch_vcpu_ioctl(struct file *filp,
2763                          unsigned int ioctl, unsigned long arg)
2764 {
2765         struct kvm_vcpu *vcpu = filp->private_data;
2766         void __user *argp = (void __user *)arg;
2767         int r;
2768         union {
2769                 struct kvm_lapic_state *lapic;
2770                 struct kvm_xsave *xsave;
2771                 struct kvm_xcrs *xcrs;
2772                 void *buffer;
2773         } u;
2774
2775         u.buffer = NULL;
2776         switch (ioctl) {
2777         case KVM_GET_LAPIC: {
2778                 r = -EINVAL;
2779                 if (!vcpu->arch.apic)
2780                         goto out;
2781                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2782
2783                 r = -ENOMEM;
2784                 if (!u.lapic)
2785                         goto out;
2786                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2787                 if (r)
2788                         goto out;
2789                 r = -EFAULT;
2790                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2791                         goto out;
2792                 r = 0;
2793                 break;
2794         }
2795         case KVM_SET_LAPIC: {
2796                 r = -EINVAL;
2797                 if (!vcpu->arch.apic)
2798                         goto out;
2799                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2800                 r = -ENOMEM;
2801                 if (!u.lapic)
2802                         goto out;
2803                 r = -EFAULT;
2804                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2805                         goto out;
2806                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2807                 if (r)
2808                         goto out;
2809                 r = 0;
2810                 break;
2811         }
2812         case KVM_INTERRUPT: {
2813                 struct kvm_interrupt irq;
2814
2815                 r = -EFAULT;
2816                 if (copy_from_user(&irq, argp, sizeof irq))
2817                         goto out;
2818                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2819                 if (r)
2820                         goto out;
2821                 r = 0;
2822                 break;
2823         }
2824         case KVM_NMI: {
2825                 r = kvm_vcpu_ioctl_nmi(vcpu);
2826                 if (r)
2827                         goto out;
2828                 r = 0;
2829                 break;
2830         }
2831         case KVM_SET_CPUID: {
2832                 struct kvm_cpuid __user *cpuid_arg = argp;
2833                 struct kvm_cpuid cpuid;
2834
2835                 r = -EFAULT;
2836                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2837                         goto out;
2838                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2839                 if (r)
2840                         goto out;
2841                 break;
2842         }
2843         case KVM_SET_CPUID2: {
2844                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2845                 struct kvm_cpuid2 cpuid;
2846
2847                 r = -EFAULT;
2848                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2849                         goto out;
2850                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2851                                               cpuid_arg->entries);
2852                 if (r)
2853                         goto out;
2854                 break;
2855         }
2856         case KVM_GET_CPUID2: {
2857                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2858                 struct kvm_cpuid2 cpuid;
2859
2860                 r = -EFAULT;
2861                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2862                         goto out;
2863                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2864                                               cpuid_arg->entries);
2865                 if (r)
2866                         goto out;
2867                 r = -EFAULT;
2868                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2869                         goto out;
2870                 r = 0;
2871                 break;
2872         }
2873         case KVM_GET_MSRS:
2874                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2875                 break;
2876         case KVM_SET_MSRS:
2877                 r = msr_io(vcpu, argp, do_set_msr, 0);
2878                 break;
2879         case KVM_TPR_ACCESS_REPORTING: {
2880                 struct kvm_tpr_access_ctl tac;
2881
2882                 r = -EFAULT;
2883                 if (copy_from_user(&tac, argp, sizeof tac))
2884                         goto out;
2885                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2886                 if (r)
2887                         goto out;
2888                 r = -EFAULT;
2889                 if (copy_to_user(argp, &tac, sizeof tac))
2890                         goto out;
2891                 r = 0;
2892                 break;
2893         };
2894         case KVM_SET_VAPIC_ADDR: {
2895                 struct kvm_vapic_addr va;
2896
2897                 r = -EINVAL;
2898                 if (!irqchip_in_kernel(vcpu->kvm))
2899                         goto out;
2900                 r = -EFAULT;
2901                 if (copy_from_user(&va, argp, sizeof va))
2902                         goto out;
2903                 r = 0;
2904                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2905                 break;
2906         }
2907         case KVM_X86_SETUP_MCE: {
2908                 u64 mcg_cap;
2909
2910                 r = -EFAULT;
2911                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2912                         goto out;
2913                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2914                 break;
2915         }
2916         case KVM_X86_SET_MCE: {
2917                 struct kvm_x86_mce mce;
2918
2919                 r = -EFAULT;
2920                 if (copy_from_user(&mce, argp, sizeof mce))
2921                         goto out;
2922                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2923                 break;
2924         }
2925         case KVM_GET_VCPU_EVENTS: {
2926                 struct kvm_vcpu_events events;
2927
2928                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2929
2930                 r = -EFAULT;
2931                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2932                         break;
2933                 r = 0;
2934                 break;
2935         }
2936         case KVM_SET_VCPU_EVENTS: {
2937                 struct kvm_vcpu_events events;
2938
2939                 r = -EFAULT;
2940                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2941                         break;
2942
2943                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2944                 break;
2945         }
2946         case KVM_GET_DEBUGREGS: {
2947                 struct kvm_debugregs dbgregs;
2948
2949                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2950
2951                 r = -EFAULT;
2952                 if (copy_to_user(argp, &dbgregs,
2953                                  sizeof(struct kvm_debugregs)))
2954                         break;
2955                 r = 0;
2956                 break;
2957         }
2958         case KVM_SET_DEBUGREGS: {
2959                 struct kvm_debugregs dbgregs;
2960
2961                 r = -EFAULT;
2962                 if (copy_from_user(&dbgregs, argp,
2963                                    sizeof(struct kvm_debugregs)))
2964                         break;
2965
2966                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2967                 break;
2968         }
2969         case KVM_GET_XSAVE: {
2970                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2971                 r = -ENOMEM;
2972                 if (!u.xsave)
2973                         break;
2974
2975                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2976
2977                 r = -EFAULT;
2978                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2979                         break;
2980                 r = 0;
2981                 break;
2982         }
2983         case KVM_SET_XSAVE: {
2984                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2985                 r = -ENOMEM;
2986                 if (!u.xsave)
2987                         break;
2988
2989                 r = -EFAULT;
2990                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2991                         break;
2992
2993                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2994                 break;
2995         }
2996         case KVM_GET_XCRS: {
2997                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2998                 r = -ENOMEM;
2999                 if (!u.xcrs)
3000                         break;
3001
3002                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3003
3004                 r = -EFAULT;
3005                 if (copy_to_user(argp, u.xcrs,
3006                                  sizeof(struct kvm_xcrs)))
3007                         break;
3008                 r = 0;
3009                 break;
3010         }
3011         case KVM_SET_XCRS: {
3012                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3013                 r = -ENOMEM;
3014                 if (!u.xcrs)
3015                         break;
3016
3017                 r = -EFAULT;
3018                 if (copy_from_user(u.xcrs, argp,
3019                                    sizeof(struct kvm_xcrs)))
3020                         break;
3021
3022                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3023                 break;
3024         }
3025         default:
3026                 r = -EINVAL;
3027         }
3028 out:
3029         kfree(u.buffer);
3030         return r;
3031 }
3032
3033 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3034 {
3035         int ret;
3036
3037         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3038                 return -1;
3039         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3040         return ret;
3041 }
3042
3043 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3044                                               u64 ident_addr)
3045 {
3046         kvm->arch.ept_identity_map_addr = ident_addr;
3047         return 0;
3048 }
3049
3050 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3051                                           u32 kvm_nr_mmu_pages)
3052 {
3053         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3054                 return -EINVAL;
3055
3056         mutex_lock(&kvm->slots_lock);
3057         spin_lock(&kvm->mmu_lock);
3058
3059         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3060         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3061
3062         spin_unlock(&kvm->mmu_lock);
3063         mutex_unlock(&kvm->slots_lock);
3064         return 0;
3065 }
3066
3067 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3068 {
3069         return kvm->arch.n_max_mmu_pages;
3070 }
3071
3072 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3073 {
3074         int r;
3075
3076         r = 0;
3077         switch (chip->chip_id) {
3078         case KVM_IRQCHIP_PIC_MASTER:
3079                 memcpy(&chip->chip.pic,
3080                         &pic_irqchip(kvm)->pics[0],
3081                         sizeof(struct kvm_pic_state));
3082                 break;
3083         case KVM_IRQCHIP_PIC_SLAVE:
3084                 memcpy(&chip->chip.pic,
3085                         &pic_irqchip(kvm)->pics[1],
3086                         sizeof(struct kvm_pic_state));
3087                 break;
3088         case KVM_IRQCHIP_IOAPIC:
3089                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3090                 break;
3091         default:
3092                 r = -EINVAL;
3093                 break;
3094         }
3095         return r;
3096 }
3097
3098 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3099 {
3100         int r;
3101
3102         r = 0;
3103         switch (chip->chip_id) {
3104         case KVM_IRQCHIP_PIC_MASTER:
3105                 spin_lock(&pic_irqchip(kvm)->lock);
3106                 memcpy(&pic_irqchip(kvm)->pics[0],
3107                         &chip->chip.pic,
3108                         sizeof(struct kvm_pic_state));
3109                 spin_unlock(&pic_irqchip(kvm)->lock);
3110                 break;
3111         case KVM_IRQCHIP_PIC_SLAVE:
3112                 spin_lock(&pic_irqchip(kvm)->lock);
3113                 memcpy(&pic_irqchip(kvm)->pics[1],
3114                         &chip->chip.pic,
3115                         sizeof(struct kvm_pic_state));
3116                 spin_unlock(&pic_irqchip(kvm)->lock);
3117                 break;
3118         case KVM_IRQCHIP_IOAPIC:
3119                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3120                 break;
3121         default:
3122                 r = -EINVAL;
3123                 break;
3124         }
3125         kvm_pic_update_irq(pic_irqchip(kvm));
3126         return r;
3127 }
3128
3129 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3130 {
3131         int r = 0;
3132
3133         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3134         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3135         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3136         return r;
3137 }
3138
3139 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3140 {
3141         int r = 0;
3142
3143         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3144         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3145         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3146         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3147         return r;
3148 }
3149
3150 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3151 {
3152         int r = 0;
3153
3154         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3155         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3156                 sizeof(ps->channels));
3157         ps->flags = kvm->arch.vpit->pit_state.flags;
3158         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3159         memset(&ps->reserved, 0, sizeof(ps->reserved));
3160         return r;
3161 }
3162
3163 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3164 {
3165         int r = 0, start = 0;
3166         u32 prev_legacy, cur_legacy;
3167         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3168         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3169         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3170         if (!prev_legacy && cur_legacy)
3171                 start = 1;
3172         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3173                sizeof(kvm->arch.vpit->pit_state.channels));
3174         kvm->arch.vpit->pit_state.flags = ps->flags;
3175         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3176         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3177         return r;
3178 }
3179
3180 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3181                                  struct kvm_reinject_control *control)
3182 {
3183         if (!kvm->arch.vpit)
3184                 return -ENXIO;
3185         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3186         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3187         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3188         return 0;
3189 }
3190
3191 /*
3192  * Get (and clear) the dirty memory log for a memory slot.
3193  */
3194 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3195                                       struct kvm_dirty_log *log)
3196 {
3197         int r, i;
3198         struct kvm_memory_slot *memslot;
3199         unsigned long n;
3200         unsigned long is_dirty = 0;
3201
3202         mutex_lock(&kvm->slots_lock);
3203
3204         r = -EINVAL;
3205         if (log->slot >= KVM_MEMORY_SLOTS)
3206                 goto out;
3207
3208         memslot = &kvm->memslots->memslots[log->slot];
3209         r = -ENOENT;
3210         if (!memslot->dirty_bitmap)
3211                 goto out;
3212
3213         n = kvm_dirty_bitmap_bytes(memslot);
3214
3215         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3216                 is_dirty = memslot->dirty_bitmap[i];
3217
3218         /* If nothing is dirty, don't bother messing with page tables. */
3219         if (is_dirty) {
3220                 struct kvm_memslots *slots, *old_slots;
3221                 unsigned long *dirty_bitmap;
3222
3223                 dirty_bitmap = memslot->dirty_bitmap_head;
3224                 if (memslot->dirty_bitmap == dirty_bitmap)
3225                         dirty_bitmap += n / sizeof(long);
3226                 memset(dirty_bitmap, 0, n);
3227
3228                 r = -ENOMEM;
3229                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3230                 if (!slots)
3231                         goto out;
3232                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3233                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3234                 slots->generation++;
3235
3236                 old_slots = kvm->memslots;
3237                 rcu_assign_pointer(kvm->memslots, slots);
3238                 synchronize_srcu_expedited(&kvm->srcu);
3239                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3240                 kfree(old_slots);
3241
3242                 spin_lock(&kvm->mmu_lock);
3243                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3244                 spin_unlock(&kvm->mmu_lock);
3245
3246                 r = -EFAULT;
3247                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3248                         goto out;
3249         } else {
3250                 r = -EFAULT;
3251                 if (clear_user(log->dirty_bitmap, n))
3252                         goto out;
3253         }
3254
3255         r = 0;
3256 out:
3257         mutex_unlock(&kvm->slots_lock);
3258         return r;
3259 }
3260
3261 long kvm_arch_vm_ioctl(struct file *filp,
3262                        unsigned int ioctl, unsigned long arg)
3263 {
3264         struct kvm *kvm = filp->private_data;
3265         void __user *argp = (void __user *)arg;
3266         int r = -ENOTTY;
3267         /*
3268          * This union makes it completely explicit to gcc-3.x
3269          * that these two variables' stack usage should be
3270          * combined, not added together.
3271          */
3272         union {
3273                 struct kvm_pit_state ps;
3274                 struct kvm_pit_state2 ps2;
3275                 struct kvm_pit_config pit_config;
3276         } u;
3277
3278         switch (ioctl) {
3279         case KVM_SET_TSS_ADDR:
3280                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3281                 if (r < 0)
3282                         goto out;
3283                 break;
3284         case KVM_SET_IDENTITY_MAP_ADDR: {
3285                 u64 ident_addr;
3286
3287                 r = -EFAULT;
3288                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3289                         goto out;
3290                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3291                 if (r < 0)
3292                         goto out;
3293                 break;
3294         }
3295         case KVM_SET_NR_MMU_PAGES:
3296                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3297                 if (r)
3298                         goto out;
3299                 break;
3300         case KVM_GET_NR_MMU_PAGES:
3301                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3302                 break;
3303         case KVM_CREATE_IRQCHIP: {
3304                 struct kvm_pic *vpic;
3305
3306                 mutex_lock(&kvm->lock);
3307                 r = -EEXIST;
3308                 if (kvm->arch.vpic)
3309                         goto create_irqchip_unlock;
3310                 r = -ENOMEM;
3311                 vpic = kvm_create_pic(kvm);
3312                 if (vpic) {
3313                         r = kvm_ioapic_init(kvm);
3314                         if (r) {
3315                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3316                                                           &vpic->dev);
3317                                 kfree(vpic);
3318                                 goto create_irqchip_unlock;
3319                         }
3320                 } else
3321                         goto create_irqchip_unlock;
3322                 smp_wmb();
3323                 kvm->arch.vpic = vpic;
3324                 smp_wmb();
3325                 r = kvm_setup_default_irq_routing(kvm);
3326                 if (r) {
3327                         mutex_lock(&kvm->irq_lock);
3328                         kvm_ioapic_destroy(kvm);
3329                         kvm_destroy_pic(kvm);
3330                         mutex_unlock(&kvm->irq_lock);
3331                 }
3332         create_irqchip_unlock:
3333                 mutex_unlock(&kvm->lock);
3334                 break;
3335         }
3336         case KVM_CREATE_PIT:
3337                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3338                 goto create_pit;
3339         case KVM_CREATE_PIT2:
3340                 r = -EFAULT;
3341                 if (copy_from_user(&u.pit_config, argp,
3342                                    sizeof(struct kvm_pit_config)))
3343                         goto out;
3344         create_pit:
3345                 mutex_lock(&kvm->slots_lock);
3346                 r = -EEXIST;
3347                 if (kvm->arch.vpit)
3348                         goto create_pit_unlock;
3349                 r = -ENOMEM;
3350                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3351                 if (kvm->arch.vpit)
3352                         r = 0;
3353         create_pit_unlock:
3354                 mutex_unlock(&kvm->slots_lock);
3355                 break;
3356         case KVM_IRQ_LINE_STATUS:
3357         case KVM_IRQ_LINE: {
3358                 struct kvm_irq_level irq_event;
3359
3360                 r = -EFAULT;
3361                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3362                         goto out;
3363                 r = -ENXIO;
3364                 if (irqchip_in_kernel(kvm)) {
3365                         __s32 status;
3366                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3367                                         irq_event.irq, irq_event.level);
3368                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3369                                 r = -EFAULT;
3370                                 irq_event.status = status;
3371                                 if (copy_to_user(argp, &irq_event,
3372                                                         sizeof irq_event))
3373                                         goto out;
3374                         }
3375                         r = 0;
3376                 }
3377                 break;
3378         }
3379         case KVM_GET_IRQCHIP: {
3380                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3381                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3382
3383                 r = -ENOMEM;
3384                 if (!chip)
3385                         goto out;
3386                 r = -EFAULT;
3387                 if (copy_from_user(chip, argp, sizeof *chip))
3388                         goto get_irqchip_out;
3389                 r = -ENXIO;
3390                 if (!irqchip_in_kernel(kvm))
3391                         goto get_irqchip_out;
3392                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3393                 if (r)
3394                         goto get_irqchip_out;
3395                 r = -EFAULT;
3396                 if (copy_to_user(argp, chip, sizeof *chip))
3397                         goto get_irqchip_out;
3398                 r = 0;
3399         get_irqchip_out:
3400                 kfree(chip);
3401                 if (r)
3402                         goto out;
3403                 break;
3404         }
3405         case KVM_SET_IRQCHIP: {
3406                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3407                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3408
3409                 r = -ENOMEM;
3410                 if (!chip)
3411                         goto out;
3412                 r = -EFAULT;
3413                 if (copy_from_user(chip, argp, sizeof *chip))
3414                         goto set_irqchip_out;
3415                 r = -ENXIO;
3416                 if (!irqchip_in_kernel(kvm))
3417                         goto set_irqchip_out;
3418                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3419                 if (r)
3420                         goto set_irqchip_out;
3421                 r = 0;
3422         set_irqchip_out:
3423                 kfree(chip);
3424                 if (r)
3425                         goto out;
3426                 break;
3427         }
3428         case KVM_GET_PIT: {
3429                 r = -EFAULT;
3430                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3431                         goto out;
3432                 r = -ENXIO;
3433                 if (!kvm->arch.vpit)
3434                         goto out;
3435                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3436                 if (r)
3437                         goto out;
3438                 r = -EFAULT;
3439                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3440                         goto out;
3441                 r = 0;
3442                 break;
3443         }
3444         case KVM_SET_PIT: {
3445                 r = -EFAULT;
3446                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3447                         goto out;
3448                 r = -ENXIO;
3449                 if (!kvm->arch.vpit)
3450                         goto out;
3451                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3452                 if (r)
3453                         goto out;
3454                 r = 0;
3455                 break;
3456         }
3457         case KVM_GET_PIT2: {
3458                 r = -ENXIO;
3459                 if (!kvm->arch.vpit)
3460                         goto out;
3461                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3462                 if (r)
3463                         goto out;
3464                 r = -EFAULT;
3465                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3466                         goto out;
3467                 r = 0;
3468                 break;
3469         }
3470         case KVM_SET_PIT2: {
3471                 r = -EFAULT;
3472                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3473                         goto out;
3474                 r = -ENXIO;
3475                 if (!kvm->arch.vpit)
3476                         goto out;
3477                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3478                 if (r)
3479                         goto out;
3480                 r = 0;
3481                 break;
3482         }
3483         case KVM_REINJECT_CONTROL: {
3484                 struct kvm_reinject_control control;
3485                 r =  -EFAULT;
3486                 if (copy_from_user(&control, argp, sizeof(control)))
3487                         goto out;
3488                 r = kvm_vm_ioctl_reinject(kvm, &control);
3489                 if (r)
3490                         goto out;
3491                 r = 0;
3492                 break;
3493         }
3494         case KVM_XEN_HVM_CONFIG: {
3495                 r = -EFAULT;
3496                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3497                                    sizeof(struct kvm_xen_hvm_config)))
3498                         goto out;
3499                 r = -EINVAL;
3500                 if (kvm->arch.xen_hvm_config.flags)
3501                         goto out;
3502                 r = 0;
3503                 break;
3504         }
3505         case KVM_SET_CLOCK: {
3506                 struct kvm_clock_data user_ns;
3507                 u64 now_ns;
3508                 s64 delta;
3509
3510                 r = -EFAULT;
3511                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3512                         goto out;
3513
3514                 r = -EINVAL;
3515                 if (user_ns.flags)
3516                         goto out;
3517
3518                 r = 0;
3519                 local_irq_disable();
3520                 now_ns = get_kernel_ns();
3521                 delta = user_ns.clock - now_ns;
3522                 local_irq_enable();
3523                 kvm->arch.kvmclock_offset = delta;
3524                 break;
3525         }
3526         case KVM_GET_CLOCK: {
3527                 struct kvm_clock_data user_ns;
3528                 u64 now_ns;
3529
3530                 local_irq_disable();
3531                 now_ns = get_kernel_ns();
3532                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3533                 local_irq_enable();
3534                 user_ns.flags = 0;
3535                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3536
3537                 r = -EFAULT;
3538                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3539                         goto out;
3540                 r = 0;
3541                 break;
3542         }
3543
3544         default:
3545                 ;
3546         }
3547 out:
3548         return r;
3549 }
3550
3551 static void kvm_init_msr_list(void)
3552 {
3553         u32 dummy[2];
3554         unsigned i, j;
3555
3556         /* skip the first msrs in the list. KVM-specific */
3557         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3558                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3559                         continue;
3560                 if (j < i)
3561                         msrs_to_save[j] = msrs_to_save[i];
3562                 j++;
3563         }
3564         num_msrs_to_save = j;
3565 }
3566
3567 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3568                            const void *v)
3569 {
3570         if (vcpu->arch.apic &&
3571             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3572                 return 0;
3573
3574         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3575 }
3576
3577 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3578 {
3579         if (vcpu->arch.apic &&
3580             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3581                 return 0;
3582
3583         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3584 }
3585
3586 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3587                         struct kvm_segment *var, int seg)
3588 {
3589         kvm_x86_ops->set_segment(vcpu, var, seg);
3590 }
3591
3592 void kvm_get_segment(struct kvm_vcpu *vcpu,
3593                      struct kvm_segment *var, int seg)
3594 {
3595         kvm_x86_ops->get_segment(vcpu, var, seg);
3596 }
3597
3598 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3599 {
3600         return gpa;
3601 }
3602
3603 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3604 {
3605         gpa_t t_gpa;
3606         struct x86_exception exception;
3607
3608         BUG_ON(!mmu_is_nested(vcpu));
3609
3610         /* NPT walks are always user-walks */
3611         access |= PFERR_USER_MASK;
3612         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3613         if (t_gpa == UNMAPPED_GVA)
3614                 vcpu->arch.fault.nested = true;
3615
3616         return t_gpa;
3617 }
3618
3619 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3620                               struct x86_exception *exception)
3621 {
3622         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3623         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3624 }
3625
3626  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3627                                 struct x86_exception *exception)
3628 {
3629         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3630         access |= PFERR_FETCH_MASK;
3631         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3632 }
3633
3634 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3635                                struct x86_exception *exception)
3636 {
3637         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3638         access |= PFERR_WRITE_MASK;
3639         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3640 }
3641
3642 /* uses this to access any guest's mapped memory without checking CPL */
3643 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3644                                 struct x86_exception *exception)
3645 {
3646         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3647 }
3648
3649 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3650                                       struct kvm_vcpu *vcpu, u32 access,
3651                                       struct x86_exception *exception)
3652 {
3653         void *data = val;
3654         int r = X86EMUL_CONTINUE;
3655
3656         while (bytes) {
3657                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3658                                                             exception);
3659                 unsigned offset = addr & (PAGE_SIZE-1);
3660                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3661                 int ret;
3662
3663                 if (gpa == UNMAPPED_GVA)
3664                         return X86EMUL_PROPAGATE_FAULT;
3665                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3666                 if (ret < 0) {
3667                         r = X86EMUL_IO_NEEDED;
3668                         goto out;
3669                 }
3670
3671                 bytes -= toread;
3672                 data += toread;
3673                 addr += toread;
3674         }
3675 out:
3676         return r;
3677 }
3678
3679 /* used for instruction fetching */
3680 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3681                                 struct kvm_vcpu *vcpu,
3682                                 struct x86_exception *exception)
3683 {
3684         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3685         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3686                                           access | PFERR_FETCH_MASK,
3687                                           exception);
3688 }
3689
3690 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3691                                struct kvm_vcpu *vcpu,
3692                                struct x86_exception *exception)
3693 {
3694         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3695         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3696                                           exception);
3697 }
3698
3699 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3700                                       struct kvm_vcpu *vcpu,
3701                                       struct x86_exception *exception)
3702 {
3703         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3704 }
3705
3706 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3707                                        unsigned int bytes,
3708                                        struct kvm_vcpu *vcpu,
3709                                        struct x86_exception *exception)
3710 {
3711         void *data = val;
3712         int r = X86EMUL_CONTINUE;
3713
3714         while (bytes) {
3715                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3716                                                              PFERR_WRITE_MASK,
3717                                                              exception);
3718                 unsigned offset = addr & (PAGE_SIZE-1);
3719                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3720                 int ret;
3721
3722                 if (gpa == UNMAPPED_GVA)
3723                         return X86EMUL_PROPAGATE_FAULT;
3724                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3725                 if (ret < 0) {
3726                         r = X86EMUL_IO_NEEDED;
3727                         goto out;
3728                 }
3729
3730                 bytes -= towrite;
3731                 data += towrite;
3732                 addr += towrite;
3733         }
3734 out:
3735         return r;
3736 }
3737
3738 static int emulator_read_emulated(unsigned long addr,
3739                                   void *val,
3740                                   unsigned int bytes,
3741                                   struct x86_exception *exception,
3742                                   struct kvm_vcpu *vcpu)
3743 {
3744         gpa_t                 gpa;
3745
3746         if (vcpu->mmio_read_completed) {
3747                 memcpy(val, vcpu->mmio_data, bytes);
3748                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3749                                vcpu->mmio_phys_addr, *(u64 *)val);
3750                 vcpu->mmio_read_completed = 0;
3751                 return X86EMUL_CONTINUE;
3752         }
3753
3754         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3755
3756         if (gpa == UNMAPPED_GVA)
3757                 return X86EMUL_PROPAGATE_FAULT;
3758
3759         /* For APIC access vmexit */
3760         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3761                 goto mmio;
3762
3763         if (kvm_read_guest_virt(addr, val, bytes, vcpu, exception)
3764             == X86EMUL_CONTINUE)
3765                 return X86EMUL_CONTINUE;
3766
3767 mmio:
3768         /*
3769          * Is this MMIO handled locally?
3770          */
3771         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3772                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3773                 return X86EMUL_CONTINUE;
3774         }
3775
3776         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3777
3778         vcpu->mmio_needed = 1;
3779         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3780         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3781         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3782         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3783
3784         return X86EMUL_IO_NEEDED;
3785 }
3786
3787 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3788                         const void *val, int bytes)
3789 {
3790         int ret;
3791
3792         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3793         if (ret < 0)
3794                 return 0;
3795         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3796         return 1;
3797 }
3798
3799 static int emulator_write_emulated_onepage(unsigned long addr,
3800                                            const void *val,
3801                                            unsigned int bytes,
3802                                            struct x86_exception *exception,
3803                                            struct kvm_vcpu *vcpu)
3804 {
3805         gpa_t                 gpa;
3806
3807         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3808
3809         if (gpa == UNMAPPED_GVA)
3810                 return X86EMUL_PROPAGATE_FAULT;
3811
3812         /* For APIC access vmexit */
3813         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3814                 goto mmio;
3815
3816         if (emulator_write_phys(vcpu, gpa, val, bytes))
3817                 return X86EMUL_CONTINUE;
3818
3819 mmio:
3820         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3821         /*
3822          * Is this MMIO handled locally?
3823          */
3824         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3825                 return X86EMUL_CONTINUE;
3826
3827         vcpu->mmio_needed = 1;
3828         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3829         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3830         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3831         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3832         memcpy(vcpu->run->mmio.data, val, bytes);
3833
3834         return X86EMUL_CONTINUE;
3835 }
3836
3837 int emulator_write_emulated(unsigned long addr,
3838                             const void *val,
3839                             unsigned int bytes,
3840                             struct x86_exception *exception,
3841                             struct kvm_vcpu *vcpu)
3842 {
3843         /* Crossing a page boundary? */
3844         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3845                 int rc, now;
3846
3847                 now = -addr & ~PAGE_MASK;
3848                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
3849                                                      vcpu);
3850                 if (rc != X86EMUL_CONTINUE)
3851                         return rc;
3852                 addr += now;
3853                 val += now;
3854                 bytes -= now;
3855         }
3856         return emulator_write_emulated_onepage(addr, val, bytes, exception,
3857                                                vcpu);
3858 }
3859
3860 #define CMPXCHG_TYPE(t, ptr, old, new) \
3861         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3862
3863 #ifdef CONFIG_X86_64
3864 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3865 #else
3866 #  define CMPXCHG64(ptr, old, new) \
3867         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3868 #endif
3869
3870 static int emulator_cmpxchg_emulated(unsigned long addr,
3871                                      const void *old,
3872                                      const void *new,
3873                                      unsigned int bytes,
3874                                      struct x86_exception *exception,
3875                                      struct kvm_vcpu *vcpu)
3876 {
3877         gpa_t gpa;
3878         struct page *page;
3879         char *kaddr;
3880         bool exchanged;
3881
3882         /* guests cmpxchg8b have to be emulated atomically */
3883         if (bytes > 8 || (bytes & (bytes - 1)))
3884                 goto emul_write;
3885
3886         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3887
3888         if (gpa == UNMAPPED_GVA ||
3889             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3890                 goto emul_write;
3891
3892         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3893                 goto emul_write;
3894
3895         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3896         if (is_error_page(page)) {
3897                 kvm_release_page_clean(page);
3898                 goto emul_write;
3899         }
3900
3901         kaddr = kmap_atomic(page, KM_USER0);
3902         kaddr += offset_in_page(gpa);
3903         switch (bytes) {
3904         case 1:
3905                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3906                 break;
3907         case 2:
3908                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3909                 break;
3910         case 4:
3911                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3912                 break;
3913         case 8:
3914                 exchanged = CMPXCHG64(kaddr, old, new);
3915                 break;
3916         default:
3917                 BUG();
3918         }
3919         kunmap_atomic(kaddr, KM_USER0);
3920         kvm_release_page_dirty(page);
3921
3922         if (!exchanged)
3923                 return X86EMUL_CMPXCHG_FAILED;
3924
3925         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3926
3927         return X86EMUL_CONTINUE;
3928
3929 emul_write:
3930         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3931
3932         return emulator_write_emulated(addr, new, bytes, exception, vcpu);
3933 }
3934
3935 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3936 {
3937         /* TODO: String I/O for in kernel device */
3938         int r;
3939
3940         if (vcpu->arch.pio.in)
3941                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3942                                     vcpu->arch.pio.size, pd);
3943         else
3944                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3945                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3946                                      pd);
3947         return r;
3948 }
3949
3950
3951 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3952                              unsigned int count, struct kvm_vcpu *vcpu)
3953 {
3954         if (vcpu->arch.pio.count)
3955                 goto data_avail;
3956
3957         trace_kvm_pio(0, port, size, 1);
3958
3959         vcpu->arch.pio.port = port;
3960         vcpu->arch.pio.in = 1;
3961         vcpu->arch.pio.count  = count;
3962         vcpu->arch.pio.size = size;
3963
3964         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3965         data_avail:
3966                 memcpy(val, vcpu->arch.pio_data, size * count);
3967                 vcpu->arch.pio.count = 0;
3968                 return 1;
3969         }
3970
3971         vcpu->run->exit_reason = KVM_EXIT_IO;
3972         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3973         vcpu->run->io.size = size;
3974         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3975         vcpu->run->io.count = count;
3976         vcpu->run->io.port = port;
3977
3978         return 0;
3979 }
3980
3981 static int emulator_pio_out_emulated(int size, unsigned short port,
3982                               const void *val, unsigned int count,
3983                               struct kvm_vcpu *vcpu)
3984 {
3985         trace_kvm_pio(1, port, size, 1);
3986
3987         vcpu->arch.pio.port = port;
3988         vcpu->arch.pio.in = 0;
3989         vcpu->arch.pio.count = count;
3990         vcpu->arch.pio.size = size;
3991
3992         memcpy(vcpu->arch.pio_data, val, size * count);
3993
3994         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3995                 vcpu->arch.pio.count = 0;
3996                 return 1;
3997         }
3998
3999         vcpu->run->exit_reason = KVM_EXIT_IO;
4000         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4001         vcpu->run->io.size = size;
4002         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4003         vcpu->run->io.count = count;
4004         vcpu->run->io.port = port;
4005
4006         return 0;
4007 }
4008
4009 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4010 {
4011         return kvm_x86_ops->get_segment_base(vcpu, seg);
4012 }
4013
4014 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4015 {
4016         kvm_mmu_invlpg(vcpu, address);
4017         return X86EMUL_CONTINUE;
4018 }
4019
4020 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4021 {
4022         if (!need_emulate_wbinvd(vcpu))
4023                 return X86EMUL_CONTINUE;
4024
4025         if (kvm_x86_ops->has_wbinvd_exit()) {
4026                 int cpu = get_cpu();
4027
4028                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4029                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4030                                 wbinvd_ipi, NULL, 1);
4031                 put_cpu();
4032                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4033         } else
4034                 wbinvd();
4035         return X86EMUL_CONTINUE;
4036 }
4037 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4038
4039 int emulate_clts(struct kvm_vcpu *vcpu)
4040 {
4041         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4042         kvm_x86_ops->fpu_activate(vcpu);
4043         return X86EMUL_CONTINUE;
4044 }
4045
4046 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4047 {
4048         return _kvm_get_dr(vcpu, dr, dest);
4049 }
4050
4051 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4052 {
4053
4054         return __kvm_set_dr(vcpu, dr, value);
4055 }
4056
4057 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4058 {
4059         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4060 }
4061
4062 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4063 {
4064         unsigned long value;
4065
4066         switch (cr) {
4067         case 0:
4068                 value = kvm_read_cr0(vcpu);
4069                 break;
4070         case 2:
4071                 value = vcpu->arch.cr2;
4072                 break;
4073         case 3:
4074                 value = vcpu->arch.cr3;
4075                 break;
4076         case 4:
4077                 value = kvm_read_cr4(vcpu);
4078                 break;
4079         case 8:
4080                 value = kvm_get_cr8(vcpu);
4081                 break;
4082         default:
4083                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4084                 return 0;
4085         }
4086
4087         return value;
4088 }
4089
4090 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4091 {
4092         int res = 0;
4093
4094         switch (cr) {
4095         case 0:
4096                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4097                 break;
4098         case 2:
4099                 vcpu->arch.cr2 = val;
4100                 break;
4101         case 3:
4102                 res = kvm_set_cr3(vcpu, val);
4103                 break;
4104         case 4:
4105                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4106                 break;
4107         case 8:
4108                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4109                 break;
4110         default:
4111                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4112                 res = -1;
4113         }
4114
4115         return res;
4116 }
4117
4118 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4119 {
4120         return kvm_x86_ops->get_cpl(vcpu);
4121 }
4122
4123 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4124 {
4125         kvm_x86_ops->get_gdt(vcpu, dt);
4126 }
4127
4128 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4129 {
4130         kvm_x86_ops->get_idt(vcpu, dt);
4131 }
4132
4133 static unsigned long emulator_get_cached_segment_base(int seg,
4134                                                       struct kvm_vcpu *vcpu)
4135 {
4136         return get_segment_base(vcpu, seg);
4137 }
4138
4139 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4140                                            struct kvm_vcpu *vcpu)
4141 {
4142         struct kvm_segment var;
4143
4144         kvm_get_segment(vcpu, &var, seg);
4145
4146         if (var.unusable)
4147                 return false;
4148
4149         if (var.g)
4150                 var.limit >>= 12;
4151         set_desc_limit(desc, var.limit);
4152         set_desc_base(desc, (unsigned long)var.base);
4153         desc->type = var.type;
4154         desc->s = var.s;
4155         desc->dpl = var.dpl;
4156         desc->p = var.present;
4157         desc->avl = var.avl;
4158         desc->l = var.l;
4159         desc->d = var.db;
4160         desc->g = var.g;
4161
4162         return true;
4163 }
4164
4165 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4166                                            struct kvm_vcpu *vcpu)
4167 {
4168         struct kvm_segment var;
4169
4170         /* needed to preserve selector */
4171         kvm_get_segment(vcpu, &var, seg);
4172
4173         var.base = get_desc_base(desc);
4174         var.limit = get_desc_limit(desc);
4175         if (desc->g)
4176                 var.limit = (var.limit << 12) | 0xfff;
4177         var.type = desc->type;
4178         var.present = desc->p;
4179         var.dpl = desc->dpl;
4180         var.db = desc->d;
4181         var.s = desc->s;
4182         var.l = desc->l;
4183         var.g = desc->g;
4184         var.avl = desc->avl;
4185         var.present = desc->p;
4186         var.unusable = !var.present;
4187         var.padding = 0;
4188
4189         kvm_set_segment(vcpu, &var, seg);
4190         return;
4191 }
4192
4193 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4194 {
4195         struct kvm_segment kvm_seg;
4196
4197         kvm_get_segment(vcpu, &kvm_seg, seg);
4198         return kvm_seg.selector;
4199 }
4200
4201 static void emulator_set_segment_selector(u16 sel, int seg,
4202                                           struct kvm_vcpu *vcpu)
4203 {
4204         struct kvm_segment kvm_seg;
4205
4206         kvm_get_segment(vcpu, &kvm_seg, seg);
4207         kvm_seg.selector = sel;
4208         kvm_set_segment(vcpu, &kvm_seg, seg);
4209 }
4210
4211 static struct x86_emulate_ops emulate_ops = {
4212         .read_std            = kvm_read_guest_virt_system,
4213         .write_std           = kvm_write_guest_virt_system,
4214         .fetch               = kvm_fetch_guest_virt,
4215         .read_emulated       = emulator_read_emulated,
4216         .write_emulated      = emulator_write_emulated,
4217         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4218         .pio_in_emulated     = emulator_pio_in_emulated,
4219         .pio_out_emulated    = emulator_pio_out_emulated,
4220         .get_cached_descriptor = emulator_get_cached_descriptor,
4221         .set_cached_descriptor = emulator_set_cached_descriptor,
4222         .get_segment_selector = emulator_get_segment_selector,
4223         .set_segment_selector = emulator_set_segment_selector,
4224         .get_cached_segment_base = emulator_get_cached_segment_base,
4225         .get_gdt             = emulator_get_gdt,
4226         .get_idt             = emulator_get_idt,
4227         .get_cr              = emulator_get_cr,
4228         .set_cr              = emulator_set_cr,
4229         .cpl                 = emulator_get_cpl,
4230         .get_dr              = emulator_get_dr,
4231         .set_dr              = emulator_set_dr,
4232         .set_msr             = kvm_set_msr,
4233         .get_msr             = kvm_get_msr,
4234 };
4235
4236 static void cache_all_regs(struct kvm_vcpu *vcpu)
4237 {
4238         kvm_register_read(vcpu, VCPU_REGS_RAX);
4239         kvm_register_read(vcpu, VCPU_REGS_RSP);
4240         kvm_register_read(vcpu, VCPU_REGS_RIP);
4241         vcpu->arch.regs_dirty = ~0;
4242 }
4243
4244 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4245 {
4246         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4247         /*
4248          * an sti; sti; sequence only disable interrupts for the first
4249          * instruction. So, if the last instruction, be it emulated or
4250          * not, left the system with the INT_STI flag enabled, it
4251          * means that the last instruction is an sti. We should not
4252          * leave the flag on in this case. The same goes for mov ss
4253          */
4254         if (!(int_shadow & mask))
4255                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4256 }
4257
4258 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4259 {
4260         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4261         if (ctxt->exception.vector == PF_VECTOR)
4262                 kvm_propagate_fault(vcpu);
4263         else if (ctxt->exception.error_code_valid)
4264                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4265                                       ctxt->exception.error_code);
4266         else
4267                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4268 }
4269
4270 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4271 {
4272         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4273         int cs_db, cs_l;
4274
4275         cache_all_regs(vcpu);
4276
4277         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4278
4279         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4280         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4281         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4282         vcpu->arch.emulate_ctxt.mode =
4283                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4284                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4285                 ? X86EMUL_MODE_VM86 : cs_l
4286                 ? X86EMUL_MODE_PROT64 : cs_db
4287                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4288         memset(c, 0, sizeof(struct decode_cache));
4289         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4290 }
4291
4292 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4293 {
4294         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4295         int ret;
4296
4297         init_emulate_ctxt(vcpu);
4298
4299         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4300         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4301         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4302         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4303
4304         if (ret != X86EMUL_CONTINUE)
4305                 return EMULATE_FAIL;
4306
4307         vcpu->arch.emulate_ctxt.eip = c->eip;
4308         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4309         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4310         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4311
4312         if (irq == NMI_VECTOR)
4313                 vcpu->arch.nmi_pending = false;
4314         else
4315                 vcpu->arch.interrupt.pending = false;
4316
4317         return EMULATE_DONE;
4318 }
4319 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4320
4321 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4322 {
4323         ++vcpu->stat.insn_emulation_fail;
4324         trace_kvm_emulate_insn_failed(vcpu);
4325         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4326         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4327         vcpu->run->internal.ndata = 0;
4328         kvm_queue_exception(vcpu, UD_VECTOR);
4329         return EMULATE_FAIL;
4330 }
4331
4332 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4333 {
4334         gpa_t gpa;
4335
4336         if (tdp_enabled)
4337                 return false;
4338
4339         /*
4340          * if emulation was due to access to shadowed page table
4341          * and it failed try to unshadow page and re-entetr the
4342          * guest to let CPU execute the instruction.
4343          */
4344         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4345                 return true;
4346
4347         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4348
4349         if (gpa == UNMAPPED_GVA)
4350                 return true; /* let cpu generate fault */
4351
4352         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4353                 return true;
4354
4355         return false;
4356 }
4357
4358 int emulate_instruction(struct kvm_vcpu *vcpu,
4359                         unsigned long cr2,
4360                         u16 error_code,
4361                         int emulation_type)
4362 {
4363         int r;
4364         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4365
4366         kvm_clear_exception_queue(vcpu);
4367         vcpu->arch.mmio_fault_cr2 = cr2;
4368         /*
4369          * TODO: fix emulate.c to use guest_read/write_register
4370          * instead of direct ->regs accesses, can save hundred cycles
4371          * on Intel for instructions that don't read/change RSP, for
4372          * for example.
4373          */
4374         cache_all_regs(vcpu);
4375
4376         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4377                 init_emulate_ctxt(vcpu);
4378                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4379                 vcpu->arch.emulate_ctxt.have_exception = false;
4380                 vcpu->arch.emulate_ctxt.perm_ok = false;
4381
4382                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4383                 if (r == X86EMUL_PROPAGATE_FAULT)
4384                         goto done;
4385
4386                 trace_kvm_emulate_insn_start(vcpu);
4387
4388                 /* Only allow emulation of specific instructions on #UD
4389                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4390                 if (emulation_type & EMULTYPE_TRAP_UD) {
4391                         if (!c->twobyte)
4392                                 return EMULATE_FAIL;
4393                         switch (c->b) {
4394                         case 0x01: /* VMMCALL */
4395                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4396                                         return EMULATE_FAIL;
4397                                 break;
4398                         case 0x34: /* sysenter */
4399                         case 0x35: /* sysexit */
4400                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4401                                         return EMULATE_FAIL;
4402                                 break;
4403                         case 0x05: /* syscall */
4404                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4405                                         return EMULATE_FAIL;
4406                                 break;
4407                         default:
4408                                 return EMULATE_FAIL;
4409                         }
4410
4411                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4412                                 return EMULATE_FAIL;
4413                 }
4414
4415                 ++vcpu->stat.insn_emulation;
4416                 if (r)  {
4417                         if (reexecute_instruction(vcpu, cr2))
4418                                 return EMULATE_DONE;
4419                         if (emulation_type & EMULTYPE_SKIP)
4420                                 return EMULATE_FAIL;
4421                         return handle_emulation_failure(vcpu);
4422                 }
4423         }
4424
4425         if (emulation_type & EMULTYPE_SKIP) {
4426                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4427                 return EMULATE_DONE;
4428         }
4429
4430         /* this is needed for vmware backdor interface to work since it
4431            changes registers values  during IO operation */
4432         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4433
4434 restart:
4435         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4436
4437         if (r == EMULATION_FAILED) {
4438                 if (reexecute_instruction(vcpu, cr2))
4439                         return EMULATE_DONE;
4440
4441                 return handle_emulation_failure(vcpu);
4442         }
4443
4444 done:
4445         if (vcpu->arch.emulate_ctxt.have_exception) {
4446                 inject_emulated_exception(vcpu);
4447                 r = EMULATE_DONE;
4448         } else if (vcpu->arch.pio.count) {
4449                 if (!vcpu->arch.pio.in)
4450                         vcpu->arch.pio.count = 0;
4451                 r = EMULATE_DO_MMIO;
4452         } else if (vcpu->mmio_needed) {
4453                 if (vcpu->mmio_is_write)
4454                         vcpu->mmio_needed = 0;
4455                 r = EMULATE_DO_MMIO;
4456         } else if (r == EMULATION_RESTART)
4457                 goto restart;
4458         else
4459                 r = EMULATE_DONE;
4460
4461         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4462         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4463         kvm_make_request(KVM_REQ_EVENT, vcpu);
4464         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4465         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4466
4467         return r;
4468 }
4469 EXPORT_SYMBOL_GPL(emulate_instruction);
4470
4471 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4472 {
4473         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4474         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4475         /* do not return to emulator after return from userspace */
4476         vcpu->arch.pio.count = 0;
4477         return ret;
4478 }
4479 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4480
4481 static void tsc_bad(void *info)
4482 {
4483         __get_cpu_var(cpu_tsc_khz) = 0;
4484 }
4485
4486 static void tsc_khz_changed(void *data)
4487 {
4488         struct cpufreq_freqs *freq = data;
4489         unsigned long khz = 0;
4490
4491         if (data)
4492                 khz = freq->new;
4493         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4494                 khz = cpufreq_quick_get(raw_smp_processor_id());
4495         if (!khz)
4496                 khz = tsc_khz;
4497         __get_cpu_var(cpu_tsc_khz) = khz;
4498 }
4499
4500 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4501                                      void *data)
4502 {
4503         struct cpufreq_freqs *freq = data;
4504         struct kvm *kvm;
4505         struct kvm_vcpu *vcpu;
4506         int i, send_ipi = 0;
4507
4508         /*
4509          * We allow guests to temporarily run on slowing clocks,
4510          * provided we notify them after, or to run on accelerating
4511          * clocks, provided we notify them before.  Thus time never
4512          * goes backwards.
4513          *
4514          * However, we have a problem.  We can't atomically update
4515          * the frequency of a given CPU from this function; it is
4516          * merely a notifier, which can be called from any CPU.
4517          * Changing the TSC frequency at arbitrary points in time
4518          * requires a recomputation of local variables related to
4519          * the TSC for each VCPU.  We must flag these local variables
4520          * to be updated and be sure the update takes place with the
4521          * new frequency before any guests proceed.
4522          *
4523          * Unfortunately, the combination of hotplug CPU and frequency
4524          * change creates an intractable locking scenario; the order
4525          * of when these callouts happen is undefined with respect to
4526          * CPU hotplug, and they can race with each other.  As such,
4527          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4528          * undefined; you can actually have a CPU frequency change take
4529          * place in between the computation of X and the setting of the
4530          * variable.  To protect against this problem, all updates of
4531          * the per_cpu tsc_khz variable are done in an interrupt
4532          * protected IPI, and all callers wishing to update the value
4533          * must wait for a synchronous IPI to complete (which is trivial
4534          * if the caller is on the CPU already).  This establishes the
4535          * necessary total order on variable updates.
4536          *
4537          * Note that because a guest time update may take place
4538          * anytime after the setting of the VCPU's request bit, the
4539          * correct TSC value must be set before the request.  However,
4540          * to ensure the update actually makes it to any guest which
4541          * starts running in hardware virtualization between the set
4542          * and the acquisition of the spinlock, we must also ping the
4543          * CPU after setting the request bit.
4544          *
4545          */
4546
4547         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4548                 return 0;
4549         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4550                 return 0;
4551
4552         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4553
4554         spin_lock(&kvm_lock);
4555         list_for_each_entry(kvm, &vm_list, vm_list) {
4556                 kvm_for_each_vcpu(i, vcpu, kvm) {
4557                         if (vcpu->cpu != freq->cpu)
4558                                 continue;
4559                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4560                         if (vcpu->cpu != smp_processor_id())
4561                                 send_ipi = 1;
4562                 }
4563         }
4564         spin_unlock(&kvm_lock);
4565
4566         if (freq->old < freq->new && send_ipi) {
4567                 /*
4568                  * We upscale the frequency.  Must make the guest
4569                  * doesn't see old kvmclock values while running with
4570                  * the new frequency, otherwise we risk the guest sees
4571                  * time go backwards.
4572                  *
4573                  * In case we update the frequency for another cpu
4574                  * (which might be in guest context) send an interrupt
4575                  * to kick the cpu out of guest context.  Next time
4576                  * guest context is entered kvmclock will be updated,
4577                  * so the guest will not see stale values.
4578                  */
4579                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4580         }
4581         return 0;
4582 }
4583
4584 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4585         .notifier_call  = kvmclock_cpufreq_notifier
4586 };
4587
4588 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4589                                         unsigned long action, void *hcpu)
4590 {
4591         unsigned int cpu = (unsigned long)hcpu;
4592
4593         switch (action) {
4594                 case CPU_ONLINE:
4595                 case CPU_DOWN_FAILED:
4596                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4597                         break;
4598                 case CPU_DOWN_PREPARE:
4599                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4600                         break;
4601         }
4602         return NOTIFY_OK;
4603 }
4604
4605 static struct notifier_block kvmclock_cpu_notifier_block = {
4606         .notifier_call  = kvmclock_cpu_notifier,
4607         .priority = -INT_MAX
4608 };
4609
4610 static void kvm_timer_init(void)
4611 {
4612         int cpu;
4613
4614         max_tsc_khz = tsc_khz;
4615         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4616         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4617 #ifdef CONFIG_CPU_FREQ
4618                 struct cpufreq_policy policy;
4619                 memset(&policy, 0, sizeof(policy));
4620                 cpu = get_cpu();
4621                 cpufreq_get_policy(&policy, cpu);
4622                 if (policy.cpuinfo.max_freq)
4623                         max_tsc_khz = policy.cpuinfo.max_freq;
4624                 put_cpu();
4625 #endif
4626                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4627                                           CPUFREQ_TRANSITION_NOTIFIER);
4628         }
4629         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4630         for_each_online_cpu(cpu)
4631                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4632 }
4633
4634 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4635
4636 static int kvm_is_in_guest(void)
4637 {
4638         return percpu_read(current_vcpu) != NULL;
4639 }
4640
4641 static int kvm_is_user_mode(void)
4642 {
4643         int user_mode = 3;
4644
4645         if (percpu_read(current_vcpu))
4646                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4647
4648         return user_mode != 0;
4649 }
4650
4651 static unsigned long kvm_get_guest_ip(void)
4652 {
4653         unsigned long ip = 0;
4654
4655         if (percpu_read(current_vcpu))
4656                 ip = kvm_rip_read(percpu_read(current_vcpu));
4657
4658         return ip;
4659 }
4660
4661 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4662         .is_in_guest            = kvm_is_in_guest,
4663         .is_user_mode           = kvm_is_user_mode,
4664         .get_guest_ip           = kvm_get_guest_ip,
4665 };
4666
4667 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4668 {
4669         percpu_write(current_vcpu, vcpu);
4670 }
4671 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4672
4673 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4674 {
4675         percpu_write(current_vcpu, NULL);
4676 }
4677 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4678
4679 int kvm_arch_init(void *opaque)
4680 {
4681         int r;
4682         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4683
4684         if (kvm_x86_ops) {
4685                 printk(KERN_ERR "kvm: already loaded the other module\n");
4686                 r = -EEXIST;
4687                 goto out;
4688         }
4689
4690         if (!ops->cpu_has_kvm_support()) {
4691                 printk(KERN_ERR "kvm: no hardware support\n");
4692                 r = -EOPNOTSUPP;
4693                 goto out;
4694         }
4695         if (ops->disabled_by_bios()) {
4696                 printk(KERN_ERR "kvm: disabled by bios\n");
4697                 r = -EOPNOTSUPP;
4698                 goto out;
4699         }
4700
4701         r = kvm_mmu_module_init();
4702         if (r)
4703                 goto out;
4704
4705         kvm_init_msr_list();
4706
4707         kvm_x86_ops = ops;
4708         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4709         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4710                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4711
4712         kvm_timer_init();
4713
4714         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4715
4716         if (cpu_has_xsave)
4717                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4718
4719         return 0;
4720
4721 out:
4722         return r;
4723 }
4724
4725 void kvm_arch_exit(void)
4726 {
4727         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4728
4729         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4730                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4731                                             CPUFREQ_TRANSITION_NOTIFIER);
4732         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4733         kvm_x86_ops = NULL;
4734         kvm_mmu_module_exit();
4735 }
4736
4737 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4738 {
4739         ++vcpu->stat.halt_exits;
4740         if (irqchip_in_kernel(vcpu->kvm)) {
4741                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4742                 return 1;
4743         } else {
4744                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4745                 return 0;
4746         }
4747 }
4748 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4749
4750 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4751                            unsigned long a1)
4752 {
4753         if (is_long_mode(vcpu))
4754                 return a0;
4755         else
4756                 return a0 | ((gpa_t)a1 << 32);
4757 }
4758
4759 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4760 {
4761         u64 param, ingpa, outgpa, ret;
4762         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4763         bool fast, longmode;
4764         int cs_db, cs_l;
4765
4766         /*
4767          * hypercall generates UD from non zero cpl and real mode
4768          * per HYPER-V spec
4769          */
4770         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4771                 kvm_queue_exception(vcpu, UD_VECTOR);
4772                 return 0;
4773         }
4774
4775         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4776         longmode = is_long_mode(vcpu) && cs_l == 1;
4777
4778         if (!longmode) {
4779                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4780                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4781                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4782                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4783                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4784                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4785         }
4786 #ifdef CONFIG_X86_64
4787         else {
4788                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4789                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4790                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4791         }
4792 #endif
4793
4794         code = param & 0xffff;
4795         fast = (param >> 16) & 0x1;
4796         rep_cnt = (param >> 32) & 0xfff;
4797         rep_idx = (param >> 48) & 0xfff;
4798
4799         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4800
4801         switch (code) {
4802         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4803                 kvm_vcpu_on_spin(vcpu);
4804                 break;
4805         default:
4806                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4807                 break;
4808         }
4809
4810         ret = res | (((u64)rep_done & 0xfff) << 32);
4811         if (longmode) {
4812                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4813         } else {
4814                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4815                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4816         }
4817
4818         return 1;
4819 }
4820
4821 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4822 {
4823         unsigned long nr, a0, a1, a2, a3, ret;
4824         int r = 1;
4825
4826         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4827                 return kvm_hv_hypercall(vcpu);
4828
4829         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4830         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4831         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4832         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4833         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4834
4835         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4836
4837         if (!is_long_mode(vcpu)) {
4838                 nr &= 0xFFFFFFFF;
4839                 a0 &= 0xFFFFFFFF;
4840                 a1 &= 0xFFFFFFFF;
4841                 a2 &= 0xFFFFFFFF;
4842                 a3 &= 0xFFFFFFFF;
4843         }
4844
4845         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4846                 ret = -KVM_EPERM;
4847                 goto out;
4848         }
4849
4850         switch (nr) {
4851         case KVM_HC_VAPIC_POLL_IRQ:
4852                 ret = 0;
4853                 break;
4854         case KVM_HC_MMU_OP:
4855                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4856                 break;
4857         default:
4858                 ret = -KVM_ENOSYS;
4859                 break;
4860         }
4861 out:
4862         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4863         ++vcpu->stat.hypercalls;
4864         return r;
4865 }
4866 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4867
4868 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4869 {
4870         char instruction[3];
4871         unsigned long rip = kvm_rip_read(vcpu);
4872
4873         /*
4874          * Blow out the MMU to ensure that no other VCPU has an active mapping
4875          * to ensure that the updated hypercall appears atomically across all
4876          * VCPUs.
4877          */
4878         kvm_mmu_zap_all(vcpu->kvm);
4879
4880         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4881
4882         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4883 }
4884
4885 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4886 {
4887         struct desc_ptr dt = { limit, base };
4888
4889         kvm_x86_ops->set_gdt(vcpu, &dt);
4890 }
4891
4892 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4893 {
4894         struct desc_ptr dt = { limit, base };
4895
4896         kvm_x86_ops->set_idt(vcpu, &dt);
4897 }
4898
4899 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4900 {
4901         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4902         int j, nent = vcpu->arch.cpuid_nent;
4903
4904         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4905         /* when no next entry is found, the current entry[i] is reselected */
4906         for (j = i + 1; ; j = (j + 1) % nent) {
4907                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4908                 if (ej->function == e->function) {
4909                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4910                         return j;
4911                 }
4912         }
4913         return 0; /* silence gcc, even though control never reaches here */
4914 }
4915
4916 /* find an entry with matching function, matching index (if needed), and that
4917  * should be read next (if it's stateful) */
4918 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4919         u32 function, u32 index)
4920 {
4921         if (e->function != function)
4922                 return 0;
4923         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4924                 return 0;
4925         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4926             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4927                 return 0;
4928         return 1;
4929 }
4930
4931 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4932                                               u32 function, u32 index)
4933 {
4934         int i;
4935         struct kvm_cpuid_entry2 *best = NULL;
4936
4937         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4938                 struct kvm_cpuid_entry2 *e;
4939
4940                 e = &vcpu->arch.cpuid_entries[i];
4941                 if (is_matching_cpuid_entry(e, function, index)) {
4942                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4943                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4944                         best = e;
4945                         break;
4946                 }
4947                 /*
4948                  * Both basic or both extended?
4949                  */
4950                 if (((e->function ^ function) & 0x80000000) == 0)
4951                         if (!best || e->function > best->function)
4952                                 best = e;
4953         }
4954         return best;
4955 }
4956 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4957
4958 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4959 {
4960         struct kvm_cpuid_entry2 *best;
4961
4962         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4963         if (!best || best->eax < 0x80000008)
4964                 goto not_found;
4965         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4966         if (best)
4967                 return best->eax & 0xff;
4968 not_found:
4969         return 36;
4970 }
4971
4972 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4973 {
4974         u32 function, index;
4975         struct kvm_cpuid_entry2 *best;
4976
4977         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4978         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4979         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4980         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4981         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4982         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4983         best = kvm_find_cpuid_entry(vcpu, function, index);
4984         if (best) {
4985                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4986                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4987                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4988                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4989         }
4990         kvm_x86_ops->skip_emulated_instruction(vcpu);
4991         trace_kvm_cpuid(function,
4992                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4993                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4994                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4995                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4996 }
4997 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4998
4999 /*
5000  * Check if userspace requested an interrupt window, and that the
5001  * interrupt window is open.
5002  *
5003  * No need to exit to userspace if we already have an interrupt queued.
5004  */
5005 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5006 {
5007         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5008                 vcpu->run->request_interrupt_window &&
5009                 kvm_arch_interrupt_allowed(vcpu));
5010 }
5011
5012 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5013 {
5014         struct kvm_run *kvm_run = vcpu->run;
5015
5016         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5017         kvm_run->cr8 = kvm_get_cr8(vcpu);
5018         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5019         if (irqchip_in_kernel(vcpu->kvm))
5020                 kvm_run->ready_for_interrupt_injection = 1;
5021         else
5022                 kvm_run->ready_for_interrupt_injection =
5023                         kvm_arch_interrupt_allowed(vcpu) &&
5024                         !kvm_cpu_has_interrupt(vcpu) &&
5025                         !kvm_event_needs_reinjection(vcpu);
5026 }
5027
5028 static void vapic_enter(struct kvm_vcpu *vcpu)
5029 {
5030         struct kvm_lapic *apic = vcpu->arch.apic;
5031         struct page *page;
5032
5033         if (!apic || !apic->vapic_addr)
5034                 return;
5035
5036         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5037
5038         vcpu->arch.apic->vapic_page = page;
5039 }
5040
5041 static void vapic_exit(struct kvm_vcpu *vcpu)
5042 {
5043         struct kvm_lapic *apic = vcpu->arch.apic;
5044         int idx;
5045
5046         if (!apic || !apic->vapic_addr)
5047                 return;
5048
5049         idx = srcu_read_lock(&vcpu->kvm->srcu);
5050         kvm_release_page_dirty(apic->vapic_page);
5051         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5052         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5053 }
5054
5055 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5056 {
5057         int max_irr, tpr;
5058
5059         if (!kvm_x86_ops->update_cr8_intercept)
5060                 return;
5061
5062         if (!vcpu->arch.apic)
5063                 return;
5064
5065         if (!vcpu->arch.apic->vapic_addr)
5066                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5067         else
5068                 max_irr = -1;
5069
5070         if (max_irr != -1)
5071                 max_irr >>= 4;
5072
5073         tpr = kvm_lapic_get_cr8(vcpu);
5074
5075         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5076 }
5077
5078 static void inject_pending_event(struct kvm_vcpu *vcpu)
5079 {
5080         /* try to reinject previous events if any */
5081         if (vcpu->arch.exception.pending) {
5082                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5083                                         vcpu->arch.exception.has_error_code,
5084                                         vcpu->arch.exception.error_code);
5085                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5086                                           vcpu->arch.exception.has_error_code,
5087                                           vcpu->arch.exception.error_code,
5088                                           vcpu->arch.exception.reinject);
5089                 return;
5090         }
5091
5092         if (vcpu->arch.nmi_injected) {
5093                 kvm_x86_ops->set_nmi(vcpu);
5094                 return;
5095         }
5096
5097         if (vcpu->arch.interrupt.pending) {
5098                 kvm_x86_ops->set_irq(vcpu);
5099                 return;
5100         }
5101
5102         /* try to inject new event if pending */
5103         if (vcpu->arch.nmi_pending) {
5104                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5105                         vcpu->arch.nmi_pending = false;
5106                         vcpu->arch.nmi_injected = true;
5107                         kvm_x86_ops->set_nmi(vcpu);
5108                 }
5109         } else if (kvm_cpu_has_interrupt(vcpu)) {
5110                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5111                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5112                                             false);
5113                         kvm_x86_ops->set_irq(vcpu);
5114                 }
5115         }
5116 }
5117
5118 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5119 {
5120         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5121                         !vcpu->guest_xcr0_loaded) {
5122                 /* kvm_set_xcr() also depends on this */
5123                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5124                 vcpu->guest_xcr0_loaded = 1;
5125         }
5126 }
5127
5128 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5129 {
5130         if (vcpu->guest_xcr0_loaded) {
5131                 if (vcpu->arch.xcr0 != host_xcr0)
5132                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5133                 vcpu->guest_xcr0_loaded = 0;
5134         }
5135 }
5136
5137 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5138 {
5139         int r;
5140         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5141                 vcpu->run->request_interrupt_window;
5142
5143         if (vcpu->requests) {
5144                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5145                         kvm_mmu_unload(vcpu);
5146                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5147                         __kvm_migrate_timers(vcpu);
5148                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5149                         r = kvm_guest_time_update(vcpu);
5150                         if (unlikely(r))
5151                                 goto out;
5152                 }
5153                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5154                         kvm_mmu_sync_roots(vcpu);
5155                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5156                         kvm_x86_ops->tlb_flush(vcpu);
5157                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5158                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5159                         r = 0;
5160                         goto out;
5161                 }
5162                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5163                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5164                         r = 0;
5165                         goto out;
5166                 }
5167                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5168                         vcpu->fpu_active = 0;
5169                         kvm_x86_ops->fpu_deactivate(vcpu);
5170                 }
5171                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5172                         /* Page is swapped out. Do synthetic halt */
5173                         vcpu->arch.apf.halted = true;
5174                         r = 1;
5175                         goto out;
5176                 }
5177         }
5178
5179         r = kvm_mmu_reload(vcpu);
5180         if (unlikely(r))
5181                 goto out;
5182
5183         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5184                 inject_pending_event(vcpu);
5185
5186                 /* enable NMI/IRQ window open exits if needed */
5187                 if (vcpu->arch.nmi_pending)
5188                         kvm_x86_ops->enable_nmi_window(vcpu);
5189                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5190                         kvm_x86_ops->enable_irq_window(vcpu);
5191
5192                 if (kvm_lapic_enabled(vcpu)) {
5193                         update_cr8_intercept(vcpu);
5194                         kvm_lapic_sync_to_vapic(vcpu);
5195                 }
5196         }
5197
5198         preempt_disable();
5199
5200         kvm_x86_ops->prepare_guest_switch(vcpu);
5201         if (vcpu->fpu_active)
5202                 kvm_load_guest_fpu(vcpu);
5203         kvm_load_guest_xcr0(vcpu);
5204
5205         atomic_set(&vcpu->guest_mode, 1);
5206         smp_wmb();
5207
5208         local_irq_disable();
5209
5210         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5211             || need_resched() || signal_pending(current)) {
5212                 atomic_set(&vcpu->guest_mode, 0);
5213                 smp_wmb();
5214                 local_irq_enable();
5215                 preempt_enable();
5216                 kvm_x86_ops->cancel_injection(vcpu);
5217                 r = 1;
5218                 goto out;
5219         }
5220
5221         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5222
5223         kvm_guest_enter();
5224
5225         if (unlikely(vcpu->arch.switch_db_regs)) {
5226                 set_debugreg(0, 7);
5227                 set_debugreg(vcpu->arch.eff_db[0], 0);
5228                 set_debugreg(vcpu->arch.eff_db[1], 1);
5229                 set_debugreg(vcpu->arch.eff_db[2], 2);
5230                 set_debugreg(vcpu->arch.eff_db[3], 3);
5231         }
5232
5233         trace_kvm_entry(vcpu->vcpu_id);
5234         kvm_x86_ops->run(vcpu);
5235
5236         /*
5237          * If the guest has used debug registers, at least dr7
5238          * will be disabled while returning to the host.
5239          * If we don't have active breakpoints in the host, we don't
5240          * care about the messed up debug address registers. But if
5241          * we have some of them active, restore the old state.
5242          */
5243         if (hw_breakpoint_active())
5244                 hw_breakpoint_restore();
5245
5246         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5247
5248         atomic_set(&vcpu->guest_mode, 0);
5249         smp_wmb();
5250         local_irq_enable();
5251
5252         ++vcpu->stat.exits;
5253
5254         /*
5255          * We must have an instruction between local_irq_enable() and
5256          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5257          * the interrupt shadow.  The stat.exits increment will do nicely.
5258          * But we need to prevent reordering, hence this barrier():
5259          */
5260         barrier();
5261
5262         kvm_guest_exit();
5263
5264         preempt_enable();
5265
5266         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5267
5268         /*
5269          * Profile KVM exit RIPs:
5270          */
5271         if (unlikely(prof_on == KVM_PROFILING)) {
5272                 unsigned long rip = kvm_rip_read(vcpu);
5273                 profile_hit(KVM_PROFILING, (void *)rip);
5274         }
5275
5276
5277         kvm_lapic_sync_from_vapic(vcpu);
5278
5279         r = kvm_x86_ops->handle_exit(vcpu);
5280 out:
5281         return r;
5282 }
5283
5284
5285 static int __vcpu_run(struct kvm_vcpu *vcpu)
5286 {
5287         int r;
5288         struct kvm *kvm = vcpu->kvm;
5289
5290         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5291                 pr_debug("vcpu %d received sipi with vector # %x\n",
5292                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5293                 kvm_lapic_reset(vcpu);
5294                 r = kvm_arch_vcpu_reset(vcpu);
5295                 if (r)
5296                         return r;
5297                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5298         }
5299
5300         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5301         vapic_enter(vcpu);
5302
5303         r = 1;
5304         while (r > 0) {
5305                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5306                     !vcpu->arch.apf.halted)
5307                         r = vcpu_enter_guest(vcpu);
5308                 else {
5309                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5310                         kvm_vcpu_block(vcpu);
5311                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5312                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5313                         {
5314                                 switch(vcpu->arch.mp_state) {
5315                                 case KVM_MP_STATE_HALTED:
5316                                         vcpu->arch.mp_state =
5317                                                 KVM_MP_STATE_RUNNABLE;
5318                                 case KVM_MP_STATE_RUNNABLE:
5319                                         vcpu->arch.apf.halted = false;
5320                                         break;
5321                                 case KVM_MP_STATE_SIPI_RECEIVED:
5322                                 default:
5323                                         r = -EINTR;
5324                                         break;
5325                                 }
5326                         }
5327                 }
5328
5329                 if (r <= 0)
5330                         break;
5331
5332                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5333                 if (kvm_cpu_has_pending_timer(vcpu))
5334                         kvm_inject_pending_timer_irqs(vcpu);
5335
5336                 if (dm_request_for_irq_injection(vcpu)) {
5337                         r = -EINTR;
5338                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5339                         ++vcpu->stat.request_irq_exits;
5340                 }
5341
5342                 kvm_check_async_pf_completion(vcpu);
5343
5344                 if (signal_pending(current)) {
5345                         r = -EINTR;
5346                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5347                         ++vcpu->stat.signal_exits;
5348                 }
5349                 if (need_resched()) {
5350                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5351                         kvm_resched(vcpu);
5352                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5353                 }
5354         }
5355
5356         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5357
5358         vapic_exit(vcpu);
5359
5360         return r;
5361 }
5362
5363 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5364 {
5365         int r;
5366         sigset_t sigsaved;
5367
5368         if (vcpu->sigset_active)
5369                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5370
5371         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5372                 kvm_vcpu_block(vcpu);
5373                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5374                 r = -EAGAIN;
5375                 goto out;
5376         }
5377
5378         /* re-sync apic's tpr */
5379         if (!irqchip_in_kernel(vcpu->kvm))
5380                 kvm_set_cr8(vcpu, kvm_run->cr8);
5381
5382         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5383                 if (vcpu->mmio_needed) {
5384                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5385                         vcpu->mmio_read_completed = 1;
5386                         vcpu->mmio_needed = 0;
5387                 }
5388                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5389                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5390                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5391                 if (r != EMULATE_DONE) {
5392                         r = 0;
5393                         goto out;
5394                 }
5395         }
5396         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5397                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5398                                      kvm_run->hypercall.ret);
5399
5400         r = __vcpu_run(vcpu);
5401
5402 out:
5403         post_kvm_run_save(vcpu);
5404         if (vcpu->sigset_active)
5405                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5406
5407         return r;
5408 }
5409
5410 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5411 {
5412         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5413         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5414         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5415         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5416         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5417         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5418         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5419         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5420 #ifdef CONFIG_X86_64
5421         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5422         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5423         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5424         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5425         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5426         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5427         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5428         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5429 #endif
5430
5431         regs->rip = kvm_rip_read(vcpu);
5432         regs->rflags = kvm_get_rflags(vcpu);
5433
5434         return 0;
5435 }
5436
5437 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5438 {
5439         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5440         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5441         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5442         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5443         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5444         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5445         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5446         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5447 #ifdef CONFIG_X86_64
5448         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5449         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5450         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5451         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5452         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5453         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5454         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5455         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5456 #endif
5457
5458         kvm_rip_write(vcpu, regs->rip);
5459         kvm_set_rflags(vcpu, regs->rflags);
5460
5461         vcpu->arch.exception.pending = false;
5462
5463         kvm_make_request(KVM_REQ_EVENT, vcpu);
5464
5465         return 0;
5466 }
5467
5468 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5469 {
5470         struct kvm_segment cs;
5471
5472         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5473         *db = cs.db;
5474         *l = cs.l;
5475 }
5476 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5477
5478 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5479                                   struct kvm_sregs *sregs)
5480 {
5481         struct desc_ptr dt;
5482
5483         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5484         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5485         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5486         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5487         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5488         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5489
5490         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5491         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5492
5493         kvm_x86_ops->get_idt(vcpu, &dt);
5494         sregs->idt.limit = dt.size;
5495         sregs->idt.base = dt.address;
5496         kvm_x86_ops->get_gdt(vcpu, &dt);
5497         sregs->gdt.limit = dt.size;
5498         sregs->gdt.base = dt.address;
5499
5500         sregs->cr0 = kvm_read_cr0(vcpu);
5501         sregs->cr2 = vcpu->arch.cr2;
5502         sregs->cr3 = vcpu->arch.cr3;
5503         sregs->cr4 = kvm_read_cr4(vcpu);
5504         sregs->cr8 = kvm_get_cr8(vcpu);
5505         sregs->efer = vcpu->arch.efer;
5506         sregs->apic_base = kvm_get_apic_base(vcpu);
5507
5508         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5509
5510         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5511                 set_bit(vcpu->arch.interrupt.nr,
5512                         (unsigned long *)sregs->interrupt_bitmap);
5513
5514         return 0;
5515 }
5516
5517 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5518                                     struct kvm_mp_state *mp_state)
5519 {
5520         mp_state->mp_state = vcpu->arch.mp_state;
5521         return 0;
5522 }
5523
5524 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5525                                     struct kvm_mp_state *mp_state)
5526 {
5527         vcpu->arch.mp_state = mp_state->mp_state;
5528         kvm_make_request(KVM_REQ_EVENT, vcpu);
5529         return 0;
5530 }
5531
5532 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5533                     bool has_error_code, u32 error_code)
5534 {
5535         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5536         int ret;
5537
5538         init_emulate_ctxt(vcpu);
5539
5540         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5541                                    tss_selector, reason, has_error_code,
5542                                    error_code);
5543
5544         if (ret)
5545                 return EMULATE_FAIL;
5546
5547         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5548         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5549         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5550         kvm_make_request(KVM_REQ_EVENT, vcpu);
5551         return EMULATE_DONE;
5552 }
5553 EXPORT_SYMBOL_GPL(kvm_task_switch);
5554
5555 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5556                                   struct kvm_sregs *sregs)
5557 {
5558         int mmu_reset_needed = 0;
5559         int pending_vec, max_bits;
5560         struct desc_ptr dt;
5561
5562         dt.size = sregs->idt.limit;
5563         dt.address = sregs->idt.base;
5564         kvm_x86_ops->set_idt(vcpu, &dt);
5565         dt.size = sregs->gdt.limit;
5566         dt.address = sregs->gdt.base;
5567         kvm_x86_ops->set_gdt(vcpu, &dt);
5568
5569         vcpu->arch.cr2 = sregs->cr2;
5570         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5571         vcpu->arch.cr3 = sregs->cr3;
5572
5573         kvm_set_cr8(vcpu, sregs->cr8);
5574
5575         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5576         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5577         kvm_set_apic_base(vcpu, sregs->apic_base);
5578
5579         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5580         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5581         vcpu->arch.cr0 = sregs->cr0;
5582
5583         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5584         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5585         if (sregs->cr4 & X86_CR4_OSXSAVE)
5586                 update_cpuid(vcpu);
5587         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5588                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5589                 mmu_reset_needed = 1;
5590         }
5591
5592         if (mmu_reset_needed)
5593                 kvm_mmu_reset_context(vcpu);
5594
5595         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5596         pending_vec = find_first_bit(
5597                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5598         if (pending_vec < max_bits) {
5599                 kvm_queue_interrupt(vcpu, pending_vec, false);
5600                 pr_debug("Set back pending irq %d\n", pending_vec);
5601                 if (irqchip_in_kernel(vcpu->kvm))
5602                         kvm_pic_clear_isr_ack(vcpu->kvm);
5603         }
5604
5605         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5606         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5607         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5608         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5609         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5610         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5611
5612         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5613         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5614
5615         update_cr8_intercept(vcpu);
5616
5617         /* Older userspace won't unhalt the vcpu on reset. */
5618         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5619             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5620             !is_protmode(vcpu))
5621                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5622
5623         kvm_make_request(KVM_REQ_EVENT, vcpu);
5624
5625         return 0;
5626 }
5627
5628 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5629                                         struct kvm_guest_debug *dbg)
5630 {
5631         unsigned long rflags;
5632         int i, r;
5633
5634         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5635                 r = -EBUSY;
5636                 if (vcpu->arch.exception.pending)
5637                         goto out;
5638                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5639                         kvm_queue_exception(vcpu, DB_VECTOR);
5640                 else
5641                         kvm_queue_exception(vcpu, BP_VECTOR);
5642         }
5643
5644         /*
5645          * Read rflags as long as potentially injected trace flags are still
5646          * filtered out.
5647          */
5648         rflags = kvm_get_rflags(vcpu);
5649
5650         vcpu->guest_debug = dbg->control;
5651         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5652                 vcpu->guest_debug = 0;
5653
5654         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5655                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5656                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5657                 vcpu->arch.switch_db_regs =
5658                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5659         } else {
5660                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5661                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5662                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5663         }
5664
5665         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5666                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5667                         get_segment_base(vcpu, VCPU_SREG_CS);
5668
5669         /*
5670          * Trigger an rflags update that will inject or remove the trace
5671          * flags.
5672          */
5673         kvm_set_rflags(vcpu, rflags);
5674
5675         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5676
5677         r = 0;
5678
5679 out:
5680
5681         return r;
5682 }
5683
5684 /*
5685  * Translate a guest virtual address to a guest physical address.
5686  */
5687 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5688                                     struct kvm_translation *tr)
5689 {
5690         unsigned long vaddr = tr->linear_address;
5691         gpa_t gpa;
5692         int idx;
5693
5694         idx = srcu_read_lock(&vcpu->kvm->srcu);
5695         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5696         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5697         tr->physical_address = gpa;
5698         tr->valid = gpa != UNMAPPED_GVA;
5699         tr->writeable = 1;
5700         tr->usermode = 0;
5701
5702         return 0;
5703 }
5704
5705 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5706 {
5707         struct i387_fxsave_struct *fxsave =
5708                         &vcpu->arch.guest_fpu.state->fxsave;
5709
5710         memcpy(fpu->fpr, fxsave->st_space, 128);
5711         fpu->fcw = fxsave->cwd;
5712         fpu->fsw = fxsave->swd;
5713         fpu->ftwx = fxsave->twd;
5714         fpu->last_opcode = fxsave->fop;
5715         fpu->last_ip = fxsave->rip;
5716         fpu->last_dp = fxsave->rdp;
5717         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5718
5719         return 0;
5720 }
5721
5722 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5723 {
5724         struct i387_fxsave_struct *fxsave =
5725                         &vcpu->arch.guest_fpu.state->fxsave;
5726
5727         memcpy(fxsave->st_space, fpu->fpr, 128);
5728         fxsave->cwd = fpu->fcw;
5729         fxsave->swd = fpu->fsw;
5730         fxsave->twd = fpu->ftwx;
5731         fxsave->fop = fpu->last_opcode;
5732         fxsave->rip = fpu->last_ip;
5733         fxsave->rdp = fpu->last_dp;
5734         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5735
5736         return 0;
5737 }
5738
5739 int fx_init(struct kvm_vcpu *vcpu)
5740 {
5741         int err;
5742
5743         err = fpu_alloc(&vcpu->arch.guest_fpu);
5744         if (err)
5745                 return err;
5746
5747         fpu_finit(&vcpu->arch.guest_fpu);
5748
5749         /*
5750          * Ensure guest xcr0 is valid for loading
5751          */
5752         vcpu->arch.xcr0 = XSTATE_FP;
5753
5754         vcpu->arch.cr0 |= X86_CR0_ET;
5755
5756         return 0;
5757 }
5758 EXPORT_SYMBOL_GPL(fx_init);
5759
5760 static void fx_free(struct kvm_vcpu *vcpu)
5761 {
5762         fpu_free(&vcpu->arch.guest_fpu);
5763 }
5764
5765 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5766 {
5767         if (vcpu->guest_fpu_loaded)
5768                 return;
5769
5770         /*
5771          * Restore all possible states in the guest,
5772          * and assume host would use all available bits.
5773          * Guest xcr0 would be loaded later.
5774          */
5775         kvm_put_guest_xcr0(vcpu);
5776         vcpu->guest_fpu_loaded = 1;
5777         unlazy_fpu(current);
5778         fpu_restore_checking(&vcpu->arch.guest_fpu);
5779         trace_kvm_fpu(1);
5780 }
5781
5782 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5783 {
5784         kvm_put_guest_xcr0(vcpu);
5785
5786         if (!vcpu->guest_fpu_loaded)
5787                 return;
5788
5789         vcpu->guest_fpu_loaded = 0;
5790         fpu_save_init(&vcpu->arch.guest_fpu);
5791         ++vcpu->stat.fpu_reload;
5792         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5793         trace_kvm_fpu(0);
5794 }
5795
5796 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5797 {
5798         if (vcpu->arch.time_page) {
5799                 kvm_release_page_dirty(vcpu->arch.time_page);
5800                 vcpu->arch.time_page = NULL;
5801         }
5802
5803         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5804         fx_free(vcpu);
5805         kvm_x86_ops->vcpu_free(vcpu);
5806 }
5807
5808 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5809                                                 unsigned int id)
5810 {
5811         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5812                 printk_once(KERN_WARNING
5813                 "kvm: SMP vm created on host with unstable TSC; "
5814                 "guest TSC will not be reliable\n");
5815         return kvm_x86_ops->vcpu_create(kvm, id);
5816 }
5817
5818 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5819 {
5820         int r;
5821
5822         vcpu->arch.mtrr_state.have_fixed = 1;
5823         vcpu_load(vcpu);
5824         r = kvm_arch_vcpu_reset(vcpu);
5825         if (r == 0)
5826                 r = kvm_mmu_setup(vcpu);
5827         vcpu_put(vcpu);
5828         if (r < 0)
5829                 goto free_vcpu;
5830
5831         return 0;
5832 free_vcpu:
5833         kvm_x86_ops->vcpu_free(vcpu);
5834         return r;
5835 }
5836
5837 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5838 {
5839         vcpu->arch.apf.msr_val = 0;
5840
5841         vcpu_load(vcpu);
5842         kvm_mmu_unload(vcpu);
5843         vcpu_put(vcpu);
5844
5845         fx_free(vcpu);
5846         kvm_x86_ops->vcpu_free(vcpu);
5847 }
5848
5849 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5850 {
5851         vcpu->arch.nmi_pending = false;
5852         vcpu->arch.nmi_injected = false;
5853
5854         vcpu->arch.switch_db_regs = 0;
5855         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5856         vcpu->arch.dr6 = DR6_FIXED_1;
5857         vcpu->arch.dr7 = DR7_FIXED_1;
5858
5859         kvm_make_request(KVM_REQ_EVENT, vcpu);
5860         vcpu->arch.apf.msr_val = 0;
5861
5862         kvm_clear_async_pf_completion_queue(vcpu);
5863         kvm_async_pf_hash_reset(vcpu);
5864         vcpu->arch.apf.halted = false;
5865
5866         return kvm_x86_ops->vcpu_reset(vcpu);
5867 }
5868
5869 int kvm_arch_hardware_enable(void *garbage)
5870 {
5871         struct kvm *kvm;
5872         struct kvm_vcpu *vcpu;
5873         int i;
5874
5875         kvm_shared_msr_cpu_online();
5876         list_for_each_entry(kvm, &vm_list, vm_list)
5877                 kvm_for_each_vcpu(i, vcpu, kvm)
5878                         if (vcpu->cpu == smp_processor_id())
5879                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5880         return kvm_x86_ops->hardware_enable(garbage);
5881 }
5882
5883 void kvm_arch_hardware_disable(void *garbage)
5884 {
5885         kvm_x86_ops->hardware_disable(garbage);
5886         drop_user_return_notifiers(garbage);
5887 }
5888
5889 int kvm_arch_hardware_setup(void)
5890 {
5891         return kvm_x86_ops->hardware_setup();
5892 }
5893
5894 void kvm_arch_hardware_unsetup(void)
5895 {
5896         kvm_x86_ops->hardware_unsetup();
5897 }
5898
5899 void kvm_arch_check_processor_compat(void *rtn)
5900 {
5901         kvm_x86_ops->check_processor_compatibility(rtn);
5902 }
5903
5904 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5905 {
5906         struct page *page;
5907         struct kvm *kvm;
5908         int r;
5909
5910         BUG_ON(vcpu->kvm == NULL);
5911         kvm = vcpu->kvm;
5912
5913         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5914         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5915         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5916         vcpu->arch.mmu.translate_gpa = translate_gpa;
5917         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5918         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5919                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5920         else
5921                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5922
5923         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5924         if (!page) {
5925                 r = -ENOMEM;
5926                 goto fail;
5927         }
5928         vcpu->arch.pio_data = page_address(page);
5929
5930         if (!kvm->arch.virtual_tsc_khz)
5931                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5932
5933         r = kvm_mmu_create(vcpu);
5934         if (r < 0)
5935                 goto fail_free_pio_data;
5936
5937         if (irqchip_in_kernel(kvm)) {
5938                 r = kvm_create_lapic(vcpu);
5939                 if (r < 0)
5940                         goto fail_mmu_destroy;
5941         }
5942
5943         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5944                                        GFP_KERNEL);
5945         if (!vcpu->arch.mce_banks) {
5946                 r = -ENOMEM;
5947                 goto fail_free_lapic;
5948         }
5949         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5950
5951         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5952                 goto fail_free_mce_banks;
5953
5954         kvm_async_pf_hash_reset(vcpu);
5955
5956         return 0;
5957 fail_free_mce_banks:
5958         kfree(vcpu->arch.mce_banks);
5959 fail_free_lapic:
5960         kvm_free_lapic(vcpu);
5961 fail_mmu_destroy:
5962         kvm_mmu_destroy(vcpu);
5963 fail_free_pio_data:
5964         free_page((unsigned long)vcpu->arch.pio_data);
5965 fail:
5966         return r;
5967 }
5968
5969 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5970 {
5971         int idx;
5972
5973         kfree(vcpu->arch.mce_banks);
5974         kvm_free_lapic(vcpu);
5975         idx = srcu_read_lock(&vcpu->kvm->srcu);
5976         kvm_mmu_destroy(vcpu);
5977         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5978         free_page((unsigned long)vcpu->arch.pio_data);
5979 }
5980
5981 int kvm_arch_init_vm(struct kvm *kvm)
5982 {
5983         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5984         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5985
5986         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5987         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5988
5989         spin_lock_init(&kvm->arch.tsc_write_lock);
5990
5991         return 0;
5992 }
5993
5994 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5995 {
5996         vcpu_load(vcpu);
5997         kvm_mmu_unload(vcpu);
5998         vcpu_put(vcpu);
5999 }
6000
6001 static void kvm_free_vcpus(struct kvm *kvm)
6002 {
6003         unsigned int i;
6004         struct kvm_vcpu *vcpu;
6005
6006         /*
6007          * Unpin any mmu pages first.
6008          */
6009         kvm_for_each_vcpu(i, vcpu, kvm) {
6010                 kvm_clear_async_pf_completion_queue(vcpu);
6011                 kvm_unload_vcpu_mmu(vcpu);
6012         }
6013         kvm_for_each_vcpu(i, vcpu, kvm)
6014                 kvm_arch_vcpu_free(vcpu);
6015
6016         mutex_lock(&kvm->lock);
6017         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6018                 kvm->vcpus[i] = NULL;
6019
6020         atomic_set(&kvm->online_vcpus, 0);
6021         mutex_unlock(&kvm->lock);
6022 }
6023
6024 void kvm_arch_sync_events(struct kvm *kvm)
6025 {
6026         kvm_free_all_assigned_devices(kvm);
6027         kvm_free_pit(kvm);
6028 }
6029
6030 void kvm_arch_destroy_vm(struct kvm *kvm)
6031 {
6032         kvm_iommu_unmap_guest(kvm);
6033         kfree(kvm->arch.vpic);
6034         kfree(kvm->arch.vioapic);
6035         kvm_free_vcpus(kvm);
6036         if (kvm->arch.apic_access_page)
6037                 put_page(kvm->arch.apic_access_page);
6038         if (kvm->arch.ept_identity_pagetable)
6039                 put_page(kvm->arch.ept_identity_pagetable);
6040 }
6041
6042 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6043                                 struct kvm_memory_slot *memslot,
6044                                 struct kvm_memory_slot old,
6045                                 struct kvm_userspace_memory_region *mem,
6046                                 int user_alloc)
6047 {
6048         int npages = memslot->npages;
6049         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6050
6051         /* Prevent internal slot pages from being moved by fork()/COW. */
6052         if (memslot->id >= KVM_MEMORY_SLOTS)
6053                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6054
6055         /*To keep backward compatibility with older userspace,
6056          *x86 needs to hanlde !user_alloc case.
6057          */
6058         if (!user_alloc) {
6059                 if (npages && !old.rmap) {
6060                         unsigned long userspace_addr;
6061
6062                         down_write(&current->mm->mmap_sem);
6063                         userspace_addr = do_mmap(NULL, 0,
6064                                                  npages * PAGE_SIZE,
6065                                                  PROT_READ | PROT_WRITE,
6066                                                  map_flags,
6067                                                  0);
6068                         up_write(&current->mm->mmap_sem);
6069
6070                         if (IS_ERR((void *)userspace_addr))
6071                                 return PTR_ERR((void *)userspace_addr);
6072
6073                         memslot->userspace_addr = userspace_addr;
6074                 }
6075         }
6076
6077
6078         return 0;
6079 }
6080
6081 void kvm_arch_commit_memory_region(struct kvm *kvm,
6082                                 struct kvm_userspace_memory_region *mem,
6083                                 struct kvm_memory_slot old,
6084                                 int user_alloc)
6085 {
6086
6087         int npages = mem->memory_size >> PAGE_SHIFT;
6088
6089         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6090                 int ret;
6091
6092                 down_write(&current->mm->mmap_sem);
6093                 ret = do_munmap(current->mm, old.userspace_addr,
6094                                 old.npages * PAGE_SIZE);
6095                 up_write(&current->mm->mmap_sem);
6096                 if (ret < 0)
6097                         printk(KERN_WARNING
6098                                "kvm_vm_ioctl_set_memory_region: "
6099                                "failed to munmap memory\n");
6100         }
6101
6102         spin_lock(&kvm->mmu_lock);
6103         if (!kvm->arch.n_requested_mmu_pages) {
6104                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6105                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6106         }
6107
6108         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6109         spin_unlock(&kvm->mmu_lock);
6110 }
6111
6112 void kvm_arch_flush_shadow(struct kvm *kvm)
6113 {
6114         kvm_mmu_zap_all(kvm);
6115         kvm_reload_remote_mmus(kvm);
6116 }
6117
6118 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6119 {
6120         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6121                 !vcpu->arch.apf.halted)
6122                 || !list_empty_careful(&vcpu->async_pf.done)
6123                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6124                 || vcpu->arch.nmi_pending ||
6125                 (kvm_arch_interrupt_allowed(vcpu) &&
6126                  kvm_cpu_has_interrupt(vcpu));
6127 }
6128
6129 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6130 {
6131         int me;
6132         int cpu = vcpu->cpu;
6133
6134         if (waitqueue_active(&vcpu->wq)) {
6135                 wake_up_interruptible(&vcpu->wq);
6136                 ++vcpu->stat.halt_wakeup;
6137         }
6138
6139         me = get_cpu();
6140         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6141                 if (atomic_xchg(&vcpu->guest_mode, 0))
6142                         smp_send_reschedule(cpu);
6143         put_cpu();
6144 }
6145
6146 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6147 {
6148         return kvm_x86_ops->interrupt_allowed(vcpu);
6149 }
6150
6151 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6152 {
6153         unsigned long current_rip = kvm_rip_read(vcpu) +
6154                 get_segment_base(vcpu, VCPU_SREG_CS);
6155
6156         return current_rip == linear_rip;
6157 }
6158 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6159
6160 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6161 {
6162         unsigned long rflags;
6163
6164         rflags = kvm_x86_ops->get_rflags(vcpu);
6165         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6166                 rflags &= ~X86_EFLAGS_TF;
6167         return rflags;
6168 }
6169 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6170
6171 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6172 {
6173         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6174             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6175                 rflags |= X86_EFLAGS_TF;
6176         kvm_x86_ops->set_rflags(vcpu, rflags);
6177         kvm_make_request(KVM_REQ_EVENT, vcpu);
6178 }
6179 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6180
6181 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6182 {
6183         int r;
6184
6185         if (!vcpu->arch.mmu.direct_map || !work->arch.direct_map ||
6186               is_error_page(work->page))
6187                 return;
6188
6189         r = kvm_mmu_reload(vcpu);
6190         if (unlikely(r))
6191                 return;
6192
6193         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6194 }
6195
6196 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6197 {
6198         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6199 }
6200
6201 static inline u32 kvm_async_pf_next_probe(u32 key)
6202 {
6203         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6204 }
6205
6206 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6207 {
6208         u32 key = kvm_async_pf_hash_fn(gfn);
6209
6210         while (vcpu->arch.apf.gfns[key] != ~0)
6211                 key = kvm_async_pf_next_probe(key);
6212
6213         vcpu->arch.apf.gfns[key] = gfn;
6214 }
6215
6216 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6217 {
6218         int i;
6219         u32 key = kvm_async_pf_hash_fn(gfn);
6220
6221         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6222                      (vcpu->arch.apf.gfns[key] != gfn &&
6223                       vcpu->arch.apf.gfns[key] != ~0); i++)
6224                 key = kvm_async_pf_next_probe(key);
6225
6226         return key;
6227 }
6228
6229 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6230 {
6231         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6232 }
6233
6234 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6235 {
6236         u32 i, j, k;
6237
6238         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6239         while (true) {
6240                 vcpu->arch.apf.gfns[i] = ~0;
6241                 do {
6242                         j = kvm_async_pf_next_probe(j);
6243                         if (vcpu->arch.apf.gfns[j] == ~0)
6244                                 return;
6245                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6246                         /*
6247                          * k lies cyclically in ]i,j]
6248                          * |    i.k.j |
6249                          * |....j i.k.| or  |.k..j i...|
6250                          */
6251                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6252                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6253                 i = j;
6254         }
6255 }
6256
6257 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6258 {
6259
6260         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6261                                       sizeof(val));
6262 }
6263
6264 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6265                                      struct kvm_async_pf *work)
6266 {
6267         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6268         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6269
6270         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6271             (vcpu->arch.apf.send_user_only &&
6272              kvm_x86_ops->get_cpl(vcpu) == 0))
6273                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6274         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6275                 vcpu->arch.fault.error_code = 0;
6276                 vcpu->arch.fault.address = work->arch.token;
6277                 kvm_inject_page_fault(vcpu);
6278         }
6279 }
6280
6281 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6282                                  struct kvm_async_pf *work)
6283 {
6284         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6285         if (is_error_page(work->page))
6286                 work->arch.token = ~0; /* broadcast wakeup */
6287         else
6288                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6289
6290         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6291             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6292                 vcpu->arch.fault.error_code = 0;
6293                 vcpu->arch.fault.address = work->arch.token;
6294                 kvm_inject_page_fault(vcpu);
6295         }
6296         vcpu->arch.apf.halted = false;
6297 }
6298
6299 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6300 {
6301         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6302                 return true;
6303         else
6304                 return !kvm_event_needs_reinjection(vcpu) &&
6305                         kvm_x86_ops->interrupt_allowed(vcpu);
6306 }
6307
6308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6309 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6310 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6311 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6312 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6313 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6314 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6315 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6316 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6317 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6318 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6319 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);