ath9k: use split rx buffers to get rid of order-1 skb allocations
[linux-flexiantxendom0-natty.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2  * Copyright (c) 2008-2009 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/nl80211.h>
18 #include "ath9k.h"
19 #include "btcoex.h"
20
21 static void ath_update_txpow(struct ath_softc *sc)
22 {
23         struct ath_hw *ah = sc->sc_ah;
24
25         if (sc->curtxpow != sc->config.txpowlimit) {
26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27                 /* read back in case value is clamped */
28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
29         }
30 }
31
32 static u8 parse_mpdudensity(u8 mpdudensity)
33 {
34         /*
35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36          *   0 for no restriction
37          *   1 for 1/4 us
38          *   2 for 1/2 us
39          *   3 for 1 us
40          *   4 for 2 us
41          *   5 for 4 us
42          *   6 for 8 us
43          *   7 for 16 us
44          */
45         switch (mpdudensity) {
46         case 0:
47                 return 0;
48         case 1:
49         case 2:
50         case 3:
51                 /* Our lower layer calculations limit our precision to
52                    1 microsecond */
53                 return 1;
54         case 4:
55                 return 2;
56         case 5:
57                 return 4;
58         case 6:
59                 return 8;
60         case 7:
61                 return 16;
62         default:
63                 return 0;
64         }
65 }
66
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68                                                 struct ieee80211_hw *hw)
69 {
70         struct ieee80211_channel *curchan = hw->conf.channel;
71         struct ath9k_channel *channel;
72         u8 chan_idx;
73
74         chan_idx = curchan->hw_value;
75         channel = &sc->sc_ah->channels[chan_idx];
76         ath9k_update_ichannel(sc, hw, channel);
77         return channel;
78 }
79
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
81 {
82         unsigned long flags;
83         bool ret;
84
85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
88
89         return ret;
90 }
91
92 void ath9k_ps_wakeup(struct ath_softc *sc)
93 {
94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
95         unsigned long flags;
96         enum ath9k_power_mode power_mode;
97
98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
99         if (++sc->ps_usecount != 1)
100                 goto unlock;
101
102         power_mode = sc->sc_ah->power_mode;
103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
104
105         /*
106          * While the hardware is asleep, the cycle counters contain no
107          * useful data. Better clear them now so that they don't mess up
108          * survey data results.
109          */
110         if (power_mode != ATH9K_PM_AWAKE) {
111                 spin_lock(&common->cc_lock);
112                 ath_hw_cycle_counters_update(common);
113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114                 spin_unlock(&common->cc_lock);
115         }
116
117  unlock:
118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
119 }
120
121 void ath9k_ps_restore(struct ath_softc *sc)
122 {
123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
124         unsigned long flags;
125
126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
127         if (--sc->ps_usecount != 0)
128                 goto unlock;
129
130         spin_lock(&common->cc_lock);
131         ath_hw_cycle_counters_update(common);
132         spin_unlock(&common->cc_lock);
133
134         if (sc->ps_idle)
135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136         else if (sc->ps_enabled &&
137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
138                               PS_WAIT_FOR_CAB |
139                               PS_WAIT_FOR_PSPOLL_DATA |
140                               PS_WAIT_FOR_TX_ACK)))
141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
142
143  unlock:
144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
145 }
146
147 static void ath_start_ani(struct ath_common *common)
148 {
149         struct ath_hw *ah = common->ah;
150         unsigned long timestamp = jiffies_to_msecs(jiffies);
151         struct ath_softc *sc = (struct ath_softc *) common->priv;
152
153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
154                 return;
155
156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
157                 return;
158
159         common->ani.longcal_timer = timestamp;
160         common->ani.shortcal_timer = timestamp;
161         common->ani.checkani_timer = timestamp;
162
163         mod_timer(&common->ani.timer,
164                   jiffies +
165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
166 }
167
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
169 {
170         struct ath_hw *ah = sc->sc_ah;
171         struct ath9k_channel *chan = &ah->channels[channel];
172         struct survey_info *survey = &sc->survey[channel];
173
174         if (chan->noisefloor) {
175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
176                 survey->noise = chan->noisefloor;
177         }
178 }
179
180 static void ath_update_survey_stats(struct ath_softc *sc)
181 {
182         struct ath_hw *ah = sc->sc_ah;
183         struct ath_common *common = ath9k_hw_common(ah);
184         int pos = ah->curchan - &ah->channels[0];
185         struct survey_info *survey = &sc->survey[pos];
186         struct ath_cycle_counters *cc = &common->cc_survey;
187         unsigned int div = common->clockrate * 1000;
188
189         if (!ah->curchan)
190                 return;
191
192         if (ah->power_mode == ATH9K_PM_AWAKE)
193                 ath_hw_cycle_counters_update(common);
194
195         if (cc->cycles > 0) {
196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
198                         SURVEY_INFO_CHANNEL_TIME_RX |
199                         SURVEY_INFO_CHANNEL_TIME_TX;
200                 survey->channel_time += cc->cycles / div;
201                 survey->channel_time_busy += cc->rx_busy / div;
202                 survey->channel_time_rx += cc->rx_frame / div;
203                 survey->channel_time_tx += cc->tx_frame / div;
204         }
205         memset(cc, 0, sizeof(*cc));
206
207         ath_update_survey_nf(sc, pos);
208 }
209
210 /*
211  * Set/change channels.  If the channel is really being changed, it's done
212  * by reseting the chip.  To accomplish this we must first cleanup any pending
213  * DMA, then restart stuff.
214 */
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216                     struct ath9k_channel *hchan)
217 {
218         struct ath_wiphy *aphy = hw->priv;
219         struct ath_hw *ah = sc->sc_ah;
220         struct ath_common *common = ath9k_hw_common(ah);
221         struct ieee80211_conf *conf = &common->hw->conf;
222         bool fastcc = true, stopped;
223         struct ieee80211_channel *channel = hw->conf.channel;
224         struct ath9k_hw_cal_data *caldata = NULL;
225         int r;
226
227         if (sc->sc_flags & SC_OP_INVALID)
228                 return -EIO;
229
230         del_timer_sync(&common->ani.timer);
231         cancel_work_sync(&sc->paprd_work);
232         cancel_work_sync(&sc->hw_check_work);
233         cancel_delayed_work_sync(&sc->tx_complete_work);
234
235         ath9k_ps_wakeup(sc);
236
237         spin_lock_bh(&sc->sc_pcu_lock);
238
239         /*
240          * This is only performed if the channel settings have
241          * actually changed.
242          *
243          * To switch channels clear any pending DMA operations;
244          * wait long enough for the RX fifo to drain, reset the
245          * hardware at the new frequency, and then re-enable
246          * the relevant bits of the h/w.
247          */
248         ath9k_hw_disable_interrupts(ah);
249         stopped = ath_drain_all_txq(sc, false);
250
251         if (!ath_stoprecv(sc))
252                 stopped = false;
253
254         /* XXX: do not flush receive queue here. We don't want
255          * to flush data frames already in queue because of
256          * changing channel. */
257
258         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
259                 fastcc = false;
260
261         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
262                 caldata = &aphy->caldata;
263
264         ath_dbg(common, ATH_DBG_CONFIG,
265                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
266                 sc->sc_ah->curchan->channel,
267                 channel->center_freq, conf_is_ht40(conf),
268                 fastcc);
269
270         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
271         if (r) {
272                 ath_err(common,
273                         "Unable to reset channel (%u MHz), reset status %d\n",
274                         channel->center_freq, r);
275                 goto ps_restore;
276         }
277
278         if (ath_startrecv(sc) != 0) {
279                 ath_err(common, "Unable to restart recv logic\n");
280                 r = -EIO;
281                 goto ps_restore;
282         }
283
284         ath_update_txpow(sc);
285         ath9k_hw_set_interrupts(ah, ah->imask);
286
287         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
288                 if (sc->sc_flags & SC_OP_BEACONS)
289                         ath_beacon_config(sc, NULL);
290                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
291                 ath_start_ani(common);
292         }
293
294  ps_restore:
295         spin_unlock_bh(&sc->sc_pcu_lock);
296
297         ath9k_ps_restore(sc);
298         return r;
299 }
300
301 static void ath_paprd_activate(struct ath_softc *sc)
302 {
303         struct ath_hw *ah = sc->sc_ah;
304         struct ath9k_hw_cal_data *caldata = ah->caldata;
305         struct ath_common *common = ath9k_hw_common(ah);
306         int chain;
307
308         if (!caldata || !caldata->paprd_done)
309                 return;
310
311         ath9k_ps_wakeup(sc);
312         ar9003_paprd_enable(ah, false);
313         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
314                 if (!(common->tx_chainmask & BIT(chain)))
315                         continue;
316
317                 ar9003_paprd_populate_single_table(ah, caldata, chain);
318         }
319
320         ar9003_paprd_enable(ah, true);
321         ath9k_ps_restore(sc);
322 }
323
324 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
325 {
326         struct ieee80211_hw *hw = sc->hw;
327         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
328         struct ath_hw *ah = sc->sc_ah;
329         struct ath_common *common = ath9k_hw_common(ah);
330         struct ath_tx_control txctl;
331         int time_left;
332
333         memset(&txctl, 0, sizeof(txctl));
334         txctl.txq = sc->tx.txq_map[WME_AC_BE];
335
336         memset(tx_info, 0, sizeof(*tx_info));
337         tx_info->band = hw->conf.channel->band;
338         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
339         tx_info->control.rates[0].idx = 0;
340         tx_info->control.rates[0].count = 1;
341         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
342         tx_info->control.rates[1].idx = -1;
343
344         init_completion(&sc->paprd_complete);
345         txctl.paprd = BIT(chain);
346
347         if (ath_tx_start(hw, skb, &txctl) != 0) {
348                 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
349                 dev_kfree_skb_any(skb);
350                 return false;
351         }
352
353         time_left = wait_for_completion_timeout(&sc->paprd_complete,
354                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
355
356         if (!time_left)
357                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
358                         "Timeout waiting for paprd training on TX chain %d\n",
359                         chain);
360
361         return !!time_left;
362 }
363
364 void ath_paprd_calibrate(struct work_struct *work)
365 {
366         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
367         struct ieee80211_hw *hw = sc->hw;
368         struct ath_hw *ah = sc->sc_ah;
369         struct ieee80211_hdr *hdr;
370         struct sk_buff *skb = NULL;
371         struct ath9k_hw_cal_data *caldata = ah->caldata;
372         struct ath_common *common = ath9k_hw_common(ah);
373         int ftype;
374         int chain_ok = 0;
375         int chain;
376         int len = 1800;
377
378         if (!caldata)
379                 return;
380
381         if (ar9003_paprd_init_table(ah) < 0)
382                 return;
383
384         skb = alloc_skb(len, GFP_KERNEL);
385         if (!skb)
386                 return;
387
388         skb_put(skb, len);
389         memset(skb->data, 0, len);
390         hdr = (struct ieee80211_hdr *)skb->data;
391         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
392         hdr->frame_control = cpu_to_le16(ftype);
393         hdr->duration_id = cpu_to_le16(10);
394         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
395         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
396         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
397
398         ath9k_ps_wakeup(sc);
399         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
400                 if (!(common->tx_chainmask & BIT(chain)))
401                         continue;
402
403                 chain_ok = 0;
404
405                 ath_dbg(common, ATH_DBG_CALIBRATE,
406                         "Sending PAPRD frame for thermal measurement "
407                         "on chain %d\n", chain);
408                 if (!ath_paprd_send_frame(sc, skb, chain))
409                         goto fail_paprd;
410
411                 ar9003_paprd_setup_gain_table(ah, chain);
412
413                 ath_dbg(common, ATH_DBG_CALIBRATE,
414                         "Sending PAPRD training frame on chain %d\n", chain);
415                 if (!ath_paprd_send_frame(sc, skb, chain))
416                         goto fail_paprd;
417
418                 if (!ar9003_paprd_is_done(ah))
419                         break;
420
421                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
422                         break;
423
424                 chain_ok = 1;
425         }
426         kfree_skb(skb);
427
428         if (chain_ok) {
429                 caldata->paprd_done = true;
430                 ath_paprd_activate(sc);
431         }
432
433 fail_paprd:
434         ath9k_ps_restore(sc);
435 }
436
437 /*
438  *  This routine performs the periodic noise floor calibration function
439  *  that is used to adjust and optimize the chip performance.  This
440  *  takes environmental changes (location, temperature) into account.
441  *  When the task is complete, it reschedules itself depending on the
442  *  appropriate interval that was calculated.
443  */
444 void ath_ani_calibrate(unsigned long data)
445 {
446         struct ath_softc *sc = (struct ath_softc *)data;
447         struct ath_hw *ah = sc->sc_ah;
448         struct ath_common *common = ath9k_hw_common(ah);
449         bool longcal = false;
450         bool shortcal = false;
451         bool aniflag = false;
452         unsigned int timestamp = jiffies_to_msecs(jiffies);
453         u32 cal_interval, short_cal_interval, long_cal_interval;
454         unsigned long flags;
455
456         if (ah->caldata && ah->caldata->nfcal_interference)
457                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
458         else
459                 long_cal_interval = ATH_LONG_CALINTERVAL;
460
461         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
462                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
463
464         /* Only calibrate if awake */
465         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
466                 goto set_timer;
467
468         ath9k_ps_wakeup(sc);
469
470         /* Long calibration runs independently of short calibration. */
471         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
472                 longcal = true;
473                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
474                 common->ani.longcal_timer = timestamp;
475         }
476
477         /* Short calibration applies only while caldone is false */
478         if (!common->ani.caldone) {
479                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
480                         shortcal = true;
481                         ath_dbg(common, ATH_DBG_ANI,
482                                 "shortcal @%lu\n", jiffies);
483                         common->ani.shortcal_timer = timestamp;
484                         common->ani.resetcal_timer = timestamp;
485                 }
486         } else {
487                 if ((timestamp - common->ani.resetcal_timer) >=
488                     ATH_RESTART_CALINTERVAL) {
489                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
490                         if (common->ani.caldone)
491                                 common->ani.resetcal_timer = timestamp;
492                 }
493         }
494
495         /* Verify whether we must check ANI */
496         if ((timestamp - common->ani.checkani_timer) >=
497              ah->config.ani_poll_interval) {
498                 aniflag = true;
499                 common->ani.checkani_timer = timestamp;
500         }
501
502         /* Skip all processing if there's nothing to do. */
503         if (longcal || shortcal || aniflag) {
504                 /* Call ANI routine if necessary */
505                 if (aniflag) {
506                         spin_lock_irqsave(&common->cc_lock, flags);
507                         ath9k_hw_ani_monitor(ah, ah->curchan);
508                         ath_update_survey_stats(sc);
509                         spin_unlock_irqrestore(&common->cc_lock, flags);
510                 }
511
512                 /* Perform calibration if necessary */
513                 if (longcal || shortcal) {
514                         common->ani.caldone =
515                                 ath9k_hw_calibrate(ah,
516                                                    ah->curchan,
517                                                    common->rx_chainmask,
518                                                    longcal);
519                 }
520         }
521
522         ath9k_ps_restore(sc);
523
524 set_timer:
525         /*
526         * Set timer interval based on previous results.
527         * The interval must be the shortest necessary to satisfy ANI,
528         * short calibration and long calibration.
529         */
530         cal_interval = ATH_LONG_CALINTERVAL;
531         if (sc->sc_ah->config.enable_ani)
532                 cal_interval = min(cal_interval,
533                                    (u32)ah->config.ani_poll_interval);
534         if (!common->ani.caldone)
535                 cal_interval = min(cal_interval, (u32)short_cal_interval);
536
537         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
538         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
539                 if (!ah->caldata->paprd_done)
540                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
541                 else if (!ah->paprd_table_write_done)
542                         ath_paprd_activate(sc);
543         }
544 }
545
546 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
547 {
548         struct ath_node *an;
549         struct ath_hw *ah = sc->sc_ah;
550         an = (struct ath_node *)sta->drv_priv;
551
552         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
553                 sc->sc_flags |= SC_OP_ENABLE_APM;
554
555         if (sc->sc_flags & SC_OP_TXAGGR) {
556                 ath_tx_node_init(sc, an);
557                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
558                                      sta->ht_cap.ampdu_factor);
559                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
560         }
561 }
562
563 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
564 {
565         struct ath_node *an = (struct ath_node *)sta->drv_priv;
566
567         if (sc->sc_flags & SC_OP_TXAGGR)
568                 ath_tx_node_cleanup(sc, an);
569 }
570
571 void ath_hw_check(struct work_struct *work)
572 {
573         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
574         int i;
575
576         ath9k_ps_wakeup(sc);
577
578         for (i = 0; i < 3; i++) {
579                 if (ath9k_hw_check_alive(sc->sc_ah))
580                         goto out;
581
582                 msleep(1);
583         }
584         ath_reset(sc, true);
585
586 out:
587         ath9k_ps_restore(sc);
588 }
589
590 void ath9k_tasklet(unsigned long data)
591 {
592         struct ath_softc *sc = (struct ath_softc *)data;
593         struct ath_hw *ah = sc->sc_ah;
594         struct ath_common *common = ath9k_hw_common(ah);
595
596         u32 status = sc->intrstatus;
597         u32 rxmask;
598
599         if (status & ATH9K_INT_FATAL) {
600                 ath_reset(sc, true);
601                 return;
602         }
603
604         ath9k_ps_wakeup(sc);
605         spin_lock(&sc->sc_pcu_lock);
606
607         if (!ath9k_hw_check_alive(ah))
608                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
609
610         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
611                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
612                           ATH9K_INT_RXORN);
613         else
614                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
615
616         if (status & rxmask) {
617                 /* Check for high priority Rx first */
618                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
619                     (status & ATH9K_INT_RXHP))
620                         ath_rx_tasklet(sc, 0, true);
621
622                 ath_rx_tasklet(sc, 0, false);
623         }
624
625         if (status & ATH9K_INT_TX) {
626                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
627                         ath_tx_edma_tasklet(sc);
628                 else
629                         ath_tx_tasklet(sc);
630         }
631
632         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
633                 /*
634                  * TSF sync does not look correct; remain awake to sync with
635                  * the next Beacon.
636                  */
637                 ath_dbg(common, ATH_DBG_PS,
638                         "TSFOOR - Sync with next Beacon\n");
639                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
640         }
641
642         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
643                 if (status & ATH9K_INT_GENTIMER)
644                         ath_gen_timer_isr(sc->sc_ah);
645
646         /* re-enable hardware interrupt */
647         ath9k_hw_enable_interrupts(ah);
648
649         spin_unlock(&sc->sc_pcu_lock);
650         ath9k_ps_restore(sc);
651 }
652
653 irqreturn_t ath_isr(int irq, void *dev)
654 {
655 #define SCHED_INTR (                            \
656                 ATH9K_INT_FATAL |               \
657                 ATH9K_INT_RXORN |               \
658                 ATH9K_INT_RXEOL |               \
659                 ATH9K_INT_RX |                  \
660                 ATH9K_INT_RXLP |                \
661                 ATH9K_INT_RXHP |                \
662                 ATH9K_INT_TX |                  \
663                 ATH9K_INT_BMISS |               \
664                 ATH9K_INT_CST |                 \
665                 ATH9K_INT_TSFOOR |              \
666                 ATH9K_INT_GENTIMER)
667
668         struct ath_softc *sc = dev;
669         struct ath_hw *ah = sc->sc_ah;
670         struct ath_common *common = ath9k_hw_common(ah);
671         enum ath9k_int status;
672         bool sched = false;
673
674         /*
675          * The hardware is not ready/present, don't
676          * touch anything. Note this can happen early
677          * on if the IRQ is shared.
678          */
679         if (sc->sc_flags & SC_OP_INVALID)
680                 return IRQ_NONE;
681
682
683         /* shared irq, not for us */
684
685         if (!ath9k_hw_intrpend(ah))
686                 return IRQ_NONE;
687
688         /*
689          * Figure out the reason(s) for the interrupt.  Note
690          * that the hal returns a pseudo-ISR that may include
691          * bits we haven't explicitly enabled so we mask the
692          * value to insure we only process bits we requested.
693          */
694         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
695         status &= ah->imask;    /* discard unasked-for bits */
696
697         /*
698          * If there are no status bits set, then this interrupt was not
699          * for me (should have been caught above).
700          */
701         if (!status)
702                 return IRQ_NONE;
703
704         /* Cache the status */
705         sc->intrstatus = status;
706
707         if (status & SCHED_INTR)
708                 sched = true;
709
710         /*
711          * If a FATAL or RXORN interrupt is received, we have to reset the
712          * chip immediately.
713          */
714         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
715             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
716                 goto chip_reset;
717
718         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
719             (status & ATH9K_INT_BB_WATCHDOG)) {
720
721                 spin_lock(&common->cc_lock);
722                 ath_hw_cycle_counters_update(common);
723                 ar9003_hw_bb_watchdog_dbg_info(ah);
724                 spin_unlock(&common->cc_lock);
725
726                 goto chip_reset;
727         }
728
729         if (status & ATH9K_INT_SWBA)
730                 tasklet_schedule(&sc->bcon_tasklet);
731
732         if (status & ATH9K_INT_TXURN)
733                 ath9k_hw_updatetxtriglevel(ah, true);
734
735         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
736                 if (status & ATH9K_INT_RXEOL) {
737                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
738                         ath9k_hw_set_interrupts(ah, ah->imask);
739                 }
740         }
741
742         if (status & ATH9K_INT_MIB) {
743                 /*
744                  * Disable interrupts until we service the MIB
745                  * interrupt; otherwise it will continue to
746                  * fire.
747                  */
748                 ath9k_hw_disable_interrupts(ah);
749                 /*
750                  * Let the hal handle the event. We assume
751                  * it will clear whatever condition caused
752                  * the interrupt.
753                  */
754                 spin_lock(&common->cc_lock);
755                 ath9k_hw_proc_mib_event(ah);
756                 spin_unlock(&common->cc_lock);
757                 ath9k_hw_enable_interrupts(ah);
758         }
759
760         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
761                 if (status & ATH9K_INT_TIM_TIMER) {
762                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
763                                 goto chip_reset;
764                         /* Clear RxAbort bit so that we can
765                          * receive frames */
766                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
767                         ath9k_hw_setrxabort(sc->sc_ah, 0);
768                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
769                 }
770
771 chip_reset:
772
773         ath_debug_stat_interrupt(sc, status);
774
775         if (sched) {
776                 /* turn off every interrupt */
777                 ath9k_hw_disable_interrupts(ah);
778                 tasklet_schedule(&sc->intr_tq);
779         }
780
781         return IRQ_HANDLED;
782
783 #undef SCHED_INTR
784 }
785
786 static u32 ath_get_extchanmode(struct ath_softc *sc,
787                                struct ieee80211_channel *chan,
788                                enum nl80211_channel_type channel_type)
789 {
790         u32 chanmode = 0;
791
792         switch (chan->band) {
793         case IEEE80211_BAND_2GHZ:
794                 switch(channel_type) {
795                 case NL80211_CHAN_NO_HT:
796                 case NL80211_CHAN_HT20:
797                         chanmode = CHANNEL_G_HT20;
798                         break;
799                 case NL80211_CHAN_HT40PLUS:
800                         chanmode = CHANNEL_G_HT40PLUS;
801                         break;
802                 case NL80211_CHAN_HT40MINUS:
803                         chanmode = CHANNEL_G_HT40MINUS;
804                         break;
805                 }
806                 break;
807         case IEEE80211_BAND_5GHZ:
808                 switch(channel_type) {
809                 case NL80211_CHAN_NO_HT:
810                 case NL80211_CHAN_HT20:
811                         chanmode = CHANNEL_A_HT20;
812                         break;
813                 case NL80211_CHAN_HT40PLUS:
814                         chanmode = CHANNEL_A_HT40PLUS;
815                         break;
816                 case NL80211_CHAN_HT40MINUS:
817                         chanmode = CHANNEL_A_HT40MINUS;
818                         break;
819                 }
820                 break;
821         default:
822                 break;
823         }
824
825         return chanmode;
826 }
827
828 static void ath9k_bss_assoc_info(struct ath_softc *sc,
829                                  struct ieee80211_hw *hw,
830                                  struct ieee80211_vif *vif,
831                                  struct ieee80211_bss_conf *bss_conf)
832 {
833         struct ath_wiphy *aphy = hw->priv;
834         struct ath_hw *ah = sc->sc_ah;
835         struct ath_common *common = ath9k_hw_common(ah);
836
837         if (bss_conf->assoc) {
838                 ath_dbg(common, ATH_DBG_CONFIG,
839                         "Bss Info ASSOC %d, bssid: %pM\n",
840                         bss_conf->aid, common->curbssid);
841
842                 /* New association, store aid */
843                 common->curaid = bss_conf->aid;
844                 ath9k_hw_write_associd(ah);
845
846                 /*
847                  * Request a re-configuration of Beacon related timers
848                  * on the receipt of the first Beacon frame (i.e.,
849                  * after time sync with the AP).
850                  */
851                 sc->ps_flags |= PS_BEACON_SYNC;
852
853                 /* Configure the beacon */
854                 ath_beacon_config(sc, vif);
855
856                 /* Reset rssi stats */
857                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
858                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
859
860                 sc->sc_flags |= SC_OP_ANI_RUN;
861                 ath_start_ani(common);
862         } else {
863                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
864                 common->curaid = 0;
865                 /* Stop ANI */
866                 sc->sc_flags &= ~SC_OP_ANI_RUN;
867                 del_timer_sync(&common->ani.timer);
868         }
869 }
870
871 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
872 {
873         struct ath_hw *ah = sc->sc_ah;
874         struct ath_common *common = ath9k_hw_common(ah);
875         struct ieee80211_channel *channel = hw->conf.channel;
876         int r;
877
878         ath9k_ps_wakeup(sc);
879         spin_lock_bh(&sc->sc_pcu_lock);
880
881         ath9k_hw_configpcipowersave(ah, 0, 0);
882
883         if (!ah->curchan)
884                 ah->curchan = ath_get_curchannel(sc, sc->hw);
885
886         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
887         if (r) {
888                 ath_err(common,
889                         "Unable to reset channel (%u MHz), reset status %d\n",
890                         channel->center_freq, r);
891         }
892
893         ath_update_txpow(sc);
894         if (ath_startrecv(sc) != 0) {
895                 ath_err(common, "Unable to restart recv logic\n");
896                 goto out;
897         }
898         if (sc->sc_flags & SC_OP_BEACONS)
899                 ath_beacon_config(sc, NULL);    /* restart beacons */
900
901         /* Re-Enable  interrupts */
902         ath9k_hw_set_interrupts(ah, ah->imask);
903
904         /* Enable LED */
905         ath9k_hw_cfg_output(ah, ah->led_pin,
906                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
907         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
908
909         ieee80211_wake_queues(hw);
910 out:
911         spin_unlock_bh(&sc->sc_pcu_lock);
912
913         ath9k_ps_restore(sc);
914 }
915
916 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
917 {
918         struct ath_hw *ah = sc->sc_ah;
919         struct ieee80211_channel *channel = hw->conf.channel;
920         int r;
921
922         ath9k_ps_wakeup(sc);
923         spin_lock_bh(&sc->sc_pcu_lock);
924
925         ieee80211_stop_queues(hw);
926
927         /*
928          * Keep the LED on when the radio is disabled
929          * during idle unassociated state.
930          */
931         if (!sc->ps_idle) {
932                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
933                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
934         }
935
936         /* Disable interrupts */
937         ath9k_hw_disable_interrupts(ah);
938
939         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
940
941         ath_stoprecv(sc);               /* turn off frame recv */
942         ath_flushrecv(sc);              /* flush recv queue */
943
944         if (!ah->curchan)
945                 ah->curchan = ath_get_curchannel(sc, hw);
946
947         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
948         if (r) {
949                 ath_err(ath9k_hw_common(sc->sc_ah),
950                         "Unable to reset channel (%u MHz), reset status %d\n",
951                         channel->center_freq, r);
952         }
953
954         ath9k_hw_phy_disable(ah);
955
956         ath9k_hw_configpcipowersave(ah, 1, 1);
957
958         spin_unlock_bh(&sc->sc_pcu_lock);
959         ath9k_ps_restore(sc);
960 }
961
962 int ath_reset(struct ath_softc *sc, bool retry_tx)
963 {
964         struct ath_hw *ah = sc->sc_ah;
965         struct ath_common *common = ath9k_hw_common(ah);
966         struct ieee80211_hw *hw = sc->hw;
967         int r;
968
969         /* Stop ANI */
970         del_timer_sync(&common->ani.timer);
971
972         ath9k_ps_wakeup(sc);
973         spin_lock_bh(&sc->sc_pcu_lock);
974
975         ieee80211_stop_queues(hw);
976
977         ath9k_hw_disable_interrupts(ah);
978         ath_drain_all_txq(sc, retry_tx);
979
980         ath_stoprecv(sc);
981         ath_flushrecv(sc);
982
983         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
984         if (r)
985                 ath_err(common,
986                         "Unable to reset hardware; reset status %d\n", r);
987
988         if (ath_startrecv(sc) != 0)
989                 ath_err(common, "Unable to start recv logic\n");
990
991         /*
992          * We may be doing a reset in response to a request
993          * that changes the channel so update any state that
994          * might change as a result.
995          */
996         ath_update_txpow(sc);
997
998         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
999                 ath_beacon_config(sc, NULL);    /* restart beacons */
1000
1001         ath9k_hw_set_interrupts(ah, ah->imask);
1002
1003         if (retry_tx) {
1004                 int i;
1005                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1006                         if (ATH_TXQ_SETUP(sc, i)) {
1007                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1008                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1009                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1010                         }
1011                 }
1012         }
1013
1014         ieee80211_wake_queues(hw);
1015         spin_unlock_bh(&sc->sc_pcu_lock);
1016
1017         /* Start ANI */
1018         ath_start_ani(common);
1019         ath9k_ps_restore(sc);
1020
1021         return r;
1022 }
1023
1024 /* XXX: Remove me once we don't depend on ath9k_channel for all
1025  * this redundant data */
1026 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1027                            struct ath9k_channel *ichan)
1028 {
1029         struct ieee80211_channel *chan = hw->conf.channel;
1030         struct ieee80211_conf *conf = &hw->conf;
1031
1032         ichan->channel = chan->center_freq;
1033         ichan->chan = chan;
1034
1035         if (chan->band == IEEE80211_BAND_2GHZ) {
1036                 ichan->chanmode = CHANNEL_G;
1037                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1038         } else {
1039                 ichan->chanmode = CHANNEL_A;
1040                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1041         }
1042
1043         if (conf_is_ht(conf))
1044                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1045                                             conf->channel_type);
1046 }
1047
1048 /**********************/
1049 /* mac80211 callbacks */
1050 /**********************/
1051
1052 static int ath9k_start(struct ieee80211_hw *hw)
1053 {
1054         struct ath_wiphy *aphy = hw->priv;
1055         struct ath_softc *sc = aphy->sc;
1056         struct ath_hw *ah = sc->sc_ah;
1057         struct ath_common *common = ath9k_hw_common(ah);
1058         struct ieee80211_channel *curchan = hw->conf.channel;
1059         struct ath9k_channel *init_channel;
1060         int r;
1061
1062         ath_dbg(common, ATH_DBG_CONFIG,
1063                 "Starting driver with initial channel: %d MHz\n",
1064                 curchan->center_freq);
1065
1066         ath9k_ps_wakeup(sc);
1067
1068         mutex_lock(&sc->mutex);
1069
1070         if (ath9k_wiphy_started(sc)) {
1071                 if (sc->chan_idx == curchan->hw_value) {
1072                         /*
1073                          * Already on the operational channel, the new wiphy
1074                          * can be marked active.
1075                          */
1076                         aphy->state = ATH_WIPHY_ACTIVE;
1077                         ieee80211_wake_queues(hw);
1078                 } else {
1079                         /*
1080                          * Another wiphy is on another channel, start the new
1081                          * wiphy in paused state.
1082                          */
1083                         aphy->state = ATH_WIPHY_PAUSED;
1084                         ieee80211_stop_queues(hw);
1085                 }
1086                 mutex_unlock(&sc->mutex);
1087                 return 0;
1088         }
1089         aphy->state = ATH_WIPHY_ACTIVE;
1090
1091         /* setup initial channel */
1092
1093         sc->chan_idx = curchan->hw_value;
1094
1095         init_channel = ath_get_curchannel(sc, hw);
1096
1097         /* Reset SERDES registers */
1098         ath9k_hw_configpcipowersave(ah, 0, 0);
1099
1100         /*
1101          * The basic interface to setting the hardware in a good
1102          * state is ``reset''.  On return the hardware is known to
1103          * be powered up and with interrupts disabled.  This must
1104          * be followed by initialization of the appropriate bits
1105          * and then setup of the interrupt mask.
1106          */
1107         spin_lock_bh(&sc->sc_pcu_lock);
1108         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1109         if (r) {
1110                 ath_err(common,
1111                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1112                         r, curchan->center_freq);
1113                 spin_unlock_bh(&sc->sc_pcu_lock);
1114                 goto mutex_unlock;
1115         }
1116
1117         /*
1118          * This is needed only to setup initial state
1119          * but it's best done after a reset.
1120          */
1121         ath_update_txpow(sc);
1122
1123         /*
1124          * Setup the hardware after reset:
1125          * The receive engine is set going.
1126          * Frame transmit is handled entirely
1127          * in the frame output path; there's nothing to do
1128          * here except setup the interrupt mask.
1129          */
1130         if (ath_startrecv(sc) != 0) {
1131                 ath_err(common, "Unable to start recv logic\n");
1132                 r = -EIO;
1133                 spin_unlock_bh(&sc->sc_pcu_lock);
1134                 goto mutex_unlock;
1135         }
1136         spin_unlock_bh(&sc->sc_pcu_lock);
1137
1138         /* Setup our intr mask. */
1139         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1140                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1141                     ATH9K_INT_GLOBAL;
1142
1143         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1144                 ah->imask |= ATH9K_INT_RXHP |
1145                              ATH9K_INT_RXLP |
1146                              ATH9K_INT_BB_WATCHDOG;
1147         else
1148                 ah->imask |= ATH9K_INT_RX;
1149
1150         ah->imask |= ATH9K_INT_GTT;
1151
1152         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1153                 ah->imask |= ATH9K_INT_CST;
1154
1155         sc->sc_flags &= ~SC_OP_INVALID;
1156         sc->sc_ah->is_monitoring = false;
1157
1158         /* Disable BMISS interrupt when we're not associated */
1159         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1160         ath9k_hw_set_interrupts(ah, ah->imask);
1161
1162         ieee80211_wake_queues(hw);
1163
1164         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1165
1166         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1167             !ah->btcoex_hw.enabled) {
1168                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1169                                            AR_STOMP_LOW_WLAN_WGHT);
1170                 ath9k_hw_btcoex_enable(ah);
1171
1172                 if (common->bus_ops->bt_coex_prep)
1173                         common->bus_ops->bt_coex_prep(common);
1174                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1175                         ath9k_btcoex_timer_resume(sc);
1176         }
1177
1178         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1179                 common->bus_ops->extn_synch_en(common);
1180
1181 mutex_unlock:
1182         mutex_unlock(&sc->mutex);
1183
1184         ath9k_ps_restore(sc);
1185
1186         return r;
1187 }
1188
1189 static int ath9k_tx(struct ieee80211_hw *hw,
1190                     struct sk_buff *skb)
1191 {
1192         struct ath_wiphy *aphy = hw->priv;
1193         struct ath_softc *sc = aphy->sc;
1194         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1195         struct ath_tx_control txctl;
1196         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1197
1198         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1199                 ath_dbg(common, ATH_DBG_XMIT,
1200                         "ath9k: %s: TX in unexpected wiphy state %d\n",
1201                         wiphy_name(hw->wiphy), aphy->state);
1202                 goto exit;
1203         }
1204
1205         if (sc->ps_enabled) {
1206                 /*
1207                  * mac80211 does not set PM field for normal data frames, so we
1208                  * need to update that based on the current PS mode.
1209                  */
1210                 if (ieee80211_is_data(hdr->frame_control) &&
1211                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1212                     !ieee80211_has_pm(hdr->frame_control)) {
1213                         ath_dbg(common, ATH_DBG_PS,
1214                                 "Add PM=1 for a TX frame while in PS mode\n");
1215                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1216                 }
1217         }
1218
1219         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1220                 /*
1221                  * We are using PS-Poll and mac80211 can request TX while in
1222                  * power save mode. Need to wake up hardware for the TX to be
1223                  * completed and if needed, also for RX of buffered frames.
1224                  */
1225                 ath9k_ps_wakeup(sc);
1226                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1227                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1228                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1229                         ath_dbg(common, ATH_DBG_PS,
1230                                 "Sending PS-Poll to pick a buffered frame\n");
1231                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1232                 } else {
1233                         ath_dbg(common, ATH_DBG_PS,
1234                                 "Wake up to complete TX\n");
1235                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1236                 }
1237                 /*
1238                  * The actual restore operation will happen only after
1239                  * the sc_flags bit is cleared. We are just dropping
1240                  * the ps_usecount here.
1241                  */
1242                 ath9k_ps_restore(sc);
1243         }
1244
1245         memset(&txctl, 0, sizeof(struct ath_tx_control));
1246         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1247
1248         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1249
1250         if (ath_tx_start(hw, skb, &txctl) != 0) {
1251                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1252                 goto exit;
1253         }
1254
1255         return 0;
1256 exit:
1257         dev_kfree_skb_any(skb);
1258         return 0;
1259 }
1260
1261 static void ath9k_stop(struct ieee80211_hw *hw)
1262 {
1263         struct ath_wiphy *aphy = hw->priv;
1264         struct ath_softc *sc = aphy->sc;
1265         struct ath_hw *ah = sc->sc_ah;
1266         struct ath_common *common = ath9k_hw_common(ah);
1267         int i;
1268
1269         mutex_lock(&sc->mutex);
1270
1271         aphy->state = ATH_WIPHY_INACTIVE;
1272
1273         if (led_blink)
1274                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1275
1276         cancel_delayed_work_sync(&sc->tx_complete_work);
1277         cancel_work_sync(&sc->paprd_work);
1278         cancel_work_sync(&sc->hw_check_work);
1279
1280         for (i = 0; i < sc->num_sec_wiphy; i++) {
1281                 if (sc->sec_wiphy[i])
1282                         break;
1283         }
1284
1285         if (i == sc->num_sec_wiphy) {
1286                 cancel_delayed_work_sync(&sc->wiphy_work);
1287                 cancel_work_sync(&sc->chan_work);
1288         }
1289
1290         if (sc->sc_flags & SC_OP_INVALID) {
1291                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1292                 mutex_unlock(&sc->mutex);
1293                 return;
1294         }
1295
1296         if (ath9k_wiphy_started(sc)) {
1297                 mutex_unlock(&sc->mutex);
1298                 return; /* another wiphy still in use */
1299         }
1300
1301         /* Ensure HW is awake when we try to shut it down. */
1302         ath9k_ps_wakeup(sc);
1303
1304         if (ah->btcoex_hw.enabled) {
1305                 ath9k_hw_btcoex_disable(ah);
1306                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1307                         ath9k_btcoex_timer_pause(sc);
1308         }
1309
1310         spin_lock_bh(&sc->sc_pcu_lock);
1311
1312         /* prevent tasklets to enable interrupts once we disable them */
1313         ah->imask &= ~ATH9K_INT_GLOBAL;
1314
1315         /* make sure h/w will not generate any interrupt
1316          * before setting the invalid flag. */
1317         ath9k_hw_disable_interrupts(ah);
1318
1319         if (!(sc->sc_flags & SC_OP_INVALID)) {
1320                 ath_drain_all_txq(sc, false);
1321                 ath_stoprecv(sc);
1322                 ath9k_hw_phy_disable(ah);
1323         } else
1324                 sc->rx.rxlink = NULL;
1325
1326         if (sc->rx.frag) {
1327                 dev_kfree_skb_any(sc->rx.frag);
1328                 sc->rx.frag = NULL;
1329         }
1330
1331         /* disable HAL and put h/w to sleep */
1332         ath9k_hw_disable(ah);
1333         ath9k_hw_configpcipowersave(ah, 1, 1);
1334
1335         spin_unlock_bh(&sc->sc_pcu_lock);
1336
1337         /* we can now sync irq and kill any running tasklets, since we already
1338          * disabled interrupts and not holding a spin lock */
1339         synchronize_irq(sc->irq);
1340         tasklet_kill(&sc->intr_tq);
1341         tasklet_kill(&sc->bcon_tasklet);
1342
1343         ath9k_ps_restore(sc);
1344
1345         sc->ps_idle = true;
1346         ath9k_set_wiphy_idle(aphy, true);
1347         ath_radio_disable(sc, hw);
1348
1349         sc->sc_flags |= SC_OP_INVALID;
1350
1351         mutex_unlock(&sc->mutex);
1352
1353         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1354 }
1355
1356 static int ath9k_add_interface(struct ieee80211_hw *hw,
1357                                struct ieee80211_vif *vif)
1358 {
1359         struct ath_wiphy *aphy = hw->priv;
1360         struct ath_softc *sc = aphy->sc;
1361         struct ath_hw *ah = sc->sc_ah;
1362         struct ath_common *common = ath9k_hw_common(ah);
1363         struct ath_vif *avp = (void *)vif->drv_priv;
1364         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1365         int ret = 0;
1366
1367         mutex_lock(&sc->mutex);
1368
1369         switch (vif->type) {
1370         case NL80211_IFTYPE_STATION:
1371                 ic_opmode = NL80211_IFTYPE_STATION;
1372                 break;
1373         case NL80211_IFTYPE_WDS:
1374                 ic_opmode = NL80211_IFTYPE_WDS;
1375                 break;
1376         case NL80211_IFTYPE_ADHOC:
1377         case NL80211_IFTYPE_AP:
1378         case NL80211_IFTYPE_MESH_POINT:
1379                 if (sc->nbcnvifs >= ATH_BCBUF) {
1380                         ret = -ENOBUFS;
1381                         goto out;
1382                 }
1383                 ic_opmode = vif->type;
1384                 break;
1385         default:
1386                 ath_err(common, "Interface type %d not yet supported\n",
1387                         vif->type);
1388                 ret = -EOPNOTSUPP;
1389                 goto out;
1390         }
1391
1392         ath_dbg(common, ATH_DBG_CONFIG,
1393                 "Attach a VIF of type: %d\n", ic_opmode);
1394
1395         /* Set the VIF opmode */
1396         avp->av_opmode = ic_opmode;
1397         avp->av_bslot = -1;
1398
1399         sc->nvifs++;
1400
1401         ath9k_set_bssid_mask(hw, vif);
1402
1403         if (sc->nvifs > 1)
1404                 goto out; /* skip global settings for secondary vif */
1405
1406         if (ic_opmode == NL80211_IFTYPE_AP) {
1407                 ath9k_hw_set_tsfadjust(ah, 1);
1408                 sc->sc_flags |= SC_OP_TSF_RESET;
1409         }
1410
1411         /* Set the device opmode */
1412         ah->opmode = ic_opmode;
1413
1414         /*
1415          * Enable MIB interrupts when there are hardware phy counters.
1416          * Note we only do this (at the moment) for station mode.
1417          */
1418         if ((vif->type == NL80211_IFTYPE_STATION) ||
1419             (vif->type == NL80211_IFTYPE_ADHOC) ||
1420             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1421                 if (ah->config.enable_ani)
1422                         ah->imask |= ATH9K_INT_MIB;
1423                 ah->imask |= ATH9K_INT_TSFOOR;
1424         }
1425
1426         ath9k_hw_set_interrupts(ah, ah->imask);
1427
1428         if (vif->type == NL80211_IFTYPE_AP    ||
1429             vif->type == NL80211_IFTYPE_ADHOC) {
1430                 sc->sc_flags |= SC_OP_ANI_RUN;
1431                 ath_start_ani(common);
1432         }
1433
1434 out:
1435         mutex_unlock(&sc->mutex);
1436         return ret;
1437 }
1438
1439 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1440                                  struct ieee80211_vif *vif)
1441 {
1442         struct ath_vif *avp = (void *)vif->drv_priv;
1443
1444         /* Disable SWBA interrupt */
1445         sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1446         ath9k_ps_wakeup(sc);
1447         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1448         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1449         tasklet_kill(&sc->bcon_tasklet);
1450         ath9k_ps_restore(sc);
1451
1452         ath_beacon_return(sc, avp);
1453         sc->sc_flags &= ~SC_OP_BEACONS;
1454
1455         if (sc->nbcnvifs > 0) {
1456                 /* Re-enable beaconing */
1457                 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1458                 ath9k_ps_wakeup(sc);
1459                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1460                 ath9k_ps_restore(sc);
1461         }
1462 }
1463
1464 static int ath9k_change_interface(struct ieee80211_hw *hw,
1465                                   struct ieee80211_vif *vif,
1466                                   enum nl80211_iftype new_type,
1467                                   bool p2p)
1468 {
1469         struct ath_wiphy *aphy = hw->priv;
1470         struct ath_softc *sc = aphy->sc;
1471         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1472         int ret = 0;
1473
1474         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1475         mutex_lock(&sc->mutex);
1476
1477         switch (new_type) {
1478         case NL80211_IFTYPE_AP:
1479         case NL80211_IFTYPE_ADHOC:
1480                 if (sc->nbcnvifs >= ATH_BCBUF) {
1481                         ath_err(common, "No beacon slot available\n");
1482                         ret = -ENOBUFS;
1483                         goto out;
1484                 }
1485                 break;
1486         case NL80211_IFTYPE_STATION:
1487                 /* Stop ANI */
1488                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1489                 del_timer_sync(&common->ani.timer);
1490                 if ((vif->type == NL80211_IFTYPE_AP) ||
1491                     (vif->type == NL80211_IFTYPE_ADHOC))
1492                         ath9k_reclaim_beacon(sc, vif);
1493                 break;
1494         default:
1495                 ath_err(common, "Interface type %d not yet supported\n",
1496                                 vif->type);
1497                 ret = -ENOTSUPP;
1498                 goto out;
1499         }
1500         vif->type = new_type;
1501         vif->p2p = p2p;
1502
1503 out:
1504         mutex_unlock(&sc->mutex);
1505         return ret;
1506 }
1507
1508 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1509                                    struct ieee80211_vif *vif)
1510 {
1511         struct ath_wiphy *aphy = hw->priv;
1512         struct ath_softc *sc = aphy->sc;
1513         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1514
1515         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1516
1517         mutex_lock(&sc->mutex);
1518
1519         /* Stop ANI */
1520         sc->sc_flags &= ~SC_OP_ANI_RUN;
1521         del_timer_sync(&common->ani.timer);
1522
1523         /* Reclaim beacon resources */
1524         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1525             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1526             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
1527                 ath9k_reclaim_beacon(sc, vif);
1528
1529         sc->nvifs--;
1530
1531         mutex_unlock(&sc->mutex);
1532 }
1533
1534 static void ath9k_enable_ps(struct ath_softc *sc)
1535 {
1536         struct ath_hw *ah = sc->sc_ah;
1537
1538         sc->ps_enabled = true;
1539         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1540                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1541                         ah->imask |= ATH9K_INT_TIM_TIMER;
1542                         ath9k_hw_set_interrupts(ah, ah->imask);
1543                 }
1544                 ath9k_hw_setrxabort(ah, 1);
1545         }
1546 }
1547
1548 static void ath9k_disable_ps(struct ath_softc *sc)
1549 {
1550         struct ath_hw *ah = sc->sc_ah;
1551
1552         sc->ps_enabled = false;
1553         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1554         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1555                 ath9k_hw_setrxabort(ah, 0);
1556                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1557                                   PS_WAIT_FOR_CAB |
1558                                   PS_WAIT_FOR_PSPOLL_DATA |
1559                                   PS_WAIT_FOR_TX_ACK);
1560                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1561                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1562                         ath9k_hw_set_interrupts(ah, ah->imask);
1563                 }
1564         }
1565
1566 }
1567
1568 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1569 {
1570         struct ath_wiphy *aphy = hw->priv;
1571         struct ath_softc *sc = aphy->sc;
1572         struct ath_hw *ah = sc->sc_ah;
1573         struct ath_common *common = ath9k_hw_common(ah);
1574         struct ieee80211_conf *conf = &hw->conf;
1575         bool disable_radio;
1576
1577         mutex_lock(&sc->mutex);
1578
1579         /*
1580          * Leave this as the first check because we need to turn on the
1581          * radio if it was disabled before prior to processing the rest
1582          * of the changes. Likewise we must only disable the radio towards
1583          * the end.
1584          */
1585         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1586                 bool enable_radio;
1587                 bool all_wiphys_idle;
1588                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1589
1590                 spin_lock_bh(&sc->wiphy_lock);
1591                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1592                 ath9k_set_wiphy_idle(aphy, idle);
1593
1594                 enable_radio = (!idle && all_wiphys_idle);
1595
1596                 /*
1597                  * After we unlock here its possible another wiphy
1598                  * can be re-renabled so to account for that we will
1599                  * only disable the radio toward the end of this routine
1600                  * if by then all wiphys are still idle.
1601                  */
1602                 spin_unlock_bh(&sc->wiphy_lock);
1603
1604                 if (enable_radio) {
1605                         sc->ps_idle = false;
1606                         ath_radio_enable(sc, hw);
1607                         ath_dbg(common, ATH_DBG_CONFIG,
1608                                 "not-idle: enabling radio\n");
1609                 }
1610         }
1611
1612         /*
1613          * We just prepare to enable PS. We have to wait until our AP has
1614          * ACK'd our null data frame to disable RX otherwise we'll ignore
1615          * those ACKs and end up retransmitting the same null data frames.
1616          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1617          */
1618         if (changed & IEEE80211_CONF_CHANGE_PS) {
1619                 unsigned long flags;
1620                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1621                 if (conf->flags & IEEE80211_CONF_PS)
1622                         ath9k_enable_ps(sc);
1623                 else
1624                         ath9k_disable_ps(sc);
1625                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1626         }
1627
1628         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1629                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1630                         ath_dbg(common, ATH_DBG_CONFIG,
1631                                 "Monitor mode is enabled\n");
1632                         sc->sc_ah->is_monitoring = true;
1633                 } else {
1634                         ath_dbg(common, ATH_DBG_CONFIG,
1635                                 "Monitor mode is disabled\n");
1636                         sc->sc_ah->is_monitoring = false;
1637                 }
1638         }
1639
1640         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1641                 struct ieee80211_channel *curchan = hw->conf.channel;
1642                 int pos = curchan->hw_value;
1643                 int old_pos = -1;
1644                 unsigned long flags;
1645
1646                 if (ah->curchan)
1647                         old_pos = ah->curchan - &ah->channels[0];
1648
1649                 aphy->chan_idx = pos;
1650                 aphy->chan_is_ht = conf_is_ht(conf);
1651                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1652                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1653                 else
1654                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1655
1656                 if (aphy->state == ATH_WIPHY_SCAN ||
1657                     aphy->state == ATH_WIPHY_ACTIVE)
1658                         ath9k_wiphy_pause_all_forced(sc, aphy);
1659                 else {
1660                         /*
1661                          * Do not change operational channel based on a paused
1662                          * wiphy changes.
1663                          */
1664                         goto skip_chan_change;
1665                 }
1666
1667                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1668                         curchan->center_freq);
1669
1670                 /* XXX: remove me eventualy */
1671                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1672
1673                 /* update survey stats for the old channel before switching */
1674                 spin_lock_irqsave(&common->cc_lock, flags);
1675                 ath_update_survey_stats(sc);
1676                 spin_unlock_irqrestore(&common->cc_lock, flags);
1677
1678                 /*
1679                  * If the operating channel changes, change the survey in-use flags
1680                  * along with it.
1681                  * Reset the survey data for the new channel, unless we're switching
1682                  * back to the operating channel from an off-channel operation.
1683                  */
1684                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1685                     sc->cur_survey != &sc->survey[pos]) {
1686
1687                         if (sc->cur_survey)
1688                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1689
1690                         sc->cur_survey = &sc->survey[pos];
1691
1692                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1693                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1694                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1695                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1696                 }
1697
1698                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1699                         ath_err(common, "Unable to set channel\n");
1700                         mutex_unlock(&sc->mutex);
1701                         return -EINVAL;
1702                 }
1703
1704                 /*
1705                  * The most recent snapshot of channel->noisefloor for the old
1706                  * channel is only available after the hardware reset. Copy it to
1707                  * the survey stats now.
1708                  */
1709                 if (old_pos >= 0)
1710                         ath_update_survey_nf(sc, old_pos);
1711         }
1712
1713 skip_chan_change:
1714         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1715                 sc->config.txpowlimit = 2 * conf->power_level;
1716                 ath9k_ps_wakeup(sc);
1717                 ath_update_txpow(sc);
1718                 ath9k_ps_restore(sc);
1719         }
1720
1721         spin_lock_bh(&sc->wiphy_lock);
1722         disable_radio = ath9k_all_wiphys_idle(sc);
1723         spin_unlock_bh(&sc->wiphy_lock);
1724
1725         if (disable_radio) {
1726                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1727                 sc->ps_idle = true;
1728                 ath_radio_disable(sc, hw);
1729         }
1730
1731         mutex_unlock(&sc->mutex);
1732
1733         return 0;
1734 }
1735
1736 #define SUPPORTED_FILTERS                       \
1737         (FIF_PROMISC_IN_BSS |                   \
1738         FIF_ALLMULTI |                          \
1739         FIF_CONTROL |                           \
1740         FIF_PSPOLL |                            \
1741         FIF_OTHER_BSS |                         \
1742         FIF_BCN_PRBRESP_PROMISC |               \
1743         FIF_PROBE_REQ |                         \
1744         FIF_FCSFAIL)
1745
1746 /* FIXME: sc->sc_full_reset ? */
1747 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1748                                    unsigned int changed_flags,
1749                                    unsigned int *total_flags,
1750                                    u64 multicast)
1751 {
1752         struct ath_wiphy *aphy = hw->priv;
1753         struct ath_softc *sc = aphy->sc;
1754         u32 rfilt;
1755
1756         changed_flags &= SUPPORTED_FILTERS;
1757         *total_flags &= SUPPORTED_FILTERS;
1758
1759         sc->rx.rxfilter = *total_flags;
1760         ath9k_ps_wakeup(sc);
1761         rfilt = ath_calcrxfilter(sc);
1762         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1763         ath9k_ps_restore(sc);
1764
1765         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1766                 "Set HW RX filter: 0x%x\n", rfilt);
1767 }
1768
1769 static int ath9k_sta_add(struct ieee80211_hw *hw,
1770                          struct ieee80211_vif *vif,
1771                          struct ieee80211_sta *sta)
1772 {
1773         struct ath_wiphy *aphy = hw->priv;
1774         struct ath_softc *sc = aphy->sc;
1775
1776         ath_node_attach(sc, sta);
1777
1778         return 0;
1779 }
1780
1781 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1782                             struct ieee80211_vif *vif,
1783                             struct ieee80211_sta *sta)
1784 {
1785         struct ath_wiphy *aphy = hw->priv;
1786         struct ath_softc *sc = aphy->sc;
1787
1788         ath_node_detach(sc, sta);
1789
1790         return 0;
1791 }
1792
1793 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1794                          const struct ieee80211_tx_queue_params *params)
1795 {
1796         struct ath_wiphy *aphy = hw->priv;
1797         struct ath_softc *sc = aphy->sc;
1798         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1799         struct ath_txq *txq;
1800         struct ath9k_tx_queue_info qi;
1801         int ret = 0;
1802
1803         if (queue >= WME_NUM_AC)
1804                 return 0;
1805
1806         txq = sc->tx.txq_map[queue];
1807
1808         mutex_lock(&sc->mutex);
1809
1810         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1811
1812         qi.tqi_aifs = params->aifs;
1813         qi.tqi_cwmin = params->cw_min;
1814         qi.tqi_cwmax = params->cw_max;
1815         qi.tqi_burstTime = params->txop;
1816
1817         ath_dbg(common, ATH_DBG_CONFIG,
1818                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1819                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1820                 params->cw_max, params->txop);
1821
1822         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1823         if (ret)
1824                 ath_err(common, "TXQ Update failed\n");
1825
1826         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1827                 if (queue == WME_AC_BE && !ret)
1828                         ath_beaconq_config(sc);
1829
1830         mutex_unlock(&sc->mutex);
1831
1832         return ret;
1833 }
1834
1835 static int ath9k_set_key(struct ieee80211_hw *hw,
1836                          enum set_key_cmd cmd,
1837                          struct ieee80211_vif *vif,
1838                          struct ieee80211_sta *sta,
1839                          struct ieee80211_key_conf *key)
1840 {
1841         struct ath_wiphy *aphy = hw->priv;
1842         struct ath_softc *sc = aphy->sc;
1843         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1844         int ret = 0;
1845
1846         if (ath9k_modparam_nohwcrypt)
1847                 return -ENOSPC;
1848
1849         mutex_lock(&sc->mutex);
1850         ath9k_ps_wakeup(sc);
1851         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1852
1853         switch (cmd) {
1854         case SET_KEY:
1855                 ret = ath_key_config(common, vif, sta, key);
1856                 if (ret >= 0) {
1857                         key->hw_key_idx = ret;
1858                         /* push IV and Michael MIC generation to stack */
1859                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1860                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1861                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1862                         if (sc->sc_ah->sw_mgmt_crypto &&
1863                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1864                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1865                         ret = 0;
1866                 }
1867                 break;
1868         case DISABLE_KEY:
1869                 ath_key_delete(common, key);
1870                 break;
1871         default:
1872                 ret = -EINVAL;
1873         }
1874
1875         ath9k_ps_restore(sc);
1876         mutex_unlock(&sc->mutex);
1877
1878         return ret;
1879 }
1880
1881 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1882                                    struct ieee80211_vif *vif,
1883                                    struct ieee80211_bss_conf *bss_conf,
1884                                    u32 changed)
1885 {
1886         struct ath_wiphy *aphy = hw->priv;
1887         struct ath_softc *sc = aphy->sc;
1888         struct ath_hw *ah = sc->sc_ah;
1889         struct ath_common *common = ath9k_hw_common(ah);
1890         struct ath_vif *avp = (void *)vif->drv_priv;
1891         int slottime;
1892         int error;
1893
1894         mutex_lock(&sc->mutex);
1895
1896         if (changed & BSS_CHANGED_BSSID) {
1897                 /* Set BSSID */
1898                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1899                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1900                 common->curaid = 0;
1901                 ath9k_hw_write_associd(ah);
1902
1903                 /* Set aggregation protection mode parameters */
1904                 sc->config.ath_aggr_prot = 0;
1905
1906                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1907                         common->curbssid, common->curaid);
1908
1909                 /* need to reconfigure the beacon */
1910                 sc->sc_flags &= ~SC_OP_BEACONS ;
1911         }
1912
1913         /* Enable transmission of beacons (AP, IBSS, MESH) */
1914         if ((changed & BSS_CHANGED_BEACON) ||
1915             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1916                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1917                 error = ath_beacon_alloc(aphy, vif);
1918                 if (!error)
1919                         ath_beacon_config(sc, vif);
1920         }
1921
1922         if (changed & BSS_CHANGED_ERP_SLOT) {
1923                 if (bss_conf->use_short_slot)
1924                         slottime = 9;
1925                 else
1926                         slottime = 20;
1927                 if (vif->type == NL80211_IFTYPE_AP) {
1928                         /*
1929                          * Defer update, so that connected stations can adjust
1930                          * their settings at the same time.
1931                          * See beacon.c for more details
1932                          */
1933                         sc->beacon.slottime = slottime;
1934                         sc->beacon.updateslot = UPDATE;
1935                 } else {
1936                         ah->slottime = slottime;
1937                         ath9k_hw_init_global_settings(ah);
1938                 }
1939         }
1940
1941         /* Disable transmission of beacons */
1942         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1943                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1944
1945         if (changed & BSS_CHANGED_BEACON_INT) {
1946                 sc->beacon_interval = bss_conf->beacon_int;
1947                 /*
1948                  * In case of AP mode, the HW TSF has to be reset
1949                  * when the beacon interval changes.
1950                  */
1951                 if (vif->type == NL80211_IFTYPE_AP) {
1952                         sc->sc_flags |= SC_OP_TSF_RESET;
1953                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1954                         error = ath_beacon_alloc(aphy, vif);
1955                         if (!error)
1956                                 ath_beacon_config(sc, vif);
1957                 } else {
1958                         ath_beacon_config(sc, vif);
1959                 }
1960         }
1961
1962         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1963                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1964                         bss_conf->use_short_preamble);
1965                 if (bss_conf->use_short_preamble)
1966                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1967                 else
1968                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1969         }
1970
1971         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1972                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1973                         bss_conf->use_cts_prot);
1974                 if (bss_conf->use_cts_prot &&
1975                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1976                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1977                 else
1978                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1979         }
1980
1981         if (changed & BSS_CHANGED_ASSOC) {
1982                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1983                         bss_conf->assoc);
1984                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1985         }
1986
1987         mutex_unlock(&sc->mutex);
1988 }
1989
1990 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1991 {
1992         u64 tsf;
1993         struct ath_wiphy *aphy = hw->priv;
1994         struct ath_softc *sc = aphy->sc;
1995
1996         mutex_lock(&sc->mutex);
1997         ath9k_ps_wakeup(sc);
1998         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1999         ath9k_ps_restore(sc);
2000         mutex_unlock(&sc->mutex);
2001
2002         return tsf;
2003 }
2004
2005 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2006 {
2007         struct ath_wiphy *aphy = hw->priv;
2008         struct ath_softc *sc = aphy->sc;
2009
2010         mutex_lock(&sc->mutex);
2011         ath9k_ps_wakeup(sc);
2012         ath9k_hw_settsf64(sc->sc_ah, tsf);
2013         ath9k_ps_restore(sc);
2014         mutex_unlock(&sc->mutex);
2015 }
2016
2017 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2018 {
2019         struct ath_wiphy *aphy = hw->priv;
2020         struct ath_softc *sc = aphy->sc;
2021
2022         mutex_lock(&sc->mutex);
2023
2024         ath9k_ps_wakeup(sc);
2025         ath9k_hw_reset_tsf(sc->sc_ah);
2026         ath9k_ps_restore(sc);
2027
2028         mutex_unlock(&sc->mutex);
2029 }
2030
2031 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2032                               struct ieee80211_vif *vif,
2033                               enum ieee80211_ampdu_mlme_action action,
2034                               struct ieee80211_sta *sta,
2035                               u16 tid, u16 *ssn)
2036 {
2037         struct ath_wiphy *aphy = hw->priv;
2038         struct ath_softc *sc = aphy->sc;
2039         int ret = 0;
2040
2041         local_bh_disable();
2042
2043         switch (action) {
2044         case IEEE80211_AMPDU_RX_START:
2045                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2046                         ret = -ENOTSUPP;
2047                 break;
2048         case IEEE80211_AMPDU_RX_STOP:
2049                 break;
2050         case IEEE80211_AMPDU_TX_START:
2051                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2052                         return -EOPNOTSUPP;
2053
2054                 ath9k_ps_wakeup(sc);
2055                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2056                 if (!ret)
2057                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2058                 ath9k_ps_restore(sc);
2059                 break;
2060         case IEEE80211_AMPDU_TX_STOP:
2061                 ath9k_ps_wakeup(sc);
2062                 ath_tx_aggr_stop(sc, sta, tid);
2063                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2064                 ath9k_ps_restore(sc);
2065                 break;
2066         case IEEE80211_AMPDU_TX_OPERATIONAL:
2067                 ath9k_ps_wakeup(sc);
2068                 ath_tx_aggr_resume(sc, sta, tid);
2069                 ath9k_ps_restore(sc);
2070                 break;
2071         default:
2072                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2073         }
2074
2075         local_bh_enable();
2076
2077         return ret;
2078 }
2079
2080 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2081                              struct survey_info *survey)
2082 {
2083         struct ath_wiphy *aphy = hw->priv;
2084         struct ath_softc *sc = aphy->sc;
2085         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2086         struct ieee80211_supported_band *sband;
2087         struct ieee80211_channel *chan;
2088         unsigned long flags;
2089         int pos;
2090
2091         spin_lock_irqsave(&common->cc_lock, flags);
2092         if (idx == 0)
2093                 ath_update_survey_stats(sc);
2094
2095         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2096         if (sband && idx >= sband->n_channels) {
2097                 idx -= sband->n_channels;
2098                 sband = NULL;
2099         }
2100
2101         if (!sband)
2102                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2103
2104         if (!sband || idx >= sband->n_channels) {
2105                 spin_unlock_irqrestore(&common->cc_lock, flags);
2106                 return -ENOENT;
2107         }
2108
2109         chan = &sband->channels[idx];
2110         pos = chan->hw_value;
2111         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2112         survey->channel = chan;
2113         spin_unlock_irqrestore(&common->cc_lock, flags);
2114
2115         return 0;
2116 }
2117
2118 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2119 {
2120         struct ath_wiphy *aphy = hw->priv;
2121         struct ath_softc *sc = aphy->sc;
2122
2123         mutex_lock(&sc->mutex);
2124         if (ath9k_wiphy_scanning(sc)) {
2125                 /*
2126                  * There is a race here in mac80211 but fixing it requires
2127                  * we revisit how we handle the scan complete callback.
2128                  * After mac80211 fixes we will not have configured hardware
2129                  * to the home channel nor would we have configured the RX
2130                  * filter yet.
2131                  */
2132                 mutex_unlock(&sc->mutex);
2133                 return;
2134         }
2135
2136         aphy->state = ATH_WIPHY_SCAN;
2137         ath9k_wiphy_pause_all_forced(sc, aphy);
2138         mutex_unlock(&sc->mutex);
2139 }
2140
2141 /*
2142  * XXX: this requires a revisit after the driver
2143  * scan_complete gets moved to another place/removed in mac80211.
2144  */
2145 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2146 {
2147         struct ath_wiphy *aphy = hw->priv;
2148         struct ath_softc *sc = aphy->sc;
2149
2150         mutex_lock(&sc->mutex);
2151         aphy->state = ATH_WIPHY_ACTIVE;
2152         mutex_unlock(&sc->mutex);
2153 }
2154
2155 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2156 {
2157         struct ath_wiphy *aphy = hw->priv;
2158         struct ath_softc *sc = aphy->sc;
2159         struct ath_hw *ah = sc->sc_ah;
2160
2161         mutex_lock(&sc->mutex);
2162         ah->coverage_class = coverage_class;
2163         ath9k_hw_init_global_settings(ah);
2164         mutex_unlock(&sc->mutex);
2165 }
2166
2167 struct ieee80211_ops ath9k_ops = {
2168         .tx                 = ath9k_tx,
2169         .start              = ath9k_start,
2170         .stop               = ath9k_stop,
2171         .add_interface      = ath9k_add_interface,
2172         .change_interface   = ath9k_change_interface,
2173         .remove_interface   = ath9k_remove_interface,
2174         .config             = ath9k_config,
2175         .configure_filter   = ath9k_configure_filter,
2176         .sta_add            = ath9k_sta_add,
2177         .sta_remove         = ath9k_sta_remove,
2178         .conf_tx            = ath9k_conf_tx,
2179         .bss_info_changed   = ath9k_bss_info_changed,
2180         .set_key            = ath9k_set_key,
2181         .get_tsf            = ath9k_get_tsf,
2182         .set_tsf            = ath9k_set_tsf,
2183         .reset_tsf          = ath9k_reset_tsf,
2184         .ampdu_action       = ath9k_ampdu_action,
2185         .get_survey         = ath9k_get_survey,
2186         .sw_scan_start      = ath9k_sw_scan_start,
2187         .sw_scan_complete   = ath9k_sw_scan_complete,
2188         .rfkill_poll        = ath9k_rfkill_poll_state,
2189         .set_coverage_class = ath9k_set_coverage_class,
2190 };