drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54
  55         if (sc->curtxpow != sc->config.txpowlimit) {
  56                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  57                 /* read back in case value is clamped */
  58                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  59         }
  60 }
  61
  62 static u8 parse_mpdudensity(u8 mpdudensity)
  63 {
  64         /*
  65          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  66          *   0 for no restriction
  67          *   1 for 1/4 us
  68          *   2 for 1/2 us
  69          *   3 for 1 us
  70          *   4 for 2 us
  71          *   5 for 4 us
  72          *   6 for 8 us
  73          *   7 for 16 us
  74          */
  75         switch (mpdudensity) {
  76         case 0:
  77                 return 0;
  78         case 1:
  79         case 2:
  80         case 3:
  81                 /* Our lower layer calculations limit our precision to
  82                    1 microsecond */
  83                 return 1;
  84         case 4:
  85                 return 2;
  86         case 5:
  87                 return 4;
  88         case 6:
  89                 return 8;
  90         case 7:
  91                 return 16;
  92         default:
  93                 return 0;
  94         }
  95 }
  96
  97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  98                                                 struct ieee80211_hw *hw)
  99 {
 100         struct ieee80211_channel *curchan = hw->conf.channel;
 101         struct ath9k_channel *channel;
 102         u8 chan_idx;
 103
 104         chan_idx = curchan->hw_value;
 105         channel = &sc->sc_ah->channels[chan_idx];
 106         ath9k_update_ichannel(sc, hw, channel);
 107         return channel;
 108 }
 109
 110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 111 {
 112         unsigned long flags;
 113         bool ret;
 114
 115         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 116         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 117         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 118
 119         return ret;
 120 }
 121
 122 void ath9k_ps_wakeup(struct ath_softc *sc)
 123 {
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (++sc->ps_usecount != 1)
 128                 goto unlock;
 129
 130         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 131
 132  unlock:
 133         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 134 }
 135
 136 void ath9k_ps_restore(struct ath_softc *sc)
 137 {
 138         unsigned long flags;
 139
 140         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 141         if (--sc->ps_usecount != 0)
 142                 goto unlock;
 143
 144         if (sc->ps_idle)
 145                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 146         else if (sc->ps_enabled &&
 147                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 148                               PS_WAIT_FOR_CAB |
 149                               PS_WAIT_FOR_PSPOLL_DATA |
 150                               PS_WAIT_FOR_TX_ACK)))
 151                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 152
 153  unlock:
 154         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 155 }
 156
 157 /*
 158  * Set/change channels.  If the channel is really being changed, it's done
 159  * by reseting the chip.  To accomplish this we must first cleanup any pending
 160  * DMA, then restart stuff.
 161 */
 162 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 163                     struct ath9k_channel *hchan)
 164 {
 165         struct ath_hw *ah = sc->sc_ah;
 166         struct ath_common *common = ath9k_hw_common(ah);
 167         struct ieee80211_conf *conf = &common->hw->conf;
 168         bool fastcc = true, stopped;
 169         struct ieee80211_channel *channel = hw->conf.channel;
 170         int r;
 171
 172         if (sc->sc_flags & SC_OP_INVALID)
 173                 return -EIO;
 174
 175         ath9k_ps_wakeup(sc);
 176
 177         /*
 178          * This is only performed if the channel settings have
 179          * actually changed.
 180          *
 181          * To switch channels clear any pending DMA operations;
 182          * wait long enough for the RX fifo to drain, reset the
 183          * hardware at the new frequency, and then re-enable
 184          * the relevant bits of the h/w.
 185          */
 186         ath9k_hw_set_interrupts(ah, 0);
 187         ath_drain_all_txq(sc, false);
 188         stopped = ath_stoprecv(sc);
 189
 190         /* XXX: do not flush receive queue here. We don't want
 191          * to flush data frames already in queue because of
 192          * changing channel. */
 193
 194         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 195                 fastcc = false;
 196
 197         ath_print(common, ATH_DBG_CONFIG,
 198                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 199                   sc->sc_ah->curchan->channel,
 200                   channel->center_freq, conf_is_ht40(conf));
 201
 202         spin_lock_bh(&sc->sc_resetlock);
 203
 204         r = ath9k_hw_reset(ah, hchan, fastcc);
 205         if (r) {
 206                 ath_print(common, ATH_DBG_FATAL,
 207                           "Unable to reset channel (%u MHz), "
 208                           "reset status %d\n",
 209                           channel->center_freq, r);
 210                 spin_unlock_bh(&sc->sc_resetlock);
 211                 goto ps_restore;
 212         }
 213         spin_unlock_bh(&sc->sc_resetlock);
 214
 215         sc->sc_flags &= ~SC_OP_FULL_RESET;
 216
 217         if (ath_startrecv(sc) != 0) {
 218                 ath_print(common, ATH_DBG_FATAL,
 219                           "Unable to restart recv logic\n");
 220                 r = -EIO;
 221                 goto ps_restore;
 222         }
 223
 224         ath_cache_conf_rate(sc, &hw->conf);
 225         ath_update_txpow(sc);
 226         ath9k_hw_set_interrupts(ah, ah->imask);
 227
 228  ps_restore:
 229         ath9k_ps_restore(sc);
 230         return r;
 231 }
 232
 233 static void ath_paprd_activate(struct ath_softc *sc)
 234 {
 235         struct ath_hw *ah = sc->sc_ah;
 236         int chain;
 237
 238         if (!ah->curchan->paprd_done)
 239                 return;
 240
 241         ath9k_ps_wakeup(sc);
 242         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 243                 if (!(ah->caps.tx_chainmask & BIT(chain)))
 244                         continue;
 245
 246                 ar9003_paprd_populate_single_table(ah, ah->curchan, chain);
 247         }
 248
 249         ar9003_paprd_enable(ah, true);
 250         ath9k_ps_restore(sc);
 251 }
 252
 253 void ath_paprd_calibrate(struct work_struct *work)
 254 {
 255         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 256         struct ieee80211_hw *hw = sc->hw;
 257         struct ath_hw *ah = sc->sc_ah;
 258         struct ieee80211_hdr *hdr;
 259         struct sk_buff *skb = NULL;
 260         struct ieee80211_tx_info *tx_info;
 261         int band = hw->conf.channel->band;
 262         struct ieee80211_supported_band *sband = &sc->sbands[band];
 263         struct ath_tx_control txctl;
 264         int qnum, ftype;
 265         int chain_ok = 0;
 266         int chain;
 267         int len = 1800;
 268         int time_left;
 269         int i;
 270
 271         skb = alloc_skb(len, GFP_KERNEL);
 272         if (!skb)
 273                 return;
 274
 275         tx_info = IEEE80211_SKB_CB(skb);
 276
 277         skb_put(skb, len);
 278         memset(skb->data, 0, len);
 279         hdr = (struct ieee80211_hdr *)skb->data;
 280         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 281         hdr->frame_control = cpu_to_le16(ftype);
 282         hdr->duration_id = cpu_to_le16(10);
 283         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 284         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 285         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 286
 287         memset(&txctl, 0, sizeof(txctl));
 288         qnum = sc->tx.hwq_map[WME_AC_BE];
 289         txctl.txq = &sc->tx.txq[qnum];
 290
 291         ath9k_ps_wakeup(sc);
 292         ar9003_paprd_init_table(ah);
 293         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 294                 if (!(ah->caps.tx_chainmask & BIT(chain)))
 295                         continue;
 296
 297                 chain_ok = 0;
 298                 memset(tx_info, 0, sizeof(*tx_info));
 299                 tx_info->band = band;
 300
 301                 for (i = 0; i < 4; i++) {
 302                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 303                         tx_info->control.rates[i].count = 6;
 304                 }
 305
 306                 init_completion(&sc->paprd_complete);
 307                 ar9003_paprd_setup_gain_table(ah, chain);
 308                 txctl.paprd = BIT(chain);
 309                 if (ath_tx_start(hw, skb, &txctl) != 0)
 310                         break;
 311
 312                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 313                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 314                 if (!time_left) {
 315                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 316                                   "Timeout waiting for paprd training on "
 317                                   "TX chain %d\n",
 318                                   chain);
 319                         goto fail_paprd;
 320                 }
 321
 322                 if (!ar9003_paprd_is_done(ah))
 323                         break;
 324
 325                 if (ar9003_paprd_create_curve(ah, ah->curchan, chain) != 0)
 326                         break;
 327
 328                 chain_ok = 1;
 329         }
 330         kfree_skb(skb);
 331
 332         if (chain_ok) {
 333                 ah->curchan->paprd_done = true;
 334                 ath_paprd_activate(sc);
 335         }
 336
 337 fail_paprd:
 338         ath9k_ps_restore(sc);
 339 }
 340
 341 /*
 342  *  This routine performs the periodic noise floor calibration function
 343  *  that is used to adjust and optimize the chip performance.  This
 344  *  takes environmental changes (location, temperature) into account.
 345  *  When the task is complete, it reschedules itself depending on the
 346  *  appropriate interval that was calculated.
 347  */
 348 void ath_ani_calibrate(unsigned long data)
 349 {
 350         struct ath_softc *sc = (struct ath_softc *)data;
 351         struct ath_hw *ah = sc->sc_ah;
 352         struct ath_common *common = ath9k_hw_common(ah);
 353         bool longcal = false;
 354         bool shortcal = false;
 355         bool aniflag = false;
 356         unsigned int timestamp = jiffies_to_msecs(jiffies);
 357         u32 cal_interval, short_cal_interval;
 358
 359         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 360                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 361
 362         /* Only calibrate if awake */
 363         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 364                 goto set_timer;
 365
 366         ath9k_ps_wakeup(sc);
 367
 368         /* Long calibration runs independently of short calibration. */
 369         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 370                 longcal = true;
 371                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 372                 common->ani.longcal_timer = timestamp;
 373         }
 374
 375         /* Short calibration applies only while caldone is false */
 376         if (!common->ani.caldone) {
 377                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 378                         shortcal = true;
 379                         ath_print(common, ATH_DBG_ANI,
 380                                   "shortcal @%lu\n", jiffies);
 381                         common->ani.shortcal_timer = timestamp;
 382                         common->ani.resetcal_timer = timestamp;
 383                 }
 384         } else {
 385                 if ((timestamp - common->ani.resetcal_timer) >=
 386                     ATH_RESTART_CALINTERVAL) {
 387                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 388                         if (common->ani.caldone)
 389                                 common->ani.resetcal_timer = timestamp;
 390                 }
 391         }
 392
 393         /* Verify whether we must check ANI */
 394         if ((timestamp - common->ani.checkani_timer) >=
 395              ah->config.ani_poll_interval) {
 396                 aniflag = true;
 397                 common->ani.checkani_timer = timestamp;
 398         }
 399
 400         /* Skip all processing if there's nothing to do. */
 401         if (longcal || shortcal || aniflag) {
 402                 /* Call ANI routine if necessary */
 403                 if (aniflag)
 404                         ath9k_hw_ani_monitor(ah, ah->curchan);
 405
 406                 /* Perform calibration if necessary */
 407                 if (longcal || shortcal) {
 408                         common->ani.caldone =
 409                                 ath9k_hw_calibrate(ah,
 410                                                    ah->curchan,
 411                                                    common->rx_chainmask,
 412                                                    longcal);
 413
 414                         if (longcal)
 415                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 416                                                                      ah->curchan);
 417
 418                         ath_print(common, ATH_DBG_ANI,
 419                                   " calibrate chan %u/%x nf: %d\n",
 420                                   ah->curchan->channel,
 421                                   ah->curchan->channelFlags,
 422                                   common->ani.noise_floor);
 423                 }
 424         }
 425
 426         ath9k_ps_restore(sc);
 427
 428 set_timer:
 429         /*
 430         * Set timer interval based on previous results.
 431         * The interval must be the shortest necessary to satisfy ANI,
 432         * short calibration and long calibration.
 433         */
 434         cal_interval = ATH_LONG_CALINTERVAL;
 435         if (sc->sc_ah->config.enable_ani)
 436                 cal_interval = min(cal_interval,
 437                                    (u32)ah->config.ani_poll_interval);
 438         if (!common->ani.caldone)
 439                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 440
 441         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 442         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) &&
 443             !(sc->sc_flags & SC_OP_SCANNING)) {
 444                 if (!sc->sc_ah->curchan->paprd_done)
 445                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 446                 else
 447                         ath_paprd_activate(sc);
 448         }
 449 }
 450
 451 static void ath_start_ani(struct ath_common *common)
 452 {
 453         struct ath_hw *ah = common->ah;
 454         unsigned long timestamp = jiffies_to_msecs(jiffies);
 455         struct ath_softc *sc = (struct ath_softc *) common->priv;
 456
 457         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 458                 return;
 459
 460         common->ani.longcal_timer = timestamp;
 461         common->ani.shortcal_timer = timestamp;
 462         common->ani.checkani_timer = timestamp;
 463
 464         mod_timer(&common->ani.timer,
 465                   jiffies +
 466                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 467 }
 468
 469 /*
 470  * Update tx/rx chainmask. For legacy association,
 471  * hard code chainmask to 1x1, for 11n association, use
 472  * the chainmask configuration, for bt coexistence, use
 473  * the chainmask configuration even in legacy mode.
 474  */
 475 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 476 {
 477         struct ath_hw *ah = sc->sc_ah;
 478         struct ath_common *common = ath9k_hw_common(ah);
 479
 480         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 481             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 482                 common->tx_chainmask = ah->caps.tx_chainmask;
 483                 common->rx_chainmask = ah->caps.rx_chainmask;
 484         } else {
 485                 common->tx_chainmask = 1;
 486                 common->rx_chainmask = 1;
 487         }
 488
 489         ath_print(common, ATH_DBG_CONFIG,
 490                   "tx chmask: %d, rx chmask: %d\n",
 491                   common->tx_chainmask,
 492                   common->rx_chainmask);
 493 }
 494
 495 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 496 {
 497         struct ath_node *an;
 498
 499         an = (struct ath_node *)sta->drv_priv;
 500
 501         if (sc->sc_flags & SC_OP_TXAGGR) {
 502                 ath_tx_node_init(sc, an);
 503                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 504                                      sta->ht_cap.ampdu_factor);
 505                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 506                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 507         }
 508 }
 509
 510 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 511 {
 512         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 513
 514         if (sc->sc_flags & SC_OP_TXAGGR)
 515                 ath_tx_node_cleanup(sc, an);
 516 }
 517
 518 void ath_hw_check(struct work_struct *work)
 519 {
 520         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 521         int i;
 522
 523         ath9k_ps_wakeup(sc);
 524
 525         for (i = 0; i < 3; i++) {
 526                 if (ath9k_hw_check_alive(sc->sc_ah))
 527                         goto out;
 528
 529                 msleep(1);
 530         }
 531         ath_reset(sc, false);
 532
 533 out:
 534         ath9k_ps_restore(sc);
 535 }
 536
 537 void ath9k_tasklet(unsigned long data)
 538 {
 539         struct ath_softc *sc = (struct ath_softc *)data;
 540         struct ath_hw *ah = sc->sc_ah;
 541         struct ath_common *common = ath9k_hw_common(ah);
 542
 543         u32 status = sc->intrstatus;
 544         u32 rxmask;
 545
 546         ath9k_ps_wakeup(sc);
 547
 548         if (status & ATH9K_INT_FATAL) {
 549                 ath_reset(sc, false);
 550                 ath9k_ps_restore(sc);
 551                 return;
 552         }
 553
 554         if (!ath9k_hw_check_alive(ah))
 555                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 556
 557         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 558                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 559                           ATH9K_INT_RXORN);
 560         else
 561                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 562
 563         if (status & rxmask) {
 564                 spin_lock_bh(&sc->rx.rxflushlock);
 565
 566                 /* Check for high priority Rx first */
 567                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 568                     (status & ATH9K_INT_RXHP))
 569                         ath_rx_tasklet(sc, 0, true);
 570
 571                 ath_rx_tasklet(sc, 0, false);
 572                 spin_unlock_bh(&sc->rx.rxflushlock);
 573         }
 574
 575         if (status & ATH9K_INT_TX) {
 576                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 577                         ath_tx_edma_tasklet(sc);
 578                 else
 579                         ath_tx_tasklet(sc);
 580         }
 581
 582         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 583                 /*
 584                  * TSF sync does not look correct; remain awake to sync with
 585                  * the next Beacon.
 586                  */
 587                 ath_print(common, ATH_DBG_PS,
 588                           "TSFOOR - Sync with next Beacon\n");
 589                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 590         }
 591
 592         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 593                 if (status & ATH9K_INT_GENTIMER)
 594                         ath_gen_timer_isr(sc->sc_ah);
 595
 596         /* re-enable hardware interrupt */
 597         ath9k_hw_set_interrupts(ah, ah->imask);
 598         ath9k_ps_restore(sc);
 599 }
 600
 601 irqreturn_t ath_isr(int irq, void *dev)
 602 {
 603 #define SCHED_INTR (                            \
 604                 ATH9K_INT_FATAL |               \
 605                 ATH9K_INT_RXORN |               \
 606                 ATH9K_INT_RXEOL |               \
 607                 ATH9K_INT_RX |                  \
 608                 ATH9K_INT_RXLP |                \
 609                 ATH9K_INT_RXHP |                \
 610                 ATH9K_INT_TX |                  \
 611                 ATH9K_INT_BMISS |               \
 612                 ATH9K_INT_CST |                 \
 613                 ATH9K_INT_TSFOOR |              \
 614                 ATH9K_INT_GENTIMER)
 615
 616         struct ath_softc *sc = dev;
 617         struct ath_hw *ah = sc->sc_ah;
 618         enum ath9k_int status;
 619         bool sched = false;
 620
 621         /*
 622          * The hardware is not ready/present, don't
 623          * touch anything. Note this can happen early
 624          * on if the IRQ is shared.
 625          */
 626         if (sc->sc_flags & SC_OP_INVALID)
 627                 return IRQ_NONE;
 628
 629
 630         /* shared irq, not for us */
 631
 632         if (!ath9k_hw_intrpend(ah))
 633                 return IRQ_NONE;
 634
 635         /*
 636          * Figure out the reason(s) for the interrupt.  Note
 637          * that the hal returns a pseudo-ISR that may include
 638          * bits we haven't explicitly enabled so we mask the
 639          * value to insure we only process bits we requested.
 640          */
 641         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 642         status &= ah->imask;    /* discard unasked-for bits */
 643
 644         /*
 645          * If there are no status bits set, then this interrupt was not
 646          * for me (should have been caught above).
 647          */
 648         if (!status)
 649                 return IRQ_NONE;
 650
 651         /* Cache the status */
 652         sc->intrstatus = status;
 653
 654         if (status & SCHED_INTR)
 655                 sched = true;
 656
 657         /*
 658          * If a FATAL or RXORN interrupt is received, we have to reset the
 659          * chip immediately.
 660          */
 661         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 662             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 663                 goto chip_reset;
 664
 665         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 666             (status & ATH9K_INT_BB_WATCHDOG)) {
 667                 ar9003_hw_bb_watchdog_dbg_info(ah);
 668                 goto chip_reset;
 669         }
 670
 671         if (status & ATH9K_INT_SWBA)
 672                 tasklet_schedule(&sc->bcon_tasklet);
 673
 674         if (status & ATH9K_INT_TXURN)
 675                 ath9k_hw_updatetxtriglevel(ah, true);
 676
 677         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 678                 if (status & ATH9K_INT_RXEOL) {
 679                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 680                         ath9k_hw_set_interrupts(ah, ah->imask);
 681                 }
 682         }
 683
 684         if (status & ATH9K_INT_MIB) {
 685                 /*
 686                  * Disable interrupts until we service the MIB
 687                  * interrupt; otherwise it will continue to
 688                  * fire.
 689                  */
 690                 ath9k_hw_set_interrupts(ah, 0);
 691                 /*
 692                  * Let the hal handle the event. We assume
 693                  * it will clear whatever condition caused
 694                  * the interrupt.
 695                  */
 696                 ath9k_hw_procmibevent(ah);
 697                 ath9k_hw_set_interrupts(ah, ah->imask);
 698         }
 699
 700         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 701                 if (status & ATH9K_INT_TIM_TIMER) {
 702                         /* Clear RxAbort bit so that we can
 703                          * receive frames */
 704                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 705                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 706                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 707                 }
 708
 709 chip_reset:
 710
 711         ath_debug_stat_interrupt(sc, status);
 712
 713         if (sched) {
 714                 /* turn off every interrupt except SWBA */
 715                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 716                 tasklet_schedule(&sc->intr_tq);
 717         }
 718
 719         return IRQ_HANDLED;
 720
 721 #undef SCHED_INTR
 722 }
 723
 724 static u32 ath_get_extchanmode(struct ath_softc *sc,
 725                                struct ieee80211_channel *chan,
 726                                enum nl80211_channel_type channel_type)
 727 {
 728         u32 chanmode = 0;
 729
 730         switch (chan->band) {
 731         case IEEE80211_BAND_2GHZ:
 732                 switch(channel_type) {
 733                 case NL80211_CHAN_NO_HT:
 734                 case NL80211_CHAN_HT20:
 735                         chanmode = CHANNEL_G_HT20;
 736                         break;
 737                 case NL80211_CHAN_HT40PLUS:
 738                         chanmode = CHANNEL_G_HT40PLUS;
 739                         break;
 740                 case NL80211_CHAN_HT40MINUS:
 741                         chanmode = CHANNEL_G_HT40MINUS;
 742                         break;
 743                 }
 744                 break;
 745         case IEEE80211_BAND_5GHZ:
 746                 switch(channel_type) {
 747                 case NL80211_CHAN_NO_HT:
 748                 case NL80211_CHAN_HT20:
 749                         chanmode = CHANNEL_A_HT20;
 750                         break;
 751                 case NL80211_CHAN_HT40PLUS:
 752                         chanmode = CHANNEL_A_HT40PLUS;
 753                         break;
 754                 case NL80211_CHAN_HT40MINUS:
 755                         chanmode = CHANNEL_A_HT40MINUS;
 756                         break;
 757                 }
 758                 break;
 759         default:
 760                 break;
 761         }
 762
 763         return chanmode;
 764 }
 765
 766 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 767                                  struct ieee80211_vif *vif,
 768                                  struct ieee80211_bss_conf *bss_conf)
 769 {
 770         struct ath_hw *ah = sc->sc_ah;
 771         struct ath_common *common = ath9k_hw_common(ah);
 772
 773         if (bss_conf->assoc) {
 774                 ath_print(common, ATH_DBG_CONFIG,
 775                           "Bss Info ASSOC %d, bssid: %pM\n",
 776                            bss_conf->aid, common->curbssid);
 777
 778                 /* New association, store aid */
 779                 common->curaid = bss_conf->aid;
 780                 ath9k_hw_write_associd(ah);
 781
 782                 /*
 783                  * Request a re-configuration of Beacon related timers
 784                  * on the receipt of the first Beacon frame (i.e.,
 785                  * after time sync with the AP).
 786                  */
 787                 sc->ps_flags |= PS_BEACON_SYNC;
 788
 789                 /* Configure the beacon */
 790                 ath_beacon_config(sc, vif);
 791
 792                 /* Reset rssi stats */
 793                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 794
 795                 sc->sc_flags |= SC_OP_ANI_RUN;
 796                 ath_start_ani(common);
 797         } else {
 798                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 799                 common->curaid = 0;
 800                 /* Stop ANI */
 801                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 802                 del_timer_sync(&common->ani.timer);
 803         }
 804 }
 805
 806 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 807 {
 808         struct ath_hw *ah = sc->sc_ah;
 809         struct ath_common *common = ath9k_hw_common(ah);
 810         struct ieee80211_channel *channel = hw->conf.channel;
 811         int r;
 812
 813         ath9k_ps_wakeup(sc);
 814         ath9k_hw_configpcipowersave(ah, 0, 0);
 815
 816         if (!ah->curchan)
 817                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 818
 819         spin_lock_bh(&sc->sc_resetlock);
 820         r = ath9k_hw_reset(ah, ah->curchan, false);
 821         if (r) {
 822                 ath_print(common, ATH_DBG_FATAL,
 823                           "Unable to reset channel (%u MHz), "
 824                           "reset status %d\n",
 825                           channel->center_freq, r);
 826         }
 827         spin_unlock_bh(&sc->sc_resetlock);
 828
 829         ath_update_txpow(sc);
 830         if (ath_startrecv(sc) != 0) {
 831                 ath_print(common, ATH_DBG_FATAL,
 832                           "Unable to restart recv logic\n");
 833                 return;
 834         }
 835
 836         if (sc->sc_flags & SC_OP_BEACONS)
 837                 ath_beacon_config(sc, NULL);    /* restart beacons */
 838
 839         /* Re-Enable  interrupts */
 840         ath9k_hw_set_interrupts(ah, ah->imask);
 841
 842         /* Enable LED */
 843         ath9k_hw_cfg_output(ah, ah->led_pin,
 844                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 845         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 846
 847         ieee80211_wake_queues(hw);
 848         ath9k_ps_restore(sc);
 849 }
 850
 851 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 852 {
 853         struct ath_hw *ah = sc->sc_ah;
 854         struct ieee80211_channel *channel = hw->conf.channel;
 855         int r;
 856
 857         ath9k_ps_wakeup(sc);
 858         ieee80211_stop_queues(hw);
 859
 860         /*
 861          * Keep the LED on when the radio is disabled
 862          * during idle unassociated state.
 863          */
 864         if (!sc->ps_idle) {
 865                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 866                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 867         }
 868
 869         /* Disable interrupts */
 870         ath9k_hw_set_interrupts(ah, 0);
 871
 872         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 873         ath_stoprecv(sc);               /* turn off frame recv */
 874         ath_flushrecv(sc);              /* flush recv queue */
 875
 876         if (!ah->curchan)
 877                 ah->curchan = ath_get_curchannel(sc, hw);
 878
 879         spin_lock_bh(&sc->sc_resetlock);
 880         r = ath9k_hw_reset(ah, ah->curchan, false);
 881         if (r) {
 882                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 883                           "Unable to reset channel (%u MHz), "
 884                           "reset status %d\n",
 885                           channel->center_freq, r);
 886         }
 887         spin_unlock_bh(&sc->sc_resetlock);
 888
 889         ath9k_hw_phy_disable(ah);
 890         ath9k_hw_configpcipowersave(ah, 1, 1);
 891         ath9k_ps_restore(sc);
 892         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 893 }
 894
 895 int ath_reset(struct ath_softc *sc, bool retry_tx)
 896 {
 897         struct ath_hw *ah = sc->sc_ah;
 898         struct ath_common *common = ath9k_hw_common(ah);
 899         struct ieee80211_hw *hw = sc->hw;
 900         int r;
 901
 902         /* Stop ANI */
 903         del_timer_sync(&common->ani.timer);
 904
 905         ieee80211_stop_queues(hw);
 906
 907         ath9k_hw_set_interrupts(ah, 0);
 908         ath_drain_all_txq(sc, retry_tx);
 909         ath_stoprecv(sc);
 910         ath_flushrecv(sc);
 911
 912         spin_lock_bh(&sc->sc_resetlock);
 913         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 914         if (r)
 915                 ath_print(common, ATH_DBG_FATAL,
 916                           "Unable to reset hardware; reset status %d\n", r);
 917         spin_unlock_bh(&sc->sc_resetlock);
 918
 919         if (ath_startrecv(sc) != 0)
 920                 ath_print(common, ATH_DBG_FATAL,
 921                           "Unable to start recv logic\n");
 922
 923         /*
 924          * We may be doing a reset in response to a request
 925          * that changes the channel so update any state that
 926          * might change as a result.
 927          */
 928         ath_cache_conf_rate(sc, &hw->conf);
 929
 930         ath_update_txpow(sc);
 931
 932         if (sc->sc_flags & SC_OP_BEACONS)
 933                 ath_beacon_config(sc, NULL);    /* restart beacons */
 934
 935         ath9k_hw_set_interrupts(ah, ah->imask);
 936
 937         if (retry_tx) {
 938                 int i;
 939                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 940                         if (ATH_TXQ_SETUP(sc, i)) {
 941                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 942                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 943                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 944                         }
 945                 }
 946         }
 947
 948         ieee80211_wake_queues(hw);
 949
 950         /* Start ANI */
 951         ath_start_ani(common);
 952
 953         return r;
 954 }
 955
 956 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
 957 {
 958         int qnum;
 959
 960         switch (queue) {
 961         case 0:
 962                 qnum = sc->tx.hwq_map[WME_AC_VO];
 963                 break;
 964         case 1:
 965                 qnum = sc->tx.hwq_map[WME_AC_VI];
 966                 break;
 967         case 2:
 968                 qnum = sc->tx.hwq_map[WME_AC_BE];
 969                 break;
 970         case 3:
 971                 qnum = sc->tx.hwq_map[WME_AC_BK];
 972                 break;
 973         default:
 974                 qnum = sc->tx.hwq_map[WME_AC_BE];
 975                 break;
 976         }
 977
 978         return qnum;
 979 }
 980
 981 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
 982 {
 983         int qnum;
 984
 985         switch (queue) {
 986         case WME_AC_VO:
 987                 qnum = 0;
 988                 break;
 989         case WME_AC_VI:
 990                 qnum = 1;
 991                 break;
 992         case WME_AC_BE:
 993                 qnum = 2;
 994                 break;
 995         case WME_AC_BK:
 996                 qnum = 3;
 997                 break;
 998         default:
 999                 qnum = -1;
1000                 break;
1001         }
1002
1003         return qnum;
1004 }
1005
1006 /* XXX: Remove me once we don't depend on ath9k_channel for all
1007  * this redundant data */
1008 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1009                            struct ath9k_channel *ichan)
1010 {
1011         struct ieee80211_channel *chan = hw->conf.channel;
1012         struct ieee80211_conf *conf = &hw->conf;
1013
1014         ichan->channel = chan->center_freq;
1015         ichan->chan = chan;
1016
1017         if (chan->band == IEEE80211_BAND_2GHZ) {
1018                 ichan->chanmode = CHANNEL_G;
1019                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1020         } else {
1021                 ichan->chanmode = CHANNEL_A;
1022                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1023         }
1024
1025         if (conf_is_ht(conf))
1026                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1027                                             conf->channel_type);
1028 }
1029
1030 /**********************/
1031 /* mac80211 callbacks */
1032 /**********************/
1033
1034 static int ath9k_start(struct ieee80211_hw *hw)
1035 {
1036         struct ath_wiphy *aphy = hw->priv;
1037         struct ath_softc *sc = aphy->sc;
1038         struct ath_hw *ah = sc->sc_ah;
1039         struct ath_common *common = ath9k_hw_common(ah);
1040         struct ieee80211_channel *curchan = hw->conf.channel;
1041         struct ath9k_channel *init_channel;
1042         int r;
1043
1044         ath_print(common, ATH_DBG_CONFIG,
1045                   "Starting driver with initial channel: %d MHz\n",
1046                   curchan->center_freq);
1047
1048         mutex_lock(&sc->mutex);
1049
1050         if (ath9k_wiphy_started(sc)) {
1051                 if (sc->chan_idx == curchan->hw_value) {
1052                         /*
1053                          * Already on the operational channel, the new wiphy
1054                          * can be marked active.
1055                          */
1056                         aphy->state = ATH_WIPHY_ACTIVE;
1057                         ieee80211_wake_queues(hw);
1058                 } else {
1059                         /*
1060                          * Another wiphy is on another channel, start the new
1061                          * wiphy in paused state.
1062                          */
1063                         aphy->state = ATH_WIPHY_PAUSED;
1064                         ieee80211_stop_queues(hw);
1065                 }
1066                 mutex_unlock(&sc->mutex);
1067                 return 0;
1068         }
1069         aphy->state = ATH_WIPHY_ACTIVE;
1070
1071         /* setup initial channel */
1072
1073         sc->chan_idx = curchan->hw_value;
1074
1075         init_channel = ath_get_curchannel(sc, hw);
1076
1077         /* Reset SERDES registers */
1078         ath9k_hw_configpcipowersave(ah, 0, 0);
1079
1080         /*
1081          * The basic interface to setting the hardware in a good
1082          * state is ``reset''.  On return the hardware is known to
1083          * be powered up and with interrupts disabled.  This must
1084          * be followed by initialization of the appropriate bits
1085          * and then setup of the interrupt mask.
1086          */
1087         spin_lock_bh(&sc->sc_resetlock);
1088         r = ath9k_hw_reset(ah, init_channel, false);
1089         if (r) {
1090                 ath_print(common, ATH_DBG_FATAL,
1091                           "Unable to reset hardware; reset status %d "
1092                           "(freq %u MHz)\n", r,
1093                           curchan->center_freq);
1094                 spin_unlock_bh(&sc->sc_resetlock);
1095                 goto mutex_unlock;
1096         }
1097         spin_unlock_bh(&sc->sc_resetlock);
1098
1099         /*
1100          * This is needed only to setup initial state
1101          * but it's best done after a reset.
1102          */
1103         ath_update_txpow(sc);
1104
1105         /*
1106          * Setup the hardware after reset:
1107          * The receive engine is set going.
1108          * Frame transmit is handled entirely
1109          * in the frame output path; there's nothing to do
1110          * here except setup the interrupt mask.
1111          */
1112         if (ath_startrecv(sc) != 0) {
1113                 ath_print(common, ATH_DBG_FATAL,
1114                           "Unable to start recv logic\n");
1115                 r = -EIO;
1116                 goto mutex_unlock;
1117         }
1118
1119         /* Setup our intr mask. */
1120         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1121                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1122                     ATH9K_INT_GLOBAL;
1123
1124         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1125                 ah->imask |= ATH9K_INT_RXHP |
1126                              ATH9K_INT_RXLP |
1127                              ATH9K_INT_BB_WATCHDOG;
1128         else
1129                 ah->imask |= ATH9K_INT_RX;
1130
1131         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1132                 ah->imask |= ATH9K_INT_GTT;
1133
1134         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1135                 ah->imask |= ATH9K_INT_CST;
1136
1137         ath_cache_conf_rate(sc, &hw->conf);
1138
1139         sc->sc_flags &= ~SC_OP_INVALID;
1140
1141         /* Disable BMISS interrupt when we're not associated */
1142         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1143         ath9k_hw_set_interrupts(ah, ah->imask);
1144
1145         ieee80211_wake_queues(hw);
1146
1147         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1148
1149         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1150             !ah->btcoex_hw.enabled) {
1151                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1152                                            AR_STOMP_LOW_WLAN_WGHT);
1153                 ath9k_hw_btcoex_enable(ah);
1154
1155                 if (common->bus_ops->bt_coex_prep)
1156                         common->bus_ops->bt_coex_prep(common);
1157                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1158                         ath9k_btcoex_timer_resume(sc);
1159         }
1160
1161 mutex_unlock:
1162         mutex_unlock(&sc->mutex);
1163
1164         return r;
1165 }
1166
1167 static int ath9k_tx(struct ieee80211_hw *hw,
1168                     struct sk_buff *skb)
1169 {
1170         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1171         struct ath_wiphy *aphy = hw->priv;
1172         struct ath_softc *sc = aphy->sc;
1173         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1174         struct ath_tx_control txctl;
1175         int padpos, padsize;
1176         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1177         int qnum;
1178
1179         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1180                 ath_print(common, ATH_DBG_XMIT,
1181                           "ath9k: %s: TX in unexpected wiphy state "
1182                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1183                 goto exit;
1184         }
1185
1186         if (sc->ps_enabled) {
1187                 /*
1188                  * mac80211 does not set PM field for normal data frames, so we
1189                  * need to update that based on the current PS mode.
1190                  */
1191                 if (ieee80211_is_data(hdr->frame_control) &&
1192                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1193                     !ieee80211_has_pm(hdr->frame_control)) {
1194                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1195                                   "while in PS mode\n");
1196                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1197                 }
1198         }
1199
1200         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1201                 /*
1202                  * We are using PS-Poll and mac80211 can request TX while in
1203                  * power save mode. Need to wake up hardware for the TX to be
1204                  * completed and if needed, also for RX of buffered frames.
1205                  */
1206                 ath9k_ps_wakeup(sc);
1207                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1208                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1209                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1210                         ath_print(common, ATH_DBG_PS,
1211                                   "Sending PS-Poll to pick a buffered frame\n");
1212                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1213                 } else {
1214                         ath_print(common, ATH_DBG_PS,
1215                                   "Wake up to complete TX\n");
1216                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1217                 }
1218                 /*
1219                  * The actual restore operation will happen only after
1220                  * the sc_flags bit is cleared. We are just dropping
1221                  * the ps_usecount here.
1222                  */
1223                 ath9k_ps_restore(sc);
1224         }
1225
1226         memset(&txctl, 0, sizeof(struct ath_tx_control));
1227
1228         /*
1229          * As a temporary workaround, assign seq# here; this will likely need
1230          * to be cleaned up to work better with Beacon transmission and virtual
1231          * BSSes.
1232          */
1233         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1234                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1235                         sc->tx.seq_no += 0x10;
1236                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1237                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1238         }
1239
1240         /* Add the padding after the header if this is not already done */
1241         padpos = ath9k_cmn_padpos(hdr->frame_control);
1242         padsize = padpos & 3;
1243         if (padsize && skb->len>padpos) {
1244                 if (skb_headroom(skb) < padsize)
1245                         return -1;
1246                 skb_push(skb, padsize);
1247                 memmove(skb->data, skb->data + padsize, padpos);
1248         }
1249
1250         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1251         txctl.txq = &sc->tx.txq[qnum];
1252
1253         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1254
1255         if (ath_tx_start(hw, skb, &txctl) != 0) {
1256                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1257                 goto exit;
1258         }
1259
1260         return 0;
1261 exit:
1262         dev_kfree_skb_any(skb);
1263         return 0;
1264 }
1265
1266 static void ath9k_stop(struct ieee80211_hw *hw)
1267 {
1268         struct ath_wiphy *aphy = hw->priv;
1269         struct ath_softc *sc = aphy->sc;
1270         struct ath_hw *ah = sc->sc_ah;
1271         struct ath_common *common = ath9k_hw_common(ah);
1272         int i;
1273
1274         mutex_lock(&sc->mutex);
1275
1276         aphy->state = ATH_WIPHY_INACTIVE;
1277
1278         if (led_blink)
1279                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1280
1281         cancel_delayed_work_sync(&sc->tx_complete_work);
1282         cancel_work_sync(&sc->paprd_work);
1283         cancel_work_sync(&sc->hw_check_work);
1284
1285         for (i = 0; i < sc->num_sec_wiphy; i++) {
1286                 if (sc->sec_wiphy[i])
1287                         break;
1288         }
1289
1290         if (i == sc->num_sec_wiphy) {
1291                 cancel_delayed_work_sync(&sc->wiphy_work);
1292                 cancel_work_sync(&sc->chan_work);
1293         }
1294
1295         if (sc->sc_flags & SC_OP_INVALID) {
1296                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1297                 mutex_unlock(&sc->mutex);
1298                 return;
1299         }
1300
1301         if (ath9k_wiphy_started(sc)) {
1302                 mutex_unlock(&sc->mutex);
1303                 return; /* another wiphy still in use */
1304         }
1305
1306         /* Ensure HW is awake when we try to shut it down. */
1307         ath9k_ps_wakeup(sc);
1308
1309         if (ah->btcoex_hw.enabled) {
1310                 ath9k_hw_btcoex_disable(ah);
1311                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1312                         ath9k_btcoex_timer_pause(sc);
1313         }
1314
1315         /* make sure h/w will not generate any interrupt
1316          * before setting the invalid flag. */
1317         ath9k_hw_set_interrupts(ah, 0);
1318
1319         if (!(sc->sc_flags & SC_OP_INVALID)) {
1320                 ath_drain_all_txq(sc, false);
1321                 ath_stoprecv(sc);
1322                 ath9k_hw_phy_disable(ah);
1323         } else
1324                 sc->rx.rxlink = NULL;
1325
1326         /* disable HAL and put h/w to sleep */
1327         ath9k_hw_disable(ah);
1328         ath9k_hw_configpcipowersave(ah, 1, 1);
1329         ath9k_ps_restore(sc);
1330
1331         /* Finally, put the chip in FULL SLEEP mode */
1332         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1333
1334         sc->sc_flags |= SC_OP_INVALID;
1335
1336         mutex_unlock(&sc->mutex);
1337
1338         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1339 }
1340
1341 static int ath9k_add_interface(struct ieee80211_hw *hw,
1342                                struct ieee80211_vif *vif)
1343 {
1344         struct ath_wiphy *aphy = hw->priv;
1345         struct ath_softc *sc = aphy->sc;
1346         struct ath_hw *ah = sc->sc_ah;
1347         struct ath_common *common = ath9k_hw_common(ah);
1348         struct ath_vif *avp = (void *)vif->drv_priv;
1349         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1350         int ret = 0;
1351
1352         mutex_lock(&sc->mutex);
1353
1354         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1355             sc->nvifs > 0) {
1356                 ret = -ENOBUFS;
1357                 goto out;
1358         }
1359
1360         switch (vif->type) {
1361         case NL80211_IFTYPE_STATION:
1362                 ic_opmode = NL80211_IFTYPE_STATION;
1363                 break;
1364         case NL80211_IFTYPE_ADHOC:
1365         case NL80211_IFTYPE_AP:
1366         case NL80211_IFTYPE_MESH_POINT:
1367                 if (sc->nbcnvifs >= ATH_BCBUF) {
1368                         ret = -ENOBUFS;
1369                         goto out;
1370                 }
1371                 ic_opmode = vif->type;
1372                 break;
1373         default:
1374                 ath_print(common, ATH_DBG_FATAL,
1375                         "Interface type %d not yet supported\n", vif->type);
1376                 ret = -EOPNOTSUPP;
1377                 goto out;
1378         }
1379
1380         ath_print(common, ATH_DBG_CONFIG,
1381                   "Attach a VIF of type: %d\n", ic_opmode);
1382
1383         /* Set the VIF opmode */
1384         avp->av_opmode = ic_opmode;
1385         avp->av_bslot = -1;
1386
1387         sc->nvifs++;
1388
1389         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1390                 ath9k_set_bssid_mask(hw);
1391
1392         if (sc->nvifs > 1)
1393                 goto out; /* skip global settings for secondary vif */
1394
1395         if (ic_opmode == NL80211_IFTYPE_AP) {
1396                 ath9k_hw_set_tsfadjust(ah, 1);
1397                 sc->sc_flags |= SC_OP_TSF_RESET;
1398         }
1399
1400         /* Set the device opmode */
1401         ah->opmode = ic_opmode;
1402
1403         /*
1404          * Enable MIB interrupts when there are hardware phy counters.
1405          * Note we only do this (at the moment) for station mode.
1406          */
1407         if ((vif->type == NL80211_IFTYPE_STATION) ||
1408             (vif->type == NL80211_IFTYPE_ADHOC) ||
1409             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1410                 if (ah->config.enable_ani)
1411                         ah->imask |= ATH9K_INT_MIB;
1412                 ah->imask |= ATH9K_INT_TSFOOR;
1413         }
1414
1415         ath9k_hw_set_interrupts(ah, ah->imask);
1416
1417         if (vif->type == NL80211_IFTYPE_AP    ||
1418             vif->type == NL80211_IFTYPE_ADHOC ||
1419             vif->type == NL80211_IFTYPE_MONITOR) {
1420                 sc->sc_flags |= SC_OP_ANI_RUN;
1421                 ath_start_ani(common);
1422         }
1423
1424 out:
1425         mutex_unlock(&sc->mutex);
1426         return ret;
1427 }
1428
1429 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1430                                    struct ieee80211_vif *vif)
1431 {
1432         struct ath_wiphy *aphy = hw->priv;
1433         struct ath_softc *sc = aphy->sc;
1434         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1435         struct ath_vif *avp = (void *)vif->drv_priv;
1436         int i;
1437
1438         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1439
1440         mutex_lock(&sc->mutex);
1441
1442         /* Stop ANI */
1443         sc->sc_flags &= ~SC_OP_ANI_RUN;
1444         del_timer_sync(&common->ani.timer);
1445
1446         /* Reclaim beacon resources */
1447         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1448             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1449             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1450                 ath9k_ps_wakeup(sc);
1451                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1452                 ath9k_ps_restore(sc);
1453         }
1454
1455         ath_beacon_return(sc, avp);
1456         sc->sc_flags &= ~SC_OP_BEACONS;
1457
1458         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1459                 if (sc->beacon.bslot[i] == vif) {
1460                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1461                                "slot\n", __func__);
1462                         sc->beacon.bslot[i] = NULL;
1463                         sc->beacon.bslot_aphy[i] = NULL;
1464                 }
1465         }
1466
1467         sc->nvifs--;
1468
1469         mutex_unlock(&sc->mutex);
1470 }
1471
1472 void ath9k_enable_ps(struct ath_softc *sc)
1473 {
1474         struct ath_hw *ah = sc->sc_ah;
1475
1476         sc->ps_enabled = true;
1477         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1478                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1479                         ah->imask |= ATH9K_INT_TIM_TIMER;
1480                         ath9k_hw_set_interrupts(ah, ah->imask);
1481                 }
1482                 ath9k_hw_setrxabort(ah, 1);
1483         }
1484 }
1485
1486 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1487 {
1488         struct ath_wiphy *aphy = hw->priv;
1489         struct ath_softc *sc = aphy->sc;
1490         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1491         struct ieee80211_conf *conf = &hw->conf;
1492         struct ath_hw *ah = sc->sc_ah;
1493         bool disable_radio;
1494
1495         mutex_lock(&sc->mutex);
1496
1497         /*
1498          * Leave this as the first check because we need to turn on the
1499          * radio if it was disabled before prior to processing the rest
1500          * of the changes. Likewise we must only disable the radio towards
1501          * the end.
1502          */
1503         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1504                 bool enable_radio;
1505                 bool all_wiphys_idle;
1506                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1507
1508                 spin_lock_bh(&sc->wiphy_lock);
1509                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1510                 ath9k_set_wiphy_idle(aphy, idle);
1511
1512                 enable_radio = (!idle && all_wiphys_idle);
1513
1514                 /*
1515                  * After we unlock here its possible another wiphy
1516                  * can be re-renabled so to account for that we will
1517                  * only disable the radio toward the end of this routine
1518                  * if by then all wiphys are still idle.
1519                  */
1520                 spin_unlock_bh(&sc->wiphy_lock);
1521
1522                 if (enable_radio) {
1523                         sc->ps_idle = false;
1524                         ath_radio_enable(sc, hw);
1525                         ath_print(common, ATH_DBG_CONFIG,
1526                                   "not-idle: enabling radio\n");
1527                 }
1528         }
1529
1530         /*
1531          * We just prepare to enable PS. We have to wait until our AP has
1532          * ACK'd our null data frame to disable RX otherwise we'll ignore
1533          * those ACKs and end up retransmitting the same null data frames.
1534          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1535          */
1536         if (changed & IEEE80211_CONF_CHANGE_PS) {
1537                 if (conf->flags & IEEE80211_CONF_PS) {
1538                         sc->ps_flags |= PS_ENABLED;
1539                         /*
1540                          * At this point we know hardware has received an ACK
1541                          * of a previously sent null data frame.
1542                          */
1543                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1544                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1545                                 ath9k_enable_ps(sc);
1546                         }
1547                 } else {
1548                         sc->ps_enabled = false;
1549                         sc->ps_flags &= ~(PS_ENABLED |
1550                                           PS_NULLFUNC_COMPLETED);
1551                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1552                         if (!(ah->caps.hw_caps &
1553                               ATH9K_HW_CAP_AUTOSLEEP)) {
1554                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1555                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1556                                                   PS_WAIT_FOR_CAB |
1557                                                   PS_WAIT_FOR_PSPOLL_DATA |
1558                                                   PS_WAIT_FOR_TX_ACK);
1559                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1560                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1561                                         ath9k_hw_set_interrupts(sc->sc_ah,
1562                                                         ah->imask);
1563                                 }
1564                         }
1565                 }
1566         }
1567
1568         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1569                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1570                         ath_print(common, ATH_DBG_CONFIG,
1571                                   "HW opmode set to Monitor mode\n");
1572                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1573                 }
1574         }
1575
1576         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1577                 struct ieee80211_channel *curchan = hw->conf.channel;
1578                 int pos = curchan->hw_value;
1579
1580                 aphy->chan_idx = pos;
1581                 aphy->chan_is_ht = conf_is_ht(conf);
1582
1583                 if (aphy->state == ATH_WIPHY_SCAN ||
1584                     aphy->state == ATH_WIPHY_ACTIVE)
1585                         ath9k_wiphy_pause_all_forced(sc, aphy);
1586                 else {
1587                         /*
1588                          * Do not change operational channel based on a paused
1589                          * wiphy changes.
1590                          */
1591                         goto skip_chan_change;
1592                 }
1593
1594                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1595                           curchan->center_freq);
1596
1597                 /* XXX: remove me eventualy */
1598                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1599
1600                 ath_update_chainmask(sc, conf_is_ht(conf));
1601
1602                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1603                         ath_print(common, ATH_DBG_FATAL,
1604                                   "Unable to set channel\n");
1605                         mutex_unlock(&sc->mutex);
1606                         return -EINVAL;
1607                 }
1608         }
1609
1610 skip_chan_change:
1611         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1612                 sc->config.txpowlimit = 2 * conf->power_level;
1613                 ath_update_txpow(sc);
1614         }
1615
1616         spin_lock_bh(&sc->wiphy_lock);
1617         disable_radio = ath9k_all_wiphys_idle(sc);
1618         spin_unlock_bh(&sc->wiphy_lock);
1619
1620         if (disable_radio) {
1621                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1622                 sc->ps_idle = true;
1623                 ath_radio_disable(sc, hw);
1624         }
1625
1626         mutex_unlock(&sc->mutex);
1627
1628         return 0;
1629 }
1630
1631 #define SUPPORTED_FILTERS                       \
1632         (FIF_PROMISC_IN_BSS |                   \
1633         FIF_ALLMULTI |                          \
1634         FIF_CONTROL |                           \
1635         FIF_PSPOLL |                            \
1636         FIF_OTHER_BSS |                         \
1637         FIF_BCN_PRBRESP_PROMISC |               \
1638         FIF_FCSFAIL)
1639
1640 /* FIXME: sc->sc_full_reset ? */
1641 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1642                                    unsigned int changed_flags,
1643                                    unsigned int *total_flags,
1644                                    u64 multicast)
1645 {
1646         struct ath_wiphy *aphy = hw->priv;
1647         struct ath_softc *sc = aphy->sc;
1648         u32 rfilt;
1649
1650         changed_flags &= SUPPORTED_FILTERS;
1651         *total_flags &= SUPPORTED_FILTERS;
1652
1653         sc->rx.rxfilter = *total_flags;
1654         ath9k_ps_wakeup(sc);
1655         rfilt = ath_calcrxfilter(sc);
1656         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1657         ath9k_ps_restore(sc);
1658
1659         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1660                   "Set HW RX filter: 0x%x\n", rfilt);
1661 }
1662
1663 static int ath9k_sta_add(struct ieee80211_hw *hw,
1664                          struct ieee80211_vif *vif,
1665                          struct ieee80211_sta *sta)
1666 {
1667         struct ath_wiphy *aphy = hw->priv;
1668         struct ath_softc *sc = aphy->sc;
1669
1670         ath_node_attach(sc, sta);
1671
1672         return 0;
1673 }
1674
1675 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1676                             struct ieee80211_vif *vif,
1677                             struct ieee80211_sta *sta)
1678 {
1679         struct ath_wiphy *aphy = hw->priv;
1680         struct ath_softc *sc = aphy->sc;
1681
1682         ath_node_detach(sc, sta);
1683
1684         return 0;
1685 }
1686
1687 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1688                          const struct ieee80211_tx_queue_params *params)
1689 {
1690         struct ath_wiphy *aphy = hw->priv;
1691         struct ath_softc *sc = aphy->sc;
1692         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1693         struct ath9k_tx_queue_info qi;
1694         int ret = 0, qnum;
1695
1696         if (queue >= WME_NUM_AC)
1697                 return 0;
1698
1699         mutex_lock(&sc->mutex);
1700
1701         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1702
1703         qi.tqi_aifs = params->aifs;
1704         qi.tqi_cwmin = params->cw_min;
1705         qi.tqi_cwmax = params->cw_max;
1706         qi.tqi_burstTime = params->txop;
1707         qnum = ath_get_hal_qnum(queue, sc);
1708
1709         ath_print(common, ATH_DBG_CONFIG,
1710                   "Configure tx [queue/halq] [%d/%d],  "
1711                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1712                   queue, qnum, params->aifs, params->cw_min,
1713                   params->cw_max, params->txop);
1714
1715         ret = ath_txq_update(sc, qnum, &qi);
1716         if (ret)
1717                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1718
1719         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1720                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1721                         ath_beaconq_config(sc);
1722
1723         mutex_unlock(&sc->mutex);
1724
1725         return ret;
1726 }
1727
1728 static int ath9k_set_key(struct ieee80211_hw *hw,
1729                          enum set_key_cmd cmd,
1730                          struct ieee80211_vif *vif,
1731                          struct ieee80211_sta *sta,
1732                          struct ieee80211_key_conf *key)
1733 {
1734         struct ath_wiphy *aphy = hw->priv;
1735         struct ath_softc *sc = aphy->sc;
1736         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1737         int ret = 0;
1738
1739         if (modparam_nohwcrypt)
1740                 return -ENOSPC;
1741
1742         mutex_lock(&sc->mutex);
1743         ath9k_ps_wakeup(sc);
1744         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1745
1746         switch (cmd) {
1747         case SET_KEY:
1748                 ret = ath9k_cmn_key_config(common, vif, sta, key);
1749                 if (ret >= 0) {
1750                         key->hw_key_idx = ret;
1751                         /* push IV and Michael MIC generation to stack */
1752                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1753                         if (key->alg == ALG_TKIP)
1754                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1755                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1756                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1757                         ret = 0;
1758                 }
1759                 break;
1760         case DISABLE_KEY:
1761                 ath9k_cmn_key_delete(common, key);
1762                 break;
1763         default:
1764                 ret = -EINVAL;
1765         }
1766
1767         ath9k_ps_restore(sc);
1768         mutex_unlock(&sc->mutex);
1769
1770         return ret;
1771 }
1772
1773 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1774                                    struct ieee80211_vif *vif,
1775                                    struct ieee80211_bss_conf *bss_conf,
1776                                    u32 changed)
1777 {
1778         struct ath_wiphy *aphy = hw->priv;
1779         struct ath_softc *sc = aphy->sc;
1780         struct ath_hw *ah = sc->sc_ah;
1781         struct ath_common *common = ath9k_hw_common(ah);
1782         struct ath_vif *avp = (void *)vif->drv_priv;
1783         int slottime;
1784         int error;
1785
1786         mutex_lock(&sc->mutex);
1787
1788         if (changed & BSS_CHANGED_BSSID) {
1789                 /* Set BSSID */
1790                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1791                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1792                 common->curaid = 0;
1793                 ath9k_hw_write_associd(ah);
1794
1795                 /* Set aggregation protection mode parameters */
1796                 sc->config.ath_aggr_prot = 0;
1797
1798                 /* Only legacy IBSS for now */
1799                 if (vif->type == NL80211_IFTYPE_ADHOC)
1800                         ath_update_chainmask(sc, 0);
1801
1802                 ath_print(common, ATH_DBG_CONFIG,
1803                           "BSSID: %pM aid: 0x%x\n",
1804                           common->curbssid, common->curaid);
1805
1806                 /* need to reconfigure the beacon */
1807                 sc->sc_flags &= ~SC_OP_BEACONS ;
1808         }
1809
1810         /* Enable transmission of beacons (AP, IBSS, MESH) */
1811         if ((changed & BSS_CHANGED_BEACON) ||
1812             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1813                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1814                 error = ath_beacon_alloc(aphy, vif);
1815                 if (!error)
1816                         ath_beacon_config(sc, vif);
1817         }
1818
1819         if (changed & BSS_CHANGED_ERP_SLOT) {
1820                 if (bss_conf->use_short_slot)
1821                         slottime = 9;
1822                 else
1823                         slottime = 20;
1824                 if (vif->type == NL80211_IFTYPE_AP) {
1825                         /*
1826                          * Defer update, so that connected stations can adjust
1827                          * their settings at the same time.
1828                          * See beacon.c for more details
1829                          */
1830                         sc->beacon.slottime = slottime;
1831                         sc->beacon.updateslot = UPDATE;
1832                 } else {
1833                         ah->slottime = slottime;
1834                         ath9k_hw_init_global_settings(ah);
1835                 }
1836         }
1837
1838         /* Disable transmission of beacons */
1839         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1840                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1841
1842         if (changed & BSS_CHANGED_BEACON_INT) {
1843                 sc->beacon_interval = bss_conf->beacon_int;
1844                 /*
1845                  * In case of AP mode, the HW TSF has to be reset
1846                  * when the beacon interval changes.
1847                  */
1848                 if (vif->type == NL80211_IFTYPE_AP) {
1849                         sc->sc_flags |= SC_OP_TSF_RESET;
1850                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1851                         error = ath_beacon_alloc(aphy, vif);
1852                         if (!error)
1853                                 ath_beacon_config(sc, vif);
1854                 } else {
1855                         ath_beacon_config(sc, vif);
1856                 }
1857         }
1858
1859         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1860                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1861                           bss_conf->use_short_preamble);
1862                 if (bss_conf->use_short_preamble)
1863                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1864                 else
1865                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1866         }
1867
1868         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1869                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1870                           bss_conf->use_cts_prot);
1871                 if (bss_conf->use_cts_prot &&
1872                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1873                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1874                 else
1875                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1876         }
1877
1878         if (changed & BSS_CHANGED_ASSOC) {
1879                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1880                         bss_conf->assoc);
1881                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1882         }
1883
1884         mutex_unlock(&sc->mutex);
1885 }
1886
1887 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1888 {
1889         u64 tsf;
1890         struct ath_wiphy *aphy = hw->priv;
1891         struct ath_softc *sc = aphy->sc;
1892
1893         mutex_lock(&sc->mutex);
1894         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1895         mutex_unlock(&sc->mutex);
1896
1897         return tsf;
1898 }
1899
1900 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1901 {
1902         struct ath_wiphy *aphy = hw->priv;
1903         struct ath_softc *sc = aphy->sc;
1904
1905         mutex_lock(&sc->mutex);
1906         ath9k_hw_settsf64(sc->sc_ah, tsf);
1907         mutex_unlock(&sc->mutex);
1908 }
1909
1910 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1911 {
1912         struct ath_wiphy *aphy = hw->priv;
1913         struct ath_softc *sc = aphy->sc;
1914
1915         mutex_lock(&sc->mutex);
1916
1917         ath9k_ps_wakeup(sc);
1918         ath9k_hw_reset_tsf(sc->sc_ah);
1919         ath9k_ps_restore(sc);
1920
1921         mutex_unlock(&sc->mutex);
1922 }
1923
1924 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1925                               struct ieee80211_vif *vif,
1926                               enum ieee80211_ampdu_mlme_action action,
1927                               struct ieee80211_sta *sta,
1928                               u16 tid, u16 *ssn)
1929 {
1930         struct ath_wiphy *aphy = hw->priv;
1931         struct ath_softc *sc = aphy->sc;
1932         int ret = 0;
1933
1934         local_bh_disable();
1935
1936         switch (action) {
1937         case IEEE80211_AMPDU_RX_START:
1938                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1939                         ret = -ENOTSUPP;
1940                 break;
1941         case IEEE80211_AMPDU_RX_STOP:
1942                 break;
1943         case IEEE80211_AMPDU_TX_START:
1944                 ath9k_ps_wakeup(sc);
1945                 ath_tx_aggr_start(sc, sta, tid, ssn);
1946                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1947                 ath9k_ps_restore(sc);
1948                 break;
1949         case IEEE80211_AMPDU_TX_STOP:
1950                 ath9k_ps_wakeup(sc);
1951                 ath_tx_aggr_stop(sc, sta, tid);
1952                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1953                 ath9k_ps_restore(sc);
1954                 break;
1955         case IEEE80211_AMPDU_TX_OPERATIONAL:
1956                 ath9k_ps_wakeup(sc);
1957                 ath_tx_aggr_resume(sc, sta, tid);
1958                 ath9k_ps_restore(sc);
1959                 break;
1960         default:
1961                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1962                           "Unknown AMPDU action\n");
1963         }
1964
1965         local_bh_enable();
1966
1967         return ret;
1968 }
1969
1970 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1971                              struct survey_info *survey)
1972 {
1973         struct ath_wiphy *aphy = hw->priv;
1974         struct ath_softc *sc = aphy->sc;
1975         struct ath_hw *ah = sc->sc_ah;
1976         struct ath_common *common = ath9k_hw_common(ah);
1977         struct ieee80211_conf *conf = &hw->conf;
1978
1979          if (idx != 0)
1980                 return -ENOENT;
1981
1982         survey->channel = conf->channel;
1983         survey->filled = SURVEY_INFO_NOISE_DBM;
1984         survey->noise = common->ani.noise_floor;
1985
1986         return 0;
1987 }
1988
1989 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1990 {
1991         struct ath_wiphy *aphy = hw->priv;
1992         struct ath_softc *sc = aphy->sc;
1993         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1994
1995         mutex_lock(&sc->mutex);
1996         if (ath9k_wiphy_scanning(sc)) {
1997                 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
1998                        "same time\n");
1999                 /*
2000                  * Do not allow the concurrent scanning state for now. This
2001                  * could be improved with scanning control moved into ath9k.
2002                  */
2003                 mutex_unlock(&sc->mutex);
2004                 return;
2005         }
2006
2007         aphy->state = ATH_WIPHY_SCAN;
2008         ath9k_wiphy_pause_all_forced(sc, aphy);
2009         sc->sc_flags |= SC_OP_SCANNING;
2010         del_timer_sync(&common->ani.timer);
2011         cancel_work_sync(&sc->paprd_work);
2012         cancel_work_sync(&sc->hw_check_work);
2013         cancel_delayed_work_sync(&sc->tx_complete_work);
2014         mutex_unlock(&sc->mutex);
2015 }
2016
2017 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2018 {
2019         struct ath_wiphy *aphy = hw->priv;
2020         struct ath_softc *sc = aphy->sc;
2021         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2022
2023         mutex_lock(&sc->mutex);
2024         aphy->state = ATH_WIPHY_ACTIVE;
2025         sc->sc_flags &= ~SC_OP_SCANNING;
2026         sc->sc_flags |= SC_OP_FULL_RESET;
2027         ath_start_ani(common);
2028         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2029         ath_beacon_config(sc, NULL);
2030         mutex_unlock(&sc->mutex);
2031 }
2032
2033 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2034 {
2035         struct ath_wiphy *aphy = hw->priv;
2036         struct ath_softc *sc = aphy->sc;
2037         struct ath_hw *ah = sc->sc_ah;
2038
2039         mutex_lock(&sc->mutex);
2040         ah->coverage_class = coverage_class;
2041         ath9k_hw_init_global_settings(ah);
2042         mutex_unlock(&sc->mutex);
2043 }
2044
2045 struct ieee80211_ops ath9k_ops = {
2046         .tx                 = ath9k_tx,
2047         .start              = ath9k_start,
2048         .stop               = ath9k_stop,
2049         .add_interface      = ath9k_add_interface,
2050         .remove_interface   = ath9k_remove_interface,
2051         .config             = ath9k_config,
2052         .configure_filter   = ath9k_configure_filter,
2053         .sta_add            = ath9k_sta_add,
2054         .sta_remove         = ath9k_sta_remove,
2055         .conf_tx            = ath9k_conf_tx,
2056         .bss_info_changed   = ath9k_bss_info_changed,
2057         .set_key            = ath9k_set_key,
2058         .get_tsf            = ath9k_get_tsf,
2059         .set_tsf            = ath9k_set_tsf,
2060         .reset_tsf          = ath9k_reset_tsf,
2061         .ampdu_action       = ath9k_ampdu_action,
2062         .get_survey         = ath9k_get_survey,
2063         .sw_scan_start      = ath9k_sw_scan_start,
2064         .sw_scan_complete   = ath9k_sw_scan_complete,
2065         .rfkill_poll        = ath9k_rfkill_poll_state,
2066         .set_coverage_class = ath9k_set_coverage_class,
2067 };