arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define CR0_RESERVED_BITS                                               \
  64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  67 #define CR4_RESERVED_BITS                                               \
  68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  71                           | X86_CR4_OSXSAVE \
  72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  73
  74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  75
  76 #define KVM_MAX_MCE_BANKS 32
  77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  94                                     struct kvm_cpuid_entry2 __user *entries);
  95
  96 struct kvm_x86_ops *kvm_x86_ops;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 int ignore_msrs = 0;
 100 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 #define KVM_NR_SHARED_MSRS 16
 103
 104 struct kvm_shared_msrs_global {
 105         int nr;
 106         u32 msrs[KVM_NR_SHARED_MSRS];
 107 };
 108
 109 struct kvm_shared_msrs {
 110         struct user_return_notifier urn;
 111         bool registered;
 112         struct kvm_shared_msr_values {
 113                 u64 host;
 114                 u64 curr;
 115         } values[KVM_NR_SHARED_MSRS];
 116 };
 117
 118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 119 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 120
 121 struct kvm_stats_debugfs_item debugfs_entries[] = {
 122         { "pf_fixed", VCPU_STAT(pf_fixed) },
 123         { "pf_guest", VCPU_STAT(pf_guest) },
 124         { "tlb_flush", VCPU_STAT(tlb_flush) },
 125         { "invlpg", VCPU_STAT(invlpg) },
 126         { "exits", VCPU_STAT(exits) },
 127         { "io_exits", VCPU_STAT(io_exits) },
 128         { "mmio_exits", VCPU_STAT(mmio_exits) },
 129         { "signal_exits", VCPU_STAT(signal_exits) },
 130         { "irq_window", VCPU_STAT(irq_window_exits) },
 131         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 132         { "halt_exits", VCPU_STAT(halt_exits) },
 133         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 134         { "hypercalls", VCPU_STAT(hypercalls) },
 135         { "request_irq", VCPU_STAT(request_irq_exits) },
 136         { "irq_exits", VCPU_STAT(irq_exits) },
 137         { "host_state_reload", VCPU_STAT(host_state_reload) },
 138         { "efer_reload", VCPU_STAT(efer_reload) },
 139         { "fpu_reload", VCPU_STAT(fpu_reload) },
 140         { "insn_emulation", VCPU_STAT(insn_emulation) },
 141         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 142         { "irq_injections", VCPU_STAT(irq_injections) },
 143         { "nmi_injections", VCPU_STAT(nmi_injections) },
 144         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 145         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 146         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 147         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 148         { "mmu_flooded", VM_STAT(mmu_flooded) },
 149         { "mmu_recycled", VM_STAT(mmu_recycled) },
 150         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 151         { "mmu_unsync", VM_STAT(mmu_unsync) },
 152         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 153         { "largepages", VM_STAT(lpages) },
 154         { NULL }
 155 };
 156
 157 u64 __read_mostly host_xcr0;
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 338 {
 339         if (err)
 340                 kvm_inject_gp(vcpu, 0);
 341         else
 342                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 345
 346 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 347 {
 348         ++vcpu->stat.pf_guest;
 349         vcpu->arch.cr2 = fault->address;
 350         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 351 }
 352
 353 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 354 {
 355         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 356                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 357         else
 358                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 359 }
 360
 361 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 362 {
 363         kvm_make_request(KVM_REQ_EVENT, vcpu);
 364         vcpu->arch.nmi_pending = 1;
 365 }
 366 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 367
 368 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 369 {
 370         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 371 }
 372 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 373
 374 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 375 {
 376         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 377 }
 378 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 379
 380 /*
 381  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 382  * a #GP and return false.
 383  */
 384 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 385 {
 386         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 387                 return true;
 388         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 389         return false;
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 392
 393 /*
 394  * This function will be used to read from the physical memory of the currently
 395  * running guest. The difference to kvm_read_guest_page is that this function
 396  * can read from guest physical or from the guest's guest physical memory.
 397  */
 398 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 399                             gfn_t ngfn, void *data, int offset, int len,
 400                             u32 access)
 401 {
 402         gfn_t real_gfn;
 403         gpa_t ngpa;
 404
 405         ngpa     = gfn_to_gpa(ngfn);
 406         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 407         if (real_gfn == UNMAPPED_GVA)
 408                 return -EFAULT;
 409
 410         real_gfn = gpa_to_gfn(real_gfn);
 411
 412         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 413 }
 414 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 415
 416 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 417                                void *data, int offset, int len, u32 access)
 418 {
 419         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 420                                        data, offset, len, access);
 421 }
 422
 423 /*
 424  * Load the pae pdptrs.  Return true is they are all valid.
 425  */
 426 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 427 {
 428         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 429         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 430         int i;
 431         int ret;
 432         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 433
 434         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 435                                       offset * sizeof(u64), sizeof(pdpte),
 436                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 437         if (ret < 0) {
 438                 ret = 0;
 439                 goto out;
 440         }
 441         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 442                 if (is_present_gpte(pdpte[i]) &&
 443                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 444                         ret = 0;
 445                         goto out;
 446                 }
 447         }
 448         ret = 1;
 449
 450         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 451         __set_bit(VCPU_EXREG_PDPTR,
 452                   (unsigned long *)&vcpu->arch.regs_avail);
 453         __set_bit(VCPU_EXREG_PDPTR,
 454                   (unsigned long *)&vcpu->arch.regs_dirty);
 455 out:
 456
 457         return ret;
 458 }
 459 EXPORT_SYMBOL_GPL(load_pdptrs);
 460
 461 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 462 {
 463         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 464         bool changed = true;
 465         int offset;
 466         gfn_t gfn;
 467         int r;
 468
 469         if (is_long_mode(vcpu) || !is_pae(vcpu))
 470                 return false;
 471
 472         if (!test_bit(VCPU_EXREG_PDPTR,
 473                       (unsigned long *)&vcpu->arch.regs_avail))
 474                 return true;
 475
 476         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 477         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 478         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 479                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 480         if (r < 0)
 481                 goto out;
 482         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 483 out:
 484
 485         return changed;
 486 }
 487
 488 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 489 {
 490         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 491         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 492                                     X86_CR0_CD | X86_CR0_NW;
 493
 494         cr0 |= X86_CR0_ET;
 495
 496 #ifdef CONFIG_X86_64
 497         if (cr0 & 0xffffffff00000000UL)
 498                 return 1;
 499 #endif
 500
 501         cr0 &= ~CR0_RESERVED_BITS;
 502
 503         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 504                 return 1;
 505
 506         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 507                 return 1;
 508
 509         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 510 #ifdef CONFIG_X86_64
 511                 if ((vcpu->arch.efer & EFER_LME)) {
 512                         int cs_db, cs_l;
 513
 514                         if (!is_pae(vcpu))
 515                                 return 1;
 516                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 517                         if (cs_l)
 518                                 return 1;
 519                 } else
 520 #endif
 521                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 522                                                  kvm_read_cr3(vcpu)))
 523                         return 1;
 524         }
 525
 526         kvm_x86_ops->set_cr0(vcpu, cr0);
 527
 528         if ((cr0 ^ old_cr0) & X86_CR0_PG)
 529                 kvm_clear_async_pf_completion_queue(vcpu);
 530
 531         if ((cr0 ^ old_cr0) & update_bits)
 532                 kvm_mmu_reset_context(vcpu);
 533         return 0;
 534 }
 535 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 536
 537 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 538 {
 539         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_lmsw);
 542
 543 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 544 {
 545         u64 xcr0;
 546
 547         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 548         if (index != XCR_XFEATURE_ENABLED_MASK)
 549                 return 1;
 550         xcr0 = xcr;
 551         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 552                 return 1;
 553         if (!(xcr0 & XSTATE_FP))
 554                 return 1;
 555         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 556                 return 1;
 557         if (xcr0 & ~host_xcr0)
 558                 return 1;
 559         vcpu->arch.xcr0 = xcr0;
 560         vcpu->guest_xcr0_loaded = 0;
 561         return 0;
 562 }
 563
 564 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 565 {
 566         if (__kvm_set_xcr(vcpu, index, xcr)) {
 567                 kvm_inject_gp(vcpu, 0);
 568                 return 1;
 569         }
 570         return 0;
 571 }
 572 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 573
 574 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 575 {
 576         struct kvm_cpuid_entry2 *best;
 577
 578         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 579         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 580 }
 581
 582 static void update_cpuid(struct kvm_vcpu *vcpu)
 583 {
 584         struct kvm_cpuid_entry2 *best;
 585
 586         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 587         if (!best)
 588                 return;
 589
 590         /* Update OSXSAVE bit */
 591         if (cpu_has_xsave && best->function == 0x1) {
 592                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 593                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 594                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 595         }
 596 }
 597
 598 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 599 {
 600         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 601         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 602
 603         if (cr4 & CR4_RESERVED_BITS)
 604                 return 1;
 605
 606         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 607                 return 1;
 608
 609         if (is_long_mode(vcpu)) {
 610                 if (!(cr4 & X86_CR4_PAE))
 611                         return 1;
 612         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 613                    && ((cr4 ^ old_cr4) & pdptr_bits)
 614                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 615                                    kvm_read_cr3(vcpu)))
 616                 return 1;
 617
 618         if (cr4 & X86_CR4_VMXE)
 619                 return 1;
 620
 621         kvm_x86_ops->set_cr4(vcpu, cr4);
 622
 623         if ((cr4 ^ old_cr4) & pdptr_bits)
 624                 kvm_mmu_reset_context(vcpu);
 625
 626         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 627                 update_cpuid(vcpu);
 628
 629         return 0;
 630 }
 631 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 632
 633 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 634 {
 635         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 636                 kvm_mmu_sync_roots(vcpu);
 637                 kvm_mmu_flush_tlb(vcpu);
 638                 return 0;
 639         }
 640
 641         if (is_long_mode(vcpu)) {
 642                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 643                         return 1;
 644         } else {
 645                 if (is_pae(vcpu)) {
 646                         if (cr3 & CR3_PAE_RESERVED_BITS)
 647                                 return 1;
 648                         if (is_paging(vcpu) &&
 649                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 650                                 return 1;
 651                 }
 652                 /*
 653                  * We don't check reserved bits in nonpae mode, because
 654                  * this isn't enforced, and VMware depends on this.
 655                  */
 656         }
 657
 658         /*
 659          * Does the new cr3 value map to physical memory? (Note, we
 660          * catch an invalid cr3 even in real-mode, because it would
 661          * cause trouble later on when we turn on paging anyway.)
 662          *
 663          * A real CPU would silently accept an invalid cr3 and would
 664          * attempt to use it - with largely undefined (and often hard
 665          * to debug) behavior on the guest side.
 666          */
 667         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 668                 return 1;
 669         vcpu->arch.cr3 = cr3;
 670         vcpu->arch.mmu.new_cr3(vcpu);
 671         return 0;
 672 }
 673 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 674
 675 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 676 {
 677         if (cr8 & CR8_RESERVED_BITS)
 678                 return 1;
 679         if (irqchip_in_kernel(vcpu->kvm))
 680                 kvm_lapic_set_tpr(vcpu, cr8);
 681         else
 682                 vcpu->arch.cr8 = cr8;
 683         return 0;
 684 }
 685 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 686
 687 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 688 {
 689         if (irqchip_in_kernel(vcpu->kvm))
 690                 return kvm_lapic_get_cr8(vcpu);
 691         else
 692                 return vcpu->arch.cr8;
 693 }
 694 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 695
 696 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 697 {
 698         switch (dr) {
 699         case 0 ... 3:
 700                 vcpu->arch.db[dr] = val;
 701                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 702                         vcpu->arch.eff_db[dr] = val;
 703                 break;
 704         case 4:
 705                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 706                         return 1; /* #UD */
 707                 /* fall through */
 708         case 6:
 709                 if (val & 0xffffffff00000000ULL)
 710                         return -1; /* #GP */
 711                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 712                 break;
 713         case 5:
 714                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 715                         return 1; /* #UD */
 716                 /* fall through */
 717         default: /* 7 */
 718                 if (val & 0xffffffff00000000ULL)
 719                         return -1; /* #GP */
 720                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 721                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 722                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 723                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 724                 }
 725                 break;
 726         }
 727
 728         return 0;
 729 }
 730
 731 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 732 {
 733         int res;
 734
 735         res = __kvm_set_dr(vcpu, dr, val);
 736         if (res > 0)
 737                 kvm_queue_exception(vcpu, UD_VECTOR);
 738         else if (res < 0)
 739                 kvm_inject_gp(vcpu, 0);
 740
 741         return res;
 742 }
 743 EXPORT_SYMBOL_GPL(kvm_set_dr);
 744
 745 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 746 {
 747         switch (dr) {
 748         case 0 ... 3:
 749                 *val = vcpu->arch.db[dr];
 750                 break;
 751         case 4:
 752                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 753                         return 1;
 754                 /* fall through */
 755         case 6:
 756                 *val = vcpu->arch.dr6;
 757                 break;
 758         case 5:
 759                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 760                         return 1;
 761                 /* fall through */
 762         default: /* 7 */
 763                 *val = vcpu->arch.dr7;
 764                 break;
 765         }
 766
 767         return 0;
 768 }
 769
 770 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 771 {
 772         if (_kvm_get_dr(vcpu, dr, val)) {
 773                 kvm_queue_exception(vcpu, UD_VECTOR);
 774                 return 1;
 775         }
 776         return 0;
 777 }
 778 EXPORT_SYMBOL_GPL(kvm_get_dr);
 779
 780 /*
 781  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 782  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 783  *
 784  * This list is modified at module load time to reflect the
 785  * capabilities of the host cpu. This capabilities test skips MSRs that are
 786  * kvm-specific. Those are put in the beginning of the list.
 787  */
 788
 789 #define KVM_SAVE_MSRS_BEGIN     8
 790 static u32 msrs_to_save[] = {
 791         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 792         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 793         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 794         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 795         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 796         MSR_STAR,
 797 #ifdef CONFIG_X86_64
 798         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 799 #endif
 800         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 801 };
 802
 803 static unsigned num_msrs_to_save;
 804
 805 static u32 emulated_msrs[] = {
 806         MSR_IA32_MISC_ENABLE,
 807         MSR_IA32_MCG_STATUS,
 808         MSR_IA32_MCG_CTL,
 809 };
 810
 811 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 812 {
 813         u64 old_efer = vcpu->arch.efer;
 814
 815         if (efer & efer_reserved_bits)
 816                 return 1;
 817
 818         if (is_paging(vcpu)
 819             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 820                 return 1;
 821
 822         if (efer & EFER_FFXSR) {
 823                 struct kvm_cpuid_entry2 *feat;
 824
 825                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 826                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 827                         return 1;
 828         }
 829
 830         if (efer & EFER_SVME) {
 831                 struct kvm_cpuid_entry2 *feat;
 832
 833                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 834                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 835                         return 1;
 836         }
 837
 838         efer &= ~EFER_LMA;
 839         efer |= vcpu->arch.efer & EFER_LMA;
 840
 841         kvm_x86_ops->set_efer(vcpu, efer);
 842
 843         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 844
 845         /* Update reserved bits */
 846         if ((efer ^ old_efer) & EFER_NX)
 847                 kvm_mmu_reset_context(vcpu);
 848
 849         return 0;
 850 }
 851
 852 void kvm_enable_efer_bits(u64 mask)
 853 {
 854        efer_reserved_bits &= ~mask;
 855 }
 856 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 857
 858
 859 /*
 860  * Writes msr value into into the appropriate "register".
 861  * Returns 0 on success, non-0 otherwise.
 862  * Assumes vcpu_load() was already called.
 863  */
 864 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 865 {
 866         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 867 }
 868
 869 /*
 870  * Adapt set_msr() to msr_io()'s calling convention
 871  */
 872 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 873 {
 874         return kvm_set_msr(vcpu, index, *data);
 875 }
 876
 877 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 878 {
 879         int version;
 880         int r;
 881         struct pvclock_wall_clock wc;
 882         struct timespec boot;
 883
 884         if (!wall_clock)
 885                 return;
 886
 887         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 888         if (r)
 889                 return;
 890
 891         if (version & 1)
 892                 ++version;  /* first time write, random junk */
 893
 894         ++version;
 895
 896         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 897
 898         /*
 899          * The guest calculates current wall clock time by adding
 900          * system time (updated by kvm_guest_time_update below) to the
 901          * wall clock specified here.  guest system time equals host
 902          * system time for us, thus we must fill in host boot time here.
 903          */
 904         getboottime(&boot);
 905
 906         wc.sec = boot.tv_sec;
 907         wc.nsec = boot.tv_nsec;
 908         wc.version = version;
 909
 910         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 911
 912         version++;
 913         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 914 }
 915
 916 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 917 {
 918         uint32_t quotient, remainder;
 919
 920         /* Don't try to replace with do_div(), this one calculates
 921          * "(dividend << 32) / divisor" */
 922         __asm__ ( "divl %4"
 923                   : "=a" (quotient), "=d" (remainder)
 924                   : "0" (0), "1" (dividend), "r" (divisor) );
 925         return quotient;
 926 }
 927
 928 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 929                                s8 *pshift, u32 *pmultiplier)
 930 {
 931         uint64_t scaled64;
 932         int32_t  shift = 0;
 933         uint64_t tps64;
 934         uint32_t tps32;
 935
 936         tps64 = base_khz * 1000LL;
 937         scaled64 = scaled_khz * 1000LL;
 938         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 939                 tps64 >>= 1;
 940                 shift--;
 941         }
 942
 943         tps32 = (uint32_t)tps64;
 944         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 945                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 946                         scaled64 >>= 1;
 947                 else
 948                         tps32 <<= 1;
 949                 shift++;
 950         }
 951
 952         *pshift = shift;
 953         *pmultiplier = div_frac(scaled64, tps32);
 954
 955         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 956                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 957 }
 958
 959 static inline u64 get_kernel_ns(void)
 960 {
 961         struct timespec ts;
 962
 963         WARN_ON(preemptible());
 964         ktime_get_ts(&ts);
 965         monotonic_to_bootbased(&ts);
 966         return timespec_to_ns(&ts);
 967 }
 968
 969 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 970 unsigned long max_tsc_khz;
 971
 972 static inline int kvm_tsc_changes_freq(void)
 973 {
 974         int cpu = get_cpu();
 975         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 976                   cpufreq_quick_get(cpu) != 0;
 977         put_cpu();
 978         return ret;
 979 }
 980
 981 static inline u64 nsec_to_cycles(u64 nsec)
 982 {
 983         u64 ret;
 984
 985         WARN_ON(preemptible());
 986         if (kvm_tsc_changes_freq())
 987                 printk_once(KERN_WARNING
 988                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 989         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 990         do_div(ret, USEC_PER_SEC);
 991         return ret;
 992 }
 993
 994 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 995 {
 996         /* Compute a scale to convert nanoseconds in TSC cycles */
 997         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 998                            &kvm->arch.virtual_tsc_shift,
 999                            &kvm->arch.virtual_tsc_mult);
1000         kvm->arch.virtual_tsc_khz = this_tsc_khz;
1001 }
1002
1003 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1004 {
1005         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1006                                       vcpu->kvm->arch.virtual_tsc_mult,
1007                                       vcpu->kvm->arch.virtual_tsc_shift);
1008         tsc += vcpu->arch.last_tsc_write;
1009         return tsc;
1010 }
1011
1012 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1013 {
1014         struct kvm *kvm = vcpu->kvm;
1015         u64 offset, ns, elapsed;
1016         unsigned long flags;
1017         s64 sdiff;
1018
1019         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1020         offset = data - native_read_tsc();
1021         ns = get_kernel_ns();
1022         elapsed = ns - kvm->arch.last_tsc_nsec;
1023         sdiff = data - kvm->arch.last_tsc_write;
1024         if (sdiff < 0)
1025                 sdiff = -sdiff;
1026
1027         /*
1028          * Special case: close write to TSC within 5 seconds of
1029          * another CPU is interpreted as an attempt to synchronize
1030          * The 5 seconds is to accomodate host load / swapping as
1031          * well as any reset of TSC during the boot process.
1032          *
1033          * In that case, for a reliable TSC, we can match TSC offsets,
1034          * or make a best guest using elapsed value.
1035          */
1036         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1037             elapsed < 5ULL * NSEC_PER_SEC) {
1038                 if (!check_tsc_unstable()) {
1039                         offset = kvm->arch.last_tsc_offset;
1040                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1041                 } else {
1042                         u64 delta = nsec_to_cycles(elapsed);
1043                         offset += delta;
1044                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1045                 }
1046                 ns = kvm->arch.last_tsc_nsec;
1047         }
1048         kvm->arch.last_tsc_nsec = ns;
1049         kvm->arch.last_tsc_write = data;
1050         kvm->arch.last_tsc_offset = offset;
1051         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1052         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1053
1054         /* Reset of TSC must disable overshoot protection below */
1055         vcpu->arch.hv_clock.tsc_timestamp = 0;
1056         vcpu->arch.last_tsc_write = data;
1057         vcpu->arch.last_tsc_nsec = ns;
1058 }
1059 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1060
1061 static int kvm_guest_time_update(struct kvm_vcpu *v)
1062 {
1063         unsigned long flags;
1064         struct kvm_vcpu_arch *vcpu = &v->arch;
1065         void *shared_kaddr;
1066         unsigned long this_tsc_khz;
1067         s64 kernel_ns, max_kernel_ns;
1068         u64 tsc_timestamp;
1069
1070         /* Keep irq disabled to prevent changes to the clock */
1071         local_irq_save(flags);
1072         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1073         kernel_ns = get_kernel_ns();
1074         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1075
1076         if (unlikely(this_tsc_khz == 0)) {
1077                 local_irq_restore(flags);
1078                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1079                 return 1;
1080         }
1081
1082         /*
1083          * We may have to catch up the TSC to match elapsed wall clock
1084          * time for two reasons, even if kvmclock is used.
1085          *   1) CPU could have been running below the maximum TSC rate
1086          *   2) Broken TSC compensation resets the base at each VCPU
1087          *      entry to avoid unknown leaps of TSC even when running
1088          *      again on the same CPU.  This may cause apparent elapsed
1089          *      time to disappear, and the guest to stand still or run
1090          *      very slowly.
1091          */
1092         if (vcpu->tsc_catchup) {
1093                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1094                 if (tsc > tsc_timestamp) {
1095                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1096                         tsc_timestamp = tsc;
1097                 }
1098         }
1099
1100         local_irq_restore(flags);
1101
1102         if (!vcpu->time_page)
1103                 return 0;
1104
1105         /*
1106          * Time as measured by the TSC may go backwards when resetting the base
1107          * tsc_timestamp.  The reason for this is that the TSC resolution is
1108          * higher than the resolution of the other clock scales.  Thus, many
1109          * possible measurments of the TSC correspond to one measurement of any
1110          * other clock, and so a spread of values is possible.  This is not a
1111          * problem for the computation of the nanosecond clock; with TSC rates
1112          * around 1GHZ, there can only be a few cycles which correspond to one
1113          * nanosecond value, and any path through this code will inevitably
1114          * take longer than that.  However, with the kernel_ns value itself,
1115          * the precision may be much lower, down to HZ granularity.  If the
1116          * first sampling of TSC against kernel_ns ends in the low part of the
1117          * range, and the second in the high end of the range, we can get:
1118          *
1119          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1120          *
1121          * As the sampling errors potentially range in the thousands of cycles,
1122          * it is possible such a time value has already been observed by the
1123          * guest.  To protect against this, we must compute the system time as
1124          * observed by the guest and ensure the new system time is greater.
1125          */
1126         max_kernel_ns = 0;
1127         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1128                 max_kernel_ns = vcpu->last_guest_tsc -
1129                                 vcpu->hv_clock.tsc_timestamp;
1130                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1131                                     vcpu->hv_clock.tsc_to_system_mul,
1132                                     vcpu->hv_clock.tsc_shift);
1133                 max_kernel_ns += vcpu->last_kernel_ns;
1134         }
1135
1136         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1137                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1138                                    &vcpu->hv_clock.tsc_shift,
1139                                    &vcpu->hv_clock.tsc_to_system_mul);
1140                 vcpu->hw_tsc_khz = this_tsc_khz;
1141         }
1142
1143         if (max_kernel_ns > kernel_ns)
1144                 kernel_ns = max_kernel_ns;
1145
1146         /* With all the info we got, fill in the values */
1147         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1148         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1149         vcpu->last_kernel_ns = kernel_ns;
1150         vcpu->last_guest_tsc = tsc_timestamp;
1151         vcpu->hv_clock.flags = 0;
1152
1153         /*
1154          * The interface expects us to write an even number signaling that the
1155          * update is finished. Since the guest won't see the intermediate
1156          * state, we just increase by 2 at the end.
1157          */
1158         vcpu->hv_clock.version += 2;
1159
1160         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1161
1162         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1163                sizeof(vcpu->hv_clock));
1164
1165         kunmap_atomic(shared_kaddr, KM_USER0);
1166
1167         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1168         return 0;
1169 }
1170
1171 static bool msr_mtrr_valid(unsigned msr)
1172 {
1173         switch (msr) {
1174         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1175         case MSR_MTRRfix64K_00000:
1176         case MSR_MTRRfix16K_80000:
1177         case MSR_MTRRfix16K_A0000:
1178         case MSR_MTRRfix4K_C0000:
1179         case MSR_MTRRfix4K_C8000:
1180         case MSR_MTRRfix4K_D0000:
1181         case MSR_MTRRfix4K_D8000:
1182         case MSR_MTRRfix4K_E0000:
1183         case MSR_MTRRfix4K_E8000:
1184         case MSR_MTRRfix4K_F0000:
1185         case MSR_MTRRfix4K_F8000:
1186         case MSR_MTRRdefType:
1187         case MSR_IA32_CR_PAT:
1188                 return true;
1189         case 0x2f8:
1190                 return true;
1191         }
1192         return false;
1193 }
1194
1195 static bool valid_pat_type(unsigned t)
1196 {
1197         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1198 }
1199
1200 static bool valid_mtrr_type(unsigned t)
1201 {
1202         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1203 }
1204
1205 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1206 {
1207         int i;
1208
1209         if (!msr_mtrr_valid(msr))
1210                 return false;
1211
1212         if (msr == MSR_IA32_CR_PAT) {
1213                 for (i = 0; i < 8; i++)
1214                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1215                                 return false;
1216                 return true;
1217         } else if (msr == MSR_MTRRdefType) {
1218                 if (data & ~0xcff)
1219                         return false;
1220                 return valid_mtrr_type(data & 0xff);
1221         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1222                 for (i = 0; i < 8 ; i++)
1223                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1224                                 return false;
1225                 return true;
1226         }
1227
1228         /* variable MTRRs */
1229         return valid_mtrr_type(data & 0xff);
1230 }
1231
1232 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1233 {
1234         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1235
1236         if (!mtrr_valid(vcpu, msr, data))
1237                 return 1;
1238
1239         if (msr == MSR_MTRRdefType) {
1240                 vcpu->arch.mtrr_state.def_type = data;
1241                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1242         } else if (msr == MSR_MTRRfix64K_00000)
1243                 p[0] = data;
1244         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1245                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1246         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1247                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1248         else if (msr == MSR_IA32_CR_PAT)
1249                 vcpu->arch.pat = data;
1250         else {  /* Variable MTRRs */
1251                 int idx, is_mtrr_mask;
1252                 u64 *pt;
1253
1254                 idx = (msr - 0x200) / 2;
1255                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1256                 if (!is_mtrr_mask)
1257                         pt =
1258                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1259                 else
1260                         pt =
1261                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1262                 *pt = data;
1263         }
1264
1265         kvm_mmu_reset_context(vcpu);
1266         return 0;
1267 }
1268
1269 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1270 {
1271         u64 mcg_cap = vcpu->arch.mcg_cap;
1272         unsigned bank_num = mcg_cap & 0xff;
1273
1274         switch (msr) {
1275         case MSR_IA32_MCG_STATUS:
1276                 vcpu->arch.mcg_status = data;
1277                 break;
1278         case MSR_IA32_MCG_CTL:
1279                 if (!(mcg_cap & MCG_CTL_P))
1280                         return 1;
1281                 if (data != 0 && data != ~(u64)0)
1282                         return -1;
1283                 vcpu->arch.mcg_ctl = data;
1284                 break;
1285         default:
1286                 if (msr >= MSR_IA32_MC0_CTL &&
1287                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1288                         u32 offset = msr - MSR_IA32_MC0_CTL;
1289                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1290                          * some Linux kernels though clear bit 10 in bank 4 to
1291                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1292                          * this to avoid an uncatched #GP in the guest
1293                          */
1294                         if ((offset & 0x3) == 0 &&
1295                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1296                                 return -1;
1297                         vcpu->arch.mce_banks[offset] = data;
1298                         break;
1299                 }
1300                 return 1;
1301         }
1302         return 0;
1303 }
1304
1305 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1306 {
1307         struct kvm *kvm = vcpu->kvm;
1308         int lm = is_long_mode(vcpu);
1309         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1310                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1311         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1312                 : kvm->arch.xen_hvm_config.blob_size_32;
1313         u32 page_num = data & ~PAGE_MASK;
1314         u64 page_addr = data & PAGE_MASK;
1315         u8 *page;
1316         int r;
1317
1318         r = -E2BIG;
1319         if (page_num >= blob_size)
1320                 goto out;
1321         r = -ENOMEM;
1322         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1323         if (!page)
1324                 goto out;
1325         r = -EFAULT;
1326         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1327                 goto out_free;
1328         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1329                 goto out_free;
1330         r = 0;
1331 out_free:
1332         kfree(page);
1333 out:
1334         return r;
1335 }
1336
1337 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1338 {
1339         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1340 }
1341
1342 static bool kvm_hv_msr_partition_wide(u32 msr)
1343 {
1344         bool r = false;
1345         switch (msr) {
1346         case HV_X64_MSR_GUEST_OS_ID:
1347         case HV_X64_MSR_HYPERCALL:
1348                 r = true;
1349                 break;
1350         }
1351
1352         return r;
1353 }
1354
1355 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1356 {
1357         struct kvm *kvm = vcpu->kvm;
1358
1359         switch (msr) {
1360         case HV_X64_MSR_GUEST_OS_ID:
1361                 kvm->arch.hv_guest_os_id = data;
1362                 /* setting guest os id to zero disables hypercall page */
1363                 if (!kvm->arch.hv_guest_os_id)
1364                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1365                 break;
1366         case HV_X64_MSR_HYPERCALL: {
1367                 u64 gfn;
1368                 unsigned long addr;
1369                 u8 instructions[4];
1370
1371                 /* if guest os id is not set hypercall should remain disabled */
1372                 if (!kvm->arch.hv_guest_os_id)
1373                         break;
1374                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1375                         kvm->arch.hv_hypercall = data;
1376                         break;
1377                 }
1378                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1379                 addr = gfn_to_hva(kvm, gfn);
1380                 if (kvm_is_error_hva(addr))
1381                         return 1;
1382                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1383                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1384                 if (copy_to_user((void __user *)addr, instructions, 4))
1385                         return 1;
1386                 kvm->arch.hv_hypercall = data;
1387                 break;
1388         }
1389         default:
1390                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1391                           "data 0x%llx\n", msr, data);
1392                 return 1;
1393         }
1394         return 0;
1395 }
1396
1397 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1398 {
1399         switch (msr) {
1400         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1401                 unsigned long addr;
1402
1403                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1404                         vcpu->arch.hv_vapic = data;
1405                         break;
1406                 }
1407                 addr = gfn_to_hva(vcpu->kvm, data >>
1408                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1409                 if (kvm_is_error_hva(addr))
1410                         return 1;
1411                 if (clear_user((void __user *)addr, PAGE_SIZE))
1412                         return 1;
1413                 vcpu->arch.hv_vapic = data;
1414                 break;
1415         }
1416         case HV_X64_MSR_EOI:
1417                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1418         case HV_X64_MSR_ICR:
1419                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1420         case HV_X64_MSR_TPR:
1421                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1422         default:
1423                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1424                           "data 0x%llx\n", msr, data);
1425                 return 1;
1426         }
1427
1428         return 0;
1429 }
1430
1431 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1432 {
1433         gpa_t gpa = data & ~0x3f;
1434
1435         /* Bits 2:5 are resrved, Should be zero */
1436         if (data & 0x3c)
1437                 return 1;
1438
1439         vcpu->arch.apf.msr_val = data;
1440
1441         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1442                 kvm_clear_async_pf_completion_queue(vcpu);
1443                 kvm_async_pf_hash_reset(vcpu);
1444                 return 0;
1445         }
1446
1447         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1448                 return 1;
1449
1450         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1451         kvm_async_pf_wakeup_all(vcpu);
1452         return 0;
1453 }
1454
1455 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1456 {
1457         switch (msr) {
1458         case MSR_EFER:
1459                 return set_efer(vcpu, data);
1460         case MSR_K7_HWCR:
1461                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1462                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1463                 if (data != 0) {
1464                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1465                                 data);
1466                         return 1;
1467                 }
1468                 break;
1469         case MSR_FAM10H_MMIO_CONF_BASE:
1470                 if (data != 0) {
1471                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1472                                 "0x%llx\n", data);
1473                         return 1;
1474                 }
1475                 break;
1476         case MSR_AMD64_NB_CFG:
1477                 break;
1478         case MSR_IA32_DEBUGCTLMSR:
1479                 if (!data) {
1480                         /* We support the non-activated case already */
1481                         break;
1482                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1483                         /* Values other than LBR and BTF are vendor-specific,
1484                            thus reserved and should throw a #GP */
1485                         return 1;
1486                 }
1487                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1488                         __func__, data);
1489                 break;
1490         case MSR_IA32_UCODE_REV:
1491         case MSR_IA32_UCODE_WRITE:
1492         case MSR_VM_HSAVE_PA:
1493         case MSR_AMD64_PATCH_LOADER:
1494                 break;
1495         case 0x200 ... 0x2ff:
1496                 return set_msr_mtrr(vcpu, msr, data);
1497         case MSR_IA32_APICBASE:
1498                 kvm_set_apic_base(vcpu, data);
1499                 break;
1500         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1501                 return kvm_x2apic_msr_write(vcpu, msr, data);
1502         case MSR_IA32_MISC_ENABLE:
1503                 vcpu->arch.ia32_misc_enable_msr = data;
1504                 break;
1505         case MSR_KVM_WALL_CLOCK_NEW:
1506         case MSR_KVM_WALL_CLOCK:
1507                 vcpu->kvm->arch.wall_clock = data;
1508                 kvm_write_wall_clock(vcpu->kvm, data);
1509                 break;
1510         case MSR_KVM_SYSTEM_TIME_NEW:
1511         case MSR_KVM_SYSTEM_TIME: {
1512                 if (vcpu->arch.time_page) {
1513                         kvm_release_page_dirty(vcpu->arch.time_page);
1514                         vcpu->arch.time_page = NULL;
1515                 }
1516
1517                 vcpu->arch.time = data;
1518                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1519
1520                 /* we verify if the enable bit is set... */
1521                 if (!(data & 1))
1522                         break;
1523
1524                 /* ...but clean it before doing the actual write */
1525                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1526
1527                 vcpu->arch.time_page =
1528                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1529
1530                 if (is_error_page(vcpu->arch.time_page)) {
1531                         kvm_release_page_clean(vcpu->arch.time_page);
1532                         vcpu->arch.time_page = NULL;
1533                 }
1534                 break;
1535         }
1536         case MSR_KVM_ASYNC_PF_EN:
1537                 if (kvm_pv_enable_async_pf(vcpu, data))
1538                         return 1;
1539                 break;
1540         case MSR_IA32_MCG_CTL:
1541         case MSR_IA32_MCG_STATUS:
1542         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1543                 return set_msr_mce(vcpu, msr, data);
1544
1545         /* Performance counters are not protected by a CPUID bit,
1546          * so we should check all of them in the generic path for the sake of
1547          * cross vendor migration.
1548          * Writing a zero into the event select MSRs disables them,
1549          * which we perfectly emulate ;-). Any other value should be at least
1550          * reported, some guests depend on them.
1551          */
1552         case MSR_P6_EVNTSEL0:
1553         case MSR_P6_EVNTSEL1:
1554         case MSR_K7_EVNTSEL0:
1555         case MSR_K7_EVNTSEL1:
1556         case MSR_K7_EVNTSEL2:
1557         case MSR_K7_EVNTSEL3:
1558                 if (data != 0)
1559                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1560                                 "0x%x data 0x%llx\n", msr, data);
1561                 break;
1562         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1563          * so we ignore writes to make it happy.
1564          */
1565         case MSR_P6_PERFCTR0:
1566         case MSR_P6_PERFCTR1:
1567         case MSR_K7_PERFCTR0:
1568         case MSR_K7_PERFCTR1:
1569         case MSR_K7_PERFCTR2:
1570         case MSR_K7_PERFCTR3:
1571                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1572                         "0x%x data 0x%llx\n", msr, data);
1573                 break;
1574         case MSR_K7_CLK_CTL:
1575                 /*
1576                  * Ignore all writes to this no longer documented MSR.
1577                  * Writes are only relevant for old K7 processors,
1578                  * all pre-dating SVM, but a recommended workaround from
1579                  * AMD for these chips. It is possible to speicify the
1580                  * affected processor models on the command line, hence
1581                  * the need to ignore the workaround.
1582                  */
1583                 break;
1584         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1585                 if (kvm_hv_msr_partition_wide(msr)) {
1586                         int r;
1587                         mutex_lock(&vcpu->kvm->lock);
1588                         r = set_msr_hyperv_pw(vcpu, msr, data);
1589                         mutex_unlock(&vcpu->kvm->lock);
1590                         return r;
1591                 } else
1592                         return set_msr_hyperv(vcpu, msr, data);
1593                 break;
1594         default:
1595                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1596                         return xen_hvm_config(vcpu, data);
1597                 if (!ignore_msrs) {
1598                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1599                                 msr, data);
1600                         return 1;
1601                 } else {
1602                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1603                                 msr, data);
1604                         break;
1605                 }
1606         }
1607         return 0;
1608 }
1609 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1610
1611
1612 /*
1613  * Reads an msr value (of 'msr_index') into 'pdata'.
1614  * Returns 0 on success, non-0 otherwise.
1615  * Assumes vcpu_load() was already called.
1616  */
1617 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1618 {
1619         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1620 }
1621
1622 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1623 {
1624         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1625
1626         if (!msr_mtrr_valid(msr))
1627                 return 1;
1628
1629         if (msr == MSR_MTRRdefType)
1630                 *pdata = vcpu->arch.mtrr_state.def_type +
1631                          (vcpu->arch.mtrr_state.enabled << 10);
1632         else if (msr == MSR_MTRRfix64K_00000)
1633                 *pdata = p[0];
1634         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1635                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1636         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1637                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1638         else if (msr == MSR_IA32_CR_PAT)
1639                 *pdata = vcpu->arch.pat;
1640         else {  /* Variable MTRRs */
1641                 int idx, is_mtrr_mask;
1642                 u64 *pt;
1643
1644                 idx = (msr - 0x200) / 2;
1645                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1646                 if (!is_mtrr_mask)
1647                         pt =
1648                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1649                 else
1650                         pt =
1651                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1652                 *pdata = *pt;
1653         }
1654
1655         return 0;
1656 }
1657
1658 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1659 {
1660         u64 data;
1661         u64 mcg_cap = vcpu->arch.mcg_cap;
1662         unsigned bank_num = mcg_cap & 0xff;
1663
1664         switch (msr) {
1665         case MSR_IA32_P5_MC_ADDR:
1666         case MSR_IA32_P5_MC_TYPE:
1667                 data = 0;
1668                 break;
1669         case MSR_IA32_MCG_CAP:
1670                 data = vcpu->arch.mcg_cap;
1671                 break;
1672         case MSR_IA32_MCG_CTL:
1673                 if (!(mcg_cap & MCG_CTL_P))
1674                         return 1;
1675                 data = vcpu->arch.mcg_ctl;
1676                 break;
1677         case MSR_IA32_MCG_STATUS:
1678                 data = vcpu->arch.mcg_status;
1679                 break;
1680         default:
1681                 if (msr >= MSR_IA32_MC0_CTL &&
1682                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1683                         u32 offset = msr - MSR_IA32_MC0_CTL;
1684                         data = vcpu->arch.mce_banks[offset];
1685                         break;
1686                 }
1687                 return 1;
1688         }
1689         *pdata = data;
1690         return 0;
1691 }
1692
1693 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1694 {
1695         u64 data = 0;
1696         struct kvm *kvm = vcpu->kvm;
1697
1698         switch (msr) {
1699         case HV_X64_MSR_GUEST_OS_ID:
1700                 data = kvm->arch.hv_guest_os_id;
1701                 break;
1702         case HV_X64_MSR_HYPERCALL:
1703                 data = kvm->arch.hv_hypercall;
1704                 break;
1705         default:
1706                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1707                 return 1;
1708         }
1709
1710         *pdata = data;
1711         return 0;
1712 }
1713
1714 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1715 {
1716         u64 data = 0;
1717
1718         switch (msr) {
1719         case HV_X64_MSR_VP_INDEX: {
1720                 int r;
1721                 struct kvm_vcpu *v;
1722                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1723                         if (v == vcpu)
1724                                 data = r;
1725                 break;
1726         }
1727         case HV_X64_MSR_EOI:
1728                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1729         case HV_X64_MSR_ICR:
1730                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1731         case HV_X64_MSR_TPR:
1732                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1733         default:
1734                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1735                 return 1;
1736         }
1737         *pdata = data;
1738         return 0;
1739 }
1740
1741 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1742 {
1743         u64 data;
1744
1745         switch (msr) {
1746         case MSR_IA32_PLATFORM_ID:
1747         case MSR_IA32_UCODE_REV:
1748         case MSR_IA32_EBL_CR_POWERON:
1749         case MSR_IA32_DEBUGCTLMSR:
1750         case MSR_IA32_LASTBRANCHFROMIP:
1751         case MSR_IA32_LASTBRANCHTOIP:
1752         case MSR_IA32_LASTINTFROMIP:
1753         case MSR_IA32_LASTINTTOIP:
1754         case MSR_K8_SYSCFG:
1755         case MSR_K7_HWCR:
1756         case MSR_VM_HSAVE_PA:
1757         case MSR_P6_PERFCTR0:
1758         case MSR_P6_PERFCTR1:
1759         case MSR_P6_EVNTSEL0:
1760         case MSR_P6_EVNTSEL1:
1761         case MSR_K7_EVNTSEL0:
1762         case MSR_K7_PERFCTR0:
1763         case MSR_K8_INT_PENDING_MSG:
1764         case MSR_AMD64_NB_CFG:
1765         case MSR_FAM10H_MMIO_CONF_BASE:
1766                 data = 0;
1767                 break;
1768         case MSR_MTRRcap:
1769                 data = 0x500 | KVM_NR_VAR_MTRR;
1770                 break;
1771         case 0x200 ... 0x2ff:
1772                 return get_msr_mtrr(vcpu, msr, pdata);
1773         case 0xcd: /* fsb frequency */
1774                 data = 3;
1775                 break;
1776                 /*
1777                  * MSR_EBC_FREQUENCY_ID
1778                  * Conservative value valid for even the basic CPU models.
1779                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1780                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1781                  * and 266MHz for model 3, or 4. Set Core Clock
1782                  * Frequency to System Bus Frequency Ratio to 1 (bits
1783                  * 31:24) even though these are only valid for CPU
1784                  * models > 2, however guests may end up dividing or
1785                  * multiplying by zero otherwise.
1786                  */
1787         case MSR_EBC_FREQUENCY_ID:
1788                 data = 1 << 24;
1789                 break;
1790         case MSR_IA32_APICBASE:
1791                 data = kvm_get_apic_base(vcpu);
1792                 break;
1793         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1794                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1795                 break;
1796         case MSR_IA32_MISC_ENABLE:
1797                 data = vcpu->arch.ia32_misc_enable_msr;
1798                 break;
1799         case MSR_IA32_PERF_STATUS:
1800                 /* TSC increment by tick */
1801                 data = 1000ULL;
1802                 /* CPU multiplier */
1803                 data |= (((uint64_t)4ULL) << 40);
1804                 break;
1805         case MSR_EFER:
1806                 data = vcpu->arch.efer;
1807                 break;
1808         case MSR_KVM_WALL_CLOCK:
1809         case MSR_KVM_WALL_CLOCK_NEW:
1810                 data = vcpu->kvm->arch.wall_clock;
1811                 break;
1812         case MSR_KVM_SYSTEM_TIME:
1813         case MSR_KVM_SYSTEM_TIME_NEW:
1814                 data = vcpu->arch.time;
1815                 break;
1816         case MSR_KVM_ASYNC_PF_EN:
1817                 data = vcpu->arch.apf.msr_val;
1818                 break;
1819         case MSR_IA32_P5_MC_ADDR:
1820         case MSR_IA32_P5_MC_TYPE:
1821         case MSR_IA32_MCG_CAP:
1822         case MSR_IA32_MCG_CTL:
1823         case MSR_IA32_MCG_STATUS:
1824         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1825                 return get_msr_mce(vcpu, msr, pdata);
1826         case MSR_K7_CLK_CTL:
1827                 /*
1828                  * Provide expected ramp-up count for K7. All other
1829                  * are set to zero, indicating minimum divisors for
1830                  * every field.
1831                  *
1832                  * This prevents guest kernels on AMD host with CPU
1833                  * type 6, model 8 and higher from exploding due to
1834                  * the rdmsr failing.
1835                  */
1836                 data = 0x20000000;
1837                 break;
1838         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1839                 if (kvm_hv_msr_partition_wide(msr)) {
1840                         int r;
1841                         mutex_lock(&vcpu->kvm->lock);
1842                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1843                         mutex_unlock(&vcpu->kvm->lock);
1844                         return r;
1845                 } else
1846                         return get_msr_hyperv(vcpu, msr, pdata);
1847                 break;
1848         default:
1849                 if (!ignore_msrs) {
1850                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1851                         return 1;
1852                 } else {
1853                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1854                         data = 0;
1855                 }
1856                 break;
1857         }
1858         *pdata = data;
1859         return 0;
1860 }
1861 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1862
1863 /*
1864  * Read or write a bunch of msrs. All parameters are kernel addresses.
1865  *
1866  * @return number of msrs set successfully.
1867  */
1868 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1869                     struct kvm_msr_entry *entries,
1870                     int (*do_msr)(struct kvm_vcpu *vcpu,
1871                                   unsigned index, u64 *data))
1872 {
1873         int i, idx;
1874
1875         idx = srcu_read_lock(&vcpu->kvm->srcu);
1876         for (i = 0; i < msrs->nmsrs; ++i)
1877                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1878                         break;
1879         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1880
1881         return i;
1882 }
1883
1884 /*
1885  * Read or write a bunch of msrs. Parameters are user addresses.
1886  *
1887  * @return number of msrs set successfully.
1888  */
1889 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1890                   int (*do_msr)(struct kvm_vcpu *vcpu,
1891                                 unsigned index, u64 *data),
1892                   int writeback)
1893 {
1894         struct kvm_msrs msrs;
1895         struct kvm_msr_entry *entries;
1896         int r, n;
1897         unsigned size;
1898
1899         r = -EFAULT;
1900         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1901                 goto out;
1902
1903         r = -E2BIG;
1904         if (msrs.nmsrs >= MAX_IO_MSRS)
1905                 goto out;
1906
1907         r = -ENOMEM;
1908         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1909         entries = kmalloc(size, GFP_KERNEL);
1910         if (!entries)
1911                 goto out;
1912
1913         r = -EFAULT;
1914         if (copy_from_user(entries, user_msrs->entries, size))
1915                 goto out_free;
1916
1917         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1918         if (r < 0)
1919                 goto out_free;
1920
1921         r = -EFAULT;
1922         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1923                 goto out_free;
1924
1925         r = n;
1926
1927 out_free:
1928         kfree(entries);
1929 out:
1930         return r;
1931 }
1932
1933 int kvm_dev_ioctl_check_extension(long ext)
1934 {
1935         int r;
1936
1937         switch (ext) {
1938         case KVM_CAP_IRQCHIP:
1939         case KVM_CAP_HLT:
1940         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1941         case KVM_CAP_SET_TSS_ADDR:
1942         case KVM_CAP_EXT_CPUID:
1943         case KVM_CAP_CLOCKSOURCE:
1944         case KVM_CAP_PIT:
1945         case KVM_CAP_NOP_IO_DELAY:
1946         case KVM_CAP_MP_STATE:
1947         case KVM_CAP_SYNC_MMU:
1948         case KVM_CAP_USER_NMI:
1949         case KVM_CAP_REINJECT_CONTROL:
1950         case KVM_CAP_IRQ_INJECT_STATUS:
1951         case KVM_CAP_ASSIGN_DEV_IRQ:
1952         case KVM_CAP_IRQFD:
1953         case KVM_CAP_IOEVENTFD:
1954         case KVM_CAP_PIT2:
1955         case KVM_CAP_PIT_STATE2:
1956         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1957         case KVM_CAP_XEN_HVM:
1958         case KVM_CAP_ADJUST_CLOCK:
1959         case KVM_CAP_VCPU_EVENTS:
1960         case KVM_CAP_HYPERV:
1961         case KVM_CAP_HYPERV_VAPIC:
1962         case KVM_CAP_HYPERV_SPIN:
1963         case KVM_CAP_PCI_SEGMENT:
1964         case KVM_CAP_DEBUGREGS:
1965         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1966         case KVM_CAP_XSAVE:
1967         case KVM_CAP_ASYNC_PF:
1968                 r = 1;
1969                 break;
1970         case KVM_CAP_COALESCED_MMIO:
1971                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1972                 break;
1973         case KVM_CAP_VAPIC:
1974                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1975                 break;
1976         case KVM_CAP_NR_VCPUS:
1977                 r = KVM_MAX_VCPUS;
1978                 break;
1979         case KVM_CAP_NR_MEMSLOTS:
1980                 r = KVM_MEMORY_SLOTS;
1981                 break;
1982         case KVM_CAP_PV_MMU:    /* obsolete */
1983                 r = 0;
1984                 break;
1985         case KVM_CAP_IOMMU:
1986                 r = iommu_found();
1987                 break;
1988         case KVM_CAP_MCE:
1989                 r = KVM_MAX_MCE_BANKS;
1990                 break;
1991         case KVM_CAP_XCRS:
1992                 r = cpu_has_xsave;
1993                 break;
1994         default:
1995                 r = 0;
1996                 break;
1997         }
1998         return r;
1999
2000 }
2001
2002 long kvm_arch_dev_ioctl(struct file *filp,
2003                         unsigned int ioctl, unsigned long arg)
2004 {
2005         void __user *argp = (void __user *)arg;
2006         long r;
2007
2008         switch (ioctl) {
2009         case KVM_GET_MSR_INDEX_LIST: {
2010                 struct kvm_msr_list __user *user_msr_list = argp;
2011                 struct kvm_msr_list msr_list;
2012                 unsigned n;
2013
2014                 r = -EFAULT;
2015                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2016                         goto out;
2017                 n = msr_list.nmsrs;
2018                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2019                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2020                         goto out;
2021                 r = -E2BIG;
2022                 if (n < msr_list.nmsrs)
2023                         goto out;
2024                 r = -EFAULT;
2025                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2026                                  num_msrs_to_save * sizeof(u32)))
2027                         goto out;
2028                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2029                                  &emulated_msrs,
2030                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2031                         goto out;
2032                 r = 0;
2033                 break;
2034         }
2035         case KVM_GET_SUPPORTED_CPUID: {
2036                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2037                 struct kvm_cpuid2 cpuid;
2038
2039                 r = -EFAULT;
2040                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2041                         goto out;
2042                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2043                                                       cpuid_arg->entries);
2044                 if (r)
2045                         goto out;
2046
2047                 r = -EFAULT;
2048                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2049                         goto out;
2050                 r = 0;
2051                 break;
2052         }
2053         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2054                 u64 mce_cap;
2055
2056                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2057                 r = -EFAULT;
2058                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2059                         goto out;
2060                 r = 0;
2061                 break;
2062         }
2063         default:
2064                 r = -EINVAL;
2065         }
2066 out:
2067         return r;
2068 }
2069
2070 static void wbinvd_ipi(void *garbage)
2071 {
2072         wbinvd();
2073 }
2074
2075 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2076 {
2077         return vcpu->kvm->arch.iommu_domain &&
2078                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2079 }
2080
2081 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2082 {
2083         /* Address WBINVD may be executed by guest */
2084         if (need_emulate_wbinvd(vcpu)) {
2085                 if (kvm_x86_ops->has_wbinvd_exit())
2086                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2087                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2088                         smp_call_function_single(vcpu->cpu,
2089                                         wbinvd_ipi, NULL, 1);
2090         }
2091
2092         kvm_x86_ops->vcpu_load(vcpu, cpu);
2093         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2094                 /* Make sure TSC doesn't go backwards */
2095                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2096                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2097                 if (tsc_delta < 0)
2098                         mark_tsc_unstable("KVM discovered backwards TSC");
2099                 if (check_tsc_unstable()) {
2100                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2101                         vcpu->arch.tsc_catchup = 1;
2102                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2103                 }
2104                 if (vcpu->cpu != cpu)
2105                         kvm_migrate_timers(vcpu);
2106                 vcpu->cpu = cpu;
2107         }
2108 }
2109
2110 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2111 {
2112         kvm_x86_ops->vcpu_put(vcpu);
2113         kvm_put_guest_fpu(vcpu);
2114         vcpu->arch.last_host_tsc = native_read_tsc();
2115 }
2116
2117 static int is_efer_nx(void)
2118 {
2119         unsigned long long efer = 0;
2120
2121         rdmsrl_safe(MSR_EFER, &efer);
2122         return efer & EFER_NX;
2123 }
2124
2125 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2126 {
2127         int i;
2128         struct kvm_cpuid_entry2 *e, *entry;
2129
2130         entry = NULL;
2131         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2132                 e = &vcpu->arch.cpuid_entries[i];
2133                 if (e->function == 0x80000001) {
2134                         entry = e;
2135                         break;
2136                 }
2137         }
2138         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2139                 entry->edx &= ~(1 << 20);
2140                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2141         }
2142 }
2143
2144 /* when an old userspace process fills a new kernel module */
2145 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2146                                     struct kvm_cpuid *cpuid,
2147                                     struct kvm_cpuid_entry __user *entries)
2148 {
2149         int r, i;
2150         struct kvm_cpuid_entry *cpuid_entries;
2151
2152         r = -E2BIG;
2153         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2154                 goto out;
2155         r = -ENOMEM;
2156         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2157         if (!cpuid_entries)
2158                 goto out;
2159         r = -EFAULT;
2160         if (copy_from_user(cpuid_entries, entries,
2161                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2162                 goto out_free;
2163         for (i = 0; i < cpuid->nent; i++) {
2164                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2165                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2166                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2167                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2168                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2169                 vcpu->arch.cpuid_entries[i].index = 0;
2170                 vcpu->arch.cpuid_entries[i].flags = 0;
2171                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2172                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2173                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2174         }
2175         vcpu->arch.cpuid_nent = cpuid->nent;
2176         cpuid_fix_nx_cap(vcpu);
2177         r = 0;
2178         kvm_apic_set_version(vcpu);
2179         kvm_x86_ops->cpuid_update(vcpu);
2180         update_cpuid(vcpu);
2181
2182 out_free:
2183         vfree(cpuid_entries);
2184 out:
2185         return r;
2186 }
2187
2188 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2189                                      struct kvm_cpuid2 *cpuid,
2190                                      struct kvm_cpuid_entry2 __user *entries)
2191 {
2192         int r;
2193
2194         r = -E2BIG;
2195         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2196                 goto out;
2197         r = -EFAULT;
2198         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2199                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2200                 goto out;
2201         vcpu->arch.cpuid_nent = cpuid->nent;
2202         kvm_apic_set_version(vcpu);
2203         kvm_x86_ops->cpuid_update(vcpu);
2204         update_cpuid(vcpu);
2205         return 0;
2206
2207 out:
2208         return r;
2209 }
2210
2211 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2212                                      struct kvm_cpuid2 *cpuid,
2213                                      struct kvm_cpuid_entry2 __user *entries)
2214 {
2215         int r;
2216
2217         r = -E2BIG;
2218         if (cpuid->nent < vcpu->arch.cpuid_nent)
2219                 goto out;
2220         r = -EFAULT;
2221         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2222                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2223                 goto out;
2224         return 0;
2225
2226 out:
2227         cpuid->nent = vcpu->arch.cpuid_nent;
2228         return r;
2229 }
2230
2231 static void cpuid_mask(u32 *word, int wordnum)
2232 {
2233         *word &= boot_cpu_data.x86_capability[wordnum];
2234 }
2235
2236 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2237                            u32 index)
2238 {
2239         entry->function = function;
2240         entry->index = index;
2241         cpuid_count(entry->function, entry->index,
2242                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2243         entry->flags = 0;
2244 }
2245
2246 #define F(x) bit(X86_FEATURE_##x)
2247
2248 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2249                          u32 index, int *nent, int maxnent)
2250 {
2251         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2252 #ifdef CONFIG_X86_64
2253         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2254                                 ? F(GBPAGES) : 0;
2255         unsigned f_lm = F(LM);
2256 #else
2257         unsigned f_gbpages = 0;
2258         unsigned f_lm = 0;
2259 #endif
2260         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2261
2262         /* cpuid 1.edx */
2263         const u32 kvm_supported_word0_x86_features =
2264                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2265                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2266                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2267                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2268                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2269                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2270                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2271                 0 /* HTT, TM, Reserved, PBE */;
2272         /* cpuid 0x80000001.edx */
2273         const u32 kvm_supported_word1_x86_features =
2274                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2275                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2276                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2277                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2278                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2279                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2280                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2281                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2282         /* cpuid 1.ecx */
2283         const u32 kvm_supported_word4_x86_features =
2284                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2285                 0 /* DS-CPL, VMX, SMX, EST */ |
2286                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2287                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2288                 0 /* Reserved, DCA */ | F(XMM4_1) |
2289                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2290                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2291                 F(F16C);
2292         /* cpuid 0x80000001.ecx */
2293         const u32 kvm_supported_word6_x86_features =
2294                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2295                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2296                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2297                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2298
2299         /* all calls to cpuid_count() should be made on the same cpu */
2300         get_cpu();
2301         do_cpuid_1_ent(entry, function, index);
2302         ++*nent;
2303
2304         switch (function) {
2305         case 0:
2306                 entry->eax = min(entry->eax, (u32)0xd);
2307                 break;
2308         case 1:
2309                 entry->edx &= kvm_supported_word0_x86_features;
2310                 cpuid_mask(&entry->edx, 0);
2311                 entry->ecx &= kvm_supported_word4_x86_features;
2312                 cpuid_mask(&entry->ecx, 4);
2313                 /* we support x2apic emulation even if host does not support
2314                  * it since we emulate x2apic in software */
2315                 entry->ecx |= F(X2APIC);
2316                 break;
2317         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2318          * may return different values. This forces us to get_cpu() before
2319          * issuing the first command, and also to emulate this annoying behavior
2320          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2321         case 2: {
2322                 int t, times = entry->eax & 0xff;
2323
2324                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2325                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2326                 for (t = 1; t < times && *nent < maxnent; ++t) {
2327                         do_cpuid_1_ent(&entry[t], function, 0);
2328                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2329                         ++*nent;
2330                 }
2331                 break;
2332         }
2333         /* function 4 and 0xb have additional index. */
2334         case 4: {
2335                 int i, cache_type;
2336
2337                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2338                 /* read more entries until cache_type is zero */
2339                 for (i = 1; *nent < maxnent; ++i) {
2340                         cache_type = entry[i - 1].eax & 0x1f;
2341                         if (!cache_type)
2342                                 break;
2343                         do_cpuid_1_ent(&entry[i], function, i);
2344                         entry[i].flags |=
2345                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2346                         ++*nent;
2347                 }
2348                 break;
2349         }
2350         case 0xb: {
2351                 int i, level_type;
2352
2353                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2354                 /* read more entries until level_type is zero */
2355                 for (i = 1; *nent < maxnent; ++i) {
2356                         level_type = entry[i - 1].ecx & 0xff00;
2357                         if (!level_type)
2358                                 break;
2359                         do_cpuid_1_ent(&entry[i], function, i);
2360                         entry[i].flags |=
2361                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2362                         ++*nent;
2363                 }
2364                 break;
2365         }
2366         case 0xd: {
2367                 int i;
2368
2369                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2370                 for (i = 1; *nent < maxnent; ++i) {
2371                         if (entry[i - 1].eax == 0 && i != 2)
2372                                 break;
2373                         do_cpuid_1_ent(&entry[i], function, i);
2374                         entry[i].flags |=
2375                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2376                         ++*nent;
2377                 }
2378                 break;
2379         }
2380         case KVM_CPUID_SIGNATURE: {
2381                 char signature[12] = "KVMKVMKVM\0\0";
2382                 u32 *sigptr = (u32 *)signature;
2383                 entry->eax = 0;
2384                 entry->ebx = sigptr[0];
2385                 entry->ecx = sigptr[1];
2386                 entry->edx = sigptr[2];
2387                 break;
2388         }
2389         case KVM_CPUID_FEATURES:
2390                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2391                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2392                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2393                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2394                 entry->ebx = 0;
2395                 entry->ecx = 0;
2396                 entry->edx = 0;
2397                 break;
2398         case 0x80000000:
2399                 entry->eax = min(entry->eax, 0x8000001a);
2400                 break;
2401         case 0x80000001:
2402                 entry->edx &= kvm_supported_word1_x86_features;
2403                 cpuid_mask(&entry->edx, 1);
2404                 entry->ecx &= kvm_supported_word6_x86_features;
2405                 cpuid_mask(&entry->ecx, 6);
2406                 break;
2407         }
2408
2409         kvm_x86_ops->set_supported_cpuid(function, entry);
2410
2411         put_cpu();
2412 }
2413
2414 #undef F
2415
2416 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2417                                      struct kvm_cpuid_entry2 __user *entries)
2418 {
2419         struct kvm_cpuid_entry2 *cpuid_entries;
2420         int limit, nent = 0, r = -E2BIG;
2421         u32 func;
2422
2423         if (cpuid->nent < 1)
2424                 goto out;
2425         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2426                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2427         r = -ENOMEM;
2428         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2429         if (!cpuid_entries)
2430                 goto out;
2431
2432         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2433         limit = cpuid_entries[0].eax;
2434         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2435                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2436                              &nent, cpuid->nent);
2437         r = -E2BIG;
2438         if (nent >= cpuid->nent)
2439                 goto out_free;
2440
2441         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2442         limit = cpuid_entries[nent - 1].eax;
2443         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2444                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2445                              &nent, cpuid->nent);
2446
2447
2448
2449         r = -E2BIG;
2450         if (nent >= cpuid->nent)
2451                 goto out_free;
2452
2453         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2454                      cpuid->nent);
2455
2456         r = -E2BIG;
2457         if (nent >= cpuid->nent)
2458                 goto out_free;
2459
2460         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2461                      cpuid->nent);
2462
2463         r = -E2BIG;
2464         if (nent >= cpuid->nent)
2465                 goto out_free;
2466
2467         r = -EFAULT;
2468         if (copy_to_user(entries, cpuid_entries,
2469                          nent * sizeof(struct kvm_cpuid_entry2)))
2470                 goto out_free;
2471         cpuid->nent = nent;
2472         r = 0;
2473
2474 out_free:
2475         vfree(cpuid_entries);
2476 out:
2477         return r;
2478 }
2479
2480 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2481                                     struct kvm_lapic_state *s)
2482 {
2483         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2484
2485         return 0;
2486 }
2487
2488 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2489                                     struct kvm_lapic_state *s)
2490 {
2491         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2492         kvm_apic_post_state_restore(vcpu);
2493         update_cr8_intercept(vcpu);
2494
2495         return 0;
2496 }
2497
2498 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2499                                     struct kvm_interrupt *irq)
2500 {
2501         if (irq->irq < 0 || irq->irq >= 256)
2502                 return -EINVAL;
2503         if (irqchip_in_kernel(vcpu->kvm))
2504                 return -ENXIO;
2505
2506         kvm_queue_interrupt(vcpu, irq->irq, false);
2507         kvm_make_request(KVM_REQ_EVENT, vcpu);
2508
2509         return 0;
2510 }
2511
2512 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2513 {
2514         kvm_inject_nmi(vcpu);
2515
2516         return 0;
2517 }
2518
2519 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2520                                            struct kvm_tpr_access_ctl *tac)
2521 {
2522         if (tac->flags)
2523                 return -EINVAL;
2524         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2525         return 0;
2526 }
2527
2528 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2529                                         u64 mcg_cap)
2530 {
2531         int r;
2532         unsigned bank_num = mcg_cap & 0xff, bank;
2533
2534         r = -EINVAL;
2535         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2536                 goto out;
2537         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2538                 goto out;
2539         r = 0;
2540         vcpu->arch.mcg_cap = mcg_cap;
2541         /* Init IA32_MCG_CTL to all 1s */
2542         if (mcg_cap & MCG_CTL_P)
2543                 vcpu->arch.mcg_ctl = ~(u64)0;
2544         /* Init IA32_MCi_CTL to all 1s */
2545         for (bank = 0; bank < bank_num; bank++)
2546                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2547 out:
2548         return r;
2549 }
2550
2551 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2552                                       struct kvm_x86_mce *mce)
2553 {
2554         u64 mcg_cap = vcpu->arch.mcg_cap;
2555         unsigned bank_num = mcg_cap & 0xff;
2556         u64 *banks = vcpu->arch.mce_banks;
2557
2558         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2559                 return -EINVAL;
2560         /*
2561          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2562          * reporting is disabled
2563          */
2564         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2565             vcpu->arch.mcg_ctl != ~(u64)0)
2566                 return 0;
2567         banks += 4 * mce->bank;
2568         /*
2569          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2570          * reporting is disabled for the bank
2571          */
2572         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2573                 return 0;
2574         if (mce->status & MCI_STATUS_UC) {
2575                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2576                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2577                         printk(KERN_DEBUG "kvm: set_mce: "
2578                                "injects mce exception while "
2579                                "previous one is in progress!\n");
2580                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2581                         return 0;
2582                 }
2583                 if (banks[1] & MCI_STATUS_VAL)
2584                         mce->status |= MCI_STATUS_OVER;
2585                 banks[2] = mce->addr;
2586                 banks[3] = mce->misc;
2587                 vcpu->arch.mcg_status = mce->mcg_status;
2588                 banks[1] = mce->status;
2589                 kvm_queue_exception(vcpu, MC_VECTOR);
2590         } else if (!(banks[1] & MCI_STATUS_VAL)
2591                    || !(banks[1] & MCI_STATUS_UC)) {
2592                 if (banks[1] & MCI_STATUS_VAL)
2593                         mce->status |= MCI_STATUS_OVER;
2594                 banks[2] = mce->addr;
2595                 banks[3] = mce->misc;
2596                 banks[1] = mce->status;
2597         } else
2598                 banks[1] |= MCI_STATUS_OVER;
2599         return 0;
2600 }
2601
2602 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2603                                                struct kvm_vcpu_events *events)
2604 {
2605         events->exception.injected =
2606                 vcpu->arch.exception.pending &&
2607                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2608         events->exception.nr = vcpu->arch.exception.nr;
2609         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2610         events->exception.pad = 0;
2611         events->exception.error_code = vcpu->arch.exception.error_code;
2612
2613         events->interrupt.injected =
2614                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2615         events->interrupt.nr = vcpu->arch.interrupt.nr;
2616         events->interrupt.soft = 0;
2617         events->interrupt.shadow =
2618                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2619                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2620
2621         events->nmi.injected = vcpu->arch.nmi_injected;
2622         events->nmi.pending = vcpu->arch.nmi_pending;
2623         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2624         events->nmi.pad = 0;
2625
2626         events->sipi_vector = vcpu->arch.sipi_vector;
2627
2628         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2629                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2630                          | KVM_VCPUEVENT_VALID_SHADOW);
2631         memset(&events->reserved, 0, sizeof(events->reserved));
2632 }
2633
2634 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2635                                               struct kvm_vcpu_events *events)
2636 {
2637         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2638                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2639                               | KVM_VCPUEVENT_VALID_SHADOW))
2640                 return -EINVAL;
2641
2642         vcpu->arch.exception.pending = events->exception.injected;
2643         vcpu->arch.exception.nr = events->exception.nr;
2644         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2645         vcpu->arch.exception.error_code = events->exception.error_code;
2646
2647         vcpu->arch.interrupt.pending = events->interrupt.injected;
2648         vcpu->arch.interrupt.nr = events->interrupt.nr;
2649         vcpu->arch.interrupt.soft = events->interrupt.soft;
2650         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2651                 kvm_pic_clear_isr_ack(vcpu->kvm);
2652         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2653                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2654                                                   events->interrupt.shadow);
2655
2656         vcpu->arch.nmi_injected = events->nmi.injected;
2657         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2658                 vcpu->arch.nmi_pending = events->nmi.pending;
2659         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2660
2661         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2662                 vcpu->arch.sipi_vector = events->sipi_vector;
2663
2664         kvm_make_request(KVM_REQ_EVENT, vcpu);
2665
2666         return 0;
2667 }
2668
2669 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2670                                              struct kvm_debugregs *dbgregs)
2671 {
2672         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2673         dbgregs->dr6 = vcpu->arch.dr6;
2674         dbgregs->dr7 = vcpu->arch.dr7;
2675         dbgregs->flags = 0;
2676         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2677 }
2678
2679 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2680                                             struct kvm_debugregs *dbgregs)
2681 {
2682         if (dbgregs->flags)
2683                 return -EINVAL;
2684
2685         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2686         vcpu->arch.dr6 = dbgregs->dr6;
2687         vcpu->arch.dr7 = dbgregs->dr7;
2688
2689         return 0;
2690 }
2691
2692 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2693                                          struct kvm_xsave *guest_xsave)
2694 {
2695         if (cpu_has_xsave)
2696                 memcpy(guest_xsave->region,
2697                         &vcpu->arch.guest_fpu.state->xsave,
2698                         xstate_size);
2699         else {
2700                 memcpy(guest_xsave->region,
2701                         &vcpu->arch.guest_fpu.state->fxsave,
2702                         sizeof(struct i387_fxsave_struct));
2703                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2704                         XSTATE_FPSSE;
2705         }
2706 }
2707
2708 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2709                                         struct kvm_xsave *guest_xsave)
2710 {
2711         u64 xstate_bv =
2712                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2713
2714         if (cpu_has_xsave)
2715                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2716                         guest_xsave->region, xstate_size);
2717         else {
2718                 if (xstate_bv & ~XSTATE_FPSSE)
2719                         return -EINVAL;
2720                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2721                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2722         }
2723         return 0;
2724 }
2725
2726 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2727                                         struct kvm_xcrs *guest_xcrs)
2728 {
2729         if (!cpu_has_xsave) {
2730                 guest_xcrs->nr_xcrs = 0;
2731                 return;
2732         }
2733
2734         guest_xcrs->nr_xcrs = 1;
2735         guest_xcrs->flags = 0;
2736         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2737         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2738 }
2739
2740 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2741                                        struct kvm_xcrs *guest_xcrs)
2742 {
2743         int i, r = 0;
2744
2745         if (!cpu_has_xsave)
2746                 return -EINVAL;
2747
2748         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2749                 return -EINVAL;
2750
2751         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2752                 /* Only support XCR0 currently */
2753                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2754                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2755                                 guest_xcrs->xcrs[0].value);
2756                         break;
2757                 }
2758         if (r)
2759                 r = -EINVAL;
2760         return r;
2761 }
2762
2763 long kvm_arch_vcpu_ioctl(struct file *filp,
2764                          unsigned int ioctl, unsigned long arg)
2765 {
2766         struct kvm_vcpu *vcpu = filp->private_data;
2767         void __user *argp = (void __user *)arg;
2768         int r;
2769         union {
2770                 struct kvm_lapic_state *lapic;
2771                 struct kvm_xsave *xsave;
2772                 struct kvm_xcrs *xcrs;
2773                 void *buffer;
2774         } u;
2775
2776         u.buffer = NULL;
2777         switch (ioctl) {
2778         case KVM_GET_LAPIC: {
2779                 r = -EINVAL;
2780                 if (!vcpu->arch.apic)
2781                         goto out;
2782                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2783
2784                 r = -ENOMEM;
2785                 if (!u.lapic)
2786                         goto out;
2787                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2788                 if (r)
2789                         goto out;
2790                 r = -EFAULT;
2791                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2792                         goto out;
2793                 r = 0;
2794                 break;
2795         }
2796         case KVM_SET_LAPIC: {
2797                 r = -EINVAL;
2798                 if (!vcpu->arch.apic)
2799                         goto out;
2800                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2801                 r = -ENOMEM;
2802                 if (!u.lapic)
2803                         goto out;
2804                 r = -EFAULT;
2805                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2806                         goto out;
2807                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2808                 if (r)
2809                         goto out;
2810                 r = 0;
2811                 break;
2812         }
2813         case KVM_INTERRUPT: {
2814                 struct kvm_interrupt irq;
2815
2816                 r = -EFAULT;
2817                 if (copy_from_user(&irq, argp, sizeof irq))
2818                         goto out;
2819                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2820                 if (r)
2821                         goto out;
2822                 r = 0;
2823                 break;
2824         }
2825         case KVM_NMI: {
2826                 r = kvm_vcpu_ioctl_nmi(vcpu);
2827                 if (r)
2828                         goto out;
2829                 r = 0;
2830                 break;
2831         }
2832         case KVM_SET_CPUID: {
2833                 struct kvm_cpuid __user *cpuid_arg = argp;
2834                 struct kvm_cpuid cpuid;
2835
2836                 r = -EFAULT;
2837                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2838                         goto out;
2839                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2840                 if (r)
2841                         goto out;
2842                 break;
2843         }
2844         case KVM_SET_CPUID2: {
2845                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2846                 struct kvm_cpuid2 cpuid;
2847
2848                 r = -EFAULT;
2849                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2850                         goto out;
2851                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2852                                               cpuid_arg->entries);
2853                 if (r)
2854                         goto out;
2855                 break;
2856         }
2857         case KVM_GET_CPUID2: {
2858                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2859                 struct kvm_cpuid2 cpuid;
2860
2861                 r = -EFAULT;
2862                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2863                         goto out;
2864                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2865                                               cpuid_arg->entries);
2866                 if (r)
2867                         goto out;
2868                 r = -EFAULT;
2869                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2870                         goto out;
2871                 r = 0;
2872                 break;
2873         }
2874         case KVM_GET_MSRS:
2875                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2876                 break;
2877         case KVM_SET_MSRS:
2878                 r = msr_io(vcpu, argp, do_set_msr, 0);
2879                 break;
2880         case KVM_TPR_ACCESS_REPORTING: {
2881                 struct kvm_tpr_access_ctl tac;
2882
2883                 r = -EFAULT;
2884                 if (copy_from_user(&tac, argp, sizeof tac))
2885                         goto out;
2886                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2887                 if (r)
2888                         goto out;
2889                 r = -EFAULT;
2890                 if (copy_to_user(argp, &tac, sizeof tac))
2891                         goto out;
2892                 r = 0;
2893                 break;
2894         };
2895         case KVM_SET_VAPIC_ADDR: {
2896                 struct kvm_vapic_addr va;
2897
2898                 r = -EINVAL;
2899                 if (!irqchip_in_kernel(vcpu->kvm))
2900                         goto out;
2901                 r = -EFAULT;
2902                 if (copy_from_user(&va, argp, sizeof va))
2903                         goto out;
2904                 r = 0;
2905                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2906                 break;
2907         }
2908         case KVM_X86_SETUP_MCE: {
2909                 u64 mcg_cap;
2910
2911                 r = -EFAULT;
2912                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2913                         goto out;
2914                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2915                 break;
2916         }
2917         case KVM_X86_SET_MCE: {
2918                 struct kvm_x86_mce mce;
2919
2920                 r = -EFAULT;
2921                 if (copy_from_user(&mce, argp, sizeof mce))
2922                         goto out;
2923                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2924                 break;
2925         }
2926         case KVM_GET_VCPU_EVENTS: {
2927                 struct kvm_vcpu_events events;
2928
2929                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2930
2931                 r = -EFAULT;
2932                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2933                         break;
2934                 r = 0;
2935                 break;
2936         }
2937         case KVM_SET_VCPU_EVENTS: {
2938                 struct kvm_vcpu_events events;
2939
2940                 r = -EFAULT;
2941                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2942                         break;
2943
2944                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2945                 break;
2946         }
2947         case KVM_GET_DEBUGREGS: {
2948                 struct kvm_debugregs dbgregs;
2949
2950                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2951
2952                 r = -EFAULT;
2953                 if (copy_to_user(argp, &dbgregs,
2954                                  sizeof(struct kvm_debugregs)))
2955                         break;
2956                 r = 0;
2957                 break;
2958         }
2959         case KVM_SET_DEBUGREGS: {
2960                 struct kvm_debugregs dbgregs;
2961
2962                 r = -EFAULT;
2963                 if (copy_from_user(&dbgregs, argp,
2964                                    sizeof(struct kvm_debugregs)))
2965                         break;
2966
2967                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2968                 break;
2969         }
2970         case KVM_GET_XSAVE: {
2971                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2972                 r = -ENOMEM;
2973                 if (!u.xsave)
2974                         break;
2975
2976                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2977
2978                 r = -EFAULT;
2979                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2980                         break;
2981                 r = 0;
2982                 break;
2983         }
2984         case KVM_SET_XSAVE: {
2985                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2986                 r = -ENOMEM;
2987                 if (!u.xsave)
2988                         break;
2989
2990                 r = -EFAULT;
2991                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2992                         break;
2993
2994                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2995                 break;
2996         }
2997         case KVM_GET_XCRS: {
2998                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2999                 r = -ENOMEM;
3000                 if (!u.xcrs)
3001                         break;
3002
3003                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3004
3005                 r = -EFAULT;
3006                 if (copy_to_user(argp, u.xcrs,
3007                                  sizeof(struct kvm_xcrs)))
3008                         break;
3009                 r = 0;
3010                 break;
3011         }
3012         case KVM_SET_XCRS: {
3013                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3014                 r = -ENOMEM;
3015                 if (!u.xcrs)
3016                         break;
3017
3018                 r = -EFAULT;
3019                 if (copy_from_user(u.xcrs, argp,
3020                                    sizeof(struct kvm_xcrs)))
3021                         break;
3022
3023                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3024                 break;
3025         }
3026         default:
3027                 r = -EINVAL;
3028         }
3029 out:
3030         kfree(u.buffer);
3031         return r;
3032 }
3033
3034 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3035 {
3036         int ret;
3037
3038         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3039                 return -1;
3040         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3041         return ret;
3042 }
3043
3044 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3045                                               u64 ident_addr)
3046 {
3047         kvm->arch.ept_identity_map_addr = ident_addr;
3048         return 0;
3049 }
3050
3051 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3052                                           u32 kvm_nr_mmu_pages)
3053 {
3054         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3055                 return -EINVAL;
3056
3057         mutex_lock(&kvm->slots_lock);
3058         spin_lock(&kvm->mmu_lock);
3059
3060         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3061         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3062
3063         spin_unlock(&kvm->mmu_lock);
3064         mutex_unlock(&kvm->slots_lock);
3065         return 0;
3066 }
3067
3068 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3069 {
3070         return kvm->arch.n_max_mmu_pages;
3071 }
3072
3073 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3074 {
3075         int r;
3076
3077         r = 0;
3078         switch (chip->chip_id) {
3079         case KVM_IRQCHIP_PIC_MASTER:
3080                 memcpy(&chip->chip.pic,
3081                         &pic_irqchip(kvm)->pics[0],
3082                         sizeof(struct kvm_pic_state));
3083                 break;
3084         case KVM_IRQCHIP_PIC_SLAVE:
3085                 memcpy(&chip->chip.pic,
3086                         &pic_irqchip(kvm)->pics[1],
3087                         sizeof(struct kvm_pic_state));
3088                 break;
3089         case KVM_IRQCHIP_IOAPIC:
3090                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3091                 break;
3092         default:
3093                 r = -EINVAL;
3094                 break;
3095         }
3096         return r;
3097 }
3098
3099 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3100 {
3101         int r;
3102
3103         r = 0;
3104         switch (chip->chip_id) {
3105         case KVM_IRQCHIP_PIC_MASTER:
3106                 spin_lock(&pic_irqchip(kvm)->lock);
3107                 memcpy(&pic_irqchip(kvm)->pics[0],
3108                         &chip->chip.pic,
3109                         sizeof(struct kvm_pic_state));
3110                 spin_unlock(&pic_irqchip(kvm)->lock);
3111                 break;
3112         case KVM_IRQCHIP_PIC_SLAVE:
3113                 spin_lock(&pic_irqchip(kvm)->lock);
3114                 memcpy(&pic_irqchip(kvm)->pics[1],
3115                         &chip->chip.pic,
3116                         sizeof(struct kvm_pic_state));
3117                 spin_unlock(&pic_irqchip(kvm)->lock);
3118                 break;
3119         case KVM_IRQCHIP_IOAPIC:
3120                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3121                 break;
3122         default:
3123                 r = -EINVAL;
3124                 break;
3125         }
3126         kvm_pic_update_irq(pic_irqchip(kvm));
3127         return r;
3128 }
3129
3130 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3131 {
3132         int r = 0;
3133
3134         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3135         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3136         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3137         return r;
3138 }
3139
3140 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3141 {
3142         int r = 0;
3143
3144         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3145         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3146         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3147         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3148         return r;
3149 }
3150
3151 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3152 {
3153         int r = 0;
3154
3155         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3156         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3157                 sizeof(ps->channels));
3158         ps->flags = kvm->arch.vpit->pit_state.flags;
3159         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3160         memset(&ps->reserved, 0, sizeof(ps->reserved));
3161         return r;
3162 }
3163
3164 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3165 {
3166         int r = 0, start = 0;
3167         u32 prev_legacy, cur_legacy;
3168         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3169         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3170         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3171         if (!prev_legacy && cur_legacy)
3172                 start = 1;
3173         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3174                sizeof(kvm->arch.vpit->pit_state.channels));
3175         kvm->arch.vpit->pit_state.flags = ps->flags;
3176         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3177         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3178         return r;
3179 }
3180
3181 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3182                                  struct kvm_reinject_control *control)
3183 {
3184         if (!kvm->arch.vpit)
3185                 return -ENXIO;
3186         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3187         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3188         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3189         return 0;
3190 }
3191
3192 /*
3193  * Get (and clear) the dirty memory log for a memory slot.
3194  */
3195 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3196                                       struct kvm_dirty_log *log)
3197 {
3198         int r, i;
3199         struct kvm_memory_slot *memslot;
3200         unsigned long n;
3201         unsigned long is_dirty = 0;
3202
3203         mutex_lock(&kvm->slots_lock);
3204
3205         r = -EINVAL;
3206         if (log->slot >= KVM_MEMORY_SLOTS)
3207                 goto out;
3208
3209         memslot = &kvm->memslots->memslots[log->slot];
3210         r = -ENOENT;
3211         if (!memslot->dirty_bitmap)
3212                 goto out;
3213
3214         n = kvm_dirty_bitmap_bytes(memslot);
3215
3216         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3217                 is_dirty = memslot->dirty_bitmap[i];
3218
3219         /* If nothing is dirty, don't bother messing with page tables. */
3220         if (is_dirty) {
3221                 struct kvm_memslots *slots, *old_slots;
3222                 unsigned long *dirty_bitmap;
3223
3224                 dirty_bitmap = memslot->dirty_bitmap_head;
3225                 if (memslot->dirty_bitmap == dirty_bitmap)
3226                         dirty_bitmap += n / sizeof(long);
3227                 memset(dirty_bitmap, 0, n);
3228
3229                 r = -ENOMEM;
3230                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3231                 if (!slots)
3232                         goto out;
3233                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3234                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3235                 slots->generation++;
3236
3237                 old_slots = kvm->memslots;
3238                 rcu_assign_pointer(kvm->memslots, slots);
3239                 synchronize_srcu_expedited(&kvm->srcu);
3240                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3241                 kfree(old_slots);
3242
3243                 spin_lock(&kvm->mmu_lock);
3244                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3245                 spin_unlock(&kvm->mmu_lock);
3246
3247                 r = -EFAULT;
3248                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3249                         goto out;
3250         } else {
3251                 r = -EFAULT;
3252                 if (clear_user(log->dirty_bitmap, n))
3253                         goto out;
3254         }
3255
3256         r = 0;
3257 out:
3258         mutex_unlock(&kvm->slots_lock);
3259         return r;
3260 }
3261
3262 long kvm_arch_vm_ioctl(struct file *filp,
3263                        unsigned int ioctl, unsigned long arg)
3264 {
3265         struct kvm *kvm = filp->private_data;
3266         void __user *argp = (void __user *)arg;
3267         int r = -ENOTTY;
3268         /*
3269          * This union makes it completely explicit to gcc-3.x
3270          * that these two variables' stack usage should be
3271          * combined, not added together.
3272          */
3273         union {
3274                 struct kvm_pit_state ps;
3275                 struct kvm_pit_state2 ps2;
3276                 struct kvm_pit_config pit_config;
3277         } u;
3278
3279         switch (ioctl) {
3280         case KVM_SET_TSS_ADDR:
3281                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3282                 if (r < 0)
3283                         goto out;
3284                 break;
3285         case KVM_SET_IDENTITY_MAP_ADDR: {
3286                 u64 ident_addr;
3287
3288                 r = -EFAULT;
3289                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3290                         goto out;
3291                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3292                 if (r < 0)
3293                         goto out;
3294                 break;
3295         }
3296         case KVM_SET_NR_MMU_PAGES:
3297                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3298                 if (r)
3299                         goto out;
3300                 break;
3301         case KVM_GET_NR_MMU_PAGES:
3302                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3303                 break;
3304         case KVM_CREATE_IRQCHIP: {
3305                 struct kvm_pic *vpic;
3306
3307                 mutex_lock(&kvm->lock);
3308                 r = -EEXIST;
3309                 if (kvm->arch.vpic)
3310                         goto create_irqchip_unlock;
3311                 r = -ENOMEM;
3312                 vpic = kvm_create_pic(kvm);
3313                 if (vpic) {
3314                         r = kvm_ioapic_init(kvm);
3315                         if (r) {
3316                                 mutex_lock(&kvm->slots_lock);
3317                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3318                                                           &vpic->dev);
3319                                 mutex_unlock(&kvm->slots_lock);
3320                                 kfree(vpic);
3321                                 goto create_irqchip_unlock;
3322                         }
3323                 } else
3324                         goto create_irqchip_unlock;
3325                 smp_wmb();
3326                 kvm->arch.vpic = vpic;
3327                 smp_wmb();
3328                 r = kvm_setup_default_irq_routing(kvm);
3329                 if (r) {
3330                         mutex_lock(&kvm->slots_lock);
3331                         mutex_lock(&kvm->irq_lock);
3332                         kvm_ioapic_destroy(kvm);
3333                         kvm_destroy_pic(kvm);
3334                         mutex_unlock(&kvm->irq_lock);
3335                         mutex_unlock(&kvm->slots_lock);
3336                 }
3337         create_irqchip_unlock:
3338                 mutex_unlock(&kvm->lock);
3339                 break;
3340         }
3341         case KVM_CREATE_PIT:
3342                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3343                 goto create_pit;
3344         case KVM_CREATE_PIT2:
3345                 r = -EFAULT;
3346                 if (copy_from_user(&u.pit_config, argp,
3347                                    sizeof(struct kvm_pit_config)))
3348                         goto out;
3349         create_pit:
3350                 mutex_lock(&kvm->slots_lock);
3351                 r = -EEXIST;
3352                 if (kvm->arch.vpit)
3353                         goto create_pit_unlock;
3354                 r = -ENOMEM;
3355                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3356                 if (kvm->arch.vpit)
3357                         r = 0;
3358         create_pit_unlock:
3359                 mutex_unlock(&kvm->slots_lock);
3360                 break;
3361         case KVM_IRQ_LINE_STATUS:
3362         case KVM_IRQ_LINE: {
3363                 struct kvm_irq_level irq_event;
3364
3365                 r = -EFAULT;
3366                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3367                         goto out;
3368                 r = -ENXIO;
3369                 if (irqchip_in_kernel(kvm)) {
3370                         __s32 status;
3371                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3372                                         irq_event.irq, irq_event.level);
3373                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3374                                 r = -EFAULT;
3375                                 irq_event.status = status;
3376                                 if (copy_to_user(argp, &irq_event,
3377                                                         sizeof irq_event))
3378                                         goto out;
3379                         }
3380                         r = 0;
3381                 }
3382                 break;
3383         }
3384         case KVM_GET_IRQCHIP: {
3385                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3386                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3387
3388                 r = -ENOMEM;
3389                 if (!chip)
3390                         goto out;
3391                 r = -EFAULT;
3392                 if (copy_from_user(chip, argp, sizeof *chip))
3393                         goto get_irqchip_out;
3394                 r = -ENXIO;
3395                 if (!irqchip_in_kernel(kvm))
3396                         goto get_irqchip_out;
3397                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3398                 if (r)
3399                         goto get_irqchip_out;
3400                 r = -EFAULT;
3401                 if (copy_to_user(argp, chip, sizeof *chip))
3402                         goto get_irqchip_out;
3403                 r = 0;
3404         get_irqchip_out:
3405                 kfree(chip);
3406                 if (r)
3407                         goto out;
3408                 break;
3409         }
3410         case KVM_SET_IRQCHIP: {
3411                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3412                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3413
3414                 r = -ENOMEM;
3415                 if (!chip)
3416                         goto out;
3417                 r = -EFAULT;
3418                 if (copy_from_user(chip, argp, sizeof *chip))
3419                         goto set_irqchip_out;
3420                 r = -ENXIO;
3421                 if (!irqchip_in_kernel(kvm))
3422                         goto set_irqchip_out;
3423                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3424                 if (r)
3425                         goto set_irqchip_out;
3426                 r = 0;
3427         set_irqchip_out:
3428                 kfree(chip);
3429                 if (r)
3430                         goto out;
3431                 break;
3432         }
3433         case KVM_GET_PIT: {
3434                 r = -EFAULT;
3435                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3436                         goto out;
3437                 r = -ENXIO;
3438                 if (!kvm->arch.vpit)
3439                         goto out;
3440                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3441                 if (r)
3442                         goto out;
3443                 r = -EFAULT;
3444                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3445                         goto out;
3446                 r = 0;
3447                 break;
3448         }
3449         case KVM_SET_PIT: {
3450                 r = -EFAULT;
3451                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3452                         goto out;
3453                 r = -ENXIO;
3454                 if (!kvm->arch.vpit)
3455                         goto out;
3456                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3457                 if (r)
3458                         goto out;
3459                 r = 0;
3460                 break;
3461         }
3462         case KVM_GET_PIT2: {
3463                 r = -ENXIO;
3464                 if (!kvm->arch.vpit)
3465                         goto out;
3466                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3467                 if (r)
3468                         goto out;
3469                 r = -EFAULT;
3470                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3471                         goto out;
3472                 r = 0;
3473                 break;
3474         }
3475         case KVM_SET_PIT2: {
3476                 r = -EFAULT;
3477                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3478                         goto out;
3479                 r = -ENXIO;
3480                 if (!kvm->arch.vpit)
3481                         goto out;
3482                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3483                 if (r)
3484                         goto out;
3485                 r = 0;
3486                 break;
3487         }
3488         case KVM_REINJECT_CONTROL: {
3489                 struct kvm_reinject_control control;
3490                 r =  -EFAULT;
3491                 if (copy_from_user(&control, argp, sizeof(control)))
3492                         goto out;
3493                 r = kvm_vm_ioctl_reinject(kvm, &control);
3494                 if (r)
3495                         goto out;
3496                 r = 0;
3497                 break;
3498         }
3499         case KVM_XEN_HVM_CONFIG: {
3500                 r = -EFAULT;
3501                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3502                                    sizeof(struct kvm_xen_hvm_config)))
3503                         goto out;
3504                 r = -EINVAL;
3505                 if (kvm->arch.xen_hvm_config.flags)
3506                         goto out;
3507                 r = 0;
3508                 break;
3509         }
3510         case KVM_SET_CLOCK: {
3511                 struct kvm_clock_data user_ns;
3512                 u64 now_ns;
3513                 s64 delta;
3514
3515                 r = -EFAULT;
3516                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3517                         goto out;
3518
3519                 r = -EINVAL;
3520                 if (user_ns.flags)
3521                         goto out;
3522
3523                 r = 0;
3524                 local_irq_disable();
3525                 now_ns = get_kernel_ns();
3526                 delta = user_ns.clock - now_ns;
3527                 local_irq_enable();
3528                 kvm->arch.kvmclock_offset = delta;
3529                 break;
3530         }
3531         case KVM_GET_CLOCK: {
3532                 struct kvm_clock_data user_ns;
3533                 u64 now_ns;
3534
3535                 local_irq_disable();
3536                 now_ns = get_kernel_ns();
3537                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3538                 local_irq_enable();
3539                 user_ns.flags = 0;
3540                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3541
3542                 r = -EFAULT;
3543                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3544                         goto out;
3545                 r = 0;
3546                 break;
3547         }
3548
3549         default:
3550                 ;
3551         }
3552 out:
3553         return r;
3554 }
3555
3556 static void kvm_init_msr_list(void)
3557 {
3558         u32 dummy[2];
3559         unsigned i, j;
3560
3561         /* skip the first msrs in the list. KVM-specific */
3562         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3563                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3564                         continue;
3565                 if (j < i)
3566                         msrs_to_save[j] = msrs_to_save[i];
3567                 j++;
3568         }
3569         num_msrs_to_save = j;
3570 }
3571
3572 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3573                            const void *v)
3574 {
3575         if (vcpu->arch.apic &&
3576             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3577                 return 0;
3578
3579         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3580 }
3581
3582 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3583 {
3584         if (vcpu->arch.apic &&
3585             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3586                 return 0;
3587
3588         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3589 }
3590
3591 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3592                         struct kvm_segment *var, int seg)
3593 {
3594         kvm_x86_ops->set_segment(vcpu, var, seg);
3595 }
3596
3597 void kvm_get_segment(struct kvm_vcpu *vcpu,
3598                      struct kvm_segment *var, int seg)
3599 {
3600         kvm_x86_ops->get_segment(vcpu, var, seg);
3601 }
3602
3603 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3604 {
3605         return gpa;
3606 }
3607
3608 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3609 {
3610         gpa_t t_gpa;
3611         struct x86_exception exception;
3612
3613         BUG_ON(!mmu_is_nested(vcpu));
3614
3615         /* NPT walks are always user-walks */
3616         access |= PFERR_USER_MASK;
3617         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3618
3619         return t_gpa;
3620 }
3621
3622 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3623                               struct x86_exception *exception)
3624 {
3625         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3626         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3627 }
3628
3629  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3630                                 struct x86_exception *exception)
3631 {
3632         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3633         access |= PFERR_FETCH_MASK;
3634         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3635 }
3636
3637 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3638                                struct x86_exception *exception)
3639 {
3640         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3641         access |= PFERR_WRITE_MASK;
3642         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3643 }
3644
3645 /* uses this to access any guest's mapped memory without checking CPL */
3646 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3647                                 struct x86_exception *exception)
3648 {
3649         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3650 }
3651
3652 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3653                                       struct kvm_vcpu *vcpu, u32 access,
3654                                       struct x86_exception *exception)
3655 {
3656         void *data = val;
3657         int r = X86EMUL_CONTINUE;
3658
3659         while (bytes) {
3660                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3661                                                             exception);
3662                 unsigned offset = addr & (PAGE_SIZE-1);
3663                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3664                 int ret;
3665
3666                 if (gpa == UNMAPPED_GVA)
3667                         return X86EMUL_PROPAGATE_FAULT;
3668                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3669                 if (ret < 0) {
3670                         r = X86EMUL_IO_NEEDED;
3671                         goto out;
3672                 }
3673
3674                 bytes -= toread;
3675                 data += toread;
3676                 addr += toread;
3677         }
3678 out:
3679         return r;
3680 }
3681
3682 /* used for instruction fetching */
3683 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3684                                 struct kvm_vcpu *vcpu,
3685                                 struct x86_exception *exception)
3686 {
3687         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3688         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3689                                           access | PFERR_FETCH_MASK,
3690                                           exception);
3691 }
3692
3693 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3694                                struct kvm_vcpu *vcpu,
3695                                struct x86_exception *exception)
3696 {
3697         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3698         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3699                                           exception);
3700 }
3701
3702 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3703                                       struct kvm_vcpu *vcpu,
3704                                       struct x86_exception *exception)
3705 {
3706         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3707 }
3708
3709 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3710                                        unsigned int bytes,
3711                                        struct kvm_vcpu *vcpu,
3712                                        struct x86_exception *exception)
3713 {
3714         void *data = val;
3715         int r = X86EMUL_CONTINUE;
3716
3717         while (bytes) {
3718                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3719                                                              PFERR_WRITE_MASK,
3720                                                              exception);
3721                 unsigned offset = addr & (PAGE_SIZE-1);
3722                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3723                 int ret;
3724
3725                 if (gpa == UNMAPPED_GVA)
3726                         return X86EMUL_PROPAGATE_FAULT;
3727                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3728                 if (ret < 0) {
3729                         r = X86EMUL_IO_NEEDED;
3730                         goto out;
3731                 }
3732
3733                 bytes -= towrite;
3734                 data += towrite;
3735                 addr += towrite;
3736         }
3737 out:
3738         return r;
3739 }
3740
3741 static int emulator_read_emulated(unsigned long addr,
3742                                   void *val,
3743                                   unsigned int bytes,
3744                                   struct x86_exception *exception,
3745                                   struct kvm_vcpu *vcpu)
3746 {
3747         gpa_t                 gpa;
3748
3749         if (vcpu->mmio_read_completed) {
3750                 memcpy(val, vcpu->mmio_data, bytes);
3751                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3752                                vcpu->mmio_phys_addr, *(u64 *)val);
3753                 vcpu->mmio_read_completed = 0;
3754                 return X86EMUL_CONTINUE;
3755         }
3756
3757         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3758
3759         if (gpa == UNMAPPED_GVA)
3760                 return X86EMUL_PROPAGATE_FAULT;
3761
3762         /* For APIC access vmexit */
3763         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3764                 goto mmio;
3765
3766         if (kvm_read_guest_virt(addr, val, bytes, vcpu, exception)
3767             == X86EMUL_CONTINUE)
3768                 return X86EMUL_CONTINUE;
3769
3770 mmio:
3771         /*
3772          * Is this MMIO handled locally?
3773          */
3774         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3775                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3776                 return X86EMUL_CONTINUE;
3777         }
3778
3779         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3780
3781         vcpu->mmio_needed = 1;
3782         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3783         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3784         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3785         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3786
3787         return X86EMUL_IO_NEEDED;
3788 }
3789
3790 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3791                         const void *val, int bytes)
3792 {
3793         int ret;
3794
3795         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3796         if (ret < 0)
3797                 return 0;
3798         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3799         return 1;
3800 }
3801
3802 static int emulator_write_emulated_onepage(unsigned long addr,
3803                                            const void *val,
3804                                            unsigned int bytes,
3805                                            struct x86_exception *exception,
3806                                            struct kvm_vcpu *vcpu)
3807 {
3808         gpa_t                 gpa;
3809
3810         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3811
3812         if (gpa == UNMAPPED_GVA)
3813                 return X86EMUL_PROPAGATE_FAULT;
3814
3815         /* For APIC access vmexit */
3816         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3817                 goto mmio;
3818
3819         if (emulator_write_phys(vcpu, gpa, val, bytes))
3820                 return X86EMUL_CONTINUE;
3821
3822 mmio:
3823         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3824         /*
3825          * Is this MMIO handled locally?
3826          */
3827         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3828                 return X86EMUL_CONTINUE;
3829
3830         vcpu->mmio_needed = 1;
3831         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3832         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3833         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3834         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3835         memcpy(vcpu->run->mmio.data, val, bytes);
3836
3837         return X86EMUL_CONTINUE;
3838 }
3839
3840 int emulator_write_emulated(unsigned long addr,
3841                             const void *val,
3842                             unsigned int bytes,
3843                             struct x86_exception *exception,
3844                             struct kvm_vcpu *vcpu)
3845 {
3846         /* Crossing a page boundary? */
3847         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3848                 int rc, now;
3849
3850                 now = -addr & ~PAGE_MASK;
3851                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
3852                                                      vcpu);
3853                 if (rc != X86EMUL_CONTINUE)
3854                         return rc;
3855                 addr += now;
3856                 val += now;
3857                 bytes -= now;
3858         }
3859         return emulator_write_emulated_onepage(addr, val, bytes, exception,
3860                                                vcpu);
3861 }
3862
3863 #define CMPXCHG_TYPE(t, ptr, old, new) \
3864         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3865
3866 #ifdef CONFIG_X86_64
3867 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3868 #else
3869 #  define CMPXCHG64(ptr, old, new) \
3870         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3871 #endif
3872
3873 static int emulator_cmpxchg_emulated(unsigned long addr,
3874                                      const void *old,
3875                                      const void *new,
3876                                      unsigned int bytes,
3877                                      struct x86_exception *exception,
3878                                      struct kvm_vcpu *vcpu)
3879 {
3880         gpa_t gpa;
3881         struct page *page;
3882         char *kaddr;
3883         bool exchanged;
3884
3885         /* guests cmpxchg8b have to be emulated atomically */
3886         if (bytes > 8 || (bytes & (bytes - 1)))
3887                 goto emul_write;
3888
3889         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3890
3891         if (gpa == UNMAPPED_GVA ||
3892             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3893                 goto emul_write;
3894
3895         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3896                 goto emul_write;
3897
3898         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3899         if (is_error_page(page)) {
3900                 kvm_release_page_clean(page);
3901                 goto emul_write;
3902         }
3903
3904         kaddr = kmap_atomic(page, KM_USER0);
3905         kaddr += offset_in_page(gpa);
3906         switch (bytes) {
3907         case 1:
3908                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3909                 break;
3910         case 2:
3911                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3912                 break;
3913         case 4:
3914                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3915                 break;
3916         case 8:
3917                 exchanged = CMPXCHG64(kaddr, old, new);
3918                 break;
3919         default:
3920                 BUG();
3921         }
3922         kunmap_atomic(kaddr, KM_USER0);
3923         kvm_release_page_dirty(page);
3924
3925         if (!exchanged)
3926                 return X86EMUL_CMPXCHG_FAILED;
3927
3928         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3929
3930         return X86EMUL_CONTINUE;
3931
3932 emul_write:
3933         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3934
3935         return emulator_write_emulated(addr, new, bytes, exception, vcpu);
3936 }
3937
3938 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3939 {
3940         /* TODO: String I/O for in kernel device */
3941         int r;
3942
3943         if (vcpu->arch.pio.in)
3944                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3945                                     vcpu->arch.pio.size, pd);
3946         else
3947                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3948                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3949                                      pd);
3950         return r;
3951 }
3952
3953
3954 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3955                              unsigned int count, struct kvm_vcpu *vcpu)
3956 {
3957         if (vcpu->arch.pio.count)
3958                 goto data_avail;
3959
3960         trace_kvm_pio(0, port, size, count);
3961
3962         vcpu->arch.pio.port = port;
3963         vcpu->arch.pio.in = 1;
3964         vcpu->arch.pio.count  = count;
3965         vcpu->arch.pio.size = size;
3966
3967         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3968         data_avail:
3969                 memcpy(val, vcpu->arch.pio_data, size * count);
3970                 vcpu->arch.pio.count = 0;
3971                 return 1;
3972         }
3973
3974         vcpu->run->exit_reason = KVM_EXIT_IO;
3975         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3976         vcpu->run->io.size = size;
3977         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3978         vcpu->run->io.count = count;
3979         vcpu->run->io.port = port;
3980
3981         return 0;
3982 }
3983
3984 static int emulator_pio_out_emulated(int size, unsigned short port,
3985                               const void *val, unsigned int count,
3986                               struct kvm_vcpu *vcpu)
3987 {
3988         trace_kvm_pio(1, port, size, count);
3989
3990         vcpu->arch.pio.port = port;
3991         vcpu->arch.pio.in = 0;
3992         vcpu->arch.pio.count = count;
3993         vcpu->arch.pio.size = size;
3994
3995         memcpy(vcpu->arch.pio_data, val, size * count);
3996
3997         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3998                 vcpu->arch.pio.count = 0;
3999                 return 1;
4000         }
4001
4002         vcpu->run->exit_reason = KVM_EXIT_IO;
4003         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4004         vcpu->run->io.size = size;
4005         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4006         vcpu->run->io.count = count;
4007         vcpu->run->io.port = port;
4008
4009         return 0;
4010 }
4011
4012 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4013 {
4014         return kvm_x86_ops->get_segment_base(vcpu, seg);
4015 }
4016
4017 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4018 {
4019         kvm_mmu_invlpg(vcpu, address);
4020         return X86EMUL_CONTINUE;
4021 }
4022
4023 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4024 {
4025         if (!need_emulate_wbinvd(vcpu))
4026                 return X86EMUL_CONTINUE;
4027
4028         if (kvm_x86_ops->has_wbinvd_exit()) {
4029                 int cpu = get_cpu();
4030
4031                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4032                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4033                                 wbinvd_ipi, NULL, 1);
4034                 put_cpu();
4035                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4036         } else
4037                 wbinvd();
4038         return X86EMUL_CONTINUE;
4039 }
4040 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4041
4042 int emulate_clts(struct kvm_vcpu *vcpu)
4043 {
4044         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4045         kvm_x86_ops->fpu_activate(vcpu);
4046         return X86EMUL_CONTINUE;
4047 }
4048
4049 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4050 {
4051         return _kvm_get_dr(vcpu, dr, dest);
4052 }
4053
4054 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4055 {
4056
4057         return __kvm_set_dr(vcpu, dr, value);
4058 }
4059
4060 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4061 {
4062         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4063 }
4064
4065 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4066 {
4067         unsigned long value;
4068
4069         switch (cr) {
4070         case 0:
4071                 value = kvm_read_cr0(vcpu);
4072                 break;
4073         case 2:
4074                 value = vcpu->arch.cr2;
4075                 break;
4076         case 3:
4077                 value = kvm_read_cr3(vcpu);
4078                 break;
4079         case 4:
4080                 value = kvm_read_cr4(vcpu);
4081                 break;
4082         case 8:
4083                 value = kvm_get_cr8(vcpu);
4084                 break;
4085         default:
4086                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4087                 return 0;
4088         }
4089
4090         return value;
4091 }
4092
4093 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4094 {
4095         int res = 0;
4096
4097         switch (cr) {
4098         case 0:
4099                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4100                 break;
4101         case 2:
4102                 vcpu->arch.cr2 = val;
4103                 break;
4104         case 3:
4105                 res = kvm_set_cr3(vcpu, val);
4106                 break;
4107         case 4:
4108                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4109                 break;
4110         case 8:
4111                 res = kvm_set_cr8(vcpu, val);
4112                 break;
4113         default:
4114                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4115                 res = -1;
4116         }
4117
4118         return res;
4119 }
4120
4121 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4122 {
4123         return kvm_x86_ops->get_cpl(vcpu);
4124 }
4125
4126 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4127 {
4128         kvm_x86_ops->get_gdt(vcpu, dt);
4129 }
4130
4131 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4132 {
4133         kvm_x86_ops->get_idt(vcpu, dt);
4134 }
4135
4136 static unsigned long emulator_get_cached_segment_base(int seg,
4137                                                       struct kvm_vcpu *vcpu)
4138 {
4139         return get_segment_base(vcpu, seg);
4140 }
4141
4142 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4143                                            struct kvm_vcpu *vcpu)
4144 {
4145         struct kvm_segment var;
4146
4147         kvm_get_segment(vcpu, &var, seg);
4148
4149         if (var.unusable)
4150                 return false;
4151
4152         if (var.g)
4153                 var.limit >>= 12;
4154         set_desc_limit(desc, var.limit);
4155         set_desc_base(desc, (unsigned long)var.base);
4156         desc->type = var.type;
4157         desc->s = var.s;
4158         desc->dpl = var.dpl;
4159         desc->p = var.present;
4160         desc->avl = var.avl;
4161         desc->l = var.l;
4162         desc->d = var.db;
4163         desc->g = var.g;
4164
4165         return true;
4166 }
4167
4168 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4169                                            struct kvm_vcpu *vcpu)
4170 {
4171         struct kvm_segment var;
4172
4173         /* needed to preserve selector */
4174         kvm_get_segment(vcpu, &var, seg);
4175
4176         var.base = get_desc_base(desc);
4177         var.limit = get_desc_limit(desc);
4178         if (desc->g)
4179                 var.limit = (var.limit << 12) | 0xfff;
4180         var.type = desc->type;
4181         var.present = desc->p;
4182         var.dpl = desc->dpl;
4183         var.db = desc->d;
4184         var.s = desc->s;
4185         var.l = desc->l;
4186         var.g = desc->g;
4187         var.avl = desc->avl;
4188         var.present = desc->p;
4189         var.unusable = !var.present;
4190         var.padding = 0;
4191
4192         kvm_set_segment(vcpu, &var, seg);
4193         return;
4194 }
4195
4196 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4197 {
4198         struct kvm_segment kvm_seg;
4199
4200         kvm_get_segment(vcpu, &kvm_seg, seg);
4201         return kvm_seg.selector;
4202 }
4203
4204 static void emulator_set_segment_selector(u16 sel, int seg,
4205                                           struct kvm_vcpu *vcpu)
4206 {
4207         struct kvm_segment kvm_seg;
4208
4209         kvm_get_segment(vcpu, &kvm_seg, seg);
4210         kvm_seg.selector = sel;
4211         kvm_set_segment(vcpu, &kvm_seg, seg);
4212 }
4213
4214 static struct x86_emulate_ops emulate_ops = {
4215         .read_std            = kvm_read_guest_virt_system,
4216         .write_std           = kvm_write_guest_virt_system,
4217         .fetch               = kvm_fetch_guest_virt,
4218         .read_emulated       = emulator_read_emulated,
4219         .write_emulated      = emulator_write_emulated,
4220         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4221         .pio_in_emulated     = emulator_pio_in_emulated,
4222         .pio_out_emulated    = emulator_pio_out_emulated,
4223         .get_cached_descriptor = emulator_get_cached_descriptor,
4224         .set_cached_descriptor = emulator_set_cached_descriptor,
4225         .get_segment_selector = emulator_get_segment_selector,
4226         .set_segment_selector = emulator_set_segment_selector,
4227         .get_cached_segment_base = emulator_get_cached_segment_base,
4228         .get_gdt             = emulator_get_gdt,
4229         .get_idt             = emulator_get_idt,
4230         .get_cr              = emulator_get_cr,
4231         .set_cr              = emulator_set_cr,
4232         .cpl                 = emulator_get_cpl,
4233         .get_dr              = emulator_get_dr,
4234         .set_dr              = emulator_set_dr,
4235         .set_msr             = kvm_set_msr,
4236         .get_msr             = kvm_get_msr,
4237 };
4238
4239 static void cache_all_regs(struct kvm_vcpu *vcpu)
4240 {
4241         kvm_register_read(vcpu, VCPU_REGS_RAX);
4242         kvm_register_read(vcpu, VCPU_REGS_RSP);
4243         kvm_register_read(vcpu, VCPU_REGS_RIP);
4244         vcpu->arch.regs_dirty = ~0;
4245 }
4246
4247 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4248 {
4249         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4250         /*
4251          * an sti; sti; sequence only disable interrupts for the first
4252          * instruction. So, if the last instruction, be it emulated or
4253          * not, left the system with the INT_STI flag enabled, it
4254          * means that the last instruction is an sti. We should not
4255          * leave the flag on in this case. The same goes for mov ss
4256          */
4257         if (!(int_shadow & mask))
4258                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4259 }
4260
4261 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4262 {
4263         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4264         if (ctxt->exception.vector == PF_VECTOR)
4265                 kvm_propagate_fault(vcpu, &ctxt->exception);
4266         else if (ctxt->exception.error_code_valid)
4267                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4268                                       ctxt->exception.error_code);
4269         else
4270                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4271 }
4272
4273 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4274 {
4275         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4276         int cs_db, cs_l;
4277
4278         cache_all_regs(vcpu);
4279
4280         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4281
4282         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4283         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4284         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4285         vcpu->arch.emulate_ctxt.mode =
4286                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4287                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4288                 ? X86EMUL_MODE_VM86 : cs_l
4289                 ? X86EMUL_MODE_PROT64 : cs_db
4290                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4291         memset(c, 0, sizeof(struct decode_cache));
4292         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4293 }
4294
4295 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4296 {
4297         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4298         int ret;
4299
4300         init_emulate_ctxt(vcpu);
4301
4302         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4303         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4304         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4305         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4306
4307         if (ret != X86EMUL_CONTINUE)
4308                 return EMULATE_FAIL;
4309
4310         vcpu->arch.emulate_ctxt.eip = c->eip;
4311         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4312         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4313         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4314
4315         if (irq == NMI_VECTOR)
4316                 vcpu->arch.nmi_pending = false;
4317         else
4318                 vcpu->arch.interrupt.pending = false;
4319
4320         return EMULATE_DONE;
4321 }
4322 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4323
4324 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4325 {
4326         int r = EMULATE_DONE;
4327
4328         ++vcpu->stat.insn_emulation_fail;
4329         trace_kvm_emulate_insn_failed(vcpu);
4330         if (!is_guest_mode(vcpu)) {
4331                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4332                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4333                 vcpu->run->internal.ndata = 0;
4334                 r = EMULATE_FAIL;
4335         }
4336         kvm_queue_exception(vcpu, UD_VECTOR);
4337
4338         return r;
4339 }
4340
4341 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4342 {
4343         gpa_t gpa;
4344
4345         if (tdp_enabled)
4346                 return false;
4347
4348         /*
4349          * if emulation was due to access to shadowed page table
4350          * and it failed try to unshadow page and re-entetr the
4351          * guest to let CPU execute the instruction.
4352          */
4353         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4354                 return true;
4355
4356         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4357
4358         if (gpa == UNMAPPED_GVA)
4359                 return true; /* let cpu generate fault */
4360
4361         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4362                 return true;
4363
4364         return false;
4365 }
4366
4367 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4368                             unsigned long cr2,
4369                             int emulation_type,
4370                             void *insn,
4371                             int insn_len)
4372 {
4373         int r;
4374         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4375
4376         kvm_clear_exception_queue(vcpu);
4377         vcpu->arch.mmio_fault_cr2 = cr2;
4378         /*
4379          * TODO: fix emulate.c to use guest_read/write_register
4380          * instead of direct ->regs accesses, can save hundred cycles
4381          * on Intel for instructions that don't read/change RSP, for
4382          * for example.
4383          */
4384         cache_all_regs(vcpu);
4385
4386         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4387                 init_emulate_ctxt(vcpu);
4388                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4389                 vcpu->arch.emulate_ctxt.have_exception = false;
4390                 vcpu->arch.emulate_ctxt.perm_ok = false;
4391
4392                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len);
4393                 if (r == X86EMUL_PROPAGATE_FAULT)
4394                         goto done;
4395
4396                 trace_kvm_emulate_insn_start(vcpu);
4397
4398                 /* Only allow emulation of specific instructions on #UD
4399                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4400                 if (emulation_type & EMULTYPE_TRAP_UD) {
4401                         if (!c->twobyte)
4402                                 return EMULATE_FAIL;
4403                         switch (c->b) {
4404                         case 0x01: /* VMMCALL */
4405                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4406                                         return EMULATE_FAIL;
4407                                 break;
4408                         case 0x34: /* sysenter */
4409                         case 0x35: /* sysexit */
4410                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4411                                         return EMULATE_FAIL;
4412                                 break;
4413                         case 0x05: /* syscall */
4414                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4415                                         return EMULATE_FAIL;
4416                                 break;
4417                         default:
4418                                 return EMULATE_FAIL;
4419                         }
4420
4421                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4422                                 return EMULATE_FAIL;
4423                 }
4424
4425                 ++vcpu->stat.insn_emulation;
4426                 if (r)  {
4427                         if (reexecute_instruction(vcpu, cr2))
4428                                 return EMULATE_DONE;
4429                         if (emulation_type & EMULTYPE_SKIP)
4430                                 return EMULATE_FAIL;
4431                         return handle_emulation_failure(vcpu);
4432                 }
4433         }
4434
4435         if (emulation_type & EMULTYPE_SKIP) {
4436                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4437                 return EMULATE_DONE;
4438         }
4439
4440         /* this is needed for vmware backdor interface to work since it
4441            changes registers values  during IO operation */
4442         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4443
4444 restart:
4445         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4446
4447         if (r == EMULATION_FAILED) {
4448                 if (reexecute_instruction(vcpu, cr2))
4449                         return EMULATE_DONE;
4450
4451                 return handle_emulation_failure(vcpu);
4452         }
4453
4454 done:
4455         if (vcpu->arch.emulate_ctxt.have_exception) {
4456                 inject_emulated_exception(vcpu);
4457                 r = EMULATE_DONE;
4458         } else if (vcpu->arch.pio.count) {
4459                 if (!vcpu->arch.pio.in)
4460                         vcpu->arch.pio.count = 0;
4461                 r = EMULATE_DO_MMIO;
4462         } else if (vcpu->mmio_needed) {
4463                 if (vcpu->mmio_is_write)
4464                         vcpu->mmio_needed = 0;
4465                 r = EMULATE_DO_MMIO;
4466         } else if (r == EMULATION_RESTART)
4467                 goto restart;
4468         else
4469                 r = EMULATE_DONE;
4470
4471         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4472         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4473         kvm_make_request(KVM_REQ_EVENT, vcpu);
4474         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4475         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4476
4477         return r;
4478 }
4479 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4480
4481 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4482 {
4483         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4484         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4485         /* do not return to emulator after return from userspace */
4486         vcpu->arch.pio.count = 0;
4487         return ret;
4488 }
4489 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4490
4491 static void tsc_bad(void *info)
4492 {
4493         __get_cpu_var(cpu_tsc_khz) = 0;
4494 }
4495
4496 static void tsc_khz_changed(void *data)
4497 {
4498         struct cpufreq_freqs *freq = data;
4499         unsigned long khz = 0;
4500
4501         if (data)
4502                 khz = freq->new;
4503         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4504                 khz = cpufreq_quick_get(raw_smp_processor_id());
4505         if (!khz)
4506                 khz = tsc_khz;
4507         __get_cpu_var(cpu_tsc_khz) = khz;
4508 }
4509
4510 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4511                                      void *data)
4512 {
4513         struct cpufreq_freqs *freq = data;
4514         struct kvm *kvm;
4515         struct kvm_vcpu *vcpu;
4516         int i, send_ipi = 0;
4517
4518         /*
4519          * We allow guests to temporarily run on slowing clocks,
4520          * provided we notify them after, or to run on accelerating
4521          * clocks, provided we notify them before.  Thus time never
4522          * goes backwards.
4523          *
4524          * However, we have a problem.  We can't atomically update
4525          * the frequency of a given CPU from this function; it is
4526          * merely a notifier, which can be called from any CPU.
4527          * Changing the TSC frequency at arbitrary points in time
4528          * requires a recomputation of local variables related to
4529          * the TSC for each VCPU.  We must flag these local variables
4530          * to be updated and be sure the update takes place with the
4531          * new frequency before any guests proceed.
4532          *
4533          * Unfortunately, the combination of hotplug CPU and frequency
4534          * change creates an intractable locking scenario; the order
4535          * of when these callouts happen is undefined with respect to
4536          * CPU hotplug, and they can race with each other.  As such,
4537          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4538          * undefined; you can actually have a CPU frequency change take
4539          * place in between the computation of X and the setting of the
4540          * variable.  To protect against this problem, all updates of
4541          * the per_cpu tsc_khz variable are done in an interrupt
4542          * protected IPI, and all callers wishing to update the value
4543          * must wait for a synchronous IPI to complete (which is trivial
4544          * if the caller is on the CPU already).  This establishes the
4545          * necessary total order on variable updates.
4546          *
4547          * Note that because a guest time update may take place
4548          * anytime after the setting of the VCPU's request bit, the
4549          * correct TSC value must be set before the request.  However,
4550          * to ensure the update actually makes it to any guest which
4551          * starts running in hardware virtualization between the set
4552          * and the acquisition of the spinlock, we must also ping the
4553          * CPU after setting the request bit.
4554          *
4555          */
4556
4557         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4558                 return 0;
4559         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4560                 return 0;
4561
4562         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4563
4564         spin_lock(&kvm_lock);
4565         list_for_each_entry(kvm, &vm_list, vm_list) {
4566                 kvm_for_each_vcpu(i, vcpu, kvm) {
4567                         if (vcpu->cpu != freq->cpu)
4568                                 continue;
4569                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4570                         if (vcpu->cpu != smp_processor_id())
4571                                 send_ipi = 1;
4572                 }
4573         }
4574         spin_unlock(&kvm_lock);
4575
4576         if (freq->old < freq->new && send_ipi) {
4577                 /*
4578                  * We upscale the frequency.  Must make the guest
4579                  * doesn't see old kvmclock values while running with
4580                  * the new frequency, otherwise we risk the guest sees
4581                  * time go backwards.
4582                  *
4583                  * In case we update the frequency for another cpu
4584                  * (which might be in guest context) send an interrupt
4585                  * to kick the cpu out of guest context.  Next time
4586                  * guest context is entered kvmclock will be updated,
4587                  * so the guest will not see stale values.
4588                  */
4589                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4590         }
4591         return 0;
4592 }
4593
4594 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4595         .notifier_call  = kvmclock_cpufreq_notifier
4596 };
4597
4598 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4599                                         unsigned long action, void *hcpu)
4600 {
4601         unsigned int cpu = (unsigned long)hcpu;
4602
4603         switch (action) {
4604                 case CPU_ONLINE:
4605                 case CPU_DOWN_FAILED:
4606                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4607                         break;
4608                 case CPU_DOWN_PREPARE:
4609                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4610                         break;
4611         }
4612         return NOTIFY_OK;
4613 }
4614
4615 static struct notifier_block kvmclock_cpu_notifier_block = {
4616         .notifier_call  = kvmclock_cpu_notifier,
4617         .priority = -INT_MAX
4618 };
4619
4620 static void kvm_timer_init(void)
4621 {
4622         int cpu;
4623
4624         max_tsc_khz = tsc_khz;
4625         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4626         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4627 #ifdef CONFIG_CPU_FREQ
4628                 struct cpufreq_policy policy;
4629                 memset(&policy, 0, sizeof(policy));
4630                 cpu = get_cpu();
4631                 cpufreq_get_policy(&policy, cpu);
4632                 if (policy.cpuinfo.max_freq)
4633                         max_tsc_khz = policy.cpuinfo.max_freq;
4634                 put_cpu();
4635 #endif
4636                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4637                                           CPUFREQ_TRANSITION_NOTIFIER);
4638         }
4639         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4640         for_each_online_cpu(cpu)
4641                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4642 }
4643
4644 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4645
4646 static int kvm_is_in_guest(void)
4647 {
4648         return percpu_read(current_vcpu) != NULL;
4649 }
4650
4651 static int kvm_is_user_mode(void)
4652 {
4653         int user_mode = 3;
4654
4655         if (percpu_read(current_vcpu))
4656                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4657
4658         return user_mode != 0;
4659 }
4660
4661 static unsigned long kvm_get_guest_ip(void)
4662 {
4663         unsigned long ip = 0;
4664
4665         if (percpu_read(current_vcpu))
4666                 ip = kvm_rip_read(percpu_read(current_vcpu));
4667
4668         return ip;
4669 }
4670
4671 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4672         .is_in_guest            = kvm_is_in_guest,
4673         .is_user_mode           = kvm_is_user_mode,
4674         .get_guest_ip           = kvm_get_guest_ip,
4675 };
4676
4677 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4678 {
4679         percpu_write(current_vcpu, vcpu);
4680 }
4681 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4682
4683 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4684 {
4685         percpu_write(current_vcpu, NULL);
4686 }
4687 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4688
4689 int kvm_arch_init(void *opaque)
4690 {
4691         int r;
4692         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4693
4694         if (kvm_x86_ops) {
4695                 printk(KERN_ERR "kvm: already loaded the other module\n");
4696                 r = -EEXIST;
4697                 goto out;
4698         }
4699
4700         if (!ops->cpu_has_kvm_support()) {
4701                 printk(KERN_ERR "kvm: no hardware support\n");
4702                 r = -EOPNOTSUPP;
4703                 goto out;
4704         }
4705         if (ops->disabled_by_bios()) {
4706                 printk(KERN_ERR "kvm: disabled by bios\n");
4707                 r = -EOPNOTSUPP;
4708                 goto out;
4709         }
4710
4711         r = kvm_mmu_module_init();
4712         if (r)
4713                 goto out;
4714
4715         kvm_init_msr_list();
4716
4717         kvm_x86_ops = ops;
4718         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4719         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4720                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4721
4722         kvm_timer_init();
4723
4724         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4725
4726         if (cpu_has_xsave)
4727                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4728
4729         return 0;
4730
4731 out:
4732         return r;
4733 }
4734
4735 void kvm_arch_exit(void)
4736 {
4737         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4738
4739         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4740                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4741                                             CPUFREQ_TRANSITION_NOTIFIER);
4742         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4743         kvm_x86_ops = NULL;
4744         kvm_mmu_module_exit();
4745 }
4746
4747 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4748 {
4749         ++vcpu->stat.halt_exits;
4750         if (irqchip_in_kernel(vcpu->kvm)) {
4751                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4752                 return 1;
4753         } else {
4754                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4755                 return 0;
4756         }
4757 }
4758 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4759
4760 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4761                            unsigned long a1)
4762 {
4763         if (is_long_mode(vcpu))
4764                 return a0;
4765         else
4766                 return a0 | ((gpa_t)a1 << 32);
4767 }
4768
4769 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4770 {
4771         u64 param, ingpa, outgpa, ret;
4772         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4773         bool fast, longmode;
4774         int cs_db, cs_l;
4775
4776         /*
4777          * hypercall generates UD from non zero cpl and real mode
4778          * per HYPER-V spec
4779          */
4780         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4781                 kvm_queue_exception(vcpu, UD_VECTOR);
4782                 return 0;
4783         }
4784
4785         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4786         longmode = is_long_mode(vcpu) && cs_l == 1;
4787
4788         if (!longmode) {
4789                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4790                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4791                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4792                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4793                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4794                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4795         }
4796 #ifdef CONFIG_X86_64
4797         else {
4798                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4799                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4800                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4801         }
4802 #endif
4803
4804         code = param & 0xffff;
4805         fast = (param >> 16) & 0x1;
4806         rep_cnt = (param >> 32) & 0xfff;
4807         rep_idx = (param >> 48) & 0xfff;
4808
4809         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4810
4811         switch (code) {
4812         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4813                 kvm_vcpu_on_spin(vcpu);
4814                 break;
4815         default:
4816                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4817                 break;
4818         }
4819
4820         ret = res | (((u64)rep_done & 0xfff) << 32);
4821         if (longmode) {
4822                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4823         } else {
4824                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4825                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4826         }
4827
4828         return 1;
4829 }
4830
4831 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4832 {
4833         unsigned long nr, a0, a1, a2, a3, ret;
4834         int r = 1;
4835
4836         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4837                 return kvm_hv_hypercall(vcpu);
4838
4839         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4840         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4841         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4842         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4843         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4844
4845         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4846
4847         if (!is_long_mode(vcpu)) {
4848                 nr &= 0xFFFFFFFF;
4849                 a0 &= 0xFFFFFFFF;
4850                 a1 &= 0xFFFFFFFF;
4851                 a2 &= 0xFFFFFFFF;
4852                 a3 &= 0xFFFFFFFF;
4853         }
4854
4855         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4856                 ret = -KVM_EPERM;
4857                 goto out;
4858         }
4859
4860         switch (nr) {
4861         case KVM_HC_VAPIC_POLL_IRQ:
4862                 ret = 0;
4863                 break;
4864         case KVM_HC_MMU_OP:
4865                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4866                 break;
4867         default:
4868                 ret = -KVM_ENOSYS;
4869                 break;
4870         }
4871 out:
4872         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4873         ++vcpu->stat.hypercalls;
4874         return r;
4875 }
4876 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4877
4878 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4879 {
4880         char instruction[3];
4881         unsigned long rip = kvm_rip_read(vcpu);
4882
4883         /*
4884          * Blow out the MMU to ensure that no other VCPU has an active mapping
4885          * to ensure that the updated hypercall appears atomically across all
4886          * VCPUs.
4887          */
4888         kvm_mmu_zap_all(vcpu->kvm);
4889
4890         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4891
4892         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4893 }
4894
4895 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4896 {
4897         struct desc_ptr dt = { limit, base };
4898
4899         kvm_x86_ops->set_gdt(vcpu, &dt);
4900 }
4901
4902 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4903 {
4904         struct desc_ptr dt = { limit, base };
4905
4906         kvm_x86_ops->set_idt(vcpu, &dt);
4907 }
4908
4909 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4910 {
4911         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4912         int j, nent = vcpu->arch.cpuid_nent;
4913
4914         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4915         /* when no next entry is found, the current entry[i] is reselected */
4916         for (j = i + 1; ; j = (j + 1) % nent) {
4917                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4918                 if (ej->function == e->function) {
4919                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4920                         return j;
4921                 }
4922         }
4923         return 0; /* silence gcc, even though control never reaches here */
4924 }
4925
4926 /* find an entry with matching function, matching index (if needed), and that
4927  * should be read next (if it's stateful) */
4928 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4929         u32 function, u32 index)
4930 {
4931         if (e->function != function)
4932                 return 0;
4933         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4934                 return 0;
4935         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4936             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4937                 return 0;
4938         return 1;
4939 }
4940
4941 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4942                                               u32 function, u32 index)
4943 {
4944         int i;
4945         struct kvm_cpuid_entry2 *best = NULL;
4946
4947         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4948                 struct kvm_cpuid_entry2 *e;
4949
4950                 e = &vcpu->arch.cpuid_entries[i];
4951                 if (is_matching_cpuid_entry(e, function, index)) {
4952                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4953                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4954                         best = e;
4955                         break;
4956                 }
4957                 /*
4958                  * Both basic or both extended?
4959                  */
4960                 if (((e->function ^ function) & 0x80000000) == 0)
4961                         if (!best || e->function > best->function)
4962                                 best = e;
4963         }
4964         return best;
4965 }
4966 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4967
4968 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4969 {
4970         struct kvm_cpuid_entry2 *best;
4971
4972         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4973         if (!best || best->eax < 0x80000008)
4974                 goto not_found;
4975         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4976         if (best)
4977                 return best->eax & 0xff;
4978 not_found:
4979         return 36;
4980 }
4981
4982 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4983 {
4984         u32 function, index;
4985         struct kvm_cpuid_entry2 *best;
4986
4987         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4988         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4989         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4990         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4991         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4992         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4993         best = kvm_find_cpuid_entry(vcpu, function, index);
4994         if (best) {
4995                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4996                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4997                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4998                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4999         }
5000         kvm_x86_ops->skip_emulated_instruction(vcpu);
5001         trace_kvm_cpuid(function,
5002                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5003                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5004                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5005                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5006 }
5007 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5008
5009 /*
5010  * Check if userspace requested an interrupt window, and that the
5011  * interrupt window is open.
5012  *
5013  * No need to exit to userspace if we already have an interrupt queued.
5014  */
5015 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5016 {
5017         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5018                 vcpu->run->request_interrupt_window &&
5019                 kvm_arch_interrupt_allowed(vcpu));
5020 }
5021
5022 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5023 {
5024         struct kvm_run *kvm_run = vcpu->run;
5025
5026         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5027         kvm_run->cr8 = kvm_get_cr8(vcpu);
5028         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5029         if (irqchip_in_kernel(vcpu->kvm))
5030                 kvm_run->ready_for_interrupt_injection = 1;
5031         else
5032                 kvm_run->ready_for_interrupt_injection =
5033                         kvm_arch_interrupt_allowed(vcpu) &&
5034                         !kvm_cpu_has_interrupt(vcpu) &&
5035                         !kvm_event_needs_reinjection(vcpu);
5036 }
5037
5038 static void vapic_enter(struct kvm_vcpu *vcpu)
5039 {
5040         struct kvm_lapic *apic = vcpu->arch.apic;
5041         struct page *page;
5042
5043         if (!apic || !apic->vapic_addr)
5044                 return;
5045
5046         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5047
5048         vcpu->arch.apic->vapic_page = page;
5049 }
5050
5051 static void vapic_exit(struct kvm_vcpu *vcpu)
5052 {
5053         struct kvm_lapic *apic = vcpu->arch.apic;
5054         int idx;
5055
5056         if (!apic || !apic->vapic_addr)
5057                 return;
5058
5059         idx = srcu_read_lock(&vcpu->kvm->srcu);
5060         kvm_release_page_dirty(apic->vapic_page);
5061         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5062         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5063 }
5064
5065 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5066 {
5067         int max_irr, tpr;
5068
5069         if (!kvm_x86_ops->update_cr8_intercept)
5070                 return;
5071
5072         if (!vcpu->arch.apic)
5073                 return;
5074
5075         if (!vcpu->arch.apic->vapic_addr)
5076                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5077         else
5078                 max_irr = -1;
5079
5080         if (max_irr != -1)
5081                 max_irr >>= 4;
5082
5083         tpr = kvm_lapic_get_cr8(vcpu);
5084
5085         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5086 }
5087
5088 static void inject_pending_event(struct kvm_vcpu *vcpu)
5089 {
5090         /* try to reinject previous events if any */
5091         if (vcpu->arch.exception.pending) {
5092                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5093                                         vcpu->arch.exception.has_error_code,
5094                                         vcpu->arch.exception.error_code);
5095                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5096                                           vcpu->arch.exception.has_error_code,
5097                                           vcpu->arch.exception.error_code,
5098                                           vcpu->arch.exception.reinject);
5099                 return;
5100         }
5101
5102         if (vcpu->arch.nmi_injected) {
5103                 kvm_x86_ops->set_nmi(vcpu);
5104                 return;
5105         }
5106
5107         if (vcpu->arch.interrupt.pending) {
5108                 kvm_x86_ops->set_irq(vcpu);
5109                 return;
5110         }
5111
5112         /* try to inject new event if pending */
5113         if (vcpu->arch.nmi_pending) {
5114                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5115                         vcpu->arch.nmi_pending = false;
5116                         vcpu->arch.nmi_injected = true;
5117                         kvm_x86_ops->set_nmi(vcpu);
5118                 }
5119         } else if (kvm_cpu_has_interrupt(vcpu)) {
5120                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5121                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5122                                             false);
5123                         kvm_x86_ops->set_irq(vcpu);
5124                 }
5125         }
5126 }
5127
5128 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5129 {
5130         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5131                         !vcpu->guest_xcr0_loaded) {
5132                 /* kvm_set_xcr() also depends on this */
5133                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5134                 vcpu->guest_xcr0_loaded = 1;
5135         }
5136 }
5137
5138 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5139 {
5140         if (vcpu->guest_xcr0_loaded) {
5141                 if (vcpu->arch.xcr0 != host_xcr0)
5142                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5143                 vcpu->guest_xcr0_loaded = 0;
5144         }
5145 }
5146
5147 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5148 {
5149         int r;
5150         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5151                 vcpu->run->request_interrupt_window;
5152
5153         if (vcpu->requests) {
5154                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5155                         kvm_mmu_unload(vcpu);
5156                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5157                         __kvm_migrate_timers(vcpu);
5158                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5159                         r = kvm_guest_time_update(vcpu);
5160                         if (unlikely(r))
5161                                 goto out;
5162                 }
5163                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5164                         kvm_mmu_sync_roots(vcpu);
5165                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5166                         kvm_x86_ops->tlb_flush(vcpu);
5167                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5168                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5169                         r = 0;
5170                         goto out;
5171                 }
5172                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5173                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5174                         r = 0;
5175                         goto out;
5176                 }
5177                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5178                         vcpu->fpu_active = 0;
5179                         kvm_x86_ops->fpu_deactivate(vcpu);
5180                 }
5181                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5182                         /* Page is swapped out. Do synthetic halt */
5183                         vcpu->arch.apf.halted = true;
5184                         r = 1;
5185                         goto out;
5186                 }
5187         }
5188
5189         r = kvm_mmu_reload(vcpu);
5190         if (unlikely(r))
5191                 goto out;
5192
5193         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5194                 inject_pending_event(vcpu);
5195
5196                 /* enable NMI/IRQ window open exits if needed */
5197                 if (vcpu->arch.nmi_pending)
5198                         kvm_x86_ops->enable_nmi_window(vcpu);
5199                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5200                         kvm_x86_ops->enable_irq_window(vcpu);
5201
5202                 if (kvm_lapic_enabled(vcpu)) {
5203                         update_cr8_intercept(vcpu);
5204                         kvm_lapic_sync_to_vapic(vcpu);
5205                 }
5206         }
5207
5208         preempt_disable();
5209
5210         kvm_x86_ops->prepare_guest_switch(vcpu);
5211         if (vcpu->fpu_active)
5212                 kvm_load_guest_fpu(vcpu);
5213         kvm_load_guest_xcr0(vcpu);
5214
5215         atomic_set(&vcpu->guest_mode, 1);
5216         smp_wmb();
5217
5218         local_irq_disable();
5219
5220         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5221             || need_resched() || signal_pending(current)) {
5222                 atomic_set(&vcpu->guest_mode, 0);
5223                 smp_wmb();
5224                 local_irq_enable();
5225                 preempt_enable();
5226                 kvm_x86_ops->cancel_injection(vcpu);
5227                 r = 1;
5228                 goto out;
5229         }
5230
5231         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5232
5233         kvm_guest_enter();
5234
5235         if (unlikely(vcpu->arch.switch_db_regs)) {
5236                 set_debugreg(0, 7);
5237                 set_debugreg(vcpu->arch.eff_db[0], 0);
5238                 set_debugreg(vcpu->arch.eff_db[1], 1);
5239                 set_debugreg(vcpu->arch.eff_db[2], 2);
5240                 set_debugreg(vcpu->arch.eff_db[3], 3);
5241         }
5242
5243         trace_kvm_entry(vcpu->vcpu_id);
5244         kvm_x86_ops->run(vcpu);
5245
5246         /*
5247          * If the guest has used debug registers, at least dr7
5248          * will be disabled while returning to the host.
5249          * If we don't have active breakpoints in the host, we don't
5250          * care about the messed up debug address registers. But if
5251          * we have some of them active, restore the old state.
5252          */
5253         if (hw_breakpoint_active())
5254                 hw_breakpoint_restore();
5255
5256         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5257
5258         atomic_set(&vcpu->guest_mode, 0);
5259         smp_wmb();
5260         local_irq_enable();
5261
5262         ++vcpu->stat.exits;
5263
5264         /*
5265          * We must have an instruction between local_irq_enable() and
5266          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5267          * the interrupt shadow.  The stat.exits increment will do nicely.
5268          * But we need to prevent reordering, hence this barrier():
5269          */
5270         barrier();
5271
5272         kvm_guest_exit();
5273
5274         preempt_enable();
5275
5276         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5277
5278         /*
5279          * Profile KVM exit RIPs:
5280          */
5281         if (unlikely(prof_on == KVM_PROFILING)) {
5282                 unsigned long rip = kvm_rip_read(vcpu);
5283                 profile_hit(KVM_PROFILING, (void *)rip);
5284         }
5285
5286
5287         kvm_lapic_sync_from_vapic(vcpu);
5288
5289         r = kvm_x86_ops->handle_exit(vcpu);
5290 out:
5291         return r;
5292 }
5293
5294
5295 static int __vcpu_run(struct kvm_vcpu *vcpu)
5296 {
5297         int r;
5298         struct kvm *kvm = vcpu->kvm;
5299
5300         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5301                 pr_debug("vcpu %d received sipi with vector # %x\n",
5302                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5303                 kvm_lapic_reset(vcpu);
5304                 r = kvm_arch_vcpu_reset(vcpu);
5305                 if (r)
5306                         return r;
5307                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5308         }
5309
5310         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5311         vapic_enter(vcpu);
5312
5313         r = 1;
5314         while (r > 0) {
5315                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5316                     !vcpu->arch.apf.halted)
5317                         r = vcpu_enter_guest(vcpu);
5318                 else {
5319                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5320                         kvm_vcpu_block(vcpu);
5321                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5322                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5323                         {
5324                                 switch(vcpu->arch.mp_state) {
5325                                 case KVM_MP_STATE_HALTED:
5326                                         vcpu->arch.mp_state =
5327                                                 KVM_MP_STATE_RUNNABLE;
5328                                 case KVM_MP_STATE_RUNNABLE:
5329                                         vcpu->arch.apf.halted = false;
5330                                         break;
5331                                 case KVM_MP_STATE_SIPI_RECEIVED:
5332                                 default:
5333                                         r = -EINTR;
5334                                         break;
5335                                 }
5336                         }
5337                 }
5338
5339                 if (r <= 0)
5340                         break;
5341
5342                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5343                 if (kvm_cpu_has_pending_timer(vcpu))
5344                         kvm_inject_pending_timer_irqs(vcpu);
5345
5346                 if (dm_request_for_irq_injection(vcpu)) {
5347                         r = -EINTR;
5348                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5349                         ++vcpu->stat.request_irq_exits;
5350                 }
5351
5352                 kvm_check_async_pf_completion(vcpu);
5353
5354                 if (signal_pending(current)) {
5355                         r = -EINTR;
5356                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5357                         ++vcpu->stat.signal_exits;
5358                 }
5359                 if (need_resched()) {
5360                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5361                         kvm_resched(vcpu);
5362                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5363                 }
5364         }
5365
5366         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5367
5368         vapic_exit(vcpu);
5369
5370         return r;
5371 }
5372
5373 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5374 {
5375         int r;
5376         sigset_t sigsaved;
5377
5378         if (vcpu->sigset_active)
5379                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5380
5381         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5382                 kvm_vcpu_block(vcpu);
5383                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5384                 r = -EAGAIN;
5385                 goto out;
5386         }
5387
5388         /* re-sync apic's tpr */
5389         if (!irqchip_in_kernel(vcpu->kvm)) {
5390                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5391                         r = -EINVAL;
5392                         goto out;
5393                 }
5394         }
5395
5396         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5397                 if (vcpu->mmio_needed) {
5398                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5399                         vcpu->mmio_read_completed = 1;
5400                         vcpu->mmio_needed = 0;
5401                 }
5402                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5403                 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5404                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5405                 if (r != EMULATE_DONE) {
5406                         r = 0;
5407                         goto out;
5408                 }
5409         }
5410         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5411                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5412                                      kvm_run->hypercall.ret);
5413
5414         r = __vcpu_run(vcpu);
5415
5416 out:
5417         post_kvm_run_save(vcpu);
5418         if (vcpu->sigset_active)
5419                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5420
5421         return r;
5422 }
5423
5424 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5425 {
5426         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5427         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5428         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5429         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5430         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5431         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5432         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5433         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5434 #ifdef CONFIG_X86_64
5435         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5436         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5437         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5438         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5439         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5440         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5441         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5442         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5443 #endif
5444
5445         regs->rip = kvm_rip_read(vcpu);
5446         regs->rflags = kvm_get_rflags(vcpu);
5447
5448         return 0;
5449 }
5450
5451 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5452 {
5453         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5454         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5455         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5456         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5457         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5458         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5459         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5460         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5461 #ifdef CONFIG_X86_64
5462         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5463         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5464         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5465         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5466         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5467         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5468         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5469         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5470 #endif
5471
5472         kvm_rip_write(vcpu, regs->rip);
5473         kvm_set_rflags(vcpu, regs->rflags);
5474
5475         vcpu->arch.exception.pending = false;
5476
5477         kvm_make_request(KVM_REQ_EVENT, vcpu);
5478
5479         return 0;
5480 }
5481
5482 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5483 {
5484         struct kvm_segment cs;
5485
5486         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5487         *db = cs.db;
5488         *l = cs.l;
5489 }
5490 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5491
5492 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5493                                   struct kvm_sregs *sregs)
5494 {
5495         struct desc_ptr dt;
5496
5497         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5498         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5499         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5500         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5501         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5502         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5503
5504         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5505         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5506
5507         kvm_x86_ops->get_idt(vcpu, &dt);
5508         sregs->idt.limit = dt.size;
5509         sregs->idt.base = dt.address;
5510         kvm_x86_ops->get_gdt(vcpu, &dt);
5511         sregs->gdt.limit = dt.size;
5512         sregs->gdt.base = dt.address;
5513
5514         sregs->cr0 = kvm_read_cr0(vcpu);
5515         sregs->cr2 = vcpu->arch.cr2;
5516         sregs->cr3 = kvm_read_cr3(vcpu);
5517         sregs->cr4 = kvm_read_cr4(vcpu);
5518         sregs->cr8 = kvm_get_cr8(vcpu);
5519         sregs->efer = vcpu->arch.efer;
5520         sregs->apic_base = kvm_get_apic_base(vcpu);
5521
5522         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5523
5524         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5525                 set_bit(vcpu->arch.interrupt.nr,
5526                         (unsigned long *)sregs->interrupt_bitmap);
5527
5528         return 0;
5529 }
5530
5531 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5532                                     struct kvm_mp_state *mp_state)
5533 {
5534         mp_state->mp_state = vcpu->arch.mp_state;
5535         return 0;
5536 }
5537
5538 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5539                                     struct kvm_mp_state *mp_state)
5540 {
5541         vcpu->arch.mp_state = mp_state->mp_state;
5542         kvm_make_request(KVM_REQ_EVENT, vcpu);
5543         return 0;
5544 }
5545
5546 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5547                     bool has_error_code, u32 error_code)
5548 {
5549         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5550         int ret;
5551
5552         init_emulate_ctxt(vcpu);
5553
5554         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5555                                    tss_selector, reason, has_error_code,
5556                                    error_code);
5557
5558         if (ret)
5559                 return EMULATE_FAIL;
5560
5561         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5562         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5563         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5564         kvm_make_request(KVM_REQ_EVENT, vcpu);
5565         return EMULATE_DONE;
5566 }
5567 EXPORT_SYMBOL_GPL(kvm_task_switch);
5568
5569 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5570                                   struct kvm_sregs *sregs)
5571 {
5572         int mmu_reset_needed = 0;
5573         int pending_vec, max_bits;
5574         struct desc_ptr dt;
5575
5576         dt.size = sregs->idt.limit;
5577         dt.address = sregs->idt.base;
5578         kvm_x86_ops->set_idt(vcpu, &dt);
5579         dt.size = sregs->gdt.limit;
5580         dt.address = sregs->gdt.base;
5581         kvm_x86_ops->set_gdt(vcpu, &dt);
5582
5583         vcpu->arch.cr2 = sregs->cr2;
5584         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5585         vcpu->arch.cr3 = sregs->cr3;
5586
5587         kvm_set_cr8(vcpu, sregs->cr8);
5588
5589         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5590         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5591         kvm_set_apic_base(vcpu, sregs->apic_base);
5592
5593         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5594         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5595         vcpu->arch.cr0 = sregs->cr0;
5596
5597         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5598         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5599         if (sregs->cr4 & X86_CR4_OSXSAVE)
5600                 update_cpuid(vcpu);
5601         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5602                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5603                 mmu_reset_needed = 1;
5604         }
5605
5606         if (mmu_reset_needed)
5607                 kvm_mmu_reset_context(vcpu);
5608
5609         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5610         pending_vec = find_first_bit(
5611                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5612         if (pending_vec < max_bits) {
5613                 kvm_queue_interrupt(vcpu, pending_vec, false);
5614                 pr_debug("Set back pending irq %d\n", pending_vec);
5615                 if (irqchip_in_kernel(vcpu->kvm))
5616                         kvm_pic_clear_isr_ack(vcpu->kvm);
5617         }
5618
5619         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5620         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5621         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5622         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5623         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5624         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5625
5626         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5627         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5628
5629         update_cr8_intercept(vcpu);
5630
5631         /* Older userspace won't unhalt the vcpu on reset. */
5632         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5633             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5634             !is_protmode(vcpu))
5635                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5636
5637         kvm_make_request(KVM_REQ_EVENT, vcpu);
5638
5639         return 0;
5640 }
5641
5642 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5643                                         struct kvm_guest_debug *dbg)
5644 {
5645         unsigned long rflags;
5646         int i, r;
5647
5648         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5649                 r = -EBUSY;
5650                 if (vcpu->arch.exception.pending)
5651                         goto out;
5652                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5653                         kvm_queue_exception(vcpu, DB_VECTOR);
5654                 else
5655                         kvm_queue_exception(vcpu, BP_VECTOR);
5656         }
5657
5658         /*
5659          * Read rflags as long as potentially injected trace flags are still
5660          * filtered out.
5661          */
5662         rflags = kvm_get_rflags(vcpu);
5663
5664         vcpu->guest_debug = dbg->control;
5665         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5666                 vcpu->guest_debug = 0;
5667
5668         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5669                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5670                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5671                 vcpu->arch.switch_db_regs =
5672                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5673         } else {
5674                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5675                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5676                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5677         }
5678
5679         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5680                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5681                         get_segment_base(vcpu, VCPU_SREG_CS);
5682
5683         /*
5684          * Trigger an rflags update that will inject or remove the trace
5685          * flags.
5686          */
5687         kvm_set_rflags(vcpu, rflags);
5688
5689         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5690
5691         r = 0;
5692
5693 out:
5694
5695         return r;
5696 }
5697
5698 /*
5699  * Translate a guest virtual address to a guest physical address.
5700  */
5701 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5702                                     struct kvm_translation *tr)
5703 {
5704         unsigned long vaddr = tr->linear_address;
5705         gpa_t gpa;
5706         int idx;
5707
5708         idx = srcu_read_lock(&vcpu->kvm->srcu);
5709         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5710         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5711         tr->physical_address = gpa;
5712         tr->valid = gpa != UNMAPPED_GVA;
5713         tr->writeable = 1;
5714         tr->usermode = 0;
5715
5716         return 0;
5717 }
5718
5719 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5720 {
5721         struct i387_fxsave_struct *fxsave =
5722                         &vcpu->arch.guest_fpu.state->fxsave;
5723
5724         memcpy(fpu->fpr, fxsave->st_space, 128);
5725         fpu->fcw = fxsave->cwd;
5726         fpu->fsw = fxsave->swd;
5727         fpu->ftwx = fxsave->twd;
5728         fpu->last_opcode = fxsave->fop;
5729         fpu->last_ip = fxsave->rip;
5730         fpu->last_dp = fxsave->rdp;
5731         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5732
5733         return 0;
5734 }
5735
5736 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5737 {
5738         struct i387_fxsave_struct *fxsave =
5739                         &vcpu->arch.guest_fpu.state->fxsave;
5740
5741         memcpy(fxsave->st_space, fpu->fpr, 128);
5742         fxsave->cwd = fpu->fcw;
5743         fxsave->swd = fpu->fsw;
5744         fxsave->twd = fpu->ftwx;
5745         fxsave->fop = fpu->last_opcode;
5746         fxsave->rip = fpu->last_ip;
5747         fxsave->rdp = fpu->last_dp;
5748         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5749
5750         return 0;
5751 }
5752
5753 int fx_init(struct kvm_vcpu *vcpu)
5754 {
5755         int err;
5756
5757         err = fpu_alloc(&vcpu->arch.guest_fpu);
5758         if (err)
5759                 return err;
5760
5761         fpu_finit(&vcpu->arch.guest_fpu);
5762
5763         /*
5764          * Ensure guest xcr0 is valid for loading
5765          */
5766         vcpu->arch.xcr0 = XSTATE_FP;
5767
5768         vcpu->arch.cr0 |= X86_CR0_ET;
5769
5770         return 0;
5771 }
5772 EXPORT_SYMBOL_GPL(fx_init);
5773
5774 static void fx_free(struct kvm_vcpu *vcpu)
5775 {
5776         fpu_free(&vcpu->arch.guest_fpu);
5777 }
5778
5779 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5780 {
5781         if (vcpu->guest_fpu_loaded)
5782                 return;
5783
5784         /*
5785          * Restore all possible states in the guest,
5786          * and assume host would use all available bits.
5787          * Guest xcr0 would be loaded later.
5788          */
5789         kvm_put_guest_xcr0(vcpu);
5790         vcpu->guest_fpu_loaded = 1;
5791         unlazy_fpu(current);
5792         fpu_restore_checking(&vcpu->arch.guest_fpu);
5793         trace_kvm_fpu(1);
5794 }
5795
5796 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5797 {
5798         kvm_put_guest_xcr0(vcpu);
5799
5800         if (!vcpu->guest_fpu_loaded)
5801                 return;
5802
5803         vcpu->guest_fpu_loaded = 0;
5804         fpu_save_init(&vcpu->arch.guest_fpu);
5805         ++vcpu->stat.fpu_reload;
5806         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5807         trace_kvm_fpu(0);
5808 }
5809
5810 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5811 {
5812         if (vcpu->arch.time_page) {
5813                 kvm_release_page_dirty(vcpu->arch.time_page);
5814                 vcpu->arch.time_page = NULL;
5815         }
5816
5817         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5818         fx_free(vcpu);
5819         kvm_x86_ops->vcpu_free(vcpu);
5820 }
5821
5822 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5823                                                 unsigned int id)
5824 {
5825         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5826                 printk_once(KERN_WARNING
5827                 "kvm: SMP vm created on host with unstable TSC; "
5828                 "guest TSC will not be reliable\n");
5829         return kvm_x86_ops->vcpu_create(kvm, id);
5830 }
5831
5832 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5833 {
5834         int r;
5835
5836         vcpu->arch.mtrr_state.have_fixed = 1;
5837         vcpu_load(vcpu);
5838         r = kvm_arch_vcpu_reset(vcpu);
5839         if (r == 0)
5840                 r = kvm_mmu_setup(vcpu);
5841         vcpu_put(vcpu);
5842         if (r < 0)
5843                 goto free_vcpu;
5844
5845         return 0;
5846 free_vcpu:
5847         kvm_x86_ops->vcpu_free(vcpu);
5848         return r;
5849 }
5850
5851 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5852 {
5853         vcpu->arch.apf.msr_val = 0;
5854
5855         vcpu_load(vcpu);
5856         kvm_mmu_unload(vcpu);
5857         vcpu_put(vcpu);
5858
5859         fx_free(vcpu);
5860         kvm_x86_ops->vcpu_free(vcpu);
5861 }
5862
5863 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5864 {
5865         vcpu->arch.nmi_pending = false;
5866         vcpu->arch.nmi_injected = false;
5867
5868         vcpu->arch.switch_db_regs = 0;
5869         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5870         vcpu->arch.dr6 = DR6_FIXED_1;
5871         vcpu->arch.dr7 = DR7_FIXED_1;
5872
5873         kvm_make_request(KVM_REQ_EVENT, vcpu);
5874         vcpu->arch.apf.msr_val = 0;
5875
5876         kvm_clear_async_pf_completion_queue(vcpu);
5877         kvm_async_pf_hash_reset(vcpu);
5878         vcpu->arch.apf.halted = false;
5879
5880         return kvm_x86_ops->vcpu_reset(vcpu);
5881 }
5882
5883 int kvm_arch_hardware_enable(void *garbage)
5884 {
5885         struct kvm *kvm;
5886         struct kvm_vcpu *vcpu;
5887         int i;
5888
5889         kvm_shared_msr_cpu_online();
5890         list_for_each_entry(kvm, &vm_list, vm_list)
5891                 kvm_for_each_vcpu(i, vcpu, kvm)
5892                         if (vcpu->cpu == smp_processor_id())
5893                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5894         return kvm_x86_ops->hardware_enable(garbage);
5895 }
5896
5897 void kvm_arch_hardware_disable(void *garbage)
5898 {
5899         kvm_x86_ops->hardware_disable(garbage);
5900         drop_user_return_notifiers(garbage);
5901 }
5902
5903 int kvm_arch_hardware_setup(void)
5904 {
5905         return kvm_x86_ops->hardware_setup();
5906 }
5907
5908 void kvm_arch_hardware_unsetup(void)
5909 {
5910         kvm_x86_ops->hardware_unsetup();
5911 }
5912
5913 void kvm_arch_check_processor_compat(void *rtn)
5914 {
5915         kvm_x86_ops->check_processor_compatibility(rtn);
5916 }
5917
5918 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5919 {
5920         struct page *page;
5921         struct kvm *kvm;
5922         int r;
5923
5924         BUG_ON(vcpu->kvm == NULL);
5925         kvm = vcpu->kvm;
5926
5927         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5928         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5929         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5930         vcpu->arch.mmu.translate_gpa = translate_gpa;
5931         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5932         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5933                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5934         else
5935                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5936
5937         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5938         if (!page) {
5939                 r = -ENOMEM;
5940                 goto fail;
5941         }
5942         vcpu->arch.pio_data = page_address(page);
5943
5944         if (!kvm->arch.virtual_tsc_khz)
5945                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5946
5947         r = kvm_mmu_create(vcpu);
5948         if (r < 0)
5949                 goto fail_free_pio_data;
5950
5951         if (irqchip_in_kernel(kvm)) {
5952                 r = kvm_create_lapic(vcpu);
5953                 if (r < 0)
5954                         goto fail_mmu_destroy;
5955         }
5956
5957         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5958                                        GFP_KERNEL);
5959         if (!vcpu->arch.mce_banks) {
5960                 r = -ENOMEM;
5961                 goto fail_free_lapic;
5962         }
5963         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5964
5965         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5966                 goto fail_free_mce_banks;
5967
5968         kvm_async_pf_hash_reset(vcpu);
5969
5970         return 0;
5971 fail_free_mce_banks:
5972         kfree(vcpu->arch.mce_banks);
5973 fail_free_lapic:
5974         kvm_free_lapic(vcpu);
5975 fail_mmu_destroy:
5976         kvm_mmu_destroy(vcpu);
5977 fail_free_pio_data:
5978         free_page((unsigned long)vcpu->arch.pio_data);
5979 fail:
5980         return r;
5981 }
5982
5983 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5984 {
5985         int idx;
5986
5987         kfree(vcpu->arch.mce_banks);
5988         kvm_free_lapic(vcpu);
5989         idx = srcu_read_lock(&vcpu->kvm->srcu);
5990         kvm_mmu_destroy(vcpu);
5991         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5992         free_page((unsigned long)vcpu->arch.pio_data);
5993 }
5994
5995 int kvm_arch_init_vm(struct kvm *kvm)
5996 {
5997         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5998         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5999
6000         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6001         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6002
6003         spin_lock_init(&kvm->arch.tsc_write_lock);
6004
6005         return 0;
6006 }
6007
6008 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6009 {
6010         vcpu_load(vcpu);
6011         kvm_mmu_unload(vcpu);
6012         vcpu_put(vcpu);
6013 }
6014
6015 static void kvm_free_vcpus(struct kvm *kvm)
6016 {
6017         unsigned int i;
6018         struct kvm_vcpu *vcpu;
6019
6020         /*
6021          * Unpin any mmu pages first.
6022          */
6023         kvm_for_each_vcpu(i, vcpu, kvm) {
6024                 kvm_clear_async_pf_completion_queue(vcpu);
6025                 kvm_unload_vcpu_mmu(vcpu);
6026         }
6027         kvm_for_each_vcpu(i, vcpu, kvm)
6028                 kvm_arch_vcpu_free(vcpu);
6029
6030         mutex_lock(&kvm->lock);
6031         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6032                 kvm->vcpus[i] = NULL;
6033
6034         atomic_set(&kvm->online_vcpus, 0);
6035         mutex_unlock(&kvm->lock);
6036 }
6037
6038 void kvm_arch_sync_events(struct kvm *kvm)
6039 {
6040         kvm_free_all_assigned_devices(kvm);
6041         kvm_free_pit(kvm);
6042 }
6043
6044 void kvm_arch_destroy_vm(struct kvm *kvm)
6045 {
6046         kvm_iommu_unmap_guest(kvm);
6047         kfree(kvm->arch.vpic);
6048         kfree(kvm->arch.vioapic);
6049         kvm_free_vcpus(kvm);
6050         if (kvm->arch.apic_access_page)
6051                 put_page(kvm->arch.apic_access_page);
6052         if (kvm->arch.ept_identity_pagetable)
6053                 put_page(kvm->arch.ept_identity_pagetable);
6054 }
6055
6056 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6057                                 struct kvm_memory_slot *memslot,
6058                                 struct kvm_memory_slot old,
6059                                 struct kvm_userspace_memory_region *mem,
6060                                 int user_alloc)
6061 {
6062         int npages = memslot->npages;
6063         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6064
6065         /* Prevent internal slot pages from being moved by fork()/COW. */
6066         if (memslot->id >= KVM_MEMORY_SLOTS)
6067                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6068
6069         /*To keep backward compatibility with older userspace,
6070          *x86 needs to hanlde !user_alloc case.
6071          */
6072         if (!user_alloc) {
6073                 if (npages && !old.rmap) {
6074                         unsigned long userspace_addr;
6075
6076                         down_write(&current->mm->mmap_sem);
6077                         userspace_addr = do_mmap(NULL, 0,
6078                                                  npages * PAGE_SIZE,
6079                                                  PROT_READ | PROT_WRITE,
6080                                                  map_flags,
6081                                                  0);
6082                         up_write(&current->mm->mmap_sem);
6083
6084                         if (IS_ERR((void *)userspace_addr))
6085                                 return PTR_ERR((void *)userspace_addr);
6086
6087                         memslot->userspace_addr = userspace_addr;
6088                 }
6089         }
6090
6091
6092         return 0;
6093 }
6094
6095 void kvm_arch_commit_memory_region(struct kvm *kvm,
6096                                 struct kvm_userspace_memory_region *mem,
6097                                 struct kvm_memory_slot old,
6098                                 int user_alloc)
6099 {
6100
6101         int npages = mem->memory_size >> PAGE_SHIFT;
6102
6103         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6104                 int ret;
6105
6106                 down_write(&current->mm->mmap_sem);
6107                 ret = do_munmap(current->mm, old.userspace_addr,
6108                                 old.npages * PAGE_SIZE);
6109                 up_write(&current->mm->mmap_sem);
6110                 if (ret < 0)
6111                         printk(KERN_WARNING
6112                                "kvm_vm_ioctl_set_memory_region: "
6113                                "failed to munmap memory\n");
6114         }
6115
6116         spin_lock(&kvm->mmu_lock);
6117         if (!kvm->arch.n_requested_mmu_pages) {
6118                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6119                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6120         }
6121
6122         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6123         spin_unlock(&kvm->mmu_lock);
6124 }
6125
6126 void kvm_arch_flush_shadow(struct kvm *kvm)
6127 {
6128         kvm_mmu_zap_all(kvm);
6129         kvm_reload_remote_mmus(kvm);
6130 }
6131
6132 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6133 {
6134         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6135                 !vcpu->arch.apf.halted)
6136                 || !list_empty_careful(&vcpu->async_pf.done)
6137                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6138                 || vcpu->arch.nmi_pending ||
6139                 (kvm_arch_interrupt_allowed(vcpu) &&
6140                  kvm_cpu_has_interrupt(vcpu));
6141 }
6142
6143 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6144 {
6145         int me;
6146         int cpu = vcpu->cpu;
6147
6148         if (waitqueue_active(&vcpu->wq)) {
6149                 wake_up_interruptible(&vcpu->wq);
6150                 ++vcpu->stat.halt_wakeup;
6151         }
6152
6153         me = get_cpu();
6154         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6155                 if (atomic_xchg(&vcpu->guest_mode, 0))
6156                         smp_send_reschedule(cpu);
6157         put_cpu();
6158 }
6159
6160 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6161 {
6162         return kvm_x86_ops->interrupt_allowed(vcpu);
6163 }
6164
6165 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6166 {
6167         unsigned long current_rip = kvm_rip_read(vcpu) +
6168                 get_segment_base(vcpu, VCPU_SREG_CS);
6169
6170         return current_rip == linear_rip;
6171 }
6172 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6173
6174 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6175 {
6176         unsigned long rflags;
6177
6178         rflags = kvm_x86_ops->get_rflags(vcpu);
6179         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6180                 rflags &= ~X86_EFLAGS_TF;
6181         return rflags;
6182 }
6183 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6184
6185 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6186 {
6187         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6188             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6189                 rflags |= X86_EFLAGS_TF;
6190         kvm_x86_ops->set_rflags(vcpu, rflags);
6191         kvm_make_request(KVM_REQ_EVENT, vcpu);
6192 }
6193 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6194
6195 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6196 {
6197         int r;
6198
6199         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6200               is_error_page(work->page))
6201                 return;
6202
6203         r = kvm_mmu_reload(vcpu);
6204         if (unlikely(r))
6205                 return;
6206
6207         if (!vcpu->arch.mmu.direct_map &&
6208               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6209                 return;
6210
6211         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6212 }
6213
6214 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6215 {
6216         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6217 }
6218
6219 static inline u32 kvm_async_pf_next_probe(u32 key)
6220 {
6221         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6222 }
6223
6224 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6225 {
6226         u32 key = kvm_async_pf_hash_fn(gfn);
6227
6228         while (vcpu->arch.apf.gfns[key] != ~0)
6229                 key = kvm_async_pf_next_probe(key);
6230
6231         vcpu->arch.apf.gfns[key] = gfn;
6232 }
6233
6234 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6235 {
6236         int i;
6237         u32 key = kvm_async_pf_hash_fn(gfn);
6238
6239         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6240                      (vcpu->arch.apf.gfns[key] != gfn &&
6241                       vcpu->arch.apf.gfns[key] != ~0); i++)
6242                 key = kvm_async_pf_next_probe(key);
6243
6244         return key;
6245 }
6246
6247 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6248 {
6249         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6250 }
6251
6252 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6253 {
6254         u32 i, j, k;
6255
6256         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6257         while (true) {
6258                 vcpu->arch.apf.gfns[i] = ~0;
6259                 do {
6260                         j = kvm_async_pf_next_probe(j);
6261                         if (vcpu->arch.apf.gfns[j] == ~0)
6262                                 return;
6263                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6264                         /*
6265                          * k lies cyclically in ]i,j]
6266                          * |    i.k.j |
6267                          * |....j i.k.| or  |.k..j i...|
6268                          */
6269                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6270                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6271                 i = j;
6272         }
6273 }
6274
6275 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6276 {
6277
6278         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6279                                       sizeof(val));
6280 }
6281
6282 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6283                                      struct kvm_async_pf *work)
6284 {
6285         struct x86_exception fault;
6286
6287         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6288         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6289
6290         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6291             (vcpu->arch.apf.send_user_only &&
6292              kvm_x86_ops->get_cpl(vcpu) == 0))
6293                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6294         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6295                 fault.vector = PF_VECTOR;
6296                 fault.error_code_valid = true;
6297                 fault.error_code = 0;
6298                 fault.nested_page_fault = false;
6299                 fault.address = work->arch.token;
6300                 kvm_inject_page_fault(vcpu, &fault);
6301         }
6302 }
6303
6304 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6305                                  struct kvm_async_pf *work)
6306 {
6307         struct x86_exception fault;
6308
6309         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6310         if (is_error_page(work->page))
6311                 work->arch.token = ~0; /* broadcast wakeup */
6312         else
6313                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6314
6315         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6316             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6317                 fault.vector = PF_VECTOR;
6318                 fault.error_code_valid = true;
6319                 fault.error_code = 0;
6320                 fault.nested_page_fault = false;
6321                 fault.address = work->arch.token;
6322                 kvm_inject_page_fault(vcpu, &fault);
6323         }
6324         vcpu->arch.apf.halted = false;
6325 }
6326
6327 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6328 {
6329         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6330                 return true;
6331         else
6332                 return !kvm_event_needs_reinjection(vcpu) &&
6333                         kvm_x86_ops->interrupt_allowed(vcpu);
6334 }
6335
6336 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6337 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6338 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6339 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6340 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6341 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6342 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6343 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6344 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6345 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6346 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6347 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);