drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54
  55         if (sc->curtxpow != sc->config.txpowlimit) {
  56                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  57                 /* read back in case value is clamped */
  58                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  59         }
  60 }
  61
  62 static u8 parse_mpdudensity(u8 mpdudensity)
  63 {
  64         /*
  65          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  66          *   0 for no restriction
  67          *   1 for 1/4 us
  68          *   2 for 1/2 us
  69          *   3 for 1 us
  70          *   4 for 2 us
  71          *   5 for 4 us
  72          *   6 for 8 us
  73          *   7 for 16 us
  74          */
  75         switch (mpdudensity) {
  76         case 0:
  77                 return 0;
  78         case 1:
  79         case 2:
  80         case 3:
  81                 /* Our lower layer calculations limit our precision to
  82                    1 microsecond */
  83                 return 1;
  84         case 4:
  85                 return 2;
  86         case 5:
  87                 return 4;
  88         case 6:
  89                 return 8;
  90         case 7:
  91                 return 16;
  92         default:
  93                 return 0;
  94         }
  95 }
  96
  97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  98                                                 struct ieee80211_hw *hw)
  99 {
 100         struct ieee80211_channel *curchan = hw->conf.channel;
 101         struct ath9k_channel *channel;
 102         u8 chan_idx;
 103
 104         chan_idx = curchan->hw_value;
 105         channel = &sc->sc_ah->channels[chan_idx];
 106         ath9k_update_ichannel(sc, hw, channel);
 107         return channel;
 108 }
 109
 110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 111 {
 112         unsigned long flags;
 113         bool ret;
 114
 115         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 116         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 117         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 118
 119         return ret;
 120 }
 121
 122 void ath9k_ps_wakeup(struct ath_softc *sc)
 123 {
 124         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 125         unsigned long flags;
 126
 127         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 128         if (++sc->ps_usecount != 1)
 129                 goto unlock;
 130
 131         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 132
 133         /*
 134          * While the hardware is asleep, the cycle counters contain no
 135          * useful data. Better clear them now so that they don't mess up
 136          * survey data results.
 137          */
 138         spin_lock(&common->cc_lock);
 139         ath_hw_cycle_counters_update(common);
 140         memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 141         spin_unlock(&common->cc_lock);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 void ath9k_ps_restore(struct ath_softc *sc)
 148 {
 149         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 150         unsigned long flags;
 151
 152         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 153         if (--sc->ps_usecount != 0)
 154                 goto unlock;
 155
 156         spin_lock(&common->cc_lock);
 157         ath_hw_cycle_counters_update(common);
 158         spin_unlock(&common->cc_lock);
 159
 160         if (sc->ps_idle)
 161                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 162         else if (sc->ps_enabled &&
 163                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 164                               PS_WAIT_FOR_CAB |
 165                               PS_WAIT_FOR_PSPOLL_DATA |
 166                               PS_WAIT_FOR_TX_ACK)))
 167                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 168
 169  unlock:
 170         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 171 }
 172
 173 static void ath_start_ani(struct ath_common *common)
 174 {
 175         struct ath_hw *ah = common->ah;
 176         unsigned long timestamp = jiffies_to_msecs(jiffies);
 177         struct ath_softc *sc = (struct ath_softc *) common->priv;
 178
 179         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 180                 return;
 181
 182         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 183                 return;
 184
 185         common->ani.longcal_timer = timestamp;
 186         common->ani.shortcal_timer = timestamp;
 187         common->ani.checkani_timer = timestamp;
 188
 189         mod_timer(&common->ani.timer,
 190                   jiffies +
 191                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 192 }
 193
 194 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 195 {
 196         struct ath_hw *ah = sc->sc_ah;
 197         struct ath9k_channel *chan = &ah->channels[channel];
 198         struct survey_info *survey = &sc->survey[channel];
 199
 200         if (chan->noisefloor) {
 201                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 202                 survey->noise = chan->noisefloor;
 203         }
 204 }
 205
 206 static void ath_update_survey_stats(struct ath_softc *sc)
 207 {
 208         struct ath_hw *ah = sc->sc_ah;
 209         struct ath_common *common = ath9k_hw_common(ah);
 210         int pos = ah->curchan - &ah->channels[0];
 211         struct survey_info *survey = &sc->survey[pos];
 212         struct ath_cycle_counters *cc = &common->cc_survey;
 213         unsigned int div = common->clockrate * 1000;
 214
 215         if (ah->power_mode == ATH9K_PM_AWAKE)
 216                 ath_hw_cycle_counters_update(common);
 217
 218         if (cc->cycles > 0) {
 219                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 220                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 221                         SURVEY_INFO_CHANNEL_TIME_RX |
 222                         SURVEY_INFO_CHANNEL_TIME_TX;
 223                 survey->channel_time += cc->cycles / div;
 224                 survey->channel_time_busy += cc->rx_busy / div;
 225                 survey->channel_time_rx += cc->rx_frame / div;
 226                 survey->channel_time_tx += cc->tx_frame / div;
 227         }
 228         memset(cc, 0, sizeof(*cc));
 229
 230         ath_update_survey_nf(sc, pos);
 231 }
 232
 233 /*
 234  * Set/change channels.  If the channel is really being changed, it's done
 235  * by reseting the chip.  To accomplish this we must first cleanup any pending
 236  * DMA, then restart stuff.
 237 */
 238 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 239                     struct ath9k_channel *hchan)
 240 {
 241         struct ath_wiphy *aphy = hw->priv;
 242         struct ath_hw *ah = sc->sc_ah;
 243         struct ath_common *common = ath9k_hw_common(ah);
 244         struct ieee80211_conf *conf = &common->hw->conf;
 245         bool fastcc = true, stopped;
 246         struct ieee80211_channel *channel = hw->conf.channel;
 247         struct ath9k_hw_cal_data *caldata = NULL;
 248         int r;
 249
 250         if (sc->sc_flags & SC_OP_INVALID)
 251                 return -EIO;
 252
 253         del_timer_sync(&common->ani.timer);
 254         cancel_work_sync(&sc->paprd_work);
 255         cancel_work_sync(&sc->hw_check_work);
 256         cancel_delayed_work_sync(&sc->tx_complete_work);
 257
 258         ath9k_ps_wakeup(sc);
 259
 260         /*
 261          * This is only performed if the channel settings have
 262          * actually changed.
 263          *
 264          * To switch channels clear any pending DMA operations;
 265          * wait long enough for the RX fifo to drain, reset the
 266          * hardware at the new frequency, and then re-enable
 267          * the relevant bits of the h/w.
 268          */
 269         ath9k_hw_set_interrupts(ah, 0);
 270         ath_drain_all_txq(sc, false);
 271         stopped = ath_stoprecv(sc);
 272
 273         /* XXX: do not flush receive queue here. We don't want
 274          * to flush data frames already in queue because of
 275          * changing channel. */
 276
 277         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 278                 fastcc = false;
 279
 280         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 281                 caldata = &aphy->caldata;
 282
 283         ath_print(common, ATH_DBG_CONFIG,
 284                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 285                   sc->sc_ah->curchan->channel,
 286                   channel->center_freq, conf_is_ht40(conf),
 287                   fastcc);
 288
 289         spin_lock_bh(&sc->sc_resetlock);
 290
 291         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 292         if (r) {
 293                 ath_print(common, ATH_DBG_FATAL,
 294                           "Unable to reset channel (%u MHz), "
 295                           "reset status %d\n",
 296                           channel->center_freq, r);
 297                 spin_unlock_bh(&sc->sc_resetlock);
 298                 goto ps_restore;
 299         }
 300         spin_unlock_bh(&sc->sc_resetlock);
 301
 302         if (ath_startrecv(sc) != 0) {
 303                 ath_print(common, ATH_DBG_FATAL,
 304                           "Unable to restart recv logic\n");
 305                 r = -EIO;
 306                 goto ps_restore;
 307         }
 308
 309         ath_cache_conf_rate(sc, &hw->conf);
 310         ath_update_txpow(sc);
 311         ath9k_hw_set_interrupts(ah, ah->imask);
 312
 313         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 314                 ath_beacon_config(sc, NULL);
 315                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 316                 ath_start_ani(common);
 317         }
 318
 319  ps_restore:
 320         ath9k_ps_restore(sc);
 321         return r;
 322 }
 323
 324 static void ath_paprd_activate(struct ath_softc *sc)
 325 {
 326         struct ath_hw *ah = sc->sc_ah;
 327         struct ath9k_hw_cal_data *caldata = ah->caldata;
 328         struct ath_common *common = ath9k_hw_common(ah);
 329         int chain;
 330
 331         if (!caldata || !caldata->paprd_done)
 332                 return;
 333
 334         ath9k_ps_wakeup(sc);
 335         ar9003_paprd_enable(ah, false);
 336         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 337                 if (!(common->tx_chainmask & BIT(chain)))
 338                         continue;
 339
 340                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 341         }
 342
 343         ar9003_paprd_enable(ah, true);
 344         ath9k_ps_restore(sc);
 345 }
 346
 347 void ath_paprd_calibrate(struct work_struct *work)
 348 {
 349         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 350         struct ieee80211_hw *hw = sc->hw;
 351         struct ath_hw *ah = sc->sc_ah;
 352         struct ieee80211_hdr *hdr;
 353         struct sk_buff *skb = NULL;
 354         struct ieee80211_tx_info *tx_info;
 355         int band = hw->conf.channel->band;
 356         struct ieee80211_supported_band *sband = &sc->sbands[band];
 357         struct ath_tx_control txctl;
 358         struct ath9k_hw_cal_data *caldata = ah->caldata;
 359         struct ath_common *common = ath9k_hw_common(ah);
 360         int qnum, ftype;
 361         int chain_ok = 0;
 362         int chain;
 363         int len = 1800;
 364         int time_left;
 365         int i;
 366
 367         if (!caldata)
 368                 return;
 369
 370         skb = alloc_skb(len, GFP_KERNEL);
 371         if (!skb)
 372                 return;
 373
 374         tx_info = IEEE80211_SKB_CB(skb);
 375
 376         skb_put(skb, len);
 377         memset(skb->data, 0, len);
 378         hdr = (struct ieee80211_hdr *)skb->data;
 379         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 380         hdr->frame_control = cpu_to_le16(ftype);
 381         hdr->duration_id = cpu_to_le16(10);
 382         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 383         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 384         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 385
 386         memset(&txctl, 0, sizeof(txctl));
 387         qnum = sc->tx.hwq_map[WME_AC_BE];
 388         txctl.txq = &sc->tx.txq[qnum];
 389
 390         ath9k_ps_wakeup(sc);
 391         ar9003_paprd_init_table(ah);
 392         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 393                 if (!(common->tx_chainmask & BIT(chain)))
 394                         continue;
 395
 396                 chain_ok = 0;
 397                 memset(tx_info, 0, sizeof(*tx_info));
 398                 tx_info->band = band;
 399
 400                 for (i = 0; i < 4; i++) {
 401                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 402                         tx_info->control.rates[i].count = 6;
 403                 }
 404
 405                 init_completion(&sc->paprd_complete);
 406                 ar9003_paprd_setup_gain_table(ah, chain);
 407                 txctl.paprd = BIT(chain);
 408                 if (ath_tx_start(hw, skb, &txctl) != 0)
 409                         break;
 410
 411                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 412                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 413                 if (!time_left) {
 414                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 415                                   "Timeout waiting for paprd training on "
 416                                   "TX chain %d\n",
 417                                   chain);
 418                         goto fail_paprd;
 419                 }
 420
 421                 if (!ar9003_paprd_is_done(ah))
 422                         break;
 423
 424                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 425                         break;
 426
 427                 chain_ok = 1;
 428         }
 429         kfree_skb(skb);
 430
 431         if (chain_ok) {
 432                 caldata->paprd_done = true;
 433                 ath_paprd_activate(sc);
 434         }
 435
 436 fail_paprd:
 437         ath9k_ps_restore(sc);
 438 }
 439
 440 /*
 441  *  This routine performs the periodic noise floor calibration function
 442  *  that is used to adjust and optimize the chip performance.  This
 443  *  takes environmental changes (location, temperature) into account.
 444  *  When the task is complete, it reschedules itself depending on the
 445  *  appropriate interval that was calculated.
 446  */
 447 void ath_ani_calibrate(unsigned long data)
 448 {
 449         struct ath_softc *sc = (struct ath_softc *)data;
 450         struct ath_hw *ah = sc->sc_ah;
 451         struct ath_common *common = ath9k_hw_common(ah);
 452         bool longcal = false;
 453         bool shortcal = false;
 454         bool aniflag = false;
 455         unsigned int timestamp = jiffies_to_msecs(jiffies);
 456         u32 cal_interval, short_cal_interval, long_cal_interval;
 457         unsigned long flags;
 458
 459         if (ah->caldata && ah->caldata->nfcal_interference)
 460                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 461         else
 462                 long_cal_interval = ATH_LONG_CALINTERVAL;
 463
 464         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 465                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 466
 467         /* Only calibrate if awake */
 468         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 469                 goto set_timer;
 470
 471         ath9k_ps_wakeup(sc);
 472
 473         /* Long calibration runs independently of short calibration. */
 474         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 475                 longcal = true;
 476                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 477                 common->ani.longcal_timer = timestamp;
 478         }
 479
 480         /* Short calibration applies only while caldone is false */
 481         if (!common->ani.caldone) {
 482                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 483                         shortcal = true;
 484                         ath_print(common, ATH_DBG_ANI,
 485                                   "shortcal @%lu\n", jiffies);
 486                         common->ani.shortcal_timer = timestamp;
 487                         common->ani.resetcal_timer = timestamp;
 488                 }
 489         } else {
 490                 if ((timestamp - common->ani.resetcal_timer) >=
 491                     ATH_RESTART_CALINTERVAL) {
 492                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 493                         if (common->ani.caldone)
 494                                 common->ani.resetcal_timer = timestamp;
 495                 }
 496         }
 497
 498         /* Verify whether we must check ANI */
 499         if ((timestamp - common->ani.checkani_timer) >=
 500              ah->config.ani_poll_interval) {
 501                 aniflag = true;
 502                 common->ani.checkani_timer = timestamp;
 503         }
 504
 505         /* Skip all processing if there's nothing to do. */
 506         if (longcal || shortcal || aniflag) {
 507                 /* Call ANI routine if necessary */
 508                 if (aniflag) {
 509                         spin_lock_irqsave(&common->cc_lock, flags);
 510                         ath9k_hw_ani_monitor(ah, ah->curchan);
 511                         ath_update_survey_stats(sc);
 512                         spin_unlock_irqrestore(&common->cc_lock, flags);
 513                 }
 514
 515                 /* Perform calibration if necessary */
 516                 if (longcal || shortcal) {
 517                         common->ani.caldone =
 518                                 ath9k_hw_calibrate(ah,
 519                                                    ah->curchan,
 520                                                    common->rx_chainmask,
 521                                                    longcal);
 522                 }
 523         }
 524
 525         ath9k_ps_restore(sc);
 526
 527 set_timer:
 528         /*
 529         * Set timer interval based on previous results.
 530         * The interval must be the shortest necessary to satisfy ANI,
 531         * short calibration and long calibration.
 532         */
 533         cal_interval = ATH_LONG_CALINTERVAL;
 534         if (sc->sc_ah->config.enable_ani)
 535                 cal_interval = min(cal_interval,
 536                                    (u32)ah->config.ani_poll_interval);
 537         if (!common->ani.caldone)
 538                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 539
 540         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 541         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 542                 if (!ah->caldata->paprd_done)
 543                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 544                 else
 545                         ath_paprd_activate(sc);
 546         }
 547 }
 548
 549 /*
 550  * Update tx/rx chainmask. For legacy association,
 551  * hard code chainmask to 1x1, for 11n association, use
 552  * the chainmask configuration, for bt coexistence, use
 553  * the chainmask configuration even in legacy mode.
 554  */
 555 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 556 {
 557         struct ath_hw *ah = sc->sc_ah;
 558         struct ath_common *common = ath9k_hw_common(ah);
 559
 560         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 561             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 562                 common->tx_chainmask = ah->caps.tx_chainmask;
 563                 common->rx_chainmask = ah->caps.rx_chainmask;
 564         } else {
 565                 common->tx_chainmask = 1;
 566                 common->rx_chainmask = 1;
 567         }
 568
 569         ath_print(common, ATH_DBG_CONFIG,
 570                   "tx chmask: %d, rx chmask: %d\n",
 571                   common->tx_chainmask,
 572                   common->rx_chainmask);
 573 }
 574
 575 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 576 {
 577         struct ath_node *an;
 578
 579         an = (struct ath_node *)sta->drv_priv;
 580
 581         if (sc->sc_flags & SC_OP_TXAGGR) {
 582                 ath_tx_node_init(sc, an);
 583                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 584                                      sta->ht_cap.ampdu_factor);
 585                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 586                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 587         }
 588 }
 589
 590 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 591 {
 592         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 593
 594         if (sc->sc_flags & SC_OP_TXAGGR)
 595                 ath_tx_node_cleanup(sc, an);
 596 }
 597
 598 void ath_hw_check(struct work_struct *work)
 599 {
 600         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 601         int i;
 602
 603         ath9k_ps_wakeup(sc);
 604
 605         for (i = 0; i < 3; i++) {
 606                 if (ath9k_hw_check_alive(sc->sc_ah))
 607                         goto out;
 608
 609                 msleep(1);
 610         }
 611         ath_reset(sc, false);
 612
 613 out:
 614         ath9k_ps_restore(sc);
 615 }
 616
 617 void ath9k_tasklet(unsigned long data)
 618 {
 619         struct ath_softc *sc = (struct ath_softc *)data;
 620         struct ath_hw *ah = sc->sc_ah;
 621         struct ath_common *common = ath9k_hw_common(ah);
 622
 623         u32 status = sc->intrstatus;
 624         u32 rxmask;
 625
 626         ath9k_ps_wakeup(sc);
 627
 628         if (status & ATH9K_INT_FATAL) {
 629                 ath_reset(sc, false);
 630                 ath9k_ps_restore(sc);
 631                 return;
 632         }
 633
 634         if (!ath9k_hw_check_alive(ah))
 635                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 636
 637         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 638                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 639                           ATH9K_INT_RXORN);
 640         else
 641                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 642
 643         if (status & rxmask) {
 644                 spin_lock_bh(&sc->rx.rxflushlock);
 645
 646                 /* Check for high priority Rx first */
 647                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 648                     (status & ATH9K_INT_RXHP))
 649                         ath_rx_tasklet(sc, 0, true);
 650
 651                 ath_rx_tasklet(sc, 0, false);
 652                 spin_unlock_bh(&sc->rx.rxflushlock);
 653         }
 654
 655         if (status & ATH9K_INT_TX) {
 656                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 657                         ath_tx_edma_tasklet(sc);
 658                 else
 659                         ath_tx_tasklet(sc);
 660         }
 661
 662         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 663                 /*
 664                  * TSF sync does not look correct; remain awake to sync with
 665                  * the next Beacon.
 666                  */
 667                 ath_print(common, ATH_DBG_PS,
 668                           "TSFOOR - Sync with next Beacon\n");
 669                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 670         }
 671
 672         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 673                 if (status & ATH9K_INT_GENTIMER)
 674                         ath_gen_timer_isr(sc->sc_ah);
 675
 676         /* re-enable hardware interrupt */
 677         ath9k_hw_set_interrupts(ah, ah->imask);
 678         ath9k_ps_restore(sc);
 679 }
 680
 681 irqreturn_t ath_isr(int irq, void *dev)
 682 {
 683 #define SCHED_INTR (                            \
 684                 ATH9K_INT_FATAL |               \
 685                 ATH9K_INT_RXORN |               \
 686                 ATH9K_INT_RXEOL |               \
 687                 ATH9K_INT_RX |                  \
 688                 ATH9K_INT_RXLP |                \
 689                 ATH9K_INT_RXHP |                \
 690                 ATH9K_INT_TX |                  \
 691                 ATH9K_INT_BMISS |               \
 692                 ATH9K_INT_CST |                 \
 693                 ATH9K_INT_TSFOOR |              \
 694                 ATH9K_INT_GENTIMER)
 695
 696         struct ath_softc *sc = dev;
 697         struct ath_hw *ah = sc->sc_ah;
 698         struct ath_common *common = ath9k_hw_common(ah);
 699         enum ath9k_int status;
 700         bool sched = false;
 701
 702         /*
 703          * The hardware is not ready/present, don't
 704          * touch anything. Note this can happen early
 705          * on if the IRQ is shared.
 706          */
 707         if (sc->sc_flags & SC_OP_INVALID)
 708                 return IRQ_NONE;
 709
 710
 711         /* shared irq, not for us */
 712
 713         if (!ath9k_hw_intrpend(ah))
 714                 return IRQ_NONE;
 715
 716         /*
 717          * Figure out the reason(s) for the interrupt.  Note
 718          * that the hal returns a pseudo-ISR that may include
 719          * bits we haven't explicitly enabled so we mask the
 720          * value to insure we only process bits we requested.
 721          */
 722         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 723         status &= ah->imask;    /* discard unasked-for bits */
 724
 725         /*
 726          * If there are no status bits set, then this interrupt was not
 727          * for me (should have been caught above).
 728          */
 729         if (!status)
 730                 return IRQ_NONE;
 731
 732         /* Cache the status */
 733         sc->intrstatus = status;
 734
 735         if (status & SCHED_INTR)
 736                 sched = true;
 737
 738         /*
 739          * If a FATAL or RXORN interrupt is received, we have to reset the
 740          * chip immediately.
 741          */
 742         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 743             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 744                 goto chip_reset;
 745
 746         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 747             (status & ATH9K_INT_BB_WATCHDOG)) {
 748
 749                 spin_lock(&common->cc_lock);
 750                 ath_hw_cycle_counters_update(common);
 751                 ar9003_hw_bb_watchdog_dbg_info(ah);
 752                 spin_unlock(&common->cc_lock);
 753
 754                 goto chip_reset;
 755         }
 756
 757         if (status & ATH9K_INT_SWBA)
 758                 tasklet_schedule(&sc->bcon_tasklet);
 759
 760         if (status & ATH9K_INT_TXURN)
 761                 ath9k_hw_updatetxtriglevel(ah, true);
 762
 763         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 764                 if (status & ATH9K_INT_RXEOL) {
 765                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 766                         ath9k_hw_set_interrupts(ah, ah->imask);
 767                 }
 768         }
 769
 770         if (status & ATH9K_INT_MIB) {
 771                 /*
 772                  * Disable interrupts until we service the MIB
 773                  * interrupt; otherwise it will continue to
 774                  * fire.
 775                  */
 776                 ath9k_hw_set_interrupts(ah, 0);
 777                 /*
 778                  * Let the hal handle the event. We assume
 779                  * it will clear whatever condition caused
 780                  * the interrupt.
 781                  */
 782                 ath9k_hw_proc_mib_event(ah);
 783                 ath9k_hw_set_interrupts(ah, ah->imask);
 784         }
 785
 786         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 787                 if (status & ATH9K_INT_TIM_TIMER) {
 788                         /* Clear RxAbort bit so that we can
 789                          * receive frames */
 790                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 791                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 792                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 793                 }
 794
 795 chip_reset:
 796
 797         ath_debug_stat_interrupt(sc, status);
 798
 799         if (sched) {
 800                 /* turn off every interrupt except SWBA */
 801                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 802                 tasklet_schedule(&sc->intr_tq);
 803         }
 804
 805         return IRQ_HANDLED;
 806
 807 #undef SCHED_INTR
 808 }
 809
 810 static u32 ath_get_extchanmode(struct ath_softc *sc,
 811                                struct ieee80211_channel *chan,
 812                                enum nl80211_channel_type channel_type)
 813 {
 814         u32 chanmode = 0;
 815
 816         switch (chan->band) {
 817         case IEEE80211_BAND_2GHZ:
 818                 switch(channel_type) {
 819                 case NL80211_CHAN_NO_HT:
 820                 case NL80211_CHAN_HT20:
 821                         chanmode = CHANNEL_G_HT20;
 822                         break;
 823                 case NL80211_CHAN_HT40PLUS:
 824                         chanmode = CHANNEL_G_HT40PLUS;
 825                         break;
 826                 case NL80211_CHAN_HT40MINUS:
 827                         chanmode = CHANNEL_G_HT40MINUS;
 828                         break;
 829                 }
 830                 break;
 831         case IEEE80211_BAND_5GHZ:
 832                 switch(channel_type) {
 833                 case NL80211_CHAN_NO_HT:
 834                 case NL80211_CHAN_HT20:
 835                         chanmode = CHANNEL_A_HT20;
 836                         break;
 837                 case NL80211_CHAN_HT40PLUS:
 838                         chanmode = CHANNEL_A_HT40PLUS;
 839                         break;
 840                 case NL80211_CHAN_HT40MINUS:
 841                         chanmode = CHANNEL_A_HT40MINUS;
 842                         break;
 843                 }
 844                 break;
 845         default:
 846                 break;
 847         }
 848
 849         return chanmode;
 850 }
 851
 852 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 853                                  struct ieee80211_vif *vif,
 854                                  struct ieee80211_bss_conf *bss_conf)
 855 {
 856         struct ath_hw *ah = sc->sc_ah;
 857         struct ath_common *common = ath9k_hw_common(ah);
 858
 859         if (bss_conf->assoc) {
 860                 ath_print(common, ATH_DBG_CONFIG,
 861                           "Bss Info ASSOC %d, bssid: %pM\n",
 862                            bss_conf->aid, common->curbssid);
 863
 864                 /* New association, store aid */
 865                 common->curaid = bss_conf->aid;
 866                 ath9k_hw_write_associd(ah);
 867
 868                 /*
 869                  * Request a re-configuration of Beacon related timers
 870                  * on the receipt of the first Beacon frame (i.e.,
 871                  * after time sync with the AP).
 872                  */
 873                 sc->ps_flags |= PS_BEACON_SYNC;
 874
 875                 /* Configure the beacon */
 876                 ath_beacon_config(sc, vif);
 877
 878                 /* Reset rssi stats */
 879                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 880
 881                 sc->sc_flags |= SC_OP_ANI_RUN;
 882                 ath_start_ani(common);
 883         } else {
 884                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 885                 common->curaid = 0;
 886                 /* Stop ANI */
 887                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 888                 del_timer_sync(&common->ani.timer);
 889         }
 890 }
 891
 892 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 893 {
 894         struct ath_hw *ah = sc->sc_ah;
 895         struct ath_common *common = ath9k_hw_common(ah);
 896         struct ieee80211_channel *channel = hw->conf.channel;
 897         int r;
 898
 899         ath9k_ps_wakeup(sc);
 900         ath9k_hw_configpcipowersave(ah, 0, 0);
 901
 902         if (!ah->curchan)
 903                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 904
 905         spin_lock_bh(&sc->sc_resetlock);
 906         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 907         if (r) {
 908                 ath_print(common, ATH_DBG_FATAL,
 909                           "Unable to reset channel (%u MHz), "
 910                           "reset status %d\n",
 911                           channel->center_freq, r);
 912         }
 913         spin_unlock_bh(&sc->sc_resetlock);
 914
 915         ath_update_txpow(sc);
 916         if (ath_startrecv(sc) != 0) {
 917                 ath_print(common, ATH_DBG_FATAL,
 918                           "Unable to restart recv logic\n");
 919                 return;
 920         }
 921
 922         if (sc->sc_flags & SC_OP_BEACONS)
 923                 ath_beacon_config(sc, NULL);    /* restart beacons */
 924
 925         /* Re-Enable  interrupts */
 926         ath9k_hw_set_interrupts(ah, ah->imask);
 927
 928         /* Enable LED */
 929         ath9k_hw_cfg_output(ah, ah->led_pin,
 930                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 931         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 932
 933         ieee80211_wake_queues(hw);
 934         ath9k_ps_restore(sc);
 935 }
 936
 937 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 938 {
 939         struct ath_hw *ah = sc->sc_ah;
 940         struct ieee80211_channel *channel = hw->conf.channel;
 941         int r;
 942
 943         ath9k_ps_wakeup(sc);
 944         ieee80211_stop_queues(hw);
 945
 946         /*
 947          * Keep the LED on when the radio is disabled
 948          * during idle unassociated state.
 949          */
 950         if (!sc->ps_idle) {
 951                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 952                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 953         }
 954
 955         /* Disable interrupts */
 956         ath9k_hw_set_interrupts(ah, 0);
 957
 958         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 959         ath_stoprecv(sc);               /* turn off frame recv */
 960         ath_flushrecv(sc);              /* flush recv queue */
 961
 962         if (!ah->curchan)
 963                 ah->curchan = ath_get_curchannel(sc, hw);
 964
 965         spin_lock_bh(&sc->sc_resetlock);
 966         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 967         if (r) {
 968                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 969                           "Unable to reset channel (%u MHz), "
 970                           "reset status %d\n",
 971                           channel->center_freq, r);
 972         }
 973         spin_unlock_bh(&sc->sc_resetlock);
 974
 975         ath9k_hw_phy_disable(ah);
 976         ath9k_hw_configpcipowersave(ah, 1, 1);
 977         ath9k_ps_restore(sc);
 978         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 979 }
 980
 981 int ath_reset(struct ath_softc *sc, bool retry_tx)
 982 {
 983         struct ath_hw *ah = sc->sc_ah;
 984         struct ath_common *common = ath9k_hw_common(ah);
 985         struct ieee80211_hw *hw = sc->hw;
 986         int r;
 987
 988         /* Stop ANI */
 989         del_timer_sync(&common->ani.timer);
 990
 991         ieee80211_stop_queues(hw);
 992
 993         ath9k_hw_set_interrupts(ah, 0);
 994         ath_drain_all_txq(sc, retry_tx);
 995         ath_stoprecv(sc);
 996         ath_flushrecv(sc);
 997
 998         spin_lock_bh(&sc->sc_resetlock);
 999         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
1000         if (r)
1001                 ath_print(common, ATH_DBG_FATAL,
1002                           "Unable to reset hardware; reset status %d\n", r);
1003         spin_unlock_bh(&sc->sc_resetlock);
1004
1005         if (ath_startrecv(sc) != 0)
1006                 ath_print(common, ATH_DBG_FATAL,
1007                           "Unable to start recv logic\n");
1008
1009         /*
1010          * We may be doing a reset in response to a request
1011          * that changes the channel so update any state that
1012          * might change as a result.
1013          */
1014         ath_cache_conf_rate(sc, &hw->conf);
1015
1016         ath_update_txpow(sc);
1017
1018         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1019                 ath_beacon_config(sc, NULL);    /* restart beacons */
1020
1021         ath9k_hw_set_interrupts(ah, ah->imask);
1022
1023         if (retry_tx) {
1024                 int i;
1025                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1026                         if (ATH_TXQ_SETUP(sc, i)) {
1027                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1028                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1029                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1030                         }
1031                 }
1032         }
1033
1034         ieee80211_wake_queues(hw);
1035
1036         /* Start ANI */
1037         ath_start_ani(common);
1038
1039         return r;
1040 }
1041
1042 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1043 {
1044         int qnum;
1045
1046         switch (queue) {
1047         case 0:
1048                 qnum = sc->tx.hwq_map[WME_AC_VO];
1049                 break;
1050         case 1:
1051                 qnum = sc->tx.hwq_map[WME_AC_VI];
1052                 break;
1053         case 2:
1054                 qnum = sc->tx.hwq_map[WME_AC_BE];
1055                 break;
1056         case 3:
1057                 qnum = sc->tx.hwq_map[WME_AC_BK];
1058                 break;
1059         default:
1060                 qnum = sc->tx.hwq_map[WME_AC_BE];
1061                 break;
1062         }
1063
1064         return qnum;
1065 }
1066
1067 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1068 {
1069         int qnum;
1070
1071         switch (queue) {
1072         case WME_AC_VO:
1073                 qnum = 0;
1074                 break;
1075         case WME_AC_VI:
1076                 qnum = 1;
1077                 break;
1078         case WME_AC_BE:
1079                 qnum = 2;
1080                 break;
1081         case WME_AC_BK:
1082                 qnum = 3;
1083                 break;
1084         default:
1085                 qnum = -1;
1086                 break;
1087         }
1088
1089         return qnum;
1090 }
1091
1092 /* XXX: Remove me once we don't depend on ath9k_channel for all
1093  * this redundant data */
1094 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1095                            struct ath9k_channel *ichan)
1096 {
1097         struct ieee80211_channel *chan = hw->conf.channel;
1098         struct ieee80211_conf *conf = &hw->conf;
1099
1100         ichan->channel = chan->center_freq;
1101         ichan->chan = chan;
1102
1103         if (chan->band == IEEE80211_BAND_2GHZ) {
1104                 ichan->chanmode = CHANNEL_G;
1105                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1106         } else {
1107                 ichan->chanmode = CHANNEL_A;
1108                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1109         }
1110
1111         if (conf_is_ht(conf))
1112                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1113                                             conf->channel_type);
1114 }
1115
1116 /**********************/
1117 /* mac80211 callbacks */
1118 /**********************/
1119
1120 static int ath9k_start(struct ieee80211_hw *hw)
1121 {
1122         struct ath_wiphy *aphy = hw->priv;
1123         struct ath_softc *sc = aphy->sc;
1124         struct ath_hw *ah = sc->sc_ah;
1125         struct ath_common *common = ath9k_hw_common(ah);
1126         struct ieee80211_channel *curchan = hw->conf.channel;
1127         struct ath9k_channel *init_channel;
1128         int r;
1129
1130         ath_print(common, ATH_DBG_CONFIG,
1131                   "Starting driver with initial channel: %d MHz\n",
1132                   curchan->center_freq);
1133
1134         mutex_lock(&sc->mutex);
1135
1136         if (ath9k_wiphy_started(sc)) {
1137                 if (sc->chan_idx == curchan->hw_value) {
1138                         /*
1139                          * Already on the operational channel, the new wiphy
1140                          * can be marked active.
1141                          */
1142                         aphy->state = ATH_WIPHY_ACTIVE;
1143                         ieee80211_wake_queues(hw);
1144                 } else {
1145                         /*
1146                          * Another wiphy is on another channel, start the new
1147                          * wiphy in paused state.
1148                          */
1149                         aphy->state = ATH_WIPHY_PAUSED;
1150                         ieee80211_stop_queues(hw);
1151                 }
1152                 mutex_unlock(&sc->mutex);
1153                 return 0;
1154         }
1155         aphy->state = ATH_WIPHY_ACTIVE;
1156
1157         /* setup initial channel */
1158
1159         sc->chan_idx = curchan->hw_value;
1160
1161         init_channel = ath_get_curchannel(sc, hw);
1162
1163         /* Reset SERDES registers */
1164         ath9k_hw_configpcipowersave(ah, 0, 0);
1165
1166         /*
1167          * The basic interface to setting the hardware in a good
1168          * state is ``reset''.  On return the hardware is known to
1169          * be powered up and with interrupts disabled.  This must
1170          * be followed by initialization of the appropriate bits
1171          * and then setup of the interrupt mask.
1172          */
1173         spin_lock_bh(&sc->sc_resetlock);
1174         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1175         if (r) {
1176                 ath_print(common, ATH_DBG_FATAL,
1177                           "Unable to reset hardware; reset status %d "
1178                           "(freq %u MHz)\n", r,
1179                           curchan->center_freq);
1180                 spin_unlock_bh(&sc->sc_resetlock);
1181                 goto mutex_unlock;
1182         }
1183         spin_unlock_bh(&sc->sc_resetlock);
1184
1185         /*
1186          * This is needed only to setup initial state
1187          * but it's best done after a reset.
1188          */
1189         ath_update_txpow(sc);
1190
1191         /*
1192          * Setup the hardware after reset:
1193          * The receive engine is set going.
1194          * Frame transmit is handled entirely
1195          * in the frame output path; there's nothing to do
1196          * here except setup the interrupt mask.
1197          */
1198         if (ath_startrecv(sc) != 0) {
1199                 ath_print(common, ATH_DBG_FATAL,
1200                           "Unable to start recv logic\n");
1201                 r = -EIO;
1202                 goto mutex_unlock;
1203         }
1204
1205         /* Setup our intr mask. */
1206         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1207                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1208                     ATH9K_INT_GLOBAL;
1209
1210         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1211                 ah->imask |= ATH9K_INT_RXHP |
1212                              ATH9K_INT_RXLP |
1213                              ATH9K_INT_BB_WATCHDOG;
1214         else
1215                 ah->imask |= ATH9K_INT_RX;
1216
1217         ah->imask |= ATH9K_INT_GTT;
1218
1219         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1220                 ah->imask |= ATH9K_INT_CST;
1221
1222         ath_cache_conf_rate(sc, &hw->conf);
1223
1224         sc->sc_flags &= ~SC_OP_INVALID;
1225
1226         /* Disable BMISS interrupt when we're not associated */
1227         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1228         ath9k_hw_set_interrupts(ah, ah->imask);
1229
1230         ieee80211_wake_queues(hw);
1231
1232         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1233
1234         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1235             !ah->btcoex_hw.enabled) {
1236                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1237                                            AR_STOMP_LOW_WLAN_WGHT);
1238                 ath9k_hw_btcoex_enable(ah);
1239
1240                 if (common->bus_ops->bt_coex_prep)
1241                         common->bus_ops->bt_coex_prep(common);
1242                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1243                         ath9k_btcoex_timer_resume(sc);
1244         }
1245
1246 mutex_unlock:
1247         mutex_unlock(&sc->mutex);
1248
1249         return r;
1250 }
1251
1252 static int ath9k_tx(struct ieee80211_hw *hw,
1253                     struct sk_buff *skb)
1254 {
1255         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1256         struct ath_wiphy *aphy = hw->priv;
1257         struct ath_softc *sc = aphy->sc;
1258         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1259         struct ath_tx_control txctl;
1260         int padpos, padsize;
1261         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1262         int qnum;
1263
1264         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1265                 ath_print(common, ATH_DBG_XMIT,
1266                           "ath9k: %s: TX in unexpected wiphy state "
1267                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1268                 goto exit;
1269         }
1270
1271         if (sc->ps_enabled) {
1272                 /*
1273                  * mac80211 does not set PM field for normal data frames, so we
1274                  * need to update that based on the current PS mode.
1275                  */
1276                 if (ieee80211_is_data(hdr->frame_control) &&
1277                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1278                     !ieee80211_has_pm(hdr->frame_control)) {
1279                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1280                                   "while in PS mode\n");
1281                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1282                 }
1283         }
1284
1285         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1286                 /*
1287                  * We are using PS-Poll and mac80211 can request TX while in
1288                  * power save mode. Need to wake up hardware for the TX to be
1289                  * completed and if needed, also for RX of buffered frames.
1290                  */
1291                 ath9k_ps_wakeup(sc);
1292                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1293                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1294                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1295                         ath_print(common, ATH_DBG_PS,
1296                                   "Sending PS-Poll to pick a buffered frame\n");
1297                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1298                 } else {
1299                         ath_print(common, ATH_DBG_PS,
1300                                   "Wake up to complete TX\n");
1301                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1302                 }
1303                 /*
1304                  * The actual restore operation will happen only after
1305                  * the sc_flags bit is cleared. We are just dropping
1306                  * the ps_usecount here.
1307                  */
1308                 ath9k_ps_restore(sc);
1309         }
1310
1311         memset(&txctl, 0, sizeof(struct ath_tx_control));
1312
1313         /*
1314          * As a temporary workaround, assign seq# here; this will likely need
1315          * to be cleaned up to work better with Beacon transmission and virtual
1316          * BSSes.
1317          */
1318         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1319                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1320                         sc->tx.seq_no += 0x10;
1321                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1322                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1323         }
1324
1325         /* Add the padding after the header if this is not already done */
1326         padpos = ath9k_cmn_padpos(hdr->frame_control);
1327         padsize = padpos & 3;
1328         if (padsize && skb->len>padpos) {
1329                 if (skb_headroom(skb) < padsize)
1330                         return -1;
1331                 skb_push(skb, padsize);
1332                 memmove(skb->data, skb->data + padsize, padpos);
1333         }
1334
1335         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1336         txctl.txq = &sc->tx.txq[qnum];
1337
1338         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1339
1340         if (ath_tx_start(hw, skb, &txctl) != 0) {
1341                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1342                 goto exit;
1343         }
1344
1345         return 0;
1346 exit:
1347         dev_kfree_skb_any(skb);
1348         return 0;
1349 }
1350
1351 static void ath9k_stop(struct ieee80211_hw *hw)
1352 {
1353         struct ath_wiphy *aphy = hw->priv;
1354         struct ath_softc *sc = aphy->sc;
1355         struct ath_hw *ah = sc->sc_ah;
1356         struct ath_common *common = ath9k_hw_common(ah);
1357         int i;
1358
1359         mutex_lock(&sc->mutex);
1360
1361         aphy->state = ATH_WIPHY_INACTIVE;
1362
1363         if (led_blink)
1364                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1365
1366         cancel_delayed_work_sync(&sc->tx_complete_work);
1367         cancel_work_sync(&sc->paprd_work);
1368         cancel_work_sync(&sc->hw_check_work);
1369
1370         for (i = 0; i < sc->num_sec_wiphy; i++) {
1371                 if (sc->sec_wiphy[i])
1372                         break;
1373         }
1374
1375         if (i == sc->num_sec_wiphy) {
1376                 cancel_delayed_work_sync(&sc->wiphy_work);
1377                 cancel_work_sync(&sc->chan_work);
1378         }
1379
1380         if (sc->sc_flags & SC_OP_INVALID) {
1381                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1382                 mutex_unlock(&sc->mutex);
1383                 return;
1384         }
1385
1386         if (ath9k_wiphy_started(sc)) {
1387                 mutex_unlock(&sc->mutex);
1388                 return; /* another wiphy still in use */
1389         }
1390
1391         /* Ensure HW is awake when we try to shut it down. */
1392         ath9k_ps_wakeup(sc);
1393
1394         if (ah->btcoex_hw.enabled) {
1395                 ath9k_hw_btcoex_disable(ah);
1396                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1397                         ath9k_btcoex_timer_pause(sc);
1398         }
1399
1400         /* make sure h/w will not generate any interrupt
1401          * before setting the invalid flag. */
1402         ath9k_hw_set_interrupts(ah, 0);
1403
1404         if (!(sc->sc_flags & SC_OP_INVALID)) {
1405                 ath_drain_all_txq(sc, false);
1406                 ath_stoprecv(sc);
1407                 ath9k_hw_phy_disable(ah);
1408         } else
1409                 sc->rx.rxlink = NULL;
1410
1411         /* disable HAL and put h/w to sleep */
1412         ath9k_hw_disable(ah);
1413         ath9k_hw_configpcipowersave(ah, 1, 1);
1414         ath9k_ps_restore(sc);
1415
1416         /* Finally, put the chip in FULL SLEEP mode */
1417         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1418
1419         sc->sc_flags |= SC_OP_INVALID;
1420
1421         mutex_unlock(&sc->mutex);
1422
1423         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1424 }
1425
1426 static int ath9k_add_interface(struct ieee80211_hw *hw,
1427                                struct ieee80211_vif *vif)
1428 {
1429         struct ath_wiphy *aphy = hw->priv;
1430         struct ath_softc *sc = aphy->sc;
1431         struct ath_hw *ah = sc->sc_ah;
1432         struct ath_common *common = ath9k_hw_common(ah);
1433         struct ath_vif *avp = (void *)vif->drv_priv;
1434         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1435         int ret = 0;
1436
1437         mutex_lock(&sc->mutex);
1438
1439         switch (vif->type) {
1440         case NL80211_IFTYPE_STATION:
1441                 ic_opmode = NL80211_IFTYPE_STATION;
1442                 break;
1443         case NL80211_IFTYPE_WDS:
1444                 ic_opmode = NL80211_IFTYPE_WDS;
1445                 break;
1446         case NL80211_IFTYPE_ADHOC:
1447         case NL80211_IFTYPE_AP:
1448         case NL80211_IFTYPE_MESH_POINT:
1449                 if (sc->nbcnvifs >= ATH_BCBUF) {
1450                         ret = -ENOBUFS;
1451                         goto out;
1452                 }
1453                 ic_opmode = vif->type;
1454                 break;
1455         default:
1456                 ath_print(common, ATH_DBG_FATAL,
1457                         "Interface type %d not yet supported\n", vif->type);
1458                 ret = -EOPNOTSUPP;
1459                 goto out;
1460         }
1461
1462         ath_print(common, ATH_DBG_CONFIG,
1463                   "Attach a VIF of type: %d\n", ic_opmode);
1464
1465         /* Set the VIF opmode */
1466         avp->av_opmode = ic_opmode;
1467         avp->av_bslot = -1;
1468
1469         sc->nvifs++;
1470
1471         ath9k_set_bssid_mask(hw, vif);
1472
1473         if (sc->nvifs > 1)
1474                 goto out; /* skip global settings for secondary vif */
1475
1476         if (ic_opmode == NL80211_IFTYPE_AP) {
1477                 ath9k_hw_set_tsfadjust(ah, 1);
1478                 sc->sc_flags |= SC_OP_TSF_RESET;
1479         }
1480
1481         /* Set the device opmode */
1482         ah->opmode = ic_opmode;
1483
1484         /*
1485          * Enable MIB interrupts when there are hardware phy counters.
1486          * Note we only do this (at the moment) for station mode.
1487          */
1488         if ((vif->type == NL80211_IFTYPE_STATION) ||
1489             (vif->type == NL80211_IFTYPE_ADHOC) ||
1490             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1491                 if (ah->config.enable_ani)
1492                         ah->imask |= ATH9K_INT_MIB;
1493                 ah->imask |= ATH9K_INT_TSFOOR;
1494         }
1495
1496         ath9k_hw_set_interrupts(ah, ah->imask);
1497
1498         if (vif->type == NL80211_IFTYPE_AP    ||
1499             vif->type == NL80211_IFTYPE_ADHOC ||
1500             vif->type == NL80211_IFTYPE_MONITOR) {
1501                 sc->sc_flags |= SC_OP_ANI_RUN;
1502                 ath_start_ani(common);
1503         }
1504
1505 out:
1506         mutex_unlock(&sc->mutex);
1507         return ret;
1508 }
1509
1510 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1511                                    struct ieee80211_vif *vif)
1512 {
1513         struct ath_wiphy *aphy = hw->priv;
1514         struct ath_softc *sc = aphy->sc;
1515         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1516         struct ath_vif *avp = (void *)vif->drv_priv;
1517         int i;
1518
1519         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1520
1521         mutex_lock(&sc->mutex);
1522
1523         /* Stop ANI */
1524         sc->sc_flags &= ~SC_OP_ANI_RUN;
1525         del_timer_sync(&common->ani.timer);
1526
1527         /* Reclaim beacon resources */
1528         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1529             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1530             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1531                 ath9k_ps_wakeup(sc);
1532                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1533                 ath9k_ps_restore(sc);
1534         }
1535
1536         ath_beacon_return(sc, avp);
1537         sc->sc_flags &= ~SC_OP_BEACONS;
1538
1539         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1540                 if (sc->beacon.bslot[i] == vif) {
1541                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1542                                "slot\n", __func__);
1543                         sc->beacon.bslot[i] = NULL;
1544                         sc->beacon.bslot_aphy[i] = NULL;
1545                 }
1546         }
1547
1548         sc->nvifs--;
1549
1550         mutex_unlock(&sc->mutex);
1551 }
1552
1553 static void ath9k_enable_ps(struct ath_softc *sc)
1554 {
1555         struct ath_hw *ah = sc->sc_ah;
1556
1557         sc->ps_enabled = true;
1558         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1559                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1560                         ah->imask |= ATH9K_INT_TIM_TIMER;
1561                         ath9k_hw_set_interrupts(ah, ah->imask);
1562                 }
1563                 ath9k_hw_setrxabort(ah, 1);
1564         }
1565 }
1566
1567 static void ath9k_disable_ps(struct ath_softc *sc)
1568 {
1569         struct ath_hw *ah = sc->sc_ah;
1570
1571         sc->ps_enabled = false;
1572         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1573         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1574                 ath9k_hw_setrxabort(ah, 0);
1575                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1576                                   PS_WAIT_FOR_CAB |
1577                                   PS_WAIT_FOR_PSPOLL_DATA |
1578                                   PS_WAIT_FOR_TX_ACK);
1579                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1580                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1581                         ath9k_hw_set_interrupts(ah, ah->imask);
1582                 }
1583         }
1584
1585 }
1586
1587 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1588 {
1589         struct ath_wiphy *aphy = hw->priv;
1590         struct ath_softc *sc = aphy->sc;
1591         struct ath_hw *ah = sc->sc_ah;
1592         struct ath_common *common = ath9k_hw_common(ah);
1593         struct ieee80211_conf *conf = &hw->conf;
1594         bool disable_radio;
1595
1596         mutex_lock(&sc->mutex);
1597
1598         /*
1599          * Leave this as the first check because we need to turn on the
1600          * radio if it was disabled before prior to processing the rest
1601          * of the changes. Likewise we must only disable the radio towards
1602          * the end.
1603          */
1604         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1605                 bool enable_radio;
1606                 bool all_wiphys_idle;
1607                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1608
1609                 spin_lock_bh(&sc->wiphy_lock);
1610                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1611                 ath9k_set_wiphy_idle(aphy, idle);
1612
1613                 enable_radio = (!idle && all_wiphys_idle);
1614
1615                 /*
1616                  * After we unlock here its possible another wiphy
1617                  * can be re-renabled so to account for that we will
1618                  * only disable the radio toward the end of this routine
1619                  * if by then all wiphys are still idle.
1620                  */
1621                 spin_unlock_bh(&sc->wiphy_lock);
1622
1623                 if (enable_radio) {
1624                         sc->ps_idle = false;
1625                         ath_radio_enable(sc, hw);
1626                         ath_print(common, ATH_DBG_CONFIG,
1627                                   "not-idle: enabling radio\n");
1628                 }
1629         }
1630
1631         /*
1632          * We just prepare to enable PS. We have to wait until our AP has
1633          * ACK'd our null data frame to disable RX otherwise we'll ignore
1634          * those ACKs and end up retransmitting the same null data frames.
1635          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1636          */
1637         if (changed & IEEE80211_CONF_CHANGE_PS) {
1638                 unsigned long flags;
1639                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1640                 if (conf->flags & IEEE80211_CONF_PS)
1641                         ath9k_enable_ps(sc);
1642                 else
1643                         ath9k_disable_ps(sc);
1644                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1645         }
1646
1647         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1648                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1649                         ath_print(common, ATH_DBG_CONFIG,
1650                                   "HW opmode set to Monitor mode\n");
1651                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1652                 }
1653         }
1654
1655         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1656                 struct ieee80211_channel *curchan = hw->conf.channel;
1657                 int pos = curchan->hw_value;
1658                 int old_pos = -1;
1659                 unsigned long flags;
1660
1661                 if (ah->curchan)
1662                         old_pos = ah->curchan - &ah->channels[0];
1663
1664                 aphy->chan_idx = pos;
1665                 aphy->chan_is_ht = conf_is_ht(conf);
1666                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1667                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1668                 else
1669                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1670
1671                 if (aphy->state == ATH_WIPHY_SCAN ||
1672                     aphy->state == ATH_WIPHY_ACTIVE)
1673                         ath9k_wiphy_pause_all_forced(sc, aphy);
1674                 else {
1675                         /*
1676                          * Do not change operational channel based on a paused
1677                          * wiphy changes.
1678                          */
1679                         goto skip_chan_change;
1680                 }
1681
1682                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1683                           curchan->center_freq);
1684
1685                 /* XXX: remove me eventualy */
1686                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1687
1688                 ath_update_chainmask(sc, conf_is_ht(conf));
1689
1690                 /* update survey stats for the old channel before switching */
1691                 spin_lock_irqsave(&common->cc_lock, flags);
1692                 ath_update_survey_stats(sc);
1693                 spin_unlock_irqrestore(&common->cc_lock, flags);
1694
1695                 /*
1696                  * If the operating channel changes, change the survey in-use flags
1697                  * along with it.
1698                  * Reset the survey data for the new channel, unless we're switching
1699                  * back to the operating channel from an off-channel operation.
1700                  */
1701                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1702                     sc->cur_survey != &sc->survey[pos]) {
1703
1704                         if (sc->cur_survey)
1705                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1706
1707                         sc->cur_survey = &sc->survey[pos];
1708
1709                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1710                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1711                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1712                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1713                 }
1714
1715                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1716                         ath_print(common, ATH_DBG_FATAL,
1717                                   "Unable to set channel\n");
1718                         mutex_unlock(&sc->mutex);
1719                         return -EINVAL;
1720                 }
1721
1722                 /*
1723                  * The most recent snapshot of channel->noisefloor for the old
1724                  * channel is only available after the hardware reset. Copy it to
1725                  * the survey stats now.
1726                  */
1727                 if (old_pos >= 0)
1728                         ath_update_survey_nf(sc, old_pos);
1729         }
1730
1731 skip_chan_change:
1732         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1733                 sc->config.txpowlimit = 2 * conf->power_level;
1734                 ath_update_txpow(sc);
1735         }
1736
1737         spin_lock_bh(&sc->wiphy_lock);
1738         disable_radio = ath9k_all_wiphys_idle(sc);
1739         spin_unlock_bh(&sc->wiphy_lock);
1740
1741         if (disable_radio) {
1742                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1743                 sc->ps_idle = true;
1744                 ath_radio_disable(sc, hw);
1745         }
1746
1747         mutex_unlock(&sc->mutex);
1748
1749         return 0;
1750 }
1751
1752 #define SUPPORTED_FILTERS                       \
1753         (FIF_PROMISC_IN_BSS |                   \
1754         FIF_ALLMULTI |                          \
1755         FIF_CONTROL |                           \
1756         FIF_PSPOLL |                            \
1757         FIF_OTHER_BSS |                         \
1758         FIF_BCN_PRBRESP_PROMISC |               \
1759         FIF_PROBE_REQ |                         \
1760         FIF_FCSFAIL)
1761
1762 /* FIXME: sc->sc_full_reset ? */
1763 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1764                                    unsigned int changed_flags,
1765                                    unsigned int *total_flags,
1766                                    u64 multicast)
1767 {
1768         struct ath_wiphy *aphy = hw->priv;
1769         struct ath_softc *sc = aphy->sc;
1770         u32 rfilt;
1771
1772         changed_flags &= SUPPORTED_FILTERS;
1773         *total_flags &= SUPPORTED_FILTERS;
1774
1775         sc->rx.rxfilter = *total_flags;
1776         ath9k_ps_wakeup(sc);
1777         rfilt = ath_calcrxfilter(sc);
1778         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1779         ath9k_ps_restore(sc);
1780
1781         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1782                   "Set HW RX filter: 0x%x\n", rfilt);
1783 }
1784
1785 static int ath9k_sta_add(struct ieee80211_hw *hw,
1786                          struct ieee80211_vif *vif,
1787                          struct ieee80211_sta *sta)
1788 {
1789         struct ath_wiphy *aphy = hw->priv;
1790         struct ath_softc *sc = aphy->sc;
1791
1792         ath_node_attach(sc, sta);
1793
1794         return 0;
1795 }
1796
1797 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1798                             struct ieee80211_vif *vif,
1799                             struct ieee80211_sta *sta)
1800 {
1801         struct ath_wiphy *aphy = hw->priv;
1802         struct ath_softc *sc = aphy->sc;
1803
1804         ath_node_detach(sc, sta);
1805
1806         return 0;
1807 }
1808
1809 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1810                          const struct ieee80211_tx_queue_params *params)
1811 {
1812         struct ath_wiphy *aphy = hw->priv;
1813         struct ath_softc *sc = aphy->sc;
1814         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1815         struct ath9k_tx_queue_info qi;
1816         int ret = 0, qnum;
1817
1818         if (queue >= WME_NUM_AC)
1819                 return 0;
1820
1821         mutex_lock(&sc->mutex);
1822
1823         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1824
1825         qi.tqi_aifs = params->aifs;
1826         qi.tqi_cwmin = params->cw_min;
1827         qi.tqi_cwmax = params->cw_max;
1828         qi.tqi_burstTime = params->txop;
1829         qnum = ath_get_hal_qnum(queue, sc);
1830
1831         ath_print(common, ATH_DBG_CONFIG,
1832                   "Configure tx [queue/halq] [%d/%d],  "
1833                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1834                   queue, qnum, params->aifs, params->cw_min,
1835                   params->cw_max, params->txop);
1836
1837         ret = ath_txq_update(sc, qnum, &qi);
1838         if (ret)
1839                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1840
1841         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1842                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1843                         ath_beaconq_config(sc);
1844
1845         mutex_unlock(&sc->mutex);
1846
1847         return ret;
1848 }
1849
1850 static int ath9k_set_key(struct ieee80211_hw *hw,
1851                          enum set_key_cmd cmd,
1852                          struct ieee80211_vif *vif,
1853                          struct ieee80211_sta *sta,
1854                          struct ieee80211_key_conf *key)
1855 {
1856         struct ath_wiphy *aphy = hw->priv;
1857         struct ath_softc *sc = aphy->sc;
1858         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1859         int ret = 0;
1860
1861         if (modparam_nohwcrypt)
1862                 return -ENOSPC;
1863
1864         mutex_lock(&sc->mutex);
1865         ath9k_ps_wakeup(sc);
1866         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1867
1868         switch (cmd) {
1869         case SET_KEY:
1870                 ret = ath_key_config(common, vif, sta, key);
1871                 if (ret >= 0) {
1872                         key->hw_key_idx = ret;
1873                         /* push IV and Michael MIC generation to stack */
1874                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1875                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1876                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1877                         if (sc->sc_ah->sw_mgmt_crypto &&
1878                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1879                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1880                         ret = 0;
1881                 }
1882                 break;
1883         case DISABLE_KEY:
1884                 ath_key_delete(common, key);
1885                 break;
1886         default:
1887                 ret = -EINVAL;
1888         }
1889
1890         ath9k_ps_restore(sc);
1891         mutex_unlock(&sc->mutex);
1892
1893         return ret;
1894 }
1895
1896 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1897                                    struct ieee80211_vif *vif,
1898                                    struct ieee80211_bss_conf *bss_conf,
1899                                    u32 changed)
1900 {
1901         struct ath_wiphy *aphy = hw->priv;
1902         struct ath_softc *sc = aphy->sc;
1903         struct ath_hw *ah = sc->sc_ah;
1904         struct ath_common *common = ath9k_hw_common(ah);
1905         struct ath_vif *avp = (void *)vif->drv_priv;
1906         int slottime;
1907         int error;
1908
1909         mutex_lock(&sc->mutex);
1910
1911         if (changed & BSS_CHANGED_BSSID) {
1912                 /* Set BSSID */
1913                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1914                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1915                 common->curaid = 0;
1916                 ath9k_hw_write_associd(ah);
1917
1918                 /* Set aggregation protection mode parameters */
1919                 sc->config.ath_aggr_prot = 0;
1920
1921                 /* Only legacy IBSS for now */
1922                 if (vif->type == NL80211_IFTYPE_ADHOC)
1923                         ath_update_chainmask(sc, 0);
1924
1925                 ath_print(common, ATH_DBG_CONFIG,
1926                           "BSSID: %pM aid: 0x%x\n",
1927                           common->curbssid, common->curaid);
1928
1929                 /* need to reconfigure the beacon */
1930                 sc->sc_flags &= ~SC_OP_BEACONS ;
1931         }
1932
1933         /* Enable transmission of beacons (AP, IBSS, MESH) */
1934         if ((changed & BSS_CHANGED_BEACON) ||
1935             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1936                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1937                 error = ath_beacon_alloc(aphy, vif);
1938                 if (!error)
1939                         ath_beacon_config(sc, vif);
1940         }
1941
1942         if (changed & BSS_CHANGED_ERP_SLOT) {
1943                 if (bss_conf->use_short_slot)
1944                         slottime = 9;
1945                 else
1946                         slottime = 20;
1947                 if (vif->type == NL80211_IFTYPE_AP) {
1948                         /*
1949                          * Defer update, so that connected stations can adjust
1950                          * their settings at the same time.
1951                          * See beacon.c for more details
1952                          */
1953                         sc->beacon.slottime = slottime;
1954                         sc->beacon.updateslot = UPDATE;
1955                 } else {
1956                         ah->slottime = slottime;
1957                         ath9k_hw_init_global_settings(ah);
1958                 }
1959         }
1960
1961         /* Disable transmission of beacons */
1962         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1963                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1964
1965         if (changed & BSS_CHANGED_BEACON_INT) {
1966                 sc->beacon_interval = bss_conf->beacon_int;
1967                 /*
1968                  * In case of AP mode, the HW TSF has to be reset
1969                  * when the beacon interval changes.
1970                  */
1971                 if (vif->type == NL80211_IFTYPE_AP) {
1972                         sc->sc_flags |= SC_OP_TSF_RESET;
1973                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1974                         error = ath_beacon_alloc(aphy, vif);
1975                         if (!error)
1976                                 ath_beacon_config(sc, vif);
1977                 } else {
1978                         ath_beacon_config(sc, vif);
1979                 }
1980         }
1981
1982         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1983                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1984                           bss_conf->use_short_preamble);
1985                 if (bss_conf->use_short_preamble)
1986                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1987                 else
1988                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1989         }
1990
1991         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1992                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1993                           bss_conf->use_cts_prot);
1994                 if (bss_conf->use_cts_prot &&
1995                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1996                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1997                 else
1998                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1999         }
2000
2001         if (changed & BSS_CHANGED_ASSOC) {
2002                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2003                         bss_conf->assoc);
2004                 ath9k_bss_assoc_info(sc, vif, bss_conf);
2005         }
2006
2007         mutex_unlock(&sc->mutex);
2008 }
2009
2010 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2011 {
2012         u64 tsf;
2013         struct ath_wiphy *aphy = hw->priv;
2014         struct ath_softc *sc = aphy->sc;
2015
2016         mutex_lock(&sc->mutex);
2017         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2018         mutex_unlock(&sc->mutex);
2019
2020         return tsf;
2021 }
2022
2023 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2024 {
2025         struct ath_wiphy *aphy = hw->priv;
2026         struct ath_softc *sc = aphy->sc;
2027
2028         mutex_lock(&sc->mutex);
2029         ath9k_hw_settsf64(sc->sc_ah, tsf);
2030         mutex_unlock(&sc->mutex);
2031 }
2032
2033 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2034 {
2035         struct ath_wiphy *aphy = hw->priv;
2036         struct ath_softc *sc = aphy->sc;
2037
2038         mutex_lock(&sc->mutex);
2039
2040         ath9k_ps_wakeup(sc);
2041         ath9k_hw_reset_tsf(sc->sc_ah);
2042         ath9k_ps_restore(sc);
2043
2044         mutex_unlock(&sc->mutex);
2045 }
2046
2047 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2048                               struct ieee80211_vif *vif,
2049                               enum ieee80211_ampdu_mlme_action action,
2050                               struct ieee80211_sta *sta,
2051                               u16 tid, u16 *ssn)
2052 {
2053         struct ath_wiphy *aphy = hw->priv;
2054         struct ath_softc *sc = aphy->sc;
2055         int ret = 0;
2056
2057         local_bh_disable();
2058
2059         switch (action) {
2060         case IEEE80211_AMPDU_RX_START:
2061                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2062                         ret = -ENOTSUPP;
2063                 break;
2064         case IEEE80211_AMPDU_RX_STOP:
2065                 break;
2066         case IEEE80211_AMPDU_TX_START:
2067                 ath9k_ps_wakeup(sc);
2068                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2069                 if (!ret)
2070                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2071                 ath9k_ps_restore(sc);
2072                 break;
2073         case IEEE80211_AMPDU_TX_STOP:
2074                 ath9k_ps_wakeup(sc);
2075                 ath_tx_aggr_stop(sc, sta, tid);
2076                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2077                 ath9k_ps_restore(sc);
2078                 break;
2079         case IEEE80211_AMPDU_TX_OPERATIONAL:
2080                 ath9k_ps_wakeup(sc);
2081                 ath_tx_aggr_resume(sc, sta, tid);
2082                 ath9k_ps_restore(sc);
2083                 break;
2084         default:
2085                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2086                           "Unknown AMPDU action\n");
2087         }
2088
2089         local_bh_enable();
2090
2091         return ret;
2092 }
2093
2094 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2095                              struct survey_info *survey)
2096 {
2097         struct ath_wiphy *aphy = hw->priv;
2098         struct ath_softc *sc = aphy->sc;
2099         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2100         struct ieee80211_supported_band *sband;
2101         struct ieee80211_channel *chan;
2102         unsigned long flags;
2103         int pos;
2104
2105         spin_lock_irqsave(&common->cc_lock, flags);
2106         if (idx == 0)
2107                 ath_update_survey_stats(sc);
2108
2109         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2110         if (sband && idx >= sband->n_channels) {
2111                 idx -= sband->n_channels;
2112                 sband = NULL;
2113         }
2114
2115         if (!sband)
2116                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2117
2118         if (!sband || idx >= sband->n_channels) {
2119                 spin_unlock_irqrestore(&common->cc_lock, flags);
2120                 return -ENOENT;
2121         }
2122
2123         chan = &sband->channels[idx];
2124         pos = chan->hw_value;
2125         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2126         survey->channel = chan;
2127         spin_unlock_irqrestore(&common->cc_lock, flags);
2128
2129         return 0;
2130 }
2131
2132 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2133 {
2134         struct ath_wiphy *aphy = hw->priv;
2135         struct ath_softc *sc = aphy->sc;
2136
2137         mutex_lock(&sc->mutex);
2138         if (ath9k_wiphy_scanning(sc)) {
2139                 /*
2140                  * There is a race here in mac80211 but fixing it requires
2141                  * we revisit how we handle the scan complete callback.
2142                  * After mac80211 fixes we will not have configured hardware
2143                  * to the home channel nor would we have configured the RX
2144                  * filter yet.
2145                  */
2146                 mutex_unlock(&sc->mutex);
2147                 return;
2148         }
2149
2150         aphy->state = ATH_WIPHY_SCAN;
2151         ath9k_wiphy_pause_all_forced(sc, aphy);
2152         mutex_unlock(&sc->mutex);
2153 }
2154
2155 /*
2156  * XXX: this requires a revisit after the driver
2157  * scan_complete gets moved to another place/removed in mac80211.
2158  */
2159 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2160 {
2161         struct ath_wiphy *aphy = hw->priv;
2162         struct ath_softc *sc = aphy->sc;
2163
2164         mutex_lock(&sc->mutex);
2165         aphy->state = ATH_WIPHY_ACTIVE;
2166         mutex_unlock(&sc->mutex);
2167 }
2168
2169 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2170 {
2171         struct ath_wiphy *aphy = hw->priv;
2172         struct ath_softc *sc = aphy->sc;
2173         struct ath_hw *ah = sc->sc_ah;
2174
2175         mutex_lock(&sc->mutex);
2176         ah->coverage_class = coverage_class;
2177         ath9k_hw_init_global_settings(ah);
2178         mutex_unlock(&sc->mutex);
2179 }
2180
2181 struct ieee80211_ops ath9k_ops = {
2182         .tx                 = ath9k_tx,
2183         .start              = ath9k_start,
2184         .stop               = ath9k_stop,
2185         .add_interface      = ath9k_add_interface,
2186         .remove_interface   = ath9k_remove_interface,
2187         .config             = ath9k_config,
2188         .configure_filter   = ath9k_configure_filter,
2189         .sta_add            = ath9k_sta_add,
2190         .sta_remove         = ath9k_sta_remove,
2191         .conf_tx            = ath9k_conf_tx,
2192         .bss_info_changed   = ath9k_bss_info_changed,
2193         .set_key            = ath9k_set_key,
2194         .get_tsf            = ath9k_get_tsf,
2195         .set_tsf            = ath9k_set_tsf,
2196         .reset_tsf          = ath9k_reset_tsf,
2197         .ampdu_action       = ath9k_ampdu_action,
2198         .get_survey         = ath9k_get_survey,
2199         .sw_scan_start      = ath9k_sw_scan_start,
2200         .sw_scan_complete   = ath9k_sw_scan_complete,
2201         .rfkill_poll        = ath9k_rfkill_poll_state,
2202         .set_coverage_class = ath9k_set_coverage_class,
2203 };