drivers/gpu/drm/radeon/radeon_fence.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Dave Airlie
  30  */
  31 #include <linux/seq_file.h>
  32 #include <asm/atomic.h>
  33 #include <linux/wait.h>
  34 #include <linux/list.h>
  35 #include <linux/kref.h>
  36 #include "drmP.h"
  37 #include "drm.h"
  38 #include "radeon_reg.h"
  39 #include "radeon.h"
  40
  41 int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
  42 {
  43         unsigned long irq_flags;
  44
  45         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
  46         if (fence->emited) {
  47                 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  48                 return 0;
  49         }
  50         fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
  51         if (!rdev->cp.ready) {
  52                 /* FIXME: cp is not running assume everythings is done right
  53                  * away
  54                  */
  55                 WREG32(rdev->fence_drv.scratch_reg, fence->seq);
  56         } else
  57                 radeon_fence_ring_emit(rdev, fence);
  58
  59         fence->emited = true;
  60         fence->timeout = jiffies + ((2000 * HZ) / 1000);
  61         list_del(&fence->list);
  62         list_add_tail(&fence->list, &rdev->fence_drv.emited);
  63         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  64         return 0;
  65 }
  66
  67 static bool radeon_fence_poll_locked(struct radeon_device *rdev)
  68 {
  69         struct radeon_fence *fence;
  70         struct list_head *i, *n;
  71         uint32_t seq;
  72         bool wake = false;
  73
  74         if (rdev == NULL) {
  75                 return true;
  76         }
  77         if (rdev->shutdown) {
  78                 return true;
  79         }
  80         seq = RREG32(rdev->fence_drv.scratch_reg);
  81         rdev->fence_drv.last_seq = seq;
  82         n = NULL;
  83         list_for_each(i, &rdev->fence_drv.emited) {
  84                 fence = list_entry(i, struct radeon_fence, list);
  85                 if (fence->seq == seq) {
  86                         n = i;
  87                         break;
  88                 }
  89         }
  90         /* all fence previous to this one are considered as signaled */
  91         if (n) {
  92                 i = n;
  93                 do {
  94                         n = i->prev;
  95                         list_del(i);
  96                         list_add_tail(i, &rdev->fence_drv.signaled);
  97                         fence = list_entry(i, struct radeon_fence, list);
  98                         fence->signaled = true;
  99                         i = n;
 100                 } while (i != &rdev->fence_drv.emited);
 101                 wake = true;
 102         }
 103         return wake;
 104 }
 105
 106 static void radeon_fence_destroy(struct kref *kref)
 107 {
 108         unsigned long irq_flags;
 109         struct radeon_fence *fence;
 110
 111         fence = container_of(kref, struct radeon_fence, kref);
 112         write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
 113         list_del(&fence->list);
 114         fence->emited = false;
 115         write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
 116         kfree(fence);
 117 }
 118
 119 int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
 120 {
 121         unsigned long irq_flags;
 122
 123         *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
 124         if ((*fence) == NULL) {
 125                 return -ENOMEM;
 126         }
 127         kref_init(&((*fence)->kref));
 128         (*fence)->rdev = rdev;
 129         (*fence)->emited = false;
 130         (*fence)->signaled = false;
 131         (*fence)->seq = 0;
 132         INIT_LIST_HEAD(&(*fence)->list);
 133
 134         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 135         list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
 136         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 137         return 0;
 138 }
 139
 140
 141 bool radeon_fence_signaled(struct radeon_fence *fence)
 142 {
 143         unsigned long irq_flags;
 144         bool signaled = false;
 145
 146         if (!fence)
 147                 return true;
 148
 149         if (fence->rdev->gpu_lockup)
 150                 return true;
 151
 152         write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
 153         signaled = fence->signaled;
 154         /* if we are shuting down report all fence as signaled */
 155         if (fence->rdev->shutdown) {
 156                 signaled = true;
 157         }
 158         if (!fence->emited) {
 159                 WARN(1, "Querying an unemited fence : %p !\n", fence);
 160                 signaled = true;
 161         }
 162         if (!signaled) {
 163                 radeon_fence_poll_locked(fence->rdev);
 164                 signaled = fence->signaled;
 165         }
 166         write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
 167         return signaled;
 168 }
 169
 170 int radeon_fence_wait(struct radeon_fence *fence, bool intr)
 171 {
 172         struct radeon_device *rdev;
 173         unsigned long cur_jiffies;
 174         unsigned long timeout;
 175         bool expired = false;
 176         int r;
 177
 178         if (fence == NULL) {
 179                 WARN(1, "Querying an invalid fence : %p !\n", fence);
 180                 return 0;
 181         }
 182         rdev = fence->rdev;
 183         if (radeon_fence_signaled(fence)) {
 184                 return 0;
 185         }
 186
 187 retry:
 188         cur_jiffies = jiffies;
 189         timeout = HZ / 100;
 190         if (time_after(fence->timeout, cur_jiffies)) {
 191                 timeout = fence->timeout - cur_jiffies;
 192         }
 193
 194         if (intr) {
 195                 radeon_irq_kms_sw_irq_get(rdev);
 196                 r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
 197                                 radeon_fence_signaled(fence), timeout);
 198                 radeon_irq_kms_sw_irq_put(rdev);
 199                 if (unlikely(r < 0))
 200                         return r;
 201         } else {
 202                 radeon_irq_kms_sw_irq_get(rdev);
 203                 r = wait_event_timeout(rdev->fence_drv.queue,
 204                          radeon_fence_signaled(fence), timeout);
 205                 radeon_irq_kms_sw_irq_put(rdev);
 206         }
 207         if (unlikely(!radeon_fence_signaled(fence))) {
 208                 if (unlikely(r == 0)) {
 209                         expired = true;
 210                 }
 211                 if (unlikely(expired)) {
 212                         timeout = 1;
 213                         if (time_after(cur_jiffies, fence->timeout)) {
 214                                 timeout = cur_jiffies - fence->timeout;
 215                         }
 216                         timeout = jiffies_to_msecs(timeout);
 217                         if (timeout > 500) {
 218                                 DRM_ERROR("fence(%p:0x%08X) %lums timeout "
 219                                           "going to reset GPU\n",
 220                                           fence, fence->seq, timeout);
 221                                 radeon_gpu_reset(rdev);
 222                                 WREG32(rdev->fence_drv.scratch_reg, fence->seq);
 223                         }
 224                 }
 225                 goto retry;
 226         }
 227         if (unlikely(expired)) {
 228                 rdev->fence_drv.count_timeout++;
 229                 cur_jiffies = jiffies;
 230                 timeout = 1;
 231                 if (time_after(cur_jiffies, fence->timeout)) {
 232                         timeout = cur_jiffies - fence->timeout;
 233                 }
 234                 timeout = jiffies_to_msecs(timeout);
 235                 DRM_ERROR("fence(%p:0x%08X) %lums timeout\n",
 236                           fence, fence->seq, timeout);
 237                 DRM_ERROR("last signaled fence(0x%08X)\n",
 238                           rdev->fence_drv.last_seq);
 239         }
 240         return 0;
 241 }
 242
 243 int radeon_fence_wait_next(struct radeon_device *rdev)
 244 {
 245         unsigned long irq_flags;
 246         struct radeon_fence *fence;
 247         int r;
 248
 249         if (rdev->gpu_lockup) {
 250                 return 0;
 251         }
 252         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 253         if (list_empty(&rdev->fence_drv.emited)) {
 254                 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 255                 return 0;
 256         }
 257         fence = list_entry(rdev->fence_drv.emited.next,
 258                            struct radeon_fence, list);
 259         radeon_fence_ref(fence);
 260         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 261         r = radeon_fence_wait(fence, false);
 262         radeon_fence_unref(&fence);
 263         return r;
 264 }
 265
 266 int radeon_fence_wait_last(struct radeon_device *rdev)
 267 {
 268         unsigned long irq_flags;
 269         struct radeon_fence *fence;
 270         int r;
 271
 272         if (rdev->gpu_lockup) {
 273                 return 0;
 274         }
 275         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 276         if (list_empty(&rdev->fence_drv.emited)) {
 277                 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 278                 return 0;
 279         }
 280         fence = list_entry(rdev->fence_drv.emited.prev,
 281                            struct radeon_fence, list);
 282         radeon_fence_ref(fence);
 283         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 284         r = radeon_fence_wait(fence, false);
 285         radeon_fence_unref(&fence);
 286         return r;
 287 }
 288
 289 struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
 290 {
 291         kref_get(&fence->kref);
 292         return fence;
 293 }
 294
 295 void radeon_fence_unref(struct radeon_fence **fence)
 296 {
 297         struct radeon_fence *tmp = *fence;
 298
 299         *fence = NULL;
 300         if (tmp) {
 301                 kref_put(&tmp->kref, &radeon_fence_destroy);
 302         }
 303 }
 304
 305 void radeon_fence_process(struct radeon_device *rdev)
 306 {
 307         unsigned long irq_flags;
 308         bool wake;
 309
 310         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 311         wake = radeon_fence_poll_locked(rdev);
 312         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 313         if (wake) {
 314                 wake_up_all(&rdev->fence_drv.queue);
 315         }
 316 }
 317
 318 int radeon_fence_driver_init(struct radeon_device *rdev)
 319 {
 320         unsigned long irq_flags;
 321         int r;
 322
 323         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 324         r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
 325         if (r) {
 326                 dev_err(rdev->dev, "fence failed to get scratch register\n");
 327                 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 328                 return r;
 329         }
 330         WREG32(rdev->fence_drv.scratch_reg, 0);
 331         atomic_set(&rdev->fence_drv.seq, 0);
 332         INIT_LIST_HEAD(&rdev->fence_drv.created);
 333         INIT_LIST_HEAD(&rdev->fence_drv.emited);
 334         INIT_LIST_HEAD(&rdev->fence_drv.signaled);
 335         rdev->fence_drv.count_timeout = 0;
 336         init_waitqueue_head(&rdev->fence_drv.queue);
 337         rdev->fence_drv.initialized = true;
 338         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 339         if (radeon_debugfs_fence_init(rdev)) {
 340                 dev_err(rdev->dev, "fence debugfs file creation failed\n");
 341         }
 342         return 0;
 343 }
 344
 345 void radeon_fence_driver_fini(struct radeon_device *rdev)
 346 {
 347         unsigned long irq_flags;
 348
 349         if (!rdev->fence_drv.initialized)
 350                 return;
 351         wake_up_all(&rdev->fence_drv.queue);
 352         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 353         radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
 354         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 355         rdev->fence_drv.initialized = false;
 356 }
 357
 358
 359 /*
 360  * Fence debugfs
 361  */
 362 #if defined(CONFIG_DEBUG_FS)
 363 static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
 364 {
 365         struct drm_info_node *node = (struct drm_info_node *)m->private;
 366         struct drm_device *dev = node->minor->dev;
 367         struct radeon_device *rdev = dev->dev_private;
 368         struct radeon_fence *fence;
 369
 370         seq_printf(m, "Last signaled fence 0x%08X\n",
 371                    RREG32(rdev->fence_drv.scratch_reg));
 372         if (!list_empty(&rdev->fence_drv.emited)) {
 373                    fence = list_entry(rdev->fence_drv.emited.prev,
 374                                       struct radeon_fence, list);
 375                    seq_printf(m, "Last emited fence %p with 0x%08X\n",
 376                               fence,  fence->seq);
 377         }
 378         return 0;
 379 }
 380
 381 static struct drm_info_list radeon_debugfs_fence_list[] = {
 382         {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
 383 };
 384 #endif
 385
 386 int radeon_debugfs_fence_init(struct radeon_device *rdev)
 387 {
 388 #if defined(CONFIG_DEBUG_FS)
 389         return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
 390 #else
 391         return 0;
 392 #endif
 393 }