2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
20 struct ieee80211_hdr *hdr)
22 struct ieee80211_hw *hw = sc->pri_wiphy->hw;
25 spin_lock_bh(&sc->wiphy_lock);
26 for (i = 0; i < sc->num_sec_wiphy; i++) {
27 struct ath_wiphy *aphy = sc->sec_wiphy[i];
30 if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
36 spin_unlock_bh(&sc->wiphy_lock);
41 * Setup and link descriptors.
43 * 11N: we can no longer afford to self link the last descriptor.
44 * MAC acknowledges BA status as long as it copies frames to host
45 * buffer (or rx fifo). This can incorrectly acknowledge packets
46 * to a sender if last desc is self-linked.
48 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
50 struct ath_hw *ah = sc->sc_ah;
57 ds->ds_link = 0; /* link to null */
58 ds->ds_data = bf->bf_buf_addr;
60 /* virtual addr of the beginning of the buffer. */
63 ds->ds_vdata = skb->data;
65 /* setup rx descriptors. The rx.bufsize here tells the harware
66 * how much data it can DMA to us and that we are prepared
68 ath9k_hw_setuprxdesc(ah, ds,
72 if (sc->rx.rxlink == NULL)
73 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
75 *sc->rx.rxlink = bf->bf_daddr;
77 sc->rx.rxlink = &ds->ds_link;
81 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
83 /* XXX block beacon interrupts */
84 ath9k_hw_setantenna(sc->sc_ah, antenna);
85 sc->rx.defant = antenna;
86 sc->rx.rxotherant = 0;
90 * Extend 15-bit time stamp from rx descriptor to
91 * a full 64-bit TSF using the current h/w TSF.
93 static u64 ath_extend_tsf(struct ath_softc *sc, u32 rstamp)
97 tsf = ath9k_hw_gettsf64(sc->sc_ah);
98 if ((tsf & 0x7fff) < rstamp)
100 return (tsf & ~0x7fff) | rstamp;
103 static struct sk_buff *ath_rxbuf_alloc(struct ath_softc *sc, u32 len, gfp_t gfp_mask)
109 * Cache-line-align. This is important (for the
110 * 5210 at least) as not doing so causes bogus data
114 /* Note: the kernel can allocate a value greater than
115 * what we ask it to give us. We really only need 4 KB as that
116 * is this hardware supports and in fact we need at least 3849
117 * as that is the MAX AMSDU size this hardware supports.
118 * Unfortunately this means we may get 8 KB here from the
119 * kernel... and that is actually what is observed on some
121 skb = __dev_alloc_skb(len + sc->cachelsz - 1, gfp_mask);
123 off = ((unsigned long) skb->data) % sc->cachelsz;
125 skb_reserve(skb, sc->cachelsz - off);
127 DPRINTF(sc, ATH_DBG_FATAL,
128 "skbuff alloc of size %u failed\n", len);
136 * For Decrypt or Demic errors, we only mark packet status here and always push
137 * up the frame up to let mac80211 handle the actual error case, be it no
138 * decryption key or real decryption error. This let us keep statistics there.
140 static int ath_rx_prepare(struct sk_buff *skb, struct ath_desc *ds,
141 struct ieee80211_rx_status *rx_status, bool *decrypt_error,
142 struct ath_softc *sc)
144 struct ieee80211_hdr *hdr;
147 struct ieee80211_hw *hw;
149 hdr = (struct ieee80211_hdr *)skb->data;
150 fc = hdr->frame_control;
151 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
152 hw = ath_get_virt_hw(sc, hdr);
154 if (ds->ds_rxstat.rs_more) {
156 * Frame spans multiple descriptors; this cannot happen yet
157 * as we don't support jumbograms. If not in monitor mode,
158 * discard the frame. Enable this if you want to see
159 * error frames in Monitor mode.
161 if (sc->sc_ah->opmode != NL80211_IFTYPE_MONITOR)
163 } else if (ds->ds_rxstat.rs_status != 0) {
164 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_CRC)
165 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
166 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_PHY)
169 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_DECRYPT) {
170 *decrypt_error = true;
171 } else if (ds->ds_rxstat.rs_status & ATH9K_RXERR_MIC) {
172 if (ieee80211_is_ctl(fc))
174 * Sometimes, we get invalid
175 * MIC failures on valid control frames.
176 * Remove these mic errors.
178 ds->ds_rxstat.rs_status &= ~ATH9K_RXERR_MIC;
180 rx_status->flag |= RX_FLAG_MMIC_ERROR;
183 * Reject error frames with the exception of
184 * decryption and MIC failures. For monitor mode,
185 * we also ignore the CRC error.
187 if (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR) {
188 if (ds->ds_rxstat.rs_status &
189 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
193 if (ds->ds_rxstat.rs_status &
194 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
200 ratecode = ds->ds_rxstat.rs_rate;
202 if (ratecode & 0x80) {
204 rx_status->flag |= RX_FLAG_HT;
205 if (ds->ds_rxstat.rs_flags & ATH9K_RX_2040)
206 rx_status->flag |= RX_FLAG_40MHZ;
207 if (ds->ds_rxstat.rs_flags & ATH9K_RX_GI)
208 rx_status->flag |= RX_FLAG_SHORT_GI;
209 rx_status->rate_idx = ratecode & 0x7f;
211 int i = 0, cur_band, n_rates;
213 cur_band = hw->conf.channel->band;
214 n_rates = sc->sbands[cur_band].n_bitrates;
216 for (i = 0; i < n_rates; i++) {
217 if (sc->sbands[cur_band].bitrates[i].hw_value ==
219 rx_status->rate_idx = i;
223 if (sc->sbands[cur_band].bitrates[i].hw_value_short ==
225 rx_status->rate_idx = i;
226 rx_status->flag |= RX_FLAG_SHORTPRE;
232 rx_status->mactime = ath_extend_tsf(sc, ds->ds_rxstat.rs_tstamp);
233 rx_status->band = hw->conf.channel->band;
234 rx_status->freq = hw->conf.channel->center_freq;
235 rx_status->noise = sc->ani.noise_floor;
236 rx_status->signal = rx_status->noise + ds->ds_rxstat.rs_rssi;
237 rx_status->antenna = ds->ds_rxstat.rs_antenna;
240 * Theory for reporting quality:
242 * At a hardware RSSI of 45 you will be able to use MCS 7 reliably.
243 * At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
244 * At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
246 * MCS 7 is the highets MCS index usable by a 1-stream device.
247 * MCS 15 is the highest MCS index usable by a 2-stream device.
249 * All ath9k devices are either 1-stream or 2-stream.
251 * How many bars you see is derived from the qual reporting.
253 * A more elaborate scheme can be used here but it requires tables
254 * of SNR/throughput for each possible mode used. For the MCS table
255 * you can refer to the wireless wiki:
257 * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
260 if (conf_is_ht(&hw->conf))
261 rx_status->qual = ds->ds_rxstat.rs_rssi * 100 / 45;
263 rx_status->qual = ds->ds_rxstat.rs_rssi * 100 / 35;
265 /* rssi can be more than 45 though, anything above that
266 * should be considered at 100% */
267 if (rx_status->qual > 100)
268 rx_status->qual = 100;
270 rx_status->flag |= RX_FLAG_TSFT;
277 static void ath_opmode_init(struct ath_softc *sc)
279 struct ath_hw *ah = sc->sc_ah;
282 /* configure rx filter */
283 rfilt = ath_calcrxfilter(sc);
284 ath9k_hw_setrxfilter(ah, rfilt);
286 /* configure bssid mask */
287 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
288 ath9k_hw_setbssidmask(sc);
290 /* configure operational mode */
291 ath9k_hw_setopmode(ah);
293 /* Handle any link-level address change. */
294 ath9k_hw_setmac(ah, sc->sc_ah->macaddr);
296 /* calculate and install multicast filter */
297 mfilt[0] = mfilt[1] = ~0;
298 ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
301 int ath_rx_init(struct ath_softc *sc, int nbufs)
307 spin_lock_init(&sc->rx.rxflushlock);
308 sc->sc_flags &= ~SC_OP_RXFLUSH;
309 spin_lock_init(&sc->rx.rxbuflock);
311 sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
312 min(sc->cachelsz, (u16)64));
314 DPRINTF(sc, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
315 sc->cachelsz, sc->rx.bufsize);
317 /* Initialize rx descriptors */
319 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
322 DPRINTF(sc, ATH_DBG_FATAL,
323 "failed to allocate rx descriptors: %d\n", error);
327 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
328 skb = ath_rxbuf_alloc(sc, sc->rx.bufsize, GFP_KERNEL);
335 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
338 if (unlikely(dma_mapping_error(sc->dev,
340 dev_kfree_skb_any(skb);
342 DPRINTF(sc, ATH_DBG_FATAL,
343 "dma_mapping_error() on RX init\n");
347 bf->bf_dmacontext = bf->bf_buf_addr;
349 sc->rx.rxlink = NULL;
358 void ath_rx_cleanup(struct ath_softc *sc)
363 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
366 dma_unmap_single(sc->dev, bf->bf_buf_addr,
367 sc->rx.bufsize, DMA_FROM_DEVICE);
372 if (sc->rx.rxdma.dd_desc_len != 0)
373 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
377 * Calculate the receive filter according to the
378 * operating mode and state:
380 * o always accept unicast, broadcast, and multicast traffic
381 * o maintain current state of phy error reception (the hal
382 * may enable phy error frames for noise immunity work)
383 * o probe request frames are accepted only when operating in
384 * hostap, adhoc, or monitor modes
385 * o enable promiscuous mode according to the interface state
387 * - when operating in adhoc mode so the 802.11 layer creates
388 * node table entries for peers,
389 * - when operating in station mode for collecting rssi data when
390 * the station is otherwise quiet, or
391 * - when operating as a repeater so we see repeater-sta beacons
395 u32 ath_calcrxfilter(struct ath_softc *sc)
397 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
401 rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
402 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
403 | ATH9K_RX_FILTER_MCAST;
405 /* If not a STA, enable processing of Probe Requests */
406 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
407 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
410 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
411 * mode interface or when in monitor mode. AP mode does not need this
412 * since it receives all in-BSS frames anyway.
414 if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
415 (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
416 (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
417 rfilt |= ATH9K_RX_FILTER_PROM;
419 if (sc->rx.rxfilter & FIF_CONTROL)
420 rfilt |= ATH9K_RX_FILTER_CONTROL;
422 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
423 !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
424 rfilt |= ATH9K_RX_FILTER_MYBEACON;
426 rfilt |= ATH9K_RX_FILTER_BEACON;
428 /* If in HOSTAP mode, want to enable reception of PSPOLL frames */
429 if (sc->sc_ah->opmode == NL80211_IFTYPE_AP)
430 rfilt |= ATH9K_RX_FILTER_PSPOLL;
433 /* TODO: only needed if more than one BSSID is in use in
434 * station/adhoc mode */
435 /* TODO: for older chips, may need to add ATH9K_RX_FILTER_PROM
437 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
442 #undef RX_FILTER_PRESERVE
445 int ath_startrecv(struct ath_softc *sc)
447 struct ath_hw *ah = sc->sc_ah;
448 struct ath_buf *bf, *tbf;
450 spin_lock_bh(&sc->rx.rxbuflock);
451 if (list_empty(&sc->rx.rxbuf))
454 sc->rx.rxlink = NULL;
455 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
456 ath_rx_buf_link(sc, bf);
459 /* We could have deleted elements so the list may be empty now */
460 if (list_empty(&sc->rx.rxbuf))
463 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
464 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
468 spin_unlock_bh(&sc->rx.rxbuflock);
470 ath9k_hw_startpcureceive(ah);
475 bool ath_stoprecv(struct ath_softc *sc)
477 struct ath_hw *ah = sc->sc_ah;
480 ath9k_hw_stoppcurecv(ah);
481 ath9k_hw_setrxfilter(ah, 0);
482 stopped = ath9k_hw_stopdmarecv(ah);
483 sc->rx.rxlink = NULL;
488 void ath_flushrecv(struct ath_softc *sc)
490 spin_lock_bh(&sc->rx.rxflushlock);
491 sc->sc_flags |= SC_OP_RXFLUSH;
492 ath_rx_tasklet(sc, 1);
493 sc->sc_flags &= ~SC_OP_RXFLUSH;
494 spin_unlock_bh(&sc->rx.rxflushlock);
497 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
499 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
500 struct ieee80211_mgmt *mgmt;
501 u8 *pos, *end, id, elen;
502 struct ieee80211_tim_ie *tim;
504 mgmt = (struct ieee80211_mgmt *)skb->data;
505 pos = mgmt->u.beacon.variable;
506 end = skb->data + skb->len;
508 while (pos + 2 < end) {
511 if (pos + elen > end)
514 if (id == WLAN_EID_TIM) {
515 if (elen < sizeof(*tim))
517 tim = (struct ieee80211_tim_ie *) pos;
518 if (tim->dtim_count != 0)
520 return tim->bitmap_ctrl & 0x01;
529 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
531 struct ieee80211_mgmt *mgmt;
533 if (skb->len < 24 + 8 + 2 + 2)
536 mgmt = (struct ieee80211_mgmt *)skb->data;
537 if (memcmp(sc->curbssid, mgmt->bssid, ETH_ALEN) != 0)
538 return; /* not from our current AP */
540 sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON;
542 if (sc->sc_flags & SC_OP_BEACON_SYNC) {
543 sc->sc_flags &= ~SC_OP_BEACON_SYNC;
544 DPRINTF(sc, ATH_DBG_PS, "Reconfigure Beacon timers based on "
545 "timestamp from the AP\n");
546 ath_beacon_config(sc, NULL);
549 if (ath_beacon_dtim_pending_cab(skb)) {
551 * Remain awake waiting for buffered broadcast/multicast
552 * frames. If the last broadcast/multicast frame is not
553 * received properly, the next beacon frame will work as
554 * a backup trigger for returning into NETWORK SLEEP state,
555 * so we are waiting for it as well.
557 DPRINTF(sc, ATH_DBG_PS, "Received DTIM beacon indicating "
558 "buffered broadcast/multicast frame(s)\n");
559 sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON;
563 if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
565 * This can happen if a broadcast frame is dropped or the AP
566 * fails to send a frame indicating that all CAB frames have
569 sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
570 DPRINTF(sc, ATH_DBG_PS, "PS wait for CAB frames timed out\n");
574 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
576 struct ieee80211_hdr *hdr;
578 hdr = (struct ieee80211_hdr *)skb->data;
580 /* Process Beacon and CAB receive in PS state */
581 if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
582 ieee80211_is_beacon(hdr->frame_control))
583 ath_rx_ps_beacon(sc, skb);
584 else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
585 (ieee80211_is_data(hdr->frame_control) ||
586 ieee80211_is_action(hdr->frame_control)) &&
587 is_multicast_ether_addr(hdr->addr1) &&
588 !ieee80211_has_moredata(hdr->frame_control)) {
590 * No more broadcast/multicast frames to be received at this
593 sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
594 DPRINTF(sc, ATH_DBG_PS, "All PS CAB frames received, back to "
596 } else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
597 !is_multicast_ether_addr(hdr->addr1) &&
598 !ieee80211_has_morefrags(hdr->frame_control)) {
599 sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
600 DPRINTF(sc, ATH_DBG_PS, "Going back to sleep after having "
601 "received PS-Poll data (0x%x)\n",
602 sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
604 SC_OP_WAIT_FOR_PSPOLL_DATA |
605 SC_OP_WAIT_FOR_TX_ACK));
609 static void ath_rx_send_to_mac80211(struct ath_softc *sc, struct sk_buff *skb,
610 struct ieee80211_rx_status *rx_status)
612 struct ieee80211_hdr *hdr;
614 hdr = (struct ieee80211_hdr *)skb->data;
616 /* Send the frame to mac80211 */
617 if (is_multicast_ether_addr(hdr->addr1)) {
620 * Deliver broadcast/multicast frames to all suitable
623 /* TODO: filter based on channel configuration */
624 for (i = 0; i < sc->num_sec_wiphy; i++) {
625 struct ath_wiphy *aphy = sc->sec_wiphy[i];
626 struct sk_buff *nskb;
629 nskb = skb_copy(skb, GFP_ATOMIC);
631 memcpy(IEEE80211_SKB_RXCB(nskb), rx_status,
633 ieee80211_rx(aphy->hw, nskb);
636 memcpy(IEEE80211_SKB_RXCB(skb), rx_status, sizeof(*rx_status));
637 ieee80211_rx(sc->hw, skb);
639 /* Deliver unicast frames based on receiver address */
640 memcpy(IEEE80211_SKB_RXCB(skb), rx_status, sizeof(*rx_status));
641 ieee80211_rx(ath_get_virt_hw(sc, hdr), skb);
645 int ath_rx_tasklet(struct ath_softc *sc, int flush)
647 #define PA2DESC(_sc, _pa) \
648 ((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc + \
649 ((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
653 struct sk_buff *skb = NULL, *requeue_skb;
654 struct ieee80211_rx_status rx_status;
655 struct ath_hw *ah = sc->sc_ah;
656 struct ieee80211_hdr *hdr;
657 int hdrlen, padsize, retval;
658 bool decrypt_error = false;
662 spin_lock_bh(&sc->rx.rxbuflock);
665 /* If handling rx interrupt and flush is in progress => exit */
666 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
669 if (list_empty(&sc->rx.rxbuf)) {
670 sc->rx.rxlink = NULL;
674 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
678 * Must provide the virtual address of the current
679 * descriptor, the physical address, and the virtual
680 * address of the next descriptor in the h/w chain.
681 * This allows the HAL to look ahead to see if the
682 * hardware is done with a descriptor by checking the
683 * done bit in the following descriptor and the address
684 * of the current descriptor the DMA engine is working
685 * on. All this is necessary because of our use of
686 * a self-linked list to avoid rx overruns.
688 retval = ath9k_hw_rxprocdesc(ah, ds,
690 PA2DESC(sc, ds->ds_link),
692 if (retval == -EINPROGRESS) {
694 struct ath_desc *tds;
696 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
697 sc->rx.rxlink = NULL;
701 tbf = list_entry(bf->list.next, struct ath_buf, list);
704 * On some hardware the descriptor status words could
705 * get corrupted, including the done bit. Because of
706 * this, check if the next descriptor's done bit is
709 * If the next descriptor's done bit is set, the current
710 * descriptor has been corrupted. Force s/w to discard
711 * this descriptor and continue...
715 retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
716 PA2DESC(sc, tds->ds_link), 0);
717 if (retval == -EINPROGRESS) {
727 * Synchronize the DMA transfer with CPU before
728 * 1. accessing the frame
729 * 2. requeueing the same buffer to h/w
731 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
736 * If we're asked to flush receive queue, directly
737 * chain it back at the queue without processing it.
742 if (!ds->ds_rxstat.rs_datalen)
745 /* The status portion of the descriptor could get corrupted. */
746 if (sc->rx.bufsize < ds->ds_rxstat.rs_datalen)
749 if (!ath_rx_prepare(skb, ds, &rx_status, &decrypt_error, sc))
752 /* Ensure we always have an skb to requeue once we are done
753 * processing the current buffer's skb */
754 requeue_skb = ath_rxbuf_alloc(sc, sc->rx.bufsize, GFP_ATOMIC);
756 /* If there is no memory we ignore the current RX'd frame,
757 * tell hardware it can give us a new frame using the old
758 * skb and put it at the tail of the sc->rx.rxbuf list for
763 /* Unmap the frame */
764 dma_unmap_single(sc->dev, bf->bf_buf_addr,
768 skb_put(skb, ds->ds_rxstat.rs_datalen);
769 skb->protocol = cpu_to_be16(ETH_P_CONTROL);
771 /* see if any padding is done by the hw and remove it */
772 hdr = (struct ieee80211_hdr *)skb->data;
773 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
774 fc = hdr->frame_control;
776 /* The MAC header is padded to have 32-bit boundary if the
777 * packet payload is non-zero. The general calculation for
778 * padsize would take into account odd header lengths:
779 * padsize = (4 - hdrlen % 4) % 4; However, since only
780 * even-length headers are used, padding can only be 0 or 2
781 * bytes and we can optimize this a bit. In addition, we must
782 * not try to remove padding from short control frames that do
783 * not have payload. */
784 padsize = hdrlen & 3;
785 if (padsize && hdrlen >= 24) {
786 memmove(skb->data + padsize, skb->data, hdrlen);
787 skb_pull(skb, padsize);
790 keyix = ds->ds_rxstat.rs_keyix;
792 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
793 rx_status.flag |= RX_FLAG_DECRYPTED;
794 } else if (ieee80211_has_protected(fc)
795 && !decrypt_error && skb->len >= hdrlen + 4) {
796 keyix = skb->data[hdrlen + 3] >> 6;
798 if (test_bit(keyix, sc->keymap))
799 rx_status.flag |= RX_FLAG_DECRYPTED;
801 if (ah->sw_mgmt_crypto &&
802 (rx_status.flag & RX_FLAG_DECRYPTED) &&
803 ieee80211_is_mgmt(fc)) {
804 /* Use software decrypt for management frames. */
805 rx_status.flag &= ~RX_FLAG_DECRYPTED;
808 /* We will now give hardware our shiny new allocated skb */
809 bf->bf_mpdu = requeue_skb;
810 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
813 if (unlikely(dma_mapping_error(sc->dev,
815 dev_kfree_skb_any(requeue_skb);
817 DPRINTF(sc, ATH_DBG_FATAL,
818 "dma_mapping_error() on RX\n");
819 ath_rx_send_to_mac80211(sc, skb, &rx_status);
822 bf->bf_dmacontext = bf->bf_buf_addr;
825 * change the default rx antenna if rx diversity chooses the
826 * other antenna 3 times in a row.
828 if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
829 if (++sc->rx.rxotherant >= 3)
830 ath_setdefantenna(sc, ds->ds_rxstat.rs_antenna);
832 sc->rx.rxotherant = 0;
835 if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
837 SC_OP_WAIT_FOR_PSPOLL_DATA)))
840 ath_rx_send_to_mac80211(sc, skb, &rx_status);
843 list_move_tail(&bf->list, &sc->rx.rxbuf);
844 ath_rx_buf_link(sc, bf);
847 spin_unlock_bh(&sc->rx.rxbuflock);