arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define CR0_RESERVED_BITS                                               \
  64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  67 #define CR4_RESERVED_BITS                                               \
  68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  71                           | X86_CR4_OSXSAVE \
  72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  73
  74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  75
  76 #define KVM_MAX_MCE_BANKS 32
  77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  94                                     struct kvm_cpuid_entry2 __user *entries);
  95
  96 struct kvm_x86_ops *kvm_x86_ops;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 int ignore_msrs = 0;
 100 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 #define KVM_NR_SHARED_MSRS 16
 103
 104 struct kvm_shared_msrs_global {
 105         int nr;
 106         u32 msrs[KVM_NR_SHARED_MSRS];
 107 };
 108
 109 struct kvm_shared_msrs {
 110         struct user_return_notifier urn;
 111         bool registered;
 112         struct kvm_shared_msr_values {
 113                 u64 host;
 114                 u64 curr;
 115         } values[KVM_NR_SHARED_MSRS];
 116 };
 117
 118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 119 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 120
 121 struct kvm_stats_debugfs_item debugfs_entries[] = {
 122         { "pf_fixed", VCPU_STAT(pf_fixed) },
 123         { "pf_guest", VCPU_STAT(pf_guest) },
 124         { "tlb_flush", VCPU_STAT(tlb_flush) },
 125         { "invlpg", VCPU_STAT(invlpg) },
 126         { "exits", VCPU_STAT(exits) },
 127         { "io_exits", VCPU_STAT(io_exits) },
 128         { "mmio_exits", VCPU_STAT(mmio_exits) },
 129         { "signal_exits", VCPU_STAT(signal_exits) },
 130         { "irq_window", VCPU_STAT(irq_window_exits) },
 131         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 132         { "halt_exits", VCPU_STAT(halt_exits) },
 133         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 134         { "hypercalls", VCPU_STAT(hypercalls) },
 135         { "request_irq", VCPU_STAT(request_irq_exits) },
 136         { "irq_exits", VCPU_STAT(irq_exits) },
 137         { "host_state_reload", VCPU_STAT(host_state_reload) },
 138         { "efer_reload", VCPU_STAT(efer_reload) },
 139         { "fpu_reload", VCPU_STAT(fpu_reload) },
 140         { "insn_emulation", VCPU_STAT(insn_emulation) },
 141         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 142         { "irq_injections", VCPU_STAT(irq_injections) },
 143         { "nmi_injections", VCPU_STAT(nmi_injections) },
 144         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 145         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 146         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 147         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 148         { "mmu_flooded", VM_STAT(mmu_flooded) },
 149         { "mmu_recycled", VM_STAT(mmu_recycled) },
 150         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 151         { "mmu_unsync", VM_STAT(mmu_unsync) },
 152         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 153         { "largepages", VM_STAT(lpages) },
 154         { NULL }
 155 };
 156
 157 u64 __read_mostly host_xcr0;
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
 338 {
 339         unsigned error_code = vcpu->arch.fault.error_code;
 340
 341         ++vcpu->stat.pf_guest;
 342         vcpu->arch.cr2 = vcpu->arch.fault.address;
 343         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 344 }
 345
 346 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
 347 {
 348         if (mmu_is_nested(vcpu) && !vcpu->arch.fault.nested)
 349                 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
 350         else
 351                 vcpu->arch.mmu.inject_page_fault(vcpu);
 352
 353         vcpu->arch.fault.nested = false;
 354 }
 355
 356 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 357 {
 358         kvm_make_request(KVM_REQ_EVENT, vcpu);
 359         vcpu->arch.nmi_pending = 1;
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 362
 363 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 364 {
 365         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 368
 369 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 374
 375 /*
 376  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 377  * a #GP and return false.
 378  */
 379 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 380 {
 381         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 382                 return true;
 383         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 384         return false;
 385 }
 386 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 387
 388 /*
 389  * This function will be used to read from the physical memory of the currently
 390  * running guest. The difference to kvm_read_guest_page is that this function
 391  * can read from guest physical or from the guest's guest physical memory.
 392  */
 393 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 394                             gfn_t ngfn, void *data, int offset, int len,
 395                             u32 access)
 396 {
 397         gfn_t real_gfn;
 398         gpa_t ngpa;
 399
 400         ngpa     = gfn_to_gpa(ngfn);
 401         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 402         if (real_gfn == UNMAPPED_GVA)
 403                 return -EFAULT;
 404
 405         real_gfn = gpa_to_gfn(real_gfn);
 406
 407         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 410
 411 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 412                                void *data, int offset, int len, u32 access)
 413 {
 414         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 415                                        data, offset, len, access);
 416 }
 417
 418 /*
 419  * Load the pae pdptrs.  Return true is they are all valid.
 420  */
 421 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 422 {
 423         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 424         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 425         int i;
 426         int ret;
 427         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 428
 429         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 430                                       offset * sizeof(u64), sizeof(pdpte),
 431                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 432         if (ret < 0) {
 433                 ret = 0;
 434                 goto out;
 435         }
 436         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 437                 if (is_present_gpte(pdpte[i]) &&
 438                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 439                         ret = 0;
 440                         goto out;
 441                 }
 442         }
 443         ret = 1;
 444
 445         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 446         __set_bit(VCPU_EXREG_PDPTR,
 447                   (unsigned long *)&vcpu->arch.regs_avail);
 448         __set_bit(VCPU_EXREG_PDPTR,
 449                   (unsigned long *)&vcpu->arch.regs_dirty);
 450 out:
 451
 452         return ret;
 453 }
 454 EXPORT_SYMBOL_GPL(load_pdptrs);
 455
 456 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 457 {
 458         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 459         bool changed = true;
 460         int offset;
 461         gfn_t gfn;
 462         int r;
 463
 464         if (is_long_mode(vcpu) || !is_pae(vcpu))
 465                 return false;
 466
 467         if (!test_bit(VCPU_EXREG_PDPTR,
 468                       (unsigned long *)&vcpu->arch.regs_avail))
 469                 return true;
 470
 471         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
 472         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
 473         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 474                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 475         if (r < 0)
 476                 goto out;
 477         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 478 out:
 479
 480         return changed;
 481 }
 482
 483 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 484 {
 485         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 486         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 487                                     X86_CR0_CD | X86_CR0_NW;
 488
 489         cr0 |= X86_CR0_ET;
 490
 491 #ifdef CONFIG_X86_64
 492         if (cr0 & 0xffffffff00000000UL)
 493                 return 1;
 494 #endif
 495
 496         cr0 &= ~CR0_RESERVED_BITS;
 497
 498         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 499                 return 1;
 500
 501         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 502                 return 1;
 503
 504         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 505 #ifdef CONFIG_X86_64
 506                 if ((vcpu->arch.efer & EFER_LME)) {
 507                         int cs_db, cs_l;
 508
 509                         if (!is_pae(vcpu))
 510                                 return 1;
 511                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 512                         if (cs_l)
 513                                 return 1;
 514                 } else
 515 #endif
 516                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 517                                                  vcpu->arch.cr3))
 518                         return 1;
 519         }
 520
 521         kvm_x86_ops->set_cr0(vcpu, cr0);
 522
 523         if ((cr0 ^ old_cr0) & update_bits)
 524                 kvm_mmu_reset_context(vcpu);
 525         return 0;
 526 }
 527 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 528
 529 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 530 {
 531         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 532 }
 533 EXPORT_SYMBOL_GPL(kvm_lmsw);
 534
 535 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 536 {
 537         u64 xcr0;
 538
 539         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 540         if (index != XCR_XFEATURE_ENABLED_MASK)
 541                 return 1;
 542         xcr0 = xcr;
 543         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 544                 return 1;
 545         if (!(xcr0 & XSTATE_FP))
 546                 return 1;
 547         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 548                 return 1;
 549         if (xcr0 & ~host_xcr0)
 550                 return 1;
 551         vcpu->arch.xcr0 = xcr0;
 552         vcpu->guest_xcr0_loaded = 0;
 553         return 0;
 554 }
 555
 556 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 557 {
 558         if (__kvm_set_xcr(vcpu, index, xcr)) {
 559                 kvm_inject_gp(vcpu, 0);
 560                 return 1;
 561         }
 562         return 0;
 563 }
 564 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 565
 566 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 567 {
 568         struct kvm_cpuid_entry2 *best;
 569
 570         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 571         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 572 }
 573
 574 static void update_cpuid(struct kvm_vcpu *vcpu)
 575 {
 576         struct kvm_cpuid_entry2 *best;
 577
 578         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 579         if (!best)
 580                 return;
 581
 582         /* Update OSXSAVE bit */
 583         if (cpu_has_xsave && best->function == 0x1) {
 584                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 585                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 586                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 587         }
 588 }
 589
 590 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 591 {
 592         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 593         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 594
 595         if (cr4 & CR4_RESERVED_BITS)
 596                 return 1;
 597
 598         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 599                 return 1;
 600
 601         if (is_long_mode(vcpu)) {
 602                 if (!(cr4 & X86_CR4_PAE))
 603                         return 1;
 604         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 605                    && ((cr4 ^ old_cr4) & pdptr_bits)
 606                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
 607                 return 1;
 608
 609         if (cr4 & X86_CR4_VMXE)
 610                 return 1;
 611
 612         kvm_x86_ops->set_cr4(vcpu, cr4);
 613
 614         if ((cr4 ^ old_cr4) & pdptr_bits)
 615                 kvm_mmu_reset_context(vcpu);
 616
 617         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 618                 update_cpuid(vcpu);
 619
 620         return 0;
 621 }
 622 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 623
 624 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 625 {
 626         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 627                 kvm_mmu_sync_roots(vcpu);
 628                 kvm_mmu_flush_tlb(vcpu);
 629                 return 0;
 630         }
 631
 632         if (is_long_mode(vcpu)) {
 633                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 634                         return 1;
 635         } else {
 636                 if (is_pae(vcpu)) {
 637                         if (cr3 & CR3_PAE_RESERVED_BITS)
 638                                 return 1;
 639                         if (is_paging(vcpu) &&
 640                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 641                                 return 1;
 642                 }
 643                 /*
 644                  * We don't check reserved bits in nonpae mode, because
 645                  * this isn't enforced, and VMware depends on this.
 646                  */
 647         }
 648
 649         /*
 650          * Does the new cr3 value map to physical memory? (Note, we
 651          * catch an invalid cr3 even in real-mode, because it would
 652          * cause trouble later on when we turn on paging anyway.)
 653          *
 654          * A real CPU would silently accept an invalid cr3 and would
 655          * attempt to use it - with largely undefined (and often hard
 656          * to debug) behavior on the guest side.
 657          */
 658         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 659                 return 1;
 660         vcpu->arch.cr3 = cr3;
 661         vcpu->arch.mmu.new_cr3(vcpu);
 662         return 0;
 663 }
 664 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 665
 666 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 667 {
 668         if (cr8 & CR8_RESERVED_BITS)
 669                 return 1;
 670         if (irqchip_in_kernel(vcpu->kvm))
 671                 kvm_lapic_set_tpr(vcpu, cr8);
 672         else
 673                 vcpu->arch.cr8 = cr8;
 674         return 0;
 675 }
 676
 677 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 678 {
 679         if (__kvm_set_cr8(vcpu, cr8))
 680                 kvm_inject_gp(vcpu, 0);
 681 }
 682 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 683
 684 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 685 {
 686         if (irqchip_in_kernel(vcpu->kvm))
 687                 return kvm_lapic_get_cr8(vcpu);
 688         else
 689                 return vcpu->arch.cr8;
 690 }
 691 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 692
 693 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 694 {
 695         switch (dr) {
 696         case 0 ... 3:
 697                 vcpu->arch.db[dr] = val;
 698                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 699                         vcpu->arch.eff_db[dr] = val;
 700                 break;
 701         case 4:
 702                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 703                         return 1; /* #UD */
 704                 /* fall through */
 705         case 6:
 706                 if (val & 0xffffffff00000000ULL)
 707                         return -1; /* #GP */
 708                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 709                 break;
 710         case 5:
 711                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 712                         return 1; /* #UD */
 713                 /* fall through */
 714         default: /* 7 */
 715                 if (val & 0xffffffff00000000ULL)
 716                         return -1; /* #GP */
 717                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 718                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 719                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 720                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 721                 }
 722                 break;
 723         }
 724
 725         return 0;
 726 }
 727
 728 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 729 {
 730         int res;
 731
 732         res = __kvm_set_dr(vcpu, dr, val);
 733         if (res > 0)
 734                 kvm_queue_exception(vcpu, UD_VECTOR);
 735         else if (res < 0)
 736                 kvm_inject_gp(vcpu, 0);
 737
 738         return res;
 739 }
 740 EXPORT_SYMBOL_GPL(kvm_set_dr);
 741
 742 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 743 {
 744         switch (dr) {
 745         case 0 ... 3:
 746                 *val = vcpu->arch.db[dr];
 747                 break;
 748         case 4:
 749                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 750                         return 1;
 751                 /* fall through */
 752         case 6:
 753                 *val = vcpu->arch.dr6;
 754                 break;
 755         case 5:
 756                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 757                         return 1;
 758                 /* fall through */
 759         default: /* 7 */
 760                 *val = vcpu->arch.dr7;
 761                 break;
 762         }
 763
 764         return 0;
 765 }
 766
 767 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 768 {
 769         if (_kvm_get_dr(vcpu, dr, val)) {
 770                 kvm_queue_exception(vcpu, UD_VECTOR);
 771                 return 1;
 772         }
 773         return 0;
 774 }
 775 EXPORT_SYMBOL_GPL(kvm_get_dr);
 776
 777 /*
 778  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 779  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 780  *
 781  * This list is modified at module load time to reflect the
 782  * capabilities of the host cpu. This capabilities test skips MSRs that are
 783  * kvm-specific. Those are put in the beginning of the list.
 784  */
 785
 786 #define KVM_SAVE_MSRS_BEGIN     8
 787 static u32 msrs_to_save[] = {
 788         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 789         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 790         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 791         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 792         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 793         MSR_STAR,
 794 #ifdef CONFIG_X86_64
 795         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 796 #endif
 797         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 798 };
 799
 800 static unsigned num_msrs_to_save;
 801
 802 static u32 emulated_msrs[] = {
 803         MSR_IA32_MISC_ENABLE,
 804         MSR_IA32_MCG_STATUS,
 805         MSR_IA32_MCG_CTL,
 806 };
 807
 808 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 809 {
 810         u64 old_efer = vcpu->arch.efer;
 811
 812         if (efer & efer_reserved_bits)
 813                 return 1;
 814
 815         if (is_paging(vcpu)
 816             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 817                 return 1;
 818
 819         if (efer & EFER_FFXSR) {
 820                 struct kvm_cpuid_entry2 *feat;
 821
 822                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 823                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 824                         return 1;
 825         }
 826
 827         if (efer & EFER_SVME) {
 828                 struct kvm_cpuid_entry2 *feat;
 829
 830                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 831                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 832                         return 1;
 833         }
 834
 835         efer &= ~EFER_LMA;
 836         efer |= vcpu->arch.efer & EFER_LMA;
 837
 838         kvm_x86_ops->set_efer(vcpu, efer);
 839
 840         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 841
 842         /* Update reserved bits */
 843         if ((efer ^ old_efer) & EFER_NX)
 844                 kvm_mmu_reset_context(vcpu);
 845
 846         return 0;
 847 }
 848
 849 void kvm_enable_efer_bits(u64 mask)
 850 {
 851        efer_reserved_bits &= ~mask;
 852 }
 853 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 854
 855
 856 /*
 857  * Writes msr value into into the appropriate "register".
 858  * Returns 0 on success, non-0 otherwise.
 859  * Assumes vcpu_load() was already called.
 860  */
 861 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 862 {
 863         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 864 }
 865
 866 /*
 867  * Adapt set_msr() to msr_io()'s calling convention
 868  */
 869 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 870 {
 871         return kvm_set_msr(vcpu, index, *data);
 872 }
 873
 874 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 875 {
 876         int version;
 877         int r;
 878         struct pvclock_wall_clock wc;
 879         struct timespec boot;
 880
 881         if (!wall_clock)
 882                 return;
 883
 884         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 885         if (r)
 886                 return;
 887
 888         if (version & 1)
 889                 ++version;  /* first time write, random junk */
 890
 891         ++version;
 892
 893         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 894
 895         /*
 896          * The guest calculates current wall clock time by adding
 897          * system time (updated by kvm_guest_time_update below) to the
 898          * wall clock specified here.  guest system time equals host
 899          * system time for us, thus we must fill in host boot time here.
 900          */
 901         getboottime(&boot);
 902
 903         wc.sec = boot.tv_sec;
 904         wc.nsec = boot.tv_nsec;
 905         wc.version = version;
 906
 907         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 908
 909         version++;
 910         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 911 }
 912
 913 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 914 {
 915         uint32_t quotient, remainder;
 916
 917         /* Don't try to replace with do_div(), this one calculates
 918          * "(dividend << 32) / divisor" */
 919         __asm__ ( "divl %4"
 920                   : "=a" (quotient), "=d" (remainder)
 921                   : "0" (0), "1" (dividend), "r" (divisor) );
 922         return quotient;
 923 }
 924
 925 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 926                                s8 *pshift, u32 *pmultiplier)
 927 {
 928         uint64_t scaled64;
 929         int32_t  shift = 0;
 930         uint64_t tps64;
 931         uint32_t tps32;
 932
 933         tps64 = base_khz * 1000LL;
 934         scaled64 = scaled_khz * 1000LL;
 935         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 936                 tps64 >>= 1;
 937                 shift--;
 938         }
 939
 940         tps32 = (uint32_t)tps64;
 941         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 942                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 943                         scaled64 >>= 1;
 944                 else
 945                         tps32 <<= 1;
 946                 shift++;
 947         }
 948
 949         *pshift = shift;
 950         *pmultiplier = div_frac(scaled64, tps32);
 951
 952         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 953                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 954 }
 955
 956 static inline u64 get_kernel_ns(void)
 957 {
 958         struct timespec ts;
 959
 960         WARN_ON(preemptible());
 961         ktime_get_ts(&ts);
 962         monotonic_to_bootbased(&ts);
 963         return timespec_to_ns(&ts);
 964 }
 965
 966 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 967 unsigned long max_tsc_khz;
 968
 969 static inline int kvm_tsc_changes_freq(void)
 970 {
 971         int cpu = get_cpu();
 972         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 973                   cpufreq_quick_get(cpu) != 0;
 974         put_cpu();
 975         return ret;
 976 }
 977
 978 static inline u64 nsec_to_cycles(u64 nsec)
 979 {
 980         u64 ret;
 981
 982         WARN_ON(preemptible());
 983         if (kvm_tsc_changes_freq())
 984                 printk_once(KERN_WARNING
 985                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 986         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 987         do_div(ret, USEC_PER_SEC);
 988         return ret;
 989 }
 990
 991 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 992 {
 993         /* Compute a scale to convert nanoseconds in TSC cycles */
 994         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 995                            &kvm->arch.virtual_tsc_shift,
 996                            &kvm->arch.virtual_tsc_mult);
 997         kvm->arch.virtual_tsc_khz = this_tsc_khz;
 998 }
 999
1000 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1001 {
1002         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1003                                       vcpu->kvm->arch.virtual_tsc_mult,
1004                                       vcpu->kvm->arch.virtual_tsc_shift);
1005         tsc += vcpu->arch.last_tsc_write;
1006         return tsc;
1007 }
1008
1009 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1010 {
1011         struct kvm *kvm = vcpu->kvm;
1012         u64 offset, ns, elapsed;
1013         unsigned long flags;
1014         s64 sdiff;
1015
1016         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1017         offset = data - native_read_tsc();
1018         ns = get_kernel_ns();
1019         elapsed = ns - kvm->arch.last_tsc_nsec;
1020         sdiff = data - kvm->arch.last_tsc_write;
1021         if (sdiff < 0)
1022                 sdiff = -sdiff;
1023
1024         /*
1025          * Special case: close write to TSC within 5 seconds of
1026          * another CPU is interpreted as an attempt to synchronize
1027          * The 5 seconds is to accomodate host load / swapping as
1028          * well as any reset of TSC during the boot process.
1029          *
1030          * In that case, for a reliable TSC, we can match TSC offsets,
1031          * or make a best guest using elapsed value.
1032          */
1033         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1034             elapsed < 5ULL * NSEC_PER_SEC) {
1035                 if (!check_tsc_unstable()) {
1036                         offset = kvm->arch.last_tsc_offset;
1037                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1038                 } else {
1039                         u64 delta = nsec_to_cycles(elapsed);
1040                         offset += delta;
1041                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1042                 }
1043                 ns = kvm->arch.last_tsc_nsec;
1044         }
1045         kvm->arch.last_tsc_nsec = ns;
1046         kvm->arch.last_tsc_write = data;
1047         kvm->arch.last_tsc_offset = offset;
1048         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1049         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1050
1051         /* Reset of TSC must disable overshoot protection below */
1052         vcpu->arch.hv_clock.tsc_timestamp = 0;
1053         vcpu->arch.last_tsc_write = data;
1054         vcpu->arch.last_tsc_nsec = ns;
1055 }
1056 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1057
1058 static int kvm_guest_time_update(struct kvm_vcpu *v)
1059 {
1060         unsigned long flags;
1061         struct kvm_vcpu_arch *vcpu = &v->arch;
1062         void *shared_kaddr;
1063         unsigned long this_tsc_khz;
1064         s64 kernel_ns, max_kernel_ns;
1065         u64 tsc_timestamp;
1066
1067         /* Keep irq disabled to prevent changes to the clock */
1068         local_irq_save(flags);
1069         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1070         kernel_ns = get_kernel_ns();
1071         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1072
1073         if (unlikely(this_tsc_khz == 0)) {
1074                 local_irq_restore(flags);
1075                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1076                 return 1;
1077         }
1078
1079         /*
1080          * We may have to catch up the TSC to match elapsed wall clock
1081          * time for two reasons, even if kvmclock is used.
1082          *   1) CPU could have been running below the maximum TSC rate
1083          *   2) Broken TSC compensation resets the base at each VCPU
1084          *      entry to avoid unknown leaps of TSC even when running
1085          *      again on the same CPU.  This may cause apparent elapsed
1086          *      time to disappear, and the guest to stand still or run
1087          *      very slowly.
1088          */
1089         if (vcpu->tsc_catchup) {
1090                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1091                 if (tsc > tsc_timestamp) {
1092                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1093                         tsc_timestamp = tsc;
1094                 }
1095         }
1096
1097         local_irq_restore(flags);
1098
1099         if (!vcpu->time_page)
1100                 return 0;
1101
1102         /*
1103          * Time as measured by the TSC may go backwards when resetting the base
1104          * tsc_timestamp.  The reason for this is that the TSC resolution is
1105          * higher than the resolution of the other clock scales.  Thus, many
1106          * possible measurments of the TSC correspond to one measurement of any
1107          * other clock, and so a spread of values is possible.  This is not a
1108          * problem for the computation of the nanosecond clock; with TSC rates
1109          * around 1GHZ, there can only be a few cycles which correspond to one
1110          * nanosecond value, and any path through this code will inevitably
1111          * take longer than that.  However, with the kernel_ns value itself,
1112          * the precision may be much lower, down to HZ granularity.  If the
1113          * first sampling of TSC against kernel_ns ends in the low part of the
1114          * range, and the second in the high end of the range, we can get:
1115          *
1116          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1117          *
1118          * As the sampling errors potentially range in the thousands of cycles,
1119          * it is possible such a time value has already been observed by the
1120          * guest.  To protect against this, we must compute the system time as
1121          * observed by the guest and ensure the new system time is greater.
1122          */
1123         max_kernel_ns = 0;
1124         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1125                 max_kernel_ns = vcpu->last_guest_tsc -
1126                                 vcpu->hv_clock.tsc_timestamp;
1127                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1128                                     vcpu->hv_clock.tsc_to_system_mul,
1129                                     vcpu->hv_clock.tsc_shift);
1130                 max_kernel_ns += vcpu->last_kernel_ns;
1131         }
1132
1133         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1134                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1135                                    &vcpu->hv_clock.tsc_shift,
1136                                    &vcpu->hv_clock.tsc_to_system_mul);
1137                 vcpu->hw_tsc_khz = this_tsc_khz;
1138         }
1139
1140         if (max_kernel_ns > kernel_ns)
1141                 kernel_ns = max_kernel_ns;
1142
1143         /* With all the info we got, fill in the values */
1144         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1145         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1146         vcpu->last_kernel_ns = kernel_ns;
1147         vcpu->last_guest_tsc = tsc_timestamp;
1148         vcpu->hv_clock.flags = 0;
1149
1150         /*
1151          * The interface expects us to write an even number signaling that the
1152          * update is finished. Since the guest won't see the intermediate
1153          * state, we just increase by 2 at the end.
1154          */
1155         vcpu->hv_clock.version += 2;
1156
1157         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1158
1159         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1160                sizeof(vcpu->hv_clock));
1161
1162         kunmap_atomic(shared_kaddr, KM_USER0);
1163
1164         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1165         return 0;
1166 }
1167
1168 static bool msr_mtrr_valid(unsigned msr)
1169 {
1170         switch (msr) {
1171         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1172         case MSR_MTRRfix64K_00000:
1173         case MSR_MTRRfix16K_80000:
1174         case MSR_MTRRfix16K_A0000:
1175         case MSR_MTRRfix4K_C0000:
1176         case MSR_MTRRfix4K_C8000:
1177         case MSR_MTRRfix4K_D0000:
1178         case MSR_MTRRfix4K_D8000:
1179         case MSR_MTRRfix4K_E0000:
1180         case MSR_MTRRfix4K_E8000:
1181         case MSR_MTRRfix4K_F0000:
1182         case MSR_MTRRfix4K_F8000:
1183         case MSR_MTRRdefType:
1184         case MSR_IA32_CR_PAT:
1185                 return true;
1186         case 0x2f8:
1187                 return true;
1188         }
1189         return false;
1190 }
1191
1192 static bool valid_pat_type(unsigned t)
1193 {
1194         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1195 }
1196
1197 static bool valid_mtrr_type(unsigned t)
1198 {
1199         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1200 }
1201
1202 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1203 {
1204         int i;
1205
1206         if (!msr_mtrr_valid(msr))
1207                 return false;
1208
1209         if (msr == MSR_IA32_CR_PAT) {
1210                 for (i = 0; i < 8; i++)
1211                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1212                                 return false;
1213                 return true;
1214         } else if (msr == MSR_MTRRdefType) {
1215                 if (data & ~0xcff)
1216                         return false;
1217                 return valid_mtrr_type(data & 0xff);
1218         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1219                 for (i = 0; i < 8 ; i++)
1220                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1221                                 return false;
1222                 return true;
1223         }
1224
1225         /* variable MTRRs */
1226         return valid_mtrr_type(data & 0xff);
1227 }
1228
1229 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1230 {
1231         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1232
1233         if (!mtrr_valid(vcpu, msr, data))
1234                 return 1;
1235
1236         if (msr == MSR_MTRRdefType) {
1237                 vcpu->arch.mtrr_state.def_type = data;
1238                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1239         } else if (msr == MSR_MTRRfix64K_00000)
1240                 p[0] = data;
1241         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1242                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1243         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1244                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1245         else if (msr == MSR_IA32_CR_PAT)
1246                 vcpu->arch.pat = data;
1247         else {  /* Variable MTRRs */
1248                 int idx, is_mtrr_mask;
1249                 u64 *pt;
1250
1251                 idx = (msr - 0x200) / 2;
1252                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1253                 if (!is_mtrr_mask)
1254                         pt =
1255                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1256                 else
1257                         pt =
1258                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1259                 *pt = data;
1260         }
1261
1262         kvm_mmu_reset_context(vcpu);
1263         return 0;
1264 }
1265
1266 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1267 {
1268         u64 mcg_cap = vcpu->arch.mcg_cap;
1269         unsigned bank_num = mcg_cap & 0xff;
1270
1271         switch (msr) {
1272         case MSR_IA32_MCG_STATUS:
1273                 vcpu->arch.mcg_status = data;
1274                 break;
1275         case MSR_IA32_MCG_CTL:
1276                 if (!(mcg_cap & MCG_CTL_P))
1277                         return 1;
1278                 if (data != 0 && data != ~(u64)0)
1279                         return -1;
1280                 vcpu->arch.mcg_ctl = data;
1281                 break;
1282         default:
1283                 if (msr >= MSR_IA32_MC0_CTL &&
1284                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1285                         u32 offset = msr - MSR_IA32_MC0_CTL;
1286                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1287                          * some Linux kernels though clear bit 10 in bank 4 to
1288                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1289                          * this to avoid an uncatched #GP in the guest
1290                          */
1291                         if ((offset & 0x3) == 0 &&
1292                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1293                                 return -1;
1294                         vcpu->arch.mce_banks[offset] = data;
1295                         break;
1296                 }
1297                 return 1;
1298         }
1299         return 0;
1300 }
1301
1302 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1303 {
1304         struct kvm *kvm = vcpu->kvm;
1305         int lm = is_long_mode(vcpu);
1306         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1307                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1308         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1309                 : kvm->arch.xen_hvm_config.blob_size_32;
1310         u32 page_num = data & ~PAGE_MASK;
1311         u64 page_addr = data & PAGE_MASK;
1312         u8 *page;
1313         int r;
1314
1315         r = -E2BIG;
1316         if (page_num >= blob_size)
1317                 goto out;
1318         r = -ENOMEM;
1319         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1320         if (!page)
1321                 goto out;
1322         r = -EFAULT;
1323         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1324                 goto out_free;
1325         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1326                 goto out_free;
1327         r = 0;
1328 out_free:
1329         kfree(page);
1330 out:
1331         return r;
1332 }
1333
1334 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1335 {
1336         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1337 }
1338
1339 static bool kvm_hv_msr_partition_wide(u32 msr)
1340 {
1341         bool r = false;
1342         switch (msr) {
1343         case HV_X64_MSR_GUEST_OS_ID:
1344         case HV_X64_MSR_HYPERCALL:
1345                 r = true;
1346                 break;
1347         }
1348
1349         return r;
1350 }
1351
1352 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1353 {
1354         struct kvm *kvm = vcpu->kvm;
1355
1356         switch (msr) {
1357         case HV_X64_MSR_GUEST_OS_ID:
1358                 kvm->arch.hv_guest_os_id = data;
1359                 /* setting guest os id to zero disables hypercall page */
1360                 if (!kvm->arch.hv_guest_os_id)
1361                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1362                 break;
1363         case HV_X64_MSR_HYPERCALL: {
1364                 u64 gfn;
1365                 unsigned long addr;
1366                 u8 instructions[4];
1367
1368                 /* if guest os id is not set hypercall should remain disabled */
1369                 if (!kvm->arch.hv_guest_os_id)
1370                         break;
1371                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1372                         kvm->arch.hv_hypercall = data;
1373                         break;
1374                 }
1375                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1376                 addr = gfn_to_hva(kvm, gfn);
1377                 if (kvm_is_error_hva(addr))
1378                         return 1;
1379                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1380                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1381                 if (copy_to_user((void __user *)addr, instructions, 4))
1382                         return 1;
1383                 kvm->arch.hv_hypercall = data;
1384                 break;
1385         }
1386         default:
1387                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1388                           "data 0x%llx\n", msr, data);
1389                 return 1;
1390         }
1391         return 0;
1392 }
1393
1394 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1395 {
1396         switch (msr) {
1397         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1398                 unsigned long addr;
1399
1400                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1401                         vcpu->arch.hv_vapic = data;
1402                         break;
1403                 }
1404                 addr = gfn_to_hva(vcpu->kvm, data >>
1405                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1406                 if (kvm_is_error_hva(addr))
1407                         return 1;
1408                 if (clear_user((void __user *)addr, PAGE_SIZE))
1409                         return 1;
1410                 vcpu->arch.hv_vapic = data;
1411                 break;
1412         }
1413         case HV_X64_MSR_EOI:
1414                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1415         case HV_X64_MSR_ICR:
1416                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1417         case HV_X64_MSR_TPR:
1418                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1419         default:
1420                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1421                           "data 0x%llx\n", msr, data);
1422                 return 1;
1423         }
1424
1425         return 0;
1426 }
1427
1428 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1429 {
1430         gpa_t gpa = data & ~0x3f;
1431
1432         /* Bits 1:5 are resrved, Should be zero */
1433         if (data & 0x3e)
1434                 return 1;
1435
1436         vcpu->arch.apf.msr_val = data;
1437
1438         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1439                 kvm_clear_async_pf_completion_queue(vcpu);
1440                 kvm_async_pf_hash_reset(vcpu);
1441                 return 0;
1442         }
1443
1444         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1445                 return 1;
1446
1447         kvm_async_pf_wakeup_all(vcpu);
1448         return 0;
1449 }
1450
1451 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1452 {
1453         switch (msr) {
1454         case MSR_EFER:
1455                 return set_efer(vcpu, data);
1456         case MSR_K7_HWCR:
1457                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1458                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1459                 if (data != 0) {
1460                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1461                                 data);
1462                         return 1;
1463                 }
1464                 break;
1465         case MSR_FAM10H_MMIO_CONF_BASE:
1466                 if (data != 0) {
1467                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1468                                 "0x%llx\n", data);
1469                         return 1;
1470                 }
1471                 break;
1472         case MSR_AMD64_NB_CFG:
1473                 break;
1474         case MSR_IA32_DEBUGCTLMSR:
1475                 if (!data) {
1476                         /* We support the non-activated case already */
1477                         break;
1478                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1479                         /* Values other than LBR and BTF are vendor-specific,
1480                            thus reserved and should throw a #GP */
1481                         return 1;
1482                 }
1483                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1484                         __func__, data);
1485                 break;
1486         case MSR_IA32_UCODE_REV:
1487         case MSR_IA32_UCODE_WRITE:
1488         case MSR_VM_HSAVE_PA:
1489         case MSR_AMD64_PATCH_LOADER:
1490                 break;
1491         case 0x200 ... 0x2ff:
1492                 return set_msr_mtrr(vcpu, msr, data);
1493         case MSR_IA32_APICBASE:
1494                 kvm_set_apic_base(vcpu, data);
1495                 break;
1496         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1497                 return kvm_x2apic_msr_write(vcpu, msr, data);
1498         case MSR_IA32_MISC_ENABLE:
1499                 vcpu->arch.ia32_misc_enable_msr = data;
1500                 break;
1501         case MSR_KVM_WALL_CLOCK_NEW:
1502         case MSR_KVM_WALL_CLOCK:
1503                 vcpu->kvm->arch.wall_clock = data;
1504                 kvm_write_wall_clock(vcpu->kvm, data);
1505                 break;
1506         case MSR_KVM_SYSTEM_TIME_NEW:
1507         case MSR_KVM_SYSTEM_TIME: {
1508                 if (vcpu->arch.time_page) {
1509                         kvm_release_page_dirty(vcpu->arch.time_page);
1510                         vcpu->arch.time_page = NULL;
1511                 }
1512
1513                 vcpu->arch.time = data;
1514                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1515
1516                 /* we verify if the enable bit is set... */
1517                 if (!(data & 1))
1518                         break;
1519
1520                 /* ...but clean it before doing the actual write */
1521                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1522
1523                 vcpu->arch.time_page =
1524                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1525
1526                 if (is_error_page(vcpu->arch.time_page)) {
1527                         kvm_release_page_clean(vcpu->arch.time_page);
1528                         vcpu->arch.time_page = NULL;
1529                 }
1530                 break;
1531         }
1532         case MSR_KVM_ASYNC_PF_EN:
1533                 if (kvm_pv_enable_async_pf(vcpu, data))
1534                         return 1;
1535                 break;
1536         case MSR_IA32_MCG_CTL:
1537         case MSR_IA32_MCG_STATUS:
1538         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1539                 return set_msr_mce(vcpu, msr, data);
1540
1541         /* Performance counters are not protected by a CPUID bit,
1542          * so we should check all of them in the generic path for the sake of
1543          * cross vendor migration.
1544          * Writing a zero into the event select MSRs disables them,
1545          * which we perfectly emulate ;-). Any other value should be at least
1546          * reported, some guests depend on them.
1547          */
1548         case MSR_P6_EVNTSEL0:
1549         case MSR_P6_EVNTSEL1:
1550         case MSR_K7_EVNTSEL0:
1551         case MSR_K7_EVNTSEL1:
1552         case MSR_K7_EVNTSEL2:
1553         case MSR_K7_EVNTSEL3:
1554                 if (data != 0)
1555                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1556                                 "0x%x data 0x%llx\n", msr, data);
1557                 break;
1558         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1559          * so we ignore writes to make it happy.
1560          */
1561         case MSR_P6_PERFCTR0:
1562         case MSR_P6_PERFCTR1:
1563         case MSR_K7_PERFCTR0:
1564         case MSR_K7_PERFCTR1:
1565         case MSR_K7_PERFCTR2:
1566         case MSR_K7_PERFCTR3:
1567                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1568                         "0x%x data 0x%llx\n", msr, data);
1569                 break;
1570         case MSR_K7_CLK_CTL:
1571                 /*
1572                  * Ignore all writes to this no longer documented MSR.
1573                  * Writes are only relevant for old K7 processors,
1574                  * all pre-dating SVM, but a recommended workaround from
1575                  * AMD for these chips. It is possible to speicify the
1576                  * affected processor models on the command line, hence
1577                  * the need to ignore the workaround.
1578                  */
1579                 break;
1580         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1581                 if (kvm_hv_msr_partition_wide(msr)) {
1582                         int r;
1583                         mutex_lock(&vcpu->kvm->lock);
1584                         r = set_msr_hyperv_pw(vcpu, msr, data);
1585                         mutex_unlock(&vcpu->kvm->lock);
1586                         return r;
1587                 } else
1588                         return set_msr_hyperv(vcpu, msr, data);
1589                 break;
1590         default:
1591                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1592                         return xen_hvm_config(vcpu, data);
1593                 if (!ignore_msrs) {
1594                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1595                                 msr, data);
1596                         return 1;
1597                 } else {
1598                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1599                                 msr, data);
1600                         break;
1601                 }
1602         }
1603         return 0;
1604 }
1605 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1606
1607
1608 /*
1609  * Reads an msr value (of 'msr_index') into 'pdata'.
1610  * Returns 0 on success, non-0 otherwise.
1611  * Assumes vcpu_load() was already called.
1612  */
1613 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1614 {
1615         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1616 }
1617
1618 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1619 {
1620         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1621
1622         if (!msr_mtrr_valid(msr))
1623                 return 1;
1624
1625         if (msr == MSR_MTRRdefType)
1626                 *pdata = vcpu->arch.mtrr_state.def_type +
1627                          (vcpu->arch.mtrr_state.enabled << 10);
1628         else if (msr == MSR_MTRRfix64K_00000)
1629                 *pdata = p[0];
1630         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1631                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1632         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1633                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1634         else if (msr == MSR_IA32_CR_PAT)
1635                 *pdata = vcpu->arch.pat;
1636         else {  /* Variable MTRRs */
1637                 int idx, is_mtrr_mask;
1638                 u64 *pt;
1639
1640                 idx = (msr - 0x200) / 2;
1641                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1642                 if (!is_mtrr_mask)
1643                         pt =
1644                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1645                 else
1646                         pt =
1647                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1648                 *pdata = *pt;
1649         }
1650
1651         return 0;
1652 }
1653
1654 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1655 {
1656         u64 data;
1657         u64 mcg_cap = vcpu->arch.mcg_cap;
1658         unsigned bank_num = mcg_cap & 0xff;
1659
1660         switch (msr) {
1661         case MSR_IA32_P5_MC_ADDR:
1662         case MSR_IA32_P5_MC_TYPE:
1663                 data = 0;
1664                 break;
1665         case MSR_IA32_MCG_CAP:
1666                 data = vcpu->arch.mcg_cap;
1667                 break;
1668         case MSR_IA32_MCG_CTL:
1669                 if (!(mcg_cap & MCG_CTL_P))
1670                         return 1;
1671                 data = vcpu->arch.mcg_ctl;
1672                 break;
1673         case MSR_IA32_MCG_STATUS:
1674                 data = vcpu->arch.mcg_status;
1675                 break;
1676         default:
1677                 if (msr >= MSR_IA32_MC0_CTL &&
1678                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1679                         u32 offset = msr - MSR_IA32_MC0_CTL;
1680                         data = vcpu->arch.mce_banks[offset];
1681                         break;
1682                 }
1683                 return 1;
1684         }
1685         *pdata = data;
1686         return 0;
1687 }
1688
1689 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1690 {
1691         u64 data = 0;
1692         struct kvm *kvm = vcpu->kvm;
1693
1694         switch (msr) {
1695         case HV_X64_MSR_GUEST_OS_ID:
1696                 data = kvm->arch.hv_guest_os_id;
1697                 break;
1698         case HV_X64_MSR_HYPERCALL:
1699                 data = kvm->arch.hv_hypercall;
1700                 break;
1701         default:
1702                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1703                 return 1;
1704         }
1705
1706         *pdata = data;
1707         return 0;
1708 }
1709
1710 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1711 {
1712         u64 data = 0;
1713
1714         switch (msr) {
1715         case HV_X64_MSR_VP_INDEX: {
1716                 int r;
1717                 struct kvm_vcpu *v;
1718                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1719                         if (v == vcpu)
1720                                 data = r;
1721                 break;
1722         }
1723         case HV_X64_MSR_EOI:
1724                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1725         case HV_X64_MSR_ICR:
1726                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1727         case HV_X64_MSR_TPR:
1728                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1729         default:
1730                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1731                 return 1;
1732         }
1733         *pdata = data;
1734         return 0;
1735 }
1736
1737 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1738 {
1739         u64 data;
1740
1741         switch (msr) {
1742         case MSR_IA32_PLATFORM_ID:
1743         case MSR_IA32_UCODE_REV:
1744         case MSR_IA32_EBL_CR_POWERON:
1745         case MSR_IA32_DEBUGCTLMSR:
1746         case MSR_IA32_LASTBRANCHFROMIP:
1747         case MSR_IA32_LASTBRANCHTOIP:
1748         case MSR_IA32_LASTINTFROMIP:
1749         case MSR_IA32_LASTINTTOIP:
1750         case MSR_K8_SYSCFG:
1751         case MSR_K7_HWCR:
1752         case MSR_VM_HSAVE_PA:
1753         case MSR_P6_PERFCTR0:
1754         case MSR_P6_PERFCTR1:
1755         case MSR_P6_EVNTSEL0:
1756         case MSR_P6_EVNTSEL1:
1757         case MSR_K7_EVNTSEL0:
1758         case MSR_K7_PERFCTR0:
1759         case MSR_K8_INT_PENDING_MSG:
1760         case MSR_AMD64_NB_CFG:
1761         case MSR_FAM10H_MMIO_CONF_BASE:
1762                 data = 0;
1763                 break;
1764         case MSR_MTRRcap:
1765                 data = 0x500 | KVM_NR_VAR_MTRR;
1766                 break;
1767         case 0x200 ... 0x2ff:
1768                 return get_msr_mtrr(vcpu, msr, pdata);
1769         case 0xcd: /* fsb frequency */
1770                 data = 3;
1771                 break;
1772                 /*
1773                  * MSR_EBC_FREQUENCY_ID
1774                  * Conservative value valid for even the basic CPU models.
1775                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1776                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1777                  * and 266MHz for model 3, or 4. Set Core Clock
1778                  * Frequency to System Bus Frequency Ratio to 1 (bits
1779                  * 31:24) even though these are only valid for CPU
1780                  * models > 2, however guests may end up dividing or
1781                  * multiplying by zero otherwise.
1782                  */
1783         case MSR_EBC_FREQUENCY_ID:
1784                 data = 1 << 24;
1785                 break;
1786         case MSR_IA32_APICBASE:
1787                 data = kvm_get_apic_base(vcpu);
1788                 break;
1789         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1790                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1791                 break;
1792         case MSR_IA32_MISC_ENABLE:
1793                 data = vcpu->arch.ia32_misc_enable_msr;
1794                 break;
1795         case MSR_IA32_PERF_STATUS:
1796                 /* TSC increment by tick */
1797                 data = 1000ULL;
1798                 /* CPU multiplier */
1799                 data |= (((uint64_t)4ULL) << 40);
1800                 break;
1801         case MSR_EFER:
1802                 data = vcpu->arch.efer;
1803                 break;
1804         case MSR_KVM_WALL_CLOCK:
1805         case MSR_KVM_WALL_CLOCK_NEW:
1806                 data = vcpu->kvm->arch.wall_clock;
1807                 break;
1808         case MSR_KVM_SYSTEM_TIME:
1809         case MSR_KVM_SYSTEM_TIME_NEW:
1810                 data = vcpu->arch.time;
1811                 break;
1812         case MSR_KVM_ASYNC_PF_EN:
1813                 data = vcpu->arch.apf.msr_val;
1814                 break;
1815         case MSR_IA32_P5_MC_ADDR:
1816         case MSR_IA32_P5_MC_TYPE:
1817         case MSR_IA32_MCG_CAP:
1818         case MSR_IA32_MCG_CTL:
1819         case MSR_IA32_MCG_STATUS:
1820         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1821                 return get_msr_mce(vcpu, msr, pdata);
1822         case MSR_K7_CLK_CTL:
1823                 /*
1824                  * Provide expected ramp-up count for K7. All other
1825                  * are set to zero, indicating minimum divisors for
1826                  * every field.
1827                  *
1828                  * This prevents guest kernels on AMD host with CPU
1829                  * type 6, model 8 and higher from exploding due to
1830                  * the rdmsr failing.
1831                  */
1832                 data = 0x20000000;
1833                 break;
1834         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1835                 if (kvm_hv_msr_partition_wide(msr)) {
1836                         int r;
1837                         mutex_lock(&vcpu->kvm->lock);
1838                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1839                         mutex_unlock(&vcpu->kvm->lock);
1840                         return r;
1841                 } else
1842                         return get_msr_hyperv(vcpu, msr, pdata);
1843                 break;
1844         default:
1845                 if (!ignore_msrs) {
1846                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1847                         return 1;
1848                 } else {
1849                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1850                         data = 0;
1851                 }
1852                 break;
1853         }
1854         *pdata = data;
1855         return 0;
1856 }
1857 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1858
1859 /*
1860  * Read or write a bunch of msrs. All parameters are kernel addresses.
1861  *
1862  * @return number of msrs set successfully.
1863  */
1864 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1865                     struct kvm_msr_entry *entries,
1866                     int (*do_msr)(struct kvm_vcpu *vcpu,
1867                                   unsigned index, u64 *data))
1868 {
1869         int i, idx;
1870
1871         idx = srcu_read_lock(&vcpu->kvm->srcu);
1872         for (i = 0; i < msrs->nmsrs; ++i)
1873                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1874                         break;
1875         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1876
1877         return i;
1878 }
1879
1880 /*
1881  * Read or write a bunch of msrs. Parameters are user addresses.
1882  *
1883  * @return number of msrs set successfully.
1884  */
1885 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1886                   int (*do_msr)(struct kvm_vcpu *vcpu,
1887                                 unsigned index, u64 *data),
1888                   int writeback)
1889 {
1890         struct kvm_msrs msrs;
1891         struct kvm_msr_entry *entries;
1892         int r, n;
1893         unsigned size;
1894
1895         r = -EFAULT;
1896         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1897                 goto out;
1898
1899         r = -E2BIG;
1900         if (msrs.nmsrs >= MAX_IO_MSRS)
1901                 goto out;
1902
1903         r = -ENOMEM;
1904         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1905         entries = kmalloc(size, GFP_KERNEL);
1906         if (!entries)
1907                 goto out;
1908
1909         r = -EFAULT;
1910         if (copy_from_user(entries, user_msrs->entries, size))
1911                 goto out_free;
1912
1913         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1914         if (r < 0)
1915                 goto out_free;
1916
1917         r = -EFAULT;
1918         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1919                 goto out_free;
1920
1921         r = n;
1922
1923 out_free:
1924         kfree(entries);
1925 out:
1926         return r;
1927 }
1928
1929 int kvm_dev_ioctl_check_extension(long ext)
1930 {
1931         int r;
1932
1933         switch (ext) {
1934         case KVM_CAP_IRQCHIP:
1935         case KVM_CAP_HLT:
1936         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1937         case KVM_CAP_SET_TSS_ADDR:
1938         case KVM_CAP_EXT_CPUID:
1939         case KVM_CAP_CLOCKSOURCE:
1940         case KVM_CAP_PIT:
1941         case KVM_CAP_NOP_IO_DELAY:
1942         case KVM_CAP_MP_STATE:
1943         case KVM_CAP_SYNC_MMU:
1944         case KVM_CAP_REINJECT_CONTROL:
1945         case KVM_CAP_IRQ_INJECT_STATUS:
1946         case KVM_CAP_ASSIGN_DEV_IRQ:
1947         case KVM_CAP_IRQFD:
1948         case KVM_CAP_IOEVENTFD:
1949         case KVM_CAP_PIT2:
1950         case KVM_CAP_PIT_STATE2:
1951         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1952         case KVM_CAP_XEN_HVM:
1953         case KVM_CAP_ADJUST_CLOCK:
1954         case KVM_CAP_VCPU_EVENTS:
1955         case KVM_CAP_HYPERV:
1956         case KVM_CAP_HYPERV_VAPIC:
1957         case KVM_CAP_HYPERV_SPIN:
1958         case KVM_CAP_PCI_SEGMENT:
1959         case KVM_CAP_DEBUGREGS:
1960         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1961         case KVM_CAP_XSAVE:
1962         case KVM_CAP_ASYNC_PF:
1963                 r = 1;
1964                 break;
1965         case KVM_CAP_COALESCED_MMIO:
1966                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1967                 break;
1968         case KVM_CAP_VAPIC:
1969                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1970                 break;
1971         case KVM_CAP_NR_VCPUS:
1972                 r = KVM_MAX_VCPUS;
1973                 break;
1974         case KVM_CAP_NR_MEMSLOTS:
1975                 r = KVM_MEMORY_SLOTS;
1976                 break;
1977         case KVM_CAP_PV_MMU:    /* obsolete */
1978                 r = 0;
1979                 break;
1980         case KVM_CAP_IOMMU:
1981                 r = iommu_found();
1982                 break;
1983         case KVM_CAP_MCE:
1984                 r = KVM_MAX_MCE_BANKS;
1985                 break;
1986         case KVM_CAP_XCRS:
1987                 r = cpu_has_xsave;
1988                 break;
1989         default:
1990                 r = 0;
1991                 break;
1992         }
1993         return r;
1994
1995 }
1996
1997 long kvm_arch_dev_ioctl(struct file *filp,
1998                         unsigned int ioctl, unsigned long arg)
1999 {
2000         void __user *argp = (void __user *)arg;
2001         long r;
2002
2003         switch (ioctl) {
2004         case KVM_GET_MSR_INDEX_LIST: {
2005                 struct kvm_msr_list __user *user_msr_list = argp;
2006                 struct kvm_msr_list msr_list;
2007                 unsigned n;
2008
2009                 r = -EFAULT;
2010                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2011                         goto out;
2012                 n = msr_list.nmsrs;
2013                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2014                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2015                         goto out;
2016                 r = -E2BIG;
2017                 if (n < msr_list.nmsrs)
2018                         goto out;
2019                 r = -EFAULT;
2020                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2021                                  num_msrs_to_save * sizeof(u32)))
2022                         goto out;
2023                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2024                                  &emulated_msrs,
2025                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2026                         goto out;
2027                 r = 0;
2028                 break;
2029         }
2030         case KVM_GET_SUPPORTED_CPUID: {
2031                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2032                 struct kvm_cpuid2 cpuid;
2033
2034                 r = -EFAULT;
2035                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2036                         goto out;
2037                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2038                                                       cpuid_arg->entries);
2039                 if (r)
2040                         goto out;
2041
2042                 r = -EFAULT;
2043                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2044                         goto out;
2045                 r = 0;
2046                 break;
2047         }
2048         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2049                 u64 mce_cap;
2050
2051                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2052                 r = -EFAULT;
2053                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2054                         goto out;
2055                 r = 0;
2056                 break;
2057         }
2058         default:
2059                 r = -EINVAL;
2060         }
2061 out:
2062         return r;
2063 }
2064
2065 static void wbinvd_ipi(void *garbage)
2066 {
2067         wbinvd();
2068 }
2069
2070 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2071 {
2072         return vcpu->kvm->arch.iommu_domain &&
2073                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2074 }
2075
2076 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2077 {
2078         /* Address WBINVD may be executed by guest */
2079         if (need_emulate_wbinvd(vcpu)) {
2080                 if (kvm_x86_ops->has_wbinvd_exit())
2081                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2082                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2083                         smp_call_function_single(vcpu->cpu,
2084                                         wbinvd_ipi, NULL, 1);
2085         }
2086
2087         kvm_x86_ops->vcpu_load(vcpu, cpu);
2088         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2089                 /* Make sure TSC doesn't go backwards */
2090                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2091                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2092                 if (tsc_delta < 0)
2093                         mark_tsc_unstable("KVM discovered backwards TSC");
2094                 if (check_tsc_unstable()) {
2095                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2096                         vcpu->arch.tsc_catchup = 1;
2097                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2098                 }
2099                 if (vcpu->cpu != cpu)
2100                         kvm_migrate_timers(vcpu);
2101                 vcpu->cpu = cpu;
2102         }
2103 }
2104
2105 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2106 {
2107         kvm_x86_ops->vcpu_put(vcpu);
2108         kvm_put_guest_fpu(vcpu);
2109         vcpu->arch.last_host_tsc = native_read_tsc();
2110 }
2111
2112 static int is_efer_nx(void)
2113 {
2114         unsigned long long efer = 0;
2115
2116         rdmsrl_safe(MSR_EFER, &efer);
2117         return efer & EFER_NX;
2118 }
2119
2120 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2121 {
2122         int i;
2123         struct kvm_cpuid_entry2 *e, *entry;
2124
2125         entry = NULL;
2126         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2127                 e = &vcpu->arch.cpuid_entries[i];
2128                 if (e->function == 0x80000001) {
2129                         entry = e;
2130                         break;
2131                 }
2132         }
2133         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2134                 entry->edx &= ~(1 << 20);
2135                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2136         }
2137 }
2138
2139 /* when an old userspace process fills a new kernel module */
2140 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2141                                     struct kvm_cpuid *cpuid,
2142                                     struct kvm_cpuid_entry __user *entries)
2143 {
2144         int r, i;
2145         struct kvm_cpuid_entry *cpuid_entries;
2146
2147         r = -E2BIG;
2148         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2149                 goto out;
2150         r = -ENOMEM;
2151         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2152         if (!cpuid_entries)
2153                 goto out;
2154         r = -EFAULT;
2155         if (copy_from_user(cpuid_entries, entries,
2156                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2157                 goto out_free;
2158         for (i = 0; i < cpuid->nent; i++) {
2159                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2160                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2161                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2162                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2163                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2164                 vcpu->arch.cpuid_entries[i].index = 0;
2165                 vcpu->arch.cpuid_entries[i].flags = 0;
2166                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2167                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2168                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2169         }
2170         vcpu->arch.cpuid_nent = cpuid->nent;
2171         cpuid_fix_nx_cap(vcpu);
2172         r = 0;
2173         kvm_apic_set_version(vcpu);
2174         kvm_x86_ops->cpuid_update(vcpu);
2175         update_cpuid(vcpu);
2176
2177 out_free:
2178         vfree(cpuid_entries);
2179 out:
2180         return r;
2181 }
2182
2183 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2184                                      struct kvm_cpuid2 *cpuid,
2185                                      struct kvm_cpuid_entry2 __user *entries)
2186 {
2187         int r;
2188
2189         r = -E2BIG;
2190         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2191                 goto out;
2192         r = -EFAULT;
2193         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2194                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2195                 goto out;
2196         vcpu->arch.cpuid_nent = cpuid->nent;
2197         kvm_apic_set_version(vcpu);
2198         kvm_x86_ops->cpuid_update(vcpu);
2199         update_cpuid(vcpu);
2200         return 0;
2201
2202 out:
2203         return r;
2204 }
2205
2206 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2207                                      struct kvm_cpuid2 *cpuid,
2208                                      struct kvm_cpuid_entry2 __user *entries)
2209 {
2210         int r;
2211
2212         r = -E2BIG;
2213         if (cpuid->nent < vcpu->arch.cpuid_nent)
2214                 goto out;
2215         r = -EFAULT;
2216         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2217                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2218                 goto out;
2219         return 0;
2220
2221 out:
2222         cpuid->nent = vcpu->arch.cpuid_nent;
2223         return r;
2224 }
2225
2226 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2227                            u32 index)
2228 {
2229         entry->function = function;
2230         entry->index = index;
2231         cpuid_count(entry->function, entry->index,
2232                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2233         entry->flags = 0;
2234 }
2235
2236 #define F(x) bit(X86_FEATURE_##x)
2237
2238 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2239                          u32 index, int *nent, int maxnent)
2240 {
2241         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2242 #ifdef CONFIG_X86_64
2243         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2244                                 ? F(GBPAGES) : 0;
2245         unsigned f_lm = F(LM);
2246 #else
2247         unsigned f_gbpages = 0;
2248         unsigned f_lm = 0;
2249 #endif
2250         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2251
2252         /* cpuid 1.edx */
2253         const u32 kvm_supported_word0_x86_features =
2254                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2255                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2256                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2257                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2258                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2259                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2260                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2261                 0 /* HTT, TM, Reserved, PBE */;
2262         /* cpuid 0x80000001.edx */
2263         const u32 kvm_supported_word1_x86_features =
2264                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2265                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2266                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2267                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2268                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2269                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2270                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2271                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2272         /* cpuid 1.ecx */
2273         const u32 kvm_supported_word4_x86_features =
2274                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2275                 0 /* DS-CPL, VMX, SMX, EST */ |
2276                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2277                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2278                 0 /* Reserved, DCA */ | F(XMM4_1) |
2279                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2280                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2281                 F(F16C);
2282         /* cpuid 0x80000001.ecx */
2283         const u32 kvm_supported_word6_x86_features =
2284                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2285                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2286                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2287                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2288
2289         /* all calls to cpuid_count() should be made on the same cpu */
2290         get_cpu();
2291         do_cpuid_1_ent(entry, function, index);
2292         ++*nent;
2293
2294         switch (function) {
2295         case 0:
2296                 entry->eax = min(entry->eax, (u32)0xd);
2297                 break;
2298         case 1:
2299                 entry->edx &= kvm_supported_word0_x86_features;
2300                 entry->ecx &= kvm_supported_word4_x86_features;
2301                 /* we support x2apic emulation even if host does not support
2302                  * it since we emulate x2apic in software */
2303                 entry->ecx |= F(X2APIC);
2304                 break;
2305         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2306          * may return different values. This forces us to get_cpu() before
2307          * issuing the first command, and also to emulate this annoying behavior
2308          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2309         case 2: {
2310                 int t, times = entry->eax & 0xff;
2311
2312                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2313                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2314                 for (t = 1; t < times && *nent < maxnent; ++t) {
2315                         do_cpuid_1_ent(&entry[t], function, 0);
2316                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2317                         ++*nent;
2318                 }
2319                 break;
2320         }
2321         /* function 4 and 0xb have additional index. */
2322         case 4: {
2323                 int i, cache_type;
2324
2325                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2326                 /* read more entries until cache_type is zero */
2327                 for (i = 1; *nent < maxnent; ++i) {
2328                         cache_type = entry[i - 1].eax & 0x1f;
2329                         if (!cache_type)
2330                                 break;
2331                         do_cpuid_1_ent(&entry[i], function, i);
2332                         entry[i].flags |=
2333                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2334                         ++*nent;
2335                 }
2336                 break;
2337         }
2338         case 0xb: {
2339                 int i, level_type;
2340
2341                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2342                 /* read more entries until level_type is zero */
2343                 for (i = 1; *nent < maxnent; ++i) {
2344                         level_type = entry[i - 1].ecx & 0xff00;
2345                         if (!level_type)
2346                                 break;
2347                         do_cpuid_1_ent(&entry[i], function, i);
2348                         entry[i].flags |=
2349                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2350                         ++*nent;
2351                 }
2352                 break;
2353         }
2354         case 0xd: {
2355                 int i;
2356
2357                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2358                 for (i = 1; *nent < maxnent; ++i) {
2359                         if (entry[i - 1].eax == 0 && i != 2)
2360                                 break;
2361                         do_cpuid_1_ent(&entry[i], function, i);
2362                         entry[i].flags |=
2363                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2364                         ++*nent;
2365                 }
2366                 break;
2367         }
2368         case KVM_CPUID_SIGNATURE: {
2369                 char signature[12] = "KVMKVMKVM\0\0";
2370                 u32 *sigptr = (u32 *)signature;
2371                 entry->eax = 0;
2372                 entry->ebx = sigptr[0];
2373                 entry->ecx = sigptr[1];
2374                 entry->edx = sigptr[2];
2375                 break;
2376         }
2377         case KVM_CPUID_FEATURES:
2378                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2379                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2380                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2381                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2382                 entry->ebx = 0;
2383                 entry->ecx = 0;
2384                 entry->edx = 0;
2385                 break;
2386         case 0x80000000:
2387                 entry->eax = min(entry->eax, 0x8000001a);
2388                 break;
2389         case 0x80000001:
2390                 entry->edx &= kvm_supported_word1_x86_features;
2391                 entry->ecx &= kvm_supported_word6_x86_features;
2392                 break;
2393         }
2394
2395         kvm_x86_ops->set_supported_cpuid(function, entry);
2396
2397         put_cpu();
2398 }
2399
2400 #undef F
2401
2402 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2403                                      struct kvm_cpuid_entry2 __user *entries)
2404 {
2405         struct kvm_cpuid_entry2 *cpuid_entries;
2406         int limit, nent = 0, r = -E2BIG;
2407         u32 func;
2408
2409         if (cpuid->nent < 1)
2410                 goto out;
2411         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2412                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2413         r = -ENOMEM;
2414         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2415         if (!cpuid_entries)
2416                 goto out;
2417
2418         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2419         limit = cpuid_entries[0].eax;
2420         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2421                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2422                              &nent, cpuid->nent);
2423         r = -E2BIG;
2424         if (nent >= cpuid->nent)
2425                 goto out_free;
2426
2427         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2428         limit = cpuid_entries[nent - 1].eax;
2429         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2430                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2431                              &nent, cpuid->nent);
2432
2433
2434
2435         r = -E2BIG;
2436         if (nent >= cpuid->nent)
2437                 goto out_free;
2438
2439         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2440                      cpuid->nent);
2441
2442         r = -E2BIG;
2443         if (nent >= cpuid->nent)
2444                 goto out_free;
2445
2446         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2447                      cpuid->nent);
2448
2449         r = -E2BIG;
2450         if (nent >= cpuid->nent)
2451                 goto out_free;
2452
2453         r = -EFAULT;
2454         if (copy_to_user(entries, cpuid_entries,
2455                          nent * sizeof(struct kvm_cpuid_entry2)))
2456                 goto out_free;
2457         cpuid->nent = nent;
2458         r = 0;
2459
2460 out_free:
2461         vfree(cpuid_entries);
2462 out:
2463         return r;
2464 }
2465
2466 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2467                                     struct kvm_lapic_state *s)
2468 {
2469         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2470
2471         return 0;
2472 }
2473
2474 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2475                                     struct kvm_lapic_state *s)
2476 {
2477         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2478         kvm_apic_post_state_restore(vcpu);
2479         update_cr8_intercept(vcpu);
2480
2481         return 0;
2482 }
2483
2484 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2485                                     struct kvm_interrupt *irq)
2486 {
2487         if (irq->irq < 0 || irq->irq >= 256)
2488                 return -EINVAL;
2489         if (irqchip_in_kernel(vcpu->kvm))
2490                 return -ENXIO;
2491
2492         kvm_queue_interrupt(vcpu, irq->irq, false);
2493         kvm_make_request(KVM_REQ_EVENT, vcpu);
2494
2495         return 0;
2496 }
2497
2498 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2499 {
2500         kvm_inject_nmi(vcpu);
2501
2502         return 0;
2503 }
2504
2505 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2506                                            struct kvm_tpr_access_ctl *tac)
2507 {
2508         if (tac->flags)
2509                 return -EINVAL;
2510         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2511         return 0;
2512 }
2513
2514 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2515                                         u64 mcg_cap)
2516 {
2517         int r;
2518         unsigned bank_num = mcg_cap & 0xff, bank;
2519
2520         r = -EINVAL;
2521         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2522                 goto out;
2523         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2524                 goto out;
2525         r = 0;
2526         vcpu->arch.mcg_cap = mcg_cap;
2527         /* Init IA32_MCG_CTL to all 1s */
2528         if (mcg_cap & MCG_CTL_P)
2529                 vcpu->arch.mcg_ctl = ~(u64)0;
2530         /* Init IA32_MCi_CTL to all 1s */
2531         for (bank = 0; bank < bank_num; bank++)
2532                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2533 out:
2534         return r;
2535 }
2536
2537 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2538                                       struct kvm_x86_mce *mce)
2539 {
2540         u64 mcg_cap = vcpu->arch.mcg_cap;
2541         unsigned bank_num = mcg_cap & 0xff;
2542         u64 *banks = vcpu->arch.mce_banks;
2543
2544         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2545                 return -EINVAL;
2546         /*
2547          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2548          * reporting is disabled
2549          */
2550         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2551             vcpu->arch.mcg_ctl != ~(u64)0)
2552                 return 0;
2553         banks += 4 * mce->bank;
2554         /*
2555          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2556          * reporting is disabled for the bank
2557          */
2558         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2559                 return 0;
2560         if (mce->status & MCI_STATUS_UC) {
2561                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2562                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2563                         printk(KERN_DEBUG "kvm: set_mce: "
2564                                "injects mce exception while "
2565                                "previous one is in progress!\n");
2566                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2567                         return 0;
2568                 }
2569                 if (banks[1] & MCI_STATUS_VAL)
2570                         mce->status |= MCI_STATUS_OVER;
2571                 banks[2] = mce->addr;
2572                 banks[3] = mce->misc;
2573                 vcpu->arch.mcg_status = mce->mcg_status;
2574                 banks[1] = mce->status;
2575                 kvm_queue_exception(vcpu, MC_VECTOR);
2576         } else if (!(banks[1] & MCI_STATUS_VAL)
2577                    || !(banks[1] & MCI_STATUS_UC)) {
2578                 if (banks[1] & MCI_STATUS_VAL)
2579                         mce->status |= MCI_STATUS_OVER;
2580                 banks[2] = mce->addr;
2581                 banks[3] = mce->misc;
2582                 banks[1] = mce->status;
2583         } else
2584                 banks[1] |= MCI_STATUS_OVER;
2585         return 0;
2586 }
2587
2588 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2589                                                struct kvm_vcpu_events *events)
2590 {
2591         events->exception.injected =
2592                 vcpu->arch.exception.pending &&
2593                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2594         events->exception.nr = vcpu->arch.exception.nr;
2595         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2596         events->exception.pad = 0;
2597         events->exception.error_code = vcpu->arch.exception.error_code;
2598
2599         events->interrupt.injected =
2600                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2601         events->interrupt.nr = vcpu->arch.interrupt.nr;
2602         events->interrupt.soft = 0;
2603         events->interrupt.shadow =
2604                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2605                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2606
2607         events->nmi.injected = vcpu->arch.nmi_injected;
2608         events->nmi.pending = vcpu->arch.nmi_pending;
2609         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2610         events->nmi.pad = 0;
2611
2612         events->sipi_vector = vcpu->arch.sipi_vector;
2613
2614         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2615                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2616                          | KVM_VCPUEVENT_VALID_SHADOW);
2617         memset(&events->reserved, 0, sizeof(events->reserved));
2618 }
2619
2620 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2621                                               struct kvm_vcpu_events *events)
2622 {
2623         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2624                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2625                               | KVM_VCPUEVENT_VALID_SHADOW))
2626                 return -EINVAL;
2627
2628         vcpu->arch.exception.pending = events->exception.injected;
2629         vcpu->arch.exception.nr = events->exception.nr;
2630         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2631         vcpu->arch.exception.error_code = events->exception.error_code;
2632
2633         vcpu->arch.interrupt.pending = events->interrupt.injected;
2634         vcpu->arch.interrupt.nr = events->interrupt.nr;
2635         vcpu->arch.interrupt.soft = events->interrupt.soft;
2636         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2637                 kvm_pic_clear_isr_ack(vcpu->kvm);
2638         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2639                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2640                                                   events->interrupt.shadow);
2641
2642         vcpu->arch.nmi_injected = events->nmi.injected;
2643         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2644                 vcpu->arch.nmi_pending = events->nmi.pending;
2645         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2646
2647         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2648                 vcpu->arch.sipi_vector = events->sipi_vector;
2649
2650         kvm_make_request(KVM_REQ_EVENT, vcpu);
2651
2652         return 0;
2653 }
2654
2655 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2656                                              struct kvm_debugregs *dbgregs)
2657 {
2658         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2659         dbgregs->dr6 = vcpu->arch.dr6;
2660         dbgregs->dr7 = vcpu->arch.dr7;
2661         dbgregs->flags = 0;
2662         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2663 }
2664
2665 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2666                                             struct kvm_debugregs *dbgregs)
2667 {
2668         if (dbgregs->flags)
2669                 return -EINVAL;
2670
2671         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2672         vcpu->arch.dr6 = dbgregs->dr6;
2673         vcpu->arch.dr7 = dbgregs->dr7;
2674
2675         return 0;
2676 }
2677
2678 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2679                                          struct kvm_xsave *guest_xsave)
2680 {
2681         if (cpu_has_xsave)
2682                 memcpy(guest_xsave->region,
2683                         &vcpu->arch.guest_fpu.state->xsave,
2684                         xstate_size);
2685         else {
2686                 memcpy(guest_xsave->region,
2687                         &vcpu->arch.guest_fpu.state->fxsave,
2688                         sizeof(struct i387_fxsave_struct));
2689                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2690                         XSTATE_FPSSE;
2691         }
2692 }
2693
2694 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2695                                         struct kvm_xsave *guest_xsave)
2696 {
2697         u64 xstate_bv =
2698                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2699
2700         if (cpu_has_xsave)
2701                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2702                         guest_xsave->region, xstate_size);
2703         else {
2704                 if (xstate_bv & ~XSTATE_FPSSE)
2705                         return -EINVAL;
2706                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2707                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2708         }
2709         return 0;
2710 }
2711
2712 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2713                                         struct kvm_xcrs *guest_xcrs)
2714 {
2715         if (!cpu_has_xsave) {
2716                 guest_xcrs->nr_xcrs = 0;
2717                 return;
2718         }
2719
2720         guest_xcrs->nr_xcrs = 1;
2721         guest_xcrs->flags = 0;
2722         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2723         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2724 }
2725
2726 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2727                                        struct kvm_xcrs *guest_xcrs)
2728 {
2729         int i, r = 0;
2730
2731         if (!cpu_has_xsave)
2732                 return -EINVAL;
2733
2734         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2735                 return -EINVAL;
2736
2737         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2738                 /* Only support XCR0 currently */
2739                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2740                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2741                                 guest_xcrs->xcrs[0].value);
2742                         break;
2743                 }
2744         if (r)
2745                 r = -EINVAL;
2746         return r;
2747 }
2748
2749 long kvm_arch_vcpu_ioctl(struct file *filp,
2750                          unsigned int ioctl, unsigned long arg)
2751 {
2752         struct kvm_vcpu *vcpu = filp->private_data;
2753         void __user *argp = (void __user *)arg;
2754         int r;
2755         union {
2756                 struct kvm_lapic_state *lapic;
2757                 struct kvm_xsave *xsave;
2758                 struct kvm_xcrs *xcrs;
2759                 void *buffer;
2760         } u;
2761
2762         u.buffer = NULL;
2763         switch (ioctl) {
2764         case KVM_GET_LAPIC: {
2765                 r = -EINVAL;
2766                 if (!vcpu->arch.apic)
2767                         goto out;
2768                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2769
2770                 r = -ENOMEM;
2771                 if (!u.lapic)
2772                         goto out;
2773                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2774                 if (r)
2775                         goto out;
2776                 r = -EFAULT;
2777                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2778                         goto out;
2779                 r = 0;
2780                 break;
2781         }
2782         case KVM_SET_LAPIC: {
2783                 r = -EINVAL;
2784                 if (!vcpu->arch.apic)
2785                         goto out;
2786                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2787                 r = -ENOMEM;
2788                 if (!u.lapic)
2789                         goto out;
2790                 r = -EFAULT;
2791                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2792                         goto out;
2793                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2794                 if (r)
2795                         goto out;
2796                 r = 0;
2797                 break;
2798         }
2799         case KVM_INTERRUPT: {
2800                 struct kvm_interrupt irq;
2801
2802                 r = -EFAULT;
2803                 if (copy_from_user(&irq, argp, sizeof irq))
2804                         goto out;
2805                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2806                 if (r)
2807                         goto out;
2808                 r = 0;
2809                 break;
2810         }
2811         case KVM_NMI: {
2812                 r = kvm_vcpu_ioctl_nmi(vcpu);
2813                 if (r)
2814                         goto out;
2815                 r = 0;
2816                 break;
2817         }
2818         case KVM_SET_CPUID: {
2819                 struct kvm_cpuid __user *cpuid_arg = argp;
2820                 struct kvm_cpuid cpuid;
2821
2822                 r = -EFAULT;
2823                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2824                         goto out;
2825                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2826                 if (r)
2827                         goto out;
2828                 break;
2829         }
2830         case KVM_SET_CPUID2: {
2831                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2832                 struct kvm_cpuid2 cpuid;
2833
2834                 r = -EFAULT;
2835                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2836                         goto out;
2837                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2838                                               cpuid_arg->entries);
2839                 if (r)
2840                         goto out;
2841                 break;
2842         }
2843         case KVM_GET_CPUID2: {
2844                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2845                 struct kvm_cpuid2 cpuid;
2846
2847                 r = -EFAULT;
2848                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2849                         goto out;
2850                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2851                                               cpuid_arg->entries);
2852                 if (r)
2853                         goto out;
2854                 r = -EFAULT;
2855                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2856                         goto out;
2857                 r = 0;
2858                 break;
2859         }
2860         case KVM_GET_MSRS:
2861                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2862                 break;
2863         case KVM_SET_MSRS:
2864                 r = msr_io(vcpu, argp, do_set_msr, 0);
2865                 break;
2866         case KVM_TPR_ACCESS_REPORTING: {
2867                 struct kvm_tpr_access_ctl tac;
2868
2869                 r = -EFAULT;
2870                 if (copy_from_user(&tac, argp, sizeof tac))
2871                         goto out;
2872                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2873                 if (r)
2874                         goto out;
2875                 r = -EFAULT;
2876                 if (copy_to_user(argp, &tac, sizeof tac))
2877                         goto out;
2878                 r = 0;
2879                 break;
2880         };
2881         case KVM_SET_VAPIC_ADDR: {
2882                 struct kvm_vapic_addr va;
2883
2884                 r = -EINVAL;
2885                 if (!irqchip_in_kernel(vcpu->kvm))
2886                         goto out;
2887                 r = -EFAULT;
2888                 if (copy_from_user(&va, argp, sizeof va))
2889                         goto out;
2890                 r = 0;
2891                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2892                 break;
2893         }
2894         case KVM_X86_SETUP_MCE: {
2895                 u64 mcg_cap;
2896
2897                 r = -EFAULT;
2898                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2899                         goto out;
2900                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2901                 break;
2902         }
2903         case KVM_X86_SET_MCE: {
2904                 struct kvm_x86_mce mce;
2905
2906                 r = -EFAULT;
2907                 if (copy_from_user(&mce, argp, sizeof mce))
2908                         goto out;
2909                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2910                 break;
2911         }
2912         case KVM_GET_VCPU_EVENTS: {
2913                 struct kvm_vcpu_events events;
2914
2915                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2916
2917                 r = -EFAULT;
2918                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2919                         break;
2920                 r = 0;
2921                 break;
2922         }
2923         case KVM_SET_VCPU_EVENTS: {
2924                 struct kvm_vcpu_events events;
2925
2926                 r = -EFAULT;
2927                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2928                         break;
2929
2930                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2931                 break;
2932         }
2933         case KVM_GET_DEBUGREGS: {
2934                 struct kvm_debugregs dbgregs;
2935
2936                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2937
2938                 r = -EFAULT;
2939                 if (copy_to_user(argp, &dbgregs,
2940                                  sizeof(struct kvm_debugregs)))
2941                         break;
2942                 r = 0;
2943                 break;
2944         }
2945         case KVM_SET_DEBUGREGS: {
2946                 struct kvm_debugregs dbgregs;
2947
2948                 r = -EFAULT;
2949                 if (copy_from_user(&dbgregs, argp,
2950                                    sizeof(struct kvm_debugregs)))
2951                         break;
2952
2953                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2954                 break;
2955         }
2956         case KVM_GET_XSAVE: {
2957                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2958                 r = -ENOMEM;
2959                 if (!u.xsave)
2960                         break;
2961
2962                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2963
2964                 r = -EFAULT;
2965                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2966                         break;
2967                 r = 0;
2968                 break;
2969         }
2970         case KVM_SET_XSAVE: {
2971                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2972                 r = -ENOMEM;
2973                 if (!u.xsave)
2974                         break;
2975
2976                 r = -EFAULT;
2977                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2978                         break;
2979
2980                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2981                 break;
2982         }
2983         case KVM_GET_XCRS: {
2984                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2985                 r = -ENOMEM;
2986                 if (!u.xcrs)
2987                         break;
2988
2989                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2990
2991                 r = -EFAULT;
2992                 if (copy_to_user(argp, u.xcrs,
2993                                  sizeof(struct kvm_xcrs)))
2994                         break;
2995                 r = 0;
2996                 break;
2997         }
2998         case KVM_SET_XCRS: {
2999                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3000                 r = -ENOMEM;
3001                 if (!u.xcrs)
3002                         break;
3003
3004                 r = -EFAULT;
3005                 if (copy_from_user(u.xcrs, argp,
3006                                    sizeof(struct kvm_xcrs)))
3007                         break;
3008
3009                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3010                 break;
3011         }
3012         default:
3013                 r = -EINVAL;
3014         }
3015 out:
3016         kfree(u.buffer);
3017         return r;
3018 }
3019
3020 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3021 {
3022         int ret;
3023
3024         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3025                 return -1;
3026         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3027         return ret;
3028 }
3029
3030 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3031                                               u64 ident_addr)
3032 {
3033         kvm->arch.ept_identity_map_addr = ident_addr;
3034         return 0;
3035 }
3036
3037 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3038                                           u32 kvm_nr_mmu_pages)
3039 {
3040         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3041                 return -EINVAL;
3042
3043         mutex_lock(&kvm->slots_lock);
3044         spin_lock(&kvm->mmu_lock);
3045
3046         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3047         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3048
3049         spin_unlock(&kvm->mmu_lock);
3050         mutex_unlock(&kvm->slots_lock);
3051         return 0;
3052 }
3053
3054 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3055 {
3056         return kvm->arch.n_max_mmu_pages;
3057 }
3058
3059 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3060 {
3061         int r;
3062
3063         r = 0;
3064         switch (chip->chip_id) {
3065         case KVM_IRQCHIP_PIC_MASTER:
3066                 memcpy(&chip->chip.pic,
3067                         &pic_irqchip(kvm)->pics[0],
3068                         sizeof(struct kvm_pic_state));
3069                 break;
3070         case KVM_IRQCHIP_PIC_SLAVE:
3071                 memcpy(&chip->chip.pic,
3072                         &pic_irqchip(kvm)->pics[1],
3073                         sizeof(struct kvm_pic_state));
3074                 break;
3075         case KVM_IRQCHIP_IOAPIC:
3076                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3077                 break;
3078         default:
3079                 r = -EINVAL;
3080                 break;
3081         }
3082         return r;
3083 }
3084
3085 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3086 {
3087         int r;
3088
3089         r = 0;
3090         switch (chip->chip_id) {
3091         case KVM_IRQCHIP_PIC_MASTER:
3092                 spin_lock(&pic_irqchip(kvm)->lock);
3093                 memcpy(&pic_irqchip(kvm)->pics[0],
3094                         &chip->chip.pic,
3095                         sizeof(struct kvm_pic_state));
3096                 spin_unlock(&pic_irqchip(kvm)->lock);
3097                 break;
3098         case KVM_IRQCHIP_PIC_SLAVE:
3099                 spin_lock(&pic_irqchip(kvm)->lock);
3100                 memcpy(&pic_irqchip(kvm)->pics[1],
3101                         &chip->chip.pic,
3102                         sizeof(struct kvm_pic_state));
3103                 spin_unlock(&pic_irqchip(kvm)->lock);
3104                 break;
3105         case KVM_IRQCHIP_IOAPIC:
3106                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3107                 break;
3108         default:
3109                 r = -EINVAL;
3110                 break;
3111         }
3112         kvm_pic_update_irq(pic_irqchip(kvm));
3113         return r;
3114 }
3115
3116 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3117 {
3118         int r = 0;
3119
3120         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3121         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3122         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3123         return r;
3124 }
3125
3126 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3127 {
3128         int r = 0;
3129
3130         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3131         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3132         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3133         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3134         return r;
3135 }
3136
3137 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3138 {
3139         int r = 0;
3140
3141         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3142         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3143                 sizeof(ps->channels));
3144         ps->flags = kvm->arch.vpit->pit_state.flags;
3145         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3146         memset(&ps->reserved, 0, sizeof(ps->reserved));
3147         return r;
3148 }
3149
3150 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3151 {
3152         int r = 0, start = 0;
3153         u32 prev_legacy, cur_legacy;
3154         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3155         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3156         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3157         if (!prev_legacy && cur_legacy)
3158                 start = 1;
3159         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3160                sizeof(kvm->arch.vpit->pit_state.channels));
3161         kvm->arch.vpit->pit_state.flags = ps->flags;
3162         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3163         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3164         return r;
3165 }
3166
3167 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3168                                  struct kvm_reinject_control *control)
3169 {
3170         if (!kvm->arch.vpit)
3171                 return -ENXIO;
3172         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3173         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3174         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3175         return 0;
3176 }
3177
3178 /*
3179  * Get (and clear) the dirty memory log for a memory slot.
3180  */
3181 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3182                                       struct kvm_dirty_log *log)
3183 {
3184         int r, i;
3185         struct kvm_memory_slot *memslot;
3186         unsigned long n;
3187         unsigned long is_dirty = 0;
3188
3189         mutex_lock(&kvm->slots_lock);
3190
3191         r = -EINVAL;
3192         if (log->slot >= KVM_MEMORY_SLOTS)
3193                 goto out;
3194
3195         memslot = &kvm->memslots->memslots[log->slot];
3196         r = -ENOENT;
3197         if (!memslot->dirty_bitmap)
3198                 goto out;
3199
3200         n = kvm_dirty_bitmap_bytes(memslot);
3201
3202         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3203                 is_dirty = memslot->dirty_bitmap[i];
3204
3205         /* If nothing is dirty, don't bother messing with page tables. */
3206         if (is_dirty) {
3207                 struct kvm_memslots *slots, *old_slots;
3208                 unsigned long *dirty_bitmap;
3209
3210                 r = -ENOMEM;
3211                 dirty_bitmap = vmalloc(n);
3212                 if (!dirty_bitmap)
3213                         goto out;
3214                 memset(dirty_bitmap, 0, n);
3215
3216                 r = -ENOMEM;
3217                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3218                 if (!slots) {
3219                         vfree(dirty_bitmap);
3220                         goto out;
3221                 }
3222                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3223                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3224                 slots->generation++;
3225
3226                 old_slots = kvm->memslots;
3227                 rcu_assign_pointer(kvm->memslots, slots);
3228                 synchronize_srcu_expedited(&kvm->srcu);
3229                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3230                 kfree(old_slots);
3231
3232                 spin_lock(&kvm->mmu_lock);
3233                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3234                 spin_unlock(&kvm->mmu_lock);
3235
3236                 r = -EFAULT;
3237                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3238                         vfree(dirty_bitmap);
3239                         goto out;
3240                 }
3241                 vfree(dirty_bitmap);
3242         } else {
3243                 r = -EFAULT;
3244                 if (clear_user(log->dirty_bitmap, n))
3245                         goto out;
3246         }
3247
3248         r = 0;
3249 out:
3250         mutex_unlock(&kvm->slots_lock);
3251         return r;
3252 }
3253
3254 long kvm_arch_vm_ioctl(struct file *filp,
3255                        unsigned int ioctl, unsigned long arg)
3256 {
3257         struct kvm *kvm = filp->private_data;
3258         void __user *argp = (void __user *)arg;
3259         int r = -ENOTTY;
3260         /*
3261          * This union makes it completely explicit to gcc-3.x
3262          * that these two variables' stack usage should be
3263          * combined, not added together.
3264          */
3265         union {
3266                 struct kvm_pit_state ps;
3267                 struct kvm_pit_state2 ps2;
3268                 struct kvm_pit_config pit_config;
3269         } u;
3270
3271         switch (ioctl) {
3272         case KVM_SET_TSS_ADDR:
3273                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3274                 if (r < 0)
3275                         goto out;
3276                 break;
3277         case KVM_SET_IDENTITY_MAP_ADDR: {
3278                 u64 ident_addr;
3279
3280                 r = -EFAULT;
3281                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3282                         goto out;
3283                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3284                 if (r < 0)
3285                         goto out;
3286                 break;
3287         }
3288         case KVM_SET_NR_MMU_PAGES:
3289                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3290                 if (r)
3291                         goto out;
3292                 break;
3293         case KVM_GET_NR_MMU_PAGES:
3294                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3295                 break;
3296         case KVM_CREATE_IRQCHIP: {
3297                 struct kvm_pic *vpic;
3298
3299                 mutex_lock(&kvm->lock);
3300                 r = -EEXIST;
3301                 if (kvm->arch.vpic)
3302                         goto create_irqchip_unlock;
3303                 r = -ENOMEM;
3304                 vpic = kvm_create_pic(kvm);
3305                 if (vpic) {
3306                         r = kvm_ioapic_init(kvm);
3307                         if (r) {
3308                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3309                                                           &vpic->dev);
3310                                 kfree(vpic);
3311                                 goto create_irqchip_unlock;
3312                         }
3313                 } else
3314                         goto create_irqchip_unlock;
3315                 smp_wmb();
3316                 kvm->arch.vpic = vpic;
3317                 smp_wmb();
3318                 r = kvm_setup_default_irq_routing(kvm);
3319                 if (r) {
3320                         mutex_lock(&kvm->irq_lock);
3321                         kvm_ioapic_destroy(kvm);
3322                         kvm_destroy_pic(kvm);
3323                         mutex_unlock(&kvm->irq_lock);
3324                 }
3325         create_irqchip_unlock:
3326                 mutex_unlock(&kvm->lock);
3327                 break;
3328         }
3329         case KVM_CREATE_PIT:
3330                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3331                 goto create_pit;
3332         case KVM_CREATE_PIT2:
3333                 r = -EFAULT;
3334                 if (copy_from_user(&u.pit_config, argp,
3335                                    sizeof(struct kvm_pit_config)))
3336                         goto out;
3337         create_pit:
3338                 mutex_lock(&kvm->slots_lock);
3339                 r = -EEXIST;
3340                 if (kvm->arch.vpit)
3341                         goto create_pit_unlock;
3342                 r = -ENOMEM;
3343                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3344                 if (kvm->arch.vpit)
3345                         r = 0;
3346         create_pit_unlock:
3347                 mutex_unlock(&kvm->slots_lock);
3348                 break;
3349         case KVM_IRQ_LINE_STATUS:
3350         case KVM_IRQ_LINE: {
3351                 struct kvm_irq_level irq_event;
3352
3353                 r = -EFAULT;
3354                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3355                         goto out;
3356                 r = -ENXIO;
3357                 if (irqchip_in_kernel(kvm)) {
3358                         __s32 status;
3359                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3360                                         irq_event.irq, irq_event.level);
3361                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3362                                 r = -EFAULT;
3363                                 irq_event.status = status;
3364                                 if (copy_to_user(argp, &irq_event,
3365                                                         sizeof irq_event))
3366                                         goto out;
3367                         }
3368                         r = 0;
3369                 }
3370                 break;
3371         }
3372         case KVM_GET_IRQCHIP: {
3373                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3374                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3375
3376                 r = -ENOMEM;
3377                 if (!chip)
3378                         goto out;
3379                 r = -EFAULT;
3380                 if (copy_from_user(chip, argp, sizeof *chip))
3381                         goto get_irqchip_out;
3382                 r = -ENXIO;
3383                 if (!irqchip_in_kernel(kvm))
3384                         goto get_irqchip_out;
3385                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3386                 if (r)
3387                         goto get_irqchip_out;
3388                 r = -EFAULT;
3389                 if (copy_to_user(argp, chip, sizeof *chip))
3390                         goto get_irqchip_out;
3391                 r = 0;
3392         get_irqchip_out:
3393                 kfree(chip);
3394                 if (r)
3395                         goto out;
3396                 break;
3397         }
3398         case KVM_SET_IRQCHIP: {
3399                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3400                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3401
3402                 r = -ENOMEM;
3403                 if (!chip)
3404                         goto out;
3405                 r = -EFAULT;
3406                 if (copy_from_user(chip, argp, sizeof *chip))
3407                         goto set_irqchip_out;
3408                 r = -ENXIO;
3409                 if (!irqchip_in_kernel(kvm))
3410                         goto set_irqchip_out;
3411                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3412                 if (r)
3413                         goto set_irqchip_out;
3414                 r = 0;
3415         set_irqchip_out:
3416                 kfree(chip);
3417                 if (r)
3418                         goto out;
3419                 break;
3420         }
3421         case KVM_GET_PIT: {
3422                 r = -EFAULT;
3423                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3424                         goto out;
3425                 r = -ENXIO;
3426                 if (!kvm->arch.vpit)
3427                         goto out;
3428                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3429                 if (r)
3430                         goto out;
3431                 r = -EFAULT;
3432                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3433                         goto out;
3434                 r = 0;
3435                 break;
3436         }
3437         case KVM_SET_PIT: {
3438                 r = -EFAULT;
3439                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3440                         goto out;
3441                 r = -ENXIO;
3442                 if (!kvm->arch.vpit)
3443                         goto out;
3444                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3445                 if (r)
3446                         goto out;
3447                 r = 0;
3448                 break;
3449         }
3450         case KVM_GET_PIT2: {
3451                 r = -ENXIO;
3452                 if (!kvm->arch.vpit)
3453                         goto out;
3454                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3455                 if (r)
3456                         goto out;
3457                 r = -EFAULT;
3458                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3459                         goto out;
3460                 r = 0;
3461                 break;
3462         }
3463         case KVM_SET_PIT2: {
3464                 r = -EFAULT;
3465                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3466                         goto out;
3467                 r = -ENXIO;
3468                 if (!kvm->arch.vpit)
3469                         goto out;
3470                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3471                 if (r)
3472                         goto out;
3473                 r = 0;
3474                 break;
3475         }
3476         case KVM_REINJECT_CONTROL: {
3477                 struct kvm_reinject_control control;
3478                 r =  -EFAULT;
3479                 if (copy_from_user(&control, argp, sizeof(control)))
3480                         goto out;
3481                 r = kvm_vm_ioctl_reinject(kvm, &control);
3482                 if (r)
3483                         goto out;
3484                 r = 0;
3485                 break;
3486         }
3487         case KVM_XEN_HVM_CONFIG: {
3488                 r = -EFAULT;
3489                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3490                                    sizeof(struct kvm_xen_hvm_config)))
3491                         goto out;
3492                 r = -EINVAL;
3493                 if (kvm->arch.xen_hvm_config.flags)
3494                         goto out;
3495                 r = 0;
3496                 break;
3497         }
3498         case KVM_SET_CLOCK: {
3499                 struct kvm_clock_data user_ns;
3500                 u64 now_ns;
3501                 s64 delta;
3502
3503                 r = -EFAULT;
3504                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3505                         goto out;
3506
3507                 r = -EINVAL;
3508                 if (user_ns.flags)
3509                         goto out;
3510
3511                 r = 0;
3512                 local_irq_disable();
3513                 now_ns = get_kernel_ns();
3514                 delta = user_ns.clock - now_ns;
3515                 local_irq_enable();
3516                 kvm->arch.kvmclock_offset = delta;
3517                 break;
3518         }
3519         case KVM_GET_CLOCK: {
3520                 struct kvm_clock_data user_ns;
3521                 u64 now_ns;
3522
3523                 local_irq_disable();
3524                 now_ns = get_kernel_ns();
3525                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3526                 local_irq_enable();
3527                 user_ns.flags = 0;
3528                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3529
3530                 r = -EFAULT;
3531                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3532                         goto out;
3533                 r = 0;
3534                 break;
3535         }
3536
3537         default:
3538                 ;
3539         }
3540 out:
3541         return r;
3542 }
3543
3544 static void kvm_init_msr_list(void)
3545 {
3546         u32 dummy[2];
3547         unsigned i, j;
3548
3549         /* skip the first msrs in the list. KVM-specific */
3550         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3551                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3552                         continue;
3553                 if (j < i)
3554                         msrs_to_save[j] = msrs_to_save[i];
3555                 j++;
3556         }
3557         num_msrs_to_save = j;
3558 }
3559
3560 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3561                            const void *v)
3562 {
3563         if (vcpu->arch.apic &&
3564             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3565                 return 0;
3566
3567         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3568 }
3569
3570 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3571 {
3572         if (vcpu->arch.apic &&
3573             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3574                 return 0;
3575
3576         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3577 }
3578
3579 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3580                         struct kvm_segment *var, int seg)
3581 {
3582         kvm_x86_ops->set_segment(vcpu, var, seg);
3583 }
3584
3585 void kvm_get_segment(struct kvm_vcpu *vcpu,
3586                      struct kvm_segment *var, int seg)
3587 {
3588         kvm_x86_ops->get_segment(vcpu, var, seg);
3589 }
3590
3591 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3592 {
3593         return gpa;
3594 }
3595
3596 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3597 {
3598         gpa_t t_gpa;
3599         u32 error;
3600
3601         BUG_ON(!mmu_is_nested(vcpu));
3602
3603         /* NPT walks are always user-walks */
3604         access |= PFERR_USER_MASK;
3605         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &error);
3606         if (t_gpa == UNMAPPED_GVA)
3607                 vcpu->arch.fault.nested = true;
3608
3609         return t_gpa;
3610 }
3611
3612 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3613 {
3614         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3615         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3616 }
3617
3618  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3619 {
3620         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3621         access |= PFERR_FETCH_MASK;
3622         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3623 }
3624
3625 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3626 {
3627         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3628         access |= PFERR_WRITE_MASK;
3629         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3630 }
3631
3632 /* uses this to access any guest's mapped memory without checking CPL */
3633 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3634 {
3635         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3636 }
3637
3638 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3639                                       struct kvm_vcpu *vcpu, u32 access,
3640                                       u32 *error)
3641 {
3642         void *data = val;
3643         int r = X86EMUL_CONTINUE;
3644
3645         while (bytes) {
3646                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3647                                                             error);
3648                 unsigned offset = addr & (PAGE_SIZE-1);
3649                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3650                 int ret;
3651
3652                 if (gpa == UNMAPPED_GVA) {
3653                         r = X86EMUL_PROPAGATE_FAULT;
3654                         goto out;
3655                 }
3656                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3657                 if (ret < 0) {
3658                         r = X86EMUL_IO_NEEDED;
3659                         goto out;
3660                 }
3661
3662                 bytes -= toread;
3663                 data += toread;
3664                 addr += toread;
3665         }
3666 out:
3667         return r;
3668 }
3669
3670 /* used for instruction fetching */
3671 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3672                                 struct kvm_vcpu *vcpu, u32 *error)
3673 {
3674         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3675         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3676                                           access | PFERR_FETCH_MASK, error);
3677 }
3678
3679 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3680                                struct kvm_vcpu *vcpu, u32 *error)
3681 {
3682         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3683         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3684                                           error);
3685 }
3686
3687 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3688                                struct kvm_vcpu *vcpu, u32 *error)
3689 {
3690         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3691 }
3692
3693 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3694                                        unsigned int bytes,
3695                                        struct kvm_vcpu *vcpu,
3696                                        u32 *error)
3697 {
3698         void *data = val;
3699         int r = X86EMUL_CONTINUE;
3700
3701         while (bytes) {
3702                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3703                                                              PFERR_WRITE_MASK,
3704                                                              error);
3705                 unsigned offset = addr & (PAGE_SIZE-1);
3706                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3707                 int ret;
3708
3709                 if (gpa == UNMAPPED_GVA) {
3710                         r = X86EMUL_PROPAGATE_FAULT;
3711                         goto out;
3712                 }
3713                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3714                 if (ret < 0) {
3715                         r = X86EMUL_IO_NEEDED;
3716                         goto out;
3717                 }
3718
3719                 bytes -= towrite;
3720                 data += towrite;
3721                 addr += towrite;
3722         }
3723 out:
3724         return r;
3725 }
3726
3727 static int emulator_read_emulated(unsigned long addr,
3728                                   void *val,
3729                                   unsigned int bytes,
3730                                   unsigned int *error_code,
3731                                   struct kvm_vcpu *vcpu)
3732 {
3733         gpa_t                 gpa;
3734
3735         if (vcpu->mmio_read_completed) {
3736                 memcpy(val, vcpu->mmio_data, bytes);
3737                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3738                                vcpu->mmio_phys_addr, *(u64 *)val);
3739                 vcpu->mmio_read_completed = 0;
3740                 return X86EMUL_CONTINUE;
3741         }
3742
3743         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3744
3745         if (gpa == UNMAPPED_GVA)
3746                 return X86EMUL_PROPAGATE_FAULT;
3747
3748         /* For APIC access vmexit */
3749         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3750                 goto mmio;
3751
3752         if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3753                                 == X86EMUL_CONTINUE)
3754                 return X86EMUL_CONTINUE;
3755
3756 mmio:
3757         /*
3758          * Is this MMIO handled locally?
3759          */
3760         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3761                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3762                 return X86EMUL_CONTINUE;
3763         }
3764
3765         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3766
3767         vcpu->mmio_needed = 1;
3768         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3769         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3770         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3771         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3772
3773         return X86EMUL_IO_NEEDED;
3774 }
3775
3776 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3777                           const void *val, int bytes)
3778 {
3779         int ret;
3780
3781         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3782         if (ret < 0)
3783                 return 0;
3784         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3785         return 1;
3786 }
3787
3788 static int emulator_write_emulated_onepage(unsigned long addr,
3789                                            const void *val,
3790                                            unsigned int bytes,
3791                                            unsigned int *error_code,
3792                                            struct kvm_vcpu *vcpu)
3793 {
3794         gpa_t                 gpa;
3795
3796         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3797
3798         if (gpa == UNMAPPED_GVA)
3799                 return X86EMUL_PROPAGATE_FAULT;
3800
3801         /* For APIC access vmexit */
3802         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3803                 goto mmio;
3804
3805         if (emulator_write_phys(vcpu, gpa, val, bytes))
3806                 return X86EMUL_CONTINUE;
3807
3808 mmio:
3809         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3810         /*
3811          * Is this MMIO handled locally?
3812          */
3813         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3814                 return X86EMUL_CONTINUE;
3815
3816         vcpu->mmio_needed = 1;
3817         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3818         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3819         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3820         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3821         memcpy(vcpu->run->mmio.data, val, bytes);
3822
3823         return X86EMUL_CONTINUE;
3824 }
3825
3826 int emulator_write_emulated(unsigned long addr,
3827                             const void *val,
3828                             unsigned int bytes,
3829                             unsigned int *error_code,
3830                             struct kvm_vcpu *vcpu)
3831 {
3832         /* Crossing a page boundary? */
3833         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3834                 int rc, now;
3835
3836                 now = -addr & ~PAGE_MASK;
3837                 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3838                                                      vcpu);
3839                 if (rc != X86EMUL_CONTINUE)
3840                         return rc;
3841                 addr += now;
3842                 val += now;
3843                 bytes -= now;
3844         }
3845         return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3846                                                vcpu);
3847 }
3848
3849 #define CMPXCHG_TYPE(t, ptr, old, new) \
3850         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3851
3852 #ifdef CONFIG_X86_64
3853 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3854 #else
3855 #  define CMPXCHG64(ptr, old, new) \
3856         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3857 #endif
3858
3859 static int emulator_cmpxchg_emulated(unsigned long addr,
3860                                      const void *old,
3861                                      const void *new,
3862                                      unsigned int bytes,
3863                                      unsigned int *error_code,
3864                                      struct kvm_vcpu *vcpu)
3865 {
3866         gpa_t gpa;
3867         struct page *page;
3868         char *kaddr;
3869         bool exchanged;
3870
3871         /* guests cmpxchg8b have to be emulated atomically */
3872         if (bytes > 8 || (bytes & (bytes - 1)))
3873                 goto emul_write;
3874
3875         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3876
3877         if (gpa == UNMAPPED_GVA ||
3878             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3879                 goto emul_write;
3880
3881         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3882                 goto emul_write;
3883
3884         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3885         if (is_error_page(page)) {
3886                 kvm_release_page_clean(page);
3887                 goto emul_write;
3888         }
3889
3890         kaddr = kmap_atomic(page, KM_USER0);
3891         kaddr += offset_in_page(gpa);
3892         switch (bytes) {
3893         case 1:
3894                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3895                 break;
3896         case 2:
3897                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3898                 break;
3899         case 4:
3900                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3901                 break;
3902         case 8:
3903                 exchanged = CMPXCHG64(kaddr, old, new);
3904                 break;
3905         default:
3906                 BUG();
3907         }
3908         kunmap_atomic(kaddr, KM_USER0);
3909         kvm_release_page_dirty(page);
3910
3911         if (!exchanged)
3912                 return X86EMUL_CMPXCHG_FAILED;
3913
3914         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3915
3916         return X86EMUL_CONTINUE;
3917
3918 emul_write:
3919         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3920
3921         return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3922 }
3923
3924 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3925 {
3926         /* TODO: String I/O for in kernel device */
3927         int r;
3928
3929         if (vcpu->arch.pio.in)
3930                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3931                                     vcpu->arch.pio.size, pd);
3932         else
3933                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3934                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3935                                      pd);
3936         return r;
3937 }
3938
3939
3940 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3941                              unsigned int count, struct kvm_vcpu *vcpu)
3942 {
3943         if (vcpu->arch.pio.count)
3944                 goto data_avail;
3945
3946         trace_kvm_pio(0, port, size, 1);
3947
3948         vcpu->arch.pio.port = port;
3949         vcpu->arch.pio.in = 1;
3950         vcpu->arch.pio.count  = count;
3951         vcpu->arch.pio.size = size;
3952
3953         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3954         data_avail:
3955                 memcpy(val, vcpu->arch.pio_data, size * count);
3956                 vcpu->arch.pio.count = 0;
3957                 return 1;
3958         }
3959
3960         vcpu->run->exit_reason = KVM_EXIT_IO;
3961         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3962         vcpu->run->io.size = size;
3963         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3964         vcpu->run->io.count = count;
3965         vcpu->run->io.port = port;
3966
3967         return 0;
3968 }
3969
3970 static int emulator_pio_out_emulated(int size, unsigned short port,
3971                               const void *val, unsigned int count,
3972                               struct kvm_vcpu *vcpu)
3973 {
3974         trace_kvm_pio(1, port, size, 1);
3975
3976         vcpu->arch.pio.port = port;
3977         vcpu->arch.pio.in = 0;
3978         vcpu->arch.pio.count = count;
3979         vcpu->arch.pio.size = size;
3980
3981         memcpy(vcpu->arch.pio_data, val, size * count);
3982
3983         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3984                 vcpu->arch.pio.count = 0;
3985                 return 1;
3986         }
3987
3988         vcpu->run->exit_reason = KVM_EXIT_IO;
3989         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3990         vcpu->run->io.size = size;
3991         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3992         vcpu->run->io.count = count;
3993         vcpu->run->io.port = port;
3994
3995         return 0;
3996 }
3997
3998 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3999 {
4000         return kvm_x86_ops->get_segment_base(vcpu, seg);
4001 }
4002
4003 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4004 {
4005         kvm_mmu_invlpg(vcpu, address);
4006         return X86EMUL_CONTINUE;
4007 }
4008
4009 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4010 {
4011         if (!need_emulate_wbinvd(vcpu))
4012                 return X86EMUL_CONTINUE;
4013
4014         if (kvm_x86_ops->has_wbinvd_exit()) {
4015                 preempt_disable();
4016                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4017                                 wbinvd_ipi, NULL, 1);
4018                 preempt_enable();
4019                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4020         }
4021         wbinvd();
4022         return X86EMUL_CONTINUE;
4023 }
4024 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4025
4026 int emulate_clts(struct kvm_vcpu *vcpu)
4027 {
4028         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4029         kvm_x86_ops->fpu_activate(vcpu);
4030         return X86EMUL_CONTINUE;
4031 }
4032
4033 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4034 {
4035         return _kvm_get_dr(vcpu, dr, dest);
4036 }
4037
4038 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4039 {
4040
4041         return __kvm_set_dr(vcpu, dr, value);
4042 }
4043
4044 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4045 {
4046         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4047 }
4048
4049 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4050 {
4051         unsigned long value;
4052
4053         switch (cr) {
4054         case 0:
4055                 value = kvm_read_cr0(vcpu);
4056                 break;
4057         case 2:
4058                 value = vcpu->arch.cr2;
4059                 break;
4060         case 3:
4061                 value = vcpu->arch.cr3;
4062                 break;
4063         case 4:
4064                 value = kvm_read_cr4(vcpu);
4065                 break;
4066         case 8:
4067                 value = kvm_get_cr8(vcpu);
4068                 break;
4069         default:
4070                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4071                 return 0;
4072         }
4073
4074         return value;
4075 }
4076
4077 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4078 {
4079         int res = 0;
4080
4081         switch (cr) {
4082         case 0:
4083                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4084                 break;
4085         case 2:
4086                 vcpu->arch.cr2 = val;
4087                 break;
4088         case 3:
4089                 res = kvm_set_cr3(vcpu, val);
4090                 break;
4091         case 4:
4092                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4093                 break;
4094         case 8:
4095                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4096                 break;
4097         default:
4098                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4099                 res = -1;
4100         }
4101
4102         return res;
4103 }
4104
4105 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4106 {
4107         return kvm_x86_ops->get_cpl(vcpu);
4108 }
4109
4110 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4111 {
4112         kvm_x86_ops->get_gdt(vcpu, dt);
4113 }
4114
4115 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4116 {
4117         kvm_x86_ops->get_idt(vcpu, dt);
4118 }
4119
4120 static unsigned long emulator_get_cached_segment_base(int seg,
4121                                                       struct kvm_vcpu *vcpu)
4122 {
4123         return get_segment_base(vcpu, seg);
4124 }
4125
4126 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4127                                            struct kvm_vcpu *vcpu)
4128 {
4129         struct kvm_segment var;
4130
4131         kvm_get_segment(vcpu, &var, seg);
4132
4133         if (var.unusable)
4134                 return false;
4135
4136         if (var.g)
4137                 var.limit >>= 12;
4138         set_desc_limit(desc, var.limit);
4139         set_desc_base(desc, (unsigned long)var.base);
4140         desc->type = var.type;
4141         desc->s = var.s;
4142         desc->dpl = var.dpl;
4143         desc->p = var.present;
4144         desc->avl = var.avl;
4145         desc->l = var.l;
4146         desc->d = var.db;
4147         desc->g = var.g;
4148
4149         return true;
4150 }
4151
4152 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4153                                            struct kvm_vcpu *vcpu)
4154 {
4155         struct kvm_segment var;
4156
4157         /* needed to preserve selector */
4158         kvm_get_segment(vcpu, &var, seg);
4159
4160         var.base = get_desc_base(desc);
4161         var.limit = get_desc_limit(desc);
4162         if (desc->g)
4163                 var.limit = (var.limit << 12) | 0xfff;
4164         var.type = desc->type;
4165         var.present = desc->p;
4166         var.dpl = desc->dpl;
4167         var.db = desc->d;
4168         var.s = desc->s;
4169         var.l = desc->l;
4170         var.g = desc->g;
4171         var.avl = desc->avl;
4172         var.present = desc->p;
4173         var.unusable = !var.present;
4174         var.padding = 0;
4175
4176         kvm_set_segment(vcpu, &var, seg);
4177         return;
4178 }
4179
4180 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4181 {
4182         struct kvm_segment kvm_seg;
4183
4184         kvm_get_segment(vcpu, &kvm_seg, seg);
4185         return kvm_seg.selector;
4186 }
4187
4188 static void emulator_set_segment_selector(u16 sel, int seg,
4189                                           struct kvm_vcpu *vcpu)
4190 {
4191         struct kvm_segment kvm_seg;
4192
4193         kvm_get_segment(vcpu, &kvm_seg, seg);
4194         kvm_seg.selector = sel;
4195         kvm_set_segment(vcpu, &kvm_seg, seg);
4196 }
4197
4198 static struct x86_emulate_ops emulate_ops = {
4199         .read_std            = kvm_read_guest_virt_system,
4200         .write_std           = kvm_write_guest_virt_system,
4201         .fetch               = kvm_fetch_guest_virt,
4202         .read_emulated       = emulator_read_emulated,
4203         .write_emulated      = emulator_write_emulated,
4204         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4205         .pio_in_emulated     = emulator_pio_in_emulated,
4206         .pio_out_emulated    = emulator_pio_out_emulated,
4207         .get_cached_descriptor = emulator_get_cached_descriptor,
4208         .set_cached_descriptor = emulator_set_cached_descriptor,
4209         .get_segment_selector = emulator_get_segment_selector,
4210         .set_segment_selector = emulator_set_segment_selector,
4211         .get_cached_segment_base = emulator_get_cached_segment_base,
4212         .get_gdt             = emulator_get_gdt,
4213         .get_idt             = emulator_get_idt,
4214         .get_cr              = emulator_get_cr,
4215         .set_cr              = emulator_set_cr,
4216         .cpl                 = emulator_get_cpl,
4217         .get_dr              = emulator_get_dr,
4218         .set_dr              = emulator_set_dr,
4219         .set_msr             = kvm_set_msr,
4220         .get_msr             = kvm_get_msr,
4221 };
4222
4223 static void cache_all_regs(struct kvm_vcpu *vcpu)
4224 {
4225         kvm_register_read(vcpu, VCPU_REGS_RAX);
4226         kvm_register_read(vcpu, VCPU_REGS_RSP);
4227         kvm_register_read(vcpu, VCPU_REGS_RIP);
4228         vcpu->arch.regs_dirty = ~0;
4229 }
4230
4231 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4232 {
4233         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4234         /*
4235          * an sti; sti; sequence only disable interrupts for the first
4236          * instruction. So, if the last instruction, be it emulated or
4237          * not, left the system with the INT_STI flag enabled, it
4238          * means that the last instruction is an sti. We should not
4239          * leave the flag on in this case. The same goes for mov ss
4240          */
4241         if (!(int_shadow & mask))
4242                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4243 }
4244
4245 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4246 {
4247         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4248         if (ctxt->exception == PF_VECTOR)
4249                 kvm_propagate_fault(vcpu);
4250         else if (ctxt->error_code_valid)
4251                 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4252         else
4253                 kvm_queue_exception(vcpu, ctxt->exception);
4254 }
4255
4256 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4257 {
4258         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4259         int cs_db, cs_l;
4260
4261         cache_all_regs(vcpu);
4262
4263         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4264
4265         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4266         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4267         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4268         vcpu->arch.emulate_ctxt.mode =
4269                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4270                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4271                 ? X86EMUL_MODE_VM86 : cs_l
4272                 ? X86EMUL_MODE_PROT64 : cs_db
4273                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4274         memset(c, 0, sizeof(struct decode_cache));
4275         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4276 }
4277
4278 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4279 {
4280         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4281         int ret;
4282
4283         init_emulate_ctxt(vcpu);
4284
4285         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4286         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4287         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4288         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4289
4290         if (ret != X86EMUL_CONTINUE)
4291                 return EMULATE_FAIL;
4292
4293         vcpu->arch.emulate_ctxt.eip = c->eip;
4294         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4295         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4296         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4297
4298         if (irq == NMI_VECTOR)
4299                 vcpu->arch.nmi_pending = false;
4300         else
4301                 vcpu->arch.interrupt.pending = false;
4302
4303         return EMULATE_DONE;
4304 }
4305 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4306
4307 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4308 {
4309         ++vcpu->stat.insn_emulation_fail;
4310         trace_kvm_emulate_insn_failed(vcpu);
4311         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4312         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4313         vcpu->run->internal.ndata = 0;
4314         kvm_queue_exception(vcpu, UD_VECTOR);
4315         return EMULATE_FAIL;
4316 }
4317
4318 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4319 {
4320         gpa_t gpa;
4321
4322         if (tdp_enabled)
4323                 return false;
4324
4325         /*
4326          * if emulation was due to access to shadowed page table
4327          * and it failed try to unshadow page and re-entetr the
4328          * guest to let CPU execute the instruction.
4329          */
4330         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4331                 return true;
4332
4333         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4334
4335         if (gpa == UNMAPPED_GVA)
4336                 return true; /* let cpu generate fault */
4337
4338         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4339                 return true;
4340
4341         return false;
4342 }
4343
4344 int emulate_instruction(struct kvm_vcpu *vcpu,
4345                         unsigned long cr2,
4346                         u16 error_code,
4347                         int emulation_type)
4348 {
4349         int r;
4350         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4351
4352         kvm_clear_exception_queue(vcpu);
4353         vcpu->arch.mmio_fault_cr2 = cr2;
4354         /*
4355          * TODO: fix emulate.c to use guest_read/write_register
4356          * instead of direct ->regs accesses, can save hundred cycles
4357          * on Intel for instructions that don't read/change RSP, for
4358          * for example.
4359          */
4360         cache_all_regs(vcpu);
4361
4362         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4363                 init_emulate_ctxt(vcpu);
4364                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4365                 vcpu->arch.emulate_ctxt.exception = -1;
4366                 vcpu->arch.emulate_ctxt.perm_ok = false;
4367
4368                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4369                 if (r == X86EMUL_PROPAGATE_FAULT)
4370                         goto done;
4371
4372                 trace_kvm_emulate_insn_start(vcpu);
4373
4374                 /* Only allow emulation of specific instructions on #UD
4375                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4376                 if (emulation_type & EMULTYPE_TRAP_UD) {
4377                         if (!c->twobyte)
4378                                 return EMULATE_FAIL;
4379                         switch (c->b) {
4380                         case 0x01: /* VMMCALL */
4381                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4382                                         return EMULATE_FAIL;
4383                                 break;
4384                         case 0x34: /* sysenter */
4385                         case 0x35: /* sysexit */
4386                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4387                                         return EMULATE_FAIL;
4388                                 break;
4389                         case 0x05: /* syscall */
4390                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4391                                         return EMULATE_FAIL;
4392                                 break;
4393                         default:
4394                                 return EMULATE_FAIL;
4395                         }
4396
4397                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4398                                 return EMULATE_FAIL;
4399                 }
4400
4401                 ++vcpu->stat.insn_emulation;
4402                 if (r)  {
4403                         if (reexecute_instruction(vcpu, cr2))
4404                                 return EMULATE_DONE;
4405                         if (emulation_type & EMULTYPE_SKIP)
4406                                 return EMULATE_FAIL;
4407                         return handle_emulation_failure(vcpu);
4408                 }
4409         }
4410
4411         if (emulation_type & EMULTYPE_SKIP) {
4412                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4413                 return EMULATE_DONE;
4414         }
4415
4416         /* this is needed for vmware backdor interface to work since it
4417            changes registers values  during IO operation */
4418         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4419
4420 restart:
4421         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4422
4423         if (r == EMULATION_FAILED) {
4424                 if (reexecute_instruction(vcpu, cr2))
4425                         return EMULATE_DONE;
4426
4427                 return handle_emulation_failure(vcpu);
4428         }
4429
4430 done:
4431         if (vcpu->arch.emulate_ctxt.exception >= 0) {
4432                 inject_emulated_exception(vcpu);
4433                 r = EMULATE_DONE;
4434         } else if (vcpu->arch.pio.count) {
4435                 if (!vcpu->arch.pio.in)
4436                         vcpu->arch.pio.count = 0;
4437                 r = EMULATE_DO_MMIO;
4438         } else if (vcpu->mmio_needed) {
4439                 if (vcpu->mmio_is_write)
4440                         vcpu->mmio_needed = 0;
4441                 r = EMULATE_DO_MMIO;
4442         } else if (r == EMULATION_RESTART)
4443                 goto restart;
4444         else
4445                 r = EMULATE_DONE;
4446
4447         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4448         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4449         kvm_make_request(KVM_REQ_EVENT, vcpu);
4450         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4451         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4452
4453         return r;
4454 }
4455 EXPORT_SYMBOL_GPL(emulate_instruction);
4456
4457 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4458 {
4459         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4460         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4461         /* do not return to emulator after return from userspace */
4462         vcpu->arch.pio.count = 0;
4463         return ret;
4464 }
4465 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4466
4467 static void tsc_bad(void *info)
4468 {
4469         __get_cpu_var(cpu_tsc_khz) = 0;
4470 }
4471
4472 static void tsc_khz_changed(void *data)
4473 {
4474         struct cpufreq_freqs *freq = data;
4475         unsigned long khz = 0;
4476
4477         if (data)
4478                 khz = freq->new;
4479         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4480                 khz = cpufreq_quick_get(raw_smp_processor_id());
4481         if (!khz)
4482                 khz = tsc_khz;
4483         __get_cpu_var(cpu_tsc_khz) = khz;
4484 }
4485
4486 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4487                                      void *data)
4488 {
4489         struct cpufreq_freqs *freq = data;
4490         struct kvm *kvm;
4491         struct kvm_vcpu *vcpu;
4492         int i, send_ipi = 0;
4493
4494         /*
4495          * We allow guests to temporarily run on slowing clocks,
4496          * provided we notify them after, or to run on accelerating
4497          * clocks, provided we notify them before.  Thus time never
4498          * goes backwards.
4499          *
4500          * However, we have a problem.  We can't atomically update
4501          * the frequency of a given CPU from this function; it is
4502          * merely a notifier, which can be called from any CPU.
4503          * Changing the TSC frequency at arbitrary points in time
4504          * requires a recomputation of local variables related to
4505          * the TSC for each VCPU.  We must flag these local variables
4506          * to be updated and be sure the update takes place with the
4507          * new frequency before any guests proceed.
4508          *
4509          * Unfortunately, the combination of hotplug CPU and frequency
4510          * change creates an intractable locking scenario; the order
4511          * of when these callouts happen is undefined with respect to
4512          * CPU hotplug, and they can race with each other.  As such,
4513          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4514          * undefined; you can actually have a CPU frequency change take
4515          * place in between the computation of X and the setting of the
4516          * variable.  To protect against this problem, all updates of
4517          * the per_cpu tsc_khz variable are done in an interrupt
4518          * protected IPI, and all callers wishing to update the value
4519          * must wait for a synchronous IPI to complete (which is trivial
4520          * if the caller is on the CPU already).  This establishes the
4521          * necessary total order on variable updates.
4522          *
4523          * Note that because a guest time update may take place
4524          * anytime after the setting of the VCPU's request bit, the
4525          * correct TSC value must be set before the request.  However,
4526          * to ensure the update actually makes it to any guest which
4527          * starts running in hardware virtualization between the set
4528          * and the acquisition of the spinlock, we must also ping the
4529          * CPU after setting the request bit.
4530          *
4531          */
4532
4533         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4534                 return 0;
4535         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4536                 return 0;
4537
4538         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4539
4540         spin_lock(&kvm_lock);
4541         list_for_each_entry(kvm, &vm_list, vm_list) {
4542                 kvm_for_each_vcpu(i, vcpu, kvm) {
4543                         if (vcpu->cpu != freq->cpu)
4544                                 continue;
4545                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4546                         if (vcpu->cpu != smp_processor_id())
4547                                 send_ipi = 1;
4548                 }
4549         }
4550         spin_unlock(&kvm_lock);
4551
4552         if (freq->old < freq->new && send_ipi) {
4553                 /*
4554                  * We upscale the frequency.  Must make the guest
4555                  * doesn't see old kvmclock values while running with
4556                  * the new frequency, otherwise we risk the guest sees
4557                  * time go backwards.
4558                  *
4559                  * In case we update the frequency for another cpu
4560                  * (which might be in guest context) send an interrupt
4561                  * to kick the cpu out of guest context.  Next time
4562                  * guest context is entered kvmclock will be updated,
4563                  * so the guest will not see stale values.
4564                  */
4565                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4566         }
4567         return 0;
4568 }
4569
4570 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4571         .notifier_call  = kvmclock_cpufreq_notifier
4572 };
4573
4574 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4575                                         unsigned long action, void *hcpu)
4576 {
4577         unsigned int cpu = (unsigned long)hcpu;
4578
4579         switch (action) {
4580                 case CPU_ONLINE:
4581                 case CPU_DOWN_FAILED:
4582                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4583                         break;
4584                 case CPU_DOWN_PREPARE:
4585                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4586                         break;
4587         }
4588         return NOTIFY_OK;
4589 }
4590
4591 static struct notifier_block kvmclock_cpu_notifier_block = {
4592         .notifier_call  = kvmclock_cpu_notifier,
4593         .priority = -INT_MAX
4594 };
4595
4596 static void kvm_timer_init(void)
4597 {
4598         int cpu;
4599
4600         max_tsc_khz = tsc_khz;
4601         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4602         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4603 #ifdef CONFIG_CPU_FREQ
4604                 struct cpufreq_policy policy;
4605                 memset(&policy, 0, sizeof(policy));
4606                 cpu = get_cpu();
4607                 cpufreq_get_policy(&policy, cpu);
4608                 if (policy.cpuinfo.max_freq)
4609                         max_tsc_khz = policy.cpuinfo.max_freq;
4610                 put_cpu();
4611 #endif
4612                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4613                                           CPUFREQ_TRANSITION_NOTIFIER);
4614         }
4615         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4616         for_each_online_cpu(cpu)
4617                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4618 }
4619
4620 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4621
4622 static int kvm_is_in_guest(void)
4623 {
4624         return percpu_read(current_vcpu) != NULL;
4625 }
4626
4627 static int kvm_is_user_mode(void)
4628 {
4629         int user_mode = 3;
4630
4631         if (percpu_read(current_vcpu))
4632                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4633
4634         return user_mode != 0;
4635 }
4636
4637 static unsigned long kvm_get_guest_ip(void)
4638 {
4639         unsigned long ip = 0;
4640
4641         if (percpu_read(current_vcpu))
4642                 ip = kvm_rip_read(percpu_read(current_vcpu));
4643
4644         return ip;
4645 }
4646
4647 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4648         .is_in_guest            = kvm_is_in_guest,
4649         .is_user_mode           = kvm_is_user_mode,
4650         .get_guest_ip           = kvm_get_guest_ip,
4651 };
4652
4653 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4654 {
4655         percpu_write(current_vcpu, vcpu);
4656 }
4657 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4658
4659 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4660 {
4661         percpu_write(current_vcpu, NULL);
4662 }
4663 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4664
4665 int kvm_arch_init(void *opaque)
4666 {
4667         int r;
4668         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4669
4670         if (kvm_x86_ops) {
4671                 printk(KERN_ERR "kvm: already loaded the other module\n");
4672                 r = -EEXIST;
4673                 goto out;
4674         }
4675
4676         if (!ops->cpu_has_kvm_support()) {
4677                 printk(KERN_ERR "kvm: no hardware support\n");
4678                 r = -EOPNOTSUPP;
4679                 goto out;
4680         }
4681         if (ops->disabled_by_bios()) {
4682                 printk(KERN_ERR "kvm: disabled by bios\n");
4683                 r = -EOPNOTSUPP;
4684                 goto out;
4685         }
4686
4687         r = kvm_mmu_module_init();
4688         if (r)
4689                 goto out;
4690
4691         kvm_init_msr_list();
4692
4693         kvm_x86_ops = ops;
4694         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4695         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4696         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4697                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4698
4699         kvm_timer_init();
4700
4701         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4702
4703         if (cpu_has_xsave)
4704                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4705
4706         return 0;
4707
4708 out:
4709         return r;
4710 }
4711
4712 void kvm_arch_exit(void)
4713 {
4714         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4715
4716         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4717                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4718                                             CPUFREQ_TRANSITION_NOTIFIER);
4719         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4720         kvm_x86_ops = NULL;
4721         kvm_mmu_module_exit();
4722 }
4723
4724 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4725 {
4726         ++vcpu->stat.halt_exits;
4727         if (irqchip_in_kernel(vcpu->kvm)) {
4728                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4729                 return 1;
4730         } else {
4731                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4732                 return 0;
4733         }
4734 }
4735 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4736
4737 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4738                            unsigned long a1)
4739 {
4740         if (is_long_mode(vcpu))
4741                 return a0;
4742         else
4743                 return a0 | ((gpa_t)a1 << 32);
4744 }
4745
4746 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4747 {
4748         u64 param, ingpa, outgpa, ret;
4749         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4750         bool fast, longmode;
4751         int cs_db, cs_l;
4752
4753         /*
4754          * hypercall generates UD from non zero cpl and real mode
4755          * per HYPER-V spec
4756          */
4757         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4758                 kvm_queue_exception(vcpu, UD_VECTOR);
4759                 return 0;
4760         }
4761
4762         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4763         longmode = is_long_mode(vcpu) && cs_l == 1;
4764
4765         if (!longmode) {
4766                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4767                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4768                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4769                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4770                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4771                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4772         }
4773 #ifdef CONFIG_X86_64
4774         else {
4775                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4776                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4777                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4778         }
4779 #endif
4780
4781         code = param & 0xffff;
4782         fast = (param >> 16) & 0x1;
4783         rep_cnt = (param >> 32) & 0xfff;
4784         rep_idx = (param >> 48) & 0xfff;
4785
4786         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4787
4788         switch (code) {
4789         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4790                 kvm_vcpu_on_spin(vcpu);
4791                 break;
4792         default:
4793                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4794                 break;
4795         }
4796
4797         ret = res | (((u64)rep_done & 0xfff) << 32);
4798         if (longmode) {
4799                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4800         } else {
4801                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4802                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4803         }
4804
4805         return 1;
4806 }
4807
4808 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4809 {
4810         unsigned long nr, a0, a1, a2, a3, ret;
4811         int r = 1;
4812
4813         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4814                 return kvm_hv_hypercall(vcpu);
4815
4816         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4817         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4818         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4819         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4820         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4821
4822         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4823
4824         if (!is_long_mode(vcpu)) {
4825                 nr &= 0xFFFFFFFF;
4826                 a0 &= 0xFFFFFFFF;
4827                 a1 &= 0xFFFFFFFF;
4828                 a2 &= 0xFFFFFFFF;
4829                 a3 &= 0xFFFFFFFF;
4830         }
4831
4832         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4833                 ret = -KVM_EPERM;
4834                 goto out;
4835         }
4836
4837         switch (nr) {
4838         case KVM_HC_VAPIC_POLL_IRQ:
4839                 ret = 0;
4840                 break;
4841         case KVM_HC_MMU_OP:
4842                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4843                 break;
4844         default:
4845                 ret = -KVM_ENOSYS;
4846                 break;
4847         }
4848 out:
4849         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4850         ++vcpu->stat.hypercalls;
4851         return r;
4852 }
4853 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4854
4855 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4856 {
4857         char instruction[3];
4858         unsigned long rip = kvm_rip_read(vcpu);
4859
4860         /*
4861          * Blow out the MMU to ensure that no other VCPU has an active mapping
4862          * to ensure that the updated hypercall appears atomically across all
4863          * VCPUs.
4864          */
4865         kvm_mmu_zap_all(vcpu->kvm);
4866
4867         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4868
4869         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4870 }
4871
4872 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4873 {
4874         struct desc_ptr dt = { limit, base };
4875
4876         kvm_x86_ops->set_gdt(vcpu, &dt);
4877 }
4878
4879 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4880 {
4881         struct desc_ptr dt = { limit, base };
4882
4883         kvm_x86_ops->set_idt(vcpu, &dt);
4884 }
4885
4886 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4887 {
4888         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4889         int j, nent = vcpu->arch.cpuid_nent;
4890
4891         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4892         /* when no next entry is found, the current entry[i] is reselected */
4893         for (j = i + 1; ; j = (j + 1) % nent) {
4894                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4895                 if (ej->function == e->function) {
4896                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4897                         return j;
4898                 }
4899         }
4900         return 0; /* silence gcc, even though control never reaches here */
4901 }
4902
4903 /* find an entry with matching function, matching index (if needed), and that
4904  * should be read next (if it's stateful) */
4905 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4906         u32 function, u32 index)
4907 {
4908         if (e->function != function)
4909                 return 0;
4910         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4911                 return 0;
4912         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4913             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4914                 return 0;
4915         return 1;
4916 }
4917
4918 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4919                                               u32 function, u32 index)
4920 {
4921         int i;
4922         struct kvm_cpuid_entry2 *best = NULL;
4923
4924         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4925                 struct kvm_cpuid_entry2 *e;
4926
4927                 e = &vcpu->arch.cpuid_entries[i];
4928                 if (is_matching_cpuid_entry(e, function, index)) {
4929                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4930                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4931                         best = e;
4932                         break;
4933                 }
4934                 /*
4935                  * Both basic or both extended?
4936                  */
4937                 if (((e->function ^ function) & 0x80000000) == 0)
4938                         if (!best || e->function > best->function)
4939                                 best = e;
4940         }
4941         return best;
4942 }
4943 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4944
4945 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4946 {
4947         struct kvm_cpuid_entry2 *best;
4948
4949         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4950         if (!best || best->eax < 0x80000008)
4951                 goto not_found;
4952         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4953         if (best)
4954                 return best->eax & 0xff;
4955 not_found:
4956         return 36;
4957 }
4958
4959 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4960 {
4961         u32 function, index;
4962         struct kvm_cpuid_entry2 *best;
4963
4964         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4965         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4966         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4967         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4968         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4969         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4970         best = kvm_find_cpuid_entry(vcpu, function, index);
4971         if (best) {
4972                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4973                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4974                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4975                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4976         }
4977         kvm_x86_ops->skip_emulated_instruction(vcpu);
4978         trace_kvm_cpuid(function,
4979                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4980                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4981                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4982                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4983 }
4984 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4985
4986 /*
4987  * Check if userspace requested an interrupt window, and that the
4988  * interrupt window is open.
4989  *
4990  * No need to exit to userspace if we already have an interrupt queued.
4991  */
4992 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4993 {
4994         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4995                 vcpu->run->request_interrupt_window &&
4996                 kvm_arch_interrupt_allowed(vcpu));
4997 }
4998
4999 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5000 {
5001         struct kvm_run *kvm_run = vcpu->run;
5002
5003         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5004         kvm_run->cr8 = kvm_get_cr8(vcpu);
5005         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5006         if (irqchip_in_kernel(vcpu->kvm))
5007                 kvm_run->ready_for_interrupt_injection = 1;
5008         else
5009                 kvm_run->ready_for_interrupt_injection =
5010                         kvm_arch_interrupt_allowed(vcpu) &&
5011                         !kvm_cpu_has_interrupt(vcpu) &&
5012                         !kvm_event_needs_reinjection(vcpu);
5013 }
5014
5015 static void vapic_enter(struct kvm_vcpu *vcpu)
5016 {
5017         struct kvm_lapic *apic = vcpu->arch.apic;
5018         struct page *page;
5019
5020         if (!apic || !apic->vapic_addr)
5021                 return;
5022
5023         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5024
5025         vcpu->arch.apic->vapic_page = page;
5026 }
5027
5028 static void vapic_exit(struct kvm_vcpu *vcpu)
5029 {
5030         struct kvm_lapic *apic = vcpu->arch.apic;
5031         int idx;
5032
5033         if (!apic || !apic->vapic_addr)
5034                 return;
5035
5036         idx = srcu_read_lock(&vcpu->kvm->srcu);
5037         kvm_release_page_dirty(apic->vapic_page);
5038         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5039         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5040 }
5041
5042 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5043 {
5044         int max_irr, tpr;
5045
5046         if (!kvm_x86_ops->update_cr8_intercept)
5047                 return;
5048
5049         if (!vcpu->arch.apic)
5050                 return;
5051
5052         if (!vcpu->arch.apic->vapic_addr)
5053                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5054         else
5055                 max_irr = -1;
5056
5057         if (max_irr != -1)
5058                 max_irr >>= 4;
5059
5060         tpr = kvm_lapic_get_cr8(vcpu);
5061
5062         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5063 }
5064
5065 static void inject_pending_event(struct kvm_vcpu *vcpu)
5066 {
5067         /* try to reinject previous events if any */
5068         if (vcpu->arch.exception.pending) {
5069                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5070                                         vcpu->arch.exception.has_error_code,
5071                                         vcpu->arch.exception.error_code);
5072                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5073                                           vcpu->arch.exception.has_error_code,
5074                                           vcpu->arch.exception.error_code,
5075                                           vcpu->arch.exception.reinject);
5076                 return;
5077         }
5078
5079         if (vcpu->arch.nmi_injected) {
5080                 kvm_x86_ops->set_nmi(vcpu);
5081                 return;
5082         }
5083
5084         if (vcpu->arch.interrupt.pending) {
5085                 kvm_x86_ops->set_irq(vcpu);
5086                 return;
5087         }
5088
5089         /* try to inject new event if pending */
5090         if (vcpu->arch.nmi_pending) {
5091                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5092                         vcpu->arch.nmi_pending = false;
5093                         vcpu->arch.nmi_injected = true;
5094                         kvm_x86_ops->set_nmi(vcpu);
5095                 }
5096         } else if (kvm_cpu_has_interrupt(vcpu)) {
5097                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5098                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5099                                             false);
5100                         kvm_x86_ops->set_irq(vcpu);
5101                 }
5102         }
5103 }
5104
5105 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5106 {
5107         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5108                         !vcpu->guest_xcr0_loaded) {
5109                 /* kvm_set_xcr() also depends on this */
5110                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5111                 vcpu->guest_xcr0_loaded = 1;
5112         }
5113 }
5114
5115 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5116 {
5117         if (vcpu->guest_xcr0_loaded) {
5118                 if (vcpu->arch.xcr0 != host_xcr0)
5119                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5120                 vcpu->guest_xcr0_loaded = 0;
5121         }
5122 }
5123
5124 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5125 {
5126         int r;
5127         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5128                 vcpu->run->request_interrupt_window;
5129
5130         if (vcpu->requests) {
5131                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5132                         kvm_mmu_unload(vcpu);
5133                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5134                         __kvm_migrate_timers(vcpu);
5135                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5136                         r = kvm_guest_time_update(vcpu);
5137                         if (unlikely(r))
5138                                 goto out;
5139                 }
5140                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5141                         kvm_mmu_sync_roots(vcpu);
5142                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5143                         kvm_x86_ops->tlb_flush(vcpu);
5144                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5145                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5146                         r = 0;
5147                         goto out;
5148                 }
5149                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5150                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5151                         r = 0;
5152                         goto out;
5153                 }
5154                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5155                         vcpu->fpu_active = 0;
5156                         kvm_x86_ops->fpu_deactivate(vcpu);
5157                 }
5158                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5159                         /* Page is swapped out. Do synthetic halt */
5160                         vcpu->arch.apf.halted = true;
5161                         r = 1;
5162                         goto out;
5163                 }
5164         }
5165
5166         r = kvm_mmu_reload(vcpu);
5167         if (unlikely(r))
5168                 goto out;
5169
5170         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5171                 inject_pending_event(vcpu);
5172
5173                 /* enable NMI/IRQ window open exits if needed */
5174                 if (vcpu->arch.nmi_pending)
5175                         kvm_x86_ops->enable_nmi_window(vcpu);
5176                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5177                         kvm_x86_ops->enable_irq_window(vcpu);
5178
5179                 if (kvm_lapic_enabled(vcpu)) {
5180                         update_cr8_intercept(vcpu);
5181                         kvm_lapic_sync_to_vapic(vcpu);
5182                 }
5183         }
5184
5185         preempt_disable();
5186
5187         kvm_x86_ops->prepare_guest_switch(vcpu);
5188         if (vcpu->fpu_active)
5189                 kvm_load_guest_fpu(vcpu);
5190         kvm_load_guest_xcr0(vcpu);
5191
5192         atomic_set(&vcpu->guest_mode, 1);
5193         smp_wmb();
5194
5195         local_irq_disable();
5196
5197         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5198             || need_resched() || signal_pending(current)) {
5199                 atomic_set(&vcpu->guest_mode, 0);
5200                 smp_wmb();
5201                 local_irq_enable();
5202                 preempt_enable();
5203                 kvm_x86_ops->cancel_injection(vcpu);
5204                 r = 1;
5205                 goto out;
5206         }
5207
5208         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5209
5210         kvm_guest_enter();
5211
5212         if (unlikely(vcpu->arch.switch_db_regs)) {
5213                 set_debugreg(0, 7);
5214                 set_debugreg(vcpu->arch.eff_db[0], 0);
5215                 set_debugreg(vcpu->arch.eff_db[1], 1);
5216                 set_debugreg(vcpu->arch.eff_db[2], 2);
5217                 set_debugreg(vcpu->arch.eff_db[3], 3);
5218         }
5219
5220         trace_kvm_entry(vcpu->vcpu_id);
5221         kvm_x86_ops->run(vcpu);
5222
5223         /*
5224          * If the guest has used debug registers, at least dr7
5225          * will be disabled while returning to the host.
5226          * If we don't have active breakpoints in the host, we don't
5227          * care about the messed up debug address registers. But if
5228          * we have some of them active, restore the old state.
5229          */
5230         if (hw_breakpoint_active())
5231                 hw_breakpoint_restore();
5232
5233         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5234
5235         atomic_set(&vcpu->guest_mode, 0);
5236         smp_wmb();
5237         local_irq_enable();
5238
5239         ++vcpu->stat.exits;
5240
5241         /*
5242          * We must have an instruction between local_irq_enable() and
5243          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5244          * the interrupt shadow.  The stat.exits increment will do nicely.
5245          * But we need to prevent reordering, hence this barrier():
5246          */
5247         barrier();
5248
5249         kvm_guest_exit();
5250
5251         preempt_enable();
5252
5253         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5254
5255         /*
5256          * Profile KVM exit RIPs:
5257          */
5258         if (unlikely(prof_on == KVM_PROFILING)) {
5259                 unsigned long rip = kvm_rip_read(vcpu);
5260                 profile_hit(KVM_PROFILING, (void *)rip);
5261         }
5262
5263
5264         kvm_lapic_sync_from_vapic(vcpu);
5265
5266         r = kvm_x86_ops->handle_exit(vcpu);
5267 out:
5268         return r;
5269 }
5270
5271
5272 static int __vcpu_run(struct kvm_vcpu *vcpu)
5273 {
5274         int r;
5275         struct kvm *kvm = vcpu->kvm;
5276
5277         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5278                 pr_debug("vcpu %d received sipi with vector # %x\n",
5279                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5280                 kvm_lapic_reset(vcpu);
5281                 r = kvm_arch_vcpu_reset(vcpu);
5282                 if (r)
5283                         return r;
5284                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5285         }
5286
5287         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5288         vapic_enter(vcpu);
5289
5290         r = 1;
5291         while (r > 0) {
5292                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5293                     !vcpu->arch.apf.halted)
5294                         r = vcpu_enter_guest(vcpu);
5295                 else {
5296                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5297                         kvm_vcpu_block(vcpu);
5298                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5299                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5300                         {
5301                                 switch(vcpu->arch.mp_state) {
5302                                 case KVM_MP_STATE_HALTED:
5303                                         vcpu->arch.mp_state =
5304                                                 KVM_MP_STATE_RUNNABLE;
5305                                 case KVM_MP_STATE_RUNNABLE:
5306                                         vcpu->arch.apf.halted = false;
5307                                         break;
5308                                 case KVM_MP_STATE_SIPI_RECEIVED:
5309                                 default:
5310                                         r = -EINTR;
5311                                         break;
5312                                 }
5313                         }
5314                 }
5315
5316                 if (r <= 0)
5317                         break;
5318
5319                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5320                 if (kvm_cpu_has_pending_timer(vcpu))
5321                         kvm_inject_pending_timer_irqs(vcpu);
5322
5323                 if (dm_request_for_irq_injection(vcpu)) {
5324                         r = -EINTR;
5325                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5326                         ++vcpu->stat.request_irq_exits;
5327                 }
5328
5329                 kvm_check_async_pf_completion(vcpu);
5330
5331                 if (signal_pending(current)) {
5332                         r = -EINTR;
5333                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5334                         ++vcpu->stat.signal_exits;
5335                 }
5336                 if (need_resched()) {
5337                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5338                         kvm_resched(vcpu);
5339                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5340                 }
5341         }
5342
5343         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5344
5345         vapic_exit(vcpu);
5346
5347         return r;
5348 }
5349
5350 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5351 {
5352         int r;
5353         sigset_t sigsaved;
5354
5355         if (vcpu->sigset_active)
5356                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5357
5358         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5359                 kvm_vcpu_block(vcpu);
5360                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5361                 r = -EAGAIN;
5362                 goto out;
5363         }
5364
5365         /* re-sync apic's tpr */
5366         if (!irqchip_in_kernel(vcpu->kvm))
5367                 kvm_set_cr8(vcpu, kvm_run->cr8);
5368
5369         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5370                 if (vcpu->mmio_needed) {
5371                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5372                         vcpu->mmio_read_completed = 1;
5373                         vcpu->mmio_needed = 0;
5374                 }
5375                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5376                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5377                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5378                 if (r != EMULATE_DONE) {
5379                         r = 0;
5380                         goto out;
5381                 }
5382         }
5383         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5384                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5385                                      kvm_run->hypercall.ret);
5386
5387         r = __vcpu_run(vcpu);
5388
5389 out:
5390         post_kvm_run_save(vcpu);
5391         if (vcpu->sigset_active)
5392                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5393
5394         return r;
5395 }
5396
5397 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5398 {
5399         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5400         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5401         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5402         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5403         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5404         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5405         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5406         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5407 #ifdef CONFIG_X86_64
5408         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5409         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5410         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5411         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5412         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5413         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5414         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5415         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5416 #endif
5417
5418         regs->rip = kvm_rip_read(vcpu);
5419         regs->rflags = kvm_get_rflags(vcpu);
5420
5421         return 0;
5422 }
5423
5424 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5425 {
5426         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5427         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5428         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5429         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5430         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5431         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5432         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5433         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5434 #ifdef CONFIG_X86_64
5435         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5436         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5437         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5438         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5439         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5440         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5441         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5442         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5443 #endif
5444
5445         kvm_rip_write(vcpu, regs->rip);
5446         kvm_set_rflags(vcpu, regs->rflags);
5447
5448         vcpu->arch.exception.pending = false;
5449
5450         kvm_make_request(KVM_REQ_EVENT, vcpu);
5451
5452         return 0;
5453 }
5454
5455 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5456 {
5457         struct kvm_segment cs;
5458
5459         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5460         *db = cs.db;
5461         *l = cs.l;
5462 }
5463 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5464
5465 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5466                                   struct kvm_sregs *sregs)
5467 {
5468         struct desc_ptr dt;
5469
5470         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5471         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5472         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5473         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5474         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5475         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5476
5477         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5478         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5479
5480         kvm_x86_ops->get_idt(vcpu, &dt);
5481         sregs->idt.limit = dt.size;
5482         sregs->idt.base = dt.address;
5483         kvm_x86_ops->get_gdt(vcpu, &dt);
5484         sregs->gdt.limit = dt.size;
5485         sregs->gdt.base = dt.address;
5486
5487         sregs->cr0 = kvm_read_cr0(vcpu);
5488         sregs->cr2 = vcpu->arch.cr2;
5489         sregs->cr3 = vcpu->arch.cr3;
5490         sregs->cr4 = kvm_read_cr4(vcpu);
5491         sregs->cr8 = kvm_get_cr8(vcpu);
5492         sregs->efer = vcpu->arch.efer;
5493         sregs->apic_base = kvm_get_apic_base(vcpu);
5494
5495         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5496
5497         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5498                 set_bit(vcpu->arch.interrupt.nr,
5499                         (unsigned long *)sregs->interrupt_bitmap);
5500
5501         return 0;
5502 }
5503
5504 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5505                                     struct kvm_mp_state *mp_state)
5506 {
5507         mp_state->mp_state = vcpu->arch.mp_state;
5508         return 0;
5509 }
5510
5511 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5512                                     struct kvm_mp_state *mp_state)
5513 {
5514         vcpu->arch.mp_state = mp_state->mp_state;
5515         kvm_make_request(KVM_REQ_EVENT, vcpu);
5516         return 0;
5517 }
5518
5519 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5520                     bool has_error_code, u32 error_code)
5521 {
5522         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5523         int ret;
5524
5525         init_emulate_ctxt(vcpu);
5526
5527         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5528                                    tss_selector, reason, has_error_code,
5529                                    error_code);
5530
5531         if (ret)
5532                 return EMULATE_FAIL;
5533
5534         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5535         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5536         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5537         kvm_make_request(KVM_REQ_EVENT, vcpu);
5538         return EMULATE_DONE;
5539 }
5540 EXPORT_SYMBOL_GPL(kvm_task_switch);
5541
5542 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5543                                   struct kvm_sregs *sregs)
5544 {
5545         int mmu_reset_needed = 0;
5546         int pending_vec, max_bits;
5547         struct desc_ptr dt;
5548
5549         dt.size = sregs->idt.limit;
5550         dt.address = sregs->idt.base;
5551         kvm_x86_ops->set_idt(vcpu, &dt);
5552         dt.size = sregs->gdt.limit;
5553         dt.address = sregs->gdt.base;
5554         kvm_x86_ops->set_gdt(vcpu, &dt);
5555
5556         vcpu->arch.cr2 = sregs->cr2;
5557         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5558         vcpu->arch.cr3 = sregs->cr3;
5559
5560         kvm_set_cr8(vcpu, sregs->cr8);
5561
5562         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5563         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5564         kvm_set_apic_base(vcpu, sregs->apic_base);
5565
5566         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5567         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5568         vcpu->arch.cr0 = sregs->cr0;
5569
5570         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5571         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5572         if (sregs->cr4 & X86_CR4_OSXSAVE)
5573                 update_cpuid(vcpu);
5574         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5575                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5576                 mmu_reset_needed = 1;
5577         }
5578
5579         if (mmu_reset_needed)
5580                 kvm_mmu_reset_context(vcpu);
5581
5582         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5583         pending_vec = find_first_bit(
5584                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5585         if (pending_vec < max_bits) {
5586                 kvm_queue_interrupt(vcpu, pending_vec, false);
5587                 pr_debug("Set back pending irq %d\n", pending_vec);
5588                 if (irqchip_in_kernel(vcpu->kvm))
5589                         kvm_pic_clear_isr_ack(vcpu->kvm);
5590         }
5591
5592         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5593         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5594         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5595         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5596         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5597         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5598
5599         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5600         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5601
5602         update_cr8_intercept(vcpu);
5603
5604         /* Older userspace won't unhalt the vcpu on reset. */
5605         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5606             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5607             !is_protmode(vcpu))
5608                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5609
5610         kvm_make_request(KVM_REQ_EVENT, vcpu);
5611
5612         return 0;
5613 }
5614
5615 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5616                                         struct kvm_guest_debug *dbg)
5617 {
5618         unsigned long rflags;
5619         int i, r;
5620
5621         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5622                 r = -EBUSY;
5623                 if (vcpu->arch.exception.pending)
5624                         goto out;
5625                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5626                         kvm_queue_exception(vcpu, DB_VECTOR);
5627                 else
5628                         kvm_queue_exception(vcpu, BP_VECTOR);
5629         }
5630
5631         /*
5632          * Read rflags as long as potentially injected trace flags are still
5633          * filtered out.
5634          */
5635         rflags = kvm_get_rflags(vcpu);
5636
5637         vcpu->guest_debug = dbg->control;
5638         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5639                 vcpu->guest_debug = 0;
5640
5641         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5642                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5643                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5644                 vcpu->arch.switch_db_regs =
5645                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5646         } else {
5647                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5648                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5649                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5650         }
5651
5652         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5653                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5654                         get_segment_base(vcpu, VCPU_SREG_CS);
5655
5656         /*
5657          * Trigger an rflags update that will inject or remove the trace
5658          * flags.
5659          */
5660         kvm_set_rflags(vcpu, rflags);
5661
5662         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5663
5664         r = 0;
5665
5666 out:
5667
5668         return r;
5669 }
5670
5671 /*
5672  * Translate a guest virtual address to a guest physical address.
5673  */
5674 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5675                                     struct kvm_translation *tr)
5676 {
5677         unsigned long vaddr = tr->linear_address;
5678         gpa_t gpa;
5679         int idx;
5680
5681         idx = srcu_read_lock(&vcpu->kvm->srcu);
5682         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5683         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5684         tr->physical_address = gpa;
5685         tr->valid = gpa != UNMAPPED_GVA;
5686         tr->writeable = 1;
5687         tr->usermode = 0;
5688
5689         return 0;
5690 }
5691
5692 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5693 {
5694         struct i387_fxsave_struct *fxsave =
5695                         &vcpu->arch.guest_fpu.state->fxsave;
5696
5697         memcpy(fpu->fpr, fxsave->st_space, 128);
5698         fpu->fcw = fxsave->cwd;
5699         fpu->fsw = fxsave->swd;
5700         fpu->ftwx = fxsave->twd;
5701         fpu->last_opcode = fxsave->fop;
5702         fpu->last_ip = fxsave->rip;
5703         fpu->last_dp = fxsave->rdp;
5704         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5705
5706         return 0;
5707 }
5708
5709 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5710 {
5711         struct i387_fxsave_struct *fxsave =
5712                         &vcpu->arch.guest_fpu.state->fxsave;
5713
5714         memcpy(fxsave->st_space, fpu->fpr, 128);
5715         fxsave->cwd = fpu->fcw;
5716         fxsave->swd = fpu->fsw;
5717         fxsave->twd = fpu->ftwx;
5718         fxsave->fop = fpu->last_opcode;
5719         fxsave->rip = fpu->last_ip;
5720         fxsave->rdp = fpu->last_dp;
5721         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5722
5723         return 0;
5724 }
5725
5726 int fx_init(struct kvm_vcpu *vcpu)
5727 {
5728         int err;
5729
5730         err = fpu_alloc(&vcpu->arch.guest_fpu);
5731         if (err)
5732                 return err;
5733
5734         fpu_finit(&vcpu->arch.guest_fpu);
5735
5736         /*
5737          * Ensure guest xcr0 is valid for loading
5738          */
5739         vcpu->arch.xcr0 = XSTATE_FP;
5740
5741         vcpu->arch.cr0 |= X86_CR0_ET;
5742
5743         return 0;
5744 }
5745 EXPORT_SYMBOL_GPL(fx_init);
5746
5747 static void fx_free(struct kvm_vcpu *vcpu)
5748 {
5749         fpu_free(&vcpu->arch.guest_fpu);
5750 }
5751
5752 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5753 {
5754         if (vcpu->guest_fpu_loaded)
5755                 return;
5756
5757         /*
5758          * Restore all possible states in the guest,
5759          * and assume host would use all available bits.
5760          * Guest xcr0 would be loaded later.
5761          */
5762         kvm_put_guest_xcr0(vcpu);
5763         vcpu->guest_fpu_loaded = 1;
5764         unlazy_fpu(current);
5765         fpu_restore_checking(&vcpu->arch.guest_fpu);
5766         trace_kvm_fpu(1);
5767 }
5768
5769 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5770 {
5771         kvm_put_guest_xcr0(vcpu);
5772
5773         if (!vcpu->guest_fpu_loaded)
5774                 return;
5775
5776         vcpu->guest_fpu_loaded = 0;
5777         fpu_save_init(&vcpu->arch.guest_fpu);
5778         ++vcpu->stat.fpu_reload;
5779         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5780         trace_kvm_fpu(0);
5781 }
5782
5783 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5784 {
5785         if (vcpu->arch.time_page) {
5786                 kvm_release_page_dirty(vcpu->arch.time_page);
5787                 vcpu->arch.time_page = NULL;
5788         }
5789
5790         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5791         fx_free(vcpu);
5792         kvm_x86_ops->vcpu_free(vcpu);
5793 }
5794
5795 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5796                                                 unsigned int id)
5797 {
5798         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5799                 printk_once(KERN_WARNING
5800                 "kvm: SMP vm created on host with unstable TSC; "
5801                 "guest TSC will not be reliable\n");
5802         return kvm_x86_ops->vcpu_create(kvm, id);
5803 }
5804
5805 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5806 {
5807         int r;
5808
5809         vcpu->arch.mtrr_state.have_fixed = 1;
5810         vcpu_load(vcpu);
5811         r = kvm_arch_vcpu_reset(vcpu);
5812         if (r == 0)
5813                 r = kvm_mmu_setup(vcpu);
5814         vcpu_put(vcpu);
5815         if (r < 0)
5816                 goto free_vcpu;
5817
5818         return 0;
5819 free_vcpu:
5820         kvm_x86_ops->vcpu_free(vcpu);
5821         return r;
5822 }
5823
5824 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5825 {
5826         vcpu->arch.apf.msr_val = 0;
5827
5828         vcpu_load(vcpu);
5829         kvm_mmu_unload(vcpu);
5830         vcpu_put(vcpu);
5831
5832         fx_free(vcpu);
5833         kvm_x86_ops->vcpu_free(vcpu);
5834 }
5835
5836 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5837 {
5838         vcpu->arch.nmi_pending = false;
5839         vcpu->arch.nmi_injected = false;
5840
5841         vcpu->arch.switch_db_regs = 0;
5842         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5843         vcpu->arch.dr6 = DR6_FIXED_1;
5844         vcpu->arch.dr7 = DR7_FIXED_1;
5845
5846         kvm_make_request(KVM_REQ_EVENT, vcpu);
5847         vcpu->arch.apf.msr_val = 0;
5848
5849         kvm_clear_async_pf_completion_queue(vcpu);
5850         kvm_async_pf_hash_reset(vcpu);
5851         vcpu->arch.apf.halted = false;
5852
5853         return kvm_x86_ops->vcpu_reset(vcpu);
5854 }
5855
5856 int kvm_arch_hardware_enable(void *garbage)
5857 {
5858         struct kvm *kvm;
5859         struct kvm_vcpu *vcpu;
5860         int i;
5861
5862         kvm_shared_msr_cpu_online();
5863         list_for_each_entry(kvm, &vm_list, vm_list)
5864                 kvm_for_each_vcpu(i, vcpu, kvm)
5865                         if (vcpu->cpu == smp_processor_id())
5866                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5867         return kvm_x86_ops->hardware_enable(garbage);
5868 }
5869
5870 void kvm_arch_hardware_disable(void *garbage)
5871 {
5872         kvm_x86_ops->hardware_disable(garbage);
5873         drop_user_return_notifiers(garbage);
5874 }
5875
5876 int kvm_arch_hardware_setup(void)
5877 {
5878         return kvm_x86_ops->hardware_setup();
5879 }
5880
5881 void kvm_arch_hardware_unsetup(void)
5882 {
5883         kvm_x86_ops->hardware_unsetup();
5884 }
5885
5886 void kvm_arch_check_processor_compat(void *rtn)
5887 {
5888         kvm_x86_ops->check_processor_compatibility(rtn);
5889 }
5890
5891 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5892 {
5893         struct page *page;
5894         struct kvm *kvm;
5895         int r;
5896
5897         BUG_ON(vcpu->kvm == NULL);
5898         kvm = vcpu->kvm;
5899
5900         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5901         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5902         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5903         vcpu->arch.mmu.translate_gpa = translate_gpa;
5904         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5905         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5906                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5907         else
5908                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5909
5910         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5911         if (!page) {
5912                 r = -ENOMEM;
5913                 goto fail;
5914         }
5915         vcpu->arch.pio_data = page_address(page);
5916
5917         if (!kvm->arch.virtual_tsc_khz)
5918                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5919
5920         r = kvm_mmu_create(vcpu);
5921         if (r < 0)
5922                 goto fail_free_pio_data;
5923
5924         if (irqchip_in_kernel(kvm)) {
5925                 r = kvm_create_lapic(vcpu);
5926                 if (r < 0)
5927                         goto fail_mmu_destroy;
5928         }
5929
5930         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5931                                        GFP_KERNEL);
5932         if (!vcpu->arch.mce_banks) {
5933                 r = -ENOMEM;
5934                 goto fail_free_lapic;
5935         }
5936         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5937
5938         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5939                 goto fail_free_mce_banks;
5940
5941         kvm_async_pf_hash_reset(vcpu);
5942
5943         return 0;
5944 fail_free_mce_banks:
5945         kfree(vcpu->arch.mce_banks);
5946 fail_free_lapic:
5947         kvm_free_lapic(vcpu);
5948 fail_mmu_destroy:
5949         kvm_mmu_destroy(vcpu);
5950 fail_free_pio_data:
5951         free_page((unsigned long)vcpu->arch.pio_data);
5952 fail:
5953         return r;
5954 }
5955
5956 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5957 {
5958         int idx;
5959
5960         kfree(vcpu->arch.mce_banks);
5961         kvm_free_lapic(vcpu);
5962         idx = srcu_read_lock(&vcpu->kvm->srcu);
5963         kvm_mmu_destroy(vcpu);
5964         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5965         free_page((unsigned long)vcpu->arch.pio_data);
5966 }
5967
5968 struct  kvm *kvm_arch_create_vm(void)
5969 {
5970         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5971
5972         if (!kvm)
5973                 return ERR_PTR(-ENOMEM);
5974
5975         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5976         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5977
5978         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5979         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5980
5981         spin_lock_init(&kvm->arch.tsc_write_lock);
5982
5983         return kvm;
5984 }
5985
5986 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5987 {
5988         vcpu_load(vcpu);
5989         kvm_mmu_unload(vcpu);
5990         vcpu_put(vcpu);
5991 }
5992
5993 static void kvm_free_vcpus(struct kvm *kvm)
5994 {
5995         unsigned int i;
5996         struct kvm_vcpu *vcpu;
5997
5998         /*
5999          * Unpin any mmu pages first.
6000          */
6001         kvm_for_each_vcpu(i, vcpu, kvm) {
6002                 kvm_clear_async_pf_completion_queue(vcpu);
6003                 kvm_unload_vcpu_mmu(vcpu);
6004         }
6005         kvm_for_each_vcpu(i, vcpu, kvm)
6006                 kvm_arch_vcpu_free(vcpu);
6007
6008         mutex_lock(&kvm->lock);
6009         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6010                 kvm->vcpus[i] = NULL;
6011
6012         atomic_set(&kvm->online_vcpus, 0);
6013         mutex_unlock(&kvm->lock);
6014 }
6015
6016 void kvm_arch_sync_events(struct kvm *kvm)
6017 {
6018         kvm_free_all_assigned_devices(kvm);
6019         kvm_free_pit(kvm);
6020 }
6021
6022 void kvm_arch_destroy_vm(struct kvm *kvm)
6023 {
6024         kvm_iommu_unmap_guest(kvm);
6025         kfree(kvm->arch.vpic);
6026         kfree(kvm->arch.vioapic);
6027         kvm_free_vcpus(kvm);
6028         kvm_free_physmem(kvm);
6029         if (kvm->arch.apic_access_page)
6030                 put_page(kvm->arch.apic_access_page);
6031         if (kvm->arch.ept_identity_pagetable)
6032                 put_page(kvm->arch.ept_identity_pagetable);
6033         cleanup_srcu_struct(&kvm->srcu);
6034         kfree(kvm);
6035 }
6036
6037 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6038                                 struct kvm_memory_slot *memslot,
6039                                 struct kvm_memory_slot old,
6040                                 struct kvm_userspace_memory_region *mem,
6041                                 int user_alloc)
6042 {
6043         int npages = memslot->npages;
6044         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6045
6046         /* Prevent internal slot pages from being moved by fork()/COW. */
6047         if (memslot->id >= KVM_MEMORY_SLOTS)
6048                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6049
6050         /*To keep backward compatibility with older userspace,
6051          *x86 needs to hanlde !user_alloc case.
6052          */
6053         if (!user_alloc) {
6054                 if (npages && !old.rmap) {
6055                         unsigned long userspace_addr;
6056
6057                         down_write(&current->mm->mmap_sem);
6058                         userspace_addr = do_mmap(NULL, 0,
6059                                                  npages * PAGE_SIZE,
6060                                                  PROT_READ | PROT_WRITE,
6061                                                  map_flags,
6062                                                  0);
6063                         up_write(&current->mm->mmap_sem);
6064
6065                         if (IS_ERR((void *)userspace_addr))
6066                                 return PTR_ERR((void *)userspace_addr);
6067
6068                         memslot->userspace_addr = userspace_addr;
6069                 }
6070         }
6071
6072
6073         return 0;
6074 }
6075
6076 void kvm_arch_commit_memory_region(struct kvm *kvm,
6077                                 struct kvm_userspace_memory_region *mem,
6078                                 struct kvm_memory_slot old,
6079                                 int user_alloc)
6080 {
6081
6082         int npages = mem->memory_size >> PAGE_SHIFT;
6083
6084         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6085                 int ret;
6086
6087                 down_write(&current->mm->mmap_sem);
6088                 ret = do_munmap(current->mm, old.userspace_addr,
6089                                 old.npages * PAGE_SIZE);
6090                 up_write(&current->mm->mmap_sem);
6091                 if (ret < 0)
6092                         printk(KERN_WARNING
6093                                "kvm_vm_ioctl_set_memory_region: "
6094                                "failed to munmap memory\n");
6095         }
6096
6097         spin_lock(&kvm->mmu_lock);
6098         if (!kvm->arch.n_requested_mmu_pages) {
6099                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6100                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6101         }
6102
6103         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6104         spin_unlock(&kvm->mmu_lock);
6105 }
6106
6107 void kvm_arch_flush_shadow(struct kvm *kvm)
6108 {
6109         kvm_mmu_zap_all(kvm);
6110         kvm_reload_remote_mmus(kvm);
6111 }
6112
6113 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6114 {
6115         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6116                 !vcpu->arch.apf.halted)
6117                 || !list_empty_careful(&vcpu->async_pf.done)
6118                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6119                 || vcpu->arch.nmi_pending ||
6120                 (kvm_arch_interrupt_allowed(vcpu) &&
6121                  kvm_cpu_has_interrupt(vcpu));
6122 }
6123
6124 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6125 {
6126         int me;
6127         int cpu = vcpu->cpu;
6128
6129         if (waitqueue_active(&vcpu->wq)) {
6130                 wake_up_interruptible(&vcpu->wq);
6131                 ++vcpu->stat.halt_wakeup;
6132         }
6133
6134         me = get_cpu();
6135         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6136                 if (atomic_xchg(&vcpu->guest_mode, 0))
6137                         smp_send_reschedule(cpu);
6138         put_cpu();
6139 }
6140
6141 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6142 {
6143         return kvm_x86_ops->interrupt_allowed(vcpu);
6144 }
6145
6146 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6147 {
6148         unsigned long current_rip = kvm_rip_read(vcpu) +
6149                 get_segment_base(vcpu, VCPU_SREG_CS);
6150
6151         return current_rip == linear_rip;
6152 }
6153 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6154
6155 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6156 {
6157         unsigned long rflags;
6158
6159         rflags = kvm_x86_ops->get_rflags(vcpu);
6160         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6161                 rflags &= ~X86_EFLAGS_TF;
6162         return rflags;
6163 }
6164 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6165
6166 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6167 {
6168         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6169             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6170                 rflags |= X86_EFLAGS_TF;
6171         kvm_x86_ops->set_rflags(vcpu, rflags);
6172         kvm_make_request(KVM_REQ_EVENT, vcpu);
6173 }
6174 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6175
6176 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6177 {
6178         int r;
6179
6180         if (!vcpu->arch.mmu.direct_map || is_error_page(work->page))
6181                 return;
6182
6183         r = kvm_mmu_reload(vcpu);
6184         if (unlikely(r))
6185                 return;
6186
6187         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6188 }
6189
6190 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6191 {
6192         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6193 }
6194
6195 static inline u32 kvm_async_pf_next_probe(u32 key)
6196 {
6197         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6198 }
6199
6200 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6201 {
6202         u32 key = kvm_async_pf_hash_fn(gfn);
6203
6204         while (vcpu->arch.apf.gfns[key] != ~0)
6205                 key = kvm_async_pf_next_probe(key);
6206
6207         vcpu->arch.apf.gfns[key] = gfn;
6208 }
6209
6210 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6211 {
6212         int i;
6213         u32 key = kvm_async_pf_hash_fn(gfn);
6214
6215         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6216                      (vcpu->arch.apf.gfns[key] != gfn ||
6217                       vcpu->arch.apf.gfns[key] == ~0); i++)
6218                 key = kvm_async_pf_next_probe(key);
6219
6220         return key;
6221 }
6222
6223 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6224 {
6225         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6226 }
6227
6228 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6229 {
6230         u32 i, j, k;
6231
6232         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6233         while (true) {
6234                 vcpu->arch.apf.gfns[i] = ~0;
6235                 do {
6236                         j = kvm_async_pf_next_probe(j);
6237                         if (vcpu->arch.apf.gfns[j] == ~0)
6238                                 return;
6239                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6240                         /*
6241                          * k lies cyclically in ]i,j]
6242                          * |    i.k.j |
6243                          * |....j i.k.| or  |.k..j i...|
6244                          */
6245                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6246                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6247                 i = j;
6248         }
6249 }
6250
6251 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6252 {
6253
6254         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6255                                       sizeof(val));
6256 }
6257
6258 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6259                                      struct kvm_async_pf *work)
6260 {
6261         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6262         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6263
6264         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6265             kvm_x86_ops->get_cpl(vcpu) == 0)
6266                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6267         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6268                 vcpu->arch.fault.error_code = 0;
6269                 vcpu->arch.fault.address = work->arch.token;
6270                 kvm_inject_page_fault(vcpu);
6271         }
6272 }
6273
6274 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6275                                  struct kvm_async_pf *work)
6276 {
6277         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6278         if (is_error_page(work->page))
6279                 work->arch.token = ~0; /* broadcast wakeup */
6280         else
6281                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6282
6283         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6284             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6285                 vcpu->arch.fault.error_code = 0;
6286                 vcpu->arch.fault.address = work->arch.token;
6287                 kvm_inject_page_fault(vcpu);
6288         }
6289 }
6290
6291 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6292 {
6293         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6294                 return true;
6295         else
6296                 return !kvm_event_needs_reinjection(vcpu) &&
6297                         kvm_x86_ops->interrupt_allowed(vcpu);
6298 }
6299
6300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6301 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6302 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6303 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6304 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6305 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6306 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6307 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6309 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6310 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6311 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);