drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96
  97         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  98         if (++sc->ps_usecount != 1)
  99                 goto unlock;
 100
 101         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 102
 103         /*
 104          * While the hardware is asleep, the cycle counters contain no
 105          * useful data. Better clear them now so that they don't mess up
 106          * survey data results.
 107          */
 108         spin_lock(&common->cc_lock);
 109         ath_hw_cycle_counters_update(common);
 110         memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 111         spin_unlock(&common->cc_lock);
 112
 113  unlock:
 114         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 115 }
 116
 117 void ath9k_ps_restore(struct ath_softc *sc)
 118 {
 119         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 120         unsigned long flags;
 121
 122         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 123         if (--sc->ps_usecount != 0)
 124                 goto unlock;
 125
 126         spin_lock(&common->cc_lock);
 127         ath_hw_cycle_counters_update(common);
 128         spin_unlock(&common->cc_lock);
 129
 130         if (sc->ps_idle)
 131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 132         else if (sc->ps_enabled &&
 133                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 134                               PS_WAIT_FOR_CAB |
 135                               PS_WAIT_FOR_PSPOLL_DATA |
 136                               PS_WAIT_FOR_TX_ACK)))
 137                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 static void ath_start_ani(struct ath_common *common)
 144 {
 145         struct ath_hw *ah = common->ah;
 146         unsigned long timestamp = jiffies_to_msecs(jiffies);
 147         struct ath_softc *sc = (struct ath_softc *) common->priv;
 148
 149         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 150                 return;
 151
 152         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 153                 return;
 154
 155         common->ani.longcal_timer = timestamp;
 156         common->ani.shortcal_timer = timestamp;
 157         common->ani.checkani_timer = timestamp;
 158
 159         mod_timer(&common->ani.timer,
 160                   jiffies +
 161                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 162 }
 163
 164 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 165 {
 166         struct ath_hw *ah = sc->sc_ah;
 167         struct ath9k_channel *chan = &ah->channels[channel];
 168         struct survey_info *survey = &sc->survey[channel];
 169
 170         if (chan->noisefloor) {
 171                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 172                 survey->noise = chan->noisefloor;
 173         }
 174 }
 175
 176 static void ath_update_survey_stats(struct ath_softc *sc)
 177 {
 178         struct ath_hw *ah = sc->sc_ah;
 179         struct ath_common *common = ath9k_hw_common(ah);
 180         int pos = ah->curchan - &ah->channels[0];
 181         struct survey_info *survey = &sc->survey[pos];
 182         struct ath_cycle_counters *cc = &common->cc_survey;
 183         unsigned int div = common->clockrate * 1000;
 184
 185         if (!ah->curchan)
 186                 return;
 187
 188         if (ah->power_mode == ATH9K_PM_AWAKE)
 189                 ath_hw_cycle_counters_update(common);
 190
 191         if (cc->cycles > 0) {
 192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 194                         SURVEY_INFO_CHANNEL_TIME_RX |
 195                         SURVEY_INFO_CHANNEL_TIME_TX;
 196                 survey->channel_time += cc->cycles / div;
 197                 survey->channel_time_busy += cc->rx_busy / div;
 198                 survey->channel_time_rx += cc->rx_frame / div;
 199                 survey->channel_time_tx += cc->tx_frame / div;
 200         }
 201         memset(cc, 0, sizeof(*cc));
 202
 203         ath_update_survey_nf(sc, pos);
 204 }
 205
 206 /*
 207  * Set/change channels.  If the channel is really being changed, it's done
 208  * by reseting the chip.  To accomplish this we must first cleanup any pending
 209  * DMA, then restart stuff.
 210 */
 211 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 212                     struct ath9k_channel *hchan)
 213 {
 214         struct ath_wiphy *aphy = hw->priv;
 215         struct ath_hw *ah = sc->sc_ah;
 216         struct ath_common *common = ath9k_hw_common(ah);
 217         struct ieee80211_conf *conf = &common->hw->conf;
 218         bool fastcc = true, stopped;
 219         struct ieee80211_channel *channel = hw->conf.channel;
 220         struct ath9k_hw_cal_data *caldata = NULL;
 221         int r;
 222
 223         if (sc->sc_flags & SC_OP_INVALID)
 224                 return -EIO;
 225
 226         del_timer_sync(&common->ani.timer);
 227         cancel_work_sync(&sc->paprd_work);
 228         cancel_work_sync(&sc->hw_check_work);
 229         cancel_delayed_work_sync(&sc->tx_complete_work);
 230
 231         ath9k_ps_wakeup(sc);
 232
 233         spin_lock_bh(&sc->sc_pcu_lock);
 234
 235         /*
 236          * This is only performed if the channel settings have
 237          * actually changed.
 238          *
 239          * To switch channels clear any pending DMA operations;
 240          * wait long enough for the RX fifo to drain, reset the
 241          * hardware at the new frequency, and then re-enable
 242          * the relevant bits of the h/w.
 243          */
 244         ath9k_hw_disable_interrupts(ah);
 245         ath_drain_all_txq(sc, false);
 246
 247         stopped = ath_stoprecv(sc);
 248
 249         /* XXX: do not flush receive queue here. We don't want
 250          * to flush data frames already in queue because of
 251          * changing channel. */
 252
 253         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 254                 fastcc = false;
 255
 256         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 257                 caldata = &aphy->caldata;
 258
 259         ath_print(common, ATH_DBG_CONFIG,
 260                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 261                   sc->sc_ah->curchan->channel,
 262                   channel->center_freq, conf_is_ht40(conf),
 263                   fastcc);
 264
 265         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 266         if (r) {
 267                 ath_print(common, ATH_DBG_FATAL,
 268                           "Unable to reset channel (%u MHz), "
 269                           "reset status %d\n",
 270                           channel->center_freq, r);
 271                 goto ps_restore;
 272         }
 273
 274         if (ath_startrecv(sc) != 0) {
 275                 ath_print(common, ATH_DBG_FATAL,
 276                           "Unable to restart recv logic\n");
 277                 r = -EIO;
 278                 goto ps_restore;
 279         }
 280
 281         ath_update_txpow(sc);
 282         ath9k_hw_set_interrupts(ah, ah->imask);
 283
 284         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 285                 ath_beacon_config(sc, NULL);
 286                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 287                 ath_start_ani(common);
 288         }
 289
 290  ps_restore:
 291         spin_unlock_bh(&sc->sc_pcu_lock);
 292
 293         ath9k_ps_restore(sc);
 294         return r;
 295 }
 296
 297 static void ath_paprd_activate(struct ath_softc *sc)
 298 {
 299         struct ath_hw *ah = sc->sc_ah;
 300         struct ath9k_hw_cal_data *caldata = ah->caldata;
 301         struct ath_common *common = ath9k_hw_common(ah);
 302         int chain;
 303
 304         if (!caldata || !caldata->paprd_done)
 305                 return;
 306
 307         ath9k_ps_wakeup(sc);
 308         ar9003_paprd_enable(ah, false);
 309         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 310                 if (!(common->tx_chainmask & BIT(chain)))
 311                         continue;
 312
 313                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 314         }
 315
 316         ar9003_paprd_enable(ah, true);
 317         ath9k_ps_restore(sc);
 318 }
 319
 320 void ath_paprd_calibrate(struct work_struct *work)
 321 {
 322         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 323         struct ieee80211_hw *hw = sc->hw;
 324         struct ath_hw *ah = sc->sc_ah;
 325         struct ieee80211_hdr *hdr;
 326         struct sk_buff *skb = NULL;
 327         struct ieee80211_tx_info *tx_info;
 328         int band = hw->conf.channel->band;
 329         struct ieee80211_supported_band *sband = &sc->sbands[band];
 330         struct ath_tx_control txctl;
 331         struct ath9k_hw_cal_data *caldata = ah->caldata;
 332         struct ath_common *common = ath9k_hw_common(ah);
 333         int ftype;
 334         int chain_ok = 0;
 335         int chain;
 336         int len = 1800;
 337         int time_left;
 338         int i;
 339
 340         if (!caldata)
 341                 return;
 342
 343         skb = alloc_skb(len, GFP_KERNEL);
 344         if (!skb)
 345                 return;
 346
 347         tx_info = IEEE80211_SKB_CB(skb);
 348
 349         skb_put(skb, len);
 350         memset(skb->data, 0, len);
 351         hdr = (struct ieee80211_hdr *)skb->data;
 352         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 353         hdr->frame_control = cpu_to_le16(ftype);
 354         hdr->duration_id = cpu_to_le16(10);
 355         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 356         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 357         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 358
 359         memset(&txctl, 0, sizeof(txctl));
 360         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 361
 362         ath9k_ps_wakeup(sc);
 363         ar9003_paprd_init_table(ah);
 364         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 365                 if (!(common->tx_chainmask & BIT(chain)))
 366                         continue;
 367
 368                 chain_ok = 0;
 369                 memset(tx_info, 0, sizeof(*tx_info));
 370                 tx_info->band = band;
 371
 372                 for (i = 0; i < 4; i++) {
 373                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 374                         tx_info->control.rates[i].count = 6;
 375                 }
 376
 377                 init_completion(&sc->paprd_complete);
 378                 sc->paprd_pending = true;
 379                 ar9003_paprd_setup_gain_table(ah, chain);
 380                 txctl.paprd = BIT(chain);
 381                 if (ath_tx_start(hw, skb, &txctl) != 0)
 382                         break;
 383
 384                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 385                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 386                 sc->paprd_pending = false;
 387                 if (!time_left) {
 388                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 389                                   "Timeout waiting for paprd training on "
 390                                   "TX chain %d\n",
 391                                   chain);
 392                         goto fail_paprd;
 393                 }
 394
 395                 if (!ar9003_paprd_is_done(ah))
 396                         break;
 397
 398                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 399                         break;
 400
 401                 chain_ok = 1;
 402         }
 403         kfree_skb(skb);
 404
 405         if (chain_ok) {
 406                 caldata->paprd_done = true;
 407                 ath_paprd_activate(sc);
 408         }
 409
 410 fail_paprd:
 411         ath9k_ps_restore(sc);
 412 }
 413
 414 /*
 415  *  This routine performs the periodic noise floor calibration function
 416  *  that is used to adjust and optimize the chip performance.  This
 417  *  takes environmental changes (location, temperature) into account.
 418  *  When the task is complete, it reschedules itself depending on the
 419  *  appropriate interval that was calculated.
 420  */
 421 void ath_ani_calibrate(unsigned long data)
 422 {
 423         struct ath_softc *sc = (struct ath_softc *)data;
 424         struct ath_hw *ah = sc->sc_ah;
 425         struct ath_common *common = ath9k_hw_common(ah);
 426         bool longcal = false;
 427         bool shortcal = false;
 428         bool aniflag = false;
 429         unsigned int timestamp = jiffies_to_msecs(jiffies);
 430         u32 cal_interval, short_cal_interval, long_cal_interval;
 431         unsigned long flags;
 432
 433         if (ah->caldata && ah->caldata->nfcal_interference)
 434                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 435         else
 436                 long_cal_interval = ATH_LONG_CALINTERVAL;
 437
 438         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 439                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 440
 441         /* Only calibrate if awake */
 442         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 443                 goto set_timer;
 444
 445         ath9k_ps_wakeup(sc);
 446
 447         /* Long calibration runs independently of short calibration. */
 448         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 449                 longcal = true;
 450                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 451                 common->ani.longcal_timer = timestamp;
 452         }
 453
 454         /* Short calibration applies only while caldone is false */
 455         if (!common->ani.caldone) {
 456                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 457                         shortcal = true;
 458                         ath_print(common, ATH_DBG_ANI,
 459                                   "shortcal @%lu\n", jiffies);
 460                         common->ani.shortcal_timer = timestamp;
 461                         common->ani.resetcal_timer = timestamp;
 462                 }
 463         } else {
 464                 if ((timestamp - common->ani.resetcal_timer) >=
 465                     ATH_RESTART_CALINTERVAL) {
 466                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 467                         if (common->ani.caldone)
 468                                 common->ani.resetcal_timer = timestamp;
 469                 }
 470         }
 471
 472         /* Verify whether we must check ANI */
 473         if ((timestamp - common->ani.checkani_timer) >=
 474              ah->config.ani_poll_interval) {
 475                 aniflag = true;
 476                 common->ani.checkani_timer = timestamp;
 477         }
 478
 479         /* Skip all processing if there's nothing to do. */
 480         if (longcal || shortcal || aniflag) {
 481                 /* Call ANI routine if necessary */
 482                 if (aniflag) {
 483                         spin_lock_irqsave(&common->cc_lock, flags);
 484                         ath9k_hw_ani_monitor(ah, ah->curchan);
 485                         ath_update_survey_stats(sc);
 486                         spin_unlock_irqrestore(&common->cc_lock, flags);
 487                 }
 488
 489                 /* Perform calibration if necessary */
 490                 if (longcal || shortcal) {
 491                         common->ani.caldone =
 492                                 ath9k_hw_calibrate(ah,
 493                                                    ah->curchan,
 494                                                    common->rx_chainmask,
 495                                                    longcal);
 496                 }
 497         }
 498
 499         ath9k_ps_restore(sc);
 500
 501 set_timer:
 502         /*
 503         * Set timer interval based on previous results.
 504         * The interval must be the shortest necessary to satisfy ANI,
 505         * short calibration and long calibration.
 506         */
 507         cal_interval = ATH_LONG_CALINTERVAL;
 508         if (sc->sc_ah->config.enable_ani)
 509                 cal_interval = min(cal_interval,
 510                                    (u32)ah->config.ani_poll_interval);
 511         if (!common->ani.caldone)
 512                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 513
 514         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 515         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 516                 if (!ah->caldata->paprd_done)
 517                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 518                 else
 519                         ath_paprd_activate(sc);
 520         }
 521 }
 522
 523 /*
 524  * Update tx/rx chainmask. For legacy association,
 525  * hard code chainmask to 1x1, for 11n association, use
 526  * the chainmask configuration, for bt coexistence, use
 527  * the chainmask configuration even in legacy mode.
 528  */
 529 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 530 {
 531         struct ath_hw *ah = sc->sc_ah;
 532         struct ath_common *common = ath9k_hw_common(ah);
 533
 534         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 535             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 536                 common->tx_chainmask = ah->caps.tx_chainmask;
 537                 common->rx_chainmask = ah->caps.rx_chainmask;
 538         } else {
 539                 common->tx_chainmask = 1;
 540                 common->rx_chainmask = 1;
 541         }
 542
 543         ath_print(common, ATH_DBG_CONFIG,
 544                   "tx chmask: %d, rx chmask: %d\n",
 545                   common->tx_chainmask,
 546                   common->rx_chainmask);
 547 }
 548
 549 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 550 {
 551         struct ath_node *an;
 552
 553         an = (struct ath_node *)sta->drv_priv;
 554
 555         if (sc->sc_flags & SC_OP_TXAGGR) {
 556                 ath_tx_node_init(sc, an);
 557                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 558                                      sta->ht_cap.ampdu_factor);
 559                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 560         }
 561 }
 562
 563 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 564 {
 565         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 566
 567         if (sc->sc_flags & SC_OP_TXAGGR)
 568                 ath_tx_node_cleanup(sc, an);
 569 }
 570
 571 void ath_hw_check(struct work_struct *work)
 572 {
 573         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 574         int i;
 575
 576         ath9k_ps_wakeup(sc);
 577
 578         for (i = 0; i < 3; i++) {
 579                 if (ath9k_hw_check_alive(sc->sc_ah))
 580                         goto out;
 581
 582                 msleep(1);
 583         }
 584         ath_reset(sc, true);
 585
 586 out:
 587         ath9k_ps_restore(sc);
 588 }
 589
 590 void ath9k_tasklet(unsigned long data)
 591 {
 592         struct ath_softc *sc = (struct ath_softc *)data;
 593         struct ath_hw *ah = sc->sc_ah;
 594         struct ath_common *common = ath9k_hw_common(ah);
 595
 596         u32 status = sc->intrstatus;
 597         u32 rxmask;
 598
 599         ath9k_ps_wakeup(sc);
 600
 601         if (status & ATH9K_INT_FATAL) {
 602                 ath_reset(sc, true);
 603                 ath9k_ps_restore(sc);
 604                 return;
 605         }
 606
 607         spin_lock_bh(&sc->sc_pcu_lock);
 608
 609         if (!ath9k_hw_check_alive(ah))
 610                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 611
 612         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 613                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 614                           ATH9K_INT_RXORN);
 615         else
 616                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 617
 618         if (status & rxmask) {
 619                 /* Check for high priority Rx first */
 620                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 621                     (status & ATH9K_INT_RXHP))
 622                         ath_rx_tasklet(sc, 0, true);
 623
 624                 ath_rx_tasklet(sc, 0, false);
 625         }
 626
 627         if (status & ATH9K_INT_TX) {
 628                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 629                         ath_tx_edma_tasklet(sc);
 630                 else
 631                         ath_tx_tasklet(sc);
 632         }
 633
 634         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 635                 /*
 636                  * TSF sync does not look correct; remain awake to sync with
 637                  * the next Beacon.
 638                  */
 639                 ath_print(common, ATH_DBG_PS,
 640                           "TSFOOR - Sync with next Beacon\n");
 641                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 642         }
 643
 644         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 645                 if (status & ATH9K_INT_GENTIMER)
 646                         ath_gen_timer_isr(sc->sc_ah);
 647
 648         /* re-enable hardware interrupt */
 649         ath9k_hw_enable_interrupts(ah);
 650
 651         spin_unlock_bh(&sc->sc_pcu_lock);
 652         ath9k_ps_restore(sc);
 653 }
 654
 655 irqreturn_t ath_isr(int irq, void *dev)
 656 {
 657 #define SCHED_INTR (                            \
 658                 ATH9K_INT_FATAL |               \
 659                 ATH9K_INT_RXORN |               \
 660                 ATH9K_INT_RXEOL |               \
 661                 ATH9K_INT_RX |                  \
 662                 ATH9K_INT_RXLP |                \
 663                 ATH9K_INT_RXHP |                \
 664                 ATH9K_INT_TX |                  \
 665                 ATH9K_INT_BMISS |               \
 666                 ATH9K_INT_CST |                 \
 667                 ATH9K_INT_TSFOOR |              \
 668                 ATH9K_INT_GENTIMER)
 669
 670         struct ath_softc *sc = dev;
 671         struct ath_hw *ah = sc->sc_ah;
 672         struct ath_common *common = ath9k_hw_common(ah);
 673         enum ath9k_int status;
 674         bool sched = false;
 675
 676         /*
 677          * The hardware is not ready/present, don't
 678          * touch anything. Note this can happen early
 679          * on if the IRQ is shared.
 680          */
 681         if (sc->sc_flags & SC_OP_INVALID)
 682                 return IRQ_NONE;
 683
 684
 685         /* shared irq, not for us */
 686
 687         if (!ath9k_hw_intrpend(ah))
 688                 return IRQ_NONE;
 689
 690         /*
 691          * Figure out the reason(s) for the interrupt.  Note
 692          * that the hal returns a pseudo-ISR that may include
 693          * bits we haven't explicitly enabled so we mask the
 694          * value to insure we only process bits we requested.
 695          */
 696         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 697         status &= ah->imask;    /* discard unasked-for bits */
 698
 699         /*
 700          * If there are no status bits set, then this interrupt was not
 701          * for me (should have been caught above).
 702          */
 703         if (!status)
 704                 return IRQ_NONE;
 705
 706         /* Cache the status */
 707         sc->intrstatus = status;
 708
 709         if (status & SCHED_INTR)
 710                 sched = true;
 711
 712         /*
 713          * If a FATAL or RXORN interrupt is received, we have to reset the
 714          * chip immediately.
 715          */
 716         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 717             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 718                 goto chip_reset;
 719
 720         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 721             (status & ATH9K_INT_BB_WATCHDOG)) {
 722
 723                 spin_lock(&common->cc_lock);
 724                 ath_hw_cycle_counters_update(common);
 725                 ar9003_hw_bb_watchdog_dbg_info(ah);
 726                 spin_unlock(&common->cc_lock);
 727
 728                 goto chip_reset;
 729         }
 730
 731         if (status & ATH9K_INT_SWBA)
 732                 tasklet_schedule(&sc->bcon_tasklet);
 733
 734         if (status & ATH9K_INT_TXURN)
 735                 ath9k_hw_updatetxtriglevel(ah, true);
 736
 737         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 738                 if (status & ATH9K_INT_RXEOL) {
 739                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 740                         ath9k_hw_set_interrupts(ah, ah->imask);
 741                 }
 742         }
 743
 744         if (status & ATH9K_INT_MIB) {
 745                 /*
 746                  * Disable interrupts until we service the MIB
 747                  * interrupt; otherwise it will continue to
 748                  * fire.
 749                  */
 750                 ath9k_hw_disable_interrupts(ah);
 751                 /*
 752                  * Let the hal handle the event. We assume
 753                  * it will clear whatever condition caused
 754                  * the interrupt.
 755                  */
 756                 spin_lock(&common->cc_lock);
 757                 ath9k_hw_proc_mib_event(ah);
 758                 spin_unlock(&common->cc_lock);
 759                 ath9k_hw_enable_interrupts(ah);
 760         }
 761
 762         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 763                 if (status & ATH9K_INT_TIM_TIMER) {
 764                         /* Clear RxAbort bit so that we can
 765                          * receive frames */
 766                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 767                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 768                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 769                 }
 770
 771 chip_reset:
 772
 773         ath_debug_stat_interrupt(sc, status);
 774
 775         if (sched) {
 776                 /* turn off every interrupt */
 777                 ath9k_hw_disable_interrupts(ah);
 778                 tasklet_schedule(&sc->intr_tq);
 779         }
 780
 781         return IRQ_HANDLED;
 782
 783 #undef SCHED_INTR
 784 }
 785
 786 static u32 ath_get_extchanmode(struct ath_softc *sc,
 787                                struct ieee80211_channel *chan,
 788                                enum nl80211_channel_type channel_type)
 789 {
 790         u32 chanmode = 0;
 791
 792         switch (chan->band) {
 793         case IEEE80211_BAND_2GHZ:
 794                 switch(channel_type) {
 795                 case NL80211_CHAN_NO_HT:
 796                 case NL80211_CHAN_HT20:
 797                         chanmode = CHANNEL_G_HT20;
 798                         break;
 799                 case NL80211_CHAN_HT40PLUS:
 800                         chanmode = CHANNEL_G_HT40PLUS;
 801                         break;
 802                 case NL80211_CHAN_HT40MINUS:
 803                         chanmode = CHANNEL_G_HT40MINUS;
 804                         break;
 805                 }
 806                 break;
 807         case IEEE80211_BAND_5GHZ:
 808                 switch(channel_type) {
 809                 case NL80211_CHAN_NO_HT:
 810                 case NL80211_CHAN_HT20:
 811                         chanmode = CHANNEL_A_HT20;
 812                         break;
 813                 case NL80211_CHAN_HT40PLUS:
 814                         chanmode = CHANNEL_A_HT40PLUS;
 815                         break;
 816                 case NL80211_CHAN_HT40MINUS:
 817                         chanmode = CHANNEL_A_HT40MINUS;
 818                         break;
 819                 }
 820                 break;
 821         default:
 822                 break;
 823         }
 824
 825         return chanmode;
 826 }
 827
 828 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 829                                  struct ieee80211_hw *hw,
 830                                  struct ieee80211_vif *vif,
 831                                  struct ieee80211_bss_conf *bss_conf)
 832 {
 833         struct ath_wiphy *aphy = hw->priv;
 834         struct ath_hw *ah = sc->sc_ah;
 835         struct ath_common *common = ath9k_hw_common(ah);
 836
 837         if (bss_conf->assoc) {
 838                 ath_print(common, ATH_DBG_CONFIG,
 839                           "Bss Info ASSOC %d, bssid: %pM\n",
 840                            bss_conf->aid, common->curbssid);
 841
 842                 /* New association, store aid */
 843                 common->curaid = bss_conf->aid;
 844                 ath9k_hw_write_associd(ah);
 845
 846                 /*
 847                  * Request a re-configuration of Beacon related timers
 848                  * on the receipt of the first Beacon frame (i.e.,
 849                  * after time sync with the AP).
 850                  */
 851                 sc->ps_flags |= PS_BEACON_SYNC;
 852
 853                 /* Configure the beacon */
 854                 ath_beacon_config(sc, vif);
 855
 856                 /* Reset rssi stats */
 857                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 858                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 859
 860                 sc->sc_flags |= SC_OP_ANI_RUN;
 861                 ath_start_ani(common);
 862         } else {
 863                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 864                 common->curaid = 0;
 865                 /* Stop ANI */
 866                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 867                 del_timer_sync(&common->ani.timer);
 868         }
 869 }
 870
 871 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 872 {
 873         struct ath_hw *ah = sc->sc_ah;
 874         struct ath_common *common = ath9k_hw_common(ah);
 875         struct ieee80211_channel *channel = hw->conf.channel;
 876         int r;
 877
 878         ath9k_ps_wakeup(sc);
 879         spin_lock_bh(&sc->sc_pcu_lock);
 880
 881         ath9k_hw_configpcipowersave(ah, 0, 0);
 882
 883         if (!ah->curchan)
 884                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 885
 886         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 887         if (r) {
 888                 ath_print(common, ATH_DBG_FATAL,
 889                           "Unable to reset channel (%u MHz), "
 890                           "reset status %d\n",
 891                           channel->center_freq, r);
 892         }
 893
 894         ath_update_txpow(sc);
 895         if (ath_startrecv(sc) != 0) {
 896                 ath_print(common, ATH_DBG_FATAL,
 897                           "Unable to restart recv logic\n");
 898                 spin_unlock_bh(&sc->sc_pcu_lock);
 899                 return;
 900         }
 901         if (sc->sc_flags & SC_OP_BEACONS)
 902                 ath_beacon_config(sc, NULL);    /* restart beacons */
 903
 904         /* Re-Enable  interrupts */
 905         ath9k_hw_set_interrupts(ah, ah->imask);
 906
 907         /* Enable LED */
 908         ath9k_hw_cfg_output(ah, ah->led_pin,
 909                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 910         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 911
 912         ieee80211_wake_queues(hw);
 913         spin_unlock_bh(&sc->sc_pcu_lock);
 914
 915         ath9k_ps_restore(sc);
 916 }
 917
 918 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 919 {
 920         struct ath_hw *ah = sc->sc_ah;
 921         struct ieee80211_channel *channel = hw->conf.channel;
 922         int r;
 923
 924         ath9k_ps_wakeup(sc);
 925         spin_lock_bh(&sc->sc_pcu_lock);
 926
 927         ieee80211_stop_queues(hw);
 928
 929         /*
 930          * Keep the LED on when the radio is disabled
 931          * during idle unassociated state.
 932          */
 933         if (!sc->ps_idle) {
 934                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 935                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 936         }
 937
 938         /* Disable interrupts */
 939         ath9k_hw_disable_interrupts(ah);
 940
 941         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 942
 943         ath_stoprecv(sc);               /* turn off frame recv */
 944         ath_flushrecv(sc);              /* flush recv queue */
 945
 946         if (!ah->curchan)
 947                 ah->curchan = ath_get_curchannel(sc, hw);
 948
 949         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 950         if (r) {
 951                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 952                           "Unable to reset channel (%u MHz), "
 953                           "reset status %d\n",
 954                           channel->center_freq, r);
 955         }
 956
 957         ath9k_hw_phy_disable(ah);
 958
 959         ath9k_hw_configpcipowersave(ah, 1, 1);
 960
 961         spin_unlock_bh(&sc->sc_pcu_lock);
 962         ath9k_ps_restore(sc);
 963
 964         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 965 }
 966
 967 int ath_reset(struct ath_softc *sc, bool retry_tx)
 968 {
 969         struct ath_hw *ah = sc->sc_ah;
 970         struct ath_common *common = ath9k_hw_common(ah);
 971         struct ieee80211_hw *hw = sc->hw;
 972         int r;
 973
 974         /* Stop ANI */
 975         del_timer_sync(&common->ani.timer);
 976
 977         spin_lock_bh(&sc->sc_pcu_lock);
 978
 979         ieee80211_stop_queues(hw);
 980
 981         ath9k_hw_disable_interrupts(ah);
 982         ath_drain_all_txq(sc, retry_tx);
 983
 984         ath_stoprecv(sc);
 985         ath_flushrecv(sc);
 986
 987         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 988         if (r)
 989                 ath_print(common, ATH_DBG_FATAL,
 990                           "Unable to reset hardware; reset status %d\n", r);
 991
 992         if (ath_startrecv(sc) != 0)
 993                 ath_print(common, ATH_DBG_FATAL,
 994                           "Unable to start recv logic\n");
 995
 996         /*
 997          * We may be doing a reset in response to a request
 998          * that changes the channel so update any state that
 999          * might change as a result.
1000          */
1001         ath_update_txpow(sc);
1002
1003         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1004                 ath_beacon_config(sc, NULL);    /* restart beacons */
1005
1006         ath9k_hw_set_interrupts(ah, ah->imask);
1007
1008         if (retry_tx) {
1009                 int i;
1010                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1011                         if (ATH_TXQ_SETUP(sc, i)) {
1012                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1013                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1014                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1015                         }
1016                 }
1017         }
1018
1019         ieee80211_wake_queues(hw);
1020         spin_unlock_bh(&sc->sc_pcu_lock);
1021
1022         /* Start ANI */
1023         ath_start_ani(common);
1024
1025         return r;
1026 }
1027
1028 /* XXX: Remove me once we don't depend on ath9k_channel for all
1029  * this redundant data */
1030 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1031                            struct ath9k_channel *ichan)
1032 {
1033         struct ieee80211_channel *chan = hw->conf.channel;
1034         struct ieee80211_conf *conf = &hw->conf;
1035
1036         ichan->channel = chan->center_freq;
1037         ichan->chan = chan;
1038
1039         if (chan->band == IEEE80211_BAND_2GHZ) {
1040                 ichan->chanmode = CHANNEL_G;
1041                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1042         } else {
1043                 ichan->chanmode = CHANNEL_A;
1044                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1045         }
1046
1047         if (conf_is_ht(conf))
1048                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1049                                             conf->channel_type);
1050 }
1051
1052 /**********************/
1053 /* mac80211 callbacks */
1054 /**********************/
1055
1056 static int ath9k_start(struct ieee80211_hw *hw)
1057 {
1058         struct ath_wiphy *aphy = hw->priv;
1059         struct ath_softc *sc = aphy->sc;
1060         struct ath_hw *ah = sc->sc_ah;
1061         struct ath_common *common = ath9k_hw_common(ah);
1062         struct ieee80211_channel *curchan = hw->conf.channel;
1063         struct ath9k_channel *init_channel;
1064         int r;
1065
1066         ath_print(common, ATH_DBG_CONFIG,
1067                   "Starting driver with initial channel: %d MHz\n",
1068                   curchan->center_freq);
1069
1070         mutex_lock(&sc->mutex);
1071
1072         if (ath9k_wiphy_started(sc)) {
1073                 if (sc->chan_idx == curchan->hw_value) {
1074                         /*
1075                          * Already on the operational channel, the new wiphy
1076                          * can be marked active.
1077                          */
1078                         aphy->state = ATH_WIPHY_ACTIVE;
1079                         ieee80211_wake_queues(hw);
1080                 } else {
1081                         /*
1082                          * Another wiphy is on another channel, start the new
1083                          * wiphy in paused state.
1084                          */
1085                         aphy->state = ATH_WIPHY_PAUSED;
1086                         ieee80211_stop_queues(hw);
1087                 }
1088                 mutex_unlock(&sc->mutex);
1089                 return 0;
1090         }
1091         aphy->state = ATH_WIPHY_ACTIVE;
1092
1093         /* setup initial channel */
1094
1095         sc->chan_idx = curchan->hw_value;
1096
1097         init_channel = ath_get_curchannel(sc, hw);
1098
1099         /* Reset SERDES registers */
1100         ath9k_hw_configpcipowersave(ah, 0, 0);
1101
1102         /*
1103          * The basic interface to setting the hardware in a good
1104          * state is ``reset''.  On return the hardware is known to
1105          * be powered up and with interrupts disabled.  This must
1106          * be followed by initialization of the appropriate bits
1107          * and then setup of the interrupt mask.
1108          */
1109         spin_lock_bh(&sc->sc_pcu_lock);
1110         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1111         if (r) {
1112                 ath_print(common, ATH_DBG_FATAL,
1113                           "Unable to reset hardware; reset status %d "
1114                           "(freq %u MHz)\n", r,
1115                           curchan->center_freq);
1116                 spin_unlock_bh(&sc->sc_pcu_lock);
1117                 goto mutex_unlock;
1118         }
1119
1120         /*
1121          * This is needed only to setup initial state
1122          * but it's best done after a reset.
1123          */
1124         ath_update_txpow(sc);
1125
1126         /*
1127          * Setup the hardware after reset:
1128          * The receive engine is set going.
1129          * Frame transmit is handled entirely
1130          * in the frame output path; there's nothing to do
1131          * here except setup the interrupt mask.
1132          */
1133         if (ath_startrecv(sc) != 0) {
1134                 ath_print(common, ATH_DBG_FATAL,
1135                           "Unable to start recv logic\n");
1136                 r = -EIO;
1137                 spin_unlock_bh(&sc->sc_pcu_lock);
1138                 goto mutex_unlock;
1139         }
1140         spin_unlock_bh(&sc->sc_pcu_lock);
1141
1142         /* Setup our intr mask. */
1143         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1144                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1145                     ATH9K_INT_GLOBAL;
1146
1147         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1148                 ah->imask |= ATH9K_INT_RXHP |
1149                              ATH9K_INT_RXLP |
1150                              ATH9K_INT_BB_WATCHDOG;
1151         else
1152                 ah->imask |= ATH9K_INT_RX;
1153
1154         ah->imask |= ATH9K_INT_GTT;
1155
1156         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1157                 ah->imask |= ATH9K_INT_CST;
1158
1159         sc->sc_flags &= ~SC_OP_INVALID;
1160
1161         /* Disable BMISS interrupt when we're not associated */
1162         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1163         ath9k_hw_set_interrupts(ah, ah->imask);
1164
1165         ieee80211_wake_queues(hw);
1166
1167         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1168
1169         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1170             !ah->btcoex_hw.enabled) {
1171                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1172                                            AR_STOMP_LOW_WLAN_WGHT);
1173                 ath9k_hw_btcoex_enable(ah);
1174
1175                 if (common->bus_ops->bt_coex_prep)
1176                         common->bus_ops->bt_coex_prep(common);
1177                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1178                         ath9k_btcoex_timer_resume(sc);
1179         }
1180
1181 mutex_unlock:
1182         mutex_unlock(&sc->mutex);
1183
1184         return r;
1185 }
1186
1187 static int ath9k_tx(struct ieee80211_hw *hw,
1188                     struct sk_buff *skb)
1189 {
1190         struct ath_wiphy *aphy = hw->priv;
1191         struct ath_softc *sc = aphy->sc;
1192         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1193         struct ath_tx_control txctl;
1194         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1195
1196         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1197                 ath_print(common, ATH_DBG_XMIT,
1198                           "ath9k: %s: TX in unexpected wiphy state "
1199                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1200                 goto exit;
1201         }
1202
1203         if (sc->ps_enabled) {
1204                 /*
1205                  * mac80211 does not set PM field for normal data frames, so we
1206                  * need to update that based on the current PS mode.
1207                  */
1208                 if (ieee80211_is_data(hdr->frame_control) &&
1209                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1210                     !ieee80211_has_pm(hdr->frame_control)) {
1211                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1212                                   "while in PS mode\n");
1213                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1214                 }
1215         }
1216
1217         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1218                 /*
1219                  * We are using PS-Poll and mac80211 can request TX while in
1220                  * power save mode. Need to wake up hardware for the TX to be
1221                  * completed and if needed, also for RX of buffered frames.
1222                  */
1223                 ath9k_ps_wakeup(sc);
1224                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1225                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1226                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1227                         ath_print(common, ATH_DBG_PS,
1228                                   "Sending PS-Poll to pick a buffered frame\n");
1229                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1230                 } else {
1231                         ath_print(common, ATH_DBG_PS,
1232                                   "Wake up to complete TX\n");
1233                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1234                 }
1235                 /*
1236                  * The actual restore operation will happen only after
1237                  * the sc_flags bit is cleared. We are just dropping
1238                  * the ps_usecount here.
1239                  */
1240                 ath9k_ps_restore(sc);
1241         }
1242
1243         memset(&txctl, 0, sizeof(struct ath_tx_control));
1244         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1245
1246         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1247
1248         if (ath_tx_start(hw, skb, &txctl) != 0) {
1249                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1250                 goto exit;
1251         }
1252
1253         return 0;
1254 exit:
1255         dev_kfree_skb_any(skb);
1256         return 0;
1257 }
1258
1259 static void ath9k_stop(struct ieee80211_hw *hw)
1260 {
1261         struct ath_wiphy *aphy = hw->priv;
1262         struct ath_softc *sc = aphy->sc;
1263         struct ath_hw *ah = sc->sc_ah;
1264         struct ath_common *common = ath9k_hw_common(ah);
1265         int i;
1266
1267         mutex_lock(&sc->mutex);
1268
1269         aphy->state = ATH_WIPHY_INACTIVE;
1270
1271         if (led_blink)
1272                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1273
1274         cancel_delayed_work_sync(&sc->tx_complete_work);
1275         cancel_work_sync(&sc->paprd_work);
1276         cancel_work_sync(&sc->hw_check_work);
1277
1278         for (i = 0; i < sc->num_sec_wiphy; i++) {
1279                 if (sc->sec_wiphy[i])
1280                         break;
1281         }
1282
1283         if (i == sc->num_sec_wiphy) {
1284                 cancel_delayed_work_sync(&sc->wiphy_work);
1285                 cancel_work_sync(&sc->chan_work);
1286         }
1287
1288         if (sc->sc_flags & SC_OP_INVALID) {
1289                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1290                 mutex_unlock(&sc->mutex);
1291                 return;
1292         }
1293
1294         if (ath9k_wiphy_started(sc)) {
1295                 mutex_unlock(&sc->mutex);
1296                 return; /* another wiphy still in use */
1297         }
1298
1299         /* Ensure HW is awake when we try to shut it down. */
1300         ath9k_ps_wakeup(sc);
1301
1302         if (ah->btcoex_hw.enabled) {
1303                 ath9k_hw_btcoex_disable(ah);
1304                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1305                         ath9k_btcoex_timer_pause(sc);
1306         }
1307
1308         spin_lock_bh(&sc->sc_pcu_lock);
1309
1310         /* make sure h/w will not generate any interrupt
1311          * before setting the invalid flag. */
1312         ath9k_hw_disable_interrupts(ah);
1313
1314         if (!(sc->sc_flags & SC_OP_INVALID)) {
1315                 ath_drain_all_txq(sc, false);
1316                 ath_stoprecv(sc);
1317                 ath9k_hw_phy_disable(ah);
1318         } else
1319                 sc->rx.rxlink = NULL;
1320
1321         /* disable HAL and put h/w to sleep */
1322         ath9k_hw_disable(ah);
1323         ath9k_hw_configpcipowersave(ah, 1, 1);
1324
1325         spin_unlock_bh(&sc->sc_pcu_lock);
1326
1327         ath9k_ps_restore(sc);
1328
1329         /* Finally, put the chip in FULL SLEEP mode */
1330         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1331
1332         sc->sc_flags |= SC_OP_INVALID;
1333
1334         mutex_unlock(&sc->mutex);
1335
1336         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1337 }
1338
1339 static int ath9k_add_interface(struct ieee80211_hw *hw,
1340                                struct ieee80211_vif *vif)
1341 {
1342         struct ath_wiphy *aphy = hw->priv;
1343         struct ath_softc *sc = aphy->sc;
1344         struct ath_hw *ah = sc->sc_ah;
1345         struct ath_common *common = ath9k_hw_common(ah);
1346         struct ath_vif *avp = (void *)vif->drv_priv;
1347         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1348         int ret = 0;
1349
1350         mutex_lock(&sc->mutex);
1351
1352         switch (vif->type) {
1353         case NL80211_IFTYPE_STATION:
1354                 ic_opmode = NL80211_IFTYPE_STATION;
1355                 break;
1356         case NL80211_IFTYPE_WDS:
1357                 ic_opmode = NL80211_IFTYPE_WDS;
1358                 break;
1359         case NL80211_IFTYPE_ADHOC:
1360         case NL80211_IFTYPE_AP:
1361         case NL80211_IFTYPE_MESH_POINT:
1362                 if (sc->nbcnvifs >= ATH_BCBUF) {
1363                         ret = -ENOBUFS;
1364                         goto out;
1365                 }
1366                 ic_opmode = vif->type;
1367                 break;
1368         default:
1369                 ath_print(common, ATH_DBG_FATAL,
1370                         "Interface type %d not yet supported\n", vif->type);
1371                 ret = -EOPNOTSUPP;
1372                 goto out;
1373         }
1374
1375         ath_print(common, ATH_DBG_CONFIG,
1376                   "Attach a VIF of type: %d\n", ic_opmode);
1377
1378         /* Set the VIF opmode */
1379         avp->av_opmode = ic_opmode;
1380         avp->av_bslot = -1;
1381
1382         sc->nvifs++;
1383
1384         ath9k_set_bssid_mask(hw, vif);
1385
1386         if (sc->nvifs > 1)
1387                 goto out; /* skip global settings for secondary vif */
1388
1389         if (ic_opmode == NL80211_IFTYPE_AP) {
1390                 ath9k_hw_set_tsfadjust(ah, 1);
1391                 sc->sc_flags |= SC_OP_TSF_RESET;
1392         }
1393
1394         /* Set the device opmode */
1395         ah->opmode = ic_opmode;
1396
1397         /*
1398          * Enable MIB interrupts when there are hardware phy counters.
1399          * Note we only do this (at the moment) for station mode.
1400          */
1401         if ((vif->type == NL80211_IFTYPE_STATION) ||
1402             (vif->type == NL80211_IFTYPE_ADHOC) ||
1403             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1404                 if (ah->config.enable_ani)
1405                         ah->imask |= ATH9K_INT_MIB;
1406                 ah->imask |= ATH9K_INT_TSFOOR;
1407         }
1408
1409         ath9k_hw_set_interrupts(ah, ah->imask);
1410
1411         if (vif->type == NL80211_IFTYPE_AP    ||
1412             vif->type == NL80211_IFTYPE_ADHOC ||
1413             vif->type == NL80211_IFTYPE_MONITOR) {
1414                 sc->sc_flags |= SC_OP_ANI_RUN;
1415                 ath_start_ani(common);
1416         }
1417
1418 out:
1419         mutex_unlock(&sc->mutex);
1420         return ret;
1421 }
1422
1423 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1424                                    struct ieee80211_vif *vif)
1425 {
1426         struct ath_wiphy *aphy = hw->priv;
1427         struct ath_softc *sc = aphy->sc;
1428         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1429         struct ath_vif *avp = (void *)vif->drv_priv;
1430         int i;
1431
1432         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1433
1434         mutex_lock(&sc->mutex);
1435
1436         /* Stop ANI */
1437         sc->sc_flags &= ~SC_OP_ANI_RUN;
1438         del_timer_sync(&common->ani.timer);
1439
1440         /* Reclaim beacon resources */
1441         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1442             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1443             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1444                 ath9k_ps_wakeup(sc);
1445                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1446                 ath9k_ps_restore(sc);
1447         }
1448
1449         ath_beacon_return(sc, avp);
1450         sc->sc_flags &= ~SC_OP_BEACONS;
1451
1452         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1453                 if (sc->beacon.bslot[i] == vif) {
1454                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1455                                "slot\n", __func__);
1456                         sc->beacon.bslot[i] = NULL;
1457                         sc->beacon.bslot_aphy[i] = NULL;
1458                 }
1459         }
1460
1461         sc->nvifs--;
1462
1463         mutex_unlock(&sc->mutex);
1464 }
1465
1466 static void ath9k_enable_ps(struct ath_softc *sc)
1467 {
1468         struct ath_hw *ah = sc->sc_ah;
1469
1470         sc->ps_enabled = true;
1471         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1472                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1473                         ah->imask |= ATH9K_INT_TIM_TIMER;
1474                         ath9k_hw_set_interrupts(ah, ah->imask);
1475                 }
1476                 ath9k_hw_setrxabort(ah, 1);
1477         }
1478 }
1479
1480 static void ath9k_disable_ps(struct ath_softc *sc)
1481 {
1482         struct ath_hw *ah = sc->sc_ah;
1483
1484         sc->ps_enabled = false;
1485         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1486         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1487                 ath9k_hw_setrxabort(ah, 0);
1488                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1489                                   PS_WAIT_FOR_CAB |
1490                                   PS_WAIT_FOR_PSPOLL_DATA |
1491                                   PS_WAIT_FOR_TX_ACK);
1492                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1493                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1494                         ath9k_hw_set_interrupts(ah, ah->imask);
1495                 }
1496         }
1497
1498 }
1499
1500 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1501 {
1502         struct ath_wiphy *aphy = hw->priv;
1503         struct ath_softc *sc = aphy->sc;
1504         struct ath_hw *ah = sc->sc_ah;
1505         struct ath_common *common = ath9k_hw_common(ah);
1506         struct ieee80211_conf *conf = &hw->conf;
1507         bool disable_radio;
1508
1509         mutex_lock(&sc->mutex);
1510
1511         /*
1512          * Leave this as the first check because we need to turn on the
1513          * radio if it was disabled before prior to processing the rest
1514          * of the changes. Likewise we must only disable the radio towards
1515          * the end.
1516          */
1517         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1518                 bool enable_radio;
1519                 bool all_wiphys_idle;
1520                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1521
1522                 spin_lock_bh(&sc->wiphy_lock);
1523                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1524                 ath9k_set_wiphy_idle(aphy, idle);
1525
1526                 enable_radio = (!idle && all_wiphys_idle);
1527
1528                 /*
1529                  * After we unlock here its possible another wiphy
1530                  * can be re-renabled so to account for that we will
1531                  * only disable the radio toward the end of this routine
1532                  * if by then all wiphys are still idle.
1533                  */
1534                 spin_unlock_bh(&sc->wiphy_lock);
1535
1536                 if (enable_radio) {
1537                         sc->ps_idle = false;
1538                         ath_radio_enable(sc, hw);
1539                         ath_print(common, ATH_DBG_CONFIG,
1540                                   "not-idle: enabling radio\n");
1541                 }
1542         }
1543
1544         /*
1545          * We just prepare to enable PS. We have to wait until our AP has
1546          * ACK'd our null data frame to disable RX otherwise we'll ignore
1547          * those ACKs and end up retransmitting the same null data frames.
1548          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1549          */
1550         if (changed & IEEE80211_CONF_CHANGE_PS) {
1551                 unsigned long flags;
1552                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1553                 if (conf->flags & IEEE80211_CONF_PS)
1554                         ath9k_enable_ps(sc);
1555                 else
1556                         ath9k_disable_ps(sc);
1557                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1558         }
1559
1560         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1561                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1562                         ath_print(common, ATH_DBG_CONFIG,
1563                                   "HW opmode set to Monitor mode\n");
1564                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1565                 }
1566         }
1567
1568         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1569                 struct ieee80211_channel *curchan = hw->conf.channel;
1570                 int pos = curchan->hw_value;
1571                 int old_pos = -1;
1572                 unsigned long flags;
1573
1574                 if (ah->curchan)
1575                         old_pos = ah->curchan - &ah->channels[0];
1576
1577                 aphy->chan_idx = pos;
1578                 aphy->chan_is_ht = conf_is_ht(conf);
1579                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1580                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1581                 else
1582                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1583
1584                 if (aphy->state == ATH_WIPHY_SCAN ||
1585                     aphy->state == ATH_WIPHY_ACTIVE)
1586                         ath9k_wiphy_pause_all_forced(sc, aphy);
1587                 else {
1588                         /*
1589                          * Do not change operational channel based on a paused
1590                          * wiphy changes.
1591                          */
1592                         goto skip_chan_change;
1593                 }
1594
1595                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1596                           curchan->center_freq);
1597
1598                 /* XXX: remove me eventualy */
1599                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1600
1601                 ath_update_chainmask(sc, conf_is_ht(conf));
1602
1603                 /* update survey stats for the old channel before switching */
1604                 spin_lock_irqsave(&common->cc_lock, flags);
1605                 ath_update_survey_stats(sc);
1606                 spin_unlock_irqrestore(&common->cc_lock, flags);
1607
1608                 /*
1609                  * If the operating channel changes, change the survey in-use flags
1610                  * along with it.
1611                  * Reset the survey data for the new channel, unless we're switching
1612                  * back to the operating channel from an off-channel operation.
1613                  */
1614                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1615                     sc->cur_survey != &sc->survey[pos]) {
1616
1617                         if (sc->cur_survey)
1618                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1619
1620                         sc->cur_survey = &sc->survey[pos];
1621
1622                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1623                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1624                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1625                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1626                 }
1627
1628                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1629                         ath_print(common, ATH_DBG_FATAL,
1630                                   "Unable to set channel\n");
1631                         mutex_unlock(&sc->mutex);
1632                         return -EINVAL;
1633                 }
1634
1635                 /*
1636                  * The most recent snapshot of channel->noisefloor for the old
1637                  * channel is only available after the hardware reset. Copy it to
1638                  * the survey stats now.
1639                  */
1640                 if (old_pos >= 0)
1641                         ath_update_survey_nf(sc, old_pos);
1642         }
1643
1644 skip_chan_change:
1645         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1646                 sc->config.txpowlimit = 2 * conf->power_level;
1647                 ath_update_txpow(sc);
1648         }
1649
1650         spin_lock_bh(&sc->wiphy_lock);
1651         disable_radio = ath9k_all_wiphys_idle(sc);
1652         spin_unlock_bh(&sc->wiphy_lock);
1653
1654         if (disable_radio) {
1655                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1656                 sc->ps_idle = true;
1657                 ath_radio_disable(sc, hw);
1658         }
1659
1660         mutex_unlock(&sc->mutex);
1661
1662         return 0;
1663 }
1664
1665 #define SUPPORTED_FILTERS                       \
1666         (FIF_PROMISC_IN_BSS |                   \
1667         FIF_ALLMULTI |                          \
1668         FIF_CONTROL |                           \
1669         FIF_PSPOLL |                            \
1670         FIF_OTHER_BSS |                         \
1671         FIF_BCN_PRBRESP_PROMISC |               \
1672         FIF_PROBE_REQ |                         \
1673         FIF_FCSFAIL)
1674
1675 /* FIXME: sc->sc_full_reset ? */
1676 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1677                                    unsigned int changed_flags,
1678                                    unsigned int *total_flags,
1679                                    u64 multicast)
1680 {
1681         struct ath_wiphy *aphy = hw->priv;
1682         struct ath_softc *sc = aphy->sc;
1683         u32 rfilt;
1684
1685         changed_flags &= SUPPORTED_FILTERS;
1686         *total_flags &= SUPPORTED_FILTERS;
1687
1688         sc->rx.rxfilter = *total_flags;
1689         ath9k_ps_wakeup(sc);
1690         rfilt = ath_calcrxfilter(sc);
1691         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1692         ath9k_ps_restore(sc);
1693
1694         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1695                   "Set HW RX filter: 0x%x\n", rfilt);
1696 }
1697
1698 static int ath9k_sta_add(struct ieee80211_hw *hw,
1699                          struct ieee80211_vif *vif,
1700                          struct ieee80211_sta *sta)
1701 {
1702         struct ath_wiphy *aphy = hw->priv;
1703         struct ath_softc *sc = aphy->sc;
1704
1705         ath_node_attach(sc, sta);
1706
1707         return 0;
1708 }
1709
1710 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1711                             struct ieee80211_vif *vif,
1712                             struct ieee80211_sta *sta)
1713 {
1714         struct ath_wiphy *aphy = hw->priv;
1715         struct ath_softc *sc = aphy->sc;
1716
1717         ath_node_detach(sc, sta);
1718
1719         return 0;
1720 }
1721
1722 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1723                          const struct ieee80211_tx_queue_params *params)
1724 {
1725         struct ath_wiphy *aphy = hw->priv;
1726         struct ath_softc *sc = aphy->sc;
1727         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1728         struct ath_txq *txq;
1729         struct ath9k_tx_queue_info qi;
1730         int ret = 0;
1731
1732         if (queue >= WME_NUM_AC)
1733                 return 0;
1734
1735         txq = sc->tx.txq_map[queue];
1736
1737         mutex_lock(&sc->mutex);
1738
1739         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1740
1741         qi.tqi_aifs = params->aifs;
1742         qi.tqi_cwmin = params->cw_min;
1743         qi.tqi_cwmax = params->cw_max;
1744         qi.tqi_burstTime = params->txop;
1745
1746         ath_print(common, ATH_DBG_CONFIG,
1747                   "Configure tx [queue/halq] [%d/%d],  "
1748                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1749                   queue, txq->axq_qnum, params->aifs, params->cw_min,
1750                   params->cw_max, params->txop);
1751
1752         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1753         if (ret)
1754                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1755
1756         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1757                 if (queue == WME_AC_BE && !ret)
1758                         ath_beaconq_config(sc);
1759
1760         mutex_unlock(&sc->mutex);
1761
1762         return ret;
1763 }
1764
1765 static int ath9k_set_key(struct ieee80211_hw *hw,
1766                          enum set_key_cmd cmd,
1767                          struct ieee80211_vif *vif,
1768                          struct ieee80211_sta *sta,
1769                          struct ieee80211_key_conf *key)
1770 {
1771         struct ath_wiphy *aphy = hw->priv;
1772         struct ath_softc *sc = aphy->sc;
1773         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1774         int ret = 0;
1775
1776         if (modparam_nohwcrypt)
1777                 return -ENOSPC;
1778
1779         mutex_lock(&sc->mutex);
1780         ath9k_ps_wakeup(sc);
1781         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1782
1783         switch (cmd) {
1784         case SET_KEY:
1785                 ret = ath_key_config(common, vif, sta, key);
1786                 if (ret >= 0) {
1787                         key->hw_key_idx = ret;
1788                         /* push IV and Michael MIC generation to stack */
1789                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1790                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1791                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1792                         if (sc->sc_ah->sw_mgmt_crypto &&
1793                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1794                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1795                         ret = 0;
1796                 }
1797                 break;
1798         case DISABLE_KEY:
1799                 ath_key_delete(common, key);
1800                 break;
1801         default:
1802                 ret = -EINVAL;
1803         }
1804
1805         ath9k_ps_restore(sc);
1806         mutex_unlock(&sc->mutex);
1807
1808         return ret;
1809 }
1810
1811 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1812                                    struct ieee80211_vif *vif,
1813                                    struct ieee80211_bss_conf *bss_conf,
1814                                    u32 changed)
1815 {
1816         struct ath_wiphy *aphy = hw->priv;
1817         struct ath_softc *sc = aphy->sc;
1818         struct ath_hw *ah = sc->sc_ah;
1819         struct ath_common *common = ath9k_hw_common(ah);
1820         struct ath_vif *avp = (void *)vif->drv_priv;
1821         int slottime;
1822         int error;
1823
1824         mutex_lock(&sc->mutex);
1825
1826         if (changed & BSS_CHANGED_BSSID) {
1827                 /* Set BSSID */
1828                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1829                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1830                 common->curaid = 0;
1831                 ath9k_hw_write_associd(ah);
1832
1833                 /* Set aggregation protection mode parameters */
1834                 sc->config.ath_aggr_prot = 0;
1835
1836                 /* Only legacy IBSS for now */
1837                 if (vif->type == NL80211_IFTYPE_ADHOC)
1838                         ath_update_chainmask(sc, 0);
1839
1840                 ath_print(common, ATH_DBG_CONFIG,
1841                           "BSSID: %pM aid: 0x%x\n",
1842                           common->curbssid, common->curaid);
1843
1844                 /* need to reconfigure the beacon */
1845                 sc->sc_flags &= ~SC_OP_BEACONS ;
1846         }
1847
1848         /* Enable transmission of beacons (AP, IBSS, MESH) */
1849         if ((changed & BSS_CHANGED_BEACON) ||
1850             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1851                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1852                 error = ath_beacon_alloc(aphy, vif);
1853                 if (!error)
1854                         ath_beacon_config(sc, vif);
1855         }
1856
1857         if (changed & BSS_CHANGED_ERP_SLOT) {
1858                 if (bss_conf->use_short_slot)
1859                         slottime = 9;
1860                 else
1861                         slottime = 20;
1862                 if (vif->type == NL80211_IFTYPE_AP) {
1863                         /*
1864                          * Defer update, so that connected stations can adjust
1865                          * their settings at the same time.
1866                          * See beacon.c for more details
1867                          */
1868                         sc->beacon.slottime = slottime;
1869                         sc->beacon.updateslot = UPDATE;
1870                 } else {
1871                         ah->slottime = slottime;
1872                         ath9k_hw_init_global_settings(ah);
1873                 }
1874         }
1875
1876         /* Disable transmission of beacons */
1877         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1878                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1879
1880         if (changed & BSS_CHANGED_BEACON_INT) {
1881                 sc->beacon_interval = bss_conf->beacon_int;
1882                 /*
1883                  * In case of AP mode, the HW TSF has to be reset
1884                  * when the beacon interval changes.
1885                  */
1886                 if (vif->type == NL80211_IFTYPE_AP) {
1887                         sc->sc_flags |= SC_OP_TSF_RESET;
1888                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1889                         error = ath_beacon_alloc(aphy, vif);
1890                         if (!error)
1891                                 ath_beacon_config(sc, vif);
1892                 } else {
1893                         ath_beacon_config(sc, vif);
1894                 }
1895         }
1896
1897         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1898                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1899                           bss_conf->use_short_preamble);
1900                 if (bss_conf->use_short_preamble)
1901                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1902                 else
1903                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1904         }
1905
1906         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1907                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1908                           bss_conf->use_cts_prot);
1909                 if (bss_conf->use_cts_prot &&
1910                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1911                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1912                 else
1913                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1914         }
1915
1916         if (changed & BSS_CHANGED_ASSOC) {
1917                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1918                         bss_conf->assoc);
1919                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1920         }
1921
1922         mutex_unlock(&sc->mutex);
1923 }
1924
1925 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1926 {
1927         u64 tsf;
1928         struct ath_wiphy *aphy = hw->priv;
1929         struct ath_softc *sc = aphy->sc;
1930
1931         mutex_lock(&sc->mutex);
1932         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1933         mutex_unlock(&sc->mutex);
1934
1935         return tsf;
1936 }
1937
1938 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1939 {
1940         struct ath_wiphy *aphy = hw->priv;
1941         struct ath_softc *sc = aphy->sc;
1942
1943         mutex_lock(&sc->mutex);
1944         ath9k_hw_settsf64(sc->sc_ah, tsf);
1945         mutex_unlock(&sc->mutex);
1946 }
1947
1948 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1949 {
1950         struct ath_wiphy *aphy = hw->priv;
1951         struct ath_softc *sc = aphy->sc;
1952
1953         mutex_lock(&sc->mutex);
1954
1955         ath9k_ps_wakeup(sc);
1956         ath9k_hw_reset_tsf(sc->sc_ah);
1957         ath9k_ps_restore(sc);
1958
1959         mutex_unlock(&sc->mutex);
1960 }
1961
1962 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1963                               struct ieee80211_vif *vif,
1964                               enum ieee80211_ampdu_mlme_action action,
1965                               struct ieee80211_sta *sta,
1966                               u16 tid, u16 *ssn)
1967 {
1968         struct ath_wiphy *aphy = hw->priv;
1969         struct ath_softc *sc = aphy->sc;
1970         int ret = 0;
1971
1972         local_bh_disable();
1973
1974         switch (action) {
1975         case IEEE80211_AMPDU_RX_START:
1976                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1977                         ret = -ENOTSUPP;
1978                 break;
1979         case IEEE80211_AMPDU_RX_STOP:
1980                 break;
1981         case IEEE80211_AMPDU_TX_START:
1982                 if (!(sc->sc_flags & SC_OP_TXAGGR))
1983                         return -EOPNOTSUPP;
1984
1985                 ath9k_ps_wakeup(sc);
1986                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1987                 if (!ret)
1988                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1989                 ath9k_ps_restore(sc);
1990                 break;
1991         case IEEE80211_AMPDU_TX_STOP:
1992                 ath9k_ps_wakeup(sc);
1993                 ath_tx_aggr_stop(sc, sta, tid);
1994                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1995                 ath9k_ps_restore(sc);
1996                 break;
1997         case IEEE80211_AMPDU_TX_OPERATIONAL:
1998                 ath9k_ps_wakeup(sc);
1999                 ath_tx_aggr_resume(sc, sta, tid);
2000                 ath9k_ps_restore(sc);
2001                 break;
2002         default:
2003                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2004                           "Unknown AMPDU action\n");
2005         }
2006
2007         local_bh_enable();
2008
2009         return ret;
2010 }
2011
2012 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2013                              struct survey_info *survey)
2014 {
2015         struct ath_wiphy *aphy = hw->priv;
2016         struct ath_softc *sc = aphy->sc;
2017         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2018         struct ieee80211_supported_band *sband;
2019         struct ieee80211_channel *chan;
2020         unsigned long flags;
2021         int pos;
2022
2023         spin_lock_irqsave(&common->cc_lock, flags);
2024         if (idx == 0)
2025                 ath_update_survey_stats(sc);
2026
2027         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2028         if (sband && idx >= sband->n_channels) {
2029                 idx -= sband->n_channels;
2030                 sband = NULL;
2031         }
2032
2033         if (!sband)
2034                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2035
2036         if (!sband || idx >= sband->n_channels) {
2037                 spin_unlock_irqrestore(&common->cc_lock, flags);
2038                 return -ENOENT;
2039         }
2040
2041         chan = &sband->channels[idx];
2042         pos = chan->hw_value;
2043         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2044         survey->channel = chan;
2045         spin_unlock_irqrestore(&common->cc_lock, flags);
2046
2047         return 0;
2048 }
2049
2050 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2051 {
2052         struct ath_wiphy *aphy = hw->priv;
2053         struct ath_softc *sc = aphy->sc;
2054
2055         mutex_lock(&sc->mutex);
2056         if (ath9k_wiphy_scanning(sc)) {
2057                 /*
2058                  * There is a race here in mac80211 but fixing it requires
2059                  * we revisit how we handle the scan complete callback.
2060                  * After mac80211 fixes we will not have configured hardware
2061                  * to the home channel nor would we have configured the RX
2062                  * filter yet.
2063                  */
2064                 mutex_unlock(&sc->mutex);
2065                 return;
2066         }
2067
2068         aphy->state = ATH_WIPHY_SCAN;
2069         ath9k_wiphy_pause_all_forced(sc, aphy);
2070         mutex_unlock(&sc->mutex);
2071 }
2072
2073 /*
2074  * XXX: this requires a revisit after the driver
2075  * scan_complete gets moved to another place/removed in mac80211.
2076  */
2077 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2078 {
2079         struct ath_wiphy *aphy = hw->priv;
2080         struct ath_softc *sc = aphy->sc;
2081
2082         mutex_lock(&sc->mutex);
2083         aphy->state = ATH_WIPHY_ACTIVE;
2084         mutex_unlock(&sc->mutex);
2085 }
2086
2087 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2088 {
2089         struct ath_wiphy *aphy = hw->priv;
2090         struct ath_softc *sc = aphy->sc;
2091         struct ath_hw *ah = sc->sc_ah;
2092
2093         mutex_lock(&sc->mutex);
2094         ah->coverage_class = coverage_class;
2095         ath9k_hw_init_global_settings(ah);
2096         mutex_unlock(&sc->mutex);
2097 }
2098
2099 struct ieee80211_ops ath9k_ops = {
2100         .tx                 = ath9k_tx,
2101         .start              = ath9k_start,
2102         .stop               = ath9k_stop,
2103         .add_interface      = ath9k_add_interface,
2104         .remove_interface   = ath9k_remove_interface,
2105         .config             = ath9k_config,
2106         .configure_filter   = ath9k_configure_filter,
2107         .sta_add            = ath9k_sta_add,
2108         .sta_remove         = ath9k_sta_remove,
2109         .conf_tx            = ath9k_conf_tx,
2110         .bss_info_changed   = ath9k_bss_info_changed,
2111         .set_key            = ath9k_set_key,
2112         .get_tsf            = ath9k_get_tsf,
2113         .set_tsf            = ath9k_set_tsf,
2114         .reset_tsf          = ath9k_reset_tsf,
2115         .ampdu_action       = ath9k_ampdu_action,
2116         .get_survey         = ath9k_get_survey,
2117         .sw_scan_start      = ath9k_sw_scan_start,
2118         .sw_scan_complete   = ath9k_sw_scan_complete,
2119         .rfkill_poll        = ath9k_rfkill_poll_state,
2120         .set_coverage_class = ath9k_set_coverage_class,
2121 };