drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96         enum ath9k_power_mode power_mode;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         power_mode = sc->sc_ah->power_mode;
 103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 104
 105         /*
 106          * While the hardware is asleep, the cycle counters contain no
 107          * useful data. Better clear them now so that they don't mess up
 108          * survey data results.
 109          */
 110         if (power_mode != ATH9K_PM_AWAKE) {
 111                 spin_lock(&common->cc_lock);
 112                 ath_hw_cycle_counters_update(common);
 113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 114                 spin_unlock(&common->cc_lock);
 115         }
 116
 117  unlock:
 118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 119 }
 120
 121 void ath9k_ps_restore(struct ath_softc *sc)
 122 {
 123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (--sc->ps_usecount != 0)
 128                 goto unlock;
 129
 130         spin_lock(&common->cc_lock);
 131         ath_hw_cycle_counters_update(common);
 132         spin_unlock(&common->cc_lock);
 133
 134         if (sc->ps_idle)
 135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 136         else if (sc->ps_enabled &&
 137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 138                               PS_WAIT_FOR_CAB |
 139                               PS_WAIT_FOR_PSPOLL_DATA |
 140                               PS_WAIT_FOR_TX_ACK)))
 141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 static void ath_start_ani(struct ath_common *common)
 148 {
 149         struct ath_hw *ah = common->ah;
 150         unsigned long timestamp = jiffies_to_msecs(jiffies);
 151         struct ath_softc *sc = (struct ath_softc *) common->priv;
 152
 153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 154                 return;
 155
 156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 157                 return;
 158
 159         common->ani.longcal_timer = timestamp;
 160         common->ani.shortcal_timer = timestamp;
 161         common->ani.checkani_timer = timestamp;
 162
 163         mod_timer(&common->ani.timer,
 164                   jiffies +
 165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 166 }
 167
 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 169 {
 170         struct ath_hw *ah = sc->sc_ah;
 171         struct ath9k_channel *chan = &ah->channels[channel];
 172         struct survey_info *survey = &sc->survey[channel];
 173
 174         if (chan->noisefloor) {
 175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 176                 survey->noise = chan->noisefloor;
 177         }
 178 }
 179
 180 static void ath_update_survey_stats(struct ath_softc *sc)
 181 {
 182         struct ath_hw *ah = sc->sc_ah;
 183         struct ath_common *common = ath9k_hw_common(ah);
 184         int pos = ah->curchan - &ah->channels[0];
 185         struct survey_info *survey = &sc->survey[pos];
 186         struct ath_cycle_counters *cc = &common->cc_survey;
 187         unsigned int div = common->clockrate * 1000;
 188
 189         if (!ah->curchan)
 190                 return;
 191
 192         if (ah->power_mode == ATH9K_PM_AWAKE)
 193                 ath_hw_cycle_counters_update(common);
 194
 195         if (cc->cycles > 0) {
 196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 198                         SURVEY_INFO_CHANNEL_TIME_RX |
 199                         SURVEY_INFO_CHANNEL_TIME_TX;
 200                 survey->channel_time += cc->cycles / div;
 201                 survey->channel_time_busy += cc->rx_busy / div;
 202                 survey->channel_time_rx += cc->rx_frame / div;
 203                 survey->channel_time_tx += cc->tx_frame / div;
 204         }
 205         memset(cc, 0, sizeof(*cc));
 206
 207         ath_update_survey_nf(sc, pos);
 208 }
 209
 210 /*
 211  * Set/change channels.  If the channel is really being changed, it's done
 212  * by reseting the chip.  To accomplish this we must first cleanup any pending
 213  * DMA, then restart stuff.
 214 */
 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 216                     struct ath9k_channel *hchan)
 217 {
 218         struct ath_wiphy *aphy = hw->priv;
 219         struct ath_hw *ah = sc->sc_ah;
 220         struct ath_common *common = ath9k_hw_common(ah);
 221         struct ieee80211_conf *conf = &common->hw->conf;
 222         bool fastcc = true, stopped;
 223         struct ieee80211_channel *channel = hw->conf.channel;
 224         struct ath9k_hw_cal_data *caldata = NULL;
 225         int r;
 226
 227         if (sc->sc_flags & SC_OP_INVALID)
 228                 return -EIO;
 229
 230         del_timer_sync(&common->ani.timer);
 231         cancel_work_sync(&sc->paprd_work);
 232         cancel_work_sync(&sc->hw_check_work);
 233         cancel_delayed_work_sync(&sc->tx_complete_work);
 234
 235         ath9k_ps_wakeup(sc);
 236
 237         spin_lock_bh(&sc->sc_pcu_lock);
 238
 239         /*
 240          * This is only performed if the channel settings have
 241          * actually changed.
 242          *
 243          * To switch channels clear any pending DMA operations;
 244          * wait long enough for the RX fifo to drain, reset the
 245          * hardware at the new frequency, and then re-enable
 246          * the relevant bits of the h/w.
 247          */
 248         ath9k_hw_disable_interrupts(ah);
 249         ath_drain_all_txq(sc, false);
 250
 251         stopped = ath_stoprecv(sc);
 252
 253         /* XXX: do not flush receive queue here. We don't want
 254          * to flush data frames already in queue because of
 255          * changing channel. */
 256
 257         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 258                 fastcc = false;
 259
 260         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 261                 caldata = &aphy->caldata;
 262
 263         ath_print(common, ATH_DBG_CONFIG,
 264                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 265                   sc->sc_ah->curchan->channel,
 266                   channel->center_freq, conf_is_ht40(conf),
 267                   fastcc);
 268
 269         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 270         if (r) {
 271                 ath_err(common,
 272                         "Unable to reset channel (%u MHz), reset status %d\n",
 273                         channel->center_freq, r);
 274                 goto ps_restore;
 275         }
 276
 277         if (ath_startrecv(sc) != 0) {
 278                 ath_err(common, "Unable to restart recv logic\n");
 279                 r = -EIO;
 280                 goto ps_restore;
 281         }
 282
 283         ath_update_txpow(sc);
 284         ath9k_hw_set_interrupts(ah, ah->imask);
 285
 286         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 287                 ath_beacon_config(sc, NULL);
 288                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 289                 ath_start_ani(common);
 290         }
 291
 292  ps_restore:
 293         spin_unlock_bh(&sc->sc_pcu_lock);
 294
 295         ath9k_ps_restore(sc);
 296         return r;
 297 }
 298
 299 static void ath_paprd_activate(struct ath_softc *sc)
 300 {
 301         struct ath_hw *ah = sc->sc_ah;
 302         struct ath9k_hw_cal_data *caldata = ah->caldata;
 303         struct ath_common *common = ath9k_hw_common(ah);
 304         int chain;
 305
 306         if (!caldata || !caldata->paprd_done)
 307                 return;
 308
 309         ath9k_ps_wakeup(sc);
 310         ar9003_paprd_enable(ah, false);
 311         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 312                 if (!(common->tx_chainmask & BIT(chain)))
 313                         continue;
 314
 315                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 316         }
 317
 318         ar9003_paprd_enable(ah, true);
 319         ath9k_ps_restore(sc);
 320 }
 321
 322 void ath_paprd_calibrate(struct work_struct *work)
 323 {
 324         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 325         struct ieee80211_hw *hw = sc->hw;
 326         struct ath_hw *ah = sc->sc_ah;
 327         struct ieee80211_hdr *hdr;
 328         struct sk_buff *skb = NULL;
 329         struct ieee80211_tx_info *tx_info;
 330         int band = hw->conf.channel->band;
 331         struct ieee80211_supported_band *sband = &sc->sbands[band];
 332         struct ath_tx_control txctl;
 333         struct ath9k_hw_cal_data *caldata = ah->caldata;
 334         struct ath_common *common = ath9k_hw_common(ah);
 335         int ftype;
 336         int chain_ok = 0;
 337         int chain;
 338         int len = 1800;
 339         int time_left;
 340         int i;
 341
 342         if (!caldata)
 343                 return;
 344
 345         skb = alloc_skb(len, GFP_KERNEL);
 346         if (!skb)
 347                 return;
 348
 349         tx_info = IEEE80211_SKB_CB(skb);
 350
 351         skb_put(skb, len);
 352         memset(skb->data, 0, len);
 353         hdr = (struct ieee80211_hdr *)skb->data;
 354         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 355         hdr->frame_control = cpu_to_le16(ftype);
 356         hdr->duration_id = cpu_to_le16(10);
 357         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 358         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 359         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 360
 361         memset(&txctl, 0, sizeof(txctl));
 362         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 363
 364         ath9k_ps_wakeup(sc);
 365         ar9003_paprd_init_table(ah);
 366         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 367                 if (!(common->tx_chainmask & BIT(chain)))
 368                         continue;
 369
 370                 chain_ok = 0;
 371                 memset(tx_info, 0, sizeof(*tx_info));
 372                 tx_info->band = band;
 373
 374                 for (i = 0; i < 4; i++) {
 375                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 376                         tx_info->control.rates[i].count = 6;
 377                 }
 378
 379                 init_completion(&sc->paprd_complete);
 380                 sc->paprd_pending = true;
 381                 ar9003_paprd_setup_gain_table(ah, chain);
 382                 txctl.paprd = BIT(chain);
 383                 if (ath_tx_start(hw, skb, &txctl) != 0)
 384                         break;
 385
 386                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 387                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 388                 sc->paprd_pending = false;
 389                 if (!time_left) {
 390                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 391                                   "Timeout waiting for paprd training on "
 392                                   "TX chain %d\n",
 393                                   chain);
 394                         goto fail_paprd;
 395                 }
 396
 397                 if (!ar9003_paprd_is_done(ah))
 398                         break;
 399
 400                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 401                         break;
 402
 403                 chain_ok = 1;
 404         }
 405         kfree_skb(skb);
 406
 407         if (chain_ok) {
 408                 caldata->paprd_done = true;
 409                 ath_paprd_activate(sc);
 410         }
 411
 412 fail_paprd:
 413         ath9k_ps_restore(sc);
 414 }
 415
 416 /*
 417  *  This routine performs the periodic noise floor calibration function
 418  *  that is used to adjust and optimize the chip performance.  This
 419  *  takes environmental changes (location, temperature) into account.
 420  *  When the task is complete, it reschedules itself depending on the
 421  *  appropriate interval that was calculated.
 422  */
 423 void ath_ani_calibrate(unsigned long data)
 424 {
 425         struct ath_softc *sc = (struct ath_softc *)data;
 426         struct ath_hw *ah = sc->sc_ah;
 427         struct ath_common *common = ath9k_hw_common(ah);
 428         bool longcal = false;
 429         bool shortcal = false;
 430         bool aniflag = false;
 431         unsigned int timestamp = jiffies_to_msecs(jiffies);
 432         u32 cal_interval, short_cal_interval, long_cal_interval;
 433         unsigned long flags;
 434
 435         if (ah->caldata && ah->caldata->nfcal_interference)
 436                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 437         else
 438                 long_cal_interval = ATH_LONG_CALINTERVAL;
 439
 440         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 441                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 442
 443         /* Only calibrate if awake */
 444         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 445                 goto set_timer;
 446
 447         ath9k_ps_wakeup(sc);
 448
 449         /* Long calibration runs independently of short calibration. */
 450         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 451                 longcal = true;
 452                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 453                 common->ani.longcal_timer = timestamp;
 454         }
 455
 456         /* Short calibration applies only while caldone is false */
 457         if (!common->ani.caldone) {
 458                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 459                         shortcal = true;
 460                         ath_print(common, ATH_DBG_ANI,
 461                                   "shortcal @%lu\n", jiffies);
 462                         common->ani.shortcal_timer = timestamp;
 463                         common->ani.resetcal_timer = timestamp;
 464                 }
 465         } else {
 466                 if ((timestamp - common->ani.resetcal_timer) >=
 467                     ATH_RESTART_CALINTERVAL) {
 468                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 469                         if (common->ani.caldone)
 470                                 common->ani.resetcal_timer = timestamp;
 471                 }
 472         }
 473
 474         /* Verify whether we must check ANI */
 475         if ((timestamp - common->ani.checkani_timer) >=
 476              ah->config.ani_poll_interval) {
 477                 aniflag = true;
 478                 common->ani.checkani_timer = timestamp;
 479         }
 480
 481         /* Skip all processing if there's nothing to do. */
 482         if (longcal || shortcal || aniflag) {
 483                 /* Call ANI routine if necessary */
 484                 if (aniflag) {
 485                         spin_lock_irqsave(&common->cc_lock, flags);
 486                         ath9k_hw_ani_monitor(ah, ah->curchan);
 487                         ath_update_survey_stats(sc);
 488                         spin_unlock_irqrestore(&common->cc_lock, flags);
 489                 }
 490
 491                 /* Perform calibration if necessary */
 492                 if (longcal || shortcal) {
 493                         common->ani.caldone =
 494                                 ath9k_hw_calibrate(ah,
 495                                                    ah->curchan,
 496                                                    common->rx_chainmask,
 497                                                    longcal);
 498                 }
 499         }
 500
 501         ath9k_ps_restore(sc);
 502
 503 set_timer:
 504         /*
 505         * Set timer interval based on previous results.
 506         * The interval must be the shortest necessary to satisfy ANI,
 507         * short calibration and long calibration.
 508         */
 509         cal_interval = ATH_LONG_CALINTERVAL;
 510         if (sc->sc_ah->config.enable_ani)
 511                 cal_interval = min(cal_interval,
 512                                    (u32)ah->config.ani_poll_interval);
 513         if (!common->ani.caldone)
 514                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 515
 516         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 517         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 518                 if (!ah->caldata->paprd_done)
 519                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 520                 else
 521                         ath_paprd_activate(sc);
 522         }
 523 }
 524
 525 /*
 526  * Update tx/rx chainmask. For legacy association,
 527  * hard code chainmask to 1x1, for 11n association, use
 528  * the chainmask configuration, for bt coexistence, use
 529  * the chainmask configuration even in legacy mode.
 530  */
 531 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 532 {
 533         struct ath_hw *ah = sc->sc_ah;
 534         struct ath_common *common = ath9k_hw_common(ah);
 535
 536         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 537             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 538                 common->tx_chainmask = ah->caps.tx_chainmask;
 539                 common->rx_chainmask = ah->caps.rx_chainmask;
 540         } else {
 541                 common->tx_chainmask = 1;
 542                 common->rx_chainmask = 1;
 543         }
 544
 545         ath_print(common, ATH_DBG_CONFIG,
 546                   "tx chmask: %d, rx chmask: %d\n",
 547                   common->tx_chainmask,
 548                   common->rx_chainmask);
 549 }
 550
 551 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 552 {
 553         struct ath_node *an;
 554         struct ath_hw *ah = sc->sc_ah;
 555         an = (struct ath_node *)sta->drv_priv;
 556
 557         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 558                 sc->sc_flags |= SC_OP_ENABLE_APM;
 559
 560         if (sc->sc_flags & SC_OP_TXAGGR) {
 561                 ath_tx_node_init(sc, an);
 562                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 563                                      sta->ht_cap.ampdu_factor);
 564                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 565         }
 566 }
 567
 568 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 569 {
 570         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 571
 572         if (sc->sc_flags & SC_OP_TXAGGR)
 573                 ath_tx_node_cleanup(sc, an);
 574 }
 575
 576 void ath_hw_check(struct work_struct *work)
 577 {
 578         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 579         int i;
 580
 581         ath9k_ps_wakeup(sc);
 582
 583         for (i = 0; i < 3; i++) {
 584                 if (ath9k_hw_check_alive(sc->sc_ah))
 585                         goto out;
 586
 587                 msleep(1);
 588         }
 589         ath_reset(sc, true);
 590
 591 out:
 592         ath9k_ps_restore(sc);
 593 }
 594
 595 void ath9k_tasklet(unsigned long data)
 596 {
 597         struct ath_softc *sc = (struct ath_softc *)data;
 598         struct ath_hw *ah = sc->sc_ah;
 599         struct ath_common *common = ath9k_hw_common(ah);
 600
 601         u32 status = sc->intrstatus;
 602         u32 rxmask;
 603
 604         ath9k_ps_wakeup(sc);
 605
 606         if (status & ATH9K_INT_FATAL) {
 607                 ath_reset(sc, true);
 608                 ath9k_ps_restore(sc);
 609                 return;
 610         }
 611
 612         spin_lock_bh(&sc->sc_pcu_lock);
 613
 614         if (!ath9k_hw_check_alive(ah))
 615                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 616
 617         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 618                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 619                           ATH9K_INT_RXORN);
 620         else
 621                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 622
 623         if (status & rxmask) {
 624                 /* Check for high priority Rx first */
 625                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 626                     (status & ATH9K_INT_RXHP))
 627                         ath_rx_tasklet(sc, 0, true);
 628
 629                 ath_rx_tasklet(sc, 0, false);
 630         }
 631
 632         if (status & ATH9K_INT_TX) {
 633                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 634                         ath_tx_edma_tasklet(sc);
 635                 else
 636                         ath_tx_tasklet(sc);
 637         }
 638
 639         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 640                 /*
 641                  * TSF sync does not look correct; remain awake to sync with
 642                  * the next Beacon.
 643                  */
 644                 ath_print(common, ATH_DBG_PS,
 645                           "TSFOOR - Sync with next Beacon\n");
 646                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 647         }
 648
 649         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 650                 if (status & ATH9K_INT_GENTIMER)
 651                         ath_gen_timer_isr(sc->sc_ah);
 652
 653         /* re-enable hardware interrupt */
 654         ath9k_hw_enable_interrupts(ah);
 655
 656         spin_unlock_bh(&sc->sc_pcu_lock);
 657         ath9k_ps_restore(sc);
 658 }
 659
 660 irqreturn_t ath_isr(int irq, void *dev)
 661 {
 662 #define SCHED_INTR (                            \
 663                 ATH9K_INT_FATAL |               \
 664                 ATH9K_INT_RXORN |               \
 665                 ATH9K_INT_RXEOL |               \
 666                 ATH9K_INT_RX |                  \
 667                 ATH9K_INT_RXLP |                \
 668                 ATH9K_INT_RXHP |                \
 669                 ATH9K_INT_TX |                  \
 670                 ATH9K_INT_BMISS |               \
 671                 ATH9K_INT_CST |                 \
 672                 ATH9K_INT_TSFOOR |              \
 673                 ATH9K_INT_GENTIMER)
 674
 675         struct ath_softc *sc = dev;
 676         struct ath_hw *ah = sc->sc_ah;
 677         struct ath_common *common = ath9k_hw_common(ah);
 678         enum ath9k_int status;
 679         bool sched = false;
 680
 681         /*
 682          * The hardware is not ready/present, don't
 683          * touch anything. Note this can happen early
 684          * on if the IRQ is shared.
 685          */
 686         if (sc->sc_flags & SC_OP_INVALID)
 687                 return IRQ_NONE;
 688
 689
 690         /* shared irq, not for us */
 691
 692         if (!ath9k_hw_intrpend(ah))
 693                 return IRQ_NONE;
 694
 695         /*
 696          * Figure out the reason(s) for the interrupt.  Note
 697          * that the hal returns a pseudo-ISR that may include
 698          * bits we haven't explicitly enabled so we mask the
 699          * value to insure we only process bits we requested.
 700          */
 701         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 702         status &= ah->imask;    /* discard unasked-for bits */
 703
 704         /*
 705          * If there are no status bits set, then this interrupt was not
 706          * for me (should have been caught above).
 707          */
 708         if (!status)
 709                 return IRQ_NONE;
 710
 711         /* Cache the status */
 712         sc->intrstatus = status;
 713
 714         if (status & SCHED_INTR)
 715                 sched = true;
 716
 717         /*
 718          * If a FATAL or RXORN interrupt is received, we have to reset the
 719          * chip immediately.
 720          */
 721         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 722             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 723                 goto chip_reset;
 724
 725         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 726             (status & ATH9K_INT_BB_WATCHDOG)) {
 727
 728                 spin_lock(&common->cc_lock);
 729                 ath_hw_cycle_counters_update(common);
 730                 ar9003_hw_bb_watchdog_dbg_info(ah);
 731                 spin_unlock(&common->cc_lock);
 732
 733                 goto chip_reset;
 734         }
 735
 736         if (status & ATH9K_INT_SWBA)
 737                 tasklet_schedule(&sc->bcon_tasklet);
 738
 739         if (status & ATH9K_INT_TXURN)
 740                 ath9k_hw_updatetxtriglevel(ah, true);
 741
 742         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 743                 if (status & ATH9K_INT_RXEOL) {
 744                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 745                         ath9k_hw_set_interrupts(ah, ah->imask);
 746                 }
 747         }
 748
 749         if (status & ATH9K_INT_MIB) {
 750                 /*
 751                  * Disable interrupts until we service the MIB
 752                  * interrupt; otherwise it will continue to
 753                  * fire.
 754                  */
 755                 ath9k_hw_disable_interrupts(ah);
 756                 /*
 757                  * Let the hal handle the event. We assume
 758                  * it will clear whatever condition caused
 759                  * the interrupt.
 760                  */
 761                 spin_lock(&common->cc_lock);
 762                 ath9k_hw_proc_mib_event(ah);
 763                 spin_unlock(&common->cc_lock);
 764                 ath9k_hw_enable_interrupts(ah);
 765         }
 766
 767         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 768                 if (status & ATH9K_INT_TIM_TIMER) {
 769                         /* Clear RxAbort bit so that we can
 770                          * receive frames */
 771                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 772                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 773                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 774                 }
 775
 776 chip_reset:
 777
 778         ath_debug_stat_interrupt(sc, status);
 779
 780         if (sched) {
 781                 /* turn off every interrupt */
 782                 ath9k_hw_disable_interrupts(ah);
 783                 tasklet_schedule(&sc->intr_tq);
 784         }
 785
 786         return IRQ_HANDLED;
 787
 788 #undef SCHED_INTR
 789 }
 790
 791 static u32 ath_get_extchanmode(struct ath_softc *sc,
 792                                struct ieee80211_channel *chan,
 793                                enum nl80211_channel_type channel_type)
 794 {
 795         u32 chanmode = 0;
 796
 797         switch (chan->band) {
 798         case IEEE80211_BAND_2GHZ:
 799                 switch(channel_type) {
 800                 case NL80211_CHAN_NO_HT:
 801                 case NL80211_CHAN_HT20:
 802                         chanmode = CHANNEL_G_HT20;
 803                         break;
 804                 case NL80211_CHAN_HT40PLUS:
 805                         chanmode = CHANNEL_G_HT40PLUS;
 806                         break;
 807                 case NL80211_CHAN_HT40MINUS:
 808                         chanmode = CHANNEL_G_HT40MINUS;
 809                         break;
 810                 }
 811                 break;
 812         case IEEE80211_BAND_5GHZ:
 813                 switch(channel_type) {
 814                 case NL80211_CHAN_NO_HT:
 815                 case NL80211_CHAN_HT20:
 816                         chanmode = CHANNEL_A_HT20;
 817                         break;
 818                 case NL80211_CHAN_HT40PLUS:
 819                         chanmode = CHANNEL_A_HT40PLUS;
 820                         break;
 821                 case NL80211_CHAN_HT40MINUS:
 822                         chanmode = CHANNEL_A_HT40MINUS;
 823                         break;
 824                 }
 825                 break;
 826         default:
 827                 break;
 828         }
 829
 830         return chanmode;
 831 }
 832
 833 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 834                                  struct ieee80211_hw *hw,
 835                                  struct ieee80211_vif *vif,
 836                                  struct ieee80211_bss_conf *bss_conf)
 837 {
 838         struct ath_wiphy *aphy = hw->priv;
 839         struct ath_hw *ah = sc->sc_ah;
 840         struct ath_common *common = ath9k_hw_common(ah);
 841
 842         if (bss_conf->assoc) {
 843                 ath_print(common, ATH_DBG_CONFIG,
 844                           "Bss Info ASSOC %d, bssid: %pM\n",
 845                            bss_conf->aid, common->curbssid);
 846
 847                 /* New association, store aid */
 848                 common->curaid = bss_conf->aid;
 849                 ath9k_hw_write_associd(ah);
 850
 851                 /*
 852                  * Request a re-configuration of Beacon related timers
 853                  * on the receipt of the first Beacon frame (i.e.,
 854                  * after time sync with the AP).
 855                  */
 856                 sc->ps_flags |= PS_BEACON_SYNC;
 857
 858                 /* Configure the beacon */
 859                 ath_beacon_config(sc, vif);
 860
 861                 /* Reset rssi stats */
 862                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 863                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 864
 865                 sc->sc_flags |= SC_OP_ANI_RUN;
 866                 ath_start_ani(common);
 867         } else {
 868                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 869                 common->curaid = 0;
 870                 /* Stop ANI */
 871                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 872                 del_timer_sync(&common->ani.timer);
 873         }
 874 }
 875
 876 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 877 {
 878         struct ath_hw *ah = sc->sc_ah;
 879         struct ath_common *common = ath9k_hw_common(ah);
 880         struct ieee80211_channel *channel = hw->conf.channel;
 881         int r;
 882
 883         ath9k_ps_wakeup(sc);
 884         spin_lock_bh(&sc->sc_pcu_lock);
 885
 886         ath9k_hw_configpcipowersave(ah, 0, 0);
 887
 888         if (!ah->curchan)
 889                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 890
 891         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 892         if (r) {
 893                 ath_err(common,
 894                         "Unable to reset channel (%u MHz), reset status %d\n",
 895                         channel->center_freq, r);
 896         }
 897
 898         ath_update_txpow(sc);
 899         if (ath_startrecv(sc) != 0) {
 900                 ath_err(common, "Unable to restart recv logic\n");
 901                 spin_unlock_bh(&sc->sc_pcu_lock);
 902                 return;
 903         }
 904         if (sc->sc_flags & SC_OP_BEACONS)
 905                 ath_beacon_config(sc, NULL);    /* restart beacons */
 906
 907         /* Re-Enable  interrupts */
 908         ath9k_hw_set_interrupts(ah, ah->imask);
 909
 910         /* Enable LED */
 911         ath9k_hw_cfg_output(ah, ah->led_pin,
 912                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 913         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 914
 915         ieee80211_wake_queues(hw);
 916         spin_unlock_bh(&sc->sc_pcu_lock);
 917
 918         ath9k_ps_restore(sc);
 919 }
 920
 921 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 922 {
 923         struct ath_hw *ah = sc->sc_ah;
 924         struct ieee80211_channel *channel = hw->conf.channel;
 925         int r;
 926
 927         ath9k_ps_wakeup(sc);
 928         spin_lock_bh(&sc->sc_pcu_lock);
 929
 930         ieee80211_stop_queues(hw);
 931
 932         /*
 933          * Keep the LED on when the radio is disabled
 934          * during idle unassociated state.
 935          */
 936         if (!sc->ps_idle) {
 937                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 938                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 939         }
 940
 941         /* Disable interrupts */
 942         ath9k_hw_disable_interrupts(ah);
 943
 944         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 945
 946         ath_stoprecv(sc);               /* turn off frame recv */
 947         ath_flushrecv(sc);              /* flush recv queue */
 948
 949         if (!ah->curchan)
 950                 ah->curchan = ath_get_curchannel(sc, hw);
 951
 952         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 953         if (r) {
 954                 ath_err(ath9k_hw_common(sc->sc_ah),
 955                         "Unable to reset channel (%u MHz), reset status %d\n",
 956                         channel->center_freq, r);
 957         }
 958
 959         ath9k_hw_phy_disable(ah);
 960
 961         ath9k_hw_configpcipowersave(ah, 1, 1);
 962
 963         spin_unlock_bh(&sc->sc_pcu_lock);
 964         ath9k_ps_restore(sc);
 965
 966         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 967 }
 968
 969 int ath_reset(struct ath_softc *sc, bool retry_tx)
 970 {
 971         struct ath_hw *ah = sc->sc_ah;
 972         struct ath_common *common = ath9k_hw_common(ah);
 973         struct ieee80211_hw *hw = sc->hw;
 974         int r;
 975
 976         /* Stop ANI */
 977         del_timer_sync(&common->ani.timer);
 978
 979         spin_lock_bh(&sc->sc_pcu_lock);
 980
 981         ieee80211_stop_queues(hw);
 982
 983         ath9k_hw_disable_interrupts(ah);
 984         ath_drain_all_txq(sc, retry_tx);
 985
 986         ath_stoprecv(sc);
 987         ath_flushrecv(sc);
 988
 989         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 990         if (r)
 991                 ath_err(common,
 992                         "Unable to reset hardware; reset status %d\n", r);
 993
 994         if (ath_startrecv(sc) != 0)
 995                 ath_err(common, "Unable to start recv logic\n");
 996
 997         /*
 998          * We may be doing a reset in response to a request
 999          * that changes the channel so update any state that
1000          * might change as a result.
1001          */
1002         ath_update_txpow(sc);
1003
1004         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1005                 ath_beacon_config(sc, NULL);    /* restart beacons */
1006
1007         ath9k_hw_set_interrupts(ah, ah->imask);
1008
1009         if (retry_tx) {
1010                 int i;
1011                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1012                         if (ATH_TXQ_SETUP(sc, i)) {
1013                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1014                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1015                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1016                         }
1017                 }
1018         }
1019
1020         ieee80211_wake_queues(hw);
1021         spin_unlock_bh(&sc->sc_pcu_lock);
1022
1023         /* Start ANI */
1024         ath_start_ani(common);
1025
1026         return r;
1027 }
1028
1029 /* XXX: Remove me once we don't depend on ath9k_channel for all
1030  * this redundant data */
1031 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1032                            struct ath9k_channel *ichan)
1033 {
1034         struct ieee80211_channel *chan = hw->conf.channel;
1035         struct ieee80211_conf *conf = &hw->conf;
1036
1037         ichan->channel = chan->center_freq;
1038         ichan->chan = chan;
1039
1040         if (chan->band == IEEE80211_BAND_2GHZ) {
1041                 ichan->chanmode = CHANNEL_G;
1042                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1043         } else {
1044                 ichan->chanmode = CHANNEL_A;
1045                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1046         }
1047
1048         if (conf_is_ht(conf))
1049                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1050                                             conf->channel_type);
1051 }
1052
1053 /**********************/
1054 /* mac80211 callbacks */
1055 /**********************/
1056
1057 static int ath9k_start(struct ieee80211_hw *hw)
1058 {
1059         struct ath_wiphy *aphy = hw->priv;
1060         struct ath_softc *sc = aphy->sc;
1061         struct ath_hw *ah = sc->sc_ah;
1062         struct ath_common *common = ath9k_hw_common(ah);
1063         struct ieee80211_channel *curchan = hw->conf.channel;
1064         struct ath9k_channel *init_channel;
1065         int r;
1066
1067         ath_print(common, ATH_DBG_CONFIG,
1068                   "Starting driver with initial channel: %d MHz\n",
1069                   curchan->center_freq);
1070
1071         mutex_lock(&sc->mutex);
1072
1073         if (ath9k_wiphy_started(sc)) {
1074                 if (sc->chan_idx == curchan->hw_value) {
1075                         /*
1076                          * Already on the operational channel, the new wiphy
1077                          * can be marked active.
1078                          */
1079                         aphy->state = ATH_WIPHY_ACTIVE;
1080                         ieee80211_wake_queues(hw);
1081                 } else {
1082                         /*
1083                          * Another wiphy is on another channel, start the new
1084                          * wiphy in paused state.
1085                          */
1086                         aphy->state = ATH_WIPHY_PAUSED;
1087                         ieee80211_stop_queues(hw);
1088                 }
1089                 mutex_unlock(&sc->mutex);
1090                 return 0;
1091         }
1092         aphy->state = ATH_WIPHY_ACTIVE;
1093
1094         /* setup initial channel */
1095
1096         sc->chan_idx = curchan->hw_value;
1097
1098         init_channel = ath_get_curchannel(sc, hw);
1099
1100         /* Reset SERDES registers */
1101         ath9k_hw_configpcipowersave(ah, 0, 0);
1102
1103         /*
1104          * The basic interface to setting the hardware in a good
1105          * state is ``reset''.  On return the hardware is known to
1106          * be powered up and with interrupts disabled.  This must
1107          * be followed by initialization of the appropriate bits
1108          * and then setup of the interrupt mask.
1109          */
1110         spin_lock_bh(&sc->sc_pcu_lock);
1111         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1112         if (r) {
1113                 ath_err(common,
1114                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1115                         r, curchan->center_freq);
1116                 spin_unlock_bh(&sc->sc_pcu_lock);
1117                 goto mutex_unlock;
1118         }
1119
1120         /*
1121          * This is needed only to setup initial state
1122          * but it's best done after a reset.
1123          */
1124         ath_update_txpow(sc);
1125
1126         /*
1127          * Setup the hardware after reset:
1128          * The receive engine is set going.
1129          * Frame transmit is handled entirely
1130          * in the frame output path; there's nothing to do
1131          * here except setup the interrupt mask.
1132          */
1133         if (ath_startrecv(sc) != 0) {
1134                 ath_err(common, "Unable to start recv logic\n");
1135                 r = -EIO;
1136                 spin_unlock_bh(&sc->sc_pcu_lock);
1137                 goto mutex_unlock;
1138         }
1139         spin_unlock_bh(&sc->sc_pcu_lock);
1140
1141         /* Setup our intr mask. */
1142         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1143                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1144                     ATH9K_INT_GLOBAL;
1145
1146         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1147                 ah->imask |= ATH9K_INT_RXHP |
1148                              ATH9K_INT_RXLP |
1149                              ATH9K_INT_BB_WATCHDOG;
1150         else
1151                 ah->imask |= ATH9K_INT_RX;
1152
1153         ah->imask |= ATH9K_INT_GTT;
1154
1155         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1156                 ah->imask |= ATH9K_INT_CST;
1157
1158         sc->sc_flags &= ~SC_OP_INVALID;
1159         sc->sc_ah->is_monitoring = false;
1160
1161         /* Disable BMISS interrupt when we're not associated */
1162         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1163         ath9k_hw_set_interrupts(ah, ah->imask);
1164
1165         ieee80211_wake_queues(hw);
1166
1167         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1168
1169         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1170             !ah->btcoex_hw.enabled) {
1171                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1172                                            AR_STOMP_LOW_WLAN_WGHT);
1173                 ath9k_hw_btcoex_enable(ah);
1174
1175                 if (common->bus_ops->bt_coex_prep)
1176                         common->bus_ops->bt_coex_prep(common);
1177                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1178                         ath9k_btcoex_timer_resume(sc);
1179         }
1180
1181         pm_qos_update_request(&sc->pm_qos_req, 55);
1182
1183 mutex_unlock:
1184         mutex_unlock(&sc->mutex);
1185
1186         return r;
1187 }
1188
1189 static int ath9k_tx(struct ieee80211_hw *hw,
1190                     struct sk_buff *skb)
1191 {
1192         struct ath_wiphy *aphy = hw->priv;
1193         struct ath_softc *sc = aphy->sc;
1194         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1195         struct ath_tx_control txctl;
1196         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1197
1198         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1199                 ath_print(common, ATH_DBG_XMIT,
1200                           "ath9k: %s: TX in unexpected wiphy state "
1201                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1202                 goto exit;
1203         }
1204
1205         if (sc->ps_enabled) {
1206                 /*
1207                  * mac80211 does not set PM field for normal data frames, so we
1208                  * need to update that based on the current PS mode.
1209                  */
1210                 if (ieee80211_is_data(hdr->frame_control) &&
1211                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1212                     !ieee80211_has_pm(hdr->frame_control)) {
1213                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1214                                   "while in PS mode\n");
1215                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1216                 }
1217         }
1218
1219         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1220                 /*
1221                  * We are using PS-Poll and mac80211 can request TX while in
1222                  * power save mode. Need to wake up hardware for the TX to be
1223                  * completed and if needed, also for RX of buffered frames.
1224                  */
1225                 ath9k_ps_wakeup(sc);
1226                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1227                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1228                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1229                         ath_print(common, ATH_DBG_PS,
1230                                   "Sending PS-Poll to pick a buffered frame\n");
1231                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1232                 } else {
1233                         ath_print(common, ATH_DBG_PS,
1234                                   "Wake up to complete TX\n");
1235                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1236                 }
1237                 /*
1238                  * The actual restore operation will happen only after
1239                  * the sc_flags bit is cleared. We are just dropping
1240                  * the ps_usecount here.
1241                  */
1242                 ath9k_ps_restore(sc);
1243         }
1244
1245         memset(&txctl, 0, sizeof(struct ath_tx_control));
1246         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1247
1248         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1249
1250         if (ath_tx_start(hw, skb, &txctl) != 0) {
1251                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1252                 goto exit;
1253         }
1254
1255         return 0;
1256 exit:
1257         dev_kfree_skb_any(skb);
1258         return 0;
1259 }
1260
1261 static void ath9k_stop(struct ieee80211_hw *hw)
1262 {
1263         struct ath_wiphy *aphy = hw->priv;
1264         struct ath_softc *sc = aphy->sc;
1265         struct ath_hw *ah = sc->sc_ah;
1266         struct ath_common *common = ath9k_hw_common(ah);
1267         int i;
1268
1269         mutex_lock(&sc->mutex);
1270
1271         aphy->state = ATH_WIPHY_INACTIVE;
1272
1273         if (led_blink)
1274                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1275
1276         cancel_delayed_work_sync(&sc->tx_complete_work);
1277         cancel_work_sync(&sc->paprd_work);
1278         cancel_work_sync(&sc->hw_check_work);
1279
1280         for (i = 0; i < sc->num_sec_wiphy; i++) {
1281                 if (sc->sec_wiphy[i])
1282                         break;
1283         }
1284
1285         if (i == sc->num_sec_wiphy) {
1286                 cancel_delayed_work_sync(&sc->wiphy_work);
1287                 cancel_work_sync(&sc->chan_work);
1288         }
1289
1290         if (sc->sc_flags & SC_OP_INVALID) {
1291                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1292                 mutex_unlock(&sc->mutex);
1293                 return;
1294         }
1295
1296         if (ath9k_wiphy_started(sc)) {
1297                 mutex_unlock(&sc->mutex);
1298                 return; /* another wiphy still in use */
1299         }
1300
1301         /* Ensure HW is awake when we try to shut it down. */
1302         ath9k_ps_wakeup(sc);
1303
1304         if (ah->btcoex_hw.enabled) {
1305                 ath9k_hw_btcoex_disable(ah);
1306                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1307                         ath9k_btcoex_timer_pause(sc);
1308         }
1309
1310         spin_lock_bh(&sc->sc_pcu_lock);
1311
1312         /* make sure h/w will not generate any interrupt
1313          * before setting the invalid flag. */
1314         ath9k_hw_disable_interrupts(ah);
1315
1316         if (!(sc->sc_flags & SC_OP_INVALID)) {
1317                 ath_drain_all_txq(sc, false);
1318                 ath_stoprecv(sc);
1319                 ath9k_hw_phy_disable(ah);
1320         } else
1321                 sc->rx.rxlink = NULL;
1322
1323         /* disable HAL and put h/w to sleep */
1324         ath9k_hw_disable(ah);
1325         ath9k_hw_configpcipowersave(ah, 1, 1);
1326
1327         spin_unlock_bh(&sc->sc_pcu_lock);
1328
1329         ath9k_ps_restore(sc);
1330
1331         /* Finally, put the chip in FULL SLEEP mode */
1332         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1333
1334         sc->sc_flags |= SC_OP_INVALID;
1335
1336         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1337
1338         mutex_unlock(&sc->mutex);
1339
1340         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1341 }
1342
1343 static int ath9k_add_interface(struct ieee80211_hw *hw,
1344                                struct ieee80211_vif *vif)
1345 {
1346         struct ath_wiphy *aphy = hw->priv;
1347         struct ath_softc *sc = aphy->sc;
1348         struct ath_hw *ah = sc->sc_ah;
1349         struct ath_common *common = ath9k_hw_common(ah);
1350         struct ath_vif *avp = (void *)vif->drv_priv;
1351         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1352         int ret = 0;
1353
1354         mutex_lock(&sc->mutex);
1355
1356         switch (vif->type) {
1357         case NL80211_IFTYPE_STATION:
1358                 ic_opmode = NL80211_IFTYPE_STATION;
1359                 break;
1360         case NL80211_IFTYPE_WDS:
1361                 ic_opmode = NL80211_IFTYPE_WDS;
1362                 break;
1363         case NL80211_IFTYPE_ADHOC:
1364         case NL80211_IFTYPE_AP:
1365         case NL80211_IFTYPE_MESH_POINT:
1366                 if (sc->nbcnvifs >= ATH_BCBUF) {
1367                         ret = -ENOBUFS;
1368                         goto out;
1369                 }
1370                 ic_opmode = vif->type;
1371                 break;
1372         default:
1373                 ath_err(common, "Interface type %d not yet supported\n",
1374                         vif->type);
1375                 ret = -EOPNOTSUPP;
1376                 goto out;
1377         }
1378
1379         ath_print(common, ATH_DBG_CONFIG,
1380                   "Attach a VIF of type: %d\n", ic_opmode);
1381
1382         /* Set the VIF opmode */
1383         avp->av_opmode = ic_opmode;
1384         avp->av_bslot = -1;
1385
1386         sc->nvifs++;
1387
1388         ath9k_set_bssid_mask(hw, vif);
1389
1390         if (sc->nvifs > 1)
1391                 goto out; /* skip global settings for secondary vif */
1392
1393         if (ic_opmode == NL80211_IFTYPE_AP) {
1394                 ath9k_hw_set_tsfadjust(ah, 1);
1395                 sc->sc_flags |= SC_OP_TSF_RESET;
1396         }
1397
1398         /* Set the device opmode */
1399         ah->opmode = ic_opmode;
1400
1401         /*
1402          * Enable MIB interrupts when there are hardware phy counters.
1403          * Note we only do this (at the moment) for station mode.
1404          */
1405         if ((vif->type == NL80211_IFTYPE_STATION) ||
1406             (vif->type == NL80211_IFTYPE_ADHOC) ||
1407             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1408                 if (ah->config.enable_ani)
1409                         ah->imask |= ATH9K_INT_MIB;
1410                 ah->imask |= ATH9K_INT_TSFOOR;
1411         }
1412
1413         ath9k_hw_set_interrupts(ah, ah->imask);
1414
1415         if (vif->type == NL80211_IFTYPE_AP    ||
1416             vif->type == NL80211_IFTYPE_ADHOC) {
1417                 sc->sc_flags |= SC_OP_ANI_RUN;
1418                 ath_start_ani(common);
1419         }
1420
1421 out:
1422         mutex_unlock(&sc->mutex);
1423         return ret;
1424 }
1425
1426 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1427                                    struct ieee80211_vif *vif)
1428 {
1429         struct ath_wiphy *aphy = hw->priv;
1430         struct ath_softc *sc = aphy->sc;
1431         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1432         struct ath_vif *avp = (void *)vif->drv_priv;
1433         bool bs_valid = false;
1434         int i;
1435
1436         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1437
1438         mutex_lock(&sc->mutex);
1439
1440         /* Stop ANI */
1441         sc->sc_flags &= ~SC_OP_ANI_RUN;
1442         del_timer_sync(&common->ani.timer);
1443
1444         /* Reclaim beacon resources */
1445         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1446             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1447             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1448                 ath9k_ps_wakeup(sc);
1449                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1450                 ath9k_ps_restore(sc);
1451         }
1452
1453         ath_beacon_return(sc, avp);
1454         sc->sc_flags &= ~SC_OP_BEACONS;
1455
1456         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1457                 if (sc->beacon.bslot[i] == vif) {
1458                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1459                                "slot\n", __func__);
1460                         sc->beacon.bslot[i] = NULL;
1461                         sc->beacon.bslot_aphy[i] = NULL;
1462                 } else if (sc->beacon.bslot[i])
1463                         bs_valid = true;
1464         }
1465         if (!bs_valid && (sc->sc_ah->imask & ATH9K_INT_SWBA)) {
1466                 /* Disable SWBA interrupt */
1467                 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1468                 ath9k_ps_wakeup(sc);
1469                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1470                 ath9k_ps_restore(sc);
1471         }
1472
1473         sc->nvifs--;
1474
1475         mutex_unlock(&sc->mutex);
1476 }
1477
1478 static void ath9k_enable_ps(struct ath_softc *sc)
1479 {
1480         struct ath_hw *ah = sc->sc_ah;
1481
1482         sc->ps_enabled = true;
1483         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1484                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1485                         ah->imask |= ATH9K_INT_TIM_TIMER;
1486                         ath9k_hw_set_interrupts(ah, ah->imask);
1487                 }
1488                 ath9k_hw_setrxabort(ah, 1);
1489         }
1490 }
1491
1492 static void ath9k_disable_ps(struct ath_softc *sc)
1493 {
1494         struct ath_hw *ah = sc->sc_ah;
1495
1496         sc->ps_enabled = false;
1497         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1498         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1499                 ath9k_hw_setrxabort(ah, 0);
1500                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1501                                   PS_WAIT_FOR_CAB |
1502                                   PS_WAIT_FOR_PSPOLL_DATA |
1503                                   PS_WAIT_FOR_TX_ACK);
1504                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1505                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1506                         ath9k_hw_set_interrupts(ah, ah->imask);
1507                 }
1508         }
1509
1510 }
1511
1512 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1513 {
1514         struct ath_wiphy *aphy = hw->priv;
1515         struct ath_softc *sc = aphy->sc;
1516         struct ath_hw *ah = sc->sc_ah;
1517         struct ath_common *common = ath9k_hw_common(ah);
1518         struct ieee80211_conf *conf = &hw->conf;
1519         bool disable_radio;
1520
1521         mutex_lock(&sc->mutex);
1522
1523         /*
1524          * Leave this as the first check because we need to turn on the
1525          * radio if it was disabled before prior to processing the rest
1526          * of the changes. Likewise we must only disable the radio towards
1527          * the end.
1528          */
1529         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1530                 bool enable_radio;
1531                 bool all_wiphys_idle;
1532                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1533
1534                 spin_lock_bh(&sc->wiphy_lock);
1535                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1536                 ath9k_set_wiphy_idle(aphy, idle);
1537
1538                 enable_radio = (!idle && all_wiphys_idle);
1539
1540                 /*
1541                  * After we unlock here its possible another wiphy
1542                  * can be re-renabled so to account for that we will
1543                  * only disable the radio toward the end of this routine
1544                  * if by then all wiphys are still idle.
1545                  */
1546                 spin_unlock_bh(&sc->wiphy_lock);
1547
1548                 if (enable_radio) {
1549                         sc->ps_idle = false;
1550                         ath_radio_enable(sc, hw);
1551                         ath_print(common, ATH_DBG_CONFIG,
1552                                   "not-idle: enabling radio\n");
1553                 }
1554         }
1555
1556         /*
1557          * We just prepare to enable PS. We have to wait until our AP has
1558          * ACK'd our null data frame to disable RX otherwise we'll ignore
1559          * those ACKs and end up retransmitting the same null data frames.
1560          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1561          */
1562         if (changed & IEEE80211_CONF_CHANGE_PS) {
1563                 unsigned long flags;
1564                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1565                 if (conf->flags & IEEE80211_CONF_PS)
1566                         ath9k_enable_ps(sc);
1567                 else
1568                         ath9k_disable_ps(sc);
1569                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1570         }
1571
1572         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1573                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1574                         ath_print(common, ATH_DBG_CONFIG,
1575                                   "Monitor mode is enabled\n");
1576                         sc->sc_ah->is_monitoring = true;
1577                 } else {
1578                         ath_print(common, ATH_DBG_CONFIG,
1579                                   "Monitor mode is disabled\n");
1580                         sc->sc_ah->is_monitoring = false;
1581                 }
1582         }
1583
1584         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1585                 struct ieee80211_channel *curchan = hw->conf.channel;
1586                 int pos = curchan->hw_value;
1587                 int old_pos = -1;
1588                 unsigned long flags;
1589
1590                 if (ah->curchan)
1591                         old_pos = ah->curchan - &ah->channels[0];
1592
1593                 aphy->chan_idx = pos;
1594                 aphy->chan_is_ht = conf_is_ht(conf);
1595                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1596                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1597                 else
1598                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1599
1600                 if (aphy->state == ATH_WIPHY_SCAN ||
1601                     aphy->state == ATH_WIPHY_ACTIVE)
1602                         ath9k_wiphy_pause_all_forced(sc, aphy);
1603                 else {
1604                         /*
1605                          * Do not change operational channel based on a paused
1606                          * wiphy changes.
1607                          */
1608                         goto skip_chan_change;
1609                 }
1610
1611                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1612                           curchan->center_freq);
1613
1614                 /* XXX: remove me eventualy */
1615                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1616
1617                 ath_update_chainmask(sc, conf_is_ht(conf));
1618
1619                 /* update survey stats for the old channel before switching */
1620                 spin_lock_irqsave(&common->cc_lock, flags);
1621                 ath_update_survey_stats(sc);
1622                 spin_unlock_irqrestore(&common->cc_lock, flags);
1623
1624                 /*
1625                  * If the operating channel changes, change the survey in-use flags
1626                  * along with it.
1627                  * Reset the survey data for the new channel, unless we're switching
1628                  * back to the operating channel from an off-channel operation.
1629                  */
1630                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1631                     sc->cur_survey != &sc->survey[pos]) {
1632
1633                         if (sc->cur_survey)
1634                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1635
1636                         sc->cur_survey = &sc->survey[pos];
1637
1638                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1639                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1640                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1641                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1642                 }
1643
1644                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1645                         ath_err(common, "Unable to set channel\n");
1646                         mutex_unlock(&sc->mutex);
1647                         return -EINVAL;
1648                 }
1649
1650                 /*
1651                  * The most recent snapshot of channel->noisefloor for the old
1652                  * channel is only available after the hardware reset. Copy it to
1653                  * the survey stats now.
1654                  */
1655                 if (old_pos >= 0)
1656                         ath_update_survey_nf(sc, old_pos);
1657         }
1658
1659 skip_chan_change:
1660         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1661                 sc->config.txpowlimit = 2 * conf->power_level;
1662                 ath_update_txpow(sc);
1663         }
1664
1665         spin_lock_bh(&sc->wiphy_lock);
1666         disable_radio = ath9k_all_wiphys_idle(sc);
1667         spin_unlock_bh(&sc->wiphy_lock);
1668
1669         if (disable_radio) {
1670                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1671                 sc->ps_idle = true;
1672                 ath_radio_disable(sc, hw);
1673         }
1674
1675         mutex_unlock(&sc->mutex);
1676
1677         return 0;
1678 }
1679
1680 #define SUPPORTED_FILTERS                       \
1681         (FIF_PROMISC_IN_BSS |                   \
1682         FIF_ALLMULTI |                          \
1683         FIF_CONTROL |                           \
1684         FIF_PSPOLL |                            \
1685         FIF_OTHER_BSS |                         \
1686         FIF_BCN_PRBRESP_PROMISC |               \
1687         FIF_PROBE_REQ |                         \
1688         FIF_FCSFAIL)
1689
1690 /* FIXME: sc->sc_full_reset ? */
1691 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1692                                    unsigned int changed_flags,
1693                                    unsigned int *total_flags,
1694                                    u64 multicast)
1695 {
1696         struct ath_wiphy *aphy = hw->priv;
1697         struct ath_softc *sc = aphy->sc;
1698         u32 rfilt;
1699
1700         changed_flags &= SUPPORTED_FILTERS;
1701         *total_flags &= SUPPORTED_FILTERS;
1702
1703         sc->rx.rxfilter = *total_flags;
1704         ath9k_ps_wakeup(sc);
1705         rfilt = ath_calcrxfilter(sc);
1706         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1707         ath9k_ps_restore(sc);
1708
1709         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1710                   "Set HW RX filter: 0x%x\n", rfilt);
1711 }
1712
1713 static int ath9k_sta_add(struct ieee80211_hw *hw,
1714                          struct ieee80211_vif *vif,
1715                          struct ieee80211_sta *sta)
1716 {
1717         struct ath_wiphy *aphy = hw->priv;
1718         struct ath_softc *sc = aphy->sc;
1719
1720         ath_node_attach(sc, sta);
1721
1722         return 0;
1723 }
1724
1725 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1726                             struct ieee80211_vif *vif,
1727                             struct ieee80211_sta *sta)
1728 {
1729         struct ath_wiphy *aphy = hw->priv;
1730         struct ath_softc *sc = aphy->sc;
1731
1732         ath_node_detach(sc, sta);
1733
1734         return 0;
1735 }
1736
1737 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1738                          const struct ieee80211_tx_queue_params *params)
1739 {
1740         struct ath_wiphy *aphy = hw->priv;
1741         struct ath_softc *sc = aphy->sc;
1742         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1743         struct ath_txq *txq;
1744         struct ath9k_tx_queue_info qi;
1745         int ret = 0;
1746
1747         if (queue >= WME_NUM_AC)
1748                 return 0;
1749
1750         txq = sc->tx.txq_map[queue];
1751
1752         mutex_lock(&sc->mutex);
1753
1754         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1755
1756         qi.tqi_aifs = params->aifs;
1757         qi.tqi_cwmin = params->cw_min;
1758         qi.tqi_cwmax = params->cw_max;
1759         qi.tqi_burstTime = params->txop;
1760
1761         ath_print(common, ATH_DBG_CONFIG,
1762                   "Configure tx [queue/halq] [%d/%d],  "
1763                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1764                   queue, txq->axq_qnum, params->aifs, params->cw_min,
1765                   params->cw_max, params->txop);
1766
1767         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1768         if (ret)
1769                 ath_err(common, "TXQ Update failed\n");
1770
1771         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1772                 if (queue == WME_AC_BE && !ret)
1773                         ath_beaconq_config(sc);
1774
1775         mutex_unlock(&sc->mutex);
1776
1777         return ret;
1778 }
1779
1780 static int ath9k_set_key(struct ieee80211_hw *hw,
1781                          enum set_key_cmd cmd,
1782                          struct ieee80211_vif *vif,
1783                          struct ieee80211_sta *sta,
1784                          struct ieee80211_key_conf *key)
1785 {
1786         struct ath_wiphy *aphy = hw->priv;
1787         struct ath_softc *sc = aphy->sc;
1788         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1789         int ret = 0;
1790
1791         if (modparam_nohwcrypt)
1792                 return -ENOSPC;
1793
1794         mutex_lock(&sc->mutex);
1795         ath9k_ps_wakeup(sc);
1796         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1797
1798         switch (cmd) {
1799         case SET_KEY:
1800                 ret = ath_key_config(common, vif, sta, key);
1801                 if (ret >= 0) {
1802                         key->hw_key_idx = ret;
1803                         /* push IV and Michael MIC generation to stack */
1804                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1805                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1806                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1807                         if (sc->sc_ah->sw_mgmt_crypto &&
1808                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1809                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1810                         ret = 0;
1811                 }
1812                 break;
1813         case DISABLE_KEY:
1814                 ath_key_delete(common, key);
1815                 break;
1816         default:
1817                 ret = -EINVAL;
1818         }
1819
1820         ath9k_ps_restore(sc);
1821         mutex_unlock(&sc->mutex);
1822
1823         return ret;
1824 }
1825
1826 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1827                                    struct ieee80211_vif *vif,
1828                                    struct ieee80211_bss_conf *bss_conf,
1829                                    u32 changed)
1830 {
1831         struct ath_wiphy *aphy = hw->priv;
1832         struct ath_softc *sc = aphy->sc;
1833         struct ath_hw *ah = sc->sc_ah;
1834         struct ath_common *common = ath9k_hw_common(ah);
1835         struct ath_vif *avp = (void *)vif->drv_priv;
1836         int slottime;
1837         int error;
1838
1839         mutex_lock(&sc->mutex);
1840
1841         if (changed & BSS_CHANGED_BSSID) {
1842                 /* Set BSSID */
1843                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1844                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1845                 common->curaid = 0;
1846                 ath9k_hw_write_associd(ah);
1847
1848                 /* Set aggregation protection mode parameters */
1849                 sc->config.ath_aggr_prot = 0;
1850
1851                 /* Only legacy IBSS for now */
1852                 if (vif->type == NL80211_IFTYPE_ADHOC)
1853                         ath_update_chainmask(sc, 0);
1854
1855                 ath_print(common, ATH_DBG_CONFIG,
1856                           "BSSID: %pM aid: 0x%x\n",
1857                           common->curbssid, common->curaid);
1858
1859                 /* need to reconfigure the beacon */
1860                 sc->sc_flags &= ~SC_OP_BEACONS ;
1861         }
1862
1863         /* Enable transmission of beacons (AP, IBSS, MESH) */
1864         if ((changed & BSS_CHANGED_BEACON) ||
1865             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1866                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1867                 error = ath_beacon_alloc(aphy, vif);
1868                 if (!error)
1869                         ath_beacon_config(sc, vif);
1870         }
1871
1872         if (changed & BSS_CHANGED_ERP_SLOT) {
1873                 if (bss_conf->use_short_slot)
1874                         slottime = 9;
1875                 else
1876                         slottime = 20;
1877                 if (vif->type == NL80211_IFTYPE_AP) {
1878                         /*
1879                          * Defer update, so that connected stations can adjust
1880                          * their settings at the same time.
1881                          * See beacon.c for more details
1882                          */
1883                         sc->beacon.slottime = slottime;
1884                         sc->beacon.updateslot = UPDATE;
1885                 } else {
1886                         ah->slottime = slottime;
1887                         ath9k_hw_init_global_settings(ah);
1888                 }
1889         }
1890
1891         /* Disable transmission of beacons */
1892         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1893                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1894
1895         if (changed & BSS_CHANGED_BEACON_INT) {
1896                 sc->beacon_interval = bss_conf->beacon_int;
1897                 /*
1898                  * In case of AP mode, the HW TSF has to be reset
1899                  * when the beacon interval changes.
1900                  */
1901                 if (vif->type == NL80211_IFTYPE_AP) {
1902                         sc->sc_flags |= SC_OP_TSF_RESET;
1903                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1904                         error = ath_beacon_alloc(aphy, vif);
1905                         if (!error)
1906                                 ath_beacon_config(sc, vif);
1907                 } else {
1908                         ath_beacon_config(sc, vif);
1909                 }
1910         }
1911
1912         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1913                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1914                           bss_conf->use_short_preamble);
1915                 if (bss_conf->use_short_preamble)
1916                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1917                 else
1918                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1919         }
1920
1921         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1922                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1923                           bss_conf->use_cts_prot);
1924                 if (bss_conf->use_cts_prot &&
1925                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1926                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1927                 else
1928                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1929         }
1930
1931         if (changed & BSS_CHANGED_ASSOC) {
1932                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1933                         bss_conf->assoc);
1934                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1935         }
1936
1937         mutex_unlock(&sc->mutex);
1938 }
1939
1940 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1941 {
1942         u64 tsf;
1943         struct ath_wiphy *aphy = hw->priv;
1944         struct ath_softc *sc = aphy->sc;
1945
1946         mutex_lock(&sc->mutex);
1947         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1948         mutex_unlock(&sc->mutex);
1949
1950         return tsf;
1951 }
1952
1953 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1954 {
1955         struct ath_wiphy *aphy = hw->priv;
1956         struct ath_softc *sc = aphy->sc;
1957
1958         mutex_lock(&sc->mutex);
1959         ath9k_hw_settsf64(sc->sc_ah, tsf);
1960         mutex_unlock(&sc->mutex);
1961 }
1962
1963 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1964 {
1965         struct ath_wiphy *aphy = hw->priv;
1966         struct ath_softc *sc = aphy->sc;
1967
1968         mutex_lock(&sc->mutex);
1969
1970         ath9k_ps_wakeup(sc);
1971         ath9k_hw_reset_tsf(sc->sc_ah);
1972         ath9k_ps_restore(sc);
1973
1974         mutex_unlock(&sc->mutex);
1975 }
1976
1977 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1978                               struct ieee80211_vif *vif,
1979                               enum ieee80211_ampdu_mlme_action action,
1980                               struct ieee80211_sta *sta,
1981                               u16 tid, u16 *ssn)
1982 {
1983         struct ath_wiphy *aphy = hw->priv;
1984         struct ath_softc *sc = aphy->sc;
1985         int ret = 0;
1986
1987         local_bh_disable();
1988
1989         switch (action) {
1990         case IEEE80211_AMPDU_RX_START:
1991                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1992                         ret = -ENOTSUPP;
1993                 break;
1994         case IEEE80211_AMPDU_RX_STOP:
1995                 break;
1996         case IEEE80211_AMPDU_TX_START:
1997                 if (!(sc->sc_flags & SC_OP_TXAGGR))
1998                         return -EOPNOTSUPP;
1999
2000                 ath9k_ps_wakeup(sc);
2001                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2002                 if (!ret)
2003                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2004                 ath9k_ps_restore(sc);
2005                 break;
2006         case IEEE80211_AMPDU_TX_STOP:
2007                 ath9k_ps_wakeup(sc);
2008                 ath_tx_aggr_stop(sc, sta, tid);
2009                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2010                 ath9k_ps_restore(sc);
2011                 break;
2012         case IEEE80211_AMPDU_TX_OPERATIONAL:
2013                 ath9k_ps_wakeup(sc);
2014                 ath_tx_aggr_resume(sc, sta, tid);
2015                 ath9k_ps_restore(sc);
2016                 break;
2017         default:
2018                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2019         }
2020
2021         local_bh_enable();
2022
2023         return ret;
2024 }
2025
2026 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2027                              struct survey_info *survey)
2028 {
2029         struct ath_wiphy *aphy = hw->priv;
2030         struct ath_softc *sc = aphy->sc;
2031         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2032         struct ieee80211_supported_band *sband;
2033         struct ieee80211_channel *chan;
2034         unsigned long flags;
2035         int pos;
2036
2037         spin_lock_irqsave(&common->cc_lock, flags);
2038         if (idx == 0)
2039                 ath_update_survey_stats(sc);
2040
2041         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2042         if (sband && idx >= sband->n_channels) {
2043                 idx -= sband->n_channels;
2044                 sband = NULL;
2045         }
2046
2047         if (!sband)
2048                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2049
2050         if (!sband || idx >= sband->n_channels) {
2051                 spin_unlock_irqrestore(&common->cc_lock, flags);
2052                 return -ENOENT;
2053         }
2054
2055         chan = &sband->channels[idx];
2056         pos = chan->hw_value;
2057         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2058         survey->channel = chan;
2059         spin_unlock_irqrestore(&common->cc_lock, flags);
2060
2061         return 0;
2062 }
2063
2064 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2065 {
2066         struct ath_wiphy *aphy = hw->priv;
2067         struct ath_softc *sc = aphy->sc;
2068
2069         mutex_lock(&sc->mutex);
2070         if (ath9k_wiphy_scanning(sc)) {
2071                 /*
2072                  * There is a race here in mac80211 but fixing it requires
2073                  * we revisit how we handle the scan complete callback.
2074                  * After mac80211 fixes we will not have configured hardware
2075                  * to the home channel nor would we have configured the RX
2076                  * filter yet.
2077                  */
2078                 mutex_unlock(&sc->mutex);
2079                 return;
2080         }
2081
2082         aphy->state = ATH_WIPHY_SCAN;
2083         ath9k_wiphy_pause_all_forced(sc, aphy);
2084         mutex_unlock(&sc->mutex);
2085 }
2086
2087 /*
2088  * XXX: this requires a revisit after the driver
2089  * scan_complete gets moved to another place/removed in mac80211.
2090  */
2091 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2092 {
2093         struct ath_wiphy *aphy = hw->priv;
2094         struct ath_softc *sc = aphy->sc;
2095
2096         mutex_lock(&sc->mutex);
2097         aphy->state = ATH_WIPHY_ACTIVE;
2098         mutex_unlock(&sc->mutex);
2099 }
2100
2101 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2102 {
2103         struct ath_wiphy *aphy = hw->priv;
2104         struct ath_softc *sc = aphy->sc;
2105         struct ath_hw *ah = sc->sc_ah;
2106
2107         mutex_lock(&sc->mutex);
2108         ah->coverage_class = coverage_class;
2109         ath9k_hw_init_global_settings(ah);
2110         mutex_unlock(&sc->mutex);
2111 }
2112
2113 struct ieee80211_ops ath9k_ops = {
2114         .tx                 = ath9k_tx,
2115         .start              = ath9k_start,
2116         .stop               = ath9k_stop,
2117         .add_interface      = ath9k_add_interface,
2118         .remove_interface   = ath9k_remove_interface,
2119         .config             = ath9k_config,
2120         .configure_filter   = ath9k_configure_filter,
2121         .sta_add            = ath9k_sta_add,
2122         .sta_remove         = ath9k_sta_remove,
2123         .conf_tx            = ath9k_conf_tx,
2124         .bss_info_changed   = ath9k_bss_info_changed,
2125         .set_key            = ath9k_set_key,
2126         .get_tsf            = ath9k_get_tsf,
2127         .set_tsf            = ath9k_set_tsf,
2128         .reset_tsf          = ath9k_reset_tsf,
2129         .ampdu_action       = ath9k_ampdu_action,
2130         .get_survey         = ath9k_get_survey,
2131         .sw_scan_start      = ath9k_sw_scan_start,
2132         .sw_scan_complete   = ath9k_sw_scan_complete,
2133         .rfkill_poll        = ath9k_rfkill_poll_state,
2134         .set_coverage_class = ath9k_set_coverage_class,
2135 };