ubuntu/rtl8192se/rtl8192s/r8192S_rtl6052.c

   1 /******************************************************************************
   2  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
   3  *
   4  * This program is distributed in the hope that it will be useful, but WITHOUT
   5  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   6  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   7  * more details.
   8  *
   9  * You should have received a copy of the GNU General Public License along with
  10  * this program; if not, write to the Free Software Foundation, Inc.,
  11  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  12  *
  13  * The full GNU General Public License is included in this distribution in the
  14  * file called LICENSE.
  15  *
  16  * Contact Information:
  17  * wlanfae <wlanfae@realtek.com>
  18 ******************************************************************************/
  19
  20 #ifdef RTL8192SE
  21 #include "../rtl_core.h"
  22 #include "../rtl_dm.h"
  23 #include "r8192S_phyreg.h"
  24 #include "r8192S_phy.h"
  25 #include "r8192S_rtl6052.h"
  26
  27 /*---------------------------Define Local Constant---------------------------*/
  28 typedef struct RF_Shadow_Compare_Map {
  29         u32             Value;
  30         u8              Compare;
  31         u8              ErrorOrNot;
  32         u8              Recorver;
  33         u8              Driver_Write;
  34 }RF_SHADOW_T;
  35 /*---------------------------Define Local Constant---------------------------*/
  36
  37
  38 /*------------------------Define global variable-----------------------------*/
  39 /*------------------------Define global variable-----------------------------*/
  40
  41
  42
  43
  44 /*---------------------Define local function prototype-----------------------*/
  45 void phy_RF6052_Config_HardCode(struct net_device* dev);
  46
  47 bool phy_RF6052_Config_ParaFile(struct net_device* dev);
  48 /*---------------------Define local function prototype-----------------------*/
  49
  50 /*------------------------Define function prototype--------------------------*/
  51 extern void RF_ChangeTxPath(struct net_device* dev,  u16 DataRate);
  52
  53 /*------------------------Define function prototype--------------------------*/
  54
  55 /*------------------------Define local variable------------------------------*/
  56 static  RF_SHADOW_T     RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
  57 /*------------------------Define local variable------------------------------*/
  58
  59 /*------------------------Define function prototype--------------------------*/
  60 extern void RF_ChangeTxPath(struct net_device* dev,  u16 DataRate)
  61 {
  62 #if 0
  63         static  u1Byte  RF_Path_Type = 2;
  64         static  u4Byte  tx_gain_tbl1[6]
  65                         = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100};
  66         static  u4Byte  tx_gain_tbl2[6]
  67                         = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030};
  68         u1Byte  i;
  69
  70         if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7)
  71         {
  72                 PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A,
  73                                         RF_TXPA_G2, bMask20Bits, 0x0f000);
  74                 PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A,
  75                                         RF_TXPA_G3, bMask20Bits, 0xeacf1);
  76
  77                 for (i = 0; i < 6; i++)
  78                         PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A,
  79                                                 RF_TX_AGC, bMask20Bits, tx_gain_tbl1[i]);
  80
  81                 PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A,
  82                                         RF_TXPA_G2, bMask20Bits, 0x01e39);
  83         }
  84         else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8)
  85         {
  86                 PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A,
  87                                         RF_TXPA_G2, bMask20Bits, 0x04440);
  88                 PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A,
  89                                         RF_TXPA_G3, bMask20Bits, 0xea4f1);
  90
  91                 for (i = 0; i < 6; i++)
  92                         PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A,
  93                                                 RF_TX_AGC, bMask20Bits, tx_gain_tbl2[i]);
  94
  95                 PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A,
  96                                         RF_TXPA_G2, bMask20Bits, 0x01e19);
  97         }
  98 #endif
  99
 100 }       /* RF_ChangeTxPath */
 101
 102
 103 void PHY_RF6052SetBandwidth(struct net_device* dev, HT_CHANNEL_WIDTH Bandwidth)
 104 {
 105         u8                              eRFPath;
 106         struct r8192_priv       *priv = rtllib_priv(dev);
 107
 108
 109         if (IS_HARDWARE_TYPE_8192SE(dev))
 110         {
 111 #if (RTL92SE_FPGA_VERIFY == 0)
 112                 switch(Bandwidth)
 113                 {
 114                         case HT_CHANNEL_WIDTH_20:
 115 #if 1
 116                                 priv->RfRegChnlVal[0] = ((priv->RfRegChnlVal[0] & 0xfffff3ff) | 0x0400);
 117                                 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, priv->RfRegChnlVal[0]);
 118 #else
 119                                 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x01);
 120 #endif
 121                                 break;
 122                         case HT_CHANNEL_WIDTH_20_40:
 123 #if 1
 124                                 priv->RfRegChnlVal[0] = ((priv->RfRegChnlVal[0] & 0xfffff3ff));
 125                                 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, priv->RfRegChnlVal[0]);
 126 #else
 127                                 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x00);
 128 #endif
 129                                 break;
 130                         default:
 131                                 RT_TRACE(COMP_DBG, "PHY_SetRF6052Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth);
 132                                 break;
 133                 }
 134 #endif
 135         }
 136         else
 137         {
 138                 for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
 139                 {
 140                         switch(Bandwidth)
 141                         {
 142                                 case HT_CHANNEL_WIDTH_20:
 143                                         break;
 144                                 case HT_CHANNEL_WIDTH_20_40:
 145                                         break;
 146                                 default:
 147                                         RT_TRACE(COMP_DBG, "PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth );
 148                                         break;
 149
 150                         }
 151                 }
 152         }
 153 }
 154
 155
 156 extern void PHY_RF6052SetCckTxPower(struct net_device* dev, u8  powerlevel)
 157 {
 158         struct r8192_priv *priv = rtllib_priv(dev);
 159         u32                             TxAGC=0;
 160         bool                            dontIncCCKOrTurboScanOff=false;
 161
 162         if (((priv->eeprom_version >= 2) && (priv->TxPwrSafetyFlag == 1)) ||
 163              ((priv->eeprom_version >= 2) && (priv->EEPROMRegulatory != 0))) {
 164                 dontIncCCKOrTurboScanOff = true;
 165         }
 166
 167         if(rtllib_act_scanning(priv->rtllib,true) == true){
 168                 TxAGC = 0x3f;
 169
 170                 if(dontIncCCKOrTurboScanOff )
 171                         TxAGC = powerlevel;
 172         } else {
 173                 TxAGC = powerlevel;
 174
 175                 if(priv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
 176                         TxAGC = 0x10;
 177                 else if(priv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
 178                         TxAGC = 0x0;
 179         }
 180
 181         if(TxAGC > RF6052_MAX_TX_PWR)
 182                 TxAGC = RF6052_MAX_TX_PWR;
 183
 184         rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC);
 185
 186 }       /* PHY_RF6052SetCckTxPower */
 187
 188
 189 #if 0
 190 extern void PHY_RF6052SetOFDMTxPower(struct net_device* dev, u8 powerlevel, u8 Channel)
 191 {
 192         struct r8192_priv *priv = rtllib_priv(dev);
 193         u32     writeVal, powerBase0, powerBase1;
 194         u8      index = 0;
 195         u16     RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
 196         u8      rfa_pwr[4];
 197         u8      rfa_lower_bound = 0, rfa_upper_bound = 0;
 198         u8      i;
 199         u8      rf_pwr_diff = 0, chnlGroup = 0;
 200         u8      Legacy_pwrdiff=0, HT20_pwrdiff=0;
 201
 202         if (priv->eeprom_version < 2)
 203                 powerBase0 = powerlevel + (priv->LegacyHTTxPowerDiff & 0xf);
 204         else if (priv->eeprom_version >= 2)
 205         {
 206                 Legacy_pwrdiff = priv->TxPwrLegacyHtDiff[RF90_PATH_A][Channel-1];
 207                 powerBase0 = powerlevel + Legacy_pwrdiff;
 208                 RT_TRACE(COMP_POWER, " [LagacyToHT40 pwr diff = %d]\n", Legacy_pwrdiff);
 209                 RT_TRACE(COMP_POWER, " [OFDM power base index = 0x%x]\n", powerBase0);
 210         }
 211         powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
 212
 213         if(priv->eeprom_version >= 2)
 214         {
 215
 216                 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
 217                 {
 218                         HT20_pwrdiff = priv->TxPwrHt20Diff[RF90_PATH_A][Channel-1];
 219
 220                         if (HT20_pwrdiff < 8)
 221                                 powerlevel += HT20_pwrdiff;
 222                         else
 223                                 powerlevel -= (16-HT20_pwrdiff);
 224
 225                         RT_TRACE(COMP_POWER, " [HT20 to HT40 pwrdiff = %d]\n", HT20_pwrdiff);
 226                         RT_TRACE(COMP_POWER, " [MCS power base index = 0x%x]\n", powerlevel);
 227                 }
 228         }
 229         powerBase1 = powerlevel;
 230         powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
 231
 232         RT_TRACE(COMP_POWER, " [Legacy/HT power index= %x/%x]\n", powerBase0, powerBase1);
 233
 234         for(index=0; index<6; index++)
 235         {
 236
 237                 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
 238                 {
 239                         writeVal = ((index<2)?powerBase0:powerBase1);
 240                 }
 241                 else
 242                 {
 243                         if(priv->pwrGroupCnt == 0)
 244                                 chnlGroup = 0;
 245                         if(priv->pwrGroupCnt >= 3)
 246                         {
 247                                 if(Channel <= 3)
 248                                         chnlGroup = 0;
 249                                 else if(Channel >= 4 && Channel <= 9)
 250                                         chnlGroup = 1;
 251                                 else if(Channel >= 10)
 252                                         chnlGroup = 2;
 253                                 if(priv->pwrGroupCnt == 4)
 254                                         chnlGroup ++;
 255                         }
 256                 else
 257                                 chnlGroup = 0;
 258                         writeVal = priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index] +
 259                                         ((index<2)?powerBase0:powerBase1);
 260                 }
 261                 RT_TRACE(COMP_POWER, "Reg 0x%x, chnlGroup = %d, Original=%x writeVal=%x\n",
 262                         RegOffset[index], chnlGroup, priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index],
 263                         writeVal);
 264
 265                 if (priv->rf_type == RF_2T2R)
 266                 {
 267                         rf_pwr_diff = priv->AntennaTxPwDiff[0];
 268                         RT_TRACE(COMP_POWER, "2T2R RF-B to RF-A PWR DIFF=%d\n", rf_pwr_diff);
 269
 270                         if (rf_pwr_diff >= 8)
 271                         {
 272                                 rfa_lower_bound = 0x10-rf_pwr_diff;
 273                                 RT_TRACE(COMP_POWER, "rfa_lower_bound= %d\n", rfa_lower_bound);
 274                         }
 275                         else if (rf_pwr_diff >= 0)
 276                         {
 277                                 rfa_upper_bound = RF6052_MAX_TX_PWR-rf_pwr_diff;
 278                                 RT_TRACE(COMP_POWER, "rfa_upper_bound= %d\n", rfa_upper_bound);
 279                         }
 280                 }
 281
 282                 for (i=  0; i <4; i++)
 283                 {
 284                         rfa_pwr[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
 285                         if (rfa_pwr[i]  > RF6052_MAX_TX_PWR)
 286                                 rfa_pwr[i]  = RF6052_MAX_TX_PWR;
 287
 288                         if (priv->rf_type == RF_2T2R)
 289                         {
 290                                 if (rf_pwr_diff >= 8)
 291                                 {
 292                                         if (rfa_pwr[i] <rfa_lower_bound)
 293                                         {
 294                                                 RT_TRACE(COMP_POWER, "Underflow");
 295                                                 rfa_pwr[i] = rfa_lower_bound;
 296                                         }
 297                                 }
 298                                 else if (rf_pwr_diff >= 1)
 299                                 {
 300                                         if (rfa_pwr[i] > rfa_upper_bound)
 301                                         {
 302                                                 RT_TRACE(COMP_POWER, "Overflow");
 303                                                 rfa_pwr[i] = rfa_upper_bound;
 304                                         }
 305                                 }
 306                                 RT_TRACE(COMP_POWER, "rfa_pwr[%d]=%x\n", i, rfa_pwr[i]);
 307                         }
 308
 309                 }
 310
 311 #if 1
 312                 writeVal = (rfa_pwr[3]<<24) | (rfa_pwr[2]<<16) |(rfa_pwr[1]<<8) |rfa_pwr[0];
 313                 RT_TRACE(COMP_POWER, "WritePower=%08x\n", writeVal);
 314 #else
 315                 if(priv->bDynamicTxHighPower == true)
 316                 {
 317                         if(index > 1)
 318                         {
 319                                 writeVal = 0x03030303;
 320                         }
 321                         else
 322                         {
 323                                 writeVal = (rfa_pwr[3]<<24) | (rfa_pwr[2]<<16) |(rfa_pwr[1]<<8) |rfa_pwr[0];
 324                         }
 325                         RT_TRACE(COMP_POWER, "HighPower=%08x\n", writeVal);
 326                 }
 327                 else
 328                 {
 329                         writeVal = (rfa_pwr[3]<<24) | (rfa_pwr[2]<<16) |(rfa_pwr[1]<<8) |rfa_pwr[0];
 330                         RT_TRACE(COMP_POWER, "NormalPower=%08x\n", writeVal);
 331                 }
 332 #endif
 333                 rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
 334         }
 335
 336 }       /* PHY_RF6052SetOFDMTxPower */
 337 #endif
 338
 339 void getPowerBase(
 340         struct net_device* dev,
 341         u8*             pPowerLevel,
 342         u8              Channel,
 343         u32*    OfdmBase,
 344         u32*    MCSBase,
 345         u8*             pFinalPowerIndex
 346         )
 347 {
 348         struct r8192_priv *priv = rtllib_priv(dev);
 349         u32                     powerBase0, powerBase1;
 350         u8                      Legacy_pwrdiff=0, HT20_pwrdiff=0;
 351         u8                      i, powerlevel[4];
 352
 353         for(i=0; i<2; i++)
 354                 powerlevel[i] = pPowerLevel[i];
 355         if (priv->eeprom_version < 2)
 356                 powerBase0 = powerlevel[0] + (priv->LegacyHTTxPowerDiff & 0xf);
 357         else if (priv->eeprom_version >= 2)
 358         {
 359                 Legacy_pwrdiff = priv->TxPwrLegacyHtDiff[RF90_PATH_A][Channel-1];
 360                 powerBase0 = powerlevel[0] + Legacy_pwrdiff;
 361         }
 362         powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
 363         *OfdmBase = powerBase0;
 364         RT_TRACE(COMP_POWER, " [OFDM power base index = 0x%x]\n", powerBase0);
 365
 366         if(priv->eeprom_version >= 2)
 367         {
 368                 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
 369                 {
 370                         for(i=0; i<2; i++)
 371                         {
 372                                 HT20_pwrdiff = priv->TxPwrHt20Diff[i][Channel-1];
 373                                 if (HT20_pwrdiff < 8)
 374                                         powerlevel[i] += HT20_pwrdiff;
 375                                 else
 376                                         powerlevel[i] -= (16-HT20_pwrdiff);
 377                         }
 378                 }
 379         }
 380         powerBase1 = powerlevel[0];
 381         powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
 382         *MCSBase = powerBase1;
 383
 384         RT_TRACE(COMP_POWER, " [MCS power base index = 0x%x]\n", powerBase1);
 385
 386         pFinalPowerIndex[0] = powerlevel[0];
 387         pFinalPowerIndex[1] = powerlevel[1];
 388         switch(priv->EEPROMRegulatory)
 389         {
 390                 case 3:
 391                         if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
 392                         {
 393                                 pFinalPowerIndex[0] += priv->PwrGroupHT40[RF90_PATH_A][Channel-1];
 394                                 pFinalPowerIndex[1] += priv->PwrGroupHT40[RF90_PATH_B][Channel-1];
 395                         }
 396                         else
 397                         {
 398                                 pFinalPowerIndex[0] += priv->PwrGroupHT20[RF90_PATH_A][Channel-1];
 399                                 pFinalPowerIndex[1] += priv->PwrGroupHT20[RF90_PATH_B][Channel-1];
 400                         }
 401                         break;
 402                 default:
 403                         break;
 404         }
 405         if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
 406         {
 407                 RT_TRACE(COMP_POWER, "40MHz finalPowerIndex (A / B) = 0x%x / 0x%x\n",
 408                         pFinalPowerIndex[0], pFinalPowerIndex[1]);
 409         }
 410         else
 411         {
 412                 RT_TRACE(COMP_POWER, "20MHz finalPowerIndex (A / B) = 0x%x / 0x%x\n",
 413                         pFinalPowerIndex[0], pFinalPowerIndex[1]);
 414         }
 415 }
 416
 417 void getTxPowerWriteValByRegulatory(
 418         struct net_device* dev,
 419         u8              Channel,
 420         u8              index,
 421         u32             powerBase0,
 422         u32             powerBase1,
 423         u32*    pOutWriteVal
 424         )
 425 {
 426         struct r8192_priv *priv = rtllib_priv(dev);
 427         u8              i, chnlGroup, pwr_diff_limit[4];
 428         u32             writeVal, customer_limit;
 429
 430         switch(priv->EEPROMRegulatory)
 431         {
 432                 case 0:
 433                         chnlGroup = 0;
 434                         RT_TRACE(COMP_POWER,"MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n",
 435                                 chnlGroup, index, priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index]);
 436                         writeVal = priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index] +
 437                                 ((index<2)?powerBase0:powerBase1);
 438                         RT_TRACE(COMP_POWER,"RTK better performance, writeVal = 0x%x\n", writeVal);
 439                         break;
 440                 case 1:
 441                         if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
 442                         {
 443                                 writeVal = ((index<2)?powerBase0:powerBase1);
 444                                 RT_TRACE(COMP_POWER,"Realtek regulatory, 40MHz, writeVal = 0x%x\n", writeVal);
 445                         }
 446                         else
 447                         {
 448                                 if(priv->pwrGroupCnt == 1)
 449                                         chnlGroup = 0;
 450                                 if(priv->pwrGroupCnt >= 3)
 451                                 {
 452                                         if(Channel <= 3)
 453                                                 chnlGroup = 0;
 454                                         else if(Channel >= 4 && Channel <= 8)
 455                                                 chnlGroup = 1;
 456                                         else if(Channel > 8)
 457                                                 chnlGroup = 2;
 458                                         if(priv->pwrGroupCnt == 4)
 459                                                 chnlGroup++;
 460                                 }
 461                                 RT_TRACE(COMP_POWER,"MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n",
 462                                 chnlGroup, index, priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index]);
 463                                 writeVal = priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index] +
 464                                                 ((index<2)?powerBase0:powerBase1);
 465                                 RT_TRACE(COMP_POWER,"Realtek regulatory, 20MHz, writeVal = 0x%x\n", writeVal);
 466                         }
 467                         break;
 468                 case 2:
 469                         writeVal = ((index<2)?powerBase0:powerBase1);
 470                         RT_TRACE(COMP_POWER,"Better regulatory, writeVal = 0x%x\n", writeVal);
 471                         break;
 472                 case 3:
 473                         chnlGroup = 0;
 474                         RT_TRACE(COMP_POWER,"MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n",
 475                                 chnlGroup, index, priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index]);
 476
 477                         if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
 478                         {
 479                                 RT_TRACE(COMP_POWER,"customer's limit, 40MHz = 0x%x\n",
 480                                         priv->PwrGroupHT40[RF90_PATH_A][Channel-1]);
 481                         }
 482                         else
 483                         {
 484                                 RT_TRACE(COMP_POWER,"customer's limit, 20MHz = 0x%x\n",
 485                                         priv->PwrGroupHT20[RF90_PATH_A][Channel-1]);
 486                         }
 487                         for (i=0; i<4; i++)
 488                         {
 489                                 pwr_diff_limit[i] = (u8)((priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index]&(0x7f<<(i*8)))>>(i*8));
 490                                 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
 491                                 {
 492                                         if(pwr_diff_limit[i] > priv->PwrGroupHT40[RF90_PATH_A][Channel-1])
 493                                         {
 494                                                 pwr_diff_limit[i] = priv->PwrGroupHT40[RF90_PATH_A][Channel-1];
 495                                         }
 496                                 }
 497                                 else
 498                                 {
 499                                         if(pwr_diff_limit[i] > priv->PwrGroupHT20[RF90_PATH_A][Channel-1])
 500                                         {
 501                                                 pwr_diff_limit[i] = priv->PwrGroupHT20[RF90_PATH_A][Channel-1];
 502                                         }
 503                                 }
 504                         }
 505                         customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
 506                                                         (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]);
 507                         RT_TRACE(COMP_POWER,"Customer's limit = 0x%x\n", customer_limit);
 508
 509                         writeVal = customer_limit + ((index<2)?powerBase0:powerBase1);
 510                         RT_TRACE(COMP_POWER,"Customer, writeVal = 0x%x\n", writeVal);
 511                         break;
 512                 default:
 513                         chnlGroup = 0;
 514                         writeVal = priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index] +
 515                                 ((index<2)?powerBase0:powerBase1);
 516                         RT_TRACE(COMP_POWER,"RTK better performance, writeVal = 0x%x\n", writeVal);
 517                         break;
 518         }
 519
 520         if(priv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
 521                 writeVal = 0x10101010;
 522         else if(priv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
 523                 writeVal = 0x0;
 524
 525         *pOutWriteVal = writeVal;
 526
 527 }
 528
 529 void setAntennaDiff(
 530         struct net_device* dev,
 531         u8*             pFinalPowerIndex
 532         )
 533 {
 534         struct r8192_priv *priv = rtllib_priv(dev);
 535         char    ant_pwr_diff=0;
 536         u32     u4RegValue=0;
 537
 538         if (priv->rf_type == RF_2T2R)
 539         {
 540                 ant_pwr_diff = pFinalPowerIndex[1] - pFinalPowerIndex[0];
 541
 542                 if(ant_pwr_diff > 7)
 543                         ant_pwr_diff = 7;
 544                 if(ant_pwr_diff < -8)
 545                         ant_pwr_diff = -8;
 546                 RT_TRACE(COMP_POWER,"Antenna Diff from RF-B to RF-A = %d (0x%x)\n",
 547                         ant_pwr_diff, ant_pwr_diff&0xf);
 548                 ant_pwr_diff &= 0xf;
 549         }
 550         priv->AntennaTxPwDiff[2] = 0;
 551         priv->AntennaTxPwDiff[1] = 0;
 552         priv->AntennaTxPwDiff[0] = (u8)(ant_pwr_diff);
 553
 554         u4RegValue = (priv->AntennaTxPwDiff[2]<<8 |
 555                                 priv->AntennaTxPwDiff[1]<<4 |
 556                                 priv->AntennaTxPwDiff[0]        );
 557
 558         rtl8192_setBBreg(dev, rFPGA0_TxGainStage,
 559                 (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue);
 560
 561         RT_TRACE(COMP_POWER,"Write BCD-Diff(0x%x) = 0x%x\n",
 562                 rFPGA0_TxGainStage, u4RegValue);
 563 }
 564
 565 void writeOFDMPowerReg(
 566         struct net_device* dev,
 567         u8              index,
 568         u32             Value
 569         )
 570 {
 571         struct r8192_priv *priv = rtllib_priv(dev);
 572         u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
 573         u8 i, rfa_pwr[4];
 574         u8 rfa_lower_bound = 0, rfa_upper_bound = 0, rf_pwr_diff = 0;
 575         u32 writeVal=Value;
 576         if (priv->rf_type == RF_2T2R)
 577         {
 578                 rf_pwr_diff = priv->AntennaTxPwDiff[0];
 579
 580                 if (rf_pwr_diff >= 8)
 581                 {
 582                         rfa_lower_bound = 0x10-rf_pwr_diff;
 583                         RT_TRACE(COMP_POWER,"rfa_lower_bound= %d\n", rfa_lower_bound);
 584                 }
 585                 else
 586                 {
 587                         rfa_upper_bound = RF6052_MAX_TX_PWR-rf_pwr_diff;
 588                         RT_TRACE(COMP_POWER,"rfa_upper_bound= %d\n", rfa_upper_bound);
 589                 }
 590         }
 591
 592         for (i=0; i<4; i++)
 593         {
 594                 rfa_pwr[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
 595                 if (rfa_pwr[i]  > RF6052_MAX_TX_PWR)
 596                         rfa_pwr[i]  = RF6052_MAX_TX_PWR;
 597
 598                 if (priv->rf_type == RF_2T2R)
 599                 {
 600                         if (rf_pwr_diff >= 8)
 601                         {
 602                                 if (rfa_pwr[i] <rfa_lower_bound)
 603                                 {
 604                                         RT_TRACE(COMP_POWER,"Underflow");
 605                                         rfa_pwr[i] = rfa_lower_bound;
 606                                 }
 607                         }
 608                         else if (rf_pwr_diff >= 1)
 609                         {
 610                                 if (rfa_pwr[i] > rfa_upper_bound)
 611                                 {
 612                                         RT_TRACE(COMP_POWER,"Overflow");
 613                                         rfa_pwr[i] = rfa_upper_bound;
 614                                 }
 615                         }
 616                         RT_TRACE(COMP_POWER,"rfa_pwr[%d]=%x\n", i, rfa_pwr[i]);
 617                 }
 618
 619         }
 620
 621         writeVal = (rfa_pwr[3]<<24) | (rfa_pwr[2]<<16) |(rfa_pwr[1]<<8) |rfa_pwr[0];
 622
 623         rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
 624         RT_TRACE(COMP_POWER,"Set 0x%x = %08x\n",RegOffset[index], writeVal);
 625 }
 626
 627 /*-----------------------------------------------------------------------------
 628  * Function:    PHY_RF6052SetOFDMTxPower
 629  *
 630  * Overview:    For legacy and HY OFDM, we must read EEPROM TX power index for
 631  *                      different channel and read original value in TX power register area from
 632  *                      0xe00. We increase offset and original value to be correct tx pwr.
 633  *
 634  * Input:       NONE
 635  *
 636  * Output:      NONE
 637  *
 638  * Return:      NONE
 639  *
 640  * Revised History:
 641  * When                 Who             Remark
 642  * 11/05/2008   MHC             Simulate 8192 series method.
 643  * 01/06/2009   MHC             1. Prevent Path B tx power overflow or underflow dure to
 644  *                                              A/B pwr difference or legacy/HT pwr diff.
 645  *                                              2. We concern with path B legacy/HT OFDM difference.
 646  * 01/22/2009   MHC             Support new EPRO format from SD3.
 647  *
 648  *---------------------------------------------------------------------------*/
 649 extern  void
 650 PHY_RF6052SetOFDMTxPower(struct net_device* dev, u8* pPowerLevel, u8 Channel)
 651 {
 652         u32 writeVal, powerBase0, powerBase1;
 653         u8 index = 0;
 654         u8 finalPowerIndex[4];
 655
 656         getPowerBase(dev, pPowerLevel, Channel, &powerBase0, &powerBase1, &finalPowerIndex[0]);
 657         setAntennaDiff(dev, &finalPowerIndex[0] );
 658
 659         for(index=0; index<6; index++)
 660         {
 661                 getTxPowerWriteValByRegulatory(dev, Channel, index,
 662                         powerBase0, powerBase1, &writeVal);
 663
 664                 writeOFDMPowerReg(dev, index, writeVal);
 665         }
 666 }
 667
 668 bool PHY_RF6052_Config(struct net_device* dev)
 669 {
 670         struct r8192_priv                       *priv = rtllib_priv(dev);
 671         bool rtStatus = true;
 672         u8 bRegHwParaFile = 1;
 673
 674         if(priv->rf_type == RF_1T1R)
 675                 priv->NumTotalRFPath = 1;
 676         else
 677         priv->NumTotalRFPath = 2;
 678
 679         switch(bRegHwParaFile)
 680         {
 681                 case 0:
 682                         phy_RF6052_Config_HardCode(dev);
 683                         break;
 684
 685                 case 1:
 686                         rtStatus = phy_RF6052_Config_ParaFile(dev);
 687                         break;
 688
 689                 case 2:
 690                         phy_RF6052_Config_HardCode(dev);
 691                         phy_RF6052_Config_ParaFile(dev);
 692                         break;
 693
 694                 default:
 695                         phy_RF6052_Config_HardCode(dev);
 696                         break;
 697         }
 698         return rtStatus;
 699
 700 }
 701
 702 void phy_RF6052_Config_HardCode(struct net_device* dev)
 703 {
 704
 705
 706
 707 }
 708
 709 bool phy_RF6052_Config_ParaFile(struct net_device* dev)
 710 {
 711         u32                     u4RegValue = 0;
 712         u8                      eRFPath;
 713         bool rtStatus = true;
 714         struct r8192_priv       *priv = rtllib_priv(dev);
 715         BB_REGISTER_DEFINITION_T        *pPhyReg;
 716
 717
 718         for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
 719         {
 720
 721                 pPhyReg = &priv->PHYRegDef[eRFPath];
 722
 723                 switch(eRFPath)
 724                 {
 725                 case RF90_PATH_A:
 726                 case RF90_PATH_C:
 727                         u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV);
 728                         break;
 729                 case RF90_PATH_B :
 730                 case RF90_PATH_D:
 731                         u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16);
 732                         break;
 733                 }
 734
 735                 rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
 736
 737                 rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
 738
 739                 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0);
 740                 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);
 741
 742
 743                 switch(eRFPath)
 744                 {
 745                 case RF90_PATH_A:
 746 #if     RTL8190_Download_Firmware_From_Header
 747                         rtStatus= rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
 748 #else
 749                         rtStatus = PHY_ConfigRFWithParaFile(dev, (char* )&szRadioAFile, (RF90_RADIO_PATH_E)eRFPath);
 750 #endif
 751                         break;
 752                 case RF90_PATH_B:
 753 #if     RTL8190_Download_Firmware_From_Header
 754                         rtStatus= rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
 755 #else
 756                         if(priv->rf_type == RF_2T2R_GREEN)
 757                                 rtStatus = PHY_ConfigRFWithParaFile(dev, (char *)&szRadioBGMFile, (RF90_RADIO_PATH_E)eRFPath);
 758                         else
 759                                 rtStatus = PHY_ConfigRFWithParaFile(dev, (char* )&szRadioBFile, (RF90_RADIO_PATH_E)eRFPath);
 760 #endif
 761                         break;
 762                 case RF90_PATH_C:
 763                         break;
 764                 case RF90_PATH_D:
 765                         break;
 766                 }
 767
 768                 switch(eRFPath)
 769                 {
 770                 case RF90_PATH_A:
 771                 case RF90_PATH_C:
 772                         rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
 773                         break;
 774                 case RF90_PATH_B :
 775                 case RF90_PATH_D:
 776                         rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
 777                         break;
 778                 }
 779
 780                 if(rtStatus != true){
 781                         printk("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath);
 782                         goto phy_RF6052_Config_ParaFile_Fail;
 783                 }
 784
 785         }
 786
 787         RT_TRACE(COMP_INIT, "<---phy_RF6052_Config_ParaFile()\n");
 788         return rtStatus;
 789
 790 phy_RF6052_Config_ParaFile_Fail:
 791         return rtStatus;
 792 }
 793
 794
 795 extern u32 PHY_RFShadowRead(
 796         struct net_device               * dev,
 797         RF90_RADIO_PATH_E       eRFPath,
 798         u32                                     Offset)
 799 {
 800         return  RF_Shadow[eRFPath][Offset].Value;
 801
 802 }       /* PHY_RFShadowRead */
 803
 804
 805 extern void PHY_RFShadowWrite(
 806         struct net_device               * dev,
 807         RF90_RADIO_PATH_E       eRFPath,
 808         u32                                     Offset,
 809         u32                                     Data)
 810 {
 811         RF_Shadow[eRFPath][Offset].Value = (Data & bMask20Bits);
 812         RF_Shadow[eRFPath][Offset].Driver_Write = true;
 813
 814 }       /* PHY_RFShadowWrite */
 815
 816
 817 extern bool PHY_RFShadowCompare(
 818         struct net_device               * dev,
 819         RF90_RADIO_PATH_E       eRFPath,
 820         u32                                     Offset)
 821 {
 822         u32     reg;
 823
 824         if (RF_Shadow[eRFPath][Offset].Compare == true)
 825         {
 826                 reg = rtl8192_phy_QueryRFReg(dev, eRFPath, Offset, bMask20Bits);
 827                 if (RF_Shadow[eRFPath][Offset].Value != reg)
 828                 {
 829                         RF_Shadow[eRFPath][Offset].ErrorOrNot = true;
 830                         RT_TRACE(COMP_INIT, "PHY_RFShadowCompare RF-%d Addr%02xErr = %05x", eRFPath, Offset, reg);
 831                 }
 832                 else
 833                 {
 834                         RT_TRACE(COMP_INIT, "PHY_RFShadowCompare RF-%d Addr%02x Err = %05x return false\n", eRFPath, Offset, reg);
 835                         RF_Shadow[eRFPath][Offset].ErrorOrNot = false;
 836                 }
 837                 return RF_Shadow[eRFPath][Offset].ErrorOrNot;
 838         }
 839         return false;
 840 }       /* PHY_RFShadowCompare */
 841
 842 extern void PHY_RFShadowRecorver(
 843         struct net_device               * dev,
 844         RF90_RADIO_PATH_E       eRFPath,
 845         u32                                     Offset)
 846 {
 847         if (RF_Shadow[eRFPath][Offset].ErrorOrNot == true)
 848         {
 849                 if (RF_Shadow[eRFPath][Offset].Recorver == true)
 850                 {
 851                         rtl8192_phy_SetRFReg(dev, eRFPath, Offset, bMask20Bits, RF_Shadow[eRFPath][Offset].Value);
 852                         RT_TRACE(COMP_INIT, "PHY_RFShadowRecorver RF-%d Addr%02x=%05x",
 853                         eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value);
 854                 }
 855         }
 856
 857 }       /* PHY_RFShadowRecorver */
 858
 859
 860 extern void PHY_RFShadowCompareAll(struct net_device * dev)
 861 {
 862         u32             eRFPath;
 863         u32             Offset;
 864
 865         for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
 866         {
 867                 for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
 868                 {
 869                         PHY_RFShadowCompare(dev, (RF90_RADIO_PATH_E)eRFPath, Offset);
 870                 }
 871         }
 872
 873 }       /* PHY_RFShadowCompareAll */
 874
 875
 876 extern void PHY_RFShadowRecorverAll(struct net_device * dev)
 877 {
 878         u32             eRFPath;
 879         u32             Offset;
 880
 881         for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
 882         {
 883                 for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
 884                 {
 885                         PHY_RFShadowRecorver(dev, (RF90_RADIO_PATH_E)eRFPath, Offset);
 886                 }
 887         }
 888
 889 }       /* PHY_RFShadowRecorverAll */
 890
 891
 892 extern void PHY_RFShadowCompareFlagSet(
 893         struct net_device               * dev,
 894         RF90_RADIO_PATH_E       eRFPath,
 895         u32                                     Offset,
 896         u8                                      Type)
 897 {
 898         RF_Shadow[eRFPath][Offset].Compare = Type;
 899
 900 }       /* PHY_RFShadowCompareFlagSet */
 901
 902
 903 extern void PHY_RFShadowRecorverFlagSet(
 904         struct net_device               * dev,
 905         RF90_RADIO_PATH_E       eRFPath,
 906         u32                                     Offset,
 907         u8                                      Type)
 908 {
 909         RF_Shadow[eRFPath][Offset].Recorver= Type;
 910
 911 }       /* PHY_RFShadowRecorverFlagSet */
 912
 913
 914 extern void PHY_RFShadowCompareFlagSetAll(struct net_device  * dev)
 915 {
 916         u32             eRFPath;
 917         u32             Offset;
 918
 919         for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
 920         {
 921                 for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
 922                 {
 923                         if (Offset != 0x26 && Offset != 0x27)
 924                                 PHY_RFShadowCompareFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, false);
 925                         else
 926                                 PHY_RFShadowCompareFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, true);
 927                 }
 928         }
 929
 930 }       /* PHY_RFShadowCompareFlagSetAll */
 931
 932
 933 extern void PHY_RFShadowRecorverFlagSetAll(struct net_device  * dev)
 934 {
 935         u32             eRFPath;
 936         u32             Offset;
 937
 938         for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
 939         {
 940                 for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
 941                 {
 942                         if (Offset != 0x26 && Offset != 0x27)
 943                                 PHY_RFShadowRecorverFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, false);
 944                         else
 945                                 PHY_RFShadowRecorverFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, true);
 946                 }
 947         }
 948
 949 }       /* PHY_RFShadowCompareFlagSetAll */
 950
 951
 952
 953 extern void PHY_RFShadowRefresh(struct net_device  * dev)
 954 {
 955         u32             eRFPath;
 956         u32             Offset;
 957
 958         for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
 959         {
 960                 for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
 961                 {
 962                         RF_Shadow[eRFPath][Offset].Value = 0;
 963                         RF_Shadow[eRFPath][Offset].Compare = false;
 964                         RF_Shadow[eRFPath][Offset].Recorver  = false;
 965                         RF_Shadow[eRFPath][Offset].ErrorOrNot = false;
 966                         RF_Shadow[eRFPath][Offset].Driver_Write = false;
 967                 }
 968         }
 969
 970 }       /* PHY_RFShadowRead */
 971
 972 /* End of HalRf6052.c */
 973
 974 #endif