2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/leds.h>
23 #include <linux/completion.h>
29 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
30 * should rely on this file or its contents.
35 /* Macro to expand scalars to 64-bit objects */
37 #define ito64(x) (sizeof(x) == 1) ? \
38 (((unsigned long long int)(x)) & (0xff)) : \
40 (((unsigned long long int)(x)) & 0xffff) : \
42 (((unsigned long long int)(x)) & 0xffffffff) : \
43 (unsigned long long int)(x))
45 /* increment with wrap-around */
46 #define INCR(_l, _sz) do { \
48 (_l) &= ((_sz) - 1); \
51 /* decrement with wrap-around */
52 #define DECR(_l, _sz) do { \
54 (_l) &= ((_sz) - 1); \
57 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
59 #define TSF_TO_TU(_h,_l) \
60 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
62 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
70 /*************************/
71 /* Descriptor Management */
72 /*************************/
74 #define ATH_TXBUF_RESET(_bf) do { \
75 (_bf)->bf_stale = false; \
76 (_bf)->bf_lastbf = NULL; \
77 (_bf)->bf_next = NULL; \
78 memset(&((_bf)->bf_state), 0, \
79 sizeof(struct ath_buf_state)); \
82 #define ATH_RXBUF_RESET(_bf) do { \
83 (_bf)->bf_stale = false; \
87 * enum buffer_type - Buffer type flags
89 * @BUF_HT: Send this buffer using HT capabilities
90 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
91 * @BUF_AGGR: Indicates whether the buffer can be aggregated
92 * (used in aggregation scheduling)
93 * @BUF_RETRY: Indicates whether the buffer is retried
94 * @BUF_XRETRY: To denote excessive retries of the buffer
104 #define bf_retries bf_state.bfs_retries
105 #define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT)
106 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
107 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
108 #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
109 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
111 #define ATH_TXSTATUS_RING_SIZE 64
115 dma_addr_t dd_desc_paddr;
117 struct ath_buf *dd_bufptr;
120 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
121 struct list_head *head, const char *name,
122 int nbuf, int ndesc, bool is_tx);
123 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
124 struct list_head *head);
130 #define ATH_MAX_ANTENNA 3
131 #define ATH_RXBUF 512
132 #define ATH_TXBUF 512
133 #define ATH_TXBUF_RESERVE 5
134 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
135 #define ATH_TXMAXTRY 13
136 #define ATH_MGT_TXMAXTRY 4
138 #define TID_TO_WME_AC(_tid) \
139 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
140 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
141 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
144 #define ADDBA_EXCHANGE_ATTEMPTS 10
145 #define ATH_AGGR_DELIM_SZ 4
146 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
147 /* number of delimiters for encryption padding */
148 #define ATH_AGGR_ENCRYPTDELIM 10
149 /* minimum h/w qdepth to be sustained to maximize aggregation */
150 #define ATH_AGGR_MIN_QDEPTH 2
151 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
153 #define IEEE80211_SEQ_SEQ_SHIFT 4
154 #define IEEE80211_SEQ_MAX 4096
155 #define IEEE80211_WEP_IVLEN 3
156 #define IEEE80211_WEP_KIDLEN 1
157 #define IEEE80211_WEP_CRCLEN 4
158 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
159 (IEEE80211_WEP_IVLEN + \
160 IEEE80211_WEP_KIDLEN + \
161 IEEE80211_WEP_CRCLEN))
163 /* return whether a bit at index _n in bitmap _bm is set
164 * _sz is the size of the bitmap */
165 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
166 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
168 /* return block-ack bitmap index given sequence and starting sequence */
169 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
171 /* returns delimiter padding required given the packet length */
172 #define ATH_AGGR_GET_NDELIM(_len) \
173 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
174 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
176 #define BAW_WITHIN(_start, _bawsz, _seqno) \
177 ((((_seqno) - (_start)) & 4095) < (_bawsz))
179 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
181 #define ATH_TX_COMPLETE_POLL_INT 1000
183 enum ATH_AGGR_STATUS {
189 #define ATH_TXFIFO_DEPTH 8
193 struct list_head axq_q;
197 bool axq_tx_inprogress;
198 struct list_head axq_acq;
199 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
200 struct list_head txq_fifo_pending;
209 struct list_head list;
210 struct list_head tid_q;
213 struct ath_buf_state {
217 enum ath9k_internal_frame_type bfs_ftype;
221 struct list_head list;
222 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
224 struct ath_buf *bf_next; /* next subframe in the aggregate */
225 struct sk_buff *bf_mpdu; /* enclosing frame structure */
226 void *bf_desc; /* virtual addr of desc */
227 dma_addr_t bf_daddr; /* physical addr of desc */
228 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
231 struct ath_buf_state bf_state;
232 struct ath_wiphy *aphy;
236 struct list_head list;
237 struct list_head buf_q;
239 struct ath_atx_ac *ac;
240 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
245 int baw_head; /* first un-acked tx buffer */
246 int baw_tail; /* next unused tx buffer slot */
253 struct ath_common *common;
254 struct ath_atx_tid tid[WME_NUM_TID];
255 struct ath_atx_ac ac[WME_NUM_AC];
260 #define AGGR_CLEANUP BIT(1)
261 #define AGGR_ADDBA_COMPLETE BIT(2)
262 #define AGGR_ADDBA_PROGRESS BIT(3)
264 struct ath_tx_control {
267 enum ath9k_internal_frame_type frame_type;
271 #define ATH_TX_ERROR 0x01
272 #define ATH_TX_XRETRY 0x02
273 #define ATH_TX_BAR 0x04
278 spinlock_t txbuflock;
279 struct list_head txbuf;
280 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
281 struct ath_descdma txdma;
282 struct ath_txq *txq_map[WME_NUM_AC];
286 struct sk_buff_head rx_fifo;
287 struct sk_buff_head rx_buffers;
295 unsigned int rxfilter;
296 spinlock_t rxbuflock;
297 struct list_head rxbuf;
298 struct ath_descdma rxdma;
299 struct ath_buf *rx_bufptr;
300 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
303 int ath_startrecv(struct ath_softc *sc);
304 bool ath_stoprecv(struct ath_softc *sc);
305 void ath_flushrecv(struct ath_softc *sc);
306 u32 ath_calcrxfilter(struct ath_softc *sc);
307 int ath_rx_init(struct ath_softc *sc, int nbufs);
308 void ath_rx_cleanup(struct ath_softc *sc);
309 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
310 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
311 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
312 void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
313 void ath_draintxq(struct ath_softc *sc,
314 struct ath_txq *txq, bool retry_tx);
315 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
316 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
317 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
318 int ath_tx_init(struct ath_softc *sc, int nbufs);
319 void ath_tx_cleanup(struct ath_softc *sc);
320 int ath_txq_update(struct ath_softc *sc, int qnum,
321 struct ath9k_tx_queue_info *q);
322 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
323 struct ath_tx_control *txctl);
324 void ath_tx_tasklet(struct ath_softc *sc);
325 void ath_tx_edma_tasklet(struct ath_softc *sc);
326 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
328 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
329 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
337 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
338 enum nl80211_iftype av_opmode;
339 struct ath_buf *av_bcbuf;
340 struct ath_tx_control av_btxctl;
341 u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */
344 /*******************/
345 /* Beacon Handling */
346 /*******************/
349 * Regardless of the number of beacons we stagger, (i.e. regardless of the
350 * number of BSSIDs) if a given beacon does not go out even after waiting this
351 * number of beacon intervals, the game's up.
353 #define BSTUCK_THRESH (9 * ATH_BCBUF)
355 #define ATH_DEFAULT_BINTVAL 100 /* TU */
356 #define ATH_DEFAULT_BMISS_LIMIT 10
357 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
359 struct ath_beacon_config {
369 OK, /* no change needed */
370 UPDATE, /* update pending */
371 COMMIT /* beacon sent, commit change */
372 } updateslot; /* slot time update fsm */
378 struct ieee80211_vif *bslot[ATH_BCBUF];
379 struct ath_wiphy *bslot_aphy[ATH_BCBUF];
382 struct ath9k_tx_queue_info beacon_qi;
383 struct ath_descdma bdma;
384 struct ath_txq *cabq;
385 struct list_head bbuf;
388 void ath_beacon_tasklet(unsigned long data);
389 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
390 int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif);
391 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
392 int ath_beaconq_config(struct ath_softc *sc);
398 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
399 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
400 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
401 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
402 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
403 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
404 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
406 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
408 void ath_hw_check(struct work_struct *work);
409 void ath_paprd_calibrate(struct work_struct *work);
410 void ath_ani_calibrate(unsigned long data);
417 bool hw_timer_enabled;
418 spinlock_t btcoex_lock;
419 struct timer_list period_timer; /* Timer for BT period */
421 unsigned long bt_priority_time;
422 int bt_stomp_type; /* Types of BT stomping */
423 u32 btcoex_no_stomp; /* in usec */
424 u32 btcoex_period; /* in usec */
425 u32 btscan_no_stomp; /* in usec */
426 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
429 int ath_init_btcoex_timer(struct ath_softc *sc);
430 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
431 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
433 /********************/
435 /********************/
437 #define ATH_LED_PIN_DEF 1
438 #define ATH_LED_PIN_9287 8
439 #define ATH_LED_ON_DURATION_IDLE 350 /* in msecs */
440 #define ATH_LED_OFF_DURATION_IDLE 250 /* in msecs */
450 struct ath_softc *sc;
451 struct led_classdev led_cdev;
452 enum ath_led_type led_type;
457 void ath_init_leds(struct ath_softc *sc);
458 void ath_deinit_leds(struct ath_softc *sc);
460 /* Antenna diversity/combining */
461 #define ATH_ANT_RX_CURRENT_SHIFT 4
462 #define ATH_ANT_RX_MAIN_SHIFT 2
463 #define ATH_ANT_RX_MASK 0x3
465 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
466 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
467 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
468 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
469 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
470 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
471 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
473 #define ATH_ANT_DIV_COMB_LNA1_LNA2_DELTA -3
474 #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1
475 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
476 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
477 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
479 enum ath9k_ant_div_comb_lna_conf {
480 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
481 ATH_ANT_DIV_COMB_LNA2,
482 ATH_ANT_DIV_COMB_LNA1,
483 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2,
486 struct ath_ant_comb {
505 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
506 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
511 unsigned long scan_start_time;
514 /********************/
515 /* Main driver core */
516 /********************/
519 * Default cache line size, in bytes.
520 * Used when PCI device not fully initialized by bootrom/BIOS
522 #define DEFAULT_CACHELINE 32
523 #define ATH_REGCLASSIDS_MAX 10
524 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
525 #define ATH_MAX_SW_RETRIES 10
526 #define ATH_CHAN_MAX 255
527 #define IEEE80211_WEP_NKID 4 /* number of key ids */
529 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
530 #define ATH_RATE_DUMMY_MARKER 0
532 #define SC_OP_INVALID BIT(0)
533 #define SC_OP_BEACONS BIT(1)
534 #define SC_OP_RXAGGR BIT(2)
535 #define SC_OP_TXAGGR BIT(3)
536 #define SC_OP_OFFCHANNEL BIT(4)
537 #define SC_OP_PREAMBLE_SHORT BIT(5)
538 #define SC_OP_PROTECT_ENABLE BIT(6)
539 #define SC_OP_RXFLUSH BIT(7)
540 #define SC_OP_LED_ASSOCIATED BIT(8)
541 #define SC_OP_LED_ON BIT(9)
542 #define SC_OP_TSF_RESET BIT(11)
543 #define SC_OP_BT_PRIORITY_DETECTED BIT(12)
544 #define SC_OP_BT_SCAN BIT(13)
545 #define SC_OP_ANI_RUN BIT(14)
547 /* Powersave flags */
548 #define PS_WAIT_FOR_BEACON BIT(0)
549 #define PS_WAIT_FOR_CAB BIT(1)
550 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
551 #define PS_WAIT_FOR_TX_ACK BIT(3)
552 #define PS_BEACON_SYNC BIT(4)
555 struct ath_rate_table;
558 struct ieee80211_hw *hw;
561 spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */
562 struct ath_wiphy *pri_wiphy;
563 struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may
564 * have NULL entries */
565 int num_sec_wiphy; /* number of sec_wiphy pointers in the array */
568 struct ath_wiphy *next_wiphy;
569 struct work_struct chan_work;
570 int wiphy_select_failures;
571 unsigned long wiphy_select_first_fail;
572 struct delayed_work wiphy_work;
573 unsigned long wiphy_scheduler_int;
574 int wiphy_scheduler_index;
575 struct survey_info *cur_survey;
576 struct survey_info survey[ATH9K_NUM_CHANNELS];
578 struct tasklet_struct intr_tq;
579 struct tasklet_struct bcon_tasklet;
580 struct ath_hw *sc_ah;
583 spinlock_t sc_serial_rw;
584 spinlock_t sc_pm_lock;
585 spinlock_t sc_pcu_lock;
587 struct work_struct paprd_work;
588 struct work_struct hw_check_work;
589 struct completion paprd_complete;
593 u32 sc_flags; /* SC_OP_* */
594 u16 ps_flags; /* PS_* */
600 unsigned long ps_usecount;
602 struct ath_config config;
605 struct ath_beacon beacon;
606 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
608 struct ath_led radio_led;
609 struct ath_led assoc_led;
610 struct ath_led tx_led;
611 struct ath_led rx_led;
612 struct delayed_work ath_led_blink_work;
614 int led_off_duration;
620 #ifdef CONFIG_ATH9K_DEBUGFS
621 struct ath9k_debug debug;
623 struct ath_beacon_config cur_beacon_conf;
624 struct delayed_work tx_complete_work;
625 struct ath_btcoex btcoex;
627 struct ath_descdma txsdma;
629 struct ath_ant_comb ant_comb;
633 struct ath_softc *sc; /* shared for all virtual wiphys */
634 struct ieee80211_hw *hw;
635 struct ath9k_hw_cal_data caldata;
636 enum ath_wiphy_state {
649 void ath9k_tasklet(unsigned long data);
650 int ath_reset(struct ath_softc *sc, bool retry_tx);
651 int ath_cabq_update(struct ath_softc *);
653 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
655 common->bus_ops->read_cachesize(common, csz);
658 extern struct ieee80211_ops ath9k_ops;
659 extern int modparam_nohwcrypt;
660 extern int led_blink;
662 irqreturn_t ath_isr(int irq, void *dev);
663 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
664 const struct ath_bus_ops *bus_ops);
665 void ath9k_deinit_device(struct ath_softc *sc);
666 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
667 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
668 struct ath9k_channel *ichan);
669 void ath_update_chainmask(struct ath_softc *sc, int is_ht);
670 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
671 struct ath9k_channel *hchan);
673 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
674 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
675 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
678 int ath_pci_init(void);
679 void ath_pci_exit(void);
681 static inline int ath_pci_init(void) { return 0; };
682 static inline void ath_pci_exit(void) {};
685 #ifdef CONFIG_ATHEROS_AR71XX
686 int ath_ahb_init(void);
687 void ath_ahb_exit(void);
689 static inline int ath_ahb_init(void) { return 0; };
690 static inline void ath_ahb_exit(void) {};
693 void ath9k_ps_wakeup(struct ath_softc *sc);
694 void ath9k_ps_restore(struct ath_softc *sc);
696 void ath9k_set_bssid_mask(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
697 int ath9k_wiphy_add(struct ath_softc *sc);
698 int ath9k_wiphy_del(struct ath_wiphy *aphy);
699 void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb, int ftype);
700 int ath9k_wiphy_pause(struct ath_wiphy *aphy);
701 int ath9k_wiphy_unpause(struct ath_wiphy *aphy);
702 int ath9k_wiphy_select(struct ath_wiphy *aphy);
703 void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int);
704 void ath9k_wiphy_chan_work(struct work_struct *work);
705 bool ath9k_wiphy_started(struct ath_softc *sc);
706 void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
707 struct ath_wiphy *selected);
708 bool ath9k_wiphy_scanning(struct ath_softc *sc);
709 void ath9k_wiphy_work(struct work_struct *work);
710 bool ath9k_all_wiphys_idle(struct ath_softc *sc);
711 void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle);
713 void ath_mac80211_stop_queue(struct ath_softc *sc, u16 skb_queue);
714 bool ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue);
716 void ath_start_rfkill_poll(struct ath_softc *sc);
717 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);