arch/mips/pci/fixup-tb0226.c

   1 /*
   2  *  fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups.
   3  *
   4  *  Copyright (C) 2002-2004  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include <linux/init.h>
  21 #include <linux/pci.h>
  22
  23 #include <asm/vr41xx/tb0226.h>
  24
  25 int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  26 {
  27         int irq = -1;
  28
  29         switch (slot) {
  30         case 12:
  31                 vr41xx_set_irq_trigger(GD82559_1_PIN,
  32                                        TRIGGER_LEVEL,
  33                                        SIGNAL_THROUGH);
  34                 vr41xx_set_irq_level(GD82559_1_PIN, LEVEL_LOW);
  35                 irq = GD82559_1_IRQ;
  36                 break;
  37         case 13:
  38                 vr41xx_set_irq_trigger(GD82559_2_PIN,
  39                                        TRIGGER_LEVEL,
  40                                        SIGNAL_THROUGH);
  41                 vr41xx_set_irq_level(GD82559_2_PIN, LEVEL_LOW);
  42                 irq = GD82559_2_IRQ;
  43                 break;
  44         case 14:
  45                 switch (pin) {
  46                 case 1:
  47                         vr41xx_set_irq_trigger(UPD720100_INTA_PIN,
  48                                                TRIGGER_LEVEL,
  49                                                SIGNAL_THROUGH);
  50                         vr41xx_set_irq_level(UPD720100_INTA_PIN,
  51                                              LEVEL_LOW);
  52                         irq = UPD720100_INTA_IRQ;
  53                         break;
  54                 case 2:
  55                         vr41xx_set_irq_trigger(UPD720100_INTB_PIN,
  56                                                TRIGGER_LEVEL,
  57                                                SIGNAL_THROUGH);
  58                         vr41xx_set_irq_level(UPD720100_INTB_PIN,
  59                                              LEVEL_LOW);
  60                         irq = UPD720100_INTB_IRQ;
  61                         break;
  62                 case 3:
  63                         vr41xx_set_irq_trigger(UPD720100_INTC_PIN,
  64                                                TRIGGER_LEVEL,
  65                                                SIGNAL_THROUGH);
  66                         vr41xx_set_irq_level(UPD720100_INTC_PIN,
  67                                              LEVEL_LOW);
  68                         irq = UPD720100_INTC_IRQ;
  69                         break;
  70                 default:
  71                         break;
  72                 }
  73                 break;
  74         default:
  75                 break;
  76         }
  77
  78         return irq;
  79 }
  80
  81 /* Do platform specific device initialization at pci_enable_device() time */
  82 int pcibios_plat_dev_init(struct pci_dev *dev)
  83 {
  84         return 0;
  85 }