arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define CR0_RESERVED_BITS                                               \
  64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  67 #define CR4_RESERVED_BITS                                               \
  68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  71                           | X86_CR4_OSXSAVE \
  72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  73
  74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  75
  76 #define KVM_MAX_MCE_BANKS 32
  77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  94                                     struct kvm_cpuid_entry2 __user *entries);
  95
  96 struct kvm_x86_ops *kvm_x86_ops;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 int ignore_msrs = 0;
 100 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 #define KVM_NR_SHARED_MSRS 16
 103
 104 struct kvm_shared_msrs_global {
 105         int nr;
 106         u32 msrs[KVM_NR_SHARED_MSRS];
 107 };
 108
 109 struct kvm_shared_msrs {
 110         struct user_return_notifier urn;
 111         bool registered;
 112         struct kvm_shared_msr_values {
 113                 u64 host;
 114                 u64 curr;
 115         } values[KVM_NR_SHARED_MSRS];
 116 };
 117
 118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 119 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 120
 121 struct kvm_stats_debugfs_item debugfs_entries[] = {
 122         { "pf_fixed", VCPU_STAT(pf_fixed) },
 123         { "pf_guest", VCPU_STAT(pf_guest) },
 124         { "tlb_flush", VCPU_STAT(tlb_flush) },
 125         { "invlpg", VCPU_STAT(invlpg) },
 126         { "exits", VCPU_STAT(exits) },
 127         { "io_exits", VCPU_STAT(io_exits) },
 128         { "mmio_exits", VCPU_STAT(mmio_exits) },
 129         { "signal_exits", VCPU_STAT(signal_exits) },
 130         { "irq_window", VCPU_STAT(irq_window_exits) },
 131         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 132         { "halt_exits", VCPU_STAT(halt_exits) },
 133         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 134         { "hypercalls", VCPU_STAT(hypercalls) },
 135         { "request_irq", VCPU_STAT(request_irq_exits) },
 136         { "irq_exits", VCPU_STAT(irq_exits) },
 137         { "host_state_reload", VCPU_STAT(host_state_reload) },
 138         { "efer_reload", VCPU_STAT(efer_reload) },
 139         { "fpu_reload", VCPU_STAT(fpu_reload) },
 140         { "insn_emulation", VCPU_STAT(insn_emulation) },
 141         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 142         { "irq_injections", VCPU_STAT(irq_injections) },
 143         { "nmi_injections", VCPU_STAT(nmi_injections) },
 144         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 145         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 146         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 147         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 148         { "mmu_flooded", VM_STAT(mmu_flooded) },
 149         { "mmu_recycled", VM_STAT(mmu_recycled) },
 150         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 151         { "mmu_unsync", VM_STAT(mmu_unsync) },
 152         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 153         { "largepages", VM_STAT(lpages) },
 154         { NULL }
 155 };
 156
 157 u64 __read_mostly host_xcr0;
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 338 {
 339         ++vcpu->stat.pf_guest;
 340         vcpu->arch.cr2 = fault->address;
 341         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 342 }
 343
 344 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 345 {
 346         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 347                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 348         else
 349                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 350 }
 351
 352 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 353 {
 354         kvm_make_request(KVM_REQ_EVENT, vcpu);
 355         vcpu->arch.nmi_pending = 1;
 356 }
 357 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 358
 359 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 360 {
 361         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 362 }
 363 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 364
 365 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 366 {
 367         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 368 }
 369 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 370
 371 /*
 372  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 373  * a #GP and return false.
 374  */
 375 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 376 {
 377         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 378                 return true;
 379         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 380         return false;
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 383
 384 /*
 385  * This function will be used to read from the physical memory of the currently
 386  * running guest. The difference to kvm_read_guest_page is that this function
 387  * can read from guest physical or from the guest's guest physical memory.
 388  */
 389 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 390                             gfn_t ngfn, void *data, int offset, int len,
 391                             u32 access)
 392 {
 393         gfn_t real_gfn;
 394         gpa_t ngpa;
 395
 396         ngpa     = gfn_to_gpa(ngfn);
 397         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 398         if (real_gfn == UNMAPPED_GVA)
 399                 return -EFAULT;
 400
 401         real_gfn = gpa_to_gfn(real_gfn);
 402
 403         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 404 }
 405 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 406
 407 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 408                                void *data, int offset, int len, u32 access)
 409 {
 410         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 411                                        data, offset, len, access);
 412 }
 413
 414 /*
 415  * Load the pae pdptrs.  Return true is they are all valid.
 416  */
 417 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 418 {
 419         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 420         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 421         int i;
 422         int ret;
 423         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 424
 425         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 426                                       offset * sizeof(u64), sizeof(pdpte),
 427                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 428         if (ret < 0) {
 429                 ret = 0;
 430                 goto out;
 431         }
 432         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 433                 if (is_present_gpte(pdpte[i]) &&
 434                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 435                         ret = 0;
 436                         goto out;
 437                 }
 438         }
 439         ret = 1;
 440
 441         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 442         __set_bit(VCPU_EXREG_PDPTR,
 443                   (unsigned long *)&vcpu->arch.regs_avail);
 444         __set_bit(VCPU_EXREG_PDPTR,
 445                   (unsigned long *)&vcpu->arch.regs_dirty);
 446 out:
 447
 448         return ret;
 449 }
 450 EXPORT_SYMBOL_GPL(load_pdptrs);
 451
 452 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 453 {
 454         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 455         bool changed = true;
 456         int offset;
 457         gfn_t gfn;
 458         int r;
 459
 460         if (is_long_mode(vcpu) || !is_pae(vcpu))
 461                 return false;
 462
 463         if (!test_bit(VCPU_EXREG_PDPTR,
 464                       (unsigned long *)&vcpu->arch.regs_avail))
 465                 return true;
 466
 467         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
 468         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
 469         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 470                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 471         if (r < 0)
 472                 goto out;
 473         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 474 out:
 475
 476         return changed;
 477 }
 478
 479 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 480 {
 481         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 482         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 483                                     X86_CR0_CD | X86_CR0_NW;
 484
 485         cr0 |= X86_CR0_ET;
 486
 487 #ifdef CONFIG_X86_64
 488         if (cr0 & 0xffffffff00000000UL)
 489                 return 1;
 490 #endif
 491
 492         cr0 &= ~CR0_RESERVED_BITS;
 493
 494         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 495                 return 1;
 496
 497         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 498                 return 1;
 499
 500         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 501 #ifdef CONFIG_X86_64
 502                 if ((vcpu->arch.efer & EFER_LME)) {
 503                         int cs_db, cs_l;
 504
 505                         if (!is_pae(vcpu))
 506                                 return 1;
 507                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 508                         if (cs_l)
 509                                 return 1;
 510                 } else
 511 #endif
 512                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 513                                                  vcpu->arch.cr3))
 514                         return 1;
 515         }
 516
 517         kvm_x86_ops->set_cr0(vcpu, cr0);
 518
 519         if ((cr0 ^ old_cr0) & X86_CR0_PG)
 520                 kvm_clear_async_pf_completion_queue(vcpu);
 521
 522         if ((cr0 ^ old_cr0) & update_bits)
 523                 kvm_mmu_reset_context(vcpu);
 524         return 0;
 525 }
 526 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 527
 528 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 529 {
 530         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 531 }
 532 EXPORT_SYMBOL_GPL(kvm_lmsw);
 533
 534 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 535 {
 536         u64 xcr0;
 537
 538         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 539         if (index != XCR_XFEATURE_ENABLED_MASK)
 540                 return 1;
 541         xcr0 = xcr;
 542         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 543                 return 1;
 544         if (!(xcr0 & XSTATE_FP))
 545                 return 1;
 546         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 547                 return 1;
 548         if (xcr0 & ~host_xcr0)
 549                 return 1;
 550         vcpu->arch.xcr0 = xcr0;
 551         vcpu->guest_xcr0_loaded = 0;
 552         return 0;
 553 }
 554
 555 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 556 {
 557         if (__kvm_set_xcr(vcpu, index, xcr)) {
 558                 kvm_inject_gp(vcpu, 0);
 559                 return 1;
 560         }
 561         return 0;
 562 }
 563 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 564
 565 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 566 {
 567         struct kvm_cpuid_entry2 *best;
 568
 569         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 570         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 571 }
 572
 573 static void update_cpuid(struct kvm_vcpu *vcpu)
 574 {
 575         struct kvm_cpuid_entry2 *best;
 576
 577         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 578         if (!best)
 579                 return;
 580
 581         /* Update OSXSAVE bit */
 582         if (cpu_has_xsave && best->function == 0x1) {
 583                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 584                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 585                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 586         }
 587 }
 588
 589 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 590 {
 591         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 592         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 593
 594         if (cr4 & CR4_RESERVED_BITS)
 595                 return 1;
 596
 597         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 598                 return 1;
 599
 600         if (is_long_mode(vcpu)) {
 601                 if (!(cr4 & X86_CR4_PAE))
 602                         return 1;
 603         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 604                    && ((cr4 ^ old_cr4) & pdptr_bits)
 605                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
 606                 return 1;
 607
 608         if (cr4 & X86_CR4_VMXE)
 609                 return 1;
 610
 611         kvm_x86_ops->set_cr4(vcpu, cr4);
 612
 613         if ((cr4 ^ old_cr4) & pdptr_bits)
 614                 kvm_mmu_reset_context(vcpu);
 615
 616         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 617                 update_cpuid(vcpu);
 618
 619         return 0;
 620 }
 621 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 622
 623 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 624 {
 625         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 626                 kvm_mmu_sync_roots(vcpu);
 627                 kvm_mmu_flush_tlb(vcpu);
 628                 return 0;
 629         }
 630
 631         if (is_long_mode(vcpu)) {
 632                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 633                         return 1;
 634         } else {
 635                 if (is_pae(vcpu)) {
 636                         if (cr3 & CR3_PAE_RESERVED_BITS)
 637                                 return 1;
 638                         if (is_paging(vcpu) &&
 639                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 640                                 return 1;
 641                 }
 642                 /*
 643                  * We don't check reserved bits in nonpae mode, because
 644                  * this isn't enforced, and VMware depends on this.
 645                  */
 646         }
 647
 648         /*
 649          * Does the new cr3 value map to physical memory? (Note, we
 650          * catch an invalid cr3 even in real-mode, because it would
 651          * cause trouble later on when we turn on paging anyway.)
 652          *
 653          * A real CPU would silently accept an invalid cr3 and would
 654          * attempt to use it - with largely undefined (and often hard
 655          * to debug) behavior on the guest side.
 656          */
 657         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 658                 return 1;
 659         vcpu->arch.cr3 = cr3;
 660         vcpu->arch.mmu.new_cr3(vcpu);
 661         return 0;
 662 }
 663 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 664
 665 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 666 {
 667         if (cr8 & CR8_RESERVED_BITS)
 668                 return 1;
 669         if (irqchip_in_kernel(vcpu->kvm))
 670                 kvm_lapic_set_tpr(vcpu, cr8);
 671         else
 672                 vcpu->arch.cr8 = cr8;
 673         return 0;
 674 }
 675
 676 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 677 {
 678         if (__kvm_set_cr8(vcpu, cr8))
 679                 kvm_inject_gp(vcpu, 0);
 680 }
 681 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 682
 683 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 684 {
 685         if (irqchip_in_kernel(vcpu->kvm))
 686                 return kvm_lapic_get_cr8(vcpu);
 687         else
 688                 return vcpu->arch.cr8;
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 691
 692 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 693 {
 694         switch (dr) {
 695         case 0 ... 3:
 696                 vcpu->arch.db[dr] = val;
 697                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 698                         vcpu->arch.eff_db[dr] = val;
 699                 break;
 700         case 4:
 701                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 702                         return 1; /* #UD */
 703                 /* fall through */
 704         case 6:
 705                 if (val & 0xffffffff00000000ULL)
 706                         return -1; /* #GP */
 707                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 708                 break;
 709         case 5:
 710                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 711                         return 1; /* #UD */
 712                 /* fall through */
 713         default: /* 7 */
 714                 if (val & 0xffffffff00000000ULL)
 715                         return -1; /* #GP */
 716                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 717                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 718                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 719                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 720                 }
 721                 break;
 722         }
 723
 724         return 0;
 725 }
 726
 727 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 728 {
 729         int res;
 730
 731         res = __kvm_set_dr(vcpu, dr, val);
 732         if (res > 0)
 733                 kvm_queue_exception(vcpu, UD_VECTOR);
 734         else if (res < 0)
 735                 kvm_inject_gp(vcpu, 0);
 736
 737         return res;
 738 }
 739 EXPORT_SYMBOL_GPL(kvm_set_dr);
 740
 741 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 742 {
 743         switch (dr) {
 744         case 0 ... 3:
 745                 *val = vcpu->arch.db[dr];
 746                 break;
 747         case 4:
 748                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 749                         return 1;
 750                 /* fall through */
 751         case 6:
 752                 *val = vcpu->arch.dr6;
 753                 break;
 754         case 5:
 755                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 756                         return 1;
 757                 /* fall through */
 758         default: /* 7 */
 759                 *val = vcpu->arch.dr7;
 760                 break;
 761         }
 762
 763         return 0;
 764 }
 765
 766 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 767 {
 768         if (_kvm_get_dr(vcpu, dr, val)) {
 769                 kvm_queue_exception(vcpu, UD_VECTOR);
 770                 return 1;
 771         }
 772         return 0;
 773 }
 774 EXPORT_SYMBOL_GPL(kvm_get_dr);
 775
 776 /*
 777  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 778  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 779  *
 780  * This list is modified at module load time to reflect the
 781  * capabilities of the host cpu. This capabilities test skips MSRs that are
 782  * kvm-specific. Those are put in the beginning of the list.
 783  */
 784
 785 #define KVM_SAVE_MSRS_BEGIN     8
 786 static u32 msrs_to_save[] = {
 787         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 788         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 789         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 790         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 791         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 792         MSR_STAR,
 793 #ifdef CONFIG_X86_64
 794         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 795 #endif
 796         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 797 };
 798
 799 static unsigned num_msrs_to_save;
 800
 801 static u32 emulated_msrs[] = {
 802         MSR_IA32_MISC_ENABLE,
 803         MSR_IA32_MCG_STATUS,
 804         MSR_IA32_MCG_CTL,
 805 };
 806
 807 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 808 {
 809         u64 old_efer = vcpu->arch.efer;
 810
 811         if (efer & efer_reserved_bits)
 812                 return 1;
 813
 814         if (is_paging(vcpu)
 815             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 816                 return 1;
 817
 818         if (efer & EFER_FFXSR) {
 819                 struct kvm_cpuid_entry2 *feat;
 820
 821                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 822                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 823                         return 1;
 824         }
 825
 826         if (efer & EFER_SVME) {
 827                 struct kvm_cpuid_entry2 *feat;
 828
 829                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 830                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 831                         return 1;
 832         }
 833
 834         efer &= ~EFER_LMA;
 835         efer |= vcpu->arch.efer & EFER_LMA;
 836
 837         kvm_x86_ops->set_efer(vcpu, efer);
 838
 839         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 840
 841         /* Update reserved bits */
 842         if ((efer ^ old_efer) & EFER_NX)
 843                 kvm_mmu_reset_context(vcpu);
 844
 845         return 0;
 846 }
 847
 848 void kvm_enable_efer_bits(u64 mask)
 849 {
 850        efer_reserved_bits &= ~mask;
 851 }
 852 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 853
 854
 855 /*
 856  * Writes msr value into into the appropriate "register".
 857  * Returns 0 on success, non-0 otherwise.
 858  * Assumes vcpu_load() was already called.
 859  */
 860 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 861 {
 862         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 863 }
 864
 865 /*
 866  * Adapt set_msr() to msr_io()'s calling convention
 867  */
 868 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 869 {
 870         return kvm_set_msr(vcpu, index, *data);
 871 }
 872
 873 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 874 {
 875         int version;
 876         int r;
 877         struct pvclock_wall_clock wc;
 878         struct timespec boot;
 879
 880         if (!wall_clock)
 881                 return;
 882
 883         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 884         if (r)
 885                 return;
 886
 887         if (version & 1)
 888                 ++version;  /* first time write, random junk */
 889
 890         ++version;
 891
 892         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 893
 894         /*
 895          * The guest calculates current wall clock time by adding
 896          * system time (updated by kvm_guest_time_update below) to the
 897          * wall clock specified here.  guest system time equals host
 898          * system time for us, thus we must fill in host boot time here.
 899          */
 900         getboottime(&boot);
 901
 902         wc.sec = boot.tv_sec;
 903         wc.nsec = boot.tv_nsec;
 904         wc.version = version;
 905
 906         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 907
 908         version++;
 909         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 910 }
 911
 912 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 913 {
 914         uint32_t quotient, remainder;
 915
 916         /* Don't try to replace with do_div(), this one calculates
 917          * "(dividend << 32) / divisor" */
 918         __asm__ ( "divl %4"
 919                   : "=a" (quotient), "=d" (remainder)
 920                   : "0" (0), "1" (dividend), "r" (divisor) );
 921         return quotient;
 922 }
 923
 924 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 925                                s8 *pshift, u32 *pmultiplier)
 926 {
 927         uint64_t scaled64;
 928         int32_t  shift = 0;
 929         uint64_t tps64;
 930         uint32_t tps32;
 931
 932         tps64 = base_khz * 1000LL;
 933         scaled64 = scaled_khz * 1000LL;
 934         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 935                 tps64 >>= 1;
 936                 shift--;
 937         }
 938
 939         tps32 = (uint32_t)tps64;
 940         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 941                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 942                         scaled64 >>= 1;
 943                 else
 944                         tps32 <<= 1;
 945                 shift++;
 946         }
 947
 948         *pshift = shift;
 949         *pmultiplier = div_frac(scaled64, tps32);
 950
 951         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 952                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 953 }
 954
 955 static inline u64 get_kernel_ns(void)
 956 {
 957         struct timespec ts;
 958
 959         WARN_ON(preemptible());
 960         ktime_get_ts(&ts);
 961         monotonic_to_bootbased(&ts);
 962         return timespec_to_ns(&ts);
 963 }
 964
 965 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 966 unsigned long max_tsc_khz;
 967
 968 static inline int kvm_tsc_changes_freq(void)
 969 {
 970         int cpu = get_cpu();
 971         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 972                   cpufreq_quick_get(cpu) != 0;
 973         put_cpu();
 974         return ret;
 975 }
 976
 977 static inline u64 nsec_to_cycles(u64 nsec)
 978 {
 979         u64 ret;
 980
 981         WARN_ON(preemptible());
 982         if (kvm_tsc_changes_freq())
 983                 printk_once(KERN_WARNING
 984                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 985         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 986         do_div(ret, USEC_PER_SEC);
 987         return ret;
 988 }
 989
 990 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 991 {
 992         /* Compute a scale to convert nanoseconds in TSC cycles */
 993         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 994                            &kvm->arch.virtual_tsc_shift,
 995                            &kvm->arch.virtual_tsc_mult);
 996         kvm->arch.virtual_tsc_khz = this_tsc_khz;
 997 }
 998
 999 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1000 {
1001         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1002                                       vcpu->kvm->arch.virtual_tsc_mult,
1003                                       vcpu->kvm->arch.virtual_tsc_shift);
1004         tsc += vcpu->arch.last_tsc_write;
1005         return tsc;
1006 }
1007
1008 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1009 {
1010         struct kvm *kvm = vcpu->kvm;
1011         u64 offset, ns, elapsed;
1012         unsigned long flags;
1013         s64 sdiff;
1014
1015         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1016         offset = data - native_read_tsc();
1017         ns = get_kernel_ns();
1018         elapsed = ns - kvm->arch.last_tsc_nsec;
1019         sdiff = data - kvm->arch.last_tsc_write;
1020         if (sdiff < 0)
1021                 sdiff = -sdiff;
1022
1023         /*
1024          * Special case: close write to TSC within 5 seconds of
1025          * another CPU is interpreted as an attempt to synchronize
1026          * The 5 seconds is to accomodate host load / swapping as
1027          * well as any reset of TSC during the boot process.
1028          *
1029          * In that case, for a reliable TSC, we can match TSC offsets,
1030          * or make a best guest using elapsed value.
1031          */
1032         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1033             elapsed < 5ULL * NSEC_PER_SEC) {
1034                 if (!check_tsc_unstable()) {
1035                         offset = kvm->arch.last_tsc_offset;
1036                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1037                 } else {
1038                         u64 delta = nsec_to_cycles(elapsed);
1039                         offset += delta;
1040                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1041                 }
1042                 ns = kvm->arch.last_tsc_nsec;
1043         }
1044         kvm->arch.last_tsc_nsec = ns;
1045         kvm->arch.last_tsc_write = data;
1046         kvm->arch.last_tsc_offset = offset;
1047         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1048         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1049
1050         /* Reset of TSC must disable overshoot protection below */
1051         vcpu->arch.hv_clock.tsc_timestamp = 0;
1052         vcpu->arch.last_tsc_write = data;
1053         vcpu->arch.last_tsc_nsec = ns;
1054 }
1055 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1056
1057 static int kvm_guest_time_update(struct kvm_vcpu *v)
1058 {
1059         unsigned long flags;
1060         struct kvm_vcpu_arch *vcpu = &v->arch;
1061         void *shared_kaddr;
1062         unsigned long this_tsc_khz;
1063         s64 kernel_ns, max_kernel_ns;
1064         u64 tsc_timestamp;
1065
1066         /* Keep irq disabled to prevent changes to the clock */
1067         local_irq_save(flags);
1068         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1069         kernel_ns = get_kernel_ns();
1070         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1071
1072         if (unlikely(this_tsc_khz == 0)) {
1073                 local_irq_restore(flags);
1074                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1075                 return 1;
1076         }
1077
1078         /*
1079          * We may have to catch up the TSC to match elapsed wall clock
1080          * time for two reasons, even if kvmclock is used.
1081          *   1) CPU could have been running below the maximum TSC rate
1082          *   2) Broken TSC compensation resets the base at each VCPU
1083          *      entry to avoid unknown leaps of TSC even when running
1084          *      again on the same CPU.  This may cause apparent elapsed
1085          *      time to disappear, and the guest to stand still or run
1086          *      very slowly.
1087          */
1088         if (vcpu->tsc_catchup) {
1089                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1090                 if (tsc > tsc_timestamp) {
1091                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1092                         tsc_timestamp = tsc;
1093                 }
1094         }
1095
1096         local_irq_restore(flags);
1097
1098         if (!vcpu->time_page)
1099                 return 0;
1100
1101         /*
1102          * Time as measured by the TSC may go backwards when resetting the base
1103          * tsc_timestamp.  The reason for this is that the TSC resolution is
1104          * higher than the resolution of the other clock scales.  Thus, many
1105          * possible measurments of the TSC correspond to one measurement of any
1106          * other clock, and so a spread of values is possible.  This is not a
1107          * problem for the computation of the nanosecond clock; with TSC rates
1108          * around 1GHZ, there can only be a few cycles which correspond to one
1109          * nanosecond value, and any path through this code will inevitably
1110          * take longer than that.  However, with the kernel_ns value itself,
1111          * the precision may be much lower, down to HZ granularity.  If the
1112          * first sampling of TSC against kernel_ns ends in the low part of the
1113          * range, and the second in the high end of the range, we can get:
1114          *
1115          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1116          *
1117          * As the sampling errors potentially range in the thousands of cycles,
1118          * it is possible such a time value has already been observed by the
1119          * guest.  To protect against this, we must compute the system time as
1120          * observed by the guest and ensure the new system time is greater.
1121          */
1122         max_kernel_ns = 0;
1123         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1124                 max_kernel_ns = vcpu->last_guest_tsc -
1125                                 vcpu->hv_clock.tsc_timestamp;
1126                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1127                                     vcpu->hv_clock.tsc_to_system_mul,
1128                                     vcpu->hv_clock.tsc_shift);
1129                 max_kernel_ns += vcpu->last_kernel_ns;
1130         }
1131
1132         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1133                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1134                                    &vcpu->hv_clock.tsc_shift,
1135                                    &vcpu->hv_clock.tsc_to_system_mul);
1136                 vcpu->hw_tsc_khz = this_tsc_khz;
1137         }
1138
1139         if (max_kernel_ns > kernel_ns)
1140                 kernel_ns = max_kernel_ns;
1141
1142         /* With all the info we got, fill in the values */
1143         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1144         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1145         vcpu->last_kernel_ns = kernel_ns;
1146         vcpu->last_guest_tsc = tsc_timestamp;
1147         vcpu->hv_clock.flags = 0;
1148
1149         /*
1150          * The interface expects us to write an even number signaling that the
1151          * update is finished. Since the guest won't see the intermediate
1152          * state, we just increase by 2 at the end.
1153          */
1154         vcpu->hv_clock.version += 2;
1155
1156         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1157
1158         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1159                sizeof(vcpu->hv_clock));
1160
1161         kunmap_atomic(shared_kaddr, KM_USER0);
1162
1163         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1164         return 0;
1165 }
1166
1167 static bool msr_mtrr_valid(unsigned msr)
1168 {
1169         switch (msr) {
1170         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1171         case MSR_MTRRfix64K_00000:
1172         case MSR_MTRRfix16K_80000:
1173         case MSR_MTRRfix16K_A0000:
1174         case MSR_MTRRfix4K_C0000:
1175         case MSR_MTRRfix4K_C8000:
1176         case MSR_MTRRfix4K_D0000:
1177         case MSR_MTRRfix4K_D8000:
1178         case MSR_MTRRfix4K_E0000:
1179         case MSR_MTRRfix4K_E8000:
1180         case MSR_MTRRfix4K_F0000:
1181         case MSR_MTRRfix4K_F8000:
1182         case MSR_MTRRdefType:
1183         case MSR_IA32_CR_PAT:
1184                 return true;
1185         case 0x2f8:
1186                 return true;
1187         }
1188         return false;
1189 }
1190
1191 static bool valid_pat_type(unsigned t)
1192 {
1193         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1194 }
1195
1196 static bool valid_mtrr_type(unsigned t)
1197 {
1198         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1199 }
1200
1201 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1202 {
1203         int i;
1204
1205         if (!msr_mtrr_valid(msr))
1206                 return false;
1207
1208         if (msr == MSR_IA32_CR_PAT) {
1209                 for (i = 0; i < 8; i++)
1210                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1211                                 return false;
1212                 return true;
1213         } else if (msr == MSR_MTRRdefType) {
1214                 if (data & ~0xcff)
1215                         return false;
1216                 return valid_mtrr_type(data & 0xff);
1217         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1218                 for (i = 0; i < 8 ; i++)
1219                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1220                                 return false;
1221                 return true;
1222         }
1223
1224         /* variable MTRRs */
1225         return valid_mtrr_type(data & 0xff);
1226 }
1227
1228 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1229 {
1230         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1231
1232         if (!mtrr_valid(vcpu, msr, data))
1233                 return 1;
1234
1235         if (msr == MSR_MTRRdefType) {
1236                 vcpu->arch.mtrr_state.def_type = data;
1237                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1238         } else if (msr == MSR_MTRRfix64K_00000)
1239                 p[0] = data;
1240         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1241                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1242         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1243                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1244         else if (msr == MSR_IA32_CR_PAT)
1245                 vcpu->arch.pat = data;
1246         else {  /* Variable MTRRs */
1247                 int idx, is_mtrr_mask;
1248                 u64 *pt;
1249
1250                 idx = (msr - 0x200) / 2;
1251                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1252                 if (!is_mtrr_mask)
1253                         pt =
1254                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1255                 else
1256                         pt =
1257                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1258                 *pt = data;
1259         }
1260
1261         kvm_mmu_reset_context(vcpu);
1262         return 0;
1263 }
1264
1265 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1266 {
1267         u64 mcg_cap = vcpu->arch.mcg_cap;
1268         unsigned bank_num = mcg_cap & 0xff;
1269
1270         switch (msr) {
1271         case MSR_IA32_MCG_STATUS:
1272                 vcpu->arch.mcg_status = data;
1273                 break;
1274         case MSR_IA32_MCG_CTL:
1275                 if (!(mcg_cap & MCG_CTL_P))
1276                         return 1;
1277                 if (data != 0 && data != ~(u64)0)
1278                         return -1;
1279                 vcpu->arch.mcg_ctl = data;
1280                 break;
1281         default:
1282                 if (msr >= MSR_IA32_MC0_CTL &&
1283                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1284                         u32 offset = msr - MSR_IA32_MC0_CTL;
1285                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1286                          * some Linux kernels though clear bit 10 in bank 4 to
1287                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1288                          * this to avoid an uncatched #GP in the guest
1289                          */
1290                         if ((offset & 0x3) == 0 &&
1291                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1292                                 return -1;
1293                         vcpu->arch.mce_banks[offset] = data;
1294                         break;
1295                 }
1296                 return 1;
1297         }
1298         return 0;
1299 }
1300
1301 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1302 {
1303         struct kvm *kvm = vcpu->kvm;
1304         int lm = is_long_mode(vcpu);
1305         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1306                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1307         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1308                 : kvm->arch.xen_hvm_config.blob_size_32;
1309         u32 page_num = data & ~PAGE_MASK;
1310         u64 page_addr = data & PAGE_MASK;
1311         u8 *page;
1312         int r;
1313
1314         r = -E2BIG;
1315         if (page_num >= blob_size)
1316                 goto out;
1317         r = -ENOMEM;
1318         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1319         if (!page)
1320                 goto out;
1321         r = -EFAULT;
1322         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1323                 goto out_free;
1324         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1325                 goto out_free;
1326         r = 0;
1327 out_free:
1328         kfree(page);
1329 out:
1330         return r;
1331 }
1332
1333 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1334 {
1335         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1336 }
1337
1338 static bool kvm_hv_msr_partition_wide(u32 msr)
1339 {
1340         bool r = false;
1341         switch (msr) {
1342         case HV_X64_MSR_GUEST_OS_ID:
1343         case HV_X64_MSR_HYPERCALL:
1344                 r = true;
1345                 break;
1346         }
1347
1348         return r;
1349 }
1350
1351 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1352 {
1353         struct kvm *kvm = vcpu->kvm;
1354
1355         switch (msr) {
1356         case HV_X64_MSR_GUEST_OS_ID:
1357                 kvm->arch.hv_guest_os_id = data;
1358                 /* setting guest os id to zero disables hypercall page */
1359                 if (!kvm->arch.hv_guest_os_id)
1360                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1361                 break;
1362         case HV_X64_MSR_HYPERCALL: {
1363                 u64 gfn;
1364                 unsigned long addr;
1365                 u8 instructions[4];
1366
1367                 /* if guest os id is not set hypercall should remain disabled */
1368                 if (!kvm->arch.hv_guest_os_id)
1369                         break;
1370                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1371                         kvm->arch.hv_hypercall = data;
1372                         break;
1373                 }
1374                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1375                 addr = gfn_to_hva(kvm, gfn);
1376                 if (kvm_is_error_hva(addr))
1377                         return 1;
1378                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1379                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1380                 if (copy_to_user((void __user *)addr, instructions, 4))
1381                         return 1;
1382                 kvm->arch.hv_hypercall = data;
1383                 break;
1384         }
1385         default:
1386                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1387                           "data 0x%llx\n", msr, data);
1388                 return 1;
1389         }
1390         return 0;
1391 }
1392
1393 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1394 {
1395         switch (msr) {
1396         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1397                 unsigned long addr;
1398
1399                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1400                         vcpu->arch.hv_vapic = data;
1401                         break;
1402                 }
1403                 addr = gfn_to_hva(vcpu->kvm, data >>
1404                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1405                 if (kvm_is_error_hva(addr))
1406                         return 1;
1407                 if (clear_user((void __user *)addr, PAGE_SIZE))
1408                         return 1;
1409                 vcpu->arch.hv_vapic = data;
1410                 break;
1411         }
1412         case HV_X64_MSR_EOI:
1413                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1414         case HV_X64_MSR_ICR:
1415                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1416         case HV_X64_MSR_TPR:
1417                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1418         default:
1419                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1420                           "data 0x%llx\n", msr, data);
1421                 return 1;
1422         }
1423
1424         return 0;
1425 }
1426
1427 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1428 {
1429         gpa_t gpa = data & ~0x3f;
1430
1431         /* Bits 2:5 are resrved, Should be zero */
1432         if (data & 0x3c)
1433                 return 1;
1434
1435         vcpu->arch.apf.msr_val = data;
1436
1437         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1438                 kvm_clear_async_pf_completion_queue(vcpu);
1439                 kvm_async_pf_hash_reset(vcpu);
1440                 return 0;
1441         }
1442
1443         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1444                 return 1;
1445
1446         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1447         kvm_async_pf_wakeup_all(vcpu);
1448         return 0;
1449 }
1450
1451 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1452 {
1453         switch (msr) {
1454         case MSR_EFER:
1455                 return set_efer(vcpu, data);
1456         case MSR_K7_HWCR:
1457                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1458                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1459                 if (data != 0) {
1460                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1461                                 data);
1462                         return 1;
1463                 }
1464                 break;
1465         case MSR_FAM10H_MMIO_CONF_BASE:
1466                 if (data != 0) {
1467                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1468                                 "0x%llx\n", data);
1469                         return 1;
1470                 }
1471                 break;
1472         case MSR_AMD64_NB_CFG:
1473                 break;
1474         case MSR_IA32_DEBUGCTLMSR:
1475                 if (!data) {
1476                         /* We support the non-activated case already */
1477                         break;
1478                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1479                         /* Values other than LBR and BTF are vendor-specific,
1480                            thus reserved and should throw a #GP */
1481                         return 1;
1482                 }
1483                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1484                         __func__, data);
1485                 break;
1486         case MSR_IA32_UCODE_REV:
1487         case MSR_IA32_UCODE_WRITE:
1488         case MSR_VM_HSAVE_PA:
1489         case MSR_AMD64_PATCH_LOADER:
1490                 break;
1491         case 0x200 ... 0x2ff:
1492                 return set_msr_mtrr(vcpu, msr, data);
1493         case MSR_IA32_APICBASE:
1494                 kvm_set_apic_base(vcpu, data);
1495                 break;
1496         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1497                 return kvm_x2apic_msr_write(vcpu, msr, data);
1498         case MSR_IA32_MISC_ENABLE:
1499                 vcpu->arch.ia32_misc_enable_msr = data;
1500                 break;
1501         case MSR_KVM_WALL_CLOCK_NEW:
1502         case MSR_KVM_WALL_CLOCK:
1503                 vcpu->kvm->arch.wall_clock = data;
1504                 kvm_write_wall_clock(vcpu->kvm, data);
1505                 break;
1506         case MSR_KVM_SYSTEM_TIME_NEW:
1507         case MSR_KVM_SYSTEM_TIME: {
1508                 if (vcpu->arch.time_page) {
1509                         kvm_release_page_dirty(vcpu->arch.time_page);
1510                         vcpu->arch.time_page = NULL;
1511                 }
1512
1513                 vcpu->arch.time = data;
1514                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1515
1516                 /* we verify if the enable bit is set... */
1517                 if (!(data & 1))
1518                         break;
1519
1520                 /* ...but clean it before doing the actual write */
1521                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1522
1523                 vcpu->arch.time_page =
1524                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1525
1526                 if (is_error_page(vcpu->arch.time_page)) {
1527                         kvm_release_page_clean(vcpu->arch.time_page);
1528                         vcpu->arch.time_page = NULL;
1529                 }
1530                 break;
1531         }
1532         case MSR_KVM_ASYNC_PF_EN:
1533                 if (kvm_pv_enable_async_pf(vcpu, data))
1534                         return 1;
1535                 break;
1536         case MSR_IA32_MCG_CTL:
1537         case MSR_IA32_MCG_STATUS:
1538         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1539                 return set_msr_mce(vcpu, msr, data);
1540
1541         /* Performance counters are not protected by a CPUID bit,
1542          * so we should check all of them in the generic path for the sake of
1543          * cross vendor migration.
1544          * Writing a zero into the event select MSRs disables them,
1545          * which we perfectly emulate ;-). Any other value should be at least
1546          * reported, some guests depend on them.
1547          */
1548         case MSR_P6_EVNTSEL0:
1549         case MSR_P6_EVNTSEL1:
1550         case MSR_K7_EVNTSEL0:
1551         case MSR_K7_EVNTSEL1:
1552         case MSR_K7_EVNTSEL2:
1553         case MSR_K7_EVNTSEL3:
1554                 if (data != 0)
1555                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1556                                 "0x%x data 0x%llx\n", msr, data);
1557                 break;
1558         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1559          * so we ignore writes to make it happy.
1560          */
1561         case MSR_P6_PERFCTR0:
1562         case MSR_P6_PERFCTR1:
1563         case MSR_K7_PERFCTR0:
1564         case MSR_K7_PERFCTR1:
1565         case MSR_K7_PERFCTR2:
1566         case MSR_K7_PERFCTR3:
1567                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1568                         "0x%x data 0x%llx\n", msr, data);
1569                 break;
1570         case MSR_K7_CLK_CTL:
1571                 /*
1572                  * Ignore all writes to this no longer documented MSR.
1573                  * Writes are only relevant for old K7 processors,
1574                  * all pre-dating SVM, but a recommended workaround from
1575                  * AMD for these chips. It is possible to speicify the
1576                  * affected processor models on the command line, hence
1577                  * the need to ignore the workaround.
1578                  */
1579                 break;
1580         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1581                 if (kvm_hv_msr_partition_wide(msr)) {
1582                         int r;
1583                         mutex_lock(&vcpu->kvm->lock);
1584                         r = set_msr_hyperv_pw(vcpu, msr, data);
1585                         mutex_unlock(&vcpu->kvm->lock);
1586                         return r;
1587                 } else
1588                         return set_msr_hyperv(vcpu, msr, data);
1589                 break;
1590         default:
1591                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1592                         return xen_hvm_config(vcpu, data);
1593                 if (!ignore_msrs) {
1594                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1595                                 msr, data);
1596                         return 1;
1597                 } else {
1598                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1599                                 msr, data);
1600                         break;
1601                 }
1602         }
1603         return 0;
1604 }
1605 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1606
1607
1608 /*
1609  * Reads an msr value (of 'msr_index') into 'pdata'.
1610  * Returns 0 on success, non-0 otherwise.
1611  * Assumes vcpu_load() was already called.
1612  */
1613 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1614 {
1615         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1616 }
1617
1618 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1619 {
1620         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1621
1622         if (!msr_mtrr_valid(msr))
1623                 return 1;
1624
1625         if (msr == MSR_MTRRdefType)
1626                 *pdata = vcpu->arch.mtrr_state.def_type +
1627                          (vcpu->arch.mtrr_state.enabled << 10);
1628         else if (msr == MSR_MTRRfix64K_00000)
1629                 *pdata = p[0];
1630         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1631                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1632         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1633                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1634         else if (msr == MSR_IA32_CR_PAT)
1635                 *pdata = vcpu->arch.pat;
1636         else {  /* Variable MTRRs */
1637                 int idx, is_mtrr_mask;
1638                 u64 *pt;
1639
1640                 idx = (msr - 0x200) / 2;
1641                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1642                 if (!is_mtrr_mask)
1643                         pt =
1644                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1645                 else
1646                         pt =
1647                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1648                 *pdata = *pt;
1649         }
1650
1651         return 0;
1652 }
1653
1654 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1655 {
1656         u64 data;
1657         u64 mcg_cap = vcpu->arch.mcg_cap;
1658         unsigned bank_num = mcg_cap & 0xff;
1659
1660         switch (msr) {
1661         case MSR_IA32_P5_MC_ADDR:
1662         case MSR_IA32_P5_MC_TYPE:
1663                 data = 0;
1664                 break;
1665         case MSR_IA32_MCG_CAP:
1666                 data = vcpu->arch.mcg_cap;
1667                 break;
1668         case MSR_IA32_MCG_CTL:
1669                 if (!(mcg_cap & MCG_CTL_P))
1670                         return 1;
1671                 data = vcpu->arch.mcg_ctl;
1672                 break;
1673         case MSR_IA32_MCG_STATUS:
1674                 data = vcpu->arch.mcg_status;
1675                 break;
1676         default:
1677                 if (msr >= MSR_IA32_MC0_CTL &&
1678                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1679                         u32 offset = msr - MSR_IA32_MC0_CTL;
1680                         data = vcpu->arch.mce_banks[offset];
1681                         break;
1682                 }
1683                 return 1;
1684         }
1685         *pdata = data;
1686         return 0;
1687 }
1688
1689 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1690 {
1691         u64 data = 0;
1692         struct kvm *kvm = vcpu->kvm;
1693
1694         switch (msr) {
1695         case HV_X64_MSR_GUEST_OS_ID:
1696                 data = kvm->arch.hv_guest_os_id;
1697                 break;
1698         case HV_X64_MSR_HYPERCALL:
1699                 data = kvm->arch.hv_hypercall;
1700                 break;
1701         default:
1702                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1703                 return 1;
1704         }
1705
1706         *pdata = data;
1707         return 0;
1708 }
1709
1710 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1711 {
1712         u64 data = 0;
1713
1714         switch (msr) {
1715         case HV_X64_MSR_VP_INDEX: {
1716                 int r;
1717                 struct kvm_vcpu *v;
1718                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1719                         if (v == vcpu)
1720                                 data = r;
1721                 break;
1722         }
1723         case HV_X64_MSR_EOI:
1724                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1725         case HV_X64_MSR_ICR:
1726                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1727         case HV_X64_MSR_TPR:
1728                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1729         default:
1730                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1731                 return 1;
1732         }
1733         *pdata = data;
1734         return 0;
1735 }
1736
1737 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1738 {
1739         u64 data;
1740
1741         switch (msr) {
1742         case MSR_IA32_PLATFORM_ID:
1743         case MSR_IA32_UCODE_REV:
1744         case MSR_IA32_EBL_CR_POWERON:
1745         case MSR_IA32_DEBUGCTLMSR:
1746         case MSR_IA32_LASTBRANCHFROMIP:
1747         case MSR_IA32_LASTBRANCHTOIP:
1748         case MSR_IA32_LASTINTFROMIP:
1749         case MSR_IA32_LASTINTTOIP:
1750         case MSR_K8_SYSCFG:
1751         case MSR_K7_HWCR:
1752         case MSR_VM_HSAVE_PA:
1753         case MSR_P6_PERFCTR0:
1754         case MSR_P6_PERFCTR1:
1755         case MSR_P6_EVNTSEL0:
1756         case MSR_P6_EVNTSEL1:
1757         case MSR_K7_EVNTSEL0:
1758         case MSR_K7_PERFCTR0:
1759         case MSR_K8_INT_PENDING_MSG:
1760         case MSR_AMD64_NB_CFG:
1761         case MSR_FAM10H_MMIO_CONF_BASE:
1762                 data = 0;
1763                 break;
1764         case MSR_MTRRcap:
1765                 data = 0x500 | KVM_NR_VAR_MTRR;
1766                 break;
1767         case 0x200 ... 0x2ff:
1768                 return get_msr_mtrr(vcpu, msr, pdata);
1769         case 0xcd: /* fsb frequency */
1770                 data = 3;
1771                 break;
1772                 /*
1773                  * MSR_EBC_FREQUENCY_ID
1774                  * Conservative value valid for even the basic CPU models.
1775                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1776                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1777                  * and 266MHz for model 3, or 4. Set Core Clock
1778                  * Frequency to System Bus Frequency Ratio to 1 (bits
1779                  * 31:24) even though these are only valid for CPU
1780                  * models > 2, however guests may end up dividing or
1781                  * multiplying by zero otherwise.
1782                  */
1783         case MSR_EBC_FREQUENCY_ID:
1784                 data = 1 << 24;
1785                 break;
1786         case MSR_IA32_APICBASE:
1787                 data = kvm_get_apic_base(vcpu);
1788                 break;
1789         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1790                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1791                 break;
1792         case MSR_IA32_MISC_ENABLE:
1793                 data = vcpu->arch.ia32_misc_enable_msr;
1794                 break;
1795         case MSR_IA32_PERF_STATUS:
1796                 /* TSC increment by tick */
1797                 data = 1000ULL;
1798                 /* CPU multiplier */
1799                 data |= (((uint64_t)4ULL) << 40);
1800                 break;
1801         case MSR_EFER:
1802                 data = vcpu->arch.efer;
1803                 break;
1804         case MSR_KVM_WALL_CLOCK:
1805         case MSR_KVM_WALL_CLOCK_NEW:
1806                 data = vcpu->kvm->arch.wall_clock;
1807                 break;
1808         case MSR_KVM_SYSTEM_TIME:
1809         case MSR_KVM_SYSTEM_TIME_NEW:
1810                 data = vcpu->arch.time;
1811                 break;
1812         case MSR_KVM_ASYNC_PF_EN:
1813                 data = vcpu->arch.apf.msr_val;
1814                 break;
1815         case MSR_IA32_P5_MC_ADDR:
1816         case MSR_IA32_P5_MC_TYPE:
1817         case MSR_IA32_MCG_CAP:
1818         case MSR_IA32_MCG_CTL:
1819         case MSR_IA32_MCG_STATUS:
1820         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1821                 return get_msr_mce(vcpu, msr, pdata);
1822         case MSR_K7_CLK_CTL:
1823                 /*
1824                  * Provide expected ramp-up count for K7. All other
1825                  * are set to zero, indicating minimum divisors for
1826                  * every field.
1827                  *
1828                  * This prevents guest kernels on AMD host with CPU
1829                  * type 6, model 8 and higher from exploding due to
1830                  * the rdmsr failing.
1831                  */
1832                 data = 0x20000000;
1833                 break;
1834         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1835                 if (kvm_hv_msr_partition_wide(msr)) {
1836                         int r;
1837                         mutex_lock(&vcpu->kvm->lock);
1838                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1839                         mutex_unlock(&vcpu->kvm->lock);
1840                         return r;
1841                 } else
1842                         return get_msr_hyperv(vcpu, msr, pdata);
1843                 break;
1844         default:
1845                 if (!ignore_msrs) {
1846                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1847                         return 1;
1848                 } else {
1849                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1850                         data = 0;
1851                 }
1852                 break;
1853         }
1854         *pdata = data;
1855         return 0;
1856 }
1857 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1858
1859 /*
1860  * Read or write a bunch of msrs. All parameters are kernel addresses.
1861  *
1862  * @return number of msrs set successfully.
1863  */
1864 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1865                     struct kvm_msr_entry *entries,
1866                     int (*do_msr)(struct kvm_vcpu *vcpu,
1867                                   unsigned index, u64 *data))
1868 {
1869         int i, idx;
1870
1871         idx = srcu_read_lock(&vcpu->kvm->srcu);
1872         for (i = 0; i < msrs->nmsrs; ++i)
1873                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1874                         break;
1875         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1876
1877         return i;
1878 }
1879
1880 /*
1881  * Read or write a bunch of msrs. Parameters are user addresses.
1882  *
1883  * @return number of msrs set successfully.
1884  */
1885 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1886                   int (*do_msr)(struct kvm_vcpu *vcpu,
1887                                 unsigned index, u64 *data),
1888                   int writeback)
1889 {
1890         struct kvm_msrs msrs;
1891         struct kvm_msr_entry *entries;
1892         int r, n;
1893         unsigned size;
1894
1895         r = -EFAULT;
1896         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1897                 goto out;
1898
1899         r = -E2BIG;
1900         if (msrs.nmsrs >= MAX_IO_MSRS)
1901                 goto out;
1902
1903         r = -ENOMEM;
1904         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1905         entries = kmalloc(size, GFP_KERNEL);
1906         if (!entries)
1907                 goto out;
1908
1909         r = -EFAULT;
1910         if (copy_from_user(entries, user_msrs->entries, size))
1911                 goto out_free;
1912
1913         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1914         if (r < 0)
1915                 goto out_free;
1916
1917         r = -EFAULT;
1918         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1919                 goto out_free;
1920
1921         r = n;
1922
1923 out_free:
1924         kfree(entries);
1925 out:
1926         return r;
1927 }
1928
1929 int kvm_dev_ioctl_check_extension(long ext)
1930 {
1931         int r;
1932
1933         switch (ext) {
1934         case KVM_CAP_IRQCHIP:
1935         case KVM_CAP_HLT:
1936         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1937         case KVM_CAP_SET_TSS_ADDR:
1938         case KVM_CAP_EXT_CPUID:
1939         case KVM_CAP_CLOCKSOURCE:
1940         case KVM_CAP_PIT:
1941         case KVM_CAP_NOP_IO_DELAY:
1942         case KVM_CAP_MP_STATE:
1943         case KVM_CAP_SYNC_MMU:
1944         case KVM_CAP_USER_NMI:
1945         case KVM_CAP_REINJECT_CONTROL:
1946         case KVM_CAP_IRQ_INJECT_STATUS:
1947         case KVM_CAP_ASSIGN_DEV_IRQ:
1948         case KVM_CAP_IRQFD:
1949         case KVM_CAP_IOEVENTFD:
1950         case KVM_CAP_PIT2:
1951         case KVM_CAP_PIT_STATE2:
1952         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1953         case KVM_CAP_XEN_HVM:
1954         case KVM_CAP_ADJUST_CLOCK:
1955         case KVM_CAP_VCPU_EVENTS:
1956         case KVM_CAP_HYPERV:
1957         case KVM_CAP_HYPERV_VAPIC:
1958         case KVM_CAP_HYPERV_SPIN:
1959         case KVM_CAP_PCI_SEGMENT:
1960         case KVM_CAP_DEBUGREGS:
1961         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1962         case KVM_CAP_XSAVE:
1963         case KVM_CAP_ASYNC_PF:
1964                 r = 1;
1965                 break;
1966         case KVM_CAP_COALESCED_MMIO:
1967                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1968                 break;
1969         case KVM_CAP_VAPIC:
1970                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1971                 break;
1972         case KVM_CAP_NR_VCPUS:
1973                 r = KVM_MAX_VCPUS;
1974                 break;
1975         case KVM_CAP_NR_MEMSLOTS:
1976                 r = KVM_MEMORY_SLOTS;
1977                 break;
1978         case KVM_CAP_PV_MMU:    /* obsolete */
1979                 r = 0;
1980                 break;
1981         case KVM_CAP_IOMMU:
1982                 r = iommu_found();
1983                 break;
1984         case KVM_CAP_MCE:
1985                 r = KVM_MAX_MCE_BANKS;
1986                 break;
1987         case KVM_CAP_XCRS:
1988                 r = cpu_has_xsave;
1989                 break;
1990         default:
1991                 r = 0;
1992                 break;
1993         }
1994         return r;
1995
1996 }
1997
1998 long kvm_arch_dev_ioctl(struct file *filp,
1999                         unsigned int ioctl, unsigned long arg)
2000 {
2001         void __user *argp = (void __user *)arg;
2002         long r;
2003
2004         switch (ioctl) {
2005         case KVM_GET_MSR_INDEX_LIST: {
2006                 struct kvm_msr_list __user *user_msr_list = argp;
2007                 struct kvm_msr_list msr_list;
2008                 unsigned n;
2009
2010                 r = -EFAULT;
2011                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2012                         goto out;
2013                 n = msr_list.nmsrs;
2014                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2015                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2016                         goto out;
2017                 r = -E2BIG;
2018                 if (n < msr_list.nmsrs)
2019                         goto out;
2020                 r = -EFAULT;
2021                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2022                                  num_msrs_to_save * sizeof(u32)))
2023                         goto out;
2024                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2025                                  &emulated_msrs,
2026                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2027                         goto out;
2028                 r = 0;
2029                 break;
2030         }
2031         case KVM_GET_SUPPORTED_CPUID: {
2032                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2033                 struct kvm_cpuid2 cpuid;
2034
2035                 r = -EFAULT;
2036                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2037                         goto out;
2038                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2039                                                       cpuid_arg->entries);
2040                 if (r)
2041                         goto out;
2042
2043                 r = -EFAULT;
2044                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2045                         goto out;
2046                 r = 0;
2047                 break;
2048         }
2049         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2050                 u64 mce_cap;
2051
2052                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2053                 r = -EFAULT;
2054                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2055                         goto out;
2056                 r = 0;
2057                 break;
2058         }
2059         default:
2060                 r = -EINVAL;
2061         }
2062 out:
2063         return r;
2064 }
2065
2066 static void wbinvd_ipi(void *garbage)
2067 {
2068         wbinvd();
2069 }
2070
2071 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2072 {
2073         return vcpu->kvm->arch.iommu_domain &&
2074                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2075 }
2076
2077 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2078 {
2079         /* Address WBINVD may be executed by guest */
2080         if (need_emulate_wbinvd(vcpu)) {
2081                 if (kvm_x86_ops->has_wbinvd_exit())
2082                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2083                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2084                         smp_call_function_single(vcpu->cpu,
2085                                         wbinvd_ipi, NULL, 1);
2086         }
2087
2088         kvm_x86_ops->vcpu_load(vcpu, cpu);
2089         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2090                 /* Make sure TSC doesn't go backwards */
2091                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2092                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2093                 if (tsc_delta < 0)
2094                         mark_tsc_unstable("KVM discovered backwards TSC");
2095                 if (check_tsc_unstable()) {
2096                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2097                         vcpu->arch.tsc_catchup = 1;
2098                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2099                 }
2100                 if (vcpu->cpu != cpu)
2101                         kvm_migrate_timers(vcpu);
2102                 vcpu->cpu = cpu;
2103         }
2104 }
2105
2106 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2107 {
2108         kvm_x86_ops->vcpu_put(vcpu);
2109         kvm_put_guest_fpu(vcpu);
2110         vcpu->arch.last_host_tsc = native_read_tsc();
2111 }
2112
2113 static int is_efer_nx(void)
2114 {
2115         unsigned long long efer = 0;
2116
2117         rdmsrl_safe(MSR_EFER, &efer);
2118         return efer & EFER_NX;
2119 }
2120
2121 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2122 {
2123         int i;
2124         struct kvm_cpuid_entry2 *e, *entry;
2125
2126         entry = NULL;
2127         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2128                 e = &vcpu->arch.cpuid_entries[i];
2129                 if (e->function == 0x80000001) {
2130                         entry = e;
2131                         break;
2132                 }
2133         }
2134         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2135                 entry->edx &= ~(1 << 20);
2136                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2137         }
2138 }
2139
2140 /* when an old userspace process fills a new kernel module */
2141 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2142                                     struct kvm_cpuid *cpuid,
2143                                     struct kvm_cpuid_entry __user *entries)
2144 {
2145         int r, i;
2146         struct kvm_cpuid_entry *cpuid_entries;
2147
2148         r = -E2BIG;
2149         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2150                 goto out;
2151         r = -ENOMEM;
2152         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2153         if (!cpuid_entries)
2154                 goto out;
2155         r = -EFAULT;
2156         if (copy_from_user(cpuid_entries, entries,
2157                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2158                 goto out_free;
2159         for (i = 0; i < cpuid->nent; i++) {
2160                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2161                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2162                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2163                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2164                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2165                 vcpu->arch.cpuid_entries[i].index = 0;
2166                 vcpu->arch.cpuid_entries[i].flags = 0;
2167                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2168                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2169                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2170         }
2171         vcpu->arch.cpuid_nent = cpuid->nent;
2172         cpuid_fix_nx_cap(vcpu);
2173         r = 0;
2174         kvm_apic_set_version(vcpu);
2175         kvm_x86_ops->cpuid_update(vcpu);
2176         update_cpuid(vcpu);
2177
2178 out_free:
2179         vfree(cpuid_entries);
2180 out:
2181         return r;
2182 }
2183
2184 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2185                                      struct kvm_cpuid2 *cpuid,
2186                                      struct kvm_cpuid_entry2 __user *entries)
2187 {
2188         int r;
2189
2190         r = -E2BIG;
2191         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2192                 goto out;
2193         r = -EFAULT;
2194         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2195                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2196                 goto out;
2197         vcpu->arch.cpuid_nent = cpuid->nent;
2198         kvm_apic_set_version(vcpu);
2199         kvm_x86_ops->cpuid_update(vcpu);
2200         update_cpuid(vcpu);
2201         return 0;
2202
2203 out:
2204         return r;
2205 }
2206
2207 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2208                                      struct kvm_cpuid2 *cpuid,
2209                                      struct kvm_cpuid_entry2 __user *entries)
2210 {
2211         int r;
2212
2213         r = -E2BIG;
2214         if (cpuid->nent < vcpu->arch.cpuid_nent)
2215                 goto out;
2216         r = -EFAULT;
2217         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2218                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2219                 goto out;
2220         return 0;
2221
2222 out:
2223         cpuid->nent = vcpu->arch.cpuid_nent;
2224         return r;
2225 }
2226
2227 static void cpuid_mask(u32 *word, int wordnum)
2228 {
2229         *word &= boot_cpu_data.x86_capability[wordnum];
2230 }
2231
2232 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2233                            u32 index)
2234 {
2235         entry->function = function;
2236         entry->index = index;
2237         cpuid_count(entry->function, entry->index,
2238                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2239         entry->flags = 0;
2240 }
2241
2242 #define F(x) bit(X86_FEATURE_##x)
2243
2244 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2245                          u32 index, int *nent, int maxnent)
2246 {
2247         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2248 #ifdef CONFIG_X86_64
2249         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2250                                 ? F(GBPAGES) : 0;
2251         unsigned f_lm = F(LM);
2252 #else
2253         unsigned f_gbpages = 0;
2254         unsigned f_lm = 0;
2255 #endif
2256         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2257
2258         /* cpuid 1.edx */
2259         const u32 kvm_supported_word0_x86_features =
2260                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2261                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2262                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2263                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2264                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2265                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2266                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2267                 0 /* HTT, TM, Reserved, PBE */;
2268         /* cpuid 0x80000001.edx */
2269         const u32 kvm_supported_word1_x86_features =
2270                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2271                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2272                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2273                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2274                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2275                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2276                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2277                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2278         /* cpuid 1.ecx */
2279         const u32 kvm_supported_word4_x86_features =
2280                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2281                 0 /* DS-CPL, VMX, SMX, EST */ |
2282                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2283                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2284                 0 /* Reserved, DCA */ | F(XMM4_1) |
2285                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2286                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2287                 F(F16C);
2288         /* cpuid 0x80000001.ecx */
2289         const u32 kvm_supported_word6_x86_features =
2290                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2291                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2292                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2293                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2294
2295         /* all calls to cpuid_count() should be made on the same cpu */
2296         get_cpu();
2297         do_cpuid_1_ent(entry, function, index);
2298         ++*nent;
2299
2300         switch (function) {
2301         case 0:
2302                 entry->eax = min(entry->eax, (u32)0xd);
2303                 break;
2304         case 1:
2305                 entry->edx &= kvm_supported_word0_x86_features;
2306                 cpuid_mask(&entry->edx, 0);
2307                 entry->ecx &= kvm_supported_word4_x86_features;
2308                 cpuid_mask(&entry->ecx, 4);
2309                 /* we support x2apic emulation even if host does not support
2310                  * it since we emulate x2apic in software */
2311                 entry->ecx |= F(X2APIC);
2312                 break;
2313         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2314          * may return different values. This forces us to get_cpu() before
2315          * issuing the first command, and also to emulate this annoying behavior
2316          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2317         case 2: {
2318                 int t, times = entry->eax & 0xff;
2319
2320                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2321                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2322                 for (t = 1; t < times && *nent < maxnent; ++t) {
2323                         do_cpuid_1_ent(&entry[t], function, 0);
2324                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2325                         ++*nent;
2326                 }
2327                 break;
2328         }
2329         /* function 4 and 0xb have additional index. */
2330         case 4: {
2331                 int i, cache_type;
2332
2333                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2334                 /* read more entries until cache_type is zero */
2335                 for (i = 1; *nent < maxnent; ++i) {
2336                         cache_type = entry[i - 1].eax & 0x1f;
2337                         if (!cache_type)
2338                                 break;
2339                         do_cpuid_1_ent(&entry[i], function, i);
2340                         entry[i].flags |=
2341                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2342                         ++*nent;
2343                 }
2344                 break;
2345         }
2346         case 0xb: {
2347                 int i, level_type;
2348
2349                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2350                 /* read more entries until level_type is zero */
2351                 for (i = 1; *nent < maxnent; ++i) {
2352                         level_type = entry[i - 1].ecx & 0xff00;
2353                         if (!level_type)
2354                                 break;
2355                         do_cpuid_1_ent(&entry[i], function, i);
2356                         entry[i].flags |=
2357                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2358                         ++*nent;
2359                 }
2360                 break;
2361         }
2362         case 0xd: {
2363                 int i;
2364
2365                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2366                 for (i = 1; *nent < maxnent; ++i) {
2367                         if (entry[i - 1].eax == 0 && i != 2)
2368                                 break;
2369                         do_cpuid_1_ent(&entry[i], function, i);
2370                         entry[i].flags |=
2371                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2372                         ++*nent;
2373                 }
2374                 break;
2375         }
2376         case KVM_CPUID_SIGNATURE: {
2377                 char signature[12] = "KVMKVMKVM\0\0";
2378                 u32 *sigptr = (u32 *)signature;
2379                 entry->eax = 0;
2380                 entry->ebx = sigptr[0];
2381                 entry->ecx = sigptr[1];
2382                 entry->edx = sigptr[2];
2383                 break;
2384         }
2385         case KVM_CPUID_FEATURES:
2386                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2387                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2388                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2389                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2390                 entry->ebx = 0;
2391                 entry->ecx = 0;
2392                 entry->edx = 0;
2393                 break;
2394         case 0x80000000:
2395                 entry->eax = min(entry->eax, 0x8000001a);
2396                 break;
2397         case 0x80000001:
2398                 entry->edx &= kvm_supported_word1_x86_features;
2399                 cpuid_mask(&entry->edx, 1);
2400                 entry->ecx &= kvm_supported_word6_x86_features;
2401                 cpuid_mask(&entry->ecx, 6);
2402                 break;
2403         }
2404
2405         kvm_x86_ops->set_supported_cpuid(function, entry);
2406
2407         put_cpu();
2408 }
2409
2410 #undef F
2411
2412 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2413                                      struct kvm_cpuid_entry2 __user *entries)
2414 {
2415         struct kvm_cpuid_entry2 *cpuid_entries;
2416         int limit, nent = 0, r = -E2BIG;
2417         u32 func;
2418
2419         if (cpuid->nent < 1)
2420                 goto out;
2421         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2422                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2423         r = -ENOMEM;
2424         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2425         if (!cpuid_entries)
2426                 goto out;
2427
2428         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2429         limit = cpuid_entries[0].eax;
2430         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2431                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2432                              &nent, cpuid->nent);
2433         r = -E2BIG;
2434         if (nent >= cpuid->nent)
2435                 goto out_free;
2436
2437         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2438         limit = cpuid_entries[nent - 1].eax;
2439         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2440                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2441                              &nent, cpuid->nent);
2442
2443
2444
2445         r = -E2BIG;
2446         if (nent >= cpuid->nent)
2447                 goto out_free;
2448
2449         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2450                      cpuid->nent);
2451
2452         r = -E2BIG;
2453         if (nent >= cpuid->nent)
2454                 goto out_free;
2455
2456         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2457                      cpuid->nent);
2458
2459         r = -E2BIG;
2460         if (nent >= cpuid->nent)
2461                 goto out_free;
2462
2463         r = -EFAULT;
2464         if (copy_to_user(entries, cpuid_entries,
2465                          nent * sizeof(struct kvm_cpuid_entry2)))
2466                 goto out_free;
2467         cpuid->nent = nent;
2468         r = 0;
2469
2470 out_free:
2471         vfree(cpuid_entries);
2472 out:
2473         return r;
2474 }
2475
2476 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2477                                     struct kvm_lapic_state *s)
2478 {
2479         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2480
2481         return 0;
2482 }
2483
2484 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2485                                     struct kvm_lapic_state *s)
2486 {
2487         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2488         kvm_apic_post_state_restore(vcpu);
2489         update_cr8_intercept(vcpu);
2490
2491         return 0;
2492 }
2493
2494 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2495                                     struct kvm_interrupt *irq)
2496 {
2497         if (irq->irq < 0 || irq->irq >= 256)
2498                 return -EINVAL;
2499         if (irqchip_in_kernel(vcpu->kvm))
2500                 return -ENXIO;
2501
2502         kvm_queue_interrupt(vcpu, irq->irq, false);
2503         kvm_make_request(KVM_REQ_EVENT, vcpu);
2504
2505         return 0;
2506 }
2507
2508 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2509 {
2510         kvm_inject_nmi(vcpu);
2511
2512         return 0;
2513 }
2514
2515 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2516                                            struct kvm_tpr_access_ctl *tac)
2517 {
2518         if (tac->flags)
2519                 return -EINVAL;
2520         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2521         return 0;
2522 }
2523
2524 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2525                                         u64 mcg_cap)
2526 {
2527         int r;
2528         unsigned bank_num = mcg_cap & 0xff, bank;
2529
2530         r = -EINVAL;
2531         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2532                 goto out;
2533         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2534                 goto out;
2535         r = 0;
2536         vcpu->arch.mcg_cap = mcg_cap;
2537         /* Init IA32_MCG_CTL to all 1s */
2538         if (mcg_cap & MCG_CTL_P)
2539                 vcpu->arch.mcg_ctl = ~(u64)0;
2540         /* Init IA32_MCi_CTL to all 1s */
2541         for (bank = 0; bank < bank_num; bank++)
2542                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2543 out:
2544         return r;
2545 }
2546
2547 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2548                                       struct kvm_x86_mce *mce)
2549 {
2550         u64 mcg_cap = vcpu->arch.mcg_cap;
2551         unsigned bank_num = mcg_cap & 0xff;
2552         u64 *banks = vcpu->arch.mce_banks;
2553
2554         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2555                 return -EINVAL;
2556         /*
2557          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2558          * reporting is disabled
2559          */
2560         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2561             vcpu->arch.mcg_ctl != ~(u64)0)
2562                 return 0;
2563         banks += 4 * mce->bank;
2564         /*
2565          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2566          * reporting is disabled for the bank
2567          */
2568         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2569                 return 0;
2570         if (mce->status & MCI_STATUS_UC) {
2571                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2572                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2573                         printk(KERN_DEBUG "kvm: set_mce: "
2574                                "injects mce exception while "
2575                                "previous one is in progress!\n");
2576                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2577                         return 0;
2578                 }
2579                 if (banks[1] & MCI_STATUS_VAL)
2580                         mce->status |= MCI_STATUS_OVER;
2581                 banks[2] = mce->addr;
2582                 banks[3] = mce->misc;
2583                 vcpu->arch.mcg_status = mce->mcg_status;
2584                 banks[1] = mce->status;
2585                 kvm_queue_exception(vcpu, MC_VECTOR);
2586         } else if (!(banks[1] & MCI_STATUS_VAL)
2587                    || !(banks[1] & MCI_STATUS_UC)) {
2588                 if (banks[1] & MCI_STATUS_VAL)
2589                         mce->status |= MCI_STATUS_OVER;
2590                 banks[2] = mce->addr;
2591                 banks[3] = mce->misc;
2592                 banks[1] = mce->status;
2593         } else
2594                 banks[1] |= MCI_STATUS_OVER;
2595         return 0;
2596 }
2597
2598 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2599                                                struct kvm_vcpu_events *events)
2600 {
2601         events->exception.injected =
2602                 vcpu->arch.exception.pending &&
2603                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2604         events->exception.nr = vcpu->arch.exception.nr;
2605         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2606         events->exception.pad = 0;
2607         events->exception.error_code = vcpu->arch.exception.error_code;
2608
2609         events->interrupt.injected =
2610                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2611         events->interrupt.nr = vcpu->arch.interrupt.nr;
2612         events->interrupt.soft = 0;
2613         events->interrupt.shadow =
2614                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2615                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2616
2617         events->nmi.injected = vcpu->arch.nmi_injected;
2618         events->nmi.pending = vcpu->arch.nmi_pending;
2619         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2620         events->nmi.pad = 0;
2621
2622         events->sipi_vector = vcpu->arch.sipi_vector;
2623
2624         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2625                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2626                          | KVM_VCPUEVENT_VALID_SHADOW);
2627         memset(&events->reserved, 0, sizeof(events->reserved));
2628 }
2629
2630 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2631                                               struct kvm_vcpu_events *events)
2632 {
2633         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2634                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2635                               | KVM_VCPUEVENT_VALID_SHADOW))
2636                 return -EINVAL;
2637
2638         vcpu->arch.exception.pending = events->exception.injected;
2639         vcpu->arch.exception.nr = events->exception.nr;
2640         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2641         vcpu->arch.exception.error_code = events->exception.error_code;
2642
2643         vcpu->arch.interrupt.pending = events->interrupt.injected;
2644         vcpu->arch.interrupt.nr = events->interrupt.nr;
2645         vcpu->arch.interrupt.soft = events->interrupt.soft;
2646         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2647                 kvm_pic_clear_isr_ack(vcpu->kvm);
2648         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2649                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2650                                                   events->interrupt.shadow);
2651
2652         vcpu->arch.nmi_injected = events->nmi.injected;
2653         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2654                 vcpu->arch.nmi_pending = events->nmi.pending;
2655         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2656
2657         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2658                 vcpu->arch.sipi_vector = events->sipi_vector;
2659
2660         kvm_make_request(KVM_REQ_EVENT, vcpu);
2661
2662         return 0;
2663 }
2664
2665 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2666                                              struct kvm_debugregs *dbgregs)
2667 {
2668         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2669         dbgregs->dr6 = vcpu->arch.dr6;
2670         dbgregs->dr7 = vcpu->arch.dr7;
2671         dbgregs->flags = 0;
2672         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2673 }
2674
2675 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2676                                             struct kvm_debugregs *dbgregs)
2677 {
2678         if (dbgregs->flags)
2679                 return -EINVAL;
2680
2681         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2682         vcpu->arch.dr6 = dbgregs->dr6;
2683         vcpu->arch.dr7 = dbgregs->dr7;
2684
2685         return 0;
2686 }
2687
2688 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2689                                          struct kvm_xsave *guest_xsave)
2690 {
2691         if (cpu_has_xsave)
2692                 memcpy(guest_xsave->region,
2693                         &vcpu->arch.guest_fpu.state->xsave,
2694                         xstate_size);
2695         else {
2696                 memcpy(guest_xsave->region,
2697                         &vcpu->arch.guest_fpu.state->fxsave,
2698                         sizeof(struct i387_fxsave_struct));
2699                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2700                         XSTATE_FPSSE;
2701         }
2702 }
2703
2704 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2705                                         struct kvm_xsave *guest_xsave)
2706 {
2707         u64 xstate_bv =
2708                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2709
2710         if (cpu_has_xsave)
2711                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2712                         guest_xsave->region, xstate_size);
2713         else {
2714                 if (xstate_bv & ~XSTATE_FPSSE)
2715                         return -EINVAL;
2716                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2717                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2718         }
2719         return 0;
2720 }
2721
2722 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2723                                         struct kvm_xcrs *guest_xcrs)
2724 {
2725         if (!cpu_has_xsave) {
2726                 guest_xcrs->nr_xcrs = 0;
2727                 return;
2728         }
2729
2730         guest_xcrs->nr_xcrs = 1;
2731         guest_xcrs->flags = 0;
2732         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2733         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2734 }
2735
2736 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2737                                        struct kvm_xcrs *guest_xcrs)
2738 {
2739         int i, r = 0;
2740
2741         if (!cpu_has_xsave)
2742                 return -EINVAL;
2743
2744         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2745                 return -EINVAL;
2746
2747         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2748                 /* Only support XCR0 currently */
2749                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2750                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2751                                 guest_xcrs->xcrs[0].value);
2752                         break;
2753                 }
2754         if (r)
2755                 r = -EINVAL;
2756         return r;
2757 }
2758
2759 long kvm_arch_vcpu_ioctl(struct file *filp,
2760                          unsigned int ioctl, unsigned long arg)
2761 {
2762         struct kvm_vcpu *vcpu = filp->private_data;
2763         void __user *argp = (void __user *)arg;
2764         int r;
2765         union {
2766                 struct kvm_lapic_state *lapic;
2767                 struct kvm_xsave *xsave;
2768                 struct kvm_xcrs *xcrs;
2769                 void *buffer;
2770         } u;
2771
2772         u.buffer = NULL;
2773         switch (ioctl) {
2774         case KVM_GET_LAPIC: {
2775                 r = -EINVAL;
2776                 if (!vcpu->arch.apic)
2777                         goto out;
2778                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2779
2780                 r = -ENOMEM;
2781                 if (!u.lapic)
2782                         goto out;
2783                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2784                 if (r)
2785                         goto out;
2786                 r = -EFAULT;
2787                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2788                         goto out;
2789                 r = 0;
2790                 break;
2791         }
2792         case KVM_SET_LAPIC: {
2793                 r = -EINVAL;
2794                 if (!vcpu->arch.apic)
2795                         goto out;
2796                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2797                 r = -ENOMEM;
2798                 if (!u.lapic)
2799                         goto out;
2800                 r = -EFAULT;
2801                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2802                         goto out;
2803                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2804                 if (r)
2805                         goto out;
2806                 r = 0;
2807                 break;
2808         }
2809         case KVM_INTERRUPT: {
2810                 struct kvm_interrupt irq;
2811
2812                 r = -EFAULT;
2813                 if (copy_from_user(&irq, argp, sizeof irq))
2814                         goto out;
2815                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2816                 if (r)
2817                         goto out;
2818                 r = 0;
2819                 break;
2820         }
2821         case KVM_NMI: {
2822                 r = kvm_vcpu_ioctl_nmi(vcpu);
2823                 if (r)
2824                         goto out;
2825                 r = 0;
2826                 break;
2827         }
2828         case KVM_SET_CPUID: {
2829                 struct kvm_cpuid __user *cpuid_arg = argp;
2830                 struct kvm_cpuid cpuid;
2831
2832                 r = -EFAULT;
2833                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2834                         goto out;
2835                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2836                 if (r)
2837                         goto out;
2838                 break;
2839         }
2840         case KVM_SET_CPUID2: {
2841                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2842                 struct kvm_cpuid2 cpuid;
2843
2844                 r = -EFAULT;
2845                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2846                         goto out;
2847                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2848                                               cpuid_arg->entries);
2849                 if (r)
2850                         goto out;
2851                 break;
2852         }
2853         case KVM_GET_CPUID2: {
2854                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2855                 struct kvm_cpuid2 cpuid;
2856
2857                 r = -EFAULT;
2858                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2859                         goto out;
2860                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2861                                               cpuid_arg->entries);
2862                 if (r)
2863                         goto out;
2864                 r = -EFAULT;
2865                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2866                         goto out;
2867                 r = 0;
2868                 break;
2869         }
2870         case KVM_GET_MSRS:
2871                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2872                 break;
2873         case KVM_SET_MSRS:
2874                 r = msr_io(vcpu, argp, do_set_msr, 0);
2875                 break;
2876         case KVM_TPR_ACCESS_REPORTING: {
2877                 struct kvm_tpr_access_ctl tac;
2878
2879                 r = -EFAULT;
2880                 if (copy_from_user(&tac, argp, sizeof tac))
2881                         goto out;
2882                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2883                 if (r)
2884                         goto out;
2885                 r = -EFAULT;
2886                 if (copy_to_user(argp, &tac, sizeof tac))
2887                         goto out;
2888                 r = 0;
2889                 break;
2890         };
2891         case KVM_SET_VAPIC_ADDR: {
2892                 struct kvm_vapic_addr va;
2893
2894                 r = -EINVAL;
2895                 if (!irqchip_in_kernel(vcpu->kvm))
2896                         goto out;
2897                 r = -EFAULT;
2898                 if (copy_from_user(&va, argp, sizeof va))
2899                         goto out;
2900                 r = 0;
2901                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2902                 break;
2903         }
2904         case KVM_X86_SETUP_MCE: {
2905                 u64 mcg_cap;
2906
2907                 r = -EFAULT;
2908                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2909                         goto out;
2910                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2911                 break;
2912         }
2913         case KVM_X86_SET_MCE: {
2914                 struct kvm_x86_mce mce;
2915
2916                 r = -EFAULT;
2917                 if (copy_from_user(&mce, argp, sizeof mce))
2918                         goto out;
2919                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2920                 break;
2921         }
2922         case KVM_GET_VCPU_EVENTS: {
2923                 struct kvm_vcpu_events events;
2924
2925                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2926
2927                 r = -EFAULT;
2928                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2929                         break;
2930                 r = 0;
2931                 break;
2932         }
2933         case KVM_SET_VCPU_EVENTS: {
2934                 struct kvm_vcpu_events events;
2935
2936                 r = -EFAULT;
2937                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2938                         break;
2939
2940                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2941                 break;
2942         }
2943         case KVM_GET_DEBUGREGS: {
2944                 struct kvm_debugregs dbgregs;
2945
2946                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2947
2948                 r = -EFAULT;
2949                 if (copy_to_user(argp, &dbgregs,
2950                                  sizeof(struct kvm_debugregs)))
2951                         break;
2952                 r = 0;
2953                 break;
2954         }
2955         case KVM_SET_DEBUGREGS: {
2956                 struct kvm_debugregs dbgregs;
2957
2958                 r = -EFAULT;
2959                 if (copy_from_user(&dbgregs, argp,
2960                                    sizeof(struct kvm_debugregs)))
2961                         break;
2962
2963                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2964                 break;
2965         }
2966         case KVM_GET_XSAVE: {
2967                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2968                 r = -ENOMEM;
2969                 if (!u.xsave)
2970                         break;
2971
2972                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2973
2974                 r = -EFAULT;
2975                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2976                         break;
2977                 r = 0;
2978                 break;
2979         }
2980         case KVM_SET_XSAVE: {
2981                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2982                 r = -ENOMEM;
2983                 if (!u.xsave)
2984                         break;
2985
2986                 r = -EFAULT;
2987                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2988                         break;
2989
2990                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2991                 break;
2992         }
2993         case KVM_GET_XCRS: {
2994                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2995                 r = -ENOMEM;
2996                 if (!u.xcrs)
2997                         break;
2998
2999                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3000
3001                 r = -EFAULT;
3002                 if (copy_to_user(argp, u.xcrs,
3003                                  sizeof(struct kvm_xcrs)))
3004                         break;
3005                 r = 0;
3006                 break;
3007         }
3008         case KVM_SET_XCRS: {
3009                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3010                 r = -ENOMEM;
3011                 if (!u.xcrs)
3012                         break;
3013
3014                 r = -EFAULT;
3015                 if (copy_from_user(u.xcrs, argp,
3016                                    sizeof(struct kvm_xcrs)))
3017                         break;
3018
3019                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3020                 break;
3021         }
3022         default:
3023                 r = -EINVAL;
3024         }
3025 out:
3026         kfree(u.buffer);
3027         return r;
3028 }
3029
3030 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3031 {
3032         int ret;
3033
3034         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3035                 return -1;
3036         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3037         return ret;
3038 }
3039
3040 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3041                                               u64 ident_addr)
3042 {
3043         kvm->arch.ept_identity_map_addr = ident_addr;
3044         return 0;
3045 }
3046
3047 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3048                                           u32 kvm_nr_mmu_pages)
3049 {
3050         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3051                 return -EINVAL;
3052
3053         mutex_lock(&kvm->slots_lock);
3054         spin_lock(&kvm->mmu_lock);
3055
3056         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3057         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3058
3059         spin_unlock(&kvm->mmu_lock);
3060         mutex_unlock(&kvm->slots_lock);
3061         return 0;
3062 }
3063
3064 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3065 {
3066         return kvm->arch.n_max_mmu_pages;
3067 }
3068
3069 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3070 {
3071         int r;
3072
3073         r = 0;
3074         switch (chip->chip_id) {
3075         case KVM_IRQCHIP_PIC_MASTER:
3076                 memcpy(&chip->chip.pic,
3077                         &pic_irqchip(kvm)->pics[0],
3078                         sizeof(struct kvm_pic_state));
3079                 break;
3080         case KVM_IRQCHIP_PIC_SLAVE:
3081                 memcpy(&chip->chip.pic,
3082                         &pic_irqchip(kvm)->pics[1],
3083                         sizeof(struct kvm_pic_state));
3084                 break;
3085         case KVM_IRQCHIP_IOAPIC:
3086                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3087                 break;
3088         default:
3089                 r = -EINVAL;
3090                 break;
3091         }
3092         return r;
3093 }
3094
3095 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3096 {
3097         int r;
3098
3099         r = 0;
3100         switch (chip->chip_id) {
3101         case KVM_IRQCHIP_PIC_MASTER:
3102                 spin_lock(&pic_irqchip(kvm)->lock);
3103                 memcpy(&pic_irqchip(kvm)->pics[0],
3104                         &chip->chip.pic,
3105                         sizeof(struct kvm_pic_state));
3106                 spin_unlock(&pic_irqchip(kvm)->lock);
3107                 break;
3108         case KVM_IRQCHIP_PIC_SLAVE:
3109                 spin_lock(&pic_irqchip(kvm)->lock);
3110                 memcpy(&pic_irqchip(kvm)->pics[1],
3111                         &chip->chip.pic,
3112                         sizeof(struct kvm_pic_state));
3113                 spin_unlock(&pic_irqchip(kvm)->lock);
3114                 break;
3115         case KVM_IRQCHIP_IOAPIC:
3116                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3117                 break;
3118         default:
3119                 r = -EINVAL;
3120                 break;
3121         }
3122         kvm_pic_update_irq(pic_irqchip(kvm));
3123         return r;
3124 }
3125
3126 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3127 {
3128         int r = 0;
3129
3130         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3131         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3132         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3133         return r;
3134 }
3135
3136 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3137 {
3138         int r = 0;
3139
3140         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3141         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3142         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3143         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3144         return r;
3145 }
3146
3147 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3148 {
3149         int r = 0;
3150
3151         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3152         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3153                 sizeof(ps->channels));
3154         ps->flags = kvm->arch.vpit->pit_state.flags;
3155         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3156         memset(&ps->reserved, 0, sizeof(ps->reserved));
3157         return r;
3158 }
3159
3160 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3161 {
3162         int r = 0, start = 0;
3163         u32 prev_legacy, cur_legacy;
3164         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3165         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3166         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3167         if (!prev_legacy && cur_legacy)
3168                 start = 1;
3169         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3170                sizeof(kvm->arch.vpit->pit_state.channels));
3171         kvm->arch.vpit->pit_state.flags = ps->flags;
3172         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3173         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3174         return r;
3175 }
3176
3177 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3178                                  struct kvm_reinject_control *control)
3179 {
3180         if (!kvm->arch.vpit)
3181                 return -ENXIO;
3182         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3183         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3184         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3185         return 0;
3186 }
3187
3188 /*
3189  * Get (and clear) the dirty memory log for a memory slot.
3190  */
3191 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3192                                       struct kvm_dirty_log *log)
3193 {
3194         int r, i;
3195         struct kvm_memory_slot *memslot;
3196         unsigned long n;
3197         unsigned long is_dirty = 0;
3198
3199         mutex_lock(&kvm->slots_lock);
3200
3201         r = -EINVAL;
3202         if (log->slot >= KVM_MEMORY_SLOTS)
3203                 goto out;
3204
3205         memslot = &kvm->memslots->memslots[log->slot];
3206         r = -ENOENT;
3207         if (!memslot->dirty_bitmap)
3208                 goto out;
3209
3210         n = kvm_dirty_bitmap_bytes(memslot);
3211
3212         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3213                 is_dirty = memslot->dirty_bitmap[i];
3214
3215         /* If nothing is dirty, don't bother messing with page tables. */
3216         if (is_dirty) {
3217                 struct kvm_memslots *slots, *old_slots;
3218                 unsigned long *dirty_bitmap;
3219
3220                 dirty_bitmap = memslot->dirty_bitmap_head;
3221                 if (memslot->dirty_bitmap == dirty_bitmap)
3222                         dirty_bitmap += n / sizeof(long);
3223                 memset(dirty_bitmap, 0, n);
3224
3225                 r = -ENOMEM;
3226                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3227                 if (!slots)
3228                         goto out;
3229                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3230                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3231                 slots->generation++;
3232
3233                 old_slots = kvm->memslots;
3234                 rcu_assign_pointer(kvm->memslots, slots);
3235                 synchronize_srcu_expedited(&kvm->srcu);
3236                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3237                 kfree(old_slots);
3238
3239                 spin_lock(&kvm->mmu_lock);
3240                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3241                 spin_unlock(&kvm->mmu_lock);
3242
3243                 r = -EFAULT;
3244                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3245                         goto out;
3246         } else {
3247                 r = -EFAULT;
3248                 if (clear_user(log->dirty_bitmap, n))
3249                         goto out;
3250         }
3251
3252         r = 0;
3253 out:
3254         mutex_unlock(&kvm->slots_lock);
3255         return r;
3256 }
3257
3258 long kvm_arch_vm_ioctl(struct file *filp,
3259                        unsigned int ioctl, unsigned long arg)
3260 {
3261         struct kvm *kvm = filp->private_data;
3262         void __user *argp = (void __user *)arg;
3263         int r = -ENOTTY;
3264         /*
3265          * This union makes it completely explicit to gcc-3.x
3266          * that these two variables' stack usage should be
3267          * combined, not added together.
3268          */
3269         union {
3270                 struct kvm_pit_state ps;
3271                 struct kvm_pit_state2 ps2;
3272                 struct kvm_pit_config pit_config;
3273         } u;
3274
3275         switch (ioctl) {
3276         case KVM_SET_TSS_ADDR:
3277                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3278                 if (r < 0)
3279                         goto out;
3280                 break;
3281         case KVM_SET_IDENTITY_MAP_ADDR: {
3282                 u64 ident_addr;
3283
3284                 r = -EFAULT;
3285                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3286                         goto out;
3287                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3288                 if (r < 0)
3289                         goto out;
3290                 break;
3291         }
3292         case KVM_SET_NR_MMU_PAGES:
3293                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3294                 if (r)
3295                         goto out;
3296                 break;
3297         case KVM_GET_NR_MMU_PAGES:
3298                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3299                 break;
3300         case KVM_CREATE_IRQCHIP: {
3301                 struct kvm_pic *vpic;
3302
3303                 mutex_lock(&kvm->lock);
3304                 r = -EEXIST;
3305                 if (kvm->arch.vpic)
3306                         goto create_irqchip_unlock;
3307                 r = -ENOMEM;
3308                 vpic = kvm_create_pic(kvm);
3309                 if (vpic) {
3310                         r = kvm_ioapic_init(kvm);
3311                         if (r) {
3312                                 mutex_lock(&kvm->slots_lock);
3313                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3314                                                           &vpic->dev);
3315                                 mutex_unlock(&kvm->slots_lock);
3316                                 kfree(vpic);
3317                                 goto create_irqchip_unlock;
3318                         }
3319                 } else
3320                         goto create_irqchip_unlock;
3321                 smp_wmb();
3322                 kvm->arch.vpic = vpic;
3323                 smp_wmb();
3324                 r = kvm_setup_default_irq_routing(kvm);
3325                 if (r) {
3326                         mutex_lock(&kvm->slots_lock);
3327                         mutex_lock(&kvm->irq_lock);
3328                         kvm_ioapic_destroy(kvm);
3329                         kvm_destroy_pic(kvm);
3330                         mutex_unlock(&kvm->irq_lock);
3331                         mutex_unlock(&kvm->slots_lock);
3332                 }
3333         create_irqchip_unlock:
3334                 mutex_unlock(&kvm->lock);
3335                 break;
3336         }
3337         case KVM_CREATE_PIT:
3338                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3339                 goto create_pit;
3340         case KVM_CREATE_PIT2:
3341                 r = -EFAULT;
3342                 if (copy_from_user(&u.pit_config, argp,
3343                                    sizeof(struct kvm_pit_config)))
3344                         goto out;
3345         create_pit:
3346                 mutex_lock(&kvm->slots_lock);
3347                 r = -EEXIST;
3348                 if (kvm->arch.vpit)
3349                         goto create_pit_unlock;
3350                 r = -ENOMEM;
3351                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3352                 if (kvm->arch.vpit)
3353                         r = 0;
3354         create_pit_unlock:
3355                 mutex_unlock(&kvm->slots_lock);
3356                 break;
3357         case KVM_IRQ_LINE_STATUS:
3358         case KVM_IRQ_LINE: {
3359                 struct kvm_irq_level irq_event;
3360
3361                 r = -EFAULT;
3362                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3363                         goto out;
3364                 r = -ENXIO;
3365                 if (irqchip_in_kernel(kvm)) {
3366                         __s32 status;
3367                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3368                                         irq_event.irq, irq_event.level);
3369                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3370                                 r = -EFAULT;
3371                                 irq_event.status = status;
3372                                 if (copy_to_user(argp, &irq_event,
3373                                                         sizeof irq_event))
3374                                         goto out;
3375                         }
3376                         r = 0;
3377                 }
3378                 break;
3379         }
3380         case KVM_GET_IRQCHIP: {
3381                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3382                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3383
3384                 r = -ENOMEM;
3385                 if (!chip)
3386                         goto out;
3387                 r = -EFAULT;
3388                 if (copy_from_user(chip, argp, sizeof *chip))
3389                         goto get_irqchip_out;
3390                 r = -ENXIO;
3391                 if (!irqchip_in_kernel(kvm))
3392                         goto get_irqchip_out;
3393                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3394                 if (r)
3395                         goto get_irqchip_out;
3396                 r = -EFAULT;
3397                 if (copy_to_user(argp, chip, sizeof *chip))
3398                         goto get_irqchip_out;
3399                 r = 0;
3400         get_irqchip_out:
3401                 kfree(chip);
3402                 if (r)
3403                         goto out;
3404                 break;
3405         }
3406         case KVM_SET_IRQCHIP: {
3407                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3408                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3409
3410                 r = -ENOMEM;
3411                 if (!chip)
3412                         goto out;
3413                 r = -EFAULT;
3414                 if (copy_from_user(chip, argp, sizeof *chip))
3415                         goto set_irqchip_out;
3416                 r = -ENXIO;
3417                 if (!irqchip_in_kernel(kvm))
3418                         goto set_irqchip_out;
3419                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3420                 if (r)
3421                         goto set_irqchip_out;
3422                 r = 0;
3423         set_irqchip_out:
3424                 kfree(chip);
3425                 if (r)
3426                         goto out;
3427                 break;
3428         }
3429         case KVM_GET_PIT: {
3430                 r = -EFAULT;
3431                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3432                         goto out;
3433                 r = -ENXIO;
3434                 if (!kvm->arch.vpit)
3435                         goto out;
3436                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3437                 if (r)
3438                         goto out;
3439                 r = -EFAULT;
3440                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3441                         goto out;
3442                 r = 0;
3443                 break;
3444         }
3445         case KVM_SET_PIT: {
3446                 r = -EFAULT;
3447                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3448                         goto out;
3449                 r = -ENXIO;
3450                 if (!kvm->arch.vpit)
3451                         goto out;
3452                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3453                 if (r)
3454                         goto out;
3455                 r = 0;
3456                 break;
3457         }
3458         case KVM_GET_PIT2: {
3459                 r = -ENXIO;
3460                 if (!kvm->arch.vpit)
3461                         goto out;
3462                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3463                 if (r)
3464                         goto out;
3465                 r = -EFAULT;
3466                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3467                         goto out;
3468                 r = 0;
3469                 break;
3470         }
3471         case KVM_SET_PIT2: {
3472                 r = -EFAULT;
3473                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3474                         goto out;
3475                 r = -ENXIO;
3476                 if (!kvm->arch.vpit)
3477                         goto out;
3478                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3479                 if (r)
3480                         goto out;
3481                 r = 0;
3482                 break;
3483         }
3484         case KVM_REINJECT_CONTROL: {
3485                 struct kvm_reinject_control control;
3486                 r =  -EFAULT;
3487                 if (copy_from_user(&control, argp, sizeof(control)))
3488                         goto out;
3489                 r = kvm_vm_ioctl_reinject(kvm, &control);
3490                 if (r)
3491                         goto out;
3492                 r = 0;
3493                 break;
3494         }
3495         case KVM_XEN_HVM_CONFIG: {
3496                 r = -EFAULT;
3497                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3498                                    sizeof(struct kvm_xen_hvm_config)))
3499                         goto out;
3500                 r = -EINVAL;
3501                 if (kvm->arch.xen_hvm_config.flags)
3502                         goto out;
3503                 r = 0;
3504                 break;
3505         }
3506         case KVM_SET_CLOCK: {
3507                 struct kvm_clock_data user_ns;
3508                 u64 now_ns;
3509                 s64 delta;
3510
3511                 r = -EFAULT;
3512                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3513                         goto out;
3514
3515                 r = -EINVAL;
3516                 if (user_ns.flags)
3517                         goto out;
3518
3519                 r = 0;
3520                 local_irq_disable();
3521                 now_ns = get_kernel_ns();
3522                 delta = user_ns.clock - now_ns;
3523                 local_irq_enable();
3524                 kvm->arch.kvmclock_offset = delta;
3525                 break;
3526         }
3527         case KVM_GET_CLOCK: {
3528                 struct kvm_clock_data user_ns;
3529                 u64 now_ns;
3530
3531                 local_irq_disable();
3532                 now_ns = get_kernel_ns();
3533                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3534                 local_irq_enable();
3535                 user_ns.flags = 0;
3536                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3537
3538                 r = -EFAULT;
3539                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3540                         goto out;
3541                 r = 0;
3542                 break;
3543         }
3544
3545         default:
3546                 ;
3547         }
3548 out:
3549         return r;
3550 }
3551
3552 static void kvm_init_msr_list(void)
3553 {
3554         u32 dummy[2];
3555         unsigned i, j;
3556
3557         /* skip the first msrs in the list. KVM-specific */
3558         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3559                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3560                         continue;
3561                 if (j < i)
3562                         msrs_to_save[j] = msrs_to_save[i];
3563                 j++;
3564         }
3565         num_msrs_to_save = j;
3566 }
3567
3568 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3569                            const void *v)
3570 {
3571         if (vcpu->arch.apic &&
3572             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3573                 return 0;
3574
3575         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3576 }
3577
3578 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3579 {
3580         if (vcpu->arch.apic &&
3581             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3582                 return 0;
3583
3584         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3585 }
3586
3587 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3588                         struct kvm_segment *var, int seg)
3589 {
3590         kvm_x86_ops->set_segment(vcpu, var, seg);
3591 }
3592
3593 void kvm_get_segment(struct kvm_vcpu *vcpu,
3594                      struct kvm_segment *var, int seg)
3595 {
3596         kvm_x86_ops->get_segment(vcpu, var, seg);
3597 }
3598
3599 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3600 {
3601         return gpa;
3602 }
3603
3604 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3605 {
3606         gpa_t t_gpa;
3607         struct x86_exception exception;
3608
3609         BUG_ON(!mmu_is_nested(vcpu));
3610
3611         /* NPT walks are always user-walks */
3612         access |= PFERR_USER_MASK;
3613         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3614
3615         return t_gpa;
3616 }
3617
3618 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3619                               struct x86_exception *exception)
3620 {
3621         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3622         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3623 }
3624
3625  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3626                                 struct x86_exception *exception)
3627 {
3628         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3629         access |= PFERR_FETCH_MASK;
3630         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3631 }
3632
3633 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3634                                struct x86_exception *exception)
3635 {
3636         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3637         access |= PFERR_WRITE_MASK;
3638         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3639 }
3640
3641 /* uses this to access any guest's mapped memory without checking CPL */
3642 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3643                                 struct x86_exception *exception)
3644 {
3645         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3646 }
3647
3648 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3649                                       struct kvm_vcpu *vcpu, u32 access,
3650                                       struct x86_exception *exception)
3651 {
3652         void *data = val;
3653         int r = X86EMUL_CONTINUE;
3654
3655         while (bytes) {
3656                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3657                                                             exception);
3658                 unsigned offset = addr & (PAGE_SIZE-1);
3659                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3660                 int ret;
3661
3662                 if (gpa == UNMAPPED_GVA)
3663                         return X86EMUL_PROPAGATE_FAULT;
3664                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3665                 if (ret < 0) {
3666                         r = X86EMUL_IO_NEEDED;
3667                         goto out;
3668                 }
3669
3670                 bytes -= toread;
3671                 data += toread;
3672                 addr += toread;
3673         }
3674 out:
3675         return r;
3676 }
3677
3678 /* used for instruction fetching */
3679 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3680                                 struct kvm_vcpu *vcpu,
3681                                 struct x86_exception *exception)
3682 {
3683         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3684         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3685                                           access | PFERR_FETCH_MASK,
3686                                           exception);
3687 }
3688
3689 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3690                                struct kvm_vcpu *vcpu,
3691                                struct x86_exception *exception)
3692 {
3693         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3694         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3695                                           exception);
3696 }
3697
3698 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3699                                       struct kvm_vcpu *vcpu,
3700                                       struct x86_exception *exception)
3701 {
3702         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3703 }
3704
3705 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3706                                        unsigned int bytes,
3707                                        struct kvm_vcpu *vcpu,
3708                                        struct x86_exception *exception)
3709 {
3710         void *data = val;
3711         int r = X86EMUL_CONTINUE;
3712
3713         while (bytes) {
3714                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3715                                                              PFERR_WRITE_MASK,
3716                                                              exception);
3717                 unsigned offset = addr & (PAGE_SIZE-1);
3718                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3719                 int ret;
3720
3721                 if (gpa == UNMAPPED_GVA)
3722                         return X86EMUL_PROPAGATE_FAULT;
3723                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3724                 if (ret < 0) {
3725                         r = X86EMUL_IO_NEEDED;
3726                         goto out;
3727                 }
3728
3729                 bytes -= towrite;
3730                 data += towrite;
3731                 addr += towrite;
3732         }
3733 out:
3734         return r;
3735 }
3736
3737 static int emulator_read_emulated(unsigned long addr,
3738                                   void *val,
3739                                   unsigned int bytes,
3740                                   struct x86_exception *exception,
3741                                   struct kvm_vcpu *vcpu)
3742 {
3743         gpa_t                 gpa;
3744
3745         if (vcpu->mmio_read_completed) {
3746                 memcpy(val, vcpu->mmio_data, bytes);
3747                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3748                                vcpu->mmio_phys_addr, *(u64 *)val);
3749                 vcpu->mmio_read_completed = 0;
3750                 return X86EMUL_CONTINUE;
3751         }
3752
3753         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3754
3755         if (gpa == UNMAPPED_GVA)
3756                 return X86EMUL_PROPAGATE_FAULT;
3757
3758         /* For APIC access vmexit */
3759         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3760                 goto mmio;
3761
3762         if (kvm_read_guest_virt(addr, val, bytes, vcpu, exception)
3763             == X86EMUL_CONTINUE)
3764                 return X86EMUL_CONTINUE;
3765
3766 mmio:
3767         /*
3768          * Is this MMIO handled locally?
3769          */
3770         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3771                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3772                 return X86EMUL_CONTINUE;
3773         }
3774
3775         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3776
3777         vcpu->mmio_needed = 1;
3778         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3779         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3780         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3781         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3782
3783         return X86EMUL_IO_NEEDED;
3784 }
3785
3786 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3787                         const void *val, int bytes)
3788 {
3789         int ret;
3790
3791         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3792         if (ret < 0)
3793                 return 0;
3794         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3795         return 1;
3796 }
3797
3798 static int emulator_write_emulated_onepage(unsigned long addr,
3799                                            const void *val,
3800                                            unsigned int bytes,
3801                                            struct x86_exception *exception,
3802                                            struct kvm_vcpu *vcpu)
3803 {
3804         gpa_t                 gpa;
3805
3806         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3807
3808         if (gpa == UNMAPPED_GVA)
3809                 return X86EMUL_PROPAGATE_FAULT;
3810
3811         /* For APIC access vmexit */
3812         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3813                 goto mmio;
3814
3815         if (emulator_write_phys(vcpu, gpa, val, bytes))
3816                 return X86EMUL_CONTINUE;
3817
3818 mmio:
3819         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3820         /*
3821          * Is this MMIO handled locally?
3822          */
3823         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3824                 return X86EMUL_CONTINUE;
3825
3826         vcpu->mmio_needed = 1;
3827         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3828         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3829         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3830         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3831         memcpy(vcpu->run->mmio.data, val, bytes);
3832
3833         return X86EMUL_CONTINUE;
3834 }
3835
3836 int emulator_write_emulated(unsigned long addr,
3837                             const void *val,
3838                             unsigned int bytes,
3839                             struct x86_exception *exception,
3840                             struct kvm_vcpu *vcpu)
3841 {
3842         /* Crossing a page boundary? */
3843         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3844                 int rc, now;
3845
3846                 now = -addr & ~PAGE_MASK;
3847                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
3848                                                      vcpu);
3849                 if (rc != X86EMUL_CONTINUE)
3850                         return rc;
3851                 addr += now;
3852                 val += now;
3853                 bytes -= now;
3854         }
3855         return emulator_write_emulated_onepage(addr, val, bytes, exception,
3856                                                vcpu);
3857 }
3858
3859 #define CMPXCHG_TYPE(t, ptr, old, new) \
3860         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3861
3862 #ifdef CONFIG_X86_64
3863 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3864 #else
3865 #  define CMPXCHG64(ptr, old, new) \
3866         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3867 #endif
3868
3869 static int emulator_cmpxchg_emulated(unsigned long addr,
3870                                      const void *old,
3871                                      const void *new,
3872                                      unsigned int bytes,
3873                                      struct x86_exception *exception,
3874                                      struct kvm_vcpu *vcpu)
3875 {
3876         gpa_t gpa;
3877         struct page *page;
3878         char *kaddr;
3879         bool exchanged;
3880
3881         /* guests cmpxchg8b have to be emulated atomically */
3882         if (bytes > 8 || (bytes & (bytes - 1)))
3883                 goto emul_write;
3884
3885         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3886
3887         if (gpa == UNMAPPED_GVA ||
3888             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3889                 goto emul_write;
3890
3891         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3892                 goto emul_write;
3893
3894         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3895         if (is_error_page(page)) {
3896                 kvm_release_page_clean(page);
3897                 goto emul_write;
3898         }
3899
3900         kaddr = kmap_atomic(page, KM_USER0);
3901         kaddr += offset_in_page(gpa);
3902         switch (bytes) {
3903         case 1:
3904                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3905                 break;
3906         case 2:
3907                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3908                 break;
3909         case 4:
3910                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3911                 break;
3912         case 8:
3913                 exchanged = CMPXCHG64(kaddr, old, new);
3914                 break;
3915         default:
3916                 BUG();
3917         }
3918         kunmap_atomic(kaddr, KM_USER0);
3919         kvm_release_page_dirty(page);
3920
3921         if (!exchanged)
3922                 return X86EMUL_CMPXCHG_FAILED;
3923
3924         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3925
3926         return X86EMUL_CONTINUE;
3927
3928 emul_write:
3929         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3930
3931         return emulator_write_emulated(addr, new, bytes, exception, vcpu);
3932 }
3933
3934 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3935 {
3936         /* TODO: String I/O for in kernel device */
3937         int r;
3938
3939         if (vcpu->arch.pio.in)
3940                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3941                                     vcpu->arch.pio.size, pd);
3942         else
3943                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3944                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3945                                      pd);
3946         return r;
3947 }
3948
3949
3950 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3951                              unsigned int count, struct kvm_vcpu *vcpu)
3952 {
3953         if (vcpu->arch.pio.count)
3954                 goto data_avail;
3955
3956         trace_kvm_pio(0, port, size, count);
3957
3958         vcpu->arch.pio.port = port;
3959         vcpu->arch.pio.in = 1;
3960         vcpu->arch.pio.count  = count;
3961         vcpu->arch.pio.size = size;
3962
3963         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3964         data_avail:
3965                 memcpy(val, vcpu->arch.pio_data, size * count);
3966                 vcpu->arch.pio.count = 0;
3967                 return 1;
3968         }
3969
3970         vcpu->run->exit_reason = KVM_EXIT_IO;
3971         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3972         vcpu->run->io.size = size;
3973         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3974         vcpu->run->io.count = count;
3975         vcpu->run->io.port = port;
3976
3977         return 0;
3978 }
3979
3980 static int emulator_pio_out_emulated(int size, unsigned short port,
3981                               const void *val, unsigned int count,
3982                               struct kvm_vcpu *vcpu)
3983 {
3984         trace_kvm_pio(1, port, size, count);
3985
3986         vcpu->arch.pio.port = port;
3987         vcpu->arch.pio.in = 0;
3988         vcpu->arch.pio.count = count;
3989         vcpu->arch.pio.size = size;
3990
3991         memcpy(vcpu->arch.pio_data, val, size * count);
3992
3993         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3994                 vcpu->arch.pio.count = 0;
3995                 return 1;
3996         }
3997
3998         vcpu->run->exit_reason = KVM_EXIT_IO;
3999         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4000         vcpu->run->io.size = size;
4001         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4002         vcpu->run->io.count = count;
4003         vcpu->run->io.port = port;
4004
4005         return 0;
4006 }
4007
4008 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4009 {
4010         return kvm_x86_ops->get_segment_base(vcpu, seg);
4011 }
4012
4013 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4014 {
4015         kvm_mmu_invlpg(vcpu, address);
4016         return X86EMUL_CONTINUE;
4017 }
4018
4019 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4020 {
4021         if (!need_emulate_wbinvd(vcpu))
4022                 return X86EMUL_CONTINUE;
4023
4024         if (kvm_x86_ops->has_wbinvd_exit()) {
4025                 int cpu = get_cpu();
4026
4027                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4028                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4029                                 wbinvd_ipi, NULL, 1);
4030                 put_cpu();
4031                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4032         } else
4033                 wbinvd();
4034         return X86EMUL_CONTINUE;
4035 }
4036 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4037
4038 int emulate_clts(struct kvm_vcpu *vcpu)
4039 {
4040         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4041         kvm_x86_ops->fpu_activate(vcpu);
4042         return X86EMUL_CONTINUE;
4043 }
4044
4045 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4046 {
4047         return _kvm_get_dr(vcpu, dr, dest);
4048 }
4049
4050 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4051 {
4052
4053         return __kvm_set_dr(vcpu, dr, value);
4054 }
4055
4056 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4057 {
4058         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4059 }
4060
4061 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4062 {
4063         unsigned long value;
4064
4065         switch (cr) {
4066         case 0:
4067                 value = kvm_read_cr0(vcpu);
4068                 break;
4069         case 2:
4070                 value = vcpu->arch.cr2;
4071                 break;
4072         case 3:
4073                 value = vcpu->arch.cr3;
4074                 break;
4075         case 4:
4076                 value = kvm_read_cr4(vcpu);
4077                 break;
4078         case 8:
4079                 value = kvm_get_cr8(vcpu);
4080                 break;
4081         default:
4082                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4083                 return 0;
4084         }
4085
4086         return value;
4087 }
4088
4089 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4090 {
4091         int res = 0;
4092
4093         switch (cr) {
4094         case 0:
4095                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4096                 break;
4097         case 2:
4098                 vcpu->arch.cr2 = val;
4099                 break;
4100         case 3:
4101                 res = kvm_set_cr3(vcpu, val);
4102                 break;
4103         case 4:
4104                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4105                 break;
4106         case 8:
4107                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4108                 break;
4109         default:
4110                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4111                 res = -1;
4112         }
4113
4114         return res;
4115 }
4116
4117 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4118 {
4119         return kvm_x86_ops->get_cpl(vcpu);
4120 }
4121
4122 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4123 {
4124         kvm_x86_ops->get_gdt(vcpu, dt);
4125 }
4126
4127 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4128 {
4129         kvm_x86_ops->get_idt(vcpu, dt);
4130 }
4131
4132 static unsigned long emulator_get_cached_segment_base(int seg,
4133                                                       struct kvm_vcpu *vcpu)
4134 {
4135         return get_segment_base(vcpu, seg);
4136 }
4137
4138 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4139                                            struct kvm_vcpu *vcpu)
4140 {
4141         struct kvm_segment var;
4142
4143         kvm_get_segment(vcpu, &var, seg);
4144
4145         if (var.unusable)
4146                 return false;
4147
4148         if (var.g)
4149                 var.limit >>= 12;
4150         set_desc_limit(desc, var.limit);
4151         set_desc_base(desc, (unsigned long)var.base);
4152         desc->type = var.type;
4153         desc->s = var.s;
4154         desc->dpl = var.dpl;
4155         desc->p = var.present;
4156         desc->avl = var.avl;
4157         desc->l = var.l;
4158         desc->d = var.db;
4159         desc->g = var.g;
4160
4161         return true;
4162 }
4163
4164 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4165                                            struct kvm_vcpu *vcpu)
4166 {
4167         struct kvm_segment var;
4168
4169         /* needed to preserve selector */
4170         kvm_get_segment(vcpu, &var, seg);
4171
4172         var.base = get_desc_base(desc);
4173         var.limit = get_desc_limit(desc);
4174         if (desc->g)
4175                 var.limit = (var.limit << 12) | 0xfff;
4176         var.type = desc->type;
4177         var.present = desc->p;
4178         var.dpl = desc->dpl;
4179         var.db = desc->d;
4180         var.s = desc->s;
4181         var.l = desc->l;
4182         var.g = desc->g;
4183         var.avl = desc->avl;
4184         var.present = desc->p;
4185         var.unusable = !var.present;
4186         var.padding = 0;
4187
4188         kvm_set_segment(vcpu, &var, seg);
4189         return;
4190 }
4191
4192 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4193 {
4194         struct kvm_segment kvm_seg;
4195
4196         kvm_get_segment(vcpu, &kvm_seg, seg);
4197         return kvm_seg.selector;
4198 }
4199
4200 static void emulator_set_segment_selector(u16 sel, int seg,
4201                                           struct kvm_vcpu *vcpu)
4202 {
4203         struct kvm_segment kvm_seg;
4204
4205         kvm_get_segment(vcpu, &kvm_seg, seg);
4206         kvm_seg.selector = sel;
4207         kvm_set_segment(vcpu, &kvm_seg, seg);
4208 }
4209
4210 static struct x86_emulate_ops emulate_ops = {
4211         .read_std            = kvm_read_guest_virt_system,
4212         .write_std           = kvm_write_guest_virt_system,
4213         .fetch               = kvm_fetch_guest_virt,
4214         .read_emulated       = emulator_read_emulated,
4215         .write_emulated      = emulator_write_emulated,
4216         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4217         .pio_in_emulated     = emulator_pio_in_emulated,
4218         .pio_out_emulated    = emulator_pio_out_emulated,
4219         .get_cached_descriptor = emulator_get_cached_descriptor,
4220         .set_cached_descriptor = emulator_set_cached_descriptor,
4221         .get_segment_selector = emulator_get_segment_selector,
4222         .set_segment_selector = emulator_set_segment_selector,
4223         .get_cached_segment_base = emulator_get_cached_segment_base,
4224         .get_gdt             = emulator_get_gdt,
4225         .get_idt             = emulator_get_idt,
4226         .get_cr              = emulator_get_cr,
4227         .set_cr              = emulator_set_cr,
4228         .cpl                 = emulator_get_cpl,
4229         .get_dr              = emulator_get_dr,
4230         .set_dr              = emulator_set_dr,
4231         .set_msr             = kvm_set_msr,
4232         .get_msr             = kvm_get_msr,
4233 };
4234
4235 static void cache_all_regs(struct kvm_vcpu *vcpu)
4236 {
4237         kvm_register_read(vcpu, VCPU_REGS_RAX);
4238         kvm_register_read(vcpu, VCPU_REGS_RSP);
4239         kvm_register_read(vcpu, VCPU_REGS_RIP);
4240         vcpu->arch.regs_dirty = ~0;
4241 }
4242
4243 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4244 {
4245         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4246         /*
4247          * an sti; sti; sequence only disable interrupts for the first
4248          * instruction. So, if the last instruction, be it emulated or
4249          * not, left the system with the INT_STI flag enabled, it
4250          * means that the last instruction is an sti. We should not
4251          * leave the flag on in this case. The same goes for mov ss
4252          */
4253         if (!(int_shadow & mask))
4254                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4255 }
4256
4257 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4258 {
4259         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4260         if (ctxt->exception.vector == PF_VECTOR)
4261                 kvm_propagate_fault(vcpu, &ctxt->exception);
4262         else if (ctxt->exception.error_code_valid)
4263                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4264                                       ctxt->exception.error_code);
4265         else
4266                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4267 }
4268
4269 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4270 {
4271         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4272         int cs_db, cs_l;
4273
4274         cache_all_regs(vcpu);
4275
4276         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4277
4278         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4279         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4280         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4281         vcpu->arch.emulate_ctxt.mode =
4282                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4283                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4284                 ? X86EMUL_MODE_VM86 : cs_l
4285                 ? X86EMUL_MODE_PROT64 : cs_db
4286                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4287         memset(c, 0, sizeof(struct decode_cache));
4288         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4289 }
4290
4291 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4292 {
4293         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4294         int ret;
4295
4296         init_emulate_ctxt(vcpu);
4297
4298         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4299         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4300         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4301         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4302
4303         if (ret != X86EMUL_CONTINUE)
4304                 return EMULATE_FAIL;
4305
4306         vcpu->arch.emulate_ctxt.eip = c->eip;
4307         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4308         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4309         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4310
4311         if (irq == NMI_VECTOR)
4312                 vcpu->arch.nmi_pending = false;
4313         else
4314                 vcpu->arch.interrupt.pending = false;
4315
4316         return EMULATE_DONE;
4317 }
4318 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4319
4320 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4321 {
4322         int r = EMULATE_DONE;
4323
4324         ++vcpu->stat.insn_emulation_fail;
4325         trace_kvm_emulate_insn_failed(vcpu);
4326         if (!is_guest_mode(vcpu)) {
4327                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4328                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4329                 vcpu->run->internal.ndata = 0;
4330                 r = EMULATE_FAIL;
4331         }
4332         kvm_queue_exception(vcpu, UD_VECTOR);
4333
4334         return r;
4335 }
4336
4337 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4338 {
4339         gpa_t gpa;
4340
4341         if (tdp_enabled)
4342                 return false;
4343
4344         /*
4345          * if emulation was due to access to shadowed page table
4346          * and it failed try to unshadow page and re-entetr the
4347          * guest to let CPU execute the instruction.
4348          */
4349         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4350                 return true;
4351
4352         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4353
4354         if (gpa == UNMAPPED_GVA)
4355                 return true; /* let cpu generate fault */
4356
4357         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4358                 return true;
4359
4360         return false;
4361 }
4362
4363 int emulate_instruction(struct kvm_vcpu *vcpu,
4364                         unsigned long cr2,
4365                         u16 error_code,
4366                         int emulation_type)
4367 {
4368         int r;
4369         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4370
4371         kvm_clear_exception_queue(vcpu);
4372         vcpu->arch.mmio_fault_cr2 = cr2;
4373         /*
4374          * TODO: fix emulate.c to use guest_read/write_register
4375          * instead of direct ->regs accesses, can save hundred cycles
4376          * on Intel for instructions that don't read/change RSP, for
4377          * for example.
4378          */
4379         cache_all_regs(vcpu);
4380
4381         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4382                 init_emulate_ctxt(vcpu);
4383                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4384                 vcpu->arch.emulate_ctxt.have_exception = false;
4385                 vcpu->arch.emulate_ctxt.perm_ok = false;
4386
4387                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4388                 if (r == X86EMUL_PROPAGATE_FAULT)
4389                         goto done;
4390
4391                 trace_kvm_emulate_insn_start(vcpu);
4392
4393                 /* Only allow emulation of specific instructions on #UD
4394                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4395                 if (emulation_type & EMULTYPE_TRAP_UD) {
4396                         if (!c->twobyte)
4397                                 return EMULATE_FAIL;
4398                         switch (c->b) {
4399                         case 0x01: /* VMMCALL */
4400                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4401                                         return EMULATE_FAIL;
4402                                 break;
4403                         case 0x34: /* sysenter */
4404                         case 0x35: /* sysexit */
4405                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4406                                         return EMULATE_FAIL;
4407                                 break;
4408                         case 0x05: /* syscall */
4409                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4410                                         return EMULATE_FAIL;
4411                                 break;
4412                         default:
4413                                 return EMULATE_FAIL;
4414                         }
4415
4416                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4417                                 return EMULATE_FAIL;
4418                 }
4419
4420                 ++vcpu->stat.insn_emulation;
4421                 if (r)  {
4422                         if (reexecute_instruction(vcpu, cr2))
4423                                 return EMULATE_DONE;
4424                         if (emulation_type & EMULTYPE_SKIP)
4425                                 return EMULATE_FAIL;
4426                         return handle_emulation_failure(vcpu);
4427                 }
4428         }
4429
4430         if (emulation_type & EMULTYPE_SKIP) {
4431                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4432                 return EMULATE_DONE;
4433         }
4434
4435         /* this is needed for vmware backdor interface to work since it
4436            changes registers values  during IO operation */
4437         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4438
4439 restart:
4440         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4441
4442         if (r == EMULATION_FAILED) {
4443                 if (reexecute_instruction(vcpu, cr2))
4444                         return EMULATE_DONE;
4445
4446                 return handle_emulation_failure(vcpu);
4447         }
4448
4449 done:
4450         if (vcpu->arch.emulate_ctxt.have_exception) {
4451                 inject_emulated_exception(vcpu);
4452                 r = EMULATE_DONE;
4453         } else if (vcpu->arch.pio.count) {
4454                 if (!vcpu->arch.pio.in)
4455                         vcpu->arch.pio.count = 0;
4456                 r = EMULATE_DO_MMIO;
4457         } else if (vcpu->mmio_needed) {
4458                 if (vcpu->mmio_is_write)
4459                         vcpu->mmio_needed = 0;
4460                 r = EMULATE_DO_MMIO;
4461         } else if (r == EMULATION_RESTART)
4462                 goto restart;
4463         else
4464                 r = EMULATE_DONE;
4465
4466         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4467         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4468         kvm_make_request(KVM_REQ_EVENT, vcpu);
4469         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4470         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4471
4472         return r;
4473 }
4474 EXPORT_SYMBOL_GPL(emulate_instruction);
4475
4476 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4477 {
4478         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4479         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4480         /* do not return to emulator after return from userspace */
4481         vcpu->arch.pio.count = 0;
4482         return ret;
4483 }
4484 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4485
4486 static void tsc_bad(void *info)
4487 {
4488         __get_cpu_var(cpu_tsc_khz) = 0;
4489 }
4490
4491 static void tsc_khz_changed(void *data)
4492 {
4493         struct cpufreq_freqs *freq = data;
4494         unsigned long khz = 0;
4495
4496         if (data)
4497                 khz = freq->new;
4498         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4499                 khz = cpufreq_quick_get(raw_smp_processor_id());
4500         if (!khz)
4501                 khz = tsc_khz;
4502         __get_cpu_var(cpu_tsc_khz) = khz;
4503 }
4504
4505 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4506                                      void *data)
4507 {
4508         struct cpufreq_freqs *freq = data;
4509         struct kvm *kvm;
4510         struct kvm_vcpu *vcpu;
4511         int i, send_ipi = 0;
4512
4513         /*
4514          * We allow guests to temporarily run on slowing clocks,
4515          * provided we notify them after, or to run on accelerating
4516          * clocks, provided we notify them before.  Thus time never
4517          * goes backwards.
4518          *
4519          * However, we have a problem.  We can't atomically update
4520          * the frequency of a given CPU from this function; it is
4521          * merely a notifier, which can be called from any CPU.
4522          * Changing the TSC frequency at arbitrary points in time
4523          * requires a recomputation of local variables related to
4524          * the TSC for each VCPU.  We must flag these local variables
4525          * to be updated and be sure the update takes place with the
4526          * new frequency before any guests proceed.
4527          *
4528          * Unfortunately, the combination of hotplug CPU and frequency
4529          * change creates an intractable locking scenario; the order
4530          * of when these callouts happen is undefined with respect to
4531          * CPU hotplug, and they can race with each other.  As such,
4532          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4533          * undefined; you can actually have a CPU frequency change take
4534          * place in between the computation of X and the setting of the
4535          * variable.  To protect against this problem, all updates of
4536          * the per_cpu tsc_khz variable are done in an interrupt
4537          * protected IPI, and all callers wishing to update the value
4538          * must wait for a synchronous IPI to complete (which is trivial
4539          * if the caller is on the CPU already).  This establishes the
4540          * necessary total order on variable updates.
4541          *
4542          * Note that because a guest time update may take place
4543          * anytime after the setting of the VCPU's request bit, the
4544          * correct TSC value must be set before the request.  However,
4545          * to ensure the update actually makes it to any guest which
4546          * starts running in hardware virtualization between the set
4547          * and the acquisition of the spinlock, we must also ping the
4548          * CPU after setting the request bit.
4549          *
4550          */
4551
4552         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4553                 return 0;
4554         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4555                 return 0;
4556
4557         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4558
4559         spin_lock(&kvm_lock);
4560         list_for_each_entry(kvm, &vm_list, vm_list) {
4561                 kvm_for_each_vcpu(i, vcpu, kvm) {
4562                         if (vcpu->cpu != freq->cpu)
4563                                 continue;
4564                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4565                         if (vcpu->cpu != smp_processor_id())
4566                                 send_ipi = 1;
4567                 }
4568         }
4569         spin_unlock(&kvm_lock);
4570
4571         if (freq->old < freq->new && send_ipi) {
4572                 /*
4573                  * We upscale the frequency.  Must make the guest
4574                  * doesn't see old kvmclock values while running with
4575                  * the new frequency, otherwise we risk the guest sees
4576                  * time go backwards.
4577                  *
4578                  * In case we update the frequency for another cpu
4579                  * (which might be in guest context) send an interrupt
4580                  * to kick the cpu out of guest context.  Next time
4581                  * guest context is entered kvmclock will be updated,
4582                  * so the guest will not see stale values.
4583                  */
4584                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4585         }
4586         return 0;
4587 }
4588
4589 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4590         .notifier_call  = kvmclock_cpufreq_notifier
4591 };
4592
4593 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4594                                         unsigned long action, void *hcpu)
4595 {
4596         unsigned int cpu = (unsigned long)hcpu;
4597
4598         switch (action) {
4599                 case CPU_ONLINE:
4600                 case CPU_DOWN_FAILED:
4601                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4602                         break;
4603                 case CPU_DOWN_PREPARE:
4604                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4605                         break;
4606         }
4607         return NOTIFY_OK;
4608 }
4609
4610 static struct notifier_block kvmclock_cpu_notifier_block = {
4611         .notifier_call  = kvmclock_cpu_notifier,
4612         .priority = -INT_MAX
4613 };
4614
4615 static void kvm_timer_init(void)
4616 {
4617         int cpu;
4618
4619         max_tsc_khz = tsc_khz;
4620         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4621         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4622 #ifdef CONFIG_CPU_FREQ
4623                 struct cpufreq_policy policy;
4624                 memset(&policy, 0, sizeof(policy));
4625                 cpu = get_cpu();
4626                 cpufreq_get_policy(&policy, cpu);
4627                 if (policy.cpuinfo.max_freq)
4628                         max_tsc_khz = policy.cpuinfo.max_freq;
4629                 put_cpu();
4630 #endif
4631                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4632                                           CPUFREQ_TRANSITION_NOTIFIER);
4633         }
4634         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4635         for_each_online_cpu(cpu)
4636                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4637 }
4638
4639 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4640
4641 static int kvm_is_in_guest(void)
4642 {
4643         return percpu_read(current_vcpu) != NULL;
4644 }
4645
4646 static int kvm_is_user_mode(void)
4647 {
4648         int user_mode = 3;
4649
4650         if (percpu_read(current_vcpu))
4651                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4652
4653         return user_mode != 0;
4654 }
4655
4656 static unsigned long kvm_get_guest_ip(void)
4657 {
4658         unsigned long ip = 0;
4659
4660         if (percpu_read(current_vcpu))
4661                 ip = kvm_rip_read(percpu_read(current_vcpu));
4662
4663         return ip;
4664 }
4665
4666 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4667         .is_in_guest            = kvm_is_in_guest,
4668         .is_user_mode           = kvm_is_user_mode,
4669         .get_guest_ip           = kvm_get_guest_ip,
4670 };
4671
4672 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4673 {
4674         percpu_write(current_vcpu, vcpu);
4675 }
4676 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4677
4678 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4679 {
4680         percpu_write(current_vcpu, NULL);
4681 }
4682 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4683
4684 int kvm_arch_init(void *opaque)
4685 {
4686         int r;
4687         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4688
4689         if (kvm_x86_ops) {
4690                 printk(KERN_ERR "kvm: already loaded the other module\n");
4691                 r = -EEXIST;
4692                 goto out;
4693         }
4694
4695         if (!ops->cpu_has_kvm_support()) {
4696                 printk(KERN_ERR "kvm: no hardware support\n");
4697                 r = -EOPNOTSUPP;
4698                 goto out;
4699         }
4700         if (ops->disabled_by_bios()) {
4701                 printk(KERN_ERR "kvm: disabled by bios\n");
4702                 r = -EOPNOTSUPP;
4703                 goto out;
4704         }
4705
4706         r = kvm_mmu_module_init();
4707         if (r)
4708                 goto out;
4709
4710         kvm_init_msr_list();
4711
4712         kvm_x86_ops = ops;
4713         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4714         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4715                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4716
4717         kvm_timer_init();
4718
4719         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4720
4721         if (cpu_has_xsave)
4722                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4723
4724         return 0;
4725
4726 out:
4727         return r;
4728 }
4729
4730 void kvm_arch_exit(void)
4731 {
4732         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4733
4734         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4735                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4736                                             CPUFREQ_TRANSITION_NOTIFIER);
4737         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4738         kvm_x86_ops = NULL;
4739         kvm_mmu_module_exit();
4740 }
4741
4742 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4743 {
4744         ++vcpu->stat.halt_exits;
4745         if (irqchip_in_kernel(vcpu->kvm)) {
4746                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4747                 return 1;
4748         } else {
4749                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4750                 return 0;
4751         }
4752 }
4753 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4754
4755 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4756                            unsigned long a1)
4757 {
4758         if (is_long_mode(vcpu))
4759                 return a0;
4760         else
4761                 return a0 | ((gpa_t)a1 << 32);
4762 }
4763
4764 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4765 {
4766         u64 param, ingpa, outgpa, ret;
4767         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4768         bool fast, longmode;
4769         int cs_db, cs_l;
4770
4771         /*
4772          * hypercall generates UD from non zero cpl and real mode
4773          * per HYPER-V spec
4774          */
4775         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4776                 kvm_queue_exception(vcpu, UD_VECTOR);
4777                 return 0;
4778         }
4779
4780         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4781         longmode = is_long_mode(vcpu) && cs_l == 1;
4782
4783         if (!longmode) {
4784                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4785                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4786                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4787                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4788                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4789                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4790         }
4791 #ifdef CONFIG_X86_64
4792         else {
4793                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4794                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4795                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4796         }
4797 #endif
4798
4799         code = param & 0xffff;
4800         fast = (param >> 16) & 0x1;
4801         rep_cnt = (param >> 32) & 0xfff;
4802         rep_idx = (param >> 48) & 0xfff;
4803
4804         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4805
4806         switch (code) {
4807         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4808                 kvm_vcpu_on_spin(vcpu);
4809                 break;
4810         default:
4811                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4812                 break;
4813         }
4814
4815         ret = res | (((u64)rep_done & 0xfff) << 32);
4816         if (longmode) {
4817                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4818         } else {
4819                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4820                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4821         }
4822
4823         return 1;
4824 }
4825
4826 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4827 {
4828         unsigned long nr, a0, a1, a2, a3, ret;
4829         int r = 1;
4830
4831         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4832                 return kvm_hv_hypercall(vcpu);
4833
4834         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4835         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4836         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4837         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4838         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4839
4840         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4841
4842         if (!is_long_mode(vcpu)) {
4843                 nr &= 0xFFFFFFFF;
4844                 a0 &= 0xFFFFFFFF;
4845                 a1 &= 0xFFFFFFFF;
4846                 a2 &= 0xFFFFFFFF;
4847                 a3 &= 0xFFFFFFFF;
4848         }
4849
4850         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4851                 ret = -KVM_EPERM;
4852                 goto out;
4853         }
4854
4855         switch (nr) {
4856         case KVM_HC_VAPIC_POLL_IRQ:
4857                 ret = 0;
4858                 break;
4859         case KVM_HC_MMU_OP:
4860                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4861                 break;
4862         default:
4863                 ret = -KVM_ENOSYS;
4864                 break;
4865         }
4866 out:
4867         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4868         ++vcpu->stat.hypercalls;
4869         return r;
4870 }
4871 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4872
4873 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4874 {
4875         char instruction[3];
4876         unsigned long rip = kvm_rip_read(vcpu);
4877
4878         /*
4879          * Blow out the MMU to ensure that no other VCPU has an active mapping
4880          * to ensure that the updated hypercall appears atomically across all
4881          * VCPUs.
4882          */
4883         kvm_mmu_zap_all(vcpu->kvm);
4884
4885         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4886
4887         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4888 }
4889
4890 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4891 {
4892         struct desc_ptr dt = { limit, base };
4893
4894         kvm_x86_ops->set_gdt(vcpu, &dt);
4895 }
4896
4897 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4898 {
4899         struct desc_ptr dt = { limit, base };
4900
4901         kvm_x86_ops->set_idt(vcpu, &dt);
4902 }
4903
4904 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4905 {
4906         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4907         int j, nent = vcpu->arch.cpuid_nent;
4908
4909         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4910         /* when no next entry is found, the current entry[i] is reselected */
4911         for (j = i + 1; ; j = (j + 1) % nent) {
4912                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4913                 if (ej->function == e->function) {
4914                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4915                         return j;
4916                 }
4917         }
4918         return 0; /* silence gcc, even though control never reaches here */
4919 }
4920
4921 /* find an entry with matching function, matching index (if needed), and that
4922  * should be read next (if it's stateful) */
4923 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4924         u32 function, u32 index)
4925 {
4926         if (e->function != function)
4927                 return 0;
4928         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4929                 return 0;
4930         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4931             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4932                 return 0;
4933         return 1;
4934 }
4935
4936 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4937                                               u32 function, u32 index)
4938 {
4939         int i;
4940         struct kvm_cpuid_entry2 *best = NULL;
4941
4942         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4943                 struct kvm_cpuid_entry2 *e;
4944
4945                 e = &vcpu->arch.cpuid_entries[i];
4946                 if (is_matching_cpuid_entry(e, function, index)) {
4947                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4948                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4949                         best = e;
4950                         break;
4951                 }
4952                 /*
4953                  * Both basic or both extended?
4954                  */
4955                 if (((e->function ^ function) & 0x80000000) == 0)
4956                         if (!best || e->function > best->function)
4957                                 best = e;
4958         }
4959         return best;
4960 }
4961 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4962
4963 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4964 {
4965         struct kvm_cpuid_entry2 *best;
4966
4967         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4968         if (!best || best->eax < 0x80000008)
4969                 goto not_found;
4970         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4971         if (best)
4972                 return best->eax & 0xff;
4973 not_found:
4974         return 36;
4975 }
4976
4977 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4978 {
4979         u32 function, index;
4980         struct kvm_cpuid_entry2 *best;
4981
4982         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4983         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4984         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4985         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4986         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4987         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4988         best = kvm_find_cpuid_entry(vcpu, function, index);
4989         if (best) {
4990                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4991                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4992                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4993                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4994         }
4995         kvm_x86_ops->skip_emulated_instruction(vcpu);
4996         trace_kvm_cpuid(function,
4997                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4998                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4999                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5000                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5001 }
5002 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5003
5004 /*
5005  * Check if userspace requested an interrupt window, and that the
5006  * interrupt window is open.
5007  *
5008  * No need to exit to userspace if we already have an interrupt queued.
5009  */
5010 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5011 {
5012         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5013                 vcpu->run->request_interrupt_window &&
5014                 kvm_arch_interrupt_allowed(vcpu));
5015 }
5016
5017 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5018 {
5019         struct kvm_run *kvm_run = vcpu->run;
5020
5021         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5022         kvm_run->cr8 = kvm_get_cr8(vcpu);
5023         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5024         if (irqchip_in_kernel(vcpu->kvm))
5025                 kvm_run->ready_for_interrupt_injection = 1;
5026         else
5027                 kvm_run->ready_for_interrupt_injection =
5028                         kvm_arch_interrupt_allowed(vcpu) &&
5029                         !kvm_cpu_has_interrupt(vcpu) &&
5030                         !kvm_event_needs_reinjection(vcpu);
5031 }
5032
5033 static void vapic_enter(struct kvm_vcpu *vcpu)
5034 {
5035         struct kvm_lapic *apic = vcpu->arch.apic;
5036         struct page *page;
5037
5038         if (!apic || !apic->vapic_addr)
5039                 return;
5040
5041         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5042
5043         vcpu->arch.apic->vapic_page = page;
5044 }
5045
5046 static void vapic_exit(struct kvm_vcpu *vcpu)
5047 {
5048         struct kvm_lapic *apic = vcpu->arch.apic;
5049         int idx;
5050
5051         if (!apic || !apic->vapic_addr)
5052                 return;
5053
5054         idx = srcu_read_lock(&vcpu->kvm->srcu);
5055         kvm_release_page_dirty(apic->vapic_page);
5056         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5057         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5058 }
5059
5060 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5061 {
5062         int max_irr, tpr;
5063
5064         if (!kvm_x86_ops->update_cr8_intercept)
5065                 return;
5066
5067         if (!vcpu->arch.apic)
5068                 return;
5069
5070         if (!vcpu->arch.apic->vapic_addr)
5071                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5072         else
5073                 max_irr = -1;
5074
5075         if (max_irr != -1)
5076                 max_irr >>= 4;
5077
5078         tpr = kvm_lapic_get_cr8(vcpu);
5079
5080         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5081 }
5082
5083 static void inject_pending_event(struct kvm_vcpu *vcpu)
5084 {
5085         /* try to reinject previous events if any */
5086         if (vcpu->arch.exception.pending) {
5087                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5088                                         vcpu->arch.exception.has_error_code,
5089                                         vcpu->arch.exception.error_code);
5090                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5091                                           vcpu->arch.exception.has_error_code,
5092                                           vcpu->arch.exception.error_code,
5093                                           vcpu->arch.exception.reinject);
5094                 return;
5095         }
5096
5097         if (vcpu->arch.nmi_injected) {
5098                 kvm_x86_ops->set_nmi(vcpu);
5099                 return;
5100         }
5101
5102         if (vcpu->arch.interrupt.pending) {
5103                 kvm_x86_ops->set_irq(vcpu);
5104                 return;
5105         }
5106
5107         /* try to inject new event if pending */
5108         if (vcpu->arch.nmi_pending) {
5109                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5110                         vcpu->arch.nmi_pending = false;
5111                         vcpu->arch.nmi_injected = true;
5112                         kvm_x86_ops->set_nmi(vcpu);
5113                 }
5114         } else if (kvm_cpu_has_interrupt(vcpu)) {
5115                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5116                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5117                                             false);
5118                         kvm_x86_ops->set_irq(vcpu);
5119                 }
5120         }
5121 }
5122
5123 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5124 {
5125         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5126                         !vcpu->guest_xcr0_loaded) {
5127                 /* kvm_set_xcr() also depends on this */
5128                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5129                 vcpu->guest_xcr0_loaded = 1;
5130         }
5131 }
5132
5133 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5134 {
5135         if (vcpu->guest_xcr0_loaded) {
5136                 if (vcpu->arch.xcr0 != host_xcr0)
5137                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5138                 vcpu->guest_xcr0_loaded = 0;
5139         }
5140 }
5141
5142 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5143 {
5144         int r;
5145         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5146                 vcpu->run->request_interrupt_window;
5147
5148         if (vcpu->requests) {
5149                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5150                         kvm_mmu_unload(vcpu);
5151                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5152                         __kvm_migrate_timers(vcpu);
5153                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5154                         r = kvm_guest_time_update(vcpu);
5155                         if (unlikely(r))
5156                                 goto out;
5157                 }
5158                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5159                         kvm_mmu_sync_roots(vcpu);
5160                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5161                         kvm_x86_ops->tlb_flush(vcpu);
5162                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5163                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5164                         r = 0;
5165                         goto out;
5166                 }
5167                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5168                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5169                         r = 0;
5170                         goto out;
5171                 }
5172                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5173                         vcpu->fpu_active = 0;
5174                         kvm_x86_ops->fpu_deactivate(vcpu);
5175                 }
5176                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5177                         /* Page is swapped out. Do synthetic halt */
5178                         vcpu->arch.apf.halted = true;
5179                         r = 1;
5180                         goto out;
5181                 }
5182         }
5183
5184         r = kvm_mmu_reload(vcpu);
5185         if (unlikely(r))
5186                 goto out;
5187
5188         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5189                 inject_pending_event(vcpu);
5190
5191                 /* enable NMI/IRQ window open exits if needed */
5192                 if (vcpu->arch.nmi_pending)
5193                         kvm_x86_ops->enable_nmi_window(vcpu);
5194                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5195                         kvm_x86_ops->enable_irq_window(vcpu);
5196
5197                 if (kvm_lapic_enabled(vcpu)) {
5198                         update_cr8_intercept(vcpu);
5199                         kvm_lapic_sync_to_vapic(vcpu);
5200                 }
5201         }
5202
5203         preempt_disable();
5204
5205         kvm_x86_ops->prepare_guest_switch(vcpu);
5206         if (vcpu->fpu_active)
5207                 kvm_load_guest_fpu(vcpu);
5208         kvm_load_guest_xcr0(vcpu);
5209
5210         atomic_set(&vcpu->guest_mode, 1);
5211         smp_wmb();
5212
5213         local_irq_disable();
5214
5215         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5216             || need_resched() || signal_pending(current)) {
5217                 atomic_set(&vcpu->guest_mode, 0);
5218                 smp_wmb();
5219                 local_irq_enable();
5220                 preempt_enable();
5221                 kvm_x86_ops->cancel_injection(vcpu);
5222                 r = 1;
5223                 goto out;
5224         }
5225
5226         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5227
5228         kvm_guest_enter();
5229
5230         if (unlikely(vcpu->arch.switch_db_regs)) {
5231                 set_debugreg(0, 7);
5232                 set_debugreg(vcpu->arch.eff_db[0], 0);
5233                 set_debugreg(vcpu->arch.eff_db[1], 1);
5234                 set_debugreg(vcpu->arch.eff_db[2], 2);
5235                 set_debugreg(vcpu->arch.eff_db[3], 3);
5236         }
5237
5238         trace_kvm_entry(vcpu->vcpu_id);
5239         kvm_x86_ops->run(vcpu);
5240
5241         /*
5242          * If the guest has used debug registers, at least dr7
5243          * will be disabled while returning to the host.
5244          * If we don't have active breakpoints in the host, we don't
5245          * care about the messed up debug address registers. But if
5246          * we have some of them active, restore the old state.
5247          */
5248         if (hw_breakpoint_active())
5249                 hw_breakpoint_restore();
5250
5251         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5252
5253         atomic_set(&vcpu->guest_mode, 0);
5254         smp_wmb();
5255         local_irq_enable();
5256
5257         ++vcpu->stat.exits;
5258
5259         /*
5260          * We must have an instruction between local_irq_enable() and
5261          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5262          * the interrupt shadow.  The stat.exits increment will do nicely.
5263          * But we need to prevent reordering, hence this barrier():
5264          */
5265         barrier();
5266
5267         kvm_guest_exit();
5268
5269         preempt_enable();
5270
5271         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5272
5273         /*
5274          * Profile KVM exit RIPs:
5275          */
5276         if (unlikely(prof_on == KVM_PROFILING)) {
5277                 unsigned long rip = kvm_rip_read(vcpu);
5278                 profile_hit(KVM_PROFILING, (void *)rip);
5279         }
5280
5281
5282         kvm_lapic_sync_from_vapic(vcpu);
5283
5284         r = kvm_x86_ops->handle_exit(vcpu);
5285 out:
5286         return r;
5287 }
5288
5289
5290 static int __vcpu_run(struct kvm_vcpu *vcpu)
5291 {
5292         int r;
5293         struct kvm *kvm = vcpu->kvm;
5294
5295         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5296                 pr_debug("vcpu %d received sipi with vector # %x\n",
5297                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5298                 kvm_lapic_reset(vcpu);
5299                 r = kvm_arch_vcpu_reset(vcpu);
5300                 if (r)
5301                         return r;
5302                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5303         }
5304
5305         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5306         vapic_enter(vcpu);
5307
5308         r = 1;
5309         while (r > 0) {
5310                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5311                     !vcpu->arch.apf.halted)
5312                         r = vcpu_enter_guest(vcpu);
5313                 else {
5314                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5315                         kvm_vcpu_block(vcpu);
5316                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5317                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5318                         {
5319                                 switch(vcpu->arch.mp_state) {
5320                                 case KVM_MP_STATE_HALTED:
5321                                         vcpu->arch.mp_state =
5322                                                 KVM_MP_STATE_RUNNABLE;
5323                                 case KVM_MP_STATE_RUNNABLE:
5324                                         vcpu->arch.apf.halted = false;
5325                                         break;
5326                                 case KVM_MP_STATE_SIPI_RECEIVED:
5327                                 default:
5328                                         r = -EINTR;
5329                                         break;
5330                                 }
5331                         }
5332                 }
5333
5334                 if (r <= 0)
5335                         break;
5336
5337                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5338                 if (kvm_cpu_has_pending_timer(vcpu))
5339                         kvm_inject_pending_timer_irqs(vcpu);
5340
5341                 if (dm_request_for_irq_injection(vcpu)) {
5342                         r = -EINTR;
5343                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5344                         ++vcpu->stat.request_irq_exits;
5345                 }
5346
5347                 kvm_check_async_pf_completion(vcpu);
5348
5349                 if (signal_pending(current)) {
5350                         r = -EINTR;
5351                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5352                         ++vcpu->stat.signal_exits;
5353                 }
5354                 if (need_resched()) {
5355                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5356                         kvm_resched(vcpu);
5357                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5358                 }
5359         }
5360
5361         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5362
5363         vapic_exit(vcpu);
5364
5365         return r;
5366 }
5367
5368 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5369 {
5370         int r;
5371         sigset_t sigsaved;
5372
5373         if (vcpu->sigset_active)
5374                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5375
5376         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5377                 kvm_vcpu_block(vcpu);
5378                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5379                 r = -EAGAIN;
5380                 goto out;
5381         }
5382
5383         /* re-sync apic's tpr */
5384         if (!irqchip_in_kernel(vcpu->kvm))
5385                 kvm_set_cr8(vcpu, kvm_run->cr8);
5386
5387         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5388                 if (vcpu->mmio_needed) {
5389                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5390                         vcpu->mmio_read_completed = 1;
5391                         vcpu->mmio_needed = 0;
5392                 }
5393                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5394                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5395                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5396                 if (r != EMULATE_DONE) {
5397                         r = 0;
5398                         goto out;
5399                 }
5400         }
5401         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5402                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5403                                      kvm_run->hypercall.ret);
5404
5405         r = __vcpu_run(vcpu);
5406
5407 out:
5408         post_kvm_run_save(vcpu);
5409         if (vcpu->sigset_active)
5410                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5411
5412         return r;
5413 }
5414
5415 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5416 {
5417         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5418         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5419         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5420         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5421         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5422         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5423         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5424         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5425 #ifdef CONFIG_X86_64
5426         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5427         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5428         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5429         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5430         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5431         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5432         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5433         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5434 #endif
5435
5436         regs->rip = kvm_rip_read(vcpu);
5437         regs->rflags = kvm_get_rflags(vcpu);
5438
5439         return 0;
5440 }
5441
5442 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5443 {
5444         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5445         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5446         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5447         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5448         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5449         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5450         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5451         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5452 #ifdef CONFIG_X86_64
5453         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5454         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5455         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5456         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5457         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5458         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5459         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5460         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5461 #endif
5462
5463         kvm_rip_write(vcpu, regs->rip);
5464         kvm_set_rflags(vcpu, regs->rflags);
5465
5466         vcpu->arch.exception.pending = false;
5467
5468         kvm_make_request(KVM_REQ_EVENT, vcpu);
5469
5470         return 0;
5471 }
5472
5473 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5474 {
5475         struct kvm_segment cs;
5476
5477         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5478         *db = cs.db;
5479         *l = cs.l;
5480 }
5481 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5482
5483 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5484                                   struct kvm_sregs *sregs)
5485 {
5486         struct desc_ptr dt;
5487
5488         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5489         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5490         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5491         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5492         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5493         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5494
5495         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5496         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5497
5498         kvm_x86_ops->get_idt(vcpu, &dt);
5499         sregs->idt.limit = dt.size;
5500         sregs->idt.base = dt.address;
5501         kvm_x86_ops->get_gdt(vcpu, &dt);
5502         sregs->gdt.limit = dt.size;
5503         sregs->gdt.base = dt.address;
5504
5505         sregs->cr0 = kvm_read_cr0(vcpu);
5506         sregs->cr2 = vcpu->arch.cr2;
5507         sregs->cr3 = vcpu->arch.cr3;
5508         sregs->cr4 = kvm_read_cr4(vcpu);
5509         sregs->cr8 = kvm_get_cr8(vcpu);
5510         sregs->efer = vcpu->arch.efer;
5511         sregs->apic_base = kvm_get_apic_base(vcpu);
5512
5513         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5514
5515         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5516                 set_bit(vcpu->arch.interrupt.nr,
5517                         (unsigned long *)sregs->interrupt_bitmap);
5518
5519         return 0;
5520 }
5521
5522 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5523                                     struct kvm_mp_state *mp_state)
5524 {
5525         mp_state->mp_state = vcpu->arch.mp_state;
5526         return 0;
5527 }
5528
5529 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5530                                     struct kvm_mp_state *mp_state)
5531 {
5532         vcpu->arch.mp_state = mp_state->mp_state;
5533         kvm_make_request(KVM_REQ_EVENT, vcpu);
5534         return 0;
5535 }
5536
5537 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5538                     bool has_error_code, u32 error_code)
5539 {
5540         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5541         int ret;
5542
5543         init_emulate_ctxt(vcpu);
5544
5545         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5546                                    tss_selector, reason, has_error_code,
5547                                    error_code);
5548
5549         if (ret)
5550                 return EMULATE_FAIL;
5551
5552         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5553         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5554         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5555         kvm_make_request(KVM_REQ_EVENT, vcpu);
5556         return EMULATE_DONE;
5557 }
5558 EXPORT_SYMBOL_GPL(kvm_task_switch);
5559
5560 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5561                                   struct kvm_sregs *sregs)
5562 {
5563         int mmu_reset_needed = 0;
5564         int pending_vec, max_bits;
5565         struct desc_ptr dt;
5566
5567         dt.size = sregs->idt.limit;
5568         dt.address = sregs->idt.base;
5569         kvm_x86_ops->set_idt(vcpu, &dt);
5570         dt.size = sregs->gdt.limit;
5571         dt.address = sregs->gdt.base;
5572         kvm_x86_ops->set_gdt(vcpu, &dt);
5573
5574         vcpu->arch.cr2 = sregs->cr2;
5575         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5576         vcpu->arch.cr3 = sregs->cr3;
5577
5578         kvm_set_cr8(vcpu, sregs->cr8);
5579
5580         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5581         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5582         kvm_set_apic_base(vcpu, sregs->apic_base);
5583
5584         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5585         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5586         vcpu->arch.cr0 = sregs->cr0;
5587
5588         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5589         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5590         if (sregs->cr4 & X86_CR4_OSXSAVE)
5591                 update_cpuid(vcpu);
5592         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5593                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5594                 mmu_reset_needed = 1;
5595         }
5596
5597         if (mmu_reset_needed)
5598                 kvm_mmu_reset_context(vcpu);
5599
5600         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5601         pending_vec = find_first_bit(
5602                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5603         if (pending_vec < max_bits) {
5604                 kvm_queue_interrupt(vcpu, pending_vec, false);
5605                 pr_debug("Set back pending irq %d\n", pending_vec);
5606                 if (irqchip_in_kernel(vcpu->kvm))
5607                         kvm_pic_clear_isr_ack(vcpu->kvm);
5608         }
5609
5610         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5611         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5612         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5613         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5614         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5615         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5616
5617         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5618         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5619
5620         update_cr8_intercept(vcpu);
5621
5622         /* Older userspace won't unhalt the vcpu on reset. */
5623         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5624             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5625             !is_protmode(vcpu))
5626                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5627
5628         kvm_make_request(KVM_REQ_EVENT, vcpu);
5629
5630         return 0;
5631 }
5632
5633 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5634                                         struct kvm_guest_debug *dbg)
5635 {
5636         unsigned long rflags;
5637         int i, r;
5638
5639         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5640                 r = -EBUSY;
5641                 if (vcpu->arch.exception.pending)
5642                         goto out;
5643                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5644                         kvm_queue_exception(vcpu, DB_VECTOR);
5645                 else
5646                         kvm_queue_exception(vcpu, BP_VECTOR);
5647         }
5648
5649         /*
5650          * Read rflags as long as potentially injected trace flags are still
5651          * filtered out.
5652          */
5653         rflags = kvm_get_rflags(vcpu);
5654
5655         vcpu->guest_debug = dbg->control;
5656         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5657                 vcpu->guest_debug = 0;
5658
5659         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5660                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5661                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5662                 vcpu->arch.switch_db_regs =
5663                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5664         } else {
5665                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5666                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5667                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5668         }
5669
5670         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5671                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5672                         get_segment_base(vcpu, VCPU_SREG_CS);
5673
5674         /*
5675          * Trigger an rflags update that will inject or remove the trace
5676          * flags.
5677          */
5678         kvm_set_rflags(vcpu, rflags);
5679
5680         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5681
5682         r = 0;
5683
5684 out:
5685
5686         return r;
5687 }
5688
5689 /*
5690  * Translate a guest virtual address to a guest physical address.
5691  */
5692 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5693                                     struct kvm_translation *tr)
5694 {
5695         unsigned long vaddr = tr->linear_address;
5696         gpa_t gpa;
5697         int idx;
5698
5699         idx = srcu_read_lock(&vcpu->kvm->srcu);
5700         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5701         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5702         tr->physical_address = gpa;
5703         tr->valid = gpa != UNMAPPED_GVA;
5704         tr->writeable = 1;
5705         tr->usermode = 0;
5706
5707         return 0;
5708 }
5709
5710 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5711 {
5712         struct i387_fxsave_struct *fxsave =
5713                         &vcpu->arch.guest_fpu.state->fxsave;
5714
5715         memcpy(fpu->fpr, fxsave->st_space, 128);
5716         fpu->fcw = fxsave->cwd;
5717         fpu->fsw = fxsave->swd;
5718         fpu->ftwx = fxsave->twd;
5719         fpu->last_opcode = fxsave->fop;
5720         fpu->last_ip = fxsave->rip;
5721         fpu->last_dp = fxsave->rdp;
5722         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5723
5724         return 0;
5725 }
5726
5727 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5728 {
5729         struct i387_fxsave_struct *fxsave =
5730                         &vcpu->arch.guest_fpu.state->fxsave;
5731
5732         memcpy(fxsave->st_space, fpu->fpr, 128);
5733         fxsave->cwd = fpu->fcw;
5734         fxsave->swd = fpu->fsw;
5735         fxsave->twd = fpu->ftwx;
5736         fxsave->fop = fpu->last_opcode;
5737         fxsave->rip = fpu->last_ip;
5738         fxsave->rdp = fpu->last_dp;
5739         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5740
5741         return 0;
5742 }
5743
5744 int fx_init(struct kvm_vcpu *vcpu)
5745 {
5746         int err;
5747
5748         err = fpu_alloc(&vcpu->arch.guest_fpu);
5749         if (err)
5750                 return err;
5751
5752         fpu_finit(&vcpu->arch.guest_fpu);
5753
5754         /*
5755          * Ensure guest xcr0 is valid for loading
5756          */
5757         vcpu->arch.xcr0 = XSTATE_FP;
5758
5759         vcpu->arch.cr0 |= X86_CR0_ET;
5760
5761         return 0;
5762 }
5763 EXPORT_SYMBOL_GPL(fx_init);
5764
5765 static void fx_free(struct kvm_vcpu *vcpu)
5766 {
5767         fpu_free(&vcpu->arch.guest_fpu);
5768 }
5769
5770 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5771 {
5772         if (vcpu->guest_fpu_loaded)
5773                 return;
5774
5775         /*
5776          * Restore all possible states in the guest,
5777          * and assume host would use all available bits.
5778          * Guest xcr0 would be loaded later.
5779          */
5780         kvm_put_guest_xcr0(vcpu);
5781         vcpu->guest_fpu_loaded = 1;
5782         unlazy_fpu(current);
5783         fpu_restore_checking(&vcpu->arch.guest_fpu);
5784         trace_kvm_fpu(1);
5785 }
5786
5787 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5788 {
5789         kvm_put_guest_xcr0(vcpu);
5790
5791         if (!vcpu->guest_fpu_loaded)
5792                 return;
5793
5794         vcpu->guest_fpu_loaded = 0;
5795         fpu_save_init(&vcpu->arch.guest_fpu);
5796         ++vcpu->stat.fpu_reload;
5797         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5798         trace_kvm_fpu(0);
5799 }
5800
5801 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5802 {
5803         if (vcpu->arch.time_page) {
5804                 kvm_release_page_dirty(vcpu->arch.time_page);
5805                 vcpu->arch.time_page = NULL;
5806         }
5807
5808         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5809         fx_free(vcpu);
5810         kvm_x86_ops->vcpu_free(vcpu);
5811 }
5812
5813 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5814                                                 unsigned int id)
5815 {
5816         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5817                 printk_once(KERN_WARNING
5818                 "kvm: SMP vm created on host with unstable TSC; "
5819                 "guest TSC will not be reliable\n");
5820         return kvm_x86_ops->vcpu_create(kvm, id);
5821 }
5822
5823 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5824 {
5825         int r;
5826
5827         vcpu->arch.mtrr_state.have_fixed = 1;
5828         vcpu_load(vcpu);
5829         r = kvm_arch_vcpu_reset(vcpu);
5830         if (r == 0)
5831                 r = kvm_mmu_setup(vcpu);
5832         vcpu_put(vcpu);
5833         if (r < 0)
5834                 goto free_vcpu;
5835
5836         return 0;
5837 free_vcpu:
5838         kvm_x86_ops->vcpu_free(vcpu);
5839         return r;
5840 }
5841
5842 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5843 {
5844         vcpu->arch.apf.msr_val = 0;
5845
5846         vcpu_load(vcpu);
5847         kvm_mmu_unload(vcpu);
5848         vcpu_put(vcpu);
5849
5850         fx_free(vcpu);
5851         kvm_x86_ops->vcpu_free(vcpu);
5852 }
5853
5854 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5855 {
5856         vcpu->arch.nmi_pending = false;
5857         vcpu->arch.nmi_injected = false;
5858
5859         vcpu->arch.switch_db_regs = 0;
5860         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5861         vcpu->arch.dr6 = DR6_FIXED_1;
5862         vcpu->arch.dr7 = DR7_FIXED_1;
5863
5864         kvm_make_request(KVM_REQ_EVENT, vcpu);
5865         vcpu->arch.apf.msr_val = 0;
5866
5867         kvm_clear_async_pf_completion_queue(vcpu);
5868         kvm_async_pf_hash_reset(vcpu);
5869         vcpu->arch.apf.halted = false;
5870
5871         return kvm_x86_ops->vcpu_reset(vcpu);
5872 }
5873
5874 int kvm_arch_hardware_enable(void *garbage)
5875 {
5876         struct kvm *kvm;
5877         struct kvm_vcpu *vcpu;
5878         int i;
5879
5880         kvm_shared_msr_cpu_online();
5881         list_for_each_entry(kvm, &vm_list, vm_list)
5882                 kvm_for_each_vcpu(i, vcpu, kvm)
5883                         if (vcpu->cpu == smp_processor_id())
5884                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5885         return kvm_x86_ops->hardware_enable(garbage);
5886 }
5887
5888 void kvm_arch_hardware_disable(void *garbage)
5889 {
5890         kvm_x86_ops->hardware_disable(garbage);
5891         drop_user_return_notifiers(garbage);
5892 }
5893
5894 int kvm_arch_hardware_setup(void)
5895 {
5896         return kvm_x86_ops->hardware_setup();
5897 }
5898
5899 void kvm_arch_hardware_unsetup(void)
5900 {
5901         kvm_x86_ops->hardware_unsetup();
5902 }
5903
5904 void kvm_arch_check_processor_compat(void *rtn)
5905 {
5906         kvm_x86_ops->check_processor_compatibility(rtn);
5907 }
5908
5909 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5910 {
5911         struct page *page;
5912         struct kvm *kvm;
5913         int r;
5914
5915         BUG_ON(vcpu->kvm == NULL);
5916         kvm = vcpu->kvm;
5917
5918         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5919         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5920         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5921         vcpu->arch.mmu.translate_gpa = translate_gpa;
5922         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5923         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5924                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5925         else
5926                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5927
5928         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5929         if (!page) {
5930                 r = -ENOMEM;
5931                 goto fail;
5932         }
5933         vcpu->arch.pio_data = page_address(page);
5934
5935         if (!kvm->arch.virtual_tsc_khz)
5936                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5937
5938         r = kvm_mmu_create(vcpu);
5939         if (r < 0)
5940                 goto fail_free_pio_data;
5941
5942         if (irqchip_in_kernel(kvm)) {
5943                 r = kvm_create_lapic(vcpu);
5944                 if (r < 0)
5945                         goto fail_mmu_destroy;
5946         }
5947
5948         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5949                                        GFP_KERNEL);
5950         if (!vcpu->arch.mce_banks) {
5951                 r = -ENOMEM;
5952                 goto fail_free_lapic;
5953         }
5954         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5955
5956         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5957                 goto fail_free_mce_banks;
5958
5959         kvm_async_pf_hash_reset(vcpu);
5960
5961         return 0;
5962 fail_free_mce_banks:
5963         kfree(vcpu->arch.mce_banks);
5964 fail_free_lapic:
5965         kvm_free_lapic(vcpu);
5966 fail_mmu_destroy:
5967         kvm_mmu_destroy(vcpu);
5968 fail_free_pio_data:
5969         free_page((unsigned long)vcpu->arch.pio_data);
5970 fail:
5971         return r;
5972 }
5973
5974 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5975 {
5976         int idx;
5977
5978         kfree(vcpu->arch.mce_banks);
5979         kvm_free_lapic(vcpu);
5980         idx = srcu_read_lock(&vcpu->kvm->srcu);
5981         kvm_mmu_destroy(vcpu);
5982         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5983         free_page((unsigned long)vcpu->arch.pio_data);
5984 }
5985
5986 int kvm_arch_init_vm(struct kvm *kvm)
5987 {
5988         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5989         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5990
5991         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5992         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5993
5994         spin_lock_init(&kvm->arch.tsc_write_lock);
5995
5996         return 0;
5997 }
5998
5999 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6000 {
6001         vcpu_load(vcpu);
6002         kvm_mmu_unload(vcpu);
6003         vcpu_put(vcpu);
6004 }
6005
6006 static void kvm_free_vcpus(struct kvm *kvm)
6007 {
6008         unsigned int i;
6009         struct kvm_vcpu *vcpu;
6010
6011         /*
6012          * Unpin any mmu pages first.
6013          */
6014         kvm_for_each_vcpu(i, vcpu, kvm) {
6015                 kvm_clear_async_pf_completion_queue(vcpu);
6016                 kvm_unload_vcpu_mmu(vcpu);
6017         }
6018         kvm_for_each_vcpu(i, vcpu, kvm)
6019                 kvm_arch_vcpu_free(vcpu);
6020
6021         mutex_lock(&kvm->lock);
6022         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6023                 kvm->vcpus[i] = NULL;
6024
6025         atomic_set(&kvm->online_vcpus, 0);
6026         mutex_unlock(&kvm->lock);
6027 }
6028
6029 void kvm_arch_sync_events(struct kvm *kvm)
6030 {
6031         kvm_free_all_assigned_devices(kvm);
6032         kvm_free_pit(kvm);
6033 }
6034
6035 void kvm_arch_destroy_vm(struct kvm *kvm)
6036 {
6037         kvm_iommu_unmap_guest(kvm);
6038         kfree(kvm->arch.vpic);
6039         kfree(kvm->arch.vioapic);
6040         kvm_free_vcpus(kvm);
6041         if (kvm->arch.apic_access_page)
6042                 put_page(kvm->arch.apic_access_page);
6043         if (kvm->arch.ept_identity_pagetable)
6044                 put_page(kvm->arch.ept_identity_pagetable);
6045 }
6046
6047 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6048                                 struct kvm_memory_slot *memslot,
6049                                 struct kvm_memory_slot old,
6050                                 struct kvm_userspace_memory_region *mem,
6051                                 int user_alloc)
6052 {
6053         int npages = memslot->npages;
6054         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6055
6056         /* Prevent internal slot pages from being moved by fork()/COW. */
6057         if (memslot->id >= KVM_MEMORY_SLOTS)
6058                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6059
6060         /*To keep backward compatibility with older userspace,
6061          *x86 needs to hanlde !user_alloc case.
6062          */
6063         if (!user_alloc) {
6064                 if (npages && !old.rmap) {
6065                         unsigned long userspace_addr;
6066
6067                         down_write(&current->mm->mmap_sem);
6068                         userspace_addr = do_mmap(NULL, 0,
6069                                                  npages * PAGE_SIZE,
6070                                                  PROT_READ | PROT_WRITE,
6071                                                  map_flags,
6072                                                  0);
6073                         up_write(&current->mm->mmap_sem);
6074
6075                         if (IS_ERR((void *)userspace_addr))
6076                                 return PTR_ERR((void *)userspace_addr);
6077
6078                         memslot->userspace_addr = userspace_addr;
6079                 }
6080         }
6081
6082
6083         return 0;
6084 }
6085
6086 void kvm_arch_commit_memory_region(struct kvm *kvm,
6087                                 struct kvm_userspace_memory_region *mem,
6088                                 struct kvm_memory_slot old,
6089                                 int user_alloc)
6090 {
6091
6092         int npages = mem->memory_size >> PAGE_SHIFT;
6093
6094         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6095                 int ret;
6096
6097                 down_write(&current->mm->mmap_sem);
6098                 ret = do_munmap(current->mm, old.userspace_addr,
6099                                 old.npages * PAGE_SIZE);
6100                 up_write(&current->mm->mmap_sem);
6101                 if (ret < 0)
6102                         printk(KERN_WARNING
6103                                "kvm_vm_ioctl_set_memory_region: "
6104                                "failed to munmap memory\n");
6105         }
6106
6107         spin_lock(&kvm->mmu_lock);
6108         if (!kvm->arch.n_requested_mmu_pages) {
6109                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6110                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6111         }
6112
6113         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6114         spin_unlock(&kvm->mmu_lock);
6115 }
6116
6117 void kvm_arch_flush_shadow(struct kvm *kvm)
6118 {
6119         kvm_mmu_zap_all(kvm);
6120         kvm_reload_remote_mmus(kvm);
6121 }
6122
6123 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6124 {
6125         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6126                 !vcpu->arch.apf.halted)
6127                 || !list_empty_careful(&vcpu->async_pf.done)
6128                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6129                 || vcpu->arch.nmi_pending ||
6130                 (kvm_arch_interrupt_allowed(vcpu) &&
6131                  kvm_cpu_has_interrupt(vcpu));
6132 }
6133
6134 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6135 {
6136         int me;
6137         int cpu = vcpu->cpu;
6138
6139         if (waitqueue_active(&vcpu->wq)) {
6140                 wake_up_interruptible(&vcpu->wq);
6141                 ++vcpu->stat.halt_wakeup;
6142         }
6143
6144         me = get_cpu();
6145         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6146                 if (atomic_xchg(&vcpu->guest_mode, 0))
6147                         smp_send_reschedule(cpu);
6148         put_cpu();
6149 }
6150
6151 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6152 {
6153         return kvm_x86_ops->interrupt_allowed(vcpu);
6154 }
6155
6156 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6157 {
6158         unsigned long current_rip = kvm_rip_read(vcpu) +
6159                 get_segment_base(vcpu, VCPU_SREG_CS);
6160
6161         return current_rip == linear_rip;
6162 }
6163 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6164
6165 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6166 {
6167         unsigned long rflags;
6168
6169         rflags = kvm_x86_ops->get_rflags(vcpu);
6170         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6171                 rflags &= ~X86_EFLAGS_TF;
6172         return rflags;
6173 }
6174 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6175
6176 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6177 {
6178         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6179             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6180                 rflags |= X86_EFLAGS_TF;
6181         kvm_x86_ops->set_rflags(vcpu, rflags);
6182         kvm_make_request(KVM_REQ_EVENT, vcpu);
6183 }
6184 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6185
6186 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6187 {
6188         int r;
6189
6190         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6191               is_error_page(work->page))
6192                 return;
6193
6194         r = kvm_mmu_reload(vcpu);
6195         if (unlikely(r))
6196                 return;
6197
6198         if (!vcpu->arch.mmu.direct_map &&
6199               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6200                 return;
6201
6202         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6203 }
6204
6205 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6206 {
6207         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6208 }
6209
6210 static inline u32 kvm_async_pf_next_probe(u32 key)
6211 {
6212         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6213 }
6214
6215 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6216 {
6217         u32 key = kvm_async_pf_hash_fn(gfn);
6218
6219         while (vcpu->arch.apf.gfns[key] != ~0)
6220                 key = kvm_async_pf_next_probe(key);
6221
6222         vcpu->arch.apf.gfns[key] = gfn;
6223 }
6224
6225 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6226 {
6227         int i;
6228         u32 key = kvm_async_pf_hash_fn(gfn);
6229
6230         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6231                      (vcpu->arch.apf.gfns[key] != gfn &&
6232                       vcpu->arch.apf.gfns[key] != ~0); i++)
6233                 key = kvm_async_pf_next_probe(key);
6234
6235         return key;
6236 }
6237
6238 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6239 {
6240         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6241 }
6242
6243 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6244 {
6245         u32 i, j, k;
6246
6247         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6248         while (true) {
6249                 vcpu->arch.apf.gfns[i] = ~0;
6250                 do {
6251                         j = kvm_async_pf_next_probe(j);
6252                         if (vcpu->arch.apf.gfns[j] == ~0)
6253                                 return;
6254                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6255                         /*
6256                          * k lies cyclically in ]i,j]
6257                          * |    i.k.j |
6258                          * |....j i.k.| or  |.k..j i...|
6259                          */
6260                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6261                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6262                 i = j;
6263         }
6264 }
6265
6266 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6267 {
6268
6269         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6270                                       sizeof(val));
6271 }
6272
6273 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6274                                      struct kvm_async_pf *work)
6275 {
6276         struct x86_exception fault;
6277
6278         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6279         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6280
6281         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6282             (vcpu->arch.apf.send_user_only &&
6283              kvm_x86_ops->get_cpl(vcpu) == 0))
6284                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6285         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6286                 fault.vector = PF_VECTOR;
6287                 fault.error_code_valid = true;
6288                 fault.error_code = 0;
6289                 fault.nested_page_fault = false;
6290                 fault.address = work->arch.token;
6291                 kvm_inject_page_fault(vcpu, &fault);
6292         }
6293 }
6294
6295 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6296                                  struct kvm_async_pf *work)
6297 {
6298         struct x86_exception fault;
6299
6300         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6301         if (is_error_page(work->page))
6302                 work->arch.token = ~0; /* broadcast wakeup */
6303         else
6304                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6305
6306         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6307             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6308                 fault.vector = PF_VECTOR;
6309                 fault.error_code_valid = true;
6310                 fault.error_code = 0;
6311                 fault.nested_page_fault = false;
6312                 fault.address = work->arch.token;
6313                 kvm_inject_page_fault(vcpu, &fault);
6314         }
6315         vcpu->arch.apf.halted = false;
6316 }
6317
6318 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6319 {
6320         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6321                 return true;
6322         else
6323                 return !kvm_event_needs_reinjection(vcpu) &&
6324                         kvm_x86_ops->interrupt_allowed(vcpu);
6325 }
6326
6327 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6328 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6329 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6330 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6331 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6332 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6333 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6334 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6335 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6336 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6337 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6338 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);