arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affilates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <trace/events/kvm.h>
  47
  48 #define CREATE_TRACE_POINTS
  49 #include "trace.h"
  50
  51 #include <asm/debugreg.h>
  52 #include <asm/msr.h>
  53 #include <asm/desc.h>
  54 #include <asm/mtrr.h>
  55 #include <asm/mce.h>
  56 #include <asm/i387.h>
  57 #include <asm/xcr.h>
  58 #include <asm/pvclock.h>
  59 #include <asm/div64.h>
  60
  61 #define MAX_IO_MSRS 256
  62 #define CR0_RESERVED_BITS                                               \
  63         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  64                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  65                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  66 #define CR4_RESERVED_BITS                                               \
  67         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  68                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  69                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  70                           | X86_CR4_OSXSAVE \
  71                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  72
  73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  74
  75 #define KVM_MAX_MCE_BANKS 32
  76 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  84 #else
  85 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  86 #endif
  87
  88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  90
  91 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  93                                     struct kvm_cpuid_entry2 __user *entries);
  94
  95 struct kvm_x86_ops *kvm_x86_ops;
  96 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  97
  98 int ignore_msrs = 0;
  99 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 100
 101 #define KVM_NR_SHARED_MSRS 16
 102
 103 struct kvm_shared_msrs_global {
 104         int nr;
 105         u32 msrs[KVM_NR_SHARED_MSRS];
 106 };
 107
 108 struct kvm_shared_msrs {
 109         struct user_return_notifier urn;
 110         bool registered;
 111         struct kvm_shared_msr_values {
 112                 u64 host;
 113                 u64 curr;
 114         } values[KVM_NR_SHARED_MSRS];
 115 };
 116
 117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 118 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 119
 120 struct kvm_stats_debugfs_item debugfs_entries[] = {
 121         { "pf_fixed", VCPU_STAT(pf_fixed) },
 122         { "pf_guest", VCPU_STAT(pf_guest) },
 123         { "tlb_flush", VCPU_STAT(tlb_flush) },
 124         { "invlpg", VCPU_STAT(invlpg) },
 125         { "exits", VCPU_STAT(exits) },
 126         { "io_exits", VCPU_STAT(io_exits) },
 127         { "mmio_exits", VCPU_STAT(mmio_exits) },
 128         { "signal_exits", VCPU_STAT(signal_exits) },
 129         { "irq_window", VCPU_STAT(irq_window_exits) },
 130         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 131         { "halt_exits", VCPU_STAT(halt_exits) },
 132         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 133         { "hypercalls", VCPU_STAT(hypercalls) },
 134         { "request_irq", VCPU_STAT(request_irq_exits) },
 135         { "irq_exits", VCPU_STAT(irq_exits) },
 136         { "host_state_reload", VCPU_STAT(host_state_reload) },
 137         { "efer_reload", VCPU_STAT(efer_reload) },
 138         { "fpu_reload", VCPU_STAT(fpu_reload) },
 139         { "insn_emulation", VCPU_STAT(insn_emulation) },
 140         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 141         { "irq_injections", VCPU_STAT(irq_injections) },
 142         { "nmi_injections", VCPU_STAT(nmi_injections) },
 143         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 144         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 145         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 146         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 147         { "mmu_flooded", VM_STAT(mmu_flooded) },
 148         { "mmu_recycled", VM_STAT(mmu_recycled) },
 149         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 150         { "mmu_unsync", VM_STAT(mmu_unsync) },
 151         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 152         { "largepages", VM_STAT(lpages) },
 153         { NULL }
 154 };
 155
 156 u64 __read_mostly host_xcr0;
 157
 158 static inline u32 bit(int bitno)
 159 {
 160         return 1 << (bitno & 31);
 161 }
 162
 163 static void kvm_on_user_return(struct user_return_notifier *urn)
 164 {
 165         unsigned slot;
 166         struct kvm_shared_msrs *locals
 167                 = container_of(urn, struct kvm_shared_msrs, urn);
 168         struct kvm_shared_msr_values *values;
 169
 170         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 171                 values = &locals->values[slot];
 172                 if (values->host != values->curr) {
 173                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 174                         values->curr = values->host;
 175                 }
 176         }
 177         locals->registered = false;
 178         user_return_notifier_unregister(urn);
 179 }
 180
 181 static void shared_msr_update(unsigned slot, u32 msr)
 182 {
 183         struct kvm_shared_msrs *smsr;
 184         u64 value;
 185
 186         smsr = &__get_cpu_var(shared_msrs);
 187         /* only read, and nobody should modify it at this time,
 188          * so don't need lock */
 189         if (slot >= shared_msrs_global.nr) {
 190                 printk(KERN_ERR "kvm: invalid MSR slot!");
 191                 return;
 192         }
 193         rdmsrl_safe(msr, &value);
 194         smsr->values[slot].host = value;
 195         smsr->values[slot].curr = value;
 196 }
 197
 198 void kvm_define_shared_msr(unsigned slot, u32 msr)
 199 {
 200         if (slot >= shared_msrs_global.nr)
 201                 shared_msrs_global.nr = slot + 1;
 202         shared_msrs_global.msrs[slot] = msr;
 203         /* we need ensured the shared_msr_global have been updated */
 204         smp_wmb();
 205 }
 206 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 207
 208 static void kvm_shared_msr_cpu_online(void)
 209 {
 210         unsigned i;
 211
 212         for (i = 0; i < shared_msrs_global.nr; ++i)
 213                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 214 }
 215
 216 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 217 {
 218         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 219
 220         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 221                 return;
 222         smsr->values[slot].curr = value;
 223         wrmsrl(shared_msrs_global.msrs[slot], value);
 224         if (!smsr->registered) {
 225                 smsr->urn.on_user_return = kvm_on_user_return;
 226                 user_return_notifier_register(&smsr->urn);
 227                 smsr->registered = true;
 228         }
 229 }
 230 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 231
 232 static void drop_user_return_notifiers(void *ignore)
 233 {
 234         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 235
 236         if (smsr->registered)
 237                 kvm_on_user_return(&smsr->urn);
 238 }
 239
 240 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 241 {
 242         if (irqchip_in_kernel(vcpu->kvm))
 243                 return vcpu->arch.apic_base;
 244         else
 245                 return vcpu->arch.apic_base;
 246 }
 247 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 248
 249 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 250 {
 251         /* TODO: reserve bits check */
 252         if (irqchip_in_kernel(vcpu->kvm))
 253                 kvm_lapic_set_base(vcpu, data);
 254         else
 255                 vcpu->arch.apic_base = data;
 256 }
 257 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 258
 259 #define EXCPT_BENIGN            0
 260 #define EXCPT_CONTRIBUTORY      1
 261 #define EXCPT_PF                2
 262
 263 static int exception_class(int vector)
 264 {
 265         switch (vector) {
 266         case PF_VECTOR:
 267                 return EXCPT_PF;
 268         case DE_VECTOR:
 269         case TS_VECTOR:
 270         case NP_VECTOR:
 271         case SS_VECTOR:
 272         case GP_VECTOR:
 273                 return EXCPT_CONTRIBUTORY;
 274         default:
 275                 break;
 276         }
 277         return EXCPT_BENIGN;
 278 }
 279
 280 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 281                 unsigned nr, bool has_error, u32 error_code,
 282                 bool reinject)
 283 {
 284         u32 prev_nr;
 285         int class1, class2;
 286
 287         if (!vcpu->arch.exception.pending) {
 288         queue:
 289                 vcpu->arch.exception.pending = true;
 290                 vcpu->arch.exception.has_error_code = has_error;
 291                 vcpu->arch.exception.nr = nr;
 292                 vcpu->arch.exception.error_code = error_code;
 293                 vcpu->arch.exception.reinject = reinject;
 294                 return;
 295         }
 296
 297         /* to check exception */
 298         prev_nr = vcpu->arch.exception.nr;
 299         if (prev_nr == DF_VECTOR) {
 300                 /* triple fault -> shutdown */
 301                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 302                 return;
 303         }
 304         class1 = exception_class(prev_nr);
 305         class2 = exception_class(nr);
 306         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 307                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 308                 /* generate double fault per SDM Table 5-5 */
 309                 vcpu->arch.exception.pending = true;
 310                 vcpu->arch.exception.has_error_code = true;
 311                 vcpu->arch.exception.nr = DF_VECTOR;
 312                 vcpu->arch.exception.error_code = 0;
 313         } else
 314                 /* replace previous exception with a new one in a hope
 315                    that instruction re-execution will regenerate lost
 316                    exception */
 317                 goto queue;
 318 }
 319
 320 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 321 {
 322         kvm_multiple_exception(vcpu, nr, false, 0, false);
 323 }
 324 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 325
 326 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 327 {
 328         kvm_multiple_exception(vcpu, nr, false, 0, true);
 329 }
 330 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 331
 332 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
 333 {
 334         unsigned error_code = vcpu->arch.fault.error_code;
 335
 336         ++vcpu->stat.pf_guest;
 337         vcpu->arch.cr2 = vcpu->arch.fault.address;
 338         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 339 }
 340
 341 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 342 {
 343         vcpu->arch.nmi_pending = 1;
 344 }
 345 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 346
 347 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 348 {
 349         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 350 }
 351 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 352
 353 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 354 {
 355         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 356 }
 357 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 358
 359 /*
 360  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 361  * a #GP and return false.
 362  */
 363 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 364 {
 365         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 366                 return true;
 367         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 368         return false;
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 371
 372 /*
 373  * This function will be used to read from the physical memory of the currently
 374  * running guest. The difference to kvm_read_guest_page is that this function
 375  * can read from guest physical or from the guest's guest physical memory.
 376  */
 377 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 378                             gfn_t ngfn, void *data, int offset, int len,
 379                             u32 access)
 380 {
 381         gfn_t real_gfn;
 382         gpa_t ngpa;
 383
 384         ngpa     = gfn_to_gpa(ngfn);
 385         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 386         if (real_gfn == UNMAPPED_GVA)
 387                 return -EFAULT;
 388
 389         real_gfn = gpa_to_gfn(real_gfn);
 390
 391         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 392 }
 393 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 394
 395 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 396                                void *data, int offset, int len, u32 access)
 397 {
 398         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 399                                        data, offset, len, access);
 400 }
 401
 402 /*
 403  * Load the pae pdptrs.  Return true is they are all valid.
 404  */
 405 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 406 {
 407         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 408         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 409         int i;
 410         int ret;
 411         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 412
 413         ret = kvm_read_nested_guest_page(vcpu, pdpt_gfn, pdpte,
 414                                          offset * sizeof(u64), sizeof(pdpte),
 415                                          PFERR_USER_MASK|PFERR_WRITE_MASK);
 416         if (ret < 0) {
 417                 ret = 0;
 418                 goto out;
 419         }
 420         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 421                 if (is_present_gpte(pdpte[i]) &&
 422                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 423                         ret = 0;
 424                         goto out;
 425                 }
 426         }
 427         ret = 1;
 428
 429         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 430         __set_bit(VCPU_EXREG_PDPTR,
 431                   (unsigned long *)&vcpu->arch.regs_avail);
 432         __set_bit(VCPU_EXREG_PDPTR,
 433                   (unsigned long *)&vcpu->arch.regs_dirty);
 434 out:
 435
 436         return ret;
 437 }
 438 EXPORT_SYMBOL_GPL(load_pdptrs);
 439
 440 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 441 {
 442         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 443         bool changed = true;
 444         int offset;
 445         gfn_t gfn;
 446         int r;
 447
 448         if (is_long_mode(vcpu) || !is_pae(vcpu))
 449                 return false;
 450
 451         if (!test_bit(VCPU_EXREG_PDPTR,
 452                       (unsigned long *)&vcpu->arch.regs_avail))
 453                 return true;
 454
 455         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
 456         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
 457         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 458                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 459         if (r < 0)
 460                 goto out;
 461         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 462 out:
 463
 464         return changed;
 465 }
 466
 467 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 468 {
 469         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 470         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 471                                     X86_CR0_CD | X86_CR0_NW;
 472
 473         cr0 |= X86_CR0_ET;
 474
 475 #ifdef CONFIG_X86_64
 476         if (cr0 & 0xffffffff00000000UL)
 477                 return 1;
 478 #endif
 479
 480         cr0 &= ~CR0_RESERVED_BITS;
 481
 482         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 483                 return 1;
 484
 485         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 486                 return 1;
 487
 488         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 489 #ifdef CONFIG_X86_64
 490                 if ((vcpu->arch.efer & EFER_LME)) {
 491                         int cs_db, cs_l;
 492
 493                         if (!is_pae(vcpu))
 494                                 return 1;
 495                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 496                         if (cs_l)
 497                                 return 1;
 498                 } else
 499 #endif
 500                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
 501                         return 1;
 502         }
 503
 504         kvm_x86_ops->set_cr0(vcpu, cr0);
 505
 506         if ((cr0 ^ old_cr0) & update_bits)
 507                 kvm_mmu_reset_context(vcpu);
 508         return 0;
 509 }
 510 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 511
 512 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 513 {
 514         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 515 }
 516 EXPORT_SYMBOL_GPL(kvm_lmsw);
 517
 518 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 519 {
 520         u64 xcr0;
 521
 522         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 523         if (index != XCR_XFEATURE_ENABLED_MASK)
 524                 return 1;
 525         xcr0 = xcr;
 526         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 527                 return 1;
 528         if (!(xcr0 & XSTATE_FP))
 529                 return 1;
 530         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 531                 return 1;
 532         if (xcr0 & ~host_xcr0)
 533                 return 1;
 534         vcpu->arch.xcr0 = xcr0;
 535         vcpu->guest_xcr0_loaded = 0;
 536         return 0;
 537 }
 538
 539 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 540 {
 541         if (__kvm_set_xcr(vcpu, index, xcr)) {
 542                 kvm_inject_gp(vcpu, 0);
 543                 return 1;
 544         }
 545         return 0;
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 548
 549 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 550 {
 551         struct kvm_cpuid_entry2 *best;
 552
 553         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 554         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 555 }
 556
 557 static void update_cpuid(struct kvm_vcpu *vcpu)
 558 {
 559         struct kvm_cpuid_entry2 *best;
 560
 561         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 562         if (!best)
 563                 return;
 564
 565         /* Update OSXSAVE bit */
 566         if (cpu_has_xsave && best->function == 0x1) {
 567                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 568                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 569                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 570         }
 571 }
 572
 573 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 574 {
 575         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 576         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 577
 578         if (cr4 & CR4_RESERVED_BITS)
 579                 return 1;
 580
 581         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 582                 return 1;
 583
 584         if (is_long_mode(vcpu)) {
 585                 if (!(cr4 & X86_CR4_PAE))
 586                         return 1;
 587         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 588                    && ((cr4 ^ old_cr4) & pdptr_bits)
 589                    && !load_pdptrs(vcpu, vcpu->arch.cr3))
 590                 return 1;
 591
 592         if (cr4 & X86_CR4_VMXE)
 593                 return 1;
 594
 595         kvm_x86_ops->set_cr4(vcpu, cr4);
 596
 597         if ((cr4 ^ old_cr4) & pdptr_bits)
 598                 kvm_mmu_reset_context(vcpu);
 599
 600         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 601                 update_cpuid(vcpu);
 602
 603         return 0;
 604 }
 605 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 606
 607 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 608 {
 609         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 610                 kvm_mmu_sync_roots(vcpu);
 611                 kvm_mmu_flush_tlb(vcpu);
 612                 return 0;
 613         }
 614
 615         if (is_long_mode(vcpu)) {
 616                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 617                         return 1;
 618         } else {
 619                 if (is_pae(vcpu)) {
 620                         if (cr3 & CR3_PAE_RESERVED_BITS)
 621                                 return 1;
 622                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
 623                                 return 1;
 624                 }
 625                 /*
 626                  * We don't check reserved bits in nonpae mode, because
 627                  * this isn't enforced, and VMware depends on this.
 628                  */
 629         }
 630
 631         /*
 632          * Does the new cr3 value map to physical memory? (Note, we
 633          * catch an invalid cr3 even in real-mode, because it would
 634          * cause trouble later on when we turn on paging anyway.)
 635          *
 636          * A real CPU would silently accept an invalid cr3 and would
 637          * attempt to use it - with largely undefined (and often hard
 638          * to debug) behavior on the guest side.
 639          */
 640         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 641                 return 1;
 642         vcpu->arch.cr3 = cr3;
 643         vcpu->arch.mmu.new_cr3(vcpu);
 644         return 0;
 645 }
 646 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 647
 648 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 649 {
 650         if (cr8 & CR8_RESERVED_BITS)
 651                 return 1;
 652         if (irqchip_in_kernel(vcpu->kvm))
 653                 kvm_lapic_set_tpr(vcpu, cr8);
 654         else
 655                 vcpu->arch.cr8 = cr8;
 656         return 0;
 657 }
 658
 659 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 660 {
 661         if (__kvm_set_cr8(vcpu, cr8))
 662                 kvm_inject_gp(vcpu, 0);
 663 }
 664 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 665
 666 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 667 {
 668         if (irqchip_in_kernel(vcpu->kvm))
 669                 return kvm_lapic_get_cr8(vcpu);
 670         else
 671                 return vcpu->arch.cr8;
 672 }
 673 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 674
 675 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 676 {
 677         switch (dr) {
 678         case 0 ... 3:
 679                 vcpu->arch.db[dr] = val;
 680                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 681                         vcpu->arch.eff_db[dr] = val;
 682                 break;
 683         case 4:
 684                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 685                         return 1; /* #UD */
 686                 /* fall through */
 687         case 6:
 688                 if (val & 0xffffffff00000000ULL)
 689                         return -1; /* #GP */
 690                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 691                 break;
 692         case 5:
 693                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 694                         return 1; /* #UD */
 695                 /* fall through */
 696         default: /* 7 */
 697                 if (val & 0xffffffff00000000ULL)
 698                         return -1; /* #GP */
 699                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 700                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 701                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 702                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 703                 }
 704                 break;
 705         }
 706
 707         return 0;
 708 }
 709
 710 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 711 {
 712         int res;
 713
 714         res = __kvm_set_dr(vcpu, dr, val);
 715         if (res > 0)
 716                 kvm_queue_exception(vcpu, UD_VECTOR);
 717         else if (res < 0)
 718                 kvm_inject_gp(vcpu, 0);
 719
 720         return res;
 721 }
 722 EXPORT_SYMBOL_GPL(kvm_set_dr);
 723
 724 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 725 {
 726         switch (dr) {
 727         case 0 ... 3:
 728                 *val = vcpu->arch.db[dr];
 729                 break;
 730         case 4:
 731                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 732                         return 1;
 733                 /* fall through */
 734         case 6:
 735                 *val = vcpu->arch.dr6;
 736                 break;
 737         case 5:
 738                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 739                         return 1;
 740                 /* fall through */
 741         default: /* 7 */
 742                 *val = vcpu->arch.dr7;
 743                 break;
 744         }
 745
 746         return 0;
 747 }
 748
 749 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 750 {
 751         if (_kvm_get_dr(vcpu, dr, val)) {
 752                 kvm_queue_exception(vcpu, UD_VECTOR);
 753                 return 1;
 754         }
 755         return 0;
 756 }
 757 EXPORT_SYMBOL_GPL(kvm_get_dr);
 758
 759 /*
 760  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 761  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 762  *
 763  * This list is modified at module load time to reflect the
 764  * capabilities of the host cpu. This capabilities test skips MSRs that are
 765  * kvm-specific. Those are put in the beginning of the list.
 766  */
 767
 768 #define KVM_SAVE_MSRS_BEGIN     7
 769 static u32 msrs_to_save[] = {
 770         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 771         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 772         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 773         HV_X64_MSR_APIC_ASSIST_PAGE,
 774         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 775         MSR_STAR,
 776 #ifdef CONFIG_X86_64
 777         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 778 #endif
 779         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 780 };
 781
 782 static unsigned num_msrs_to_save;
 783
 784 static u32 emulated_msrs[] = {
 785         MSR_IA32_MISC_ENABLE,
 786         MSR_IA32_MCG_STATUS,
 787         MSR_IA32_MCG_CTL,
 788 };
 789
 790 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 791 {
 792         u64 old_efer = vcpu->arch.efer;
 793
 794         if (efer & efer_reserved_bits)
 795                 return 1;
 796
 797         if (is_paging(vcpu)
 798             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 799                 return 1;
 800
 801         if (efer & EFER_FFXSR) {
 802                 struct kvm_cpuid_entry2 *feat;
 803
 804                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 805                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 806                         return 1;
 807         }
 808
 809         if (efer & EFER_SVME) {
 810                 struct kvm_cpuid_entry2 *feat;
 811
 812                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 813                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 814                         return 1;
 815         }
 816
 817         efer &= ~EFER_LMA;
 818         efer |= vcpu->arch.efer & EFER_LMA;
 819
 820         kvm_x86_ops->set_efer(vcpu, efer);
 821
 822         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 823         kvm_mmu_reset_context(vcpu);
 824
 825         /* Update reserved bits */
 826         if ((efer ^ old_efer) & EFER_NX)
 827                 kvm_mmu_reset_context(vcpu);
 828
 829         return 0;
 830 }
 831
 832 void kvm_enable_efer_bits(u64 mask)
 833 {
 834        efer_reserved_bits &= ~mask;
 835 }
 836 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 837
 838
 839 /*
 840  * Writes msr value into into the appropriate "register".
 841  * Returns 0 on success, non-0 otherwise.
 842  * Assumes vcpu_load() was already called.
 843  */
 844 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 845 {
 846         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 847 }
 848
 849 /*
 850  * Adapt set_msr() to msr_io()'s calling convention
 851  */
 852 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 853 {
 854         return kvm_set_msr(vcpu, index, *data);
 855 }
 856
 857 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 858 {
 859         int version;
 860         int r;
 861         struct pvclock_wall_clock wc;
 862         struct timespec boot;
 863
 864         if (!wall_clock)
 865                 return;
 866
 867         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 868         if (r)
 869                 return;
 870
 871         if (version & 1)
 872                 ++version;  /* first time write, random junk */
 873
 874         ++version;
 875
 876         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 877
 878         /*
 879          * The guest calculates current wall clock time by adding
 880          * system time (updated by kvm_write_guest_time below) to the
 881          * wall clock specified here.  guest system time equals host
 882          * system time for us, thus we must fill in host boot time here.
 883          */
 884         getboottime(&boot);
 885
 886         wc.sec = boot.tv_sec;
 887         wc.nsec = boot.tv_nsec;
 888         wc.version = version;
 889
 890         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 891
 892         version++;
 893         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 894 }
 895
 896 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 897 {
 898         uint32_t quotient, remainder;
 899
 900         /* Don't try to replace with do_div(), this one calculates
 901          * "(dividend << 32) / divisor" */
 902         __asm__ ( "divl %4"
 903                   : "=a" (quotient), "=d" (remainder)
 904                   : "0" (0), "1" (dividend), "r" (divisor) );
 905         return quotient;
 906 }
 907
 908 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 909 {
 910         uint64_t nsecs = 1000000000LL;
 911         int32_t  shift = 0;
 912         uint64_t tps64;
 913         uint32_t tps32;
 914
 915         tps64 = tsc_khz * 1000LL;
 916         while (tps64 > nsecs*2) {
 917                 tps64 >>= 1;
 918                 shift--;
 919         }
 920
 921         tps32 = (uint32_t)tps64;
 922         while (tps32 <= (uint32_t)nsecs) {
 923                 tps32 <<= 1;
 924                 shift++;
 925         }
 926
 927         hv_clock->tsc_shift = shift;
 928         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 929
 930         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 931                  __func__, tsc_khz, hv_clock->tsc_shift,
 932                  hv_clock->tsc_to_system_mul);
 933 }
 934
 935 static inline u64 get_kernel_ns(void)
 936 {
 937         struct timespec ts;
 938
 939         WARN_ON(preemptible());
 940         ktime_get_ts(&ts);
 941         monotonic_to_bootbased(&ts);
 942         return timespec_to_ns(&ts);
 943 }
 944
 945 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 946
 947 static inline int kvm_tsc_changes_freq(void)
 948 {
 949         int cpu = get_cpu();
 950         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 951                   cpufreq_quick_get(cpu) != 0;
 952         put_cpu();
 953         return ret;
 954 }
 955
 956 static inline u64 nsec_to_cycles(u64 nsec)
 957 {
 958         u64 ret;
 959
 960         WARN_ON(preemptible());
 961         if (kvm_tsc_changes_freq())
 962                 printk_once(KERN_WARNING
 963                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 964         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 965         do_div(ret, USEC_PER_SEC);
 966         return ret;
 967 }
 968
 969 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
 970 {
 971         struct kvm *kvm = vcpu->kvm;
 972         u64 offset, ns, elapsed;
 973         unsigned long flags;
 974         s64 sdiff;
 975
 976         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
 977         offset = data - native_read_tsc();
 978         ns = get_kernel_ns();
 979         elapsed = ns - kvm->arch.last_tsc_nsec;
 980         sdiff = data - kvm->arch.last_tsc_write;
 981         if (sdiff < 0)
 982                 sdiff = -sdiff;
 983
 984         /*
 985          * Special case: close write to TSC within 5 seconds of
 986          * another CPU is interpreted as an attempt to synchronize
 987          * The 5 seconds is to accomodate host load / swapping as
 988          * well as any reset of TSC during the boot process.
 989          *
 990          * In that case, for a reliable TSC, we can match TSC offsets,
 991          * or make a best guest using elapsed value.
 992          */
 993         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
 994             elapsed < 5ULL * NSEC_PER_SEC) {
 995                 if (!check_tsc_unstable()) {
 996                         offset = kvm->arch.last_tsc_offset;
 997                         pr_debug("kvm: matched tsc offset for %llu\n", data);
 998                 } else {
 999                         u64 delta = nsec_to_cycles(elapsed);
1000                         offset += delta;
1001                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1002                 }
1003                 ns = kvm->arch.last_tsc_nsec;
1004         }
1005         kvm->arch.last_tsc_nsec = ns;
1006         kvm->arch.last_tsc_write = data;
1007         kvm->arch.last_tsc_offset = offset;
1008         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1009         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1010
1011         /* Reset of TSC must disable overshoot protection below */
1012         vcpu->arch.hv_clock.tsc_timestamp = 0;
1013 }
1014 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1015
1016 static int kvm_write_guest_time(struct kvm_vcpu *v)
1017 {
1018         unsigned long flags;
1019         struct kvm_vcpu_arch *vcpu = &v->arch;
1020         void *shared_kaddr;
1021         unsigned long this_tsc_khz;
1022         s64 kernel_ns, max_kernel_ns;
1023         u64 tsc_timestamp;
1024
1025         if ((!vcpu->time_page))
1026                 return 0;
1027
1028         /* Keep irq disabled to prevent changes to the clock */
1029         local_irq_save(flags);
1030         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1031         kernel_ns = get_kernel_ns();
1032         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1033         local_irq_restore(flags);
1034
1035         if (unlikely(this_tsc_khz == 0)) {
1036                 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1037                 return 1;
1038         }
1039
1040         /*
1041          * Time as measured by the TSC may go backwards when resetting the base
1042          * tsc_timestamp.  The reason for this is that the TSC resolution is
1043          * higher than the resolution of the other clock scales.  Thus, many
1044          * possible measurments of the TSC correspond to one measurement of any
1045          * other clock, and so a spread of values is possible.  This is not a
1046          * problem for the computation of the nanosecond clock; with TSC rates
1047          * around 1GHZ, there can only be a few cycles which correspond to one
1048          * nanosecond value, and any path through this code will inevitably
1049          * take longer than that.  However, with the kernel_ns value itself,
1050          * the precision may be much lower, down to HZ granularity.  If the
1051          * first sampling of TSC against kernel_ns ends in the low part of the
1052          * range, and the second in the high end of the range, we can get:
1053          *
1054          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1055          *
1056          * As the sampling errors potentially range in the thousands of cycles,
1057          * it is possible such a time value has already been observed by the
1058          * guest.  To protect against this, we must compute the system time as
1059          * observed by the guest and ensure the new system time is greater.
1060          */
1061         max_kernel_ns = 0;
1062         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1063                 max_kernel_ns = vcpu->last_guest_tsc -
1064                                 vcpu->hv_clock.tsc_timestamp;
1065                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1066                                     vcpu->hv_clock.tsc_to_system_mul,
1067                                     vcpu->hv_clock.tsc_shift);
1068                 max_kernel_ns += vcpu->last_kernel_ns;
1069         }
1070
1071         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1072                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
1073                 vcpu->hw_tsc_khz = this_tsc_khz;
1074         }
1075
1076         if (max_kernel_ns > kernel_ns)
1077                 kernel_ns = max_kernel_ns;
1078
1079         /* With all the info we got, fill in the values */
1080         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1081         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1082         vcpu->last_kernel_ns = kernel_ns;
1083         vcpu->hv_clock.flags = 0;
1084
1085         /*
1086          * The interface expects us to write an even number signaling that the
1087          * update is finished. Since the guest won't see the intermediate
1088          * state, we just increase by 2 at the end.
1089          */
1090         vcpu->hv_clock.version += 2;
1091
1092         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1093
1094         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1095                sizeof(vcpu->hv_clock));
1096
1097         kunmap_atomic(shared_kaddr, KM_USER0);
1098
1099         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1100         return 0;
1101 }
1102
1103 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
1104 {
1105         struct kvm_vcpu_arch *vcpu = &v->arch;
1106
1107         if (!vcpu->time_page)
1108                 return 0;
1109         kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1110         return 1;
1111 }
1112
1113 static bool msr_mtrr_valid(unsigned msr)
1114 {
1115         switch (msr) {
1116         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1117         case MSR_MTRRfix64K_00000:
1118         case MSR_MTRRfix16K_80000:
1119         case MSR_MTRRfix16K_A0000:
1120         case MSR_MTRRfix4K_C0000:
1121         case MSR_MTRRfix4K_C8000:
1122         case MSR_MTRRfix4K_D0000:
1123         case MSR_MTRRfix4K_D8000:
1124         case MSR_MTRRfix4K_E0000:
1125         case MSR_MTRRfix4K_E8000:
1126         case MSR_MTRRfix4K_F0000:
1127         case MSR_MTRRfix4K_F8000:
1128         case MSR_MTRRdefType:
1129         case MSR_IA32_CR_PAT:
1130                 return true;
1131         case 0x2f8:
1132                 return true;
1133         }
1134         return false;
1135 }
1136
1137 static bool valid_pat_type(unsigned t)
1138 {
1139         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1140 }
1141
1142 static bool valid_mtrr_type(unsigned t)
1143 {
1144         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1145 }
1146
1147 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1148 {
1149         int i;
1150
1151         if (!msr_mtrr_valid(msr))
1152                 return false;
1153
1154         if (msr == MSR_IA32_CR_PAT) {
1155                 for (i = 0; i < 8; i++)
1156                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1157                                 return false;
1158                 return true;
1159         } else if (msr == MSR_MTRRdefType) {
1160                 if (data & ~0xcff)
1161                         return false;
1162                 return valid_mtrr_type(data & 0xff);
1163         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1164                 for (i = 0; i < 8 ; i++)
1165                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1166                                 return false;
1167                 return true;
1168         }
1169
1170         /* variable MTRRs */
1171         return valid_mtrr_type(data & 0xff);
1172 }
1173
1174 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1175 {
1176         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1177
1178         if (!mtrr_valid(vcpu, msr, data))
1179                 return 1;
1180
1181         if (msr == MSR_MTRRdefType) {
1182                 vcpu->arch.mtrr_state.def_type = data;
1183                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1184         } else if (msr == MSR_MTRRfix64K_00000)
1185                 p[0] = data;
1186         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1187                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1188         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1189                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1190         else if (msr == MSR_IA32_CR_PAT)
1191                 vcpu->arch.pat = data;
1192         else {  /* Variable MTRRs */
1193                 int idx, is_mtrr_mask;
1194                 u64 *pt;
1195
1196                 idx = (msr - 0x200) / 2;
1197                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1198                 if (!is_mtrr_mask)
1199                         pt =
1200                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1201                 else
1202                         pt =
1203                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1204                 *pt = data;
1205         }
1206
1207         kvm_mmu_reset_context(vcpu);
1208         return 0;
1209 }
1210
1211 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1212 {
1213         u64 mcg_cap = vcpu->arch.mcg_cap;
1214         unsigned bank_num = mcg_cap & 0xff;
1215
1216         switch (msr) {
1217         case MSR_IA32_MCG_STATUS:
1218                 vcpu->arch.mcg_status = data;
1219                 break;
1220         case MSR_IA32_MCG_CTL:
1221                 if (!(mcg_cap & MCG_CTL_P))
1222                         return 1;
1223                 if (data != 0 && data != ~(u64)0)
1224                         return -1;
1225                 vcpu->arch.mcg_ctl = data;
1226                 break;
1227         default:
1228                 if (msr >= MSR_IA32_MC0_CTL &&
1229                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1230                         u32 offset = msr - MSR_IA32_MC0_CTL;
1231                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1232                          * some Linux kernels though clear bit 10 in bank 4 to
1233                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1234                          * this to avoid an uncatched #GP in the guest
1235                          */
1236                         if ((offset & 0x3) == 0 &&
1237                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1238                                 return -1;
1239                         vcpu->arch.mce_banks[offset] = data;
1240                         break;
1241                 }
1242                 return 1;
1243         }
1244         return 0;
1245 }
1246
1247 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1248 {
1249         struct kvm *kvm = vcpu->kvm;
1250         int lm = is_long_mode(vcpu);
1251         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1252                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1253         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1254                 : kvm->arch.xen_hvm_config.blob_size_32;
1255         u32 page_num = data & ~PAGE_MASK;
1256         u64 page_addr = data & PAGE_MASK;
1257         u8 *page;
1258         int r;
1259
1260         r = -E2BIG;
1261         if (page_num >= blob_size)
1262                 goto out;
1263         r = -ENOMEM;
1264         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1265         if (!page)
1266                 goto out;
1267         r = -EFAULT;
1268         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1269                 goto out_free;
1270         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1271                 goto out_free;
1272         r = 0;
1273 out_free:
1274         kfree(page);
1275 out:
1276         return r;
1277 }
1278
1279 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1280 {
1281         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1282 }
1283
1284 static bool kvm_hv_msr_partition_wide(u32 msr)
1285 {
1286         bool r = false;
1287         switch (msr) {
1288         case HV_X64_MSR_GUEST_OS_ID:
1289         case HV_X64_MSR_HYPERCALL:
1290                 r = true;
1291                 break;
1292         }
1293
1294         return r;
1295 }
1296
1297 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1298 {
1299         struct kvm *kvm = vcpu->kvm;
1300
1301         switch (msr) {
1302         case HV_X64_MSR_GUEST_OS_ID:
1303                 kvm->arch.hv_guest_os_id = data;
1304                 /* setting guest os id to zero disables hypercall page */
1305                 if (!kvm->arch.hv_guest_os_id)
1306                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1307                 break;
1308         case HV_X64_MSR_HYPERCALL: {
1309                 u64 gfn;
1310                 unsigned long addr;
1311                 u8 instructions[4];
1312
1313                 /* if guest os id is not set hypercall should remain disabled */
1314                 if (!kvm->arch.hv_guest_os_id)
1315                         break;
1316                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1317                         kvm->arch.hv_hypercall = data;
1318                         break;
1319                 }
1320                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1321                 addr = gfn_to_hva(kvm, gfn);
1322                 if (kvm_is_error_hva(addr))
1323                         return 1;
1324                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1325                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1326                 if (copy_to_user((void __user *)addr, instructions, 4))
1327                         return 1;
1328                 kvm->arch.hv_hypercall = data;
1329                 break;
1330         }
1331         default:
1332                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1333                           "data 0x%llx\n", msr, data);
1334                 return 1;
1335         }
1336         return 0;
1337 }
1338
1339 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1340 {
1341         switch (msr) {
1342         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1343                 unsigned long addr;
1344
1345                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1346                         vcpu->arch.hv_vapic = data;
1347                         break;
1348                 }
1349                 addr = gfn_to_hva(vcpu->kvm, data >>
1350                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1351                 if (kvm_is_error_hva(addr))
1352                         return 1;
1353                 if (clear_user((void __user *)addr, PAGE_SIZE))
1354                         return 1;
1355                 vcpu->arch.hv_vapic = data;
1356                 break;
1357         }
1358         case HV_X64_MSR_EOI:
1359                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1360         case HV_X64_MSR_ICR:
1361                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1362         case HV_X64_MSR_TPR:
1363                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1364         default:
1365                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1366                           "data 0x%llx\n", msr, data);
1367                 return 1;
1368         }
1369
1370         return 0;
1371 }
1372
1373 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1374 {
1375         switch (msr) {
1376         case MSR_EFER:
1377                 return set_efer(vcpu, data);
1378         case MSR_K7_HWCR:
1379                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1380                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1381                 if (data != 0) {
1382                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1383                                 data);
1384                         return 1;
1385                 }
1386                 break;
1387         case MSR_FAM10H_MMIO_CONF_BASE:
1388                 if (data != 0) {
1389                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1390                                 "0x%llx\n", data);
1391                         return 1;
1392                 }
1393                 break;
1394         case MSR_AMD64_NB_CFG:
1395                 break;
1396         case MSR_IA32_DEBUGCTLMSR:
1397                 if (!data) {
1398                         /* We support the non-activated case already */
1399                         break;
1400                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1401                         /* Values other than LBR and BTF are vendor-specific,
1402                            thus reserved and should throw a #GP */
1403                         return 1;
1404                 }
1405                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1406                         __func__, data);
1407                 break;
1408         case MSR_IA32_UCODE_REV:
1409         case MSR_IA32_UCODE_WRITE:
1410         case MSR_VM_HSAVE_PA:
1411         case MSR_AMD64_PATCH_LOADER:
1412                 break;
1413         case 0x200 ... 0x2ff:
1414                 return set_msr_mtrr(vcpu, msr, data);
1415         case MSR_IA32_APICBASE:
1416                 kvm_set_apic_base(vcpu, data);
1417                 break;
1418         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1419                 return kvm_x2apic_msr_write(vcpu, msr, data);
1420         case MSR_IA32_MISC_ENABLE:
1421                 vcpu->arch.ia32_misc_enable_msr = data;
1422                 break;
1423         case MSR_KVM_WALL_CLOCK_NEW:
1424         case MSR_KVM_WALL_CLOCK:
1425                 vcpu->kvm->arch.wall_clock = data;
1426                 kvm_write_wall_clock(vcpu->kvm, data);
1427                 break;
1428         case MSR_KVM_SYSTEM_TIME_NEW:
1429         case MSR_KVM_SYSTEM_TIME: {
1430                 if (vcpu->arch.time_page) {
1431                         kvm_release_page_dirty(vcpu->arch.time_page);
1432                         vcpu->arch.time_page = NULL;
1433                 }
1434
1435                 vcpu->arch.time = data;
1436
1437                 /* we verify if the enable bit is set... */
1438                 if (!(data & 1))
1439                         break;
1440
1441                 /* ...but clean it before doing the actual write */
1442                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1443
1444                 vcpu->arch.time_page =
1445                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1446
1447                 if (is_error_page(vcpu->arch.time_page)) {
1448                         kvm_release_page_clean(vcpu->arch.time_page);
1449                         vcpu->arch.time_page = NULL;
1450                 }
1451
1452                 kvm_request_guest_time_update(vcpu);
1453                 break;
1454         }
1455         case MSR_IA32_MCG_CTL:
1456         case MSR_IA32_MCG_STATUS:
1457         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1458                 return set_msr_mce(vcpu, msr, data);
1459
1460         /* Performance counters are not protected by a CPUID bit,
1461          * so we should check all of them in the generic path for the sake of
1462          * cross vendor migration.
1463          * Writing a zero into the event select MSRs disables them,
1464          * which we perfectly emulate ;-). Any other value should be at least
1465          * reported, some guests depend on them.
1466          */
1467         case MSR_P6_EVNTSEL0:
1468         case MSR_P6_EVNTSEL1:
1469         case MSR_K7_EVNTSEL0:
1470         case MSR_K7_EVNTSEL1:
1471         case MSR_K7_EVNTSEL2:
1472         case MSR_K7_EVNTSEL3:
1473                 if (data != 0)
1474                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1475                                 "0x%x data 0x%llx\n", msr, data);
1476                 break;
1477         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1478          * so we ignore writes to make it happy.
1479          */
1480         case MSR_P6_PERFCTR0:
1481         case MSR_P6_PERFCTR1:
1482         case MSR_K7_PERFCTR0:
1483         case MSR_K7_PERFCTR1:
1484         case MSR_K7_PERFCTR2:
1485         case MSR_K7_PERFCTR3:
1486                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1487                         "0x%x data 0x%llx\n", msr, data);
1488                 break;
1489         case MSR_K7_CLK_CTL:
1490                 /*
1491                  * Ignore all writes to this no longer documented MSR.
1492                  * Writes are only relevant for old K7 processors,
1493                  * all pre-dating SVM, but a recommended workaround from
1494                  * AMD for these chips. It is possible to speicify the
1495                  * affected processor models on the command line, hence
1496                  * the need to ignore the workaround.
1497                  */
1498                 break;
1499         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1500                 if (kvm_hv_msr_partition_wide(msr)) {
1501                         int r;
1502                         mutex_lock(&vcpu->kvm->lock);
1503                         r = set_msr_hyperv_pw(vcpu, msr, data);
1504                         mutex_unlock(&vcpu->kvm->lock);
1505                         return r;
1506                 } else
1507                         return set_msr_hyperv(vcpu, msr, data);
1508                 break;
1509         default:
1510                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1511                         return xen_hvm_config(vcpu, data);
1512                 if (!ignore_msrs) {
1513                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1514                                 msr, data);
1515                         return 1;
1516                 } else {
1517                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1518                                 msr, data);
1519                         break;
1520                 }
1521         }
1522         return 0;
1523 }
1524 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1525
1526
1527 /*
1528  * Reads an msr value (of 'msr_index') into 'pdata'.
1529  * Returns 0 on success, non-0 otherwise.
1530  * Assumes vcpu_load() was already called.
1531  */
1532 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1533 {
1534         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1535 }
1536
1537 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1538 {
1539         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1540
1541         if (!msr_mtrr_valid(msr))
1542                 return 1;
1543
1544         if (msr == MSR_MTRRdefType)
1545                 *pdata = vcpu->arch.mtrr_state.def_type +
1546                          (vcpu->arch.mtrr_state.enabled << 10);
1547         else if (msr == MSR_MTRRfix64K_00000)
1548                 *pdata = p[0];
1549         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1550                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1551         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1552                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1553         else if (msr == MSR_IA32_CR_PAT)
1554                 *pdata = vcpu->arch.pat;
1555         else {  /* Variable MTRRs */
1556                 int idx, is_mtrr_mask;
1557                 u64 *pt;
1558
1559                 idx = (msr - 0x200) / 2;
1560                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1561                 if (!is_mtrr_mask)
1562                         pt =
1563                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1564                 else
1565                         pt =
1566                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1567                 *pdata = *pt;
1568         }
1569
1570         return 0;
1571 }
1572
1573 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1574 {
1575         u64 data;
1576         u64 mcg_cap = vcpu->arch.mcg_cap;
1577         unsigned bank_num = mcg_cap & 0xff;
1578
1579         switch (msr) {
1580         case MSR_IA32_P5_MC_ADDR:
1581         case MSR_IA32_P5_MC_TYPE:
1582                 data = 0;
1583                 break;
1584         case MSR_IA32_MCG_CAP:
1585                 data = vcpu->arch.mcg_cap;
1586                 break;
1587         case MSR_IA32_MCG_CTL:
1588                 if (!(mcg_cap & MCG_CTL_P))
1589                         return 1;
1590                 data = vcpu->arch.mcg_ctl;
1591                 break;
1592         case MSR_IA32_MCG_STATUS:
1593                 data = vcpu->arch.mcg_status;
1594                 break;
1595         default:
1596                 if (msr >= MSR_IA32_MC0_CTL &&
1597                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1598                         u32 offset = msr - MSR_IA32_MC0_CTL;
1599                         data = vcpu->arch.mce_banks[offset];
1600                         break;
1601                 }
1602                 return 1;
1603         }
1604         *pdata = data;
1605         return 0;
1606 }
1607
1608 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1609 {
1610         u64 data = 0;
1611         struct kvm *kvm = vcpu->kvm;
1612
1613         switch (msr) {
1614         case HV_X64_MSR_GUEST_OS_ID:
1615                 data = kvm->arch.hv_guest_os_id;
1616                 break;
1617         case HV_X64_MSR_HYPERCALL:
1618                 data = kvm->arch.hv_hypercall;
1619                 break;
1620         default:
1621                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1622                 return 1;
1623         }
1624
1625         *pdata = data;
1626         return 0;
1627 }
1628
1629 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1630 {
1631         u64 data = 0;
1632
1633         switch (msr) {
1634         case HV_X64_MSR_VP_INDEX: {
1635                 int r;
1636                 struct kvm_vcpu *v;
1637                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1638                         if (v == vcpu)
1639                                 data = r;
1640                 break;
1641         }
1642         case HV_X64_MSR_EOI:
1643                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1644         case HV_X64_MSR_ICR:
1645                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1646         case HV_X64_MSR_TPR:
1647                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1648         default:
1649                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1650                 return 1;
1651         }
1652         *pdata = data;
1653         return 0;
1654 }
1655
1656 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1657 {
1658         u64 data;
1659
1660         switch (msr) {
1661         case MSR_IA32_PLATFORM_ID:
1662         case MSR_IA32_UCODE_REV:
1663         case MSR_IA32_EBL_CR_POWERON:
1664         case MSR_IA32_DEBUGCTLMSR:
1665         case MSR_IA32_LASTBRANCHFROMIP:
1666         case MSR_IA32_LASTBRANCHTOIP:
1667         case MSR_IA32_LASTINTFROMIP:
1668         case MSR_IA32_LASTINTTOIP:
1669         case MSR_K8_SYSCFG:
1670         case MSR_K7_HWCR:
1671         case MSR_VM_HSAVE_PA:
1672         case MSR_P6_PERFCTR0:
1673         case MSR_P6_PERFCTR1:
1674         case MSR_P6_EVNTSEL0:
1675         case MSR_P6_EVNTSEL1:
1676         case MSR_K7_EVNTSEL0:
1677         case MSR_K7_PERFCTR0:
1678         case MSR_K8_INT_PENDING_MSG:
1679         case MSR_AMD64_NB_CFG:
1680         case MSR_FAM10H_MMIO_CONF_BASE:
1681                 data = 0;
1682                 break;
1683         case MSR_MTRRcap:
1684                 data = 0x500 | KVM_NR_VAR_MTRR;
1685                 break;
1686         case 0x200 ... 0x2ff:
1687                 return get_msr_mtrr(vcpu, msr, pdata);
1688         case 0xcd: /* fsb frequency */
1689                 data = 3;
1690                 break;
1691                 /*
1692                  * MSR_EBC_FREQUENCY_ID
1693                  * Conservative value valid for even the basic CPU models.
1694                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1695                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1696                  * and 266MHz for model 3, or 4. Set Core Clock
1697                  * Frequency to System Bus Frequency Ratio to 1 (bits
1698                  * 31:24) even though these are only valid for CPU
1699                  * models > 2, however guests may end up dividing or
1700                  * multiplying by zero otherwise.
1701                  */
1702         case MSR_EBC_FREQUENCY_ID:
1703                 data = 1 << 24;
1704                 break;
1705         case MSR_IA32_APICBASE:
1706                 data = kvm_get_apic_base(vcpu);
1707                 break;
1708         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1709                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1710                 break;
1711         case MSR_IA32_MISC_ENABLE:
1712                 data = vcpu->arch.ia32_misc_enable_msr;
1713                 break;
1714         case MSR_IA32_PERF_STATUS:
1715                 /* TSC increment by tick */
1716                 data = 1000ULL;
1717                 /* CPU multiplier */
1718                 data |= (((uint64_t)4ULL) << 40);
1719                 break;
1720         case MSR_EFER:
1721                 data = vcpu->arch.efer;
1722                 break;
1723         case MSR_KVM_WALL_CLOCK:
1724         case MSR_KVM_WALL_CLOCK_NEW:
1725                 data = vcpu->kvm->arch.wall_clock;
1726                 break;
1727         case MSR_KVM_SYSTEM_TIME:
1728         case MSR_KVM_SYSTEM_TIME_NEW:
1729                 data = vcpu->arch.time;
1730                 break;
1731         case MSR_IA32_P5_MC_ADDR:
1732         case MSR_IA32_P5_MC_TYPE:
1733         case MSR_IA32_MCG_CAP:
1734         case MSR_IA32_MCG_CTL:
1735         case MSR_IA32_MCG_STATUS:
1736         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1737                 return get_msr_mce(vcpu, msr, pdata);
1738         case MSR_K7_CLK_CTL:
1739                 /*
1740                  * Provide expected ramp-up count for K7. All other
1741                  * are set to zero, indicating minimum divisors for
1742                  * every field.
1743                  *
1744                  * This prevents guest kernels on AMD host with CPU
1745                  * type 6, model 8 and higher from exploding due to
1746                  * the rdmsr failing.
1747                  */
1748                 data = 0x20000000;
1749                 break;
1750         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1751                 if (kvm_hv_msr_partition_wide(msr)) {
1752                         int r;
1753                         mutex_lock(&vcpu->kvm->lock);
1754                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1755                         mutex_unlock(&vcpu->kvm->lock);
1756                         return r;
1757                 } else
1758                         return get_msr_hyperv(vcpu, msr, pdata);
1759                 break;
1760         default:
1761                 if (!ignore_msrs) {
1762                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1763                         return 1;
1764                 } else {
1765                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1766                         data = 0;
1767                 }
1768                 break;
1769         }
1770         *pdata = data;
1771         return 0;
1772 }
1773 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1774
1775 /*
1776  * Read or write a bunch of msrs. All parameters are kernel addresses.
1777  *
1778  * @return number of msrs set successfully.
1779  */
1780 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1781                     struct kvm_msr_entry *entries,
1782                     int (*do_msr)(struct kvm_vcpu *vcpu,
1783                                   unsigned index, u64 *data))
1784 {
1785         int i, idx;
1786
1787         idx = srcu_read_lock(&vcpu->kvm->srcu);
1788         for (i = 0; i < msrs->nmsrs; ++i)
1789                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1790                         break;
1791         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1792
1793         return i;
1794 }
1795
1796 /*
1797  * Read or write a bunch of msrs. Parameters are user addresses.
1798  *
1799  * @return number of msrs set successfully.
1800  */
1801 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1802                   int (*do_msr)(struct kvm_vcpu *vcpu,
1803                                 unsigned index, u64 *data),
1804                   int writeback)
1805 {
1806         struct kvm_msrs msrs;
1807         struct kvm_msr_entry *entries;
1808         int r, n;
1809         unsigned size;
1810
1811         r = -EFAULT;
1812         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1813                 goto out;
1814
1815         r = -E2BIG;
1816         if (msrs.nmsrs >= MAX_IO_MSRS)
1817                 goto out;
1818
1819         r = -ENOMEM;
1820         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1821         entries = kmalloc(size, GFP_KERNEL);
1822         if (!entries)
1823                 goto out;
1824
1825         r = -EFAULT;
1826         if (copy_from_user(entries, user_msrs->entries, size))
1827                 goto out_free;
1828
1829         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1830         if (r < 0)
1831                 goto out_free;
1832
1833         r = -EFAULT;
1834         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1835                 goto out_free;
1836
1837         r = n;
1838
1839 out_free:
1840         kfree(entries);
1841 out:
1842         return r;
1843 }
1844
1845 int kvm_dev_ioctl_check_extension(long ext)
1846 {
1847         int r;
1848
1849         switch (ext) {
1850         case KVM_CAP_IRQCHIP:
1851         case KVM_CAP_HLT:
1852         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1853         case KVM_CAP_SET_TSS_ADDR:
1854         case KVM_CAP_EXT_CPUID:
1855         case KVM_CAP_CLOCKSOURCE:
1856         case KVM_CAP_PIT:
1857         case KVM_CAP_NOP_IO_DELAY:
1858         case KVM_CAP_MP_STATE:
1859         case KVM_CAP_SYNC_MMU:
1860         case KVM_CAP_REINJECT_CONTROL:
1861         case KVM_CAP_IRQ_INJECT_STATUS:
1862         case KVM_CAP_ASSIGN_DEV_IRQ:
1863         case KVM_CAP_IRQFD:
1864         case KVM_CAP_IOEVENTFD:
1865         case KVM_CAP_PIT2:
1866         case KVM_CAP_PIT_STATE2:
1867         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1868         case KVM_CAP_XEN_HVM:
1869         case KVM_CAP_ADJUST_CLOCK:
1870         case KVM_CAP_VCPU_EVENTS:
1871         case KVM_CAP_HYPERV:
1872         case KVM_CAP_HYPERV_VAPIC:
1873         case KVM_CAP_HYPERV_SPIN:
1874         case KVM_CAP_PCI_SEGMENT:
1875         case KVM_CAP_DEBUGREGS:
1876         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1877         case KVM_CAP_XSAVE:
1878                 r = 1;
1879                 break;
1880         case KVM_CAP_COALESCED_MMIO:
1881                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1882                 break;
1883         case KVM_CAP_VAPIC:
1884                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1885                 break;
1886         case KVM_CAP_NR_VCPUS:
1887                 r = KVM_MAX_VCPUS;
1888                 break;
1889         case KVM_CAP_NR_MEMSLOTS:
1890                 r = KVM_MEMORY_SLOTS;
1891                 break;
1892         case KVM_CAP_PV_MMU:    /* obsolete */
1893                 r = 0;
1894                 break;
1895         case KVM_CAP_IOMMU:
1896                 r = iommu_found();
1897                 break;
1898         case KVM_CAP_MCE:
1899                 r = KVM_MAX_MCE_BANKS;
1900                 break;
1901         case KVM_CAP_XCRS:
1902                 r = cpu_has_xsave;
1903                 break;
1904         default:
1905                 r = 0;
1906                 break;
1907         }
1908         return r;
1909
1910 }
1911
1912 long kvm_arch_dev_ioctl(struct file *filp,
1913                         unsigned int ioctl, unsigned long arg)
1914 {
1915         void __user *argp = (void __user *)arg;
1916         long r;
1917
1918         switch (ioctl) {
1919         case KVM_GET_MSR_INDEX_LIST: {
1920                 struct kvm_msr_list __user *user_msr_list = argp;
1921                 struct kvm_msr_list msr_list;
1922                 unsigned n;
1923
1924                 r = -EFAULT;
1925                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1926                         goto out;
1927                 n = msr_list.nmsrs;
1928                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1929                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1930                         goto out;
1931                 r = -E2BIG;
1932                 if (n < msr_list.nmsrs)
1933                         goto out;
1934                 r = -EFAULT;
1935                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1936                                  num_msrs_to_save * sizeof(u32)))
1937                         goto out;
1938                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1939                                  &emulated_msrs,
1940                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1941                         goto out;
1942                 r = 0;
1943                 break;
1944         }
1945         case KVM_GET_SUPPORTED_CPUID: {
1946                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1947                 struct kvm_cpuid2 cpuid;
1948
1949                 r = -EFAULT;
1950                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1951                         goto out;
1952                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1953                                                       cpuid_arg->entries);
1954                 if (r)
1955                         goto out;
1956
1957                 r = -EFAULT;
1958                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1959                         goto out;
1960                 r = 0;
1961                 break;
1962         }
1963         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1964                 u64 mce_cap;
1965
1966                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1967                 r = -EFAULT;
1968                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1969                         goto out;
1970                 r = 0;
1971                 break;
1972         }
1973         default:
1974                 r = -EINVAL;
1975         }
1976 out:
1977         return r;
1978 }
1979
1980 static void wbinvd_ipi(void *garbage)
1981 {
1982         wbinvd();
1983 }
1984
1985 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
1986 {
1987         return vcpu->kvm->arch.iommu_domain &&
1988                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
1989 }
1990
1991 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1992 {
1993         /* Address WBINVD may be executed by guest */
1994         if (need_emulate_wbinvd(vcpu)) {
1995                 if (kvm_x86_ops->has_wbinvd_exit())
1996                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
1997                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
1998                         smp_call_function_single(vcpu->cpu,
1999                                         wbinvd_ipi, NULL, 1);
2000         }
2001
2002         kvm_x86_ops->vcpu_load(vcpu, cpu);
2003         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2004                 /* Make sure TSC doesn't go backwards */
2005                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2006                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2007                 if (tsc_delta < 0)
2008                         mark_tsc_unstable("KVM discovered backwards TSC");
2009                 if (check_tsc_unstable())
2010                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2011                 kvm_migrate_timers(vcpu);
2012                 vcpu->cpu = cpu;
2013         }
2014 }
2015
2016 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2017 {
2018         kvm_x86_ops->vcpu_put(vcpu);
2019         kvm_put_guest_fpu(vcpu);
2020         vcpu->arch.last_host_tsc = native_read_tsc();
2021 }
2022
2023 static int is_efer_nx(void)
2024 {
2025         unsigned long long efer = 0;
2026
2027         rdmsrl_safe(MSR_EFER, &efer);
2028         return efer & EFER_NX;
2029 }
2030
2031 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2032 {
2033         int i;
2034         struct kvm_cpuid_entry2 *e, *entry;
2035
2036         entry = NULL;
2037         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2038                 e = &vcpu->arch.cpuid_entries[i];
2039                 if (e->function == 0x80000001) {
2040                         entry = e;
2041                         break;
2042                 }
2043         }
2044         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2045                 entry->edx &= ~(1 << 20);
2046                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2047         }
2048 }
2049
2050 /* when an old userspace process fills a new kernel module */
2051 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2052                                     struct kvm_cpuid *cpuid,
2053                                     struct kvm_cpuid_entry __user *entries)
2054 {
2055         int r, i;
2056         struct kvm_cpuid_entry *cpuid_entries;
2057
2058         r = -E2BIG;
2059         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2060                 goto out;
2061         r = -ENOMEM;
2062         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2063         if (!cpuid_entries)
2064                 goto out;
2065         r = -EFAULT;
2066         if (copy_from_user(cpuid_entries, entries,
2067                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2068                 goto out_free;
2069         for (i = 0; i < cpuid->nent; i++) {
2070                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2071                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2072                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2073                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2074                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2075                 vcpu->arch.cpuid_entries[i].index = 0;
2076                 vcpu->arch.cpuid_entries[i].flags = 0;
2077                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2078                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2079                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2080         }
2081         vcpu->arch.cpuid_nent = cpuid->nent;
2082         cpuid_fix_nx_cap(vcpu);
2083         r = 0;
2084         kvm_apic_set_version(vcpu);
2085         kvm_x86_ops->cpuid_update(vcpu);
2086         update_cpuid(vcpu);
2087
2088 out_free:
2089         vfree(cpuid_entries);
2090 out:
2091         return r;
2092 }
2093
2094 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2095                                      struct kvm_cpuid2 *cpuid,
2096                                      struct kvm_cpuid_entry2 __user *entries)
2097 {
2098         int r;
2099
2100         r = -E2BIG;
2101         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2102                 goto out;
2103         r = -EFAULT;
2104         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2105                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2106                 goto out;
2107         vcpu->arch.cpuid_nent = cpuid->nent;
2108         kvm_apic_set_version(vcpu);
2109         kvm_x86_ops->cpuid_update(vcpu);
2110         update_cpuid(vcpu);
2111         return 0;
2112
2113 out:
2114         return r;
2115 }
2116
2117 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2118                                      struct kvm_cpuid2 *cpuid,
2119                                      struct kvm_cpuid_entry2 __user *entries)
2120 {
2121         int r;
2122
2123         r = -E2BIG;
2124         if (cpuid->nent < vcpu->arch.cpuid_nent)
2125                 goto out;
2126         r = -EFAULT;
2127         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2128                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2129                 goto out;
2130         return 0;
2131
2132 out:
2133         cpuid->nent = vcpu->arch.cpuid_nent;
2134         return r;
2135 }
2136
2137 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2138                            u32 index)
2139 {
2140         entry->function = function;
2141         entry->index = index;
2142         cpuid_count(entry->function, entry->index,
2143                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2144         entry->flags = 0;
2145 }
2146
2147 #define F(x) bit(X86_FEATURE_##x)
2148
2149 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2150                          u32 index, int *nent, int maxnent)
2151 {
2152         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2153 #ifdef CONFIG_X86_64
2154         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2155                                 ? F(GBPAGES) : 0;
2156         unsigned f_lm = F(LM);
2157 #else
2158         unsigned f_gbpages = 0;
2159         unsigned f_lm = 0;
2160 #endif
2161         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2162
2163         /* cpuid 1.edx */
2164         const u32 kvm_supported_word0_x86_features =
2165                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2166                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2167                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2168                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2169                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2170                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2171                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2172                 0 /* HTT, TM, Reserved, PBE */;
2173         /* cpuid 0x80000001.edx */
2174         const u32 kvm_supported_word1_x86_features =
2175                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2176                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2177                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2178                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2179                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2180                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2181                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2182                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2183         /* cpuid 1.ecx */
2184         const u32 kvm_supported_word4_x86_features =
2185                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2186                 0 /* DS-CPL, VMX, SMX, EST */ |
2187                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2188                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2189                 0 /* Reserved, DCA */ | F(XMM4_1) |
2190                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2191                 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
2192         /* cpuid 0x80000001.ecx */
2193         const u32 kvm_supported_word6_x86_features =
2194                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
2195                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2196                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
2197                 0 /* SKINIT */ | 0 /* WDT */;
2198
2199         /* all calls to cpuid_count() should be made on the same cpu */
2200         get_cpu();
2201         do_cpuid_1_ent(entry, function, index);
2202         ++*nent;
2203
2204         switch (function) {
2205         case 0:
2206                 entry->eax = min(entry->eax, (u32)0xd);
2207                 break;
2208         case 1:
2209                 entry->edx &= kvm_supported_word0_x86_features;
2210                 entry->ecx &= kvm_supported_word4_x86_features;
2211                 /* we support x2apic emulation even if host does not support
2212                  * it since we emulate x2apic in software */
2213                 entry->ecx |= F(X2APIC);
2214                 break;
2215         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2216          * may return different values. This forces us to get_cpu() before
2217          * issuing the first command, and also to emulate this annoying behavior
2218          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2219         case 2: {
2220                 int t, times = entry->eax & 0xff;
2221
2222                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2223                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2224                 for (t = 1; t < times && *nent < maxnent; ++t) {
2225                         do_cpuid_1_ent(&entry[t], function, 0);
2226                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2227                         ++*nent;
2228                 }
2229                 break;
2230         }
2231         /* function 4 and 0xb have additional index. */
2232         case 4: {
2233                 int i, cache_type;
2234
2235                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2236                 /* read more entries until cache_type is zero */
2237                 for (i = 1; *nent < maxnent; ++i) {
2238                         cache_type = entry[i - 1].eax & 0x1f;
2239                         if (!cache_type)
2240                                 break;
2241                         do_cpuid_1_ent(&entry[i], function, i);
2242                         entry[i].flags |=
2243                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2244                         ++*nent;
2245                 }
2246                 break;
2247         }
2248         case 0xb: {
2249                 int i, level_type;
2250
2251                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2252                 /* read more entries until level_type is zero */
2253                 for (i = 1; *nent < maxnent; ++i) {
2254                         level_type = entry[i - 1].ecx & 0xff00;
2255                         if (!level_type)
2256                                 break;
2257                         do_cpuid_1_ent(&entry[i], function, i);
2258                         entry[i].flags |=
2259                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2260                         ++*nent;
2261                 }
2262                 break;
2263         }
2264         case 0xd: {
2265                 int i;
2266
2267                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2268                 for (i = 1; *nent < maxnent; ++i) {
2269                         if (entry[i - 1].eax == 0 && i != 2)
2270                                 break;
2271                         do_cpuid_1_ent(&entry[i], function, i);
2272                         entry[i].flags |=
2273                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2274                         ++*nent;
2275                 }
2276                 break;
2277         }
2278         case KVM_CPUID_SIGNATURE: {
2279                 char signature[12] = "KVMKVMKVM\0\0";
2280                 u32 *sigptr = (u32 *)signature;
2281                 entry->eax = 0;
2282                 entry->ebx = sigptr[0];
2283                 entry->ecx = sigptr[1];
2284                 entry->edx = sigptr[2];
2285                 break;
2286         }
2287         case KVM_CPUID_FEATURES:
2288                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2289                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2290                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2291                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2292                 entry->ebx = 0;
2293                 entry->ecx = 0;
2294                 entry->edx = 0;
2295                 break;
2296         case 0x80000000:
2297                 entry->eax = min(entry->eax, 0x8000001a);
2298                 break;
2299         case 0x80000001:
2300                 entry->edx &= kvm_supported_word1_x86_features;
2301                 entry->ecx &= kvm_supported_word6_x86_features;
2302                 break;
2303         }
2304
2305         kvm_x86_ops->set_supported_cpuid(function, entry);
2306
2307         put_cpu();
2308 }
2309
2310 #undef F
2311
2312 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2313                                      struct kvm_cpuid_entry2 __user *entries)
2314 {
2315         struct kvm_cpuid_entry2 *cpuid_entries;
2316         int limit, nent = 0, r = -E2BIG;
2317         u32 func;
2318
2319         if (cpuid->nent < 1)
2320                 goto out;
2321         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2322                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2323         r = -ENOMEM;
2324         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2325         if (!cpuid_entries)
2326                 goto out;
2327
2328         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2329         limit = cpuid_entries[0].eax;
2330         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2331                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2332                              &nent, cpuid->nent);
2333         r = -E2BIG;
2334         if (nent >= cpuid->nent)
2335                 goto out_free;
2336
2337         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2338         limit = cpuid_entries[nent - 1].eax;
2339         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2340                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2341                              &nent, cpuid->nent);
2342
2343
2344
2345         r = -E2BIG;
2346         if (nent >= cpuid->nent)
2347                 goto out_free;
2348
2349         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2350                      cpuid->nent);
2351
2352         r = -E2BIG;
2353         if (nent >= cpuid->nent)
2354                 goto out_free;
2355
2356         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2357                      cpuid->nent);
2358
2359         r = -E2BIG;
2360         if (nent >= cpuid->nent)
2361                 goto out_free;
2362
2363         r = -EFAULT;
2364         if (copy_to_user(entries, cpuid_entries,
2365                          nent * sizeof(struct kvm_cpuid_entry2)))
2366                 goto out_free;
2367         cpuid->nent = nent;
2368         r = 0;
2369
2370 out_free:
2371         vfree(cpuid_entries);
2372 out:
2373         return r;
2374 }
2375
2376 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2377                                     struct kvm_lapic_state *s)
2378 {
2379         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2380
2381         return 0;
2382 }
2383
2384 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2385                                     struct kvm_lapic_state *s)
2386 {
2387         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2388         kvm_apic_post_state_restore(vcpu);
2389         update_cr8_intercept(vcpu);
2390
2391         return 0;
2392 }
2393
2394 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2395                                     struct kvm_interrupt *irq)
2396 {
2397         if (irq->irq < 0 || irq->irq >= 256)
2398                 return -EINVAL;
2399         if (irqchip_in_kernel(vcpu->kvm))
2400                 return -ENXIO;
2401
2402         kvm_queue_interrupt(vcpu, irq->irq, false);
2403
2404         return 0;
2405 }
2406
2407 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2408 {
2409         kvm_inject_nmi(vcpu);
2410
2411         return 0;
2412 }
2413
2414 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2415                                            struct kvm_tpr_access_ctl *tac)
2416 {
2417         if (tac->flags)
2418                 return -EINVAL;
2419         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2420         return 0;
2421 }
2422
2423 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2424                                         u64 mcg_cap)
2425 {
2426         int r;
2427         unsigned bank_num = mcg_cap & 0xff, bank;
2428
2429         r = -EINVAL;
2430         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2431                 goto out;
2432         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2433                 goto out;
2434         r = 0;
2435         vcpu->arch.mcg_cap = mcg_cap;
2436         /* Init IA32_MCG_CTL to all 1s */
2437         if (mcg_cap & MCG_CTL_P)
2438                 vcpu->arch.mcg_ctl = ~(u64)0;
2439         /* Init IA32_MCi_CTL to all 1s */
2440         for (bank = 0; bank < bank_num; bank++)
2441                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2442 out:
2443         return r;
2444 }
2445
2446 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2447                                       struct kvm_x86_mce *mce)
2448 {
2449         u64 mcg_cap = vcpu->arch.mcg_cap;
2450         unsigned bank_num = mcg_cap & 0xff;
2451         u64 *banks = vcpu->arch.mce_banks;
2452
2453         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2454                 return -EINVAL;
2455         /*
2456          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2457          * reporting is disabled
2458          */
2459         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2460             vcpu->arch.mcg_ctl != ~(u64)0)
2461                 return 0;
2462         banks += 4 * mce->bank;
2463         /*
2464          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2465          * reporting is disabled for the bank
2466          */
2467         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2468                 return 0;
2469         if (mce->status & MCI_STATUS_UC) {
2470                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2471                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2472                         printk(KERN_DEBUG "kvm: set_mce: "
2473                                "injects mce exception while "
2474                                "previous one is in progress!\n");
2475                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2476                         return 0;
2477                 }
2478                 if (banks[1] & MCI_STATUS_VAL)
2479                         mce->status |= MCI_STATUS_OVER;
2480                 banks[2] = mce->addr;
2481                 banks[3] = mce->misc;
2482                 vcpu->arch.mcg_status = mce->mcg_status;
2483                 banks[1] = mce->status;
2484                 kvm_queue_exception(vcpu, MC_VECTOR);
2485         } else if (!(banks[1] & MCI_STATUS_VAL)
2486                    || !(banks[1] & MCI_STATUS_UC)) {
2487                 if (banks[1] & MCI_STATUS_VAL)
2488                         mce->status |= MCI_STATUS_OVER;
2489                 banks[2] = mce->addr;
2490                 banks[3] = mce->misc;
2491                 banks[1] = mce->status;
2492         } else
2493                 banks[1] |= MCI_STATUS_OVER;
2494         return 0;
2495 }
2496
2497 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2498                                                struct kvm_vcpu_events *events)
2499 {
2500         events->exception.injected =
2501                 vcpu->arch.exception.pending &&
2502                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2503         events->exception.nr = vcpu->arch.exception.nr;
2504         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2505         events->exception.error_code = vcpu->arch.exception.error_code;
2506
2507         events->interrupt.injected =
2508                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2509         events->interrupt.nr = vcpu->arch.interrupt.nr;
2510         events->interrupt.soft = 0;
2511         events->interrupt.shadow =
2512                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2513                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2514
2515         events->nmi.injected = vcpu->arch.nmi_injected;
2516         events->nmi.pending = vcpu->arch.nmi_pending;
2517         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2518
2519         events->sipi_vector = vcpu->arch.sipi_vector;
2520
2521         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2522                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2523                          | KVM_VCPUEVENT_VALID_SHADOW);
2524 }
2525
2526 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2527                                               struct kvm_vcpu_events *events)
2528 {
2529         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2530                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2531                               | KVM_VCPUEVENT_VALID_SHADOW))
2532                 return -EINVAL;
2533
2534         vcpu->arch.exception.pending = events->exception.injected;
2535         vcpu->arch.exception.nr = events->exception.nr;
2536         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2537         vcpu->arch.exception.error_code = events->exception.error_code;
2538
2539         vcpu->arch.interrupt.pending = events->interrupt.injected;
2540         vcpu->arch.interrupt.nr = events->interrupt.nr;
2541         vcpu->arch.interrupt.soft = events->interrupt.soft;
2542         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2543                 kvm_pic_clear_isr_ack(vcpu->kvm);
2544         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2545                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2546                                                   events->interrupt.shadow);
2547
2548         vcpu->arch.nmi_injected = events->nmi.injected;
2549         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2550                 vcpu->arch.nmi_pending = events->nmi.pending;
2551         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2552
2553         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2554                 vcpu->arch.sipi_vector = events->sipi_vector;
2555
2556         return 0;
2557 }
2558
2559 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2560                                              struct kvm_debugregs *dbgregs)
2561 {
2562         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2563         dbgregs->dr6 = vcpu->arch.dr6;
2564         dbgregs->dr7 = vcpu->arch.dr7;
2565         dbgregs->flags = 0;
2566 }
2567
2568 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2569                                             struct kvm_debugregs *dbgregs)
2570 {
2571         if (dbgregs->flags)
2572                 return -EINVAL;
2573
2574         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2575         vcpu->arch.dr6 = dbgregs->dr6;
2576         vcpu->arch.dr7 = dbgregs->dr7;
2577
2578         return 0;
2579 }
2580
2581 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2582                                          struct kvm_xsave *guest_xsave)
2583 {
2584         if (cpu_has_xsave)
2585                 memcpy(guest_xsave->region,
2586                         &vcpu->arch.guest_fpu.state->xsave,
2587                         xstate_size);
2588         else {
2589                 memcpy(guest_xsave->region,
2590                         &vcpu->arch.guest_fpu.state->fxsave,
2591                         sizeof(struct i387_fxsave_struct));
2592                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2593                         XSTATE_FPSSE;
2594         }
2595 }
2596
2597 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2598                                         struct kvm_xsave *guest_xsave)
2599 {
2600         u64 xstate_bv =
2601                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2602
2603         if (cpu_has_xsave)
2604                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2605                         guest_xsave->region, xstate_size);
2606         else {
2607                 if (xstate_bv & ~XSTATE_FPSSE)
2608                         return -EINVAL;
2609                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2610                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2611         }
2612         return 0;
2613 }
2614
2615 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2616                                         struct kvm_xcrs *guest_xcrs)
2617 {
2618         if (!cpu_has_xsave) {
2619                 guest_xcrs->nr_xcrs = 0;
2620                 return;
2621         }
2622
2623         guest_xcrs->nr_xcrs = 1;
2624         guest_xcrs->flags = 0;
2625         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2626         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2627 }
2628
2629 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2630                                        struct kvm_xcrs *guest_xcrs)
2631 {
2632         int i, r = 0;
2633
2634         if (!cpu_has_xsave)
2635                 return -EINVAL;
2636
2637         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2638                 return -EINVAL;
2639
2640         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2641                 /* Only support XCR0 currently */
2642                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2643                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2644                                 guest_xcrs->xcrs[0].value);
2645                         break;
2646                 }
2647         if (r)
2648                 r = -EINVAL;
2649         return r;
2650 }
2651
2652 long kvm_arch_vcpu_ioctl(struct file *filp,
2653                          unsigned int ioctl, unsigned long arg)
2654 {
2655         struct kvm_vcpu *vcpu = filp->private_data;
2656         void __user *argp = (void __user *)arg;
2657         int r;
2658         union {
2659                 struct kvm_lapic_state *lapic;
2660                 struct kvm_xsave *xsave;
2661                 struct kvm_xcrs *xcrs;
2662                 void *buffer;
2663         } u;
2664
2665         u.buffer = NULL;
2666         switch (ioctl) {
2667         case KVM_GET_LAPIC: {
2668                 r = -EINVAL;
2669                 if (!vcpu->arch.apic)
2670                         goto out;
2671                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2672
2673                 r = -ENOMEM;
2674                 if (!u.lapic)
2675                         goto out;
2676                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2677                 if (r)
2678                         goto out;
2679                 r = -EFAULT;
2680                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2681                         goto out;
2682                 r = 0;
2683                 break;
2684         }
2685         case KVM_SET_LAPIC: {
2686                 r = -EINVAL;
2687                 if (!vcpu->arch.apic)
2688                         goto out;
2689                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2690                 r = -ENOMEM;
2691                 if (!u.lapic)
2692                         goto out;
2693                 r = -EFAULT;
2694                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2695                         goto out;
2696                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2697                 if (r)
2698                         goto out;
2699                 r = 0;
2700                 break;
2701         }
2702         case KVM_INTERRUPT: {
2703                 struct kvm_interrupt irq;
2704
2705                 r = -EFAULT;
2706                 if (copy_from_user(&irq, argp, sizeof irq))
2707                         goto out;
2708                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2709                 if (r)
2710                         goto out;
2711                 r = 0;
2712                 break;
2713         }
2714         case KVM_NMI: {
2715                 r = kvm_vcpu_ioctl_nmi(vcpu);
2716                 if (r)
2717                         goto out;
2718                 r = 0;
2719                 break;
2720         }
2721         case KVM_SET_CPUID: {
2722                 struct kvm_cpuid __user *cpuid_arg = argp;
2723                 struct kvm_cpuid cpuid;
2724
2725                 r = -EFAULT;
2726                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2727                         goto out;
2728                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2729                 if (r)
2730                         goto out;
2731                 break;
2732         }
2733         case KVM_SET_CPUID2: {
2734                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2735                 struct kvm_cpuid2 cpuid;
2736
2737                 r = -EFAULT;
2738                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2739                         goto out;
2740                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2741                                               cpuid_arg->entries);
2742                 if (r)
2743                         goto out;
2744                 break;
2745         }
2746         case KVM_GET_CPUID2: {
2747                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2748                 struct kvm_cpuid2 cpuid;
2749
2750                 r = -EFAULT;
2751                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2752                         goto out;
2753                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2754                                               cpuid_arg->entries);
2755                 if (r)
2756                         goto out;
2757                 r = -EFAULT;
2758                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2759                         goto out;
2760                 r = 0;
2761                 break;
2762         }
2763         case KVM_GET_MSRS:
2764                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2765                 break;
2766         case KVM_SET_MSRS:
2767                 r = msr_io(vcpu, argp, do_set_msr, 0);
2768                 break;
2769         case KVM_TPR_ACCESS_REPORTING: {
2770                 struct kvm_tpr_access_ctl tac;
2771
2772                 r = -EFAULT;
2773                 if (copy_from_user(&tac, argp, sizeof tac))
2774                         goto out;
2775                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2776                 if (r)
2777                         goto out;
2778                 r = -EFAULT;
2779                 if (copy_to_user(argp, &tac, sizeof tac))
2780                         goto out;
2781                 r = 0;
2782                 break;
2783         };
2784         case KVM_SET_VAPIC_ADDR: {
2785                 struct kvm_vapic_addr va;
2786
2787                 r = -EINVAL;
2788                 if (!irqchip_in_kernel(vcpu->kvm))
2789                         goto out;
2790                 r = -EFAULT;
2791                 if (copy_from_user(&va, argp, sizeof va))
2792                         goto out;
2793                 r = 0;
2794                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2795                 break;
2796         }
2797         case KVM_X86_SETUP_MCE: {
2798                 u64 mcg_cap;
2799
2800                 r = -EFAULT;
2801                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2802                         goto out;
2803                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2804                 break;
2805         }
2806         case KVM_X86_SET_MCE: {
2807                 struct kvm_x86_mce mce;
2808
2809                 r = -EFAULT;
2810                 if (copy_from_user(&mce, argp, sizeof mce))
2811                         goto out;
2812                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2813                 break;
2814         }
2815         case KVM_GET_VCPU_EVENTS: {
2816                 struct kvm_vcpu_events events;
2817
2818                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2819
2820                 r = -EFAULT;
2821                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2822                         break;
2823                 r = 0;
2824                 break;
2825         }
2826         case KVM_SET_VCPU_EVENTS: {
2827                 struct kvm_vcpu_events events;
2828
2829                 r = -EFAULT;
2830                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2831                         break;
2832
2833                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2834                 break;
2835         }
2836         case KVM_GET_DEBUGREGS: {
2837                 struct kvm_debugregs dbgregs;
2838
2839                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2840
2841                 r = -EFAULT;
2842                 if (copy_to_user(argp, &dbgregs,
2843                                  sizeof(struct kvm_debugregs)))
2844                         break;
2845                 r = 0;
2846                 break;
2847         }
2848         case KVM_SET_DEBUGREGS: {
2849                 struct kvm_debugregs dbgregs;
2850
2851                 r = -EFAULT;
2852                 if (copy_from_user(&dbgregs, argp,
2853                                    sizeof(struct kvm_debugregs)))
2854                         break;
2855
2856                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2857                 break;
2858         }
2859         case KVM_GET_XSAVE: {
2860                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2861                 r = -ENOMEM;
2862                 if (!u.xsave)
2863                         break;
2864
2865                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2866
2867                 r = -EFAULT;
2868                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2869                         break;
2870                 r = 0;
2871                 break;
2872         }
2873         case KVM_SET_XSAVE: {
2874                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2875                 r = -ENOMEM;
2876                 if (!u.xsave)
2877                         break;
2878
2879                 r = -EFAULT;
2880                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2881                         break;
2882
2883                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2884                 break;
2885         }
2886         case KVM_GET_XCRS: {
2887                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2888                 r = -ENOMEM;
2889                 if (!u.xcrs)
2890                         break;
2891
2892                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2893
2894                 r = -EFAULT;
2895                 if (copy_to_user(argp, u.xcrs,
2896                                  sizeof(struct kvm_xcrs)))
2897                         break;
2898                 r = 0;
2899                 break;
2900         }
2901         case KVM_SET_XCRS: {
2902                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2903                 r = -ENOMEM;
2904                 if (!u.xcrs)
2905                         break;
2906
2907                 r = -EFAULT;
2908                 if (copy_from_user(u.xcrs, argp,
2909                                    sizeof(struct kvm_xcrs)))
2910                         break;
2911
2912                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2913                 break;
2914         }
2915         default:
2916                 r = -EINVAL;
2917         }
2918 out:
2919         kfree(u.buffer);
2920         return r;
2921 }
2922
2923 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2924 {
2925         int ret;
2926
2927         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2928                 return -1;
2929         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2930         return ret;
2931 }
2932
2933 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2934                                               u64 ident_addr)
2935 {
2936         kvm->arch.ept_identity_map_addr = ident_addr;
2937         return 0;
2938 }
2939
2940 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2941                                           u32 kvm_nr_mmu_pages)
2942 {
2943         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2944                 return -EINVAL;
2945
2946         mutex_lock(&kvm->slots_lock);
2947         spin_lock(&kvm->mmu_lock);
2948
2949         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2950         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2951
2952         spin_unlock(&kvm->mmu_lock);
2953         mutex_unlock(&kvm->slots_lock);
2954         return 0;
2955 }
2956
2957 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2958 {
2959         return kvm->arch.n_max_mmu_pages;
2960 }
2961
2962 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2963 {
2964         int r;
2965
2966         r = 0;
2967         switch (chip->chip_id) {
2968         case KVM_IRQCHIP_PIC_MASTER:
2969                 memcpy(&chip->chip.pic,
2970                         &pic_irqchip(kvm)->pics[0],
2971                         sizeof(struct kvm_pic_state));
2972                 break;
2973         case KVM_IRQCHIP_PIC_SLAVE:
2974                 memcpy(&chip->chip.pic,
2975                         &pic_irqchip(kvm)->pics[1],
2976                         sizeof(struct kvm_pic_state));
2977                 break;
2978         case KVM_IRQCHIP_IOAPIC:
2979                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2980                 break;
2981         default:
2982                 r = -EINVAL;
2983                 break;
2984         }
2985         return r;
2986 }
2987
2988 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2989 {
2990         int r;
2991
2992         r = 0;
2993         switch (chip->chip_id) {
2994         case KVM_IRQCHIP_PIC_MASTER:
2995                 raw_spin_lock(&pic_irqchip(kvm)->lock);
2996                 memcpy(&pic_irqchip(kvm)->pics[0],
2997                         &chip->chip.pic,
2998                         sizeof(struct kvm_pic_state));
2999                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
3000                 break;
3001         case KVM_IRQCHIP_PIC_SLAVE:
3002                 raw_spin_lock(&pic_irqchip(kvm)->lock);
3003                 memcpy(&pic_irqchip(kvm)->pics[1],
3004                         &chip->chip.pic,
3005                         sizeof(struct kvm_pic_state));
3006                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
3007                 break;
3008         case KVM_IRQCHIP_IOAPIC:
3009                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3010                 break;
3011         default:
3012                 r = -EINVAL;
3013                 break;
3014         }
3015         kvm_pic_update_irq(pic_irqchip(kvm));
3016         return r;
3017 }
3018
3019 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3020 {
3021         int r = 0;
3022
3023         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3024         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3025         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3026         return r;
3027 }
3028
3029 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3030 {
3031         int r = 0;
3032
3033         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3034         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3035         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3036         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3037         return r;
3038 }
3039
3040 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3041 {
3042         int r = 0;
3043
3044         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3045         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3046                 sizeof(ps->channels));
3047         ps->flags = kvm->arch.vpit->pit_state.flags;
3048         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3049         return r;
3050 }
3051
3052 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3053 {
3054         int r = 0, start = 0;
3055         u32 prev_legacy, cur_legacy;
3056         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3057         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3058         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3059         if (!prev_legacy && cur_legacy)
3060                 start = 1;
3061         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3062                sizeof(kvm->arch.vpit->pit_state.channels));
3063         kvm->arch.vpit->pit_state.flags = ps->flags;
3064         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3065         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3066         return r;
3067 }
3068
3069 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3070                                  struct kvm_reinject_control *control)
3071 {
3072         if (!kvm->arch.vpit)
3073                 return -ENXIO;
3074         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3075         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3076         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3077         return 0;
3078 }
3079
3080 /*
3081  * Get (and clear) the dirty memory log for a memory slot.
3082  */
3083 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3084                                       struct kvm_dirty_log *log)
3085 {
3086         int r, i;
3087         struct kvm_memory_slot *memslot;
3088         unsigned long n;
3089         unsigned long is_dirty = 0;
3090
3091         mutex_lock(&kvm->slots_lock);
3092
3093         r = -EINVAL;
3094         if (log->slot >= KVM_MEMORY_SLOTS)
3095                 goto out;
3096
3097         memslot = &kvm->memslots->memslots[log->slot];
3098         r = -ENOENT;
3099         if (!memslot->dirty_bitmap)
3100                 goto out;
3101
3102         n = kvm_dirty_bitmap_bytes(memslot);
3103
3104         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3105                 is_dirty = memslot->dirty_bitmap[i];
3106
3107         /* If nothing is dirty, don't bother messing with page tables. */
3108         if (is_dirty) {
3109                 struct kvm_memslots *slots, *old_slots;
3110                 unsigned long *dirty_bitmap;
3111
3112                 spin_lock(&kvm->mmu_lock);
3113                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3114                 spin_unlock(&kvm->mmu_lock);
3115
3116                 r = -ENOMEM;
3117                 dirty_bitmap = vmalloc(n);
3118                 if (!dirty_bitmap)
3119                         goto out;
3120                 memset(dirty_bitmap, 0, n);
3121
3122                 r = -ENOMEM;
3123                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3124                 if (!slots) {
3125                         vfree(dirty_bitmap);
3126                         goto out;
3127                 }
3128                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3129                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3130
3131                 old_slots = kvm->memslots;
3132                 rcu_assign_pointer(kvm->memslots, slots);
3133                 synchronize_srcu_expedited(&kvm->srcu);
3134                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3135                 kfree(old_slots);
3136
3137                 r = -EFAULT;
3138                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3139                         vfree(dirty_bitmap);
3140                         goto out;
3141                 }
3142                 vfree(dirty_bitmap);
3143         } else {
3144                 r = -EFAULT;
3145                 if (clear_user(log->dirty_bitmap, n))
3146                         goto out;
3147         }
3148
3149         r = 0;
3150 out:
3151         mutex_unlock(&kvm->slots_lock);
3152         return r;
3153 }
3154
3155 long kvm_arch_vm_ioctl(struct file *filp,
3156                        unsigned int ioctl, unsigned long arg)
3157 {
3158         struct kvm *kvm = filp->private_data;
3159         void __user *argp = (void __user *)arg;
3160         int r = -ENOTTY;
3161         /*
3162          * This union makes it completely explicit to gcc-3.x
3163          * that these two variables' stack usage should be
3164          * combined, not added together.
3165          */
3166         union {
3167                 struct kvm_pit_state ps;
3168                 struct kvm_pit_state2 ps2;
3169                 struct kvm_pit_config pit_config;
3170         } u;
3171
3172         switch (ioctl) {
3173         case KVM_SET_TSS_ADDR:
3174                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3175                 if (r < 0)
3176                         goto out;
3177                 break;
3178         case KVM_SET_IDENTITY_MAP_ADDR: {
3179                 u64 ident_addr;
3180
3181                 r = -EFAULT;
3182                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3183                         goto out;
3184                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3185                 if (r < 0)
3186                         goto out;
3187                 break;
3188         }
3189         case KVM_SET_NR_MMU_PAGES:
3190                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3191                 if (r)
3192                         goto out;
3193                 break;
3194         case KVM_GET_NR_MMU_PAGES:
3195                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3196                 break;
3197         case KVM_CREATE_IRQCHIP: {
3198                 struct kvm_pic *vpic;
3199
3200                 mutex_lock(&kvm->lock);
3201                 r = -EEXIST;
3202                 if (kvm->arch.vpic)
3203                         goto create_irqchip_unlock;
3204                 r = -ENOMEM;
3205                 vpic = kvm_create_pic(kvm);
3206                 if (vpic) {
3207                         r = kvm_ioapic_init(kvm);
3208                         if (r) {
3209                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3210                                                           &vpic->dev);
3211                                 kfree(vpic);
3212                                 goto create_irqchip_unlock;
3213                         }
3214                 } else
3215                         goto create_irqchip_unlock;
3216                 smp_wmb();
3217                 kvm->arch.vpic = vpic;
3218                 smp_wmb();
3219                 r = kvm_setup_default_irq_routing(kvm);
3220                 if (r) {
3221                         mutex_lock(&kvm->irq_lock);
3222                         kvm_ioapic_destroy(kvm);
3223                         kvm_destroy_pic(kvm);
3224                         mutex_unlock(&kvm->irq_lock);
3225                 }
3226         create_irqchip_unlock:
3227                 mutex_unlock(&kvm->lock);
3228                 break;
3229         }
3230         case KVM_CREATE_PIT:
3231                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3232                 goto create_pit;
3233         case KVM_CREATE_PIT2:
3234                 r = -EFAULT;
3235                 if (copy_from_user(&u.pit_config, argp,
3236                                    sizeof(struct kvm_pit_config)))
3237                         goto out;
3238         create_pit:
3239                 mutex_lock(&kvm->slots_lock);
3240                 r = -EEXIST;
3241                 if (kvm->arch.vpit)
3242                         goto create_pit_unlock;
3243                 r = -ENOMEM;
3244                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3245                 if (kvm->arch.vpit)
3246                         r = 0;
3247         create_pit_unlock:
3248                 mutex_unlock(&kvm->slots_lock);
3249                 break;
3250         case KVM_IRQ_LINE_STATUS:
3251         case KVM_IRQ_LINE: {
3252                 struct kvm_irq_level irq_event;
3253
3254                 r = -EFAULT;
3255                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3256                         goto out;
3257                 r = -ENXIO;
3258                 if (irqchip_in_kernel(kvm)) {
3259                         __s32 status;
3260                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3261                                         irq_event.irq, irq_event.level);
3262                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3263                                 r = -EFAULT;
3264                                 irq_event.status = status;
3265                                 if (copy_to_user(argp, &irq_event,
3266                                                         sizeof irq_event))
3267                                         goto out;
3268                         }
3269                         r = 0;
3270                 }
3271                 break;
3272         }
3273         case KVM_GET_IRQCHIP: {
3274                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3275                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3276
3277                 r = -ENOMEM;
3278                 if (!chip)
3279                         goto out;
3280                 r = -EFAULT;
3281                 if (copy_from_user(chip, argp, sizeof *chip))
3282                         goto get_irqchip_out;
3283                 r = -ENXIO;
3284                 if (!irqchip_in_kernel(kvm))
3285                         goto get_irqchip_out;
3286                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3287                 if (r)
3288                         goto get_irqchip_out;
3289                 r = -EFAULT;
3290                 if (copy_to_user(argp, chip, sizeof *chip))
3291                         goto get_irqchip_out;
3292                 r = 0;
3293         get_irqchip_out:
3294                 kfree(chip);
3295                 if (r)
3296                         goto out;
3297                 break;
3298         }
3299         case KVM_SET_IRQCHIP: {
3300                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3301                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3302
3303                 r = -ENOMEM;
3304                 if (!chip)
3305                         goto out;
3306                 r = -EFAULT;
3307                 if (copy_from_user(chip, argp, sizeof *chip))
3308                         goto set_irqchip_out;
3309                 r = -ENXIO;
3310                 if (!irqchip_in_kernel(kvm))
3311                         goto set_irqchip_out;
3312                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3313                 if (r)
3314                         goto set_irqchip_out;
3315                 r = 0;
3316         set_irqchip_out:
3317                 kfree(chip);
3318                 if (r)
3319                         goto out;
3320                 break;
3321         }
3322         case KVM_GET_PIT: {
3323                 r = -EFAULT;
3324                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3325                         goto out;
3326                 r = -ENXIO;
3327                 if (!kvm->arch.vpit)
3328                         goto out;
3329                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3330                 if (r)
3331                         goto out;
3332                 r = -EFAULT;
3333                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3334                         goto out;
3335                 r = 0;
3336                 break;
3337         }
3338         case KVM_SET_PIT: {
3339                 r = -EFAULT;
3340                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3341                         goto out;
3342                 r = -ENXIO;
3343                 if (!kvm->arch.vpit)
3344                         goto out;
3345                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3346                 if (r)
3347                         goto out;
3348                 r = 0;
3349                 break;
3350         }
3351         case KVM_GET_PIT2: {
3352                 r = -ENXIO;
3353                 if (!kvm->arch.vpit)
3354                         goto out;
3355                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3356                 if (r)
3357                         goto out;
3358                 r = -EFAULT;
3359                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3360                         goto out;
3361                 r = 0;
3362                 break;
3363         }
3364         case KVM_SET_PIT2: {
3365                 r = -EFAULT;
3366                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3367                         goto out;
3368                 r = -ENXIO;
3369                 if (!kvm->arch.vpit)
3370                         goto out;
3371                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3372                 if (r)
3373                         goto out;
3374                 r = 0;
3375                 break;
3376         }
3377         case KVM_REINJECT_CONTROL: {
3378                 struct kvm_reinject_control control;
3379                 r =  -EFAULT;
3380                 if (copy_from_user(&control, argp, sizeof(control)))
3381                         goto out;
3382                 r = kvm_vm_ioctl_reinject(kvm, &control);
3383                 if (r)
3384                         goto out;
3385                 r = 0;
3386                 break;
3387         }
3388         case KVM_XEN_HVM_CONFIG: {
3389                 r = -EFAULT;
3390                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3391                                    sizeof(struct kvm_xen_hvm_config)))
3392                         goto out;
3393                 r = -EINVAL;
3394                 if (kvm->arch.xen_hvm_config.flags)
3395                         goto out;
3396                 r = 0;
3397                 break;
3398         }
3399         case KVM_SET_CLOCK: {
3400                 struct kvm_clock_data user_ns;
3401                 u64 now_ns;
3402                 s64 delta;
3403
3404                 r = -EFAULT;
3405                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3406                         goto out;
3407
3408                 r = -EINVAL;
3409                 if (user_ns.flags)
3410                         goto out;
3411
3412                 r = 0;
3413                 now_ns = get_kernel_ns();
3414                 delta = user_ns.clock - now_ns;
3415                 kvm->arch.kvmclock_offset = delta;
3416                 break;
3417         }
3418         case KVM_GET_CLOCK: {
3419                 struct kvm_clock_data user_ns;
3420                 u64 now_ns;
3421
3422                 now_ns = get_kernel_ns();
3423                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3424                 user_ns.flags = 0;
3425
3426                 r = -EFAULT;
3427                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3428                         goto out;
3429                 r = 0;
3430                 break;
3431         }
3432
3433         default:
3434                 ;
3435         }
3436 out:
3437         return r;
3438 }
3439
3440 static void kvm_init_msr_list(void)
3441 {
3442         u32 dummy[2];
3443         unsigned i, j;
3444
3445         /* skip the first msrs in the list. KVM-specific */
3446         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3447                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3448                         continue;
3449                 if (j < i)
3450                         msrs_to_save[j] = msrs_to_save[i];
3451                 j++;
3452         }
3453         num_msrs_to_save = j;
3454 }
3455
3456 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3457                            const void *v)
3458 {
3459         if (vcpu->arch.apic &&
3460             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3461                 return 0;
3462
3463         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3464 }
3465
3466 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3467 {
3468         if (vcpu->arch.apic &&
3469             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3470                 return 0;
3471
3472         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3473 }
3474
3475 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3476                         struct kvm_segment *var, int seg)
3477 {
3478         kvm_x86_ops->set_segment(vcpu, var, seg);
3479 }
3480
3481 void kvm_get_segment(struct kvm_vcpu *vcpu,
3482                      struct kvm_segment *var, int seg)
3483 {
3484         kvm_x86_ops->get_segment(vcpu, var, seg);
3485 }
3486
3487 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3488 {
3489         return gpa;
3490 }
3491
3492 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3493 {
3494         gpa_t t_gpa;
3495         u32 error;
3496
3497         BUG_ON(!mmu_is_nested(vcpu));
3498
3499         /* NPT walks are always user-walks */
3500         access |= PFERR_USER_MASK;
3501         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &error);
3502         if (t_gpa == UNMAPPED_GVA)
3503                 vcpu->arch.fault.error_code |= PFERR_NESTED_MASK;
3504
3505         return t_gpa;
3506 }
3507
3508 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3509 {
3510         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3511         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3512 }
3513
3514  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3515 {
3516         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3517         access |= PFERR_FETCH_MASK;
3518         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3519 }
3520
3521 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3522 {
3523         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3524         access |= PFERR_WRITE_MASK;
3525         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3526 }
3527
3528 /* uses this to access any guest's mapped memory without checking CPL */
3529 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3530 {
3531         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3532 }
3533
3534 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3535                                       struct kvm_vcpu *vcpu, u32 access,
3536                                       u32 *error)
3537 {
3538         void *data = val;
3539         int r = X86EMUL_CONTINUE;
3540
3541         while (bytes) {
3542                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3543                                                             error);
3544                 unsigned offset = addr & (PAGE_SIZE-1);
3545                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3546                 int ret;
3547
3548                 if (gpa == UNMAPPED_GVA) {
3549                         r = X86EMUL_PROPAGATE_FAULT;
3550                         goto out;
3551                 }
3552                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3553                 if (ret < 0) {
3554                         r = X86EMUL_IO_NEEDED;
3555                         goto out;
3556                 }
3557
3558                 bytes -= toread;
3559                 data += toread;
3560                 addr += toread;
3561         }
3562 out:
3563         return r;
3564 }
3565
3566 /* used for instruction fetching */
3567 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3568                                 struct kvm_vcpu *vcpu, u32 *error)
3569 {
3570         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3571         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3572                                           access | PFERR_FETCH_MASK, error);
3573 }
3574
3575 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3576                                struct kvm_vcpu *vcpu, u32 *error)
3577 {
3578         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3579         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3580                                           error);
3581 }
3582
3583 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3584                                struct kvm_vcpu *vcpu, u32 *error)
3585 {
3586         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3587 }
3588
3589 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3590                                        unsigned int bytes,
3591                                        struct kvm_vcpu *vcpu,
3592                                        u32 *error)
3593 {
3594         void *data = val;
3595         int r = X86EMUL_CONTINUE;
3596
3597         while (bytes) {
3598                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3599                                                              PFERR_WRITE_MASK,
3600                                                              error);
3601                 unsigned offset = addr & (PAGE_SIZE-1);
3602                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3603                 int ret;
3604
3605                 if (gpa == UNMAPPED_GVA) {
3606                         r = X86EMUL_PROPAGATE_FAULT;
3607                         goto out;
3608                 }
3609                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3610                 if (ret < 0) {
3611                         r = X86EMUL_IO_NEEDED;
3612                         goto out;
3613                 }
3614
3615                 bytes -= towrite;
3616                 data += towrite;
3617                 addr += towrite;
3618         }
3619 out:
3620         return r;
3621 }
3622
3623 static int emulator_read_emulated(unsigned long addr,
3624                                   void *val,
3625                                   unsigned int bytes,
3626                                   unsigned int *error_code,
3627                                   struct kvm_vcpu *vcpu)
3628 {
3629         gpa_t                 gpa;
3630
3631         if (vcpu->mmio_read_completed) {
3632                 memcpy(val, vcpu->mmio_data, bytes);
3633                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3634                                vcpu->mmio_phys_addr, *(u64 *)val);
3635                 vcpu->mmio_read_completed = 0;
3636                 return X86EMUL_CONTINUE;
3637         }
3638
3639         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3640
3641         if (gpa == UNMAPPED_GVA)
3642                 return X86EMUL_PROPAGATE_FAULT;
3643
3644         /* For APIC access vmexit */
3645         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3646                 goto mmio;
3647
3648         if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3649                                 == X86EMUL_CONTINUE)
3650                 return X86EMUL_CONTINUE;
3651
3652 mmio:
3653         /*
3654          * Is this MMIO handled locally?
3655          */
3656         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3657                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3658                 return X86EMUL_CONTINUE;
3659         }
3660
3661         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3662
3663         vcpu->mmio_needed = 1;
3664         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3665         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3666         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3667         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3668
3669         return X86EMUL_IO_NEEDED;
3670 }
3671
3672 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3673                           const void *val, int bytes)
3674 {
3675         int ret;
3676
3677         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3678         if (ret < 0)
3679                 return 0;
3680         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3681         return 1;
3682 }
3683
3684 static int emulator_write_emulated_onepage(unsigned long addr,
3685                                            const void *val,
3686                                            unsigned int bytes,
3687                                            unsigned int *error_code,
3688                                            struct kvm_vcpu *vcpu)
3689 {
3690         gpa_t                 gpa;
3691
3692         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3693
3694         if (gpa == UNMAPPED_GVA)
3695                 return X86EMUL_PROPAGATE_FAULT;
3696
3697         /* For APIC access vmexit */
3698         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3699                 goto mmio;
3700
3701         if (emulator_write_phys(vcpu, gpa, val, bytes))
3702                 return X86EMUL_CONTINUE;
3703
3704 mmio:
3705         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3706         /*
3707          * Is this MMIO handled locally?
3708          */
3709         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3710                 return X86EMUL_CONTINUE;
3711
3712         vcpu->mmio_needed = 1;
3713         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3714         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3715         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3716         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3717         memcpy(vcpu->run->mmio.data, val, bytes);
3718
3719         return X86EMUL_CONTINUE;
3720 }
3721
3722 int emulator_write_emulated(unsigned long addr,
3723                             const void *val,
3724                             unsigned int bytes,
3725                             unsigned int *error_code,
3726                             struct kvm_vcpu *vcpu)
3727 {
3728         /* Crossing a page boundary? */
3729         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3730                 int rc, now;
3731
3732                 now = -addr & ~PAGE_MASK;
3733                 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3734                                                      vcpu);
3735                 if (rc != X86EMUL_CONTINUE)
3736                         return rc;
3737                 addr += now;
3738                 val += now;
3739                 bytes -= now;
3740         }
3741         return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3742                                                vcpu);
3743 }
3744
3745 #define CMPXCHG_TYPE(t, ptr, old, new) \
3746         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3747
3748 #ifdef CONFIG_X86_64
3749 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3750 #else
3751 #  define CMPXCHG64(ptr, old, new) \
3752         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3753 #endif
3754
3755 static int emulator_cmpxchg_emulated(unsigned long addr,
3756                                      const void *old,
3757                                      const void *new,
3758                                      unsigned int bytes,
3759                                      unsigned int *error_code,
3760                                      struct kvm_vcpu *vcpu)
3761 {
3762         gpa_t gpa;
3763         struct page *page;
3764         char *kaddr;
3765         bool exchanged;
3766
3767         /* guests cmpxchg8b have to be emulated atomically */
3768         if (bytes > 8 || (bytes & (bytes - 1)))
3769                 goto emul_write;
3770
3771         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3772
3773         if (gpa == UNMAPPED_GVA ||
3774             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3775                 goto emul_write;
3776
3777         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3778                 goto emul_write;
3779
3780         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3781         if (is_error_page(page)) {
3782                 kvm_release_page_clean(page);
3783                 goto emul_write;
3784         }
3785
3786         kaddr = kmap_atomic(page, KM_USER0);
3787         kaddr += offset_in_page(gpa);
3788         switch (bytes) {
3789         case 1:
3790                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3791                 break;
3792         case 2:
3793                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3794                 break;
3795         case 4:
3796                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3797                 break;
3798         case 8:
3799                 exchanged = CMPXCHG64(kaddr, old, new);
3800                 break;
3801         default:
3802                 BUG();
3803         }
3804         kunmap_atomic(kaddr, KM_USER0);
3805         kvm_release_page_dirty(page);
3806
3807         if (!exchanged)
3808                 return X86EMUL_CMPXCHG_FAILED;
3809
3810         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3811
3812         return X86EMUL_CONTINUE;
3813
3814 emul_write:
3815         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3816
3817         return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3818 }
3819
3820 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3821 {
3822         /* TODO: String I/O for in kernel device */
3823         int r;
3824
3825         if (vcpu->arch.pio.in)
3826                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3827                                     vcpu->arch.pio.size, pd);
3828         else
3829                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3830                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3831                                      pd);
3832         return r;
3833 }
3834
3835
3836 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3837                              unsigned int count, struct kvm_vcpu *vcpu)
3838 {
3839         if (vcpu->arch.pio.count)
3840                 goto data_avail;
3841
3842         trace_kvm_pio(0, port, size, 1);
3843
3844         vcpu->arch.pio.port = port;
3845         vcpu->arch.pio.in = 1;
3846         vcpu->arch.pio.count  = count;
3847         vcpu->arch.pio.size = size;
3848
3849         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3850         data_avail:
3851                 memcpy(val, vcpu->arch.pio_data, size * count);
3852                 vcpu->arch.pio.count = 0;
3853                 return 1;
3854         }
3855
3856         vcpu->run->exit_reason = KVM_EXIT_IO;
3857         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3858         vcpu->run->io.size = size;
3859         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3860         vcpu->run->io.count = count;
3861         vcpu->run->io.port = port;
3862
3863         return 0;
3864 }
3865
3866 static int emulator_pio_out_emulated(int size, unsigned short port,
3867                               const void *val, unsigned int count,
3868                               struct kvm_vcpu *vcpu)
3869 {
3870         trace_kvm_pio(1, port, size, 1);
3871
3872         vcpu->arch.pio.port = port;
3873         vcpu->arch.pio.in = 0;
3874         vcpu->arch.pio.count = count;
3875         vcpu->arch.pio.size = size;
3876
3877         memcpy(vcpu->arch.pio_data, val, size * count);
3878
3879         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3880                 vcpu->arch.pio.count = 0;
3881                 return 1;
3882         }
3883
3884         vcpu->run->exit_reason = KVM_EXIT_IO;
3885         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3886         vcpu->run->io.size = size;
3887         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3888         vcpu->run->io.count = count;
3889         vcpu->run->io.port = port;
3890
3891         return 0;
3892 }
3893
3894 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3895 {
3896         return kvm_x86_ops->get_segment_base(vcpu, seg);
3897 }
3898
3899 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3900 {
3901         kvm_mmu_invlpg(vcpu, address);
3902         return X86EMUL_CONTINUE;
3903 }
3904
3905 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3906 {
3907         if (!need_emulate_wbinvd(vcpu))
3908                 return X86EMUL_CONTINUE;
3909
3910         if (kvm_x86_ops->has_wbinvd_exit()) {
3911                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3912                                 wbinvd_ipi, NULL, 1);
3913                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3914         }
3915         wbinvd();
3916         return X86EMUL_CONTINUE;
3917 }
3918 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3919
3920 int emulate_clts(struct kvm_vcpu *vcpu)
3921 {
3922         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3923         kvm_x86_ops->fpu_activate(vcpu);
3924         return X86EMUL_CONTINUE;
3925 }
3926
3927 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3928 {
3929         return _kvm_get_dr(vcpu, dr, dest);
3930 }
3931
3932 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3933 {
3934
3935         return __kvm_set_dr(vcpu, dr, value);
3936 }
3937
3938 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3939 {
3940         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3941 }
3942
3943 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3944 {
3945         unsigned long value;
3946
3947         switch (cr) {
3948         case 0:
3949                 value = kvm_read_cr0(vcpu);
3950                 break;
3951         case 2:
3952                 value = vcpu->arch.cr2;
3953                 break;
3954         case 3:
3955                 value = vcpu->arch.cr3;
3956                 break;
3957         case 4:
3958                 value = kvm_read_cr4(vcpu);
3959                 break;
3960         case 8:
3961                 value = kvm_get_cr8(vcpu);
3962                 break;
3963         default:
3964                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3965                 return 0;
3966         }
3967
3968         return value;
3969 }
3970
3971 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3972 {
3973         int res = 0;
3974
3975         switch (cr) {
3976         case 0:
3977                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3978                 break;
3979         case 2:
3980                 vcpu->arch.cr2 = val;
3981                 break;
3982         case 3:
3983                 res = kvm_set_cr3(vcpu, val);
3984                 break;
3985         case 4:
3986                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3987                 break;
3988         case 8:
3989                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3990                 break;
3991         default:
3992                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3993                 res = -1;
3994         }
3995
3996         return res;
3997 }
3998
3999 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4000 {
4001         return kvm_x86_ops->get_cpl(vcpu);
4002 }
4003
4004 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4005 {
4006         kvm_x86_ops->get_gdt(vcpu, dt);
4007 }
4008
4009 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4010 {
4011         kvm_x86_ops->get_idt(vcpu, dt);
4012 }
4013
4014 static unsigned long emulator_get_cached_segment_base(int seg,
4015                                                       struct kvm_vcpu *vcpu)
4016 {
4017         return get_segment_base(vcpu, seg);
4018 }
4019
4020 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4021                                            struct kvm_vcpu *vcpu)
4022 {
4023         struct kvm_segment var;
4024
4025         kvm_get_segment(vcpu, &var, seg);
4026
4027         if (var.unusable)
4028                 return false;
4029
4030         if (var.g)
4031                 var.limit >>= 12;
4032         set_desc_limit(desc, var.limit);
4033         set_desc_base(desc, (unsigned long)var.base);
4034         desc->type = var.type;
4035         desc->s = var.s;
4036         desc->dpl = var.dpl;
4037         desc->p = var.present;
4038         desc->avl = var.avl;
4039         desc->l = var.l;
4040         desc->d = var.db;
4041         desc->g = var.g;
4042
4043         return true;
4044 }
4045
4046 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4047                                            struct kvm_vcpu *vcpu)
4048 {
4049         struct kvm_segment var;
4050
4051         /* needed to preserve selector */
4052         kvm_get_segment(vcpu, &var, seg);
4053
4054         var.base = get_desc_base(desc);
4055         var.limit = get_desc_limit(desc);
4056         if (desc->g)
4057                 var.limit = (var.limit << 12) | 0xfff;
4058         var.type = desc->type;
4059         var.present = desc->p;
4060         var.dpl = desc->dpl;
4061         var.db = desc->d;
4062         var.s = desc->s;
4063         var.l = desc->l;
4064         var.g = desc->g;
4065         var.avl = desc->avl;
4066         var.present = desc->p;
4067         var.unusable = !var.present;
4068         var.padding = 0;
4069
4070         kvm_set_segment(vcpu, &var, seg);
4071         return;
4072 }
4073
4074 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4075 {
4076         struct kvm_segment kvm_seg;
4077
4078         kvm_get_segment(vcpu, &kvm_seg, seg);
4079         return kvm_seg.selector;
4080 }
4081
4082 static void emulator_set_segment_selector(u16 sel, int seg,
4083                                           struct kvm_vcpu *vcpu)
4084 {
4085         struct kvm_segment kvm_seg;
4086
4087         kvm_get_segment(vcpu, &kvm_seg, seg);
4088         kvm_seg.selector = sel;
4089         kvm_set_segment(vcpu, &kvm_seg, seg);
4090 }
4091
4092 static struct x86_emulate_ops emulate_ops = {
4093         .read_std            = kvm_read_guest_virt_system,
4094         .write_std           = kvm_write_guest_virt_system,
4095         .fetch               = kvm_fetch_guest_virt,
4096         .read_emulated       = emulator_read_emulated,
4097         .write_emulated      = emulator_write_emulated,
4098         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4099         .pio_in_emulated     = emulator_pio_in_emulated,
4100         .pio_out_emulated    = emulator_pio_out_emulated,
4101         .get_cached_descriptor = emulator_get_cached_descriptor,
4102         .set_cached_descriptor = emulator_set_cached_descriptor,
4103         .get_segment_selector = emulator_get_segment_selector,
4104         .set_segment_selector = emulator_set_segment_selector,
4105         .get_cached_segment_base = emulator_get_cached_segment_base,
4106         .get_gdt             = emulator_get_gdt,
4107         .get_idt             = emulator_get_idt,
4108         .get_cr              = emulator_get_cr,
4109         .set_cr              = emulator_set_cr,
4110         .cpl                 = emulator_get_cpl,
4111         .get_dr              = emulator_get_dr,
4112         .set_dr              = emulator_set_dr,
4113         .set_msr             = kvm_set_msr,
4114         .get_msr             = kvm_get_msr,
4115 };
4116
4117 static void cache_all_regs(struct kvm_vcpu *vcpu)
4118 {
4119         kvm_register_read(vcpu, VCPU_REGS_RAX);
4120         kvm_register_read(vcpu, VCPU_REGS_RSP);
4121         kvm_register_read(vcpu, VCPU_REGS_RIP);
4122         vcpu->arch.regs_dirty = ~0;
4123 }
4124
4125 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4126 {
4127         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4128         /*
4129          * an sti; sti; sequence only disable interrupts for the first
4130          * instruction. So, if the last instruction, be it emulated or
4131          * not, left the system with the INT_STI flag enabled, it
4132          * means that the last instruction is an sti. We should not
4133          * leave the flag on in this case. The same goes for mov ss
4134          */
4135         if (!(int_shadow & mask))
4136                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4137 }
4138
4139 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4140 {
4141         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4142         if (ctxt->exception == PF_VECTOR)
4143                 kvm_inject_page_fault(vcpu);
4144         else if (ctxt->error_code_valid)
4145                 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4146         else
4147                 kvm_queue_exception(vcpu, ctxt->exception);
4148 }
4149
4150 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4151 {
4152         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4153         int cs_db, cs_l;
4154
4155         cache_all_regs(vcpu);
4156
4157         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4158
4159         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4160         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4161         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4162         vcpu->arch.emulate_ctxt.mode =
4163                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4164                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4165                 ? X86EMUL_MODE_VM86 : cs_l
4166                 ? X86EMUL_MODE_PROT64 : cs_db
4167                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4168         memset(c, 0, sizeof(struct decode_cache));
4169         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4170 }
4171
4172 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4173 {
4174         ++vcpu->stat.insn_emulation_fail;
4175         trace_kvm_emulate_insn_failed(vcpu);
4176         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4177         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4178         vcpu->run->internal.ndata = 0;
4179         kvm_queue_exception(vcpu, UD_VECTOR);
4180         return EMULATE_FAIL;
4181 }
4182
4183 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4184 {
4185         gpa_t gpa;
4186
4187         if (tdp_enabled)
4188                 return false;
4189
4190         /*
4191          * if emulation was due to access to shadowed page table
4192          * and it failed try to unshadow page and re-entetr the
4193          * guest to let CPU execute the instruction.
4194          */
4195         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4196                 return true;
4197
4198         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4199
4200         if (gpa == UNMAPPED_GVA)
4201                 return true; /* let cpu generate fault */
4202
4203         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4204                 return true;
4205
4206         return false;
4207 }
4208
4209 int emulate_instruction(struct kvm_vcpu *vcpu,
4210                         unsigned long cr2,
4211                         u16 error_code,
4212                         int emulation_type)
4213 {
4214         int r;
4215         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4216
4217         kvm_clear_exception_queue(vcpu);
4218         vcpu->arch.mmio_fault_cr2 = cr2;
4219         /*
4220          * TODO: fix emulate.c to use guest_read/write_register
4221          * instead of direct ->regs accesses, can save hundred cycles
4222          * on Intel for instructions that don't read/change RSP, for
4223          * for example.
4224          */
4225         cache_all_regs(vcpu);
4226
4227         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4228                 init_emulate_ctxt(vcpu);
4229                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4230                 vcpu->arch.emulate_ctxt.exception = -1;
4231                 vcpu->arch.emulate_ctxt.perm_ok = false;
4232
4233                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4234                 trace_kvm_emulate_insn_start(vcpu);
4235
4236                 /* Only allow emulation of specific instructions on #UD
4237                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4238                 if (emulation_type & EMULTYPE_TRAP_UD) {
4239                         if (!c->twobyte)
4240                                 return EMULATE_FAIL;
4241                         switch (c->b) {
4242                         case 0x01: /* VMMCALL */
4243                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4244                                         return EMULATE_FAIL;
4245                                 break;
4246                         case 0x34: /* sysenter */
4247                         case 0x35: /* sysexit */
4248                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4249                                         return EMULATE_FAIL;
4250                                 break;
4251                         case 0x05: /* syscall */
4252                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4253                                         return EMULATE_FAIL;
4254                                 break;
4255                         default:
4256                                 return EMULATE_FAIL;
4257                         }
4258
4259                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4260                                 return EMULATE_FAIL;
4261                 }
4262
4263                 ++vcpu->stat.insn_emulation;
4264                 if (r)  {
4265                         if (reexecute_instruction(vcpu, cr2))
4266                                 return EMULATE_DONE;
4267                         if (emulation_type & EMULTYPE_SKIP)
4268                                 return EMULATE_FAIL;
4269                         return handle_emulation_failure(vcpu);
4270                 }
4271         }
4272
4273         if (emulation_type & EMULTYPE_SKIP) {
4274                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4275                 return EMULATE_DONE;
4276         }
4277
4278         /* this is needed for vmware backdor interface to work since it
4279            changes registers values  during IO operation */
4280         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4281
4282 restart:
4283         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4284
4285         if (r == EMULATION_FAILED) {
4286                 if (reexecute_instruction(vcpu, cr2))
4287                         return EMULATE_DONE;
4288
4289                 return handle_emulation_failure(vcpu);
4290         }
4291
4292         if (vcpu->arch.emulate_ctxt.exception >= 0) {
4293                 inject_emulated_exception(vcpu);
4294                 r = EMULATE_DONE;
4295         } else if (vcpu->arch.pio.count) {
4296                 if (!vcpu->arch.pio.in)
4297                         vcpu->arch.pio.count = 0;
4298                 r = EMULATE_DO_MMIO;
4299         } else if (vcpu->mmio_needed) {
4300                 if (vcpu->mmio_is_write)
4301                         vcpu->mmio_needed = 0;
4302                 r = EMULATE_DO_MMIO;
4303         } else if (r == EMULATION_RESTART)
4304                 goto restart;
4305         else
4306                 r = EMULATE_DONE;
4307
4308         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4309         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4310         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4311         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4312
4313         return r;
4314 }
4315 EXPORT_SYMBOL_GPL(emulate_instruction);
4316
4317 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4318 {
4319         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4320         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4321         /* do not return to emulator after return from userspace */
4322         vcpu->arch.pio.count = 0;
4323         return ret;
4324 }
4325 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4326
4327 static void tsc_bad(void *info)
4328 {
4329         __get_cpu_var(cpu_tsc_khz) = 0;
4330 }
4331
4332 static void tsc_khz_changed(void *data)
4333 {
4334         struct cpufreq_freqs *freq = data;
4335         unsigned long khz = 0;
4336
4337         if (data)
4338                 khz = freq->new;
4339         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4340                 khz = cpufreq_quick_get(raw_smp_processor_id());
4341         if (!khz)
4342                 khz = tsc_khz;
4343         __get_cpu_var(cpu_tsc_khz) = khz;
4344 }
4345
4346 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4347                                      void *data)
4348 {
4349         struct cpufreq_freqs *freq = data;
4350         struct kvm *kvm;
4351         struct kvm_vcpu *vcpu;
4352         int i, send_ipi = 0;
4353
4354         /*
4355          * We allow guests to temporarily run on slowing clocks,
4356          * provided we notify them after, or to run on accelerating
4357          * clocks, provided we notify them before.  Thus time never
4358          * goes backwards.
4359          *
4360          * However, we have a problem.  We can't atomically update
4361          * the frequency of a given CPU from this function; it is
4362          * merely a notifier, which can be called from any CPU.
4363          * Changing the TSC frequency at arbitrary points in time
4364          * requires a recomputation of local variables related to
4365          * the TSC for each VCPU.  We must flag these local variables
4366          * to be updated and be sure the update takes place with the
4367          * new frequency before any guests proceed.
4368          *
4369          * Unfortunately, the combination of hotplug CPU and frequency
4370          * change creates an intractable locking scenario; the order
4371          * of when these callouts happen is undefined with respect to
4372          * CPU hotplug, and they can race with each other.  As such,
4373          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4374          * undefined; you can actually have a CPU frequency change take
4375          * place in between the computation of X and the setting of the
4376          * variable.  To protect against this problem, all updates of
4377          * the per_cpu tsc_khz variable are done in an interrupt
4378          * protected IPI, and all callers wishing to update the value
4379          * must wait for a synchronous IPI to complete (which is trivial
4380          * if the caller is on the CPU already).  This establishes the
4381          * necessary total order on variable updates.
4382          *
4383          * Note that because a guest time update may take place
4384          * anytime after the setting of the VCPU's request bit, the
4385          * correct TSC value must be set before the request.  However,
4386          * to ensure the update actually makes it to any guest which
4387          * starts running in hardware virtualization between the set
4388          * and the acquisition of the spinlock, we must also ping the
4389          * CPU after setting the request bit.
4390          *
4391          */
4392
4393         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4394                 return 0;
4395         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4396                 return 0;
4397
4398         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4399
4400         spin_lock(&kvm_lock);
4401         list_for_each_entry(kvm, &vm_list, vm_list) {
4402                 kvm_for_each_vcpu(i, vcpu, kvm) {
4403                         if (vcpu->cpu != freq->cpu)
4404                                 continue;
4405                         if (!kvm_request_guest_time_update(vcpu))
4406                                 continue;
4407                         if (vcpu->cpu != smp_processor_id())
4408                                 send_ipi = 1;
4409                 }
4410         }
4411         spin_unlock(&kvm_lock);
4412
4413         if (freq->old < freq->new && send_ipi) {
4414                 /*
4415                  * We upscale the frequency.  Must make the guest
4416                  * doesn't see old kvmclock values while running with
4417                  * the new frequency, otherwise we risk the guest sees
4418                  * time go backwards.
4419                  *
4420                  * In case we update the frequency for another cpu
4421                  * (which might be in guest context) send an interrupt
4422                  * to kick the cpu out of guest context.  Next time
4423                  * guest context is entered kvmclock will be updated,
4424                  * so the guest will not see stale values.
4425                  */
4426                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4427         }
4428         return 0;
4429 }
4430
4431 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4432         .notifier_call  = kvmclock_cpufreq_notifier
4433 };
4434
4435 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4436                                         unsigned long action, void *hcpu)
4437 {
4438         unsigned int cpu = (unsigned long)hcpu;
4439
4440         switch (action) {
4441                 case CPU_ONLINE:
4442                 case CPU_DOWN_FAILED:
4443                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4444                         break;
4445                 case CPU_DOWN_PREPARE:
4446                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4447                         break;
4448         }
4449         return NOTIFY_OK;
4450 }
4451
4452 static struct notifier_block kvmclock_cpu_notifier_block = {
4453         .notifier_call  = kvmclock_cpu_notifier,
4454         .priority = -INT_MAX
4455 };
4456
4457 static void kvm_timer_init(void)
4458 {
4459         int cpu;
4460
4461         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4462         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4463                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4464                                           CPUFREQ_TRANSITION_NOTIFIER);
4465         }
4466         for_each_online_cpu(cpu)
4467                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4468 }
4469
4470 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4471
4472 static int kvm_is_in_guest(void)
4473 {
4474         return percpu_read(current_vcpu) != NULL;
4475 }
4476
4477 static int kvm_is_user_mode(void)
4478 {
4479         int user_mode = 3;
4480
4481         if (percpu_read(current_vcpu))
4482                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4483
4484         return user_mode != 0;
4485 }
4486
4487 static unsigned long kvm_get_guest_ip(void)
4488 {
4489         unsigned long ip = 0;
4490
4491         if (percpu_read(current_vcpu))
4492                 ip = kvm_rip_read(percpu_read(current_vcpu));
4493
4494         return ip;
4495 }
4496
4497 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4498         .is_in_guest            = kvm_is_in_guest,
4499         .is_user_mode           = kvm_is_user_mode,
4500         .get_guest_ip           = kvm_get_guest_ip,
4501 };
4502
4503 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4504 {
4505         percpu_write(current_vcpu, vcpu);
4506 }
4507 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4508
4509 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4510 {
4511         percpu_write(current_vcpu, NULL);
4512 }
4513 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4514
4515 int kvm_arch_init(void *opaque)
4516 {
4517         int r;
4518         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4519
4520         if (kvm_x86_ops) {
4521                 printk(KERN_ERR "kvm: already loaded the other module\n");
4522                 r = -EEXIST;
4523                 goto out;
4524         }
4525
4526         if (!ops->cpu_has_kvm_support()) {
4527                 printk(KERN_ERR "kvm: no hardware support\n");
4528                 r = -EOPNOTSUPP;
4529                 goto out;
4530         }
4531         if (ops->disabled_by_bios()) {
4532                 printk(KERN_ERR "kvm: disabled by bios\n");
4533                 r = -EOPNOTSUPP;
4534                 goto out;
4535         }
4536
4537         r = kvm_mmu_module_init();
4538         if (r)
4539                 goto out;
4540
4541         kvm_init_msr_list();
4542
4543         kvm_x86_ops = ops;
4544         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4545         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4546         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4547                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4548
4549         kvm_timer_init();
4550
4551         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4552
4553         if (cpu_has_xsave)
4554                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4555
4556         return 0;
4557
4558 out:
4559         return r;
4560 }
4561
4562 void kvm_arch_exit(void)
4563 {
4564         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4565
4566         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4567                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4568                                             CPUFREQ_TRANSITION_NOTIFIER);
4569         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4570         kvm_x86_ops = NULL;
4571         kvm_mmu_module_exit();
4572 }
4573
4574 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4575 {
4576         ++vcpu->stat.halt_exits;
4577         if (irqchip_in_kernel(vcpu->kvm)) {
4578                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4579                 return 1;
4580         } else {
4581                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4582                 return 0;
4583         }
4584 }
4585 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4586
4587 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4588                            unsigned long a1)
4589 {
4590         if (is_long_mode(vcpu))
4591                 return a0;
4592         else
4593                 return a0 | ((gpa_t)a1 << 32);
4594 }
4595
4596 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4597 {
4598         u64 param, ingpa, outgpa, ret;
4599         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4600         bool fast, longmode;
4601         int cs_db, cs_l;
4602
4603         /*
4604          * hypercall generates UD from non zero cpl and real mode
4605          * per HYPER-V spec
4606          */
4607         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4608                 kvm_queue_exception(vcpu, UD_VECTOR);
4609                 return 0;
4610         }
4611
4612         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4613         longmode = is_long_mode(vcpu) && cs_l == 1;
4614
4615         if (!longmode) {
4616                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4617                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4618                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4619                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4620                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4621                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4622         }
4623 #ifdef CONFIG_X86_64
4624         else {
4625                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4626                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4627                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4628         }
4629 #endif
4630
4631         code = param & 0xffff;
4632         fast = (param >> 16) & 0x1;
4633         rep_cnt = (param >> 32) & 0xfff;
4634         rep_idx = (param >> 48) & 0xfff;
4635
4636         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4637
4638         switch (code) {
4639         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4640                 kvm_vcpu_on_spin(vcpu);
4641                 break;
4642         default:
4643                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4644                 break;
4645         }
4646
4647         ret = res | (((u64)rep_done & 0xfff) << 32);
4648         if (longmode) {
4649                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4650         } else {
4651                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4652                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4653         }
4654
4655         return 1;
4656 }
4657
4658 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4659 {
4660         unsigned long nr, a0, a1, a2, a3, ret;
4661         int r = 1;
4662
4663         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4664                 return kvm_hv_hypercall(vcpu);
4665
4666         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4667         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4668         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4669         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4670         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4671
4672         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4673
4674         if (!is_long_mode(vcpu)) {
4675                 nr &= 0xFFFFFFFF;
4676                 a0 &= 0xFFFFFFFF;
4677                 a1 &= 0xFFFFFFFF;
4678                 a2 &= 0xFFFFFFFF;
4679                 a3 &= 0xFFFFFFFF;
4680         }
4681
4682         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4683                 ret = -KVM_EPERM;
4684                 goto out;
4685         }
4686
4687         switch (nr) {
4688         case KVM_HC_VAPIC_POLL_IRQ:
4689                 ret = 0;
4690                 break;
4691         case KVM_HC_MMU_OP:
4692                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4693                 break;
4694         default:
4695                 ret = -KVM_ENOSYS;
4696                 break;
4697         }
4698 out:
4699         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4700         ++vcpu->stat.hypercalls;
4701         return r;
4702 }
4703 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4704
4705 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4706 {
4707         char instruction[3];
4708         unsigned long rip = kvm_rip_read(vcpu);
4709
4710         /*
4711          * Blow out the MMU to ensure that no other VCPU has an active mapping
4712          * to ensure that the updated hypercall appears atomically across all
4713          * VCPUs.
4714          */
4715         kvm_mmu_zap_all(vcpu->kvm);
4716
4717         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4718
4719         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4720 }
4721
4722 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4723 {
4724         struct desc_ptr dt = { limit, base };
4725
4726         kvm_x86_ops->set_gdt(vcpu, &dt);
4727 }
4728
4729 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4730 {
4731         struct desc_ptr dt = { limit, base };
4732
4733         kvm_x86_ops->set_idt(vcpu, &dt);
4734 }
4735
4736 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4737 {
4738         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4739         int j, nent = vcpu->arch.cpuid_nent;
4740
4741         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4742         /* when no next entry is found, the current entry[i] is reselected */
4743         for (j = i + 1; ; j = (j + 1) % nent) {
4744                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4745                 if (ej->function == e->function) {
4746                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4747                         return j;
4748                 }
4749         }
4750         return 0; /* silence gcc, even though control never reaches here */
4751 }
4752
4753 /* find an entry with matching function, matching index (if needed), and that
4754  * should be read next (if it's stateful) */
4755 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4756         u32 function, u32 index)
4757 {
4758         if (e->function != function)
4759                 return 0;
4760         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4761                 return 0;
4762         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4763             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4764                 return 0;
4765         return 1;
4766 }
4767
4768 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4769                                               u32 function, u32 index)
4770 {
4771         int i;
4772         struct kvm_cpuid_entry2 *best = NULL;
4773
4774         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4775                 struct kvm_cpuid_entry2 *e;
4776
4777                 e = &vcpu->arch.cpuid_entries[i];
4778                 if (is_matching_cpuid_entry(e, function, index)) {
4779                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4780                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4781                         best = e;
4782                         break;
4783                 }
4784                 /*
4785                  * Both basic or both extended?
4786                  */
4787                 if (((e->function ^ function) & 0x80000000) == 0)
4788                         if (!best || e->function > best->function)
4789                                 best = e;
4790         }
4791         return best;
4792 }
4793 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4794
4795 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4796 {
4797         struct kvm_cpuid_entry2 *best;
4798
4799         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4800         if (!best || best->eax < 0x80000008)
4801                 goto not_found;
4802         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4803         if (best)
4804                 return best->eax & 0xff;
4805 not_found:
4806         return 36;
4807 }
4808
4809 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4810 {
4811         u32 function, index;
4812         struct kvm_cpuid_entry2 *best;
4813
4814         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4815         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4816         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4817         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4818         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4819         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4820         best = kvm_find_cpuid_entry(vcpu, function, index);
4821         if (best) {
4822                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4823                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4824                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4825                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4826         }
4827         kvm_x86_ops->skip_emulated_instruction(vcpu);
4828         trace_kvm_cpuid(function,
4829                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4830                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4831                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4832                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4833 }
4834 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4835
4836 /*
4837  * Check if userspace requested an interrupt window, and that the
4838  * interrupt window is open.
4839  *
4840  * No need to exit to userspace if we already have an interrupt queued.
4841  */
4842 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4843 {
4844         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4845                 vcpu->run->request_interrupt_window &&
4846                 kvm_arch_interrupt_allowed(vcpu));
4847 }
4848
4849 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4850 {
4851         struct kvm_run *kvm_run = vcpu->run;
4852
4853         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4854         kvm_run->cr8 = kvm_get_cr8(vcpu);
4855         kvm_run->apic_base = kvm_get_apic_base(vcpu);
4856         if (irqchip_in_kernel(vcpu->kvm))
4857                 kvm_run->ready_for_interrupt_injection = 1;
4858         else
4859                 kvm_run->ready_for_interrupt_injection =
4860                         kvm_arch_interrupt_allowed(vcpu) &&
4861                         !kvm_cpu_has_interrupt(vcpu) &&
4862                         !kvm_event_needs_reinjection(vcpu);
4863 }
4864
4865 static void vapic_enter(struct kvm_vcpu *vcpu)
4866 {
4867         struct kvm_lapic *apic = vcpu->arch.apic;
4868         struct page *page;
4869
4870         if (!apic || !apic->vapic_addr)
4871                 return;
4872
4873         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4874
4875         vcpu->arch.apic->vapic_page = page;
4876 }
4877
4878 static void vapic_exit(struct kvm_vcpu *vcpu)
4879 {
4880         struct kvm_lapic *apic = vcpu->arch.apic;
4881         int idx;
4882
4883         if (!apic || !apic->vapic_addr)
4884                 return;
4885
4886         idx = srcu_read_lock(&vcpu->kvm->srcu);
4887         kvm_release_page_dirty(apic->vapic_page);
4888         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4889         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4890 }
4891
4892 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4893 {
4894         int max_irr, tpr;
4895
4896         if (!kvm_x86_ops->update_cr8_intercept)
4897                 return;
4898
4899         if (!vcpu->arch.apic)
4900                 return;
4901
4902         if (!vcpu->arch.apic->vapic_addr)
4903                 max_irr = kvm_lapic_find_highest_irr(vcpu);
4904         else
4905                 max_irr = -1;
4906
4907         if (max_irr != -1)
4908                 max_irr >>= 4;
4909
4910         tpr = kvm_lapic_get_cr8(vcpu);
4911
4912         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4913 }
4914
4915 static void inject_pending_event(struct kvm_vcpu *vcpu)
4916 {
4917         /* try to reinject previous events if any */
4918         if (vcpu->arch.exception.pending) {
4919                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4920                                         vcpu->arch.exception.has_error_code,
4921                                         vcpu->arch.exception.error_code);
4922                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4923                                           vcpu->arch.exception.has_error_code,
4924                                           vcpu->arch.exception.error_code,
4925                                           vcpu->arch.exception.reinject);
4926                 return;
4927         }
4928
4929         if (vcpu->arch.nmi_injected) {
4930                 kvm_x86_ops->set_nmi(vcpu);
4931                 return;
4932         }
4933
4934         if (vcpu->arch.interrupt.pending) {
4935                 kvm_x86_ops->set_irq(vcpu);
4936                 return;
4937         }
4938
4939         /* try to inject new event if pending */
4940         if (vcpu->arch.nmi_pending) {
4941                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4942                         vcpu->arch.nmi_pending = false;
4943                         vcpu->arch.nmi_injected = true;
4944                         kvm_x86_ops->set_nmi(vcpu);
4945                 }
4946         } else if (kvm_cpu_has_interrupt(vcpu)) {
4947                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4948                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4949                                             false);
4950                         kvm_x86_ops->set_irq(vcpu);
4951                 }
4952         }
4953 }
4954
4955 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4956 {
4957         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4958                         !vcpu->guest_xcr0_loaded) {
4959                 /* kvm_set_xcr() also depends on this */
4960                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4961                 vcpu->guest_xcr0_loaded = 1;
4962         }
4963 }
4964
4965 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4966 {
4967         if (vcpu->guest_xcr0_loaded) {
4968                 if (vcpu->arch.xcr0 != host_xcr0)
4969                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4970                 vcpu->guest_xcr0_loaded = 0;
4971         }
4972 }
4973
4974 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4975 {
4976         int r;
4977         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4978                 vcpu->run->request_interrupt_window;
4979
4980         if (vcpu->requests) {
4981                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
4982                         kvm_mmu_unload(vcpu);
4983                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
4984                         __kvm_migrate_timers(vcpu);
4985                 if (kvm_check_request(KVM_REQ_KVMCLOCK_UPDATE, vcpu)) {
4986                         r = kvm_write_guest_time(vcpu);
4987                         if (unlikely(r))
4988                                 goto out;
4989                 }
4990                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
4991                         kvm_mmu_sync_roots(vcpu);
4992                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
4993                         kvm_x86_ops->tlb_flush(vcpu);
4994                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
4995                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4996                         r = 0;
4997                         goto out;
4998                 }
4999                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5000                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5001                         r = 0;
5002                         goto out;
5003                 }
5004                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5005                         vcpu->fpu_active = 0;
5006                         kvm_x86_ops->fpu_deactivate(vcpu);
5007                 }
5008         }
5009
5010         r = kvm_mmu_reload(vcpu);
5011         if (unlikely(r))
5012                 goto out;
5013
5014         preempt_disable();
5015
5016         kvm_x86_ops->prepare_guest_switch(vcpu);
5017         if (vcpu->fpu_active)
5018                 kvm_load_guest_fpu(vcpu);
5019         kvm_load_guest_xcr0(vcpu);
5020
5021         atomic_set(&vcpu->guest_mode, 1);
5022         smp_wmb();
5023
5024         local_irq_disable();
5025
5026         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5027             || need_resched() || signal_pending(current)) {
5028                 atomic_set(&vcpu->guest_mode, 0);
5029                 smp_wmb();
5030                 local_irq_enable();
5031                 preempt_enable();
5032                 r = 1;
5033                 goto out;
5034         }
5035
5036         inject_pending_event(vcpu);
5037
5038         /* enable NMI/IRQ window open exits if needed */
5039         if (vcpu->arch.nmi_pending)
5040                 kvm_x86_ops->enable_nmi_window(vcpu);
5041         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5042                 kvm_x86_ops->enable_irq_window(vcpu);
5043
5044         if (kvm_lapic_enabled(vcpu)) {
5045                 update_cr8_intercept(vcpu);
5046                 kvm_lapic_sync_to_vapic(vcpu);
5047         }
5048
5049         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5050
5051         kvm_guest_enter();
5052
5053         if (unlikely(vcpu->arch.switch_db_regs)) {
5054                 set_debugreg(0, 7);
5055                 set_debugreg(vcpu->arch.eff_db[0], 0);
5056                 set_debugreg(vcpu->arch.eff_db[1], 1);
5057                 set_debugreg(vcpu->arch.eff_db[2], 2);
5058                 set_debugreg(vcpu->arch.eff_db[3], 3);
5059         }
5060
5061         trace_kvm_entry(vcpu->vcpu_id);
5062         kvm_x86_ops->run(vcpu);
5063
5064         /*
5065          * If the guest has used debug registers, at least dr7
5066          * will be disabled while returning to the host.
5067          * If we don't have active breakpoints in the host, we don't
5068          * care about the messed up debug address registers. But if
5069          * we have some of them active, restore the old state.
5070          */
5071         if (hw_breakpoint_active())
5072                 hw_breakpoint_restore();
5073
5074         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5075
5076         atomic_set(&vcpu->guest_mode, 0);
5077         smp_wmb();
5078         local_irq_enable();
5079
5080         ++vcpu->stat.exits;
5081
5082         /*
5083          * We must have an instruction between local_irq_enable() and
5084          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5085          * the interrupt shadow.  The stat.exits increment will do nicely.
5086          * But we need to prevent reordering, hence this barrier():
5087          */
5088         barrier();
5089
5090         kvm_guest_exit();
5091
5092         preempt_enable();
5093
5094         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5095
5096         /*
5097          * Profile KVM exit RIPs:
5098          */
5099         if (unlikely(prof_on == KVM_PROFILING)) {
5100                 unsigned long rip = kvm_rip_read(vcpu);
5101                 profile_hit(KVM_PROFILING, (void *)rip);
5102         }
5103
5104
5105         kvm_lapic_sync_from_vapic(vcpu);
5106
5107         r = kvm_x86_ops->handle_exit(vcpu);
5108 out:
5109         return r;
5110 }
5111
5112
5113 static int __vcpu_run(struct kvm_vcpu *vcpu)
5114 {
5115         int r;
5116         struct kvm *kvm = vcpu->kvm;
5117
5118         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5119                 pr_debug("vcpu %d received sipi with vector # %x\n",
5120                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5121                 kvm_lapic_reset(vcpu);
5122                 r = kvm_arch_vcpu_reset(vcpu);
5123                 if (r)
5124                         return r;
5125                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5126         }
5127
5128         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5129         vapic_enter(vcpu);
5130
5131         r = 1;
5132         while (r > 0) {
5133                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
5134                         r = vcpu_enter_guest(vcpu);
5135                 else {
5136                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5137                         kvm_vcpu_block(vcpu);
5138                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5139                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5140                         {
5141                                 switch(vcpu->arch.mp_state) {
5142                                 case KVM_MP_STATE_HALTED:
5143                                         vcpu->arch.mp_state =
5144                                                 KVM_MP_STATE_RUNNABLE;
5145                                 case KVM_MP_STATE_RUNNABLE:
5146                                         break;
5147                                 case KVM_MP_STATE_SIPI_RECEIVED:
5148                                 default:
5149                                         r = -EINTR;
5150                                         break;
5151                                 }
5152                         }
5153                 }
5154
5155                 if (r <= 0)
5156                         break;
5157
5158                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5159                 if (kvm_cpu_has_pending_timer(vcpu))
5160                         kvm_inject_pending_timer_irqs(vcpu);
5161
5162                 if (dm_request_for_irq_injection(vcpu)) {
5163                         r = -EINTR;
5164                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5165                         ++vcpu->stat.request_irq_exits;
5166                 }
5167                 if (signal_pending(current)) {
5168                         r = -EINTR;
5169                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5170                         ++vcpu->stat.signal_exits;
5171                 }
5172                 if (need_resched()) {
5173                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5174                         kvm_resched(vcpu);
5175                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5176                 }
5177         }
5178
5179         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5180
5181         vapic_exit(vcpu);
5182
5183         return r;
5184 }
5185
5186 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5187 {
5188         int r;
5189         sigset_t sigsaved;
5190
5191         if (vcpu->sigset_active)
5192                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5193
5194         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5195                 kvm_vcpu_block(vcpu);
5196                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5197                 r = -EAGAIN;
5198                 goto out;
5199         }
5200
5201         /* re-sync apic's tpr */
5202         if (!irqchip_in_kernel(vcpu->kvm))
5203                 kvm_set_cr8(vcpu, kvm_run->cr8);
5204
5205         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5206                 if (vcpu->mmio_needed) {
5207                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5208                         vcpu->mmio_read_completed = 1;
5209                         vcpu->mmio_needed = 0;
5210                 }
5211                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5212                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5213                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5214                 if (r != EMULATE_DONE) {
5215                         r = 0;
5216                         goto out;
5217                 }
5218         }
5219         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5220                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5221                                      kvm_run->hypercall.ret);
5222
5223         r = __vcpu_run(vcpu);
5224
5225 out:
5226         post_kvm_run_save(vcpu);
5227         if (vcpu->sigset_active)
5228                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5229
5230         return r;
5231 }
5232
5233 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5234 {
5235         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5236         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5237         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5238         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5239         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5240         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5241         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5242         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5243 #ifdef CONFIG_X86_64
5244         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5245         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5246         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5247         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5248         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5249         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5250         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5251         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5252 #endif
5253
5254         regs->rip = kvm_rip_read(vcpu);
5255         regs->rflags = kvm_get_rflags(vcpu);
5256
5257         return 0;
5258 }
5259
5260 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5261 {
5262         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5263         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5264         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5265         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5266         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5267         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5268         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5269         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5270 #ifdef CONFIG_X86_64
5271         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5272         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5273         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5274         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5275         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5276         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5277         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5278         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5279 #endif
5280
5281         kvm_rip_write(vcpu, regs->rip);
5282         kvm_set_rflags(vcpu, regs->rflags);
5283
5284         vcpu->arch.exception.pending = false;
5285
5286         return 0;
5287 }
5288
5289 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5290 {
5291         struct kvm_segment cs;
5292
5293         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5294         *db = cs.db;
5295         *l = cs.l;
5296 }
5297 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5298
5299 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5300                                   struct kvm_sregs *sregs)
5301 {
5302         struct desc_ptr dt;
5303
5304         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5305         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5306         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5307         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5308         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5309         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5310
5311         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5312         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5313
5314         kvm_x86_ops->get_idt(vcpu, &dt);
5315         sregs->idt.limit = dt.size;
5316         sregs->idt.base = dt.address;
5317         kvm_x86_ops->get_gdt(vcpu, &dt);
5318         sregs->gdt.limit = dt.size;
5319         sregs->gdt.base = dt.address;
5320
5321         sregs->cr0 = kvm_read_cr0(vcpu);
5322         sregs->cr2 = vcpu->arch.cr2;
5323         sregs->cr3 = vcpu->arch.cr3;
5324         sregs->cr4 = kvm_read_cr4(vcpu);
5325         sregs->cr8 = kvm_get_cr8(vcpu);
5326         sregs->efer = vcpu->arch.efer;
5327         sregs->apic_base = kvm_get_apic_base(vcpu);
5328
5329         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5330
5331         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5332                 set_bit(vcpu->arch.interrupt.nr,
5333                         (unsigned long *)sregs->interrupt_bitmap);
5334
5335         return 0;
5336 }
5337
5338 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5339                                     struct kvm_mp_state *mp_state)
5340 {
5341         mp_state->mp_state = vcpu->arch.mp_state;
5342         return 0;
5343 }
5344
5345 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5346                                     struct kvm_mp_state *mp_state)
5347 {
5348         vcpu->arch.mp_state = mp_state->mp_state;
5349         return 0;
5350 }
5351
5352 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5353                     bool has_error_code, u32 error_code)
5354 {
5355         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5356         int ret;
5357
5358         init_emulate_ctxt(vcpu);
5359
5360         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5361                                    tss_selector, reason, has_error_code,
5362                                    error_code);
5363
5364         if (ret)
5365                 return EMULATE_FAIL;
5366
5367         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5368         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5369         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5370         return EMULATE_DONE;
5371 }
5372 EXPORT_SYMBOL_GPL(kvm_task_switch);
5373
5374 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5375                                   struct kvm_sregs *sregs)
5376 {
5377         int mmu_reset_needed = 0;
5378         int pending_vec, max_bits;
5379         struct desc_ptr dt;
5380
5381         dt.size = sregs->idt.limit;
5382         dt.address = sregs->idt.base;
5383         kvm_x86_ops->set_idt(vcpu, &dt);
5384         dt.size = sregs->gdt.limit;
5385         dt.address = sregs->gdt.base;
5386         kvm_x86_ops->set_gdt(vcpu, &dt);
5387
5388         vcpu->arch.cr2 = sregs->cr2;
5389         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5390         vcpu->arch.cr3 = sregs->cr3;
5391
5392         kvm_set_cr8(vcpu, sregs->cr8);
5393
5394         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5395         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5396         kvm_set_apic_base(vcpu, sregs->apic_base);
5397
5398         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5399         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5400         vcpu->arch.cr0 = sregs->cr0;
5401
5402         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5403         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5404         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5405                 load_pdptrs(vcpu, vcpu->arch.cr3);
5406                 mmu_reset_needed = 1;
5407         }
5408
5409         if (mmu_reset_needed)
5410                 kvm_mmu_reset_context(vcpu);
5411
5412         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5413         pending_vec = find_first_bit(
5414                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5415         if (pending_vec < max_bits) {
5416                 kvm_queue_interrupt(vcpu, pending_vec, false);
5417                 pr_debug("Set back pending irq %d\n", pending_vec);
5418                 if (irqchip_in_kernel(vcpu->kvm))
5419                         kvm_pic_clear_isr_ack(vcpu->kvm);
5420         }
5421
5422         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5423         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5424         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5425         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5426         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5427         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5428
5429         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5430         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5431
5432         update_cr8_intercept(vcpu);
5433
5434         /* Older userspace won't unhalt the vcpu on reset. */
5435         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5436             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5437             !is_protmode(vcpu))
5438                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5439
5440         return 0;
5441 }
5442
5443 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5444                                         struct kvm_guest_debug *dbg)
5445 {
5446         unsigned long rflags;
5447         int i, r;
5448
5449         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5450                 r = -EBUSY;
5451                 if (vcpu->arch.exception.pending)
5452                         goto out;
5453                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5454                         kvm_queue_exception(vcpu, DB_VECTOR);
5455                 else
5456                         kvm_queue_exception(vcpu, BP_VECTOR);
5457         }
5458
5459         /*
5460          * Read rflags as long as potentially injected trace flags are still
5461          * filtered out.
5462          */
5463         rflags = kvm_get_rflags(vcpu);
5464
5465         vcpu->guest_debug = dbg->control;
5466         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5467                 vcpu->guest_debug = 0;
5468
5469         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5470                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5471                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5472                 vcpu->arch.switch_db_regs =
5473                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5474         } else {
5475                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5476                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5477                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5478         }
5479
5480         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5481                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5482                         get_segment_base(vcpu, VCPU_SREG_CS);
5483
5484         /*
5485          * Trigger an rflags update that will inject or remove the trace
5486          * flags.
5487          */
5488         kvm_set_rflags(vcpu, rflags);
5489
5490         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5491
5492         r = 0;
5493
5494 out:
5495
5496         return r;
5497 }
5498
5499 /*
5500  * Translate a guest virtual address to a guest physical address.
5501  */
5502 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5503                                     struct kvm_translation *tr)
5504 {
5505         unsigned long vaddr = tr->linear_address;
5506         gpa_t gpa;
5507         int idx;
5508
5509         idx = srcu_read_lock(&vcpu->kvm->srcu);
5510         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5511         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5512         tr->physical_address = gpa;
5513         tr->valid = gpa != UNMAPPED_GVA;
5514         tr->writeable = 1;
5515         tr->usermode = 0;
5516
5517         return 0;
5518 }
5519
5520 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5521 {
5522         struct i387_fxsave_struct *fxsave =
5523                         &vcpu->arch.guest_fpu.state->fxsave;
5524
5525         memcpy(fpu->fpr, fxsave->st_space, 128);
5526         fpu->fcw = fxsave->cwd;
5527         fpu->fsw = fxsave->swd;
5528         fpu->ftwx = fxsave->twd;
5529         fpu->last_opcode = fxsave->fop;
5530         fpu->last_ip = fxsave->rip;
5531         fpu->last_dp = fxsave->rdp;
5532         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5533
5534         return 0;
5535 }
5536
5537 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5538 {
5539         struct i387_fxsave_struct *fxsave =
5540                         &vcpu->arch.guest_fpu.state->fxsave;
5541
5542         memcpy(fxsave->st_space, fpu->fpr, 128);
5543         fxsave->cwd = fpu->fcw;
5544         fxsave->swd = fpu->fsw;
5545         fxsave->twd = fpu->ftwx;
5546         fxsave->fop = fpu->last_opcode;
5547         fxsave->rip = fpu->last_ip;
5548         fxsave->rdp = fpu->last_dp;
5549         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5550
5551         return 0;
5552 }
5553
5554 int fx_init(struct kvm_vcpu *vcpu)
5555 {
5556         int err;
5557
5558         err = fpu_alloc(&vcpu->arch.guest_fpu);
5559         if (err)
5560                 return err;
5561
5562         fpu_finit(&vcpu->arch.guest_fpu);
5563
5564         /*
5565          * Ensure guest xcr0 is valid for loading
5566          */
5567         vcpu->arch.xcr0 = XSTATE_FP;
5568
5569         vcpu->arch.cr0 |= X86_CR0_ET;
5570
5571         return 0;
5572 }
5573 EXPORT_SYMBOL_GPL(fx_init);
5574
5575 static void fx_free(struct kvm_vcpu *vcpu)
5576 {
5577         fpu_free(&vcpu->arch.guest_fpu);
5578 }
5579
5580 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5581 {
5582         if (vcpu->guest_fpu_loaded)
5583                 return;
5584
5585         /*
5586          * Restore all possible states in the guest,
5587          * and assume host would use all available bits.
5588          * Guest xcr0 would be loaded later.
5589          */
5590         kvm_put_guest_xcr0(vcpu);
5591         vcpu->guest_fpu_loaded = 1;
5592         unlazy_fpu(current);
5593         fpu_restore_checking(&vcpu->arch.guest_fpu);
5594         trace_kvm_fpu(1);
5595 }
5596
5597 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5598 {
5599         kvm_put_guest_xcr0(vcpu);
5600
5601         if (!vcpu->guest_fpu_loaded)
5602                 return;
5603
5604         vcpu->guest_fpu_loaded = 0;
5605         fpu_save_init(&vcpu->arch.guest_fpu);
5606         ++vcpu->stat.fpu_reload;
5607         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5608         trace_kvm_fpu(0);
5609 }
5610
5611 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5612 {
5613         if (vcpu->arch.time_page) {
5614                 kvm_release_page_dirty(vcpu->arch.time_page);
5615                 vcpu->arch.time_page = NULL;
5616         }
5617
5618         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5619         fx_free(vcpu);
5620         kvm_x86_ops->vcpu_free(vcpu);
5621 }
5622
5623 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5624                                                 unsigned int id)
5625 {
5626         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5627                 printk_once(KERN_WARNING
5628                 "kvm: SMP vm created on host with unstable TSC; "
5629                 "guest TSC will not be reliable\n");
5630         return kvm_x86_ops->vcpu_create(kvm, id);
5631 }
5632
5633 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5634 {
5635         int r;
5636
5637         vcpu->arch.mtrr_state.have_fixed = 1;
5638         vcpu_load(vcpu);
5639         r = kvm_arch_vcpu_reset(vcpu);
5640         if (r == 0)
5641                 r = kvm_mmu_setup(vcpu);
5642         vcpu_put(vcpu);
5643         if (r < 0)
5644                 goto free_vcpu;
5645
5646         return 0;
5647 free_vcpu:
5648         kvm_x86_ops->vcpu_free(vcpu);
5649         return r;
5650 }
5651
5652 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5653 {
5654         vcpu_load(vcpu);
5655         kvm_mmu_unload(vcpu);
5656         vcpu_put(vcpu);
5657
5658         fx_free(vcpu);
5659         kvm_x86_ops->vcpu_free(vcpu);
5660 }
5661
5662 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5663 {
5664         vcpu->arch.nmi_pending = false;
5665         vcpu->arch.nmi_injected = false;
5666
5667         vcpu->arch.switch_db_regs = 0;
5668         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5669         vcpu->arch.dr6 = DR6_FIXED_1;
5670         vcpu->arch.dr7 = DR7_FIXED_1;
5671
5672         return kvm_x86_ops->vcpu_reset(vcpu);
5673 }
5674
5675 int kvm_arch_hardware_enable(void *garbage)
5676 {
5677         struct kvm *kvm;
5678         struct kvm_vcpu *vcpu;
5679         int i;
5680
5681         kvm_shared_msr_cpu_online();
5682         list_for_each_entry(kvm, &vm_list, vm_list)
5683                 kvm_for_each_vcpu(i, vcpu, kvm)
5684                         if (vcpu->cpu == smp_processor_id())
5685                                 kvm_request_guest_time_update(vcpu);
5686         return kvm_x86_ops->hardware_enable(garbage);
5687 }
5688
5689 void kvm_arch_hardware_disable(void *garbage)
5690 {
5691         kvm_x86_ops->hardware_disable(garbage);
5692         drop_user_return_notifiers(garbage);
5693 }
5694
5695 int kvm_arch_hardware_setup(void)
5696 {
5697         return kvm_x86_ops->hardware_setup();
5698 }
5699
5700 void kvm_arch_hardware_unsetup(void)
5701 {
5702         kvm_x86_ops->hardware_unsetup();
5703 }
5704
5705 void kvm_arch_check_processor_compat(void *rtn)
5706 {
5707         kvm_x86_ops->check_processor_compatibility(rtn);
5708 }
5709
5710 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5711 {
5712         struct page *page;
5713         struct kvm *kvm;
5714         int r;
5715
5716         BUG_ON(vcpu->kvm == NULL);
5717         kvm = vcpu->kvm;
5718
5719         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5720         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5721         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5722         vcpu->arch.mmu.translate_gpa = translate_gpa;
5723         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5724         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5725                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5726         else
5727                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5728
5729         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5730         if (!page) {
5731                 r = -ENOMEM;
5732                 goto fail;
5733         }
5734         vcpu->arch.pio_data = page_address(page);
5735
5736         r = kvm_mmu_create(vcpu);
5737         if (r < 0)
5738                 goto fail_free_pio_data;
5739
5740         if (irqchip_in_kernel(kvm)) {
5741                 r = kvm_create_lapic(vcpu);
5742                 if (r < 0)
5743                         goto fail_mmu_destroy;
5744         }
5745
5746         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5747                                        GFP_KERNEL);
5748         if (!vcpu->arch.mce_banks) {
5749                 r = -ENOMEM;
5750                 goto fail_free_lapic;
5751         }
5752         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5753
5754         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5755                 goto fail_free_mce_banks;
5756
5757         return 0;
5758 fail_free_mce_banks:
5759         kfree(vcpu->arch.mce_banks);
5760 fail_free_lapic:
5761         kvm_free_lapic(vcpu);
5762 fail_mmu_destroy:
5763         kvm_mmu_destroy(vcpu);
5764 fail_free_pio_data:
5765         free_page((unsigned long)vcpu->arch.pio_data);
5766 fail:
5767         return r;
5768 }
5769
5770 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5771 {
5772         int idx;
5773
5774         kfree(vcpu->arch.mce_banks);
5775         kvm_free_lapic(vcpu);
5776         idx = srcu_read_lock(&vcpu->kvm->srcu);
5777         kvm_mmu_destroy(vcpu);
5778         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5779         free_page((unsigned long)vcpu->arch.pio_data);
5780 }
5781
5782 struct  kvm *kvm_arch_create_vm(void)
5783 {
5784         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5785
5786         if (!kvm)
5787                 return ERR_PTR(-ENOMEM);
5788
5789         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5790         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5791
5792         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5793         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5794
5795         spin_lock_init(&kvm->arch.tsc_write_lock);
5796
5797         return kvm;
5798 }
5799
5800 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5801 {
5802         vcpu_load(vcpu);
5803         kvm_mmu_unload(vcpu);
5804         vcpu_put(vcpu);
5805 }
5806
5807 static void kvm_free_vcpus(struct kvm *kvm)
5808 {
5809         unsigned int i;
5810         struct kvm_vcpu *vcpu;
5811
5812         /*
5813          * Unpin any mmu pages first.
5814          */
5815         kvm_for_each_vcpu(i, vcpu, kvm)
5816                 kvm_unload_vcpu_mmu(vcpu);
5817         kvm_for_each_vcpu(i, vcpu, kvm)
5818                 kvm_arch_vcpu_free(vcpu);
5819
5820         mutex_lock(&kvm->lock);
5821         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5822                 kvm->vcpus[i] = NULL;
5823
5824         atomic_set(&kvm->online_vcpus, 0);
5825         mutex_unlock(&kvm->lock);
5826 }
5827
5828 void kvm_arch_sync_events(struct kvm *kvm)
5829 {
5830         kvm_free_all_assigned_devices(kvm);
5831         kvm_free_pit(kvm);
5832 }
5833
5834 void kvm_arch_destroy_vm(struct kvm *kvm)
5835 {
5836         kvm_iommu_unmap_guest(kvm);
5837         kfree(kvm->arch.vpic);
5838         kfree(kvm->arch.vioapic);
5839         kvm_free_vcpus(kvm);
5840         kvm_free_physmem(kvm);
5841         if (kvm->arch.apic_access_page)
5842                 put_page(kvm->arch.apic_access_page);
5843         if (kvm->arch.ept_identity_pagetable)
5844                 put_page(kvm->arch.ept_identity_pagetable);
5845         cleanup_srcu_struct(&kvm->srcu);
5846         kfree(kvm);
5847 }
5848
5849 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5850                                 struct kvm_memory_slot *memslot,
5851                                 struct kvm_memory_slot old,
5852                                 struct kvm_userspace_memory_region *mem,
5853                                 int user_alloc)
5854 {
5855         int npages = memslot->npages;
5856         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5857
5858         /* Prevent internal slot pages from being moved by fork()/COW. */
5859         if (memslot->id >= KVM_MEMORY_SLOTS)
5860                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5861
5862         /*To keep backward compatibility with older userspace,
5863          *x86 needs to hanlde !user_alloc case.
5864          */
5865         if (!user_alloc) {
5866                 if (npages && !old.rmap) {
5867                         unsigned long userspace_addr;
5868
5869                         down_write(&current->mm->mmap_sem);
5870                         userspace_addr = do_mmap(NULL, 0,
5871                                                  npages * PAGE_SIZE,
5872                                                  PROT_READ | PROT_WRITE,
5873                                                  map_flags,
5874                                                  0);
5875                         up_write(&current->mm->mmap_sem);
5876
5877                         if (IS_ERR((void *)userspace_addr))
5878                                 return PTR_ERR((void *)userspace_addr);
5879
5880                         memslot->userspace_addr = userspace_addr;
5881                 }
5882         }
5883
5884
5885         return 0;
5886 }
5887
5888 void kvm_arch_commit_memory_region(struct kvm *kvm,
5889                                 struct kvm_userspace_memory_region *mem,
5890                                 struct kvm_memory_slot old,
5891                                 int user_alloc)
5892 {
5893
5894         int npages = mem->memory_size >> PAGE_SHIFT;
5895
5896         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5897                 int ret;
5898
5899                 down_write(&current->mm->mmap_sem);
5900                 ret = do_munmap(current->mm, old.userspace_addr,
5901                                 old.npages * PAGE_SIZE);
5902                 up_write(&current->mm->mmap_sem);
5903                 if (ret < 0)
5904                         printk(KERN_WARNING
5905                                "kvm_vm_ioctl_set_memory_region: "
5906                                "failed to munmap memory\n");
5907         }
5908
5909         spin_lock(&kvm->mmu_lock);
5910         if (!kvm->arch.n_requested_mmu_pages) {
5911                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5912                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5913         }
5914
5915         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5916         spin_unlock(&kvm->mmu_lock);
5917 }
5918
5919 void kvm_arch_flush_shadow(struct kvm *kvm)
5920 {
5921         kvm_mmu_zap_all(kvm);
5922         kvm_reload_remote_mmus(kvm);
5923 }
5924
5925 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5926 {
5927         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5928                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5929                 || vcpu->arch.nmi_pending ||
5930                 (kvm_arch_interrupt_allowed(vcpu) &&
5931                  kvm_cpu_has_interrupt(vcpu));
5932 }
5933
5934 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5935 {
5936         int me;
5937         int cpu = vcpu->cpu;
5938
5939         if (waitqueue_active(&vcpu->wq)) {
5940                 wake_up_interruptible(&vcpu->wq);
5941                 ++vcpu->stat.halt_wakeup;
5942         }
5943
5944         me = get_cpu();
5945         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5946                 if (atomic_xchg(&vcpu->guest_mode, 0))
5947                         smp_send_reschedule(cpu);
5948         put_cpu();
5949 }
5950
5951 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5952 {
5953         return kvm_x86_ops->interrupt_allowed(vcpu);
5954 }
5955
5956 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5957 {
5958         unsigned long current_rip = kvm_rip_read(vcpu) +
5959                 get_segment_base(vcpu, VCPU_SREG_CS);
5960
5961         return current_rip == linear_rip;
5962 }
5963 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5964
5965 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5966 {
5967         unsigned long rflags;
5968
5969         rflags = kvm_x86_ops->get_rflags(vcpu);
5970         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5971                 rflags &= ~X86_EFLAGS_TF;
5972         return rflags;
5973 }
5974 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5975
5976 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5977 {
5978         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5979             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5980                 rflags |= X86_EFLAGS_TF;
5981         kvm_x86_ops->set_rflags(vcpu, rflags);
5982 }
5983 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5984
5985 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5986 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5987 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5988 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5989 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5990 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5991 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5992 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5993 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5994 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5995 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5996 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);