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hpt366: fix clock turnaround
author
Sergei Shtylyov <sshtylyov@ru.mvista.com>
Mon, 27 Sep 2010 18:01:32 +0000
(11:01 -0700)
committer
David S. Miller <davem@davemloft.net>
Tue, 26 Oct 2010 17:17:29 +0000
(10:17 -0700)
DPLL clock (0x21) should be used for writes and PCI clock (0x23) for reads,
not vice versa.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/ide/hpt366.c
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diff --git
a/drivers/ide/hpt366.c
b/drivers/ide/hpt366.c
index
c613ae1
..
58c51cd
100644
(file)
--- a/
drivers/ide/hpt366.c
+++ b/
drivers/ide/hpt366.c
@@
-838,7
+838,7
@@
static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode)
static void hpt3xxn_rw_disk(ide_drive_t *drive, struct request *rq)
{
- hpt3xxn_set_clock(drive->hwif, rq_data_dir(rq) ? 0x23 : 0x21);
+ hpt3xxn_set_clock(drive->hwif, rq_data_dir(rq) ? 0x21 : 0x23);
}
/**