2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
16 * Copyright (c) 2009 Isaku Yamahata
17 * VA Linux Systems Japan K.K.
22 #include <linux/export.h>
23 #include <linux/sort.h>
24 #include <asm/setup.h>
26 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
27 #define __pcihp_init __devinit
29 #define __pcihp_init __init
32 #define PCI_BUS_MAX 255
33 #define PCI_DEV_MAX 31
35 /* see pci_resource_len */
36 static inline resource_size_t __pcihp_init pci_iomul_len(
37 const struct resource* r)
39 if (!r->start && r->start == r->end)
41 return r->end - r->start + 1;
44 #define ROUND_UP(x, a) (((x) + (a) - 1) & ~((a) - 1))
45 /* stolen from pbus_size_io() */
46 static unsigned long __devinit pdev_size_io(struct pci_dev *pdev)
48 unsigned long size = 0, size1 = 0;
51 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
52 struct resource *r = &pdev->resource[i];
55 if (!(r->flags & IORESOURCE_IO))
58 r_size = r->end - r->start + 1;
61 /* Might be re-aligned for ISA */
67 /* To be fixed in 2.5: we should have sort of HAVE_ISA
68 flag in the struct pci_bus. */
69 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
70 size = (size & 0xff) + ((size & ~0xffUL) << 2);
72 size = ROUND_UP(size + size1, 4096);
77 * primary bus number of PCI-PCI bridge in switch on which
79 * i.e. the primary bus number of PCI-PCI bridge of downstream port
80 * or root port in switch.
81 * the secondary bus number of PCI-PCI bridge of upstream port
84 static inline unsigned char pci_dev_switch_busnr(struct pci_dev *pdev)
86 if (pci_find_capability(pdev, PCI_CAP_ID_EXP))
87 return pdev->bus->primary;
88 return pdev->bus->number;
91 static LIST_HEAD(switch_list);
92 static DEFINE_MUTEX(switch_list_lock);
94 /*****************************************************************************/
95 int pci_iomul_switch_io_allocated(const struct pci_iomul_switch *sw)
97 return sw->io_base && sw->io_base <= sw->io_limit;
99 EXPORT_SYMBOL_GPL(pci_iomul_switch_io_allocated);
101 static struct pci_iomul_switch *pci_iomul_find_switch_locked(int segment,
104 struct pci_iomul_switch *sw;
106 BUG_ON(!mutex_is_locked(&switch_list_lock));
107 list_for_each_entry(sw, &switch_list, list) {
108 if (sw->segment == segment && sw->bus == bus)
114 static struct pci_iomul_slot *pci_iomul_find_slot_locked(
115 struct pci_iomul_switch *sw, uint8_t busnr, uint8_t dev)
117 struct pci_iomul_slot *slot;
119 BUG_ON(!mutex_is_locked(&sw->lock));
120 list_for_each_entry(slot, &sw->slots, sibling) {
121 if (slot->bus == busnr && slot->dev == dev)
127 /* on successfull exit, sw->lock is locked for use slot and
128 * refrence count of sw is incremented.
130 void pci_iomul_get_lock_switch(struct pci_dev *pdev,
131 struct pci_iomul_switch **swp,
132 struct pci_iomul_slot **slot)
134 mutex_lock(&switch_list_lock);
136 *swp = pci_iomul_find_switch_locked(pci_domain_nr(pdev->bus),
137 pci_dev_switch_busnr(pdev));
143 mutex_lock(&(*swp)->lock);
144 *slot = pci_iomul_find_slot_locked(*swp, pdev->bus->number,
145 PCI_SLOT(pdev->devfn));
147 mutex_unlock(&(*swp)->lock);
150 pci_iomul_switch_get(*swp);
153 mutex_unlock(&switch_list_lock);
155 EXPORT_SYMBOL_GPL(pci_iomul_get_lock_switch);
157 static struct pci_iomul_switch *__devinit pci_iomul_switch_alloc(int segment,
160 struct pci_iomul_switch *sw;
162 BUG_ON(!mutex_is_locked(&switch_list_lock));
164 sw = kmalloc(sizeof(*sw), GFP_KERNEL);
166 mutex_init(&sw->lock);
167 kref_init(&sw->kref);
168 sw->io_region = NULL;
170 sw->current_pdev = NULL;
171 sw->segment = segment;
176 INIT_LIST_HEAD(&sw->slots);
181 static void __devinit pci_iomul_switch_add_locked(struct pci_iomul_switch *sw)
183 BUG_ON(!mutex_is_locked(&switch_list_lock));
184 list_add(&sw->list, &switch_list);
187 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
188 static void __devinit pci_iomul_switch_del_locked(struct pci_iomul_switch *sw)
190 BUG_ON(!mutex_is_locked(&switch_list_lock));
195 static int __devinit pci_iomul_slot_init(struct pci_dev *pdev,
196 struct pci_iomul_slot *slot)
201 rpcap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
203 /* pci device isn't supported */
204 pr_info("PCI: sharing io port of non PCIe device %s "
205 "isn't supported. ignoring.\n",
210 pci_read_config_word(pdev, rpcap + PCI_CAP_FLAGS, &cap);
211 switch ((cap & PCI_EXP_FLAGS_TYPE) >> 4) {
212 case PCI_EXP_TYPE_RC_END:
213 pr_info("PCI: io port sharing of root complex integrated "
214 "endpoint %s isn't supported. ignoring.\n",
217 case PCI_EXP_TYPE_ENDPOINT:
218 case PCI_EXP_TYPE_LEG_END:
221 pr_info("PCI: io port sharing of non endpoint %s "
222 "doesn't make sense. ignoring.\n",
227 kref_init(&slot->kref);
228 slot->switch_busnr = pci_dev_switch_busnr(pdev);
229 slot->segment = pci_domain_nr(pdev->bus);
230 slot->bus = pdev->bus->number;
231 slot->dev = PCI_SLOT(pdev->devfn);
236 static struct pci_iomul_slot *__devinit pci_iomul_slot_alloc(
237 struct pci_dev *pdev)
239 struct pci_iomul_slot *slot;
241 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
245 if (pci_iomul_slot_init(pdev, slot)) {
252 static void __devinit pci_iomul_slot_add_locked(struct pci_iomul_switch *sw,
253 struct pci_iomul_slot *slot)
255 BUG_ON(!mutex_is_locked(&sw->lock));
256 list_add(&slot->sibling, &sw->slots);
259 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
260 static void __devinit pci_iomul_slot_del_locked(struct pci_iomul_switch *sw,
261 struct pci_iomul_slot *slot)
263 BUG_ON(!mutex_is_locked(&sw->lock));
264 list_del(&slot->sibling);
268 /*****************************************************************************/
269 static int __devinit pci_get_sbd(const char *str, int *segment__,
270 uint8_t *bus__, uint8_t *dev__)
276 if (sscanf(str, "%x:%x:%x", &segment, &bus, &dev) != 3) {
277 if (sscanf(str, "%x:%x", &bus, &dev) == 2)
283 if (segment < 0 || INT_MAX <= segment)
285 if (bus < 0 || PCI_BUS_MAX < bus)
287 if (dev < 0 || PCI_DEV_MAX < dev)
290 *segment__ = segment;
296 static char __devinitdata iomul_param[COMMAND_LINE_SIZE];
297 #define TOKEN_MAX 10 /* SSSS:BB:DD length is 10 */
298 static int __devinit pci_is_iomul_dev_param(struct pci_dev *pdev)
304 if (!strcmp(iomul_param, "all"))
306 for (p = &iomul_param[0]; *p != '\0'; p = next_str + 1) {
307 next_str = strchr(p, ',');
313 if (len > 0 && len <= TOKEN_MAX) {
314 char tmp[TOKEN_MAX+1];
319 strlcpy(tmp, p, len);
320 if (!pci_get_sbd(tmp, &seg, &bus, &dev) &&
321 pci_domain_nr(pdev->bus) == seg &&
322 pdev->bus->number == bus &&
323 PCI_SLOT(pdev->devfn) == dev)
330 /* check guestdev=<device>+iomul option */
331 return pci_is_iomuldev(pdev);
335 * Format: [<segment>:]<bus>:<dev>[,[<segment>:]<bus>:<dev>[,...]
337 static int __init pci_iomul_param_setup(char *str)
339 if (!is_initial_xendomain() || strlen(str) >= COMMAND_LINE_SIZE)
342 /* parse it after pci bus scanning */
343 strlcpy(iomul_param, str, sizeof(iomul_param));
346 __setup("guestiomuldev=", pci_iomul_param_setup);
348 /*****************************************************************************/
349 static void __devinit pci_iomul_set_bridge_io_window(struct pci_dev *bridge,
360 l = (io_base & 0xff) | ((io_limit & 0xff) << 8);
361 upper16 = ((io_base & 0xffff00) >> 8) |
362 (((io_limit & 0xffff00) >> 8) << 16);
364 /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
365 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
366 /* Update lower 16 bits of I/O base/limit. */
367 pci_write_config_word(bridge, PCI_IO_BASE, l);
368 /* Update upper 16 bits of I/O base/limit. */
369 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, upper16);
372 static void __devinit pci_disable_bridge_io_window(struct pci_dev *bridge)
374 /* set base = 0xffffff limit = 0x0 */
375 pci_iomul_set_bridge_io_window(bridge, 0xffffff, 0);
378 static int __devinit pci_iomul_func_scan(struct pci_dev *pdev,
379 struct pci_iomul_slot *slot,
382 struct pci_iomul_func *f;
385 f = kzalloc(sizeof(*f), GFP_KERNEL);
389 f->segment = slot->segment;
391 f->devfn = PCI_DEVFN(slot->dev, func);
392 f->io_size = pdev_size_io(pdev);
394 for (i = 0; i < PCI_NUM_BARS; i++) {
395 if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO))
397 if (!pci_resource_len(pdev, i))
401 f->resource[i] = pdev->resource[i];
405 slot->func[func] = f;
412 * This is tricky part.
413 * fake PCI resource assignment routines by setting flags to 0.
414 * PCI resource allocate routines think the resource should
415 * be allocated by checking flags. 0 means this resource isn't used.
416 * See pbus_size_io() and pdev_sort_resources().
418 * After allocated resources, flags (IORESOURCE_IO) is exported
419 * to other part including user process.
420 * So we have to set flags to IORESOURCE_IO, but at the same time
421 * we must prevent those resources from reassigning when pci hot plug.
422 * To achieve that, set r->parent to dummy resource.
424 static inline void __devinit pci_iomul_disable_resource(struct resource *r)
426 /* don't allocate this resource */
430 static void __pcihp_init pci_iomul_reenable_resource(
431 struct resource *dummy_parent, struct resource *r)
435 dummy_parent->start = r->start;
436 dummy_parent->end = r->end;
437 dummy_parent->flags = r->flags;
438 dummy_parent->name = "PCI IOMUL dummy resource";
440 ret = request_resource(dummy_parent, r);
444 static void __devinit pci_iomul_fixup_ioresource(struct pci_dev *pdev,
445 struct pci_iomul_func *func,
446 int reassign, int dealloc)
451 pr_info("PCI: deallocating io resource[%s]. io size 0x%lx\n",
452 pci_name(pdev), func->io_size);
453 for (i = 0; i < PCI_NUM_BARS; i++) {
454 r = &pdev->resource[i];
455 if (!(func->io_bar & (1 << i)))
461 pci_update_resource(pdev, i);
462 func->resource[i] = *r;
466 /* don't allocate this resource */
467 pci_iomul_disable_resource(r);
470 /* parent PCI-PCI bridge */
473 pdev = pdev->bus->self;
474 if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
476 pci_disable_bridge_io_window(pdev);
477 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
478 r = &pdev->resource[i];
479 if (!(r->flags & IORESOURCE_IO))
484 if (i < PCI_BRIDGE_RESOURCES)
485 pci_update_resource(pdev, i);
489 static void __devinit __quirk_iomul_dealloc_ioresource(
490 struct pci_iomul_switch *sw,
491 struct pci_dev *pdev, struct pci_iomul_slot *slot)
493 struct pci_iomul_func *f;
494 struct pci_iomul_func *__f;
496 if (pci_iomul_func_scan(pdev, slot, PCI_FUNC(pdev->devfn)))
499 f = slot->func[PCI_FUNC(pdev->devfn)];
504 /* sw->io_base == 0 means that we are called at boot time.
505 * != 0 means that we are called by php after boot. */
506 if (!sw->io_base && (!__f || __f->io_size < f->io_size)) {
508 struct pci_bus *__pbus;
509 struct pci_dev *__pdev;
511 __pbus = pci_find_bus(__f->segment, __f->bus);
513 __pdev = pci_get_slot(__pbus, __f->devfn);
515 pci_iomul_fixup_ioresource(__pdev, __f, 0, 1);
519 pci_iomul_fixup_ioresource(pdev, f, 1, 0);
522 pci_iomul_fixup_ioresource(pdev, f, 1, 1);
526 static void __devinit quirk_iomul_dealloc_ioresource(struct pci_dev *pdev)
528 struct pci_iomul_switch *sw;
529 struct pci_iomul_slot *slot;
531 if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
533 if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
534 return; /* PCI Host Bridge isn't a target device */
535 if (!pci_is_iomul_dev_param(pdev))
538 mutex_lock(&switch_list_lock);
539 sw = pci_iomul_find_switch_locked(pci_domain_nr(pdev->bus),
540 pci_dev_switch_busnr(pdev));
542 sw = pci_iomul_switch_alloc(pci_domain_nr(pdev->bus),
543 pci_dev_switch_busnr(pdev));
545 mutex_unlock(&switch_list_lock);
546 pr_warn("PCI: can't allocate memory "
547 "for sw of IO multiplexing %s",
551 pci_iomul_switch_add_locked(sw);
553 pci_iomul_switch_get(sw);
554 mutex_unlock(&switch_list_lock);
556 mutex_lock(&sw->lock);
557 slot = pci_iomul_find_slot_locked(sw, pdev->bus->number,
558 PCI_SLOT(pdev->devfn));
560 slot = pci_iomul_slot_alloc(pdev);
562 mutex_unlock(&sw->lock);
563 pci_iomul_switch_put(sw);
564 pr_warn("PCI: can't allocate memory "
565 "for IO multiplexing %s", pci_name(pdev));
568 pci_iomul_slot_add_locked(sw, slot);
571 pr_info("PCI: disable device and release io resource[%s].\n",
573 pci_disable_device(pdev);
575 __quirk_iomul_dealloc_ioresource(sw, pdev, slot);
577 mutex_unlock(&sw->lock);
578 pci_iomul_switch_put(sw);
580 DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID,
581 quirk_iomul_dealloc_ioresource);
583 static void __pcihp_init pci_iomul_read_bridge_io(struct pci_iomul_switch *sw)
585 struct pci_iomul_func *f = sw->func;
587 struct pci_bus *pbus;
588 struct pci_dev *pdev;
589 struct pci_dev *bridge;
592 uint16_t base_upper16;
593 uint16_t limit_upper16;
597 pbus = pci_find_bus(f->segment, f->bus);
600 pdev = pci_get_slot(pbus, f->devfn);
603 bridge = pdev->bus->self;
604 pci_read_config_word(bridge, PCI_IO_BASE, &l);
605 pci_read_config_word(bridge, PCI_IO_BASE_UPPER16, &base_upper16);
606 pci_read_config_word(bridge, PCI_IO_LIMIT_UPPER16, &limit_upper16);
608 io_base = (l & 0xf0) | ((uint32_t)base_upper16 << 8);
610 io_limit = (l >> 8) | ((uint32_t)limit_upper16 << 8);
614 sw->io_base = io_base;
615 sw->io_limit = io_limit;
618 pr_info("PCI: bridge %s base 0x%x limit 0x%x\n",
619 pci_name(bridge), sw->io_base, sw->io_limit);
622 static void __pcihp_init pci_iomul_setup_brige(struct pci_dev *bridge,
628 if ((bridge->class >> 8) == PCI_CLASS_BRIDGE_HOST)
631 pci_iomul_set_bridge_io_window(bridge, io_base, io_limit);
633 /* and forcibly enables IO */
634 pci_read_config_word(bridge, PCI_COMMAND, &cmd);
635 if (!(cmd & PCI_COMMAND_IO)) {
636 cmd |= PCI_COMMAND_IO;
637 pr_info("PCI: forcibly enabling IO %s\n", pci_name(bridge));
638 pci_write_config_word(bridge, PCI_COMMAND, cmd);
647 /* decending order */
648 static int __pcihp_init pci_iomul_bar_cmp(const void *lhs__, const void *rhs__)
650 const struct __bar *lhs = (struct __bar*)lhs__;
651 const struct __bar *rhs = (struct __bar*)rhs__;
652 return - (lhs->size - rhs->size);
655 static void __pcihp_init pci_iomul_setup_dev(struct pci_dev *pdev,
656 struct pci_iomul_func *f,
659 struct __bar bars[PCI_NUM_BARS];
661 uint8_t num_bars = 0;
664 pr_info("PCI: Forcibly assign IO %s from 0x%x\n",
665 pci_name(pdev), io_base);
667 for (i = 0; i < PCI_NUM_BARS; i++) {
668 if (!(f->io_bar & (1 << i)))
672 bars[num_bars].size = pci_iomul_len(r);
673 bars[num_bars].bar = i;
678 sort(bars, num_bars, sizeof(bars[0]), &pci_iomul_bar_cmp, NULL);
680 for (i = 0; i < num_bars; i++) {
681 struct resource *fr = &f->resource[bars[i].bar];
682 r = &pdev->resource[bars[i].bar];
688 fr->start = r->start;
691 /* pci_update_resource() check flags. */
692 r->flags = fr->flags;
693 pci_update_resource(pdev, bars[i].bar);
694 pci_iomul_reenable_resource(&f->dummy_parent, r);
696 io_base += bars[i].size;
700 static void __pcihp_init pci_iomul_release_io_resource(
701 struct pci_dev *pdev, struct pci_iomul_switch *sw,
702 struct pci_iomul_slot *slot, struct pci_iomul_func *f)
707 for (i = 0; i < PCI_NUM_BARS; i++) {
708 if ((pci_resource_flags(pdev, i) & IORESOURCE_IO) &&
709 pdev->resource[i].parent) {
710 r = &pdev->resource[i];
713 pci_iomul_reenable_resource(&f->dummy_parent, r);
717 /* parent PCI-PCI bridge */
718 pdev = pdev->bus->self;
719 if ((pdev->class >> 8) != PCI_CLASS_BRIDGE_HOST) {
720 for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
721 struct resource *parent = pdev->resource[i].parent;
723 if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO) ||
727 r = &pdev->resource[i];
729 sw->io_resource.flags = r->flags;
730 sw->io_resource.start = sw->io_base;
731 sw->io_resource.end = sw->io_limit;
732 sw->io_resource.name = "PCI IO Multiplexer";
735 pci_iomul_reenable_resource(
736 &slot->dummy_parent[i - PCI_BRIDGE_RESOURCES],
739 if (request_resource(parent, &sw->io_resource))
740 pr_err("PCI IOMul: can't allocate "
741 "resource. [0x%x, 0x%x]",
742 sw->io_base, sw->io_limit);
747 static void __pcihp_init quirk_iomul_reassign_ioresource(struct pci_dev *pdev)
749 struct pci_iomul_switch *sw;
750 struct pci_iomul_slot *slot;
751 struct pci_iomul_func *sf;
752 struct pci_iomul_func *f;
754 pci_iomul_get_lock_switch(pdev, &sw, &slot);
759 pci_iomul_read_bridge_io(sw);
760 if (!pci_iomul_switch_io_allocated(sw))
764 f = slot->func[PCI_FUNC(pdev->devfn)];
767 * (!sf || !f) case can happen when all the
768 * specified devices don't have io space
773 (pci_domain_nr(pdev->bus) != sf->segment ||
774 pdev->bus->number != sf->bus ||
775 PCI_SLOT(pdev->devfn) != PCI_SLOT(sf->devfn)) &&
776 !PCI_FUNC(pdev->devfn)) {
777 pci_iomul_setup_brige(pdev->bus->self,
778 sw->io_base, sw->io_limit);
781 BUG_ON(f->io_size > sw->io_limit - sw->io_base + 1);
782 if (/* f == sf */ sf &&
783 pci_domain_nr(pdev->bus) == sf->segment &&
784 pdev->bus->number == sf->bus &&
785 pdev->devfn == sf->devfn)
786 pci_iomul_release_io_resource(pdev, sw, slot, f);
788 pci_iomul_setup_dev(pdev, f, sw->io_base);
791 mutex_unlock(&sw->lock);
792 pci_iomul_switch_put(sw);
794 DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID,
795 quirk_iomul_reassign_ioresource);
797 /*****************************************************************************/
798 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
799 static int __devinit __pci_iomul_notifier_del_device(struct pci_dev *pdev)
801 struct pci_iomul_switch *sw;
802 struct pci_iomul_slot *slot;
805 pci_iomul_get_lock_switch(pdev, &sw, &slot);
809 if (sw->func == slot->func[PCI_FUNC(pdev->devfn)])
811 kfree(slot->func[PCI_FUNC(pdev->devfn)]);
812 slot->func[PCI_FUNC(pdev->devfn)] = NULL;
813 for (i = 0; i < PCI_NUM_FUNC; i++) {
818 pci_iomul_slot_del_locked(sw, slot);
819 pci_iomul_slot_put(slot);
822 mutex_unlock(&sw->lock);
823 pci_iomul_switch_put(sw);
827 static int __devinit __pci_iomul_notifier_del_switch(struct pci_dev *pdev)
829 struct pci_iomul_switch *sw;
831 mutex_lock(&switch_list_lock);
832 sw = pci_iomul_find_switch_locked(pci_domain_nr(pdev->bus),
837 pci_iomul_switch_del_locked(sw);
839 mutex_lock(&sw->lock);
840 if (sw->io_resource.parent)
841 release_resource(&sw->io_resource);
842 sw->io_base = 0; /* to tell this switch is removed */
844 BUG_ON(!list_empty(&sw->slots));
845 mutex_unlock(&sw->lock);
848 mutex_unlock(&switch_list_lock);
849 pci_iomul_switch_put(sw);
853 static int __devinit pci_iomul_notifier_del_device(struct pci_dev *pdev)
856 switch (pdev->hdr_type) {
857 case PCI_HEADER_TYPE_NORMAL:
858 ret = __pci_iomul_notifier_del_device(pdev);
860 case PCI_HEADER_TYPE_BRIDGE:
861 ret = __pci_iomul_notifier_del_switch(pdev);
864 pr_warn("PCI IOMUL: device %s has unknown "
865 "header type %02x, ignoring.\n",
866 pci_name(pdev), pdev->hdr_type);
873 static int __devinit pci_iomul_notifier(struct notifier_block *nb,
874 unsigned long action, void *data)
876 struct device *dev = data;
877 struct pci_dev *pdev = to_pci_dev(dev);
880 case BUS_NOTIFY_ADD_DEVICE:
881 quirk_iomul_reassign_ioresource(pdev);
883 case BUS_NOTIFY_DEL_DEVICE:
884 pci_iomul_notifier_del_device(pdev);
891 static struct notifier_block __devinitdata pci_iomul_nb = {
892 .notifier_call = pci_iomul_notifier,
895 static int __init pci_iomul_hotplug_init(void)
897 if (!is_initial_xendomain())
900 bus_register_notifier(&pci_bus_type, &pci_iomul_nb);
903 late_initcall(pci_iomul_hotplug_init);