arch/x86/include/mach-xen/asm/perf_event.h

   1 #ifndef _ASM_X86_PERF_EVENT_H
   2 #define _ASM_X86_PERF_EVENT_H
   3
   4 #ifdef CONFIG_PERF_EVENTS
   5
   6 /*
   7  * Abuse bit 3 of the cpu eflags register to indicate proper PEBS IP fixups.
   8  * This flag is otherwise unused and ABI specified to be 0, so nobody should
   9  * care what we do with it.
  10  */
  11 #define PERF_EFLAGS_EXACT       (1UL << 3)
  12
  13 #define perf_instruction_pointer(regs) instruction_pointer(regs)
  14
  15 #define perf_misc_flags(regs) ({ \
  16         struct pt_regs *_r_ = (regs); \
  17         unsigned long _f_ = user_mode(_r_) ? PERF_RECORD_MISC_USER \
  18                                            : PERF_RECORD_MISC_KERNEL; \
  19         _r_->flags & PERF_EFLAGS_EXACT ? _f_ | PERF_RECORD_MISC_EXACT_IP : _f_; \
  20 })
  21
  22 #include <asm/stacktrace.h>
  23
  24 /*
  25  * We abuse bit 3 from flags to pass exact information, see perf_misc_flags
  26  * and the comment with PERF_EFLAGS_EXACT.
  27  */
  28 #define perf_arch_fetch_caller_regs(regs, __ip)         {       \
  29         (regs)->ip = (__ip);                                    \
  30         (regs)->bp = caller_frame_pointer();                    \
  31         (regs)->cs = __KERNEL_CS;                               \
  32         regs->flags = 0;                                        \
  33         asm volatile(                                           \
  34                 _ASM_MOV "%%"_ASM_SP ", %0\n"                   \
  35                 : "=m" ((regs)->sp)                             \
  36                 :: "memory"                                     \
  37         );                                                      \
  38 }
  39
  40 #endif
  41
  42 #endif /* _ASM_X86_PERF_EVENT_H */