4 #include <asm/pgtable.h>
5 #include <asm/cacheflush.h>
6 #include <asm/system.h>
9 * Functions to keep the agpgart mappings coherent with the MMU. The
10 * GART gives the CPU a physical alias of pages in memory. The alias
11 * region is mapped uncacheable. Make sure there are no conflicting
12 * mappings with different cachability attributes for the same
13 * page. This avoids data corruption on some CPUs.
16 #define map_page_into_agp(page) ( \
17 xen_create_contiguous_region((unsigned long)page_address(page), 0, 32) \
18 ?: set_pages_uc(page, 1))
19 #define unmap_page_from_agp(page) ( \
20 xen_destroy_contiguous_region((unsigned long)page_address(page), 0), \
21 /* only a fallback: xen_destroy_contiguous_region uses PAGE_KERNEL */ \
22 set_pages_wb(page, 1))
24 #define map_pages_into_agp(pages, nr) ({ \
27 for (n__ = 0; n__ < (nr) && !rc__; ++n__) \
28 rc__ = xen_create_contiguous_region( \
29 (unsigned long)page_address((pages)[n__]), 0, 32); \
30 rc__ ?: set_pages_array_uc(pages, nr); \
32 #define unmap_pages_from_agp(pages, nr) ({ \
34 for (n__ = 0; n__ < nr; ++n__) \
35 xen_destroy_contiguous_region( \
36 (unsigned long)page_address((pages)[n__]), 0); \
37 /* only a fallback: xen_destroy_contiguous_region uses PAGE_KERNEL */ \
38 set_pages_array_wb(pages, nr); \
42 * Could use CLFLUSH here if the cpu supports it. But then it would
43 * need to be called for each cacheline of the whole page so it may
44 * not be worth it. Would need a page for it.
46 #define flush_agp_cache() wbinvd()
48 #define virt_to_gart virt_to_machine
50 /* GATT allocation. Returns/accepts GATT kernel virtual address. */
51 #define alloc_gatt_pages(order) ({ \
52 char *_t; dma_addr_t _d; \
53 _t = dma_alloc_coherent(NULL,PAGE_SIZE<<(order),&_d,GFP_KERNEL); \
55 #define free_gatt_pages(table, order) \
56 dma_free_coherent(NULL,PAGE_SIZE<<(order),(table),virt_to_bus(table))
58 #endif /* _ASM_X86_AGP_H */