arch/x86/include/asm/acpi.h

   1 #ifndef _ASM_X86_ACPI_H
   2 #define _ASM_X86_ACPI_H
   3
   4 /*
   5  *  Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
   6  *  Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
   7  *
   8  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   9  *
  10  *  This program is free software; you can redistribute it and/or modify
  11  *  it under the terms of the GNU General Public License as published by
  12  *  the Free Software Foundation; either version 2 of the License, or
  13  *  (at your option) any later version.
  14  *
  15  *  This program is distributed in the hope that it will be useful,
  16  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *  GNU General Public License for more details.
  19  *
  20  *  You should have received a copy of the GNU General Public License
  21  *  along with this program; if not, write to the Free Software
  22  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  23  *
  24  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  25  */
  26 #include <acpi/pdc_intel.h>
  27
  28 #include <asm/numa.h>
  29 #include <asm/processor.h>
  30 #include <asm/mmu.h>
  31 #include <asm/mpspec.h>
  32 #include <asm/trampoline.h>
  33
  34 #ifdef CONFIG_XEN_PRIVILEGED_GUEST
  35 #include <xen/interface/platform.h>
  36 #endif
  37
  38 #define COMPILER_DEPENDENT_INT64   long long
  39 #define COMPILER_DEPENDENT_UINT64  unsigned long long
  40
  41 /*
  42  * Calling conventions:
  43  *
  44  * ACPI_SYSTEM_XFACE        - Interfaces to host OS (handlers, threads)
  45  * ACPI_EXTERNAL_XFACE      - External ACPI interfaces
  46  * ACPI_INTERNAL_XFACE      - Internal ACPI interfaces
  47  * ACPI_INTERNAL_VAR_XFACE  - Internal variable-parameter list interfaces
  48  */
  49 #define ACPI_SYSTEM_XFACE
  50 #define ACPI_EXTERNAL_XFACE
  51 #define ACPI_INTERNAL_XFACE
  52 #define ACPI_INTERNAL_VAR_XFACE
  53
  54 /* Asm macros */
  55
  56 #define ACPI_ASM_MACROS
  57 #define BREAKPOINT3
  58 #define ACPI_DISABLE_IRQS() local_irq_disable()
  59 #define ACPI_ENABLE_IRQS()  local_irq_enable()
  60 #define ACPI_FLUSH_CPU_CACHE()  wbinvd()
  61
  62 int __acpi_acquire_global_lock(unsigned int *lock);
  63 int __acpi_release_global_lock(unsigned int *lock);
  64
  65 #define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
  66         ((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
  67
  68 #define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
  69         ((Acq) = __acpi_release_global_lock(&facs->global_lock))
  70
  71 /*
  72  * Math helper asm macros
  73  */
  74 #define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
  75         asm("divl %2;"                               \
  76             : "=a"(q32), "=d"(r32)                   \
  77             : "r"(d32),                              \
  78              "0"(n_lo), "1"(n_hi))
  79
  80
  81 #define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
  82         asm("shrl   $1,%2       ;"      \
  83             "rcrl   $1,%3;"             \
  84             : "=r"(n_hi), "=r"(n_lo)    \
  85             : "0"(n_hi), "1"(n_lo))
  86
  87 #ifdef CONFIG_ACPI
  88 extern int acpi_lapic;
  89 extern int acpi_ioapic;
  90 extern int acpi_noirq;
  91 extern int acpi_strict;
  92 extern int acpi_disabled;
  93 extern int acpi_pci_disabled;
  94 extern int acpi_skip_timer_override;
  95 extern int acpi_use_timer_override;
  96 extern int acpi_fix_pin2_polarity;
  97
  98 extern u8 acpi_sci_flags;
  99 extern int acpi_sci_override_gsi;
 100 void acpi_pic_sci_set_trigger(unsigned int, u16);
 101
 102 extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
 103                                   int trigger, int polarity);
 104
 105 static inline void disable_acpi(void)
 106 {
 107         acpi_disabled = 1;
 108         acpi_pci_disabled = 1;
 109         acpi_noirq = 1;
 110 }
 111
 112 extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
 113
 114 static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
 115 static inline void acpi_disable_pci(void)
 116 {
 117         acpi_pci_disabled = 1;
 118         acpi_noirq_set();
 119 }
 120
 121 /* Low-level suspend routine. */
 122 #ifdef CONFIG_ACPI_PV_SLEEP
 123 #define acpi_suspend_lowlevel() acpi_enter_sleep_state(ACPI_STATE_S3)
 124 #else
 125 extern int acpi_suspend_lowlevel(void);
 126 #endif
 127
 128 extern const unsigned char acpi_wakeup_code[];
 129 #define acpi_wakeup_address (__pa(TRAMPOLINE_SYM(acpi_wakeup_code)))
 130
 131 /* early initialization routine */
 132 extern void acpi_reserve_wakeup_memory(void);
 133
 134 #ifdef CONFIG_XEN_PRIVILEGED_GUEST
 135 static inline int acpi_notify_hypervisor_state(u8 sleep_state,
 136                                                u32 pm1a_cnt_val,
 137                                                u32 pm1b_cnt_val)
 138 {
 139         struct xen_platform_op op = {
 140                 .cmd = XENPF_enter_acpi_sleep,
 141                 .interface_version = XENPF_INTERFACE_VERSION,
 142                 .u = {
 143                         .enter_acpi_sleep = {
 144                                 .pm1a_cnt_val = pm1a_cnt_val,
 145                                 .pm1b_cnt_val = pm1b_cnt_val,
 146                                 .sleep_state = sleep_state,
 147                         },
 148                 },
 149         };
 150
 151         return HYPERVISOR_platform_op(&op);
 152 }
 153 #endif
 154
 155 /*
 156  * Check if the CPU can handle C2 and deeper
 157  */
 158 static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
 159 {
 160 #ifndef CONFIG_PROCESSOR_EXTERNAL_CONTROL
 161         /*
 162          * Early models (<=5) of AMD Opterons are not supposed to go into
 163          * C2 state.
 164          *
 165          * Steppings 0x0A and later are good
 166          */
 167         if (boot_cpu_data.x86 == 0x0F &&
 168             boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
 169             boot_cpu_data.x86_model <= 0x05 &&
 170             boot_cpu_data.x86_mask < 0x0A)
 171                 return 1;
 172         else if (amd_e400_c1e_detected)
 173                 return 1;
 174         else
 175 #endif
 176                 return max_cstate;
 177 }
 178
 179 static inline bool arch_has_acpi_pdc(void)
 180 {
 181         struct cpuinfo_x86 *c = &cpu_data(0);
 182         return (c->x86_vendor == X86_VENDOR_INTEL ||
 183                 c->x86_vendor == X86_VENDOR_CENTAUR);
 184 }
 185
 186 static inline void arch_acpi_set_pdc_bits(u32 *buf)
 187 {
 188         struct cpuinfo_x86 *c = &cpu_data(0);
 189
 190         buf[2] |= ACPI_PDC_C_CAPABILITY_SMP;
 191
 192         if (cpu_has(c, X86_FEATURE_EST))
 193                 buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP;
 194
 195         if (cpu_has(c, X86_FEATURE_ACPI))
 196                 buf[2] |= ACPI_PDC_T_FFH;
 197
 198         /*
 199          * If mwait/monitor is unsupported, C2/C3_FFH will be disabled
 200          */
 201         if (!cpu_has(c, X86_FEATURE_MWAIT))
 202                 buf[2] &= ~(ACPI_PDC_C_C2C3_FFH);
 203 }
 204
 205 #else /* !CONFIG_ACPI */
 206
 207 #define acpi_lapic 0
 208 #define acpi_ioapic 0
 209 static inline void acpi_noirq_set(void) { }
 210 static inline void acpi_disable_pci(void) { }
 211 static inline void disable_acpi(void) { }
 212
 213 #endif /* !CONFIG_ACPI */
 214
 215 #ifndef CONFIG_XEN
 216 #define ARCH_HAS_POWER_INIT     1
 217 #endif
 218
 219 #ifdef CONFIG_ACPI_NUMA
 220 extern int acpi_numa;
 221 extern int x86_acpi_numa_init(void);
 222 #endif /* CONFIG_ACPI_NUMA */
 223
 224 #define acpi_unlazy_tlb(x)      leave_mm(x)
 225
 226 #endif /* _ASM_X86_ACPI_H */