5 * We need the APIC definitions automatically as part of 'smp.h'
7 #include <linux/threads.h>
8 #include <linux/cpumask.h>
9 #include <linux/bitops.h>
10 #include <linux/init.h>
11 #include <linux/thread_info.h>
12 extern int disable_apic;
14 #ifdef CONFIG_X86_LOCAL_APIC
15 #include <asm/mpspec.h>
17 #ifdef CONFIG_X86_IO_APIC
18 #include <asm/io_apic.h>
28 extern cpumask_t cpu_present_mask;
29 extern cpumask_t cpu_possible_map;
30 extern cpumask_t cpu_online_map;
31 extern cpumask_t cpu_initialized;
34 * Private routines/data
37 extern void smp_alloc_memory(void);
38 extern volatile unsigned long smp_invalidate_needed;
39 extern void lock_ipi_call_lock(void);
40 extern void unlock_ipi_call_lock(void);
41 extern int smp_num_siblings;
42 extern void smp_send_reschedule(int cpu);
43 extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
44 void *info, int wait);
47 * cpu_sibling_map and cpu_core_map now live
50 * extern cpumask_t cpu_sibling_map[NR_CPUS];
51 * extern cpumask_t cpu_core_map[NR_CPUS];
53 DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
54 DECLARE_PER_CPU(cpumask_t, cpu_core_map);
55 DECLARE_PER_CPU(u8, cpu_llc_id);
57 #define SMP_TRAMPOLINE_BASE 0x6000
60 * On x86 all CPUs are mapped 1:1 to the APIC space.
61 * This simplifies scheduling and IPI sending and
62 * compresses data structures.
65 static inline int num_booting_cpus(void)
67 return cpus_weight(cpu_possible_map);
70 #define raw_smp_processor_id() read_pda(cpunumber)
72 extern int __cpu_disable(void);
73 extern void __cpu_die(unsigned int cpu);
74 extern void prefill_possible_map(void);
75 extern unsigned num_processors;
76 extern unsigned __cpuinitdata disabled_cpus;
78 #define NO_PROC_ID 0xFF /* No processor magic marker */
80 #endif /* CONFIG_SMP */
82 #define safe_smp_processor_id() smp_processor_id()
84 #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_XEN)
85 static inline int hard_smp_processor_id(void)
87 /* we don't want to mark this access volatile - bad code generation */
88 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
93 * Some lowlevel functions might want to know about
94 * the real APIC ID <-> CPU # mapping.
96 extern u8 __initdata x86_cpu_to_apicid_init[];
97 extern void *x86_cpu_to_apicid_ptr;
98 DECLARE_PER_CPU(u8, x86_cpu_to_apicid); /* physical ID */
99 extern u8 bios_cpu_apicid[];
101 #ifdef CONFIG_X86_LOCAL_APIC
102 static inline int cpu_present_to_apicid(int mps_cpu)
104 if (mps_cpu < NR_CPUS)
105 return (int)bios_cpu_apicid[mps_cpu];
112 #define stack_smp_processor_id() 0
113 #define cpu_logical_map(x) (x)
115 #include <asm/thread_info.h>
116 #define stack_smp_processor_id() \
118 struct thread_info *ti; \
119 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
124 #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_XEN)
125 static __inline int logical_smp_processor_id(void)
127 /* we don't want to mark this access volatile - bad code generation */
128 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
133 #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
135 extern unsigned int boot_cpu_id;
136 #define cpu_physical_id(cpu) boot_cpu_id
137 #endif /* !CONFIG_SMP */