arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <trace/events/kvm.h>
  50
  51 #define CREATE_TRACE_POINTS
  52 #include "trace.h"
  53
  54 #include <asm/debugreg.h>
  55 #include <asm/msr.h>
  56 #include <asm/desc.h>
  57 #include <asm/mtrr.h>
  58 #include <asm/mce.h>
  59 #include <asm/i387.h>
  60 #include <asm/xcr.h>
  61 #include <asm/pvclock.h>
  62 #include <asm/div64.h>
  63
  64 #define MAX_IO_MSRS 256
  65 #define KVM_MAX_MCE_BANKS 32
  66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  67
  68 #define emul_to_vcpu(ctxt) \
  69         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  70
  71 /* EFER defaults:
  72  * - enable syscall per default because its emulated by KVM
  73  * - enable LME and LMA per default on 64 bit KVM
  74  */
  75 #ifdef CONFIG_X86_64
  76 static
  77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  78 #else
  79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  80 #endif
  81
  82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  84
  85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  86 static void process_nmi(struct kvm_vcpu *vcpu);
  87
  88 struct kvm_x86_ops *kvm_x86_ops;
  89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  90
  91 int ignore_msrs = 0;
  92 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  93
  94 bool kvm_has_tsc_control;
  95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  96 u32  kvm_max_guest_tsc_khz;
  97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  98
  99 #define KVM_NR_SHARED_MSRS 16
 100
 101 struct kvm_shared_msrs_global {
 102         int nr;
 103         u32 msrs[KVM_NR_SHARED_MSRS];
 104 };
 105
 106 struct kvm_shared_msrs {
 107         struct user_return_notifier urn;
 108         bool registered;
 109         struct kvm_shared_msr_values {
 110                 u64 host;
 111                 u64 curr;
 112         } values[KVM_NR_SHARED_MSRS];
 113 };
 114
 115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 117
 118 struct kvm_stats_debugfs_item debugfs_entries[] = {
 119         { "pf_fixed", VCPU_STAT(pf_fixed) },
 120         { "pf_guest", VCPU_STAT(pf_guest) },
 121         { "tlb_flush", VCPU_STAT(tlb_flush) },
 122         { "invlpg", VCPU_STAT(invlpg) },
 123         { "exits", VCPU_STAT(exits) },
 124         { "io_exits", VCPU_STAT(io_exits) },
 125         { "mmio_exits", VCPU_STAT(mmio_exits) },
 126         { "signal_exits", VCPU_STAT(signal_exits) },
 127         { "irq_window", VCPU_STAT(irq_window_exits) },
 128         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 129         { "halt_exits", VCPU_STAT(halt_exits) },
 130         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 131         { "hypercalls", VCPU_STAT(hypercalls) },
 132         { "request_irq", VCPU_STAT(request_irq_exits) },
 133         { "irq_exits", VCPU_STAT(irq_exits) },
 134         { "host_state_reload", VCPU_STAT(host_state_reload) },
 135         { "efer_reload", VCPU_STAT(efer_reload) },
 136         { "fpu_reload", VCPU_STAT(fpu_reload) },
 137         { "insn_emulation", VCPU_STAT(insn_emulation) },
 138         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 139         { "irq_injections", VCPU_STAT(irq_injections) },
 140         { "nmi_injections", VCPU_STAT(nmi_injections) },
 141         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 142         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 143         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 144         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 145         { "mmu_flooded", VM_STAT(mmu_flooded) },
 146         { "mmu_recycled", VM_STAT(mmu_recycled) },
 147         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 148         { "mmu_unsync", VM_STAT(mmu_unsync) },
 149         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 150         { "largepages", VM_STAT(lpages) },
 151         { NULL }
 152 };
 153
 154 u64 __read_mostly host_xcr0;
 155
 156 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 157
 158 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 159 {
 160         int i;
 161         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 162                 vcpu->arch.apf.gfns[i] = ~0;
 163 }
 164
 165 static void kvm_on_user_return(struct user_return_notifier *urn)
 166 {
 167         unsigned slot;
 168         struct kvm_shared_msrs *locals
 169                 = container_of(urn, struct kvm_shared_msrs, urn);
 170         struct kvm_shared_msr_values *values;
 171
 172         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 173                 values = &locals->values[slot];
 174                 if (values->host != values->curr) {
 175                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 176                         values->curr = values->host;
 177                 }
 178         }
 179         locals->registered = false;
 180         user_return_notifier_unregister(urn);
 181 }
 182
 183 static void shared_msr_update(unsigned slot, u32 msr)
 184 {
 185         struct kvm_shared_msrs *smsr;
 186         u64 value;
 187
 188         smsr = &__get_cpu_var(shared_msrs);
 189         /* only read, and nobody should modify it at this time,
 190          * so don't need lock */
 191         if (slot >= shared_msrs_global.nr) {
 192                 printk(KERN_ERR "kvm: invalid MSR slot!");
 193                 return;
 194         }
 195         rdmsrl_safe(msr, &value);
 196         smsr->values[slot].host = value;
 197         smsr->values[slot].curr = value;
 198 }
 199
 200 void kvm_define_shared_msr(unsigned slot, u32 msr)
 201 {
 202         if (slot >= shared_msrs_global.nr)
 203                 shared_msrs_global.nr = slot + 1;
 204         shared_msrs_global.msrs[slot] = msr;
 205         /* we need ensured the shared_msr_global have been updated */
 206         smp_wmb();
 207 }
 208 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 209
 210 static void kvm_shared_msr_cpu_online(void)
 211 {
 212         unsigned i;
 213
 214         for (i = 0; i < shared_msrs_global.nr; ++i)
 215                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 216 }
 217
 218 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 219 {
 220         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 221
 222         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 223                 return;
 224         smsr->values[slot].curr = value;
 225         wrmsrl(shared_msrs_global.msrs[slot], value);
 226         if (!smsr->registered) {
 227                 smsr->urn.on_user_return = kvm_on_user_return;
 228                 user_return_notifier_register(&smsr->urn);
 229                 smsr->registered = true;
 230         }
 231 }
 232 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 233
 234 static void drop_user_return_notifiers(void *ignore)
 235 {
 236         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 237
 238         if (smsr->registered)
 239                 kvm_on_user_return(&smsr->urn);
 240 }
 241
 242 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 243 {
 244         if (irqchip_in_kernel(vcpu->kvm))
 245                 return vcpu->arch.apic_base;
 246         else
 247                 return vcpu->arch.apic_base;
 248 }
 249 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 250
 251 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 252 {
 253         /* TODO: reserve bits check */
 254         if (irqchip_in_kernel(vcpu->kvm))
 255                 kvm_lapic_set_base(vcpu, data);
 256         else
 257                 vcpu->arch.apic_base = data;
 258 }
 259 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 260
 261 #define EXCPT_BENIGN            0
 262 #define EXCPT_CONTRIBUTORY      1
 263 #define EXCPT_PF                2
 264
 265 static int exception_class(int vector)
 266 {
 267         switch (vector) {
 268         case PF_VECTOR:
 269                 return EXCPT_PF;
 270         case DE_VECTOR:
 271         case TS_VECTOR:
 272         case NP_VECTOR:
 273         case SS_VECTOR:
 274         case GP_VECTOR:
 275                 return EXCPT_CONTRIBUTORY;
 276         default:
 277                 break;
 278         }
 279         return EXCPT_BENIGN;
 280 }
 281
 282 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 283                 unsigned nr, bool has_error, u32 error_code,
 284                 bool reinject)
 285 {
 286         u32 prev_nr;
 287         int class1, class2;
 288
 289         kvm_make_request(KVM_REQ_EVENT, vcpu);
 290
 291         if (!vcpu->arch.exception.pending) {
 292         queue:
 293                 vcpu->arch.exception.pending = true;
 294                 vcpu->arch.exception.has_error_code = has_error;
 295                 vcpu->arch.exception.nr = nr;
 296                 vcpu->arch.exception.error_code = error_code;
 297                 vcpu->arch.exception.reinject = reinject;
 298                 return;
 299         }
 300
 301         /* to check exception */
 302         prev_nr = vcpu->arch.exception.nr;
 303         if (prev_nr == DF_VECTOR) {
 304                 /* triple fault -> shutdown */
 305                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 306                 return;
 307         }
 308         class1 = exception_class(prev_nr);
 309         class2 = exception_class(nr);
 310         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 311                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 312                 /* generate double fault per SDM Table 5-5 */
 313                 vcpu->arch.exception.pending = true;
 314                 vcpu->arch.exception.has_error_code = true;
 315                 vcpu->arch.exception.nr = DF_VECTOR;
 316                 vcpu->arch.exception.error_code = 0;
 317         } else
 318                 /* replace previous exception with a new one in a hope
 319                    that instruction re-execution will regenerate lost
 320                    exception */
 321                 goto queue;
 322 }
 323
 324 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 325 {
 326         kvm_multiple_exception(vcpu, nr, false, 0, false);
 327 }
 328 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 329
 330 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 331 {
 332         kvm_multiple_exception(vcpu, nr, false, 0, true);
 333 }
 334 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 335
 336 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 337 {
 338         if (err)
 339                 kvm_inject_gp(vcpu, 0);
 340         else
 341                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 342 }
 343 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 344
 345 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 346 {
 347         ++vcpu->stat.pf_guest;
 348         vcpu->arch.cr2 = fault->address;
 349         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 350 }
 351 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 352
 353 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 354 {
 355         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 356                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 357         else
 358                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 359 }
 360
 361 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 362 {
 363         atomic_inc(&vcpu->arch.nmi_queued);
 364         kvm_make_request(KVM_REQ_NMI, vcpu);
 365 }
 366 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 367
 368 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 369 {
 370         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 371 }
 372 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 373
 374 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 375 {
 376         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 377 }
 378 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 379
 380 /*
 381  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 382  * a #GP and return false.
 383  */
 384 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 385 {
 386         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 387                 return true;
 388         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 389         return false;
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 392
 393 /*
 394  * This function will be used to read from the physical memory of the currently
 395  * running guest. The difference to kvm_read_guest_page is that this function
 396  * can read from guest physical or from the guest's guest physical memory.
 397  */
 398 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 399                             gfn_t ngfn, void *data, int offset, int len,
 400                             u32 access)
 401 {
 402         gfn_t real_gfn;
 403         gpa_t ngpa;
 404
 405         ngpa     = gfn_to_gpa(ngfn);
 406         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 407         if (real_gfn == UNMAPPED_GVA)
 408                 return -EFAULT;
 409
 410         real_gfn = gpa_to_gfn(real_gfn);
 411
 412         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 413 }
 414 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 415
 416 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 417                                void *data, int offset, int len, u32 access)
 418 {
 419         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 420                                        data, offset, len, access);
 421 }
 422
 423 /*
 424  * Load the pae pdptrs.  Return true is they are all valid.
 425  */
 426 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 427 {
 428         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 429         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 430         int i;
 431         int ret;
 432         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 433
 434         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 435                                       offset * sizeof(u64), sizeof(pdpte),
 436                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 437         if (ret < 0) {
 438                 ret = 0;
 439                 goto out;
 440         }
 441         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 442                 if (is_present_gpte(pdpte[i]) &&
 443                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 444                         ret = 0;
 445                         goto out;
 446                 }
 447         }
 448         ret = 1;
 449
 450         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 451         __set_bit(VCPU_EXREG_PDPTR,
 452                   (unsigned long *)&vcpu->arch.regs_avail);
 453         __set_bit(VCPU_EXREG_PDPTR,
 454                   (unsigned long *)&vcpu->arch.regs_dirty);
 455 out:
 456
 457         return ret;
 458 }
 459 EXPORT_SYMBOL_GPL(load_pdptrs);
 460
 461 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 462 {
 463         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 464         bool changed = true;
 465         int offset;
 466         gfn_t gfn;
 467         int r;
 468
 469         if (is_long_mode(vcpu) || !is_pae(vcpu))
 470                 return false;
 471
 472         if (!test_bit(VCPU_EXREG_PDPTR,
 473                       (unsigned long *)&vcpu->arch.regs_avail))
 474                 return true;
 475
 476         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 477         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 478         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 479                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 480         if (r < 0)
 481                 goto out;
 482         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 483 out:
 484
 485         return changed;
 486 }
 487
 488 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 489 {
 490         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 491         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 492                                     X86_CR0_CD | X86_CR0_NW;
 493
 494         cr0 |= X86_CR0_ET;
 495
 496 #ifdef CONFIG_X86_64
 497         if (cr0 & 0xffffffff00000000UL)
 498                 return 1;
 499 #endif
 500
 501         cr0 &= ~CR0_RESERVED_BITS;
 502
 503         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 504                 return 1;
 505
 506         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 507                 return 1;
 508
 509         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 510 #ifdef CONFIG_X86_64
 511                 if ((vcpu->arch.efer & EFER_LME)) {
 512                         int cs_db, cs_l;
 513
 514                         if (!is_pae(vcpu))
 515                                 return 1;
 516                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 517                         if (cs_l)
 518                                 return 1;
 519                 } else
 520 #endif
 521                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 522                                                  kvm_read_cr3(vcpu)))
 523                         return 1;
 524         }
 525
 526         kvm_x86_ops->set_cr0(vcpu, cr0);
 527
 528         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 529                 kvm_clear_async_pf_completion_queue(vcpu);
 530                 kvm_async_pf_hash_reset(vcpu);
 531         }
 532
 533         if ((cr0 ^ old_cr0) & update_bits)
 534                 kvm_mmu_reset_context(vcpu);
 535         return 0;
 536 }
 537 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 538
 539 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 540 {
 541         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 542 }
 543 EXPORT_SYMBOL_GPL(kvm_lmsw);
 544
 545 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 546 {
 547         u64 xcr0;
 548
 549         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 550         if (index != XCR_XFEATURE_ENABLED_MASK)
 551                 return 1;
 552         xcr0 = xcr;
 553         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 554                 return 1;
 555         if (!(xcr0 & XSTATE_FP))
 556                 return 1;
 557         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 558                 return 1;
 559         if (xcr0 & ~host_xcr0)
 560                 return 1;
 561         vcpu->arch.xcr0 = xcr0;
 562         vcpu->guest_xcr0_loaded = 0;
 563         return 0;
 564 }
 565
 566 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 567 {
 568         if (__kvm_set_xcr(vcpu, index, xcr)) {
 569                 kvm_inject_gp(vcpu, 0);
 570                 return 1;
 571         }
 572         return 0;
 573 }
 574 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 575
 576 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 577 {
 578         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 579         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 580                                    X86_CR4_PAE | X86_CR4_SMEP;
 581         if (cr4 & CR4_RESERVED_BITS)
 582                 return 1;
 583
 584         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 585                 return 1;
 586
 587         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 588                 return 1;
 589
 590         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 591                 return 1;
 592
 593         if (is_long_mode(vcpu)) {
 594                 if (!(cr4 & X86_CR4_PAE))
 595                         return 1;
 596         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 597                    && ((cr4 ^ old_cr4) & pdptr_bits)
 598                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 599                                    kvm_read_cr3(vcpu)))
 600                 return 1;
 601
 602         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 603                 return 1;
 604
 605         if ((cr4 ^ old_cr4) & pdptr_bits)
 606                 kvm_mmu_reset_context(vcpu);
 607
 608         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 609                 kvm_update_cpuid(vcpu);
 610
 611         return 0;
 612 }
 613 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 614
 615 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 616 {
 617         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 618                 kvm_mmu_sync_roots(vcpu);
 619                 kvm_mmu_flush_tlb(vcpu);
 620                 return 0;
 621         }
 622
 623         if (is_long_mode(vcpu)) {
 624                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 625                         return 1;
 626         } else {
 627                 if (is_pae(vcpu)) {
 628                         if (cr3 & CR3_PAE_RESERVED_BITS)
 629                                 return 1;
 630                         if (is_paging(vcpu) &&
 631                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 632                                 return 1;
 633                 }
 634                 /*
 635                  * We don't check reserved bits in nonpae mode, because
 636                  * this isn't enforced, and VMware depends on this.
 637                  */
 638         }
 639
 640         /*
 641          * Does the new cr3 value map to physical memory? (Note, we
 642          * catch an invalid cr3 even in real-mode, because it would
 643          * cause trouble later on when we turn on paging anyway.)
 644          *
 645          * A real CPU would silently accept an invalid cr3 and would
 646          * attempt to use it - with largely undefined (and often hard
 647          * to debug) behavior on the guest side.
 648          */
 649         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 650                 return 1;
 651         vcpu->arch.cr3 = cr3;
 652         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 653         vcpu->arch.mmu.new_cr3(vcpu);
 654         return 0;
 655 }
 656 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 657
 658 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 659 {
 660         if (cr8 & CR8_RESERVED_BITS)
 661                 return 1;
 662         if (irqchip_in_kernel(vcpu->kvm))
 663                 kvm_lapic_set_tpr(vcpu, cr8);
 664         else
 665                 vcpu->arch.cr8 = cr8;
 666         return 0;
 667 }
 668 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 669
 670 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 671 {
 672         if (irqchip_in_kernel(vcpu->kvm))
 673                 return kvm_lapic_get_cr8(vcpu);
 674         else
 675                 return vcpu->arch.cr8;
 676 }
 677 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 678
 679 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 680 {
 681         switch (dr) {
 682         case 0 ... 3:
 683                 vcpu->arch.db[dr] = val;
 684                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 685                         vcpu->arch.eff_db[dr] = val;
 686                 break;
 687         case 4:
 688                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 689                         return 1; /* #UD */
 690                 /* fall through */
 691         case 6:
 692                 if (val & 0xffffffff00000000ULL)
 693                         return -1; /* #GP */
 694                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 695                 break;
 696         case 5:
 697                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 698                         return 1; /* #UD */
 699                 /* fall through */
 700         default: /* 7 */
 701                 if (val & 0xffffffff00000000ULL)
 702                         return -1; /* #GP */
 703                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 704                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 705                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 706                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 707                 }
 708                 break;
 709         }
 710
 711         return 0;
 712 }
 713
 714 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 715 {
 716         int res;
 717
 718         res = __kvm_set_dr(vcpu, dr, val);
 719         if (res > 0)
 720                 kvm_queue_exception(vcpu, UD_VECTOR);
 721         else if (res < 0)
 722                 kvm_inject_gp(vcpu, 0);
 723
 724         return res;
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_set_dr);
 727
 728 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 729 {
 730         switch (dr) {
 731         case 0 ... 3:
 732                 *val = vcpu->arch.db[dr];
 733                 break;
 734         case 4:
 735                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 736                         return 1;
 737                 /* fall through */
 738         case 6:
 739                 *val = vcpu->arch.dr6;
 740                 break;
 741         case 5:
 742                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 743                         return 1;
 744                 /* fall through */
 745         default: /* 7 */
 746                 *val = vcpu->arch.dr7;
 747                 break;
 748         }
 749
 750         return 0;
 751 }
 752
 753 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 754 {
 755         if (_kvm_get_dr(vcpu, dr, val)) {
 756                 kvm_queue_exception(vcpu, UD_VECTOR);
 757                 return 1;
 758         }
 759         return 0;
 760 }
 761 EXPORT_SYMBOL_GPL(kvm_get_dr);
 762
 763 /*
 764  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 765  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 766  *
 767  * This list is modified at module load time to reflect the
 768  * capabilities of the host cpu. This capabilities test skips MSRs that are
 769  * kvm-specific. Those are put in the beginning of the list.
 770  */
 771
 772 #define KVM_SAVE_MSRS_BEGIN     9
 773 static u32 msrs_to_save[] = {
 774         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 775         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 776         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 777         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 778         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 779         MSR_STAR,
 780 #ifdef CONFIG_X86_64
 781         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 782 #endif
 783         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 784 };
 785
 786 static unsigned num_msrs_to_save;
 787
 788 static u32 emulated_msrs[] = {
 789         MSR_IA32_TSCDEADLINE,
 790         MSR_IA32_MISC_ENABLE,
 791         MSR_IA32_MCG_STATUS,
 792         MSR_IA32_MCG_CTL,
 793 };
 794
 795 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 796 {
 797         u64 old_efer = vcpu->arch.efer;
 798
 799         if (efer & efer_reserved_bits)
 800                 return 1;
 801
 802         if (is_paging(vcpu)
 803             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 804                 return 1;
 805
 806         if (efer & EFER_FFXSR) {
 807                 struct kvm_cpuid_entry2 *feat;
 808
 809                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 810                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 811                         return 1;
 812         }
 813
 814         if (efer & EFER_SVME) {
 815                 struct kvm_cpuid_entry2 *feat;
 816
 817                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 818                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 819                         return 1;
 820         }
 821
 822         efer &= ~EFER_LMA;
 823         efer |= vcpu->arch.efer & EFER_LMA;
 824
 825         kvm_x86_ops->set_efer(vcpu, efer);
 826
 827         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 828
 829         /* Update reserved bits */
 830         if ((efer ^ old_efer) & EFER_NX)
 831                 kvm_mmu_reset_context(vcpu);
 832
 833         return 0;
 834 }
 835
 836 void kvm_enable_efer_bits(u64 mask)
 837 {
 838        efer_reserved_bits &= ~mask;
 839 }
 840 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 841
 842
 843 /*
 844  * Writes msr value into into the appropriate "register".
 845  * Returns 0 on success, non-0 otherwise.
 846  * Assumes vcpu_load() was already called.
 847  */
 848 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 849 {
 850         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 851 }
 852
 853 /*
 854  * Adapt set_msr() to msr_io()'s calling convention
 855  */
 856 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 857 {
 858         return kvm_set_msr(vcpu, index, *data);
 859 }
 860
 861 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 862 {
 863         int version;
 864         int r;
 865         struct pvclock_wall_clock wc;
 866         struct timespec boot;
 867
 868         if (!wall_clock)
 869                 return;
 870
 871         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 872         if (r)
 873                 return;
 874
 875         if (version & 1)
 876                 ++version;  /* first time write, random junk */
 877
 878         ++version;
 879
 880         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 881
 882         /*
 883          * The guest calculates current wall clock time by adding
 884          * system time (updated by kvm_guest_time_update below) to the
 885          * wall clock specified here.  guest system time equals host
 886          * system time for us, thus we must fill in host boot time here.
 887          */
 888         getboottime(&boot);
 889
 890         wc.sec = boot.tv_sec;
 891         wc.nsec = boot.tv_nsec;
 892         wc.version = version;
 893
 894         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 895
 896         version++;
 897         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 898 }
 899
 900 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 901 {
 902         uint32_t quotient, remainder;
 903
 904         /* Don't try to replace with do_div(), this one calculates
 905          * "(dividend << 32) / divisor" */
 906         __asm__ ( "divl %4"
 907                   : "=a" (quotient), "=d" (remainder)
 908                   : "0" (0), "1" (dividend), "r" (divisor) );
 909         return quotient;
 910 }
 911
 912 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 913                                s8 *pshift, u32 *pmultiplier)
 914 {
 915         uint64_t scaled64;
 916         int32_t  shift = 0;
 917         uint64_t tps64;
 918         uint32_t tps32;
 919
 920         tps64 = base_khz * 1000LL;
 921         scaled64 = scaled_khz * 1000LL;
 922         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 923                 tps64 >>= 1;
 924                 shift--;
 925         }
 926
 927         tps32 = (uint32_t)tps64;
 928         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 929                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 930                         scaled64 >>= 1;
 931                 else
 932                         tps32 <<= 1;
 933                 shift++;
 934         }
 935
 936         *pshift = shift;
 937         *pmultiplier = div_frac(scaled64, tps32);
 938
 939         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 940                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 941 }
 942
 943 static inline u64 get_kernel_ns(void)
 944 {
 945         struct timespec ts;
 946
 947         WARN_ON(preemptible());
 948         ktime_get_ts(&ts);
 949         monotonic_to_bootbased(&ts);
 950         return timespec_to_ns(&ts);
 951 }
 952
 953 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 954 unsigned long max_tsc_khz;
 955
 956 static inline int kvm_tsc_changes_freq(void)
 957 {
 958         int cpu = get_cpu();
 959         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 960                   cpufreq_quick_get(cpu) != 0;
 961         put_cpu();
 962         return ret;
 963 }
 964
 965 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
 966 {
 967         if (vcpu->arch.virtual_tsc_khz)
 968                 return vcpu->arch.virtual_tsc_khz;
 969         else
 970                 return __this_cpu_read(cpu_tsc_khz);
 971 }
 972
 973 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 974 {
 975         u64 ret;
 976
 977         WARN_ON(preemptible());
 978         if (kvm_tsc_changes_freq())
 979                 printk_once(KERN_WARNING
 980                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 981         ret = nsec * vcpu_tsc_khz(vcpu);
 982         do_div(ret, USEC_PER_SEC);
 983         return ret;
 984 }
 985
 986 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
 987 {
 988         /* Compute a scale to convert nanoseconds in TSC cycles */
 989         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 990                            &vcpu->arch.tsc_catchup_shift,
 991                            &vcpu->arch.tsc_catchup_mult);
 992 }
 993
 994 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
 995 {
 996         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
 997                                       vcpu->arch.tsc_catchup_mult,
 998                                       vcpu->arch.tsc_catchup_shift);
 999         tsc += vcpu->arch.last_tsc_write;
1000         return tsc;
1001 }
1002
1003 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1004 {
1005         struct kvm *kvm = vcpu->kvm;
1006         u64 offset, ns, elapsed;
1007         unsigned long flags;
1008         s64 sdiff;
1009
1010         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1011         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1012         ns = get_kernel_ns();
1013         elapsed = ns - kvm->arch.last_tsc_nsec;
1014         sdiff = data - kvm->arch.last_tsc_write;
1015         if (sdiff < 0)
1016                 sdiff = -sdiff;
1017
1018         /*
1019          * Special case: close write to TSC within 5 seconds of
1020          * another CPU is interpreted as an attempt to synchronize
1021          * The 5 seconds is to accommodate host load / swapping as
1022          * well as any reset of TSC during the boot process.
1023          *
1024          * In that case, for a reliable TSC, we can match TSC offsets,
1025          * or make a best guest using elapsed value.
1026          */
1027         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1028             elapsed < 5ULL * NSEC_PER_SEC) {
1029                 if (!check_tsc_unstable()) {
1030                         offset = kvm->arch.last_tsc_offset;
1031                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1032                 } else {
1033                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1034                         offset += delta;
1035                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1036                 }
1037                 ns = kvm->arch.last_tsc_nsec;
1038         }
1039         kvm->arch.last_tsc_nsec = ns;
1040         kvm->arch.last_tsc_write = data;
1041         kvm->arch.last_tsc_offset = offset;
1042         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1043         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1044
1045         /* Reset of TSC must disable overshoot protection below */
1046         vcpu->arch.hv_clock.tsc_timestamp = 0;
1047         vcpu->arch.last_tsc_write = data;
1048         vcpu->arch.last_tsc_nsec = ns;
1049 }
1050 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1051
1052 static int kvm_guest_time_update(struct kvm_vcpu *v)
1053 {
1054         unsigned long flags;
1055         struct kvm_vcpu_arch *vcpu = &v->arch;
1056         void *shared_kaddr;
1057         unsigned long this_tsc_khz;
1058         s64 kernel_ns, max_kernel_ns;
1059         u64 tsc_timestamp;
1060
1061         /* Keep irq disabled to prevent changes to the clock */
1062         local_irq_save(flags);
1063         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1064         kernel_ns = get_kernel_ns();
1065         this_tsc_khz = vcpu_tsc_khz(v);
1066         if (unlikely(this_tsc_khz == 0)) {
1067                 local_irq_restore(flags);
1068                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1069                 return 1;
1070         }
1071
1072         /*
1073          * We may have to catch up the TSC to match elapsed wall clock
1074          * time for two reasons, even if kvmclock is used.
1075          *   1) CPU could have been running below the maximum TSC rate
1076          *   2) Broken TSC compensation resets the base at each VCPU
1077          *      entry to avoid unknown leaps of TSC even when running
1078          *      again on the same CPU.  This may cause apparent elapsed
1079          *      time to disappear, and the guest to stand still or run
1080          *      very slowly.
1081          */
1082         if (vcpu->tsc_catchup) {
1083                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1084                 if (tsc > tsc_timestamp) {
1085                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1086                         tsc_timestamp = tsc;
1087                 }
1088         }
1089
1090         local_irq_restore(flags);
1091
1092         if (!vcpu->time_page)
1093                 return 0;
1094
1095         /*
1096          * Time as measured by the TSC may go backwards when resetting the base
1097          * tsc_timestamp.  The reason for this is that the TSC resolution is
1098          * higher than the resolution of the other clock scales.  Thus, many
1099          * possible measurments of the TSC correspond to one measurement of any
1100          * other clock, and so a spread of values is possible.  This is not a
1101          * problem for the computation of the nanosecond clock; with TSC rates
1102          * around 1GHZ, there can only be a few cycles which correspond to one
1103          * nanosecond value, and any path through this code will inevitably
1104          * take longer than that.  However, with the kernel_ns value itself,
1105          * the precision may be much lower, down to HZ granularity.  If the
1106          * first sampling of TSC against kernel_ns ends in the low part of the
1107          * range, and the second in the high end of the range, we can get:
1108          *
1109          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1110          *
1111          * As the sampling errors potentially range in the thousands of cycles,
1112          * it is possible such a time value has already been observed by the
1113          * guest.  To protect against this, we must compute the system time as
1114          * observed by the guest and ensure the new system time is greater.
1115          */
1116         max_kernel_ns = 0;
1117         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1118                 max_kernel_ns = vcpu->last_guest_tsc -
1119                                 vcpu->hv_clock.tsc_timestamp;
1120                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1121                                     vcpu->hv_clock.tsc_to_system_mul,
1122                                     vcpu->hv_clock.tsc_shift);
1123                 max_kernel_ns += vcpu->last_kernel_ns;
1124         }
1125
1126         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1127                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1128                                    &vcpu->hv_clock.tsc_shift,
1129                                    &vcpu->hv_clock.tsc_to_system_mul);
1130                 vcpu->hw_tsc_khz = this_tsc_khz;
1131         }
1132
1133         if (max_kernel_ns > kernel_ns)
1134                 kernel_ns = max_kernel_ns;
1135
1136         /* With all the info we got, fill in the values */
1137         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1138         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1139         vcpu->last_kernel_ns = kernel_ns;
1140         vcpu->last_guest_tsc = tsc_timestamp;
1141         vcpu->hv_clock.flags = 0;
1142
1143         /*
1144          * The interface expects us to write an even number signaling that the
1145          * update is finished. Since the guest won't see the intermediate
1146          * state, we just increase by 2 at the end.
1147          */
1148         vcpu->hv_clock.version += 2;
1149
1150         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1151
1152         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1153                sizeof(vcpu->hv_clock));
1154
1155         kunmap_atomic(shared_kaddr, KM_USER0);
1156
1157         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1158         return 0;
1159 }
1160
1161 static bool msr_mtrr_valid(unsigned msr)
1162 {
1163         switch (msr) {
1164         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1165         case MSR_MTRRfix64K_00000:
1166         case MSR_MTRRfix16K_80000:
1167         case MSR_MTRRfix16K_A0000:
1168         case MSR_MTRRfix4K_C0000:
1169         case MSR_MTRRfix4K_C8000:
1170         case MSR_MTRRfix4K_D0000:
1171         case MSR_MTRRfix4K_D8000:
1172         case MSR_MTRRfix4K_E0000:
1173         case MSR_MTRRfix4K_E8000:
1174         case MSR_MTRRfix4K_F0000:
1175         case MSR_MTRRfix4K_F8000:
1176         case MSR_MTRRdefType:
1177         case MSR_IA32_CR_PAT:
1178                 return true;
1179         case 0x2f8:
1180                 return true;
1181         }
1182         return false;
1183 }
1184
1185 static bool valid_pat_type(unsigned t)
1186 {
1187         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1188 }
1189
1190 static bool valid_mtrr_type(unsigned t)
1191 {
1192         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1193 }
1194
1195 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1196 {
1197         int i;
1198
1199         if (!msr_mtrr_valid(msr))
1200                 return false;
1201
1202         if (msr == MSR_IA32_CR_PAT) {
1203                 for (i = 0; i < 8; i++)
1204                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1205                                 return false;
1206                 return true;
1207         } else if (msr == MSR_MTRRdefType) {
1208                 if (data & ~0xcff)
1209                         return false;
1210                 return valid_mtrr_type(data & 0xff);
1211         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1212                 for (i = 0; i < 8 ; i++)
1213                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1214                                 return false;
1215                 return true;
1216         }
1217
1218         /* variable MTRRs */
1219         return valid_mtrr_type(data & 0xff);
1220 }
1221
1222 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1223 {
1224         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1225
1226         if (!mtrr_valid(vcpu, msr, data))
1227                 return 1;
1228
1229         if (msr == MSR_MTRRdefType) {
1230                 vcpu->arch.mtrr_state.def_type = data;
1231                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1232         } else if (msr == MSR_MTRRfix64K_00000)
1233                 p[0] = data;
1234         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1235                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1236         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1237                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1238         else if (msr == MSR_IA32_CR_PAT)
1239                 vcpu->arch.pat = data;
1240         else {  /* Variable MTRRs */
1241                 int idx, is_mtrr_mask;
1242                 u64 *pt;
1243
1244                 idx = (msr - 0x200) / 2;
1245                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1246                 if (!is_mtrr_mask)
1247                         pt =
1248                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1249                 else
1250                         pt =
1251                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1252                 *pt = data;
1253         }
1254
1255         kvm_mmu_reset_context(vcpu);
1256         return 0;
1257 }
1258
1259 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1260 {
1261         u64 mcg_cap = vcpu->arch.mcg_cap;
1262         unsigned bank_num = mcg_cap & 0xff;
1263
1264         switch (msr) {
1265         case MSR_IA32_MCG_STATUS:
1266                 vcpu->arch.mcg_status = data;
1267                 break;
1268         case MSR_IA32_MCG_CTL:
1269                 if (!(mcg_cap & MCG_CTL_P))
1270                         return 1;
1271                 if (data != 0 && data != ~(u64)0)
1272                         return -1;
1273                 vcpu->arch.mcg_ctl = data;
1274                 break;
1275         default:
1276                 if (msr >= MSR_IA32_MC0_CTL &&
1277                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1278                         u32 offset = msr - MSR_IA32_MC0_CTL;
1279                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1280                          * some Linux kernels though clear bit 10 in bank 4 to
1281                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1282                          * this to avoid an uncatched #GP in the guest
1283                          */
1284                         if ((offset & 0x3) == 0 &&
1285                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1286                                 return -1;
1287                         vcpu->arch.mce_banks[offset] = data;
1288                         break;
1289                 }
1290                 return 1;
1291         }
1292         return 0;
1293 }
1294
1295 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1296 {
1297         struct kvm *kvm = vcpu->kvm;
1298         int lm = is_long_mode(vcpu);
1299         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1300                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1301         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1302                 : kvm->arch.xen_hvm_config.blob_size_32;
1303         u32 page_num = data & ~PAGE_MASK;
1304         u64 page_addr = data & PAGE_MASK;
1305         u8 *page;
1306         int r;
1307
1308         r = -E2BIG;
1309         if (page_num >= blob_size)
1310                 goto out;
1311         r = -ENOMEM;
1312         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1313         if (IS_ERR(page)) {
1314                 r = PTR_ERR(page);
1315                 goto out;
1316         }
1317         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1318                 goto out_free;
1319         r = 0;
1320 out_free:
1321         kfree(page);
1322 out:
1323         return r;
1324 }
1325
1326 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1327 {
1328         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1329 }
1330
1331 static bool kvm_hv_msr_partition_wide(u32 msr)
1332 {
1333         bool r = false;
1334         switch (msr) {
1335         case HV_X64_MSR_GUEST_OS_ID:
1336         case HV_X64_MSR_HYPERCALL:
1337                 r = true;
1338                 break;
1339         }
1340
1341         return r;
1342 }
1343
1344 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1345 {
1346         struct kvm *kvm = vcpu->kvm;
1347
1348         switch (msr) {
1349         case HV_X64_MSR_GUEST_OS_ID:
1350                 kvm->arch.hv_guest_os_id = data;
1351                 /* setting guest os id to zero disables hypercall page */
1352                 if (!kvm->arch.hv_guest_os_id)
1353                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1354                 break;
1355         case HV_X64_MSR_HYPERCALL: {
1356                 u64 gfn;
1357                 unsigned long addr;
1358                 u8 instructions[4];
1359
1360                 /* if guest os id is not set hypercall should remain disabled */
1361                 if (!kvm->arch.hv_guest_os_id)
1362                         break;
1363                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1364                         kvm->arch.hv_hypercall = data;
1365                         break;
1366                 }
1367                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1368                 addr = gfn_to_hva(kvm, gfn);
1369                 if (kvm_is_error_hva(addr))
1370                         return 1;
1371                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1372                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1373                 if (__copy_to_user((void __user *)addr, instructions, 4))
1374                         return 1;
1375                 kvm->arch.hv_hypercall = data;
1376                 break;
1377         }
1378         default:
1379                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1380                           "data 0x%llx\n", msr, data);
1381                 return 1;
1382         }
1383         return 0;
1384 }
1385
1386 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1387 {
1388         switch (msr) {
1389         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1390                 unsigned long addr;
1391
1392                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1393                         vcpu->arch.hv_vapic = data;
1394                         break;
1395                 }
1396                 addr = gfn_to_hva(vcpu->kvm, data >>
1397                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1398                 if (kvm_is_error_hva(addr))
1399                         return 1;
1400                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1401                         return 1;
1402                 vcpu->arch.hv_vapic = data;
1403                 break;
1404         }
1405         case HV_X64_MSR_EOI:
1406                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1407         case HV_X64_MSR_ICR:
1408                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1409         case HV_X64_MSR_TPR:
1410                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1411         default:
1412                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1413                           "data 0x%llx\n", msr, data);
1414                 return 1;
1415         }
1416
1417         return 0;
1418 }
1419
1420 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1421 {
1422         gpa_t gpa = data & ~0x3f;
1423
1424         /* Bits 2:5 are resrved, Should be zero */
1425         if (data & 0x3c)
1426                 return 1;
1427
1428         vcpu->arch.apf.msr_val = data;
1429
1430         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1431                 kvm_clear_async_pf_completion_queue(vcpu);
1432                 kvm_async_pf_hash_reset(vcpu);
1433                 return 0;
1434         }
1435
1436         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1437                 return 1;
1438
1439         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1440         kvm_async_pf_wakeup_all(vcpu);
1441         return 0;
1442 }
1443
1444 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1445 {
1446         if (vcpu->arch.time_page) {
1447                 kvm_release_page_dirty(vcpu->arch.time_page);
1448                 vcpu->arch.time_page = NULL;
1449         }
1450 }
1451
1452 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1453 {
1454         u64 delta;
1455
1456         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1457                 return;
1458
1459         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1460         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1461         vcpu->arch.st.accum_steal = delta;
1462 }
1463
1464 static void record_steal_time(struct kvm_vcpu *vcpu)
1465 {
1466         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1467                 return;
1468
1469         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1470                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1471                 return;
1472
1473         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1474         vcpu->arch.st.steal.version += 2;
1475         vcpu->arch.st.accum_steal = 0;
1476
1477         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1478                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1479 }
1480
1481 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1482 {
1483         switch (msr) {
1484         case MSR_EFER:
1485                 return set_efer(vcpu, data);
1486         case MSR_K7_HWCR:
1487                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1488                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1489                 if (data != 0) {
1490                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1491                                 data);
1492                         return 1;
1493                 }
1494                 break;
1495         case MSR_FAM10H_MMIO_CONF_BASE:
1496                 if (data != 0) {
1497                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1498                                 "0x%llx\n", data);
1499                         return 1;
1500                 }
1501                 break;
1502         case MSR_AMD64_NB_CFG:
1503                 break;
1504         case MSR_IA32_DEBUGCTLMSR:
1505                 if (!data) {
1506                         /* We support the non-activated case already */
1507                         break;
1508                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1509                         /* Values other than LBR and BTF are vendor-specific,
1510                            thus reserved and should throw a #GP */
1511                         return 1;
1512                 }
1513                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1514                         __func__, data);
1515                 break;
1516         case MSR_IA32_UCODE_REV:
1517         case MSR_IA32_UCODE_WRITE:
1518         case MSR_VM_HSAVE_PA:
1519         case MSR_AMD64_PATCH_LOADER:
1520                 break;
1521         case 0x200 ... 0x2ff:
1522                 return set_msr_mtrr(vcpu, msr, data);
1523         case MSR_IA32_APICBASE:
1524                 kvm_set_apic_base(vcpu, data);
1525                 break;
1526         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1527                 return kvm_x2apic_msr_write(vcpu, msr, data);
1528         case MSR_IA32_TSCDEADLINE:
1529                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1530                 break;
1531         case MSR_IA32_MISC_ENABLE:
1532                 vcpu->arch.ia32_misc_enable_msr = data;
1533                 break;
1534         case MSR_KVM_WALL_CLOCK_NEW:
1535         case MSR_KVM_WALL_CLOCK:
1536                 vcpu->kvm->arch.wall_clock = data;
1537                 kvm_write_wall_clock(vcpu->kvm, data);
1538                 break;
1539         case MSR_KVM_SYSTEM_TIME_NEW:
1540         case MSR_KVM_SYSTEM_TIME: {
1541                 kvmclock_reset(vcpu);
1542
1543                 vcpu->arch.time = data;
1544                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1545
1546                 /* we verify if the enable bit is set... */
1547                 if (!(data & 1))
1548                         break;
1549
1550                 /* ...but clean it before doing the actual write */
1551                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1552
1553                 vcpu->arch.time_page =
1554                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1555
1556                 if (is_error_page(vcpu->arch.time_page)) {
1557                         kvm_release_page_clean(vcpu->arch.time_page);
1558                         vcpu->arch.time_page = NULL;
1559                 }
1560                 break;
1561         }
1562         case MSR_KVM_ASYNC_PF_EN:
1563                 if (kvm_pv_enable_async_pf(vcpu, data))
1564                         return 1;
1565                 break;
1566         case MSR_KVM_STEAL_TIME:
1567
1568                 if (unlikely(!sched_info_on()))
1569                         return 1;
1570
1571                 if (data & KVM_STEAL_RESERVED_MASK)
1572                         return 1;
1573
1574                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1575                                                         data & KVM_STEAL_VALID_BITS))
1576                         return 1;
1577
1578                 vcpu->arch.st.msr_val = data;
1579
1580                 if (!(data & KVM_MSR_ENABLED))
1581                         break;
1582
1583                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1584
1585                 preempt_disable();
1586                 accumulate_steal_time(vcpu);
1587                 preempt_enable();
1588
1589                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1590
1591                 break;
1592
1593         case MSR_IA32_MCG_CTL:
1594         case MSR_IA32_MCG_STATUS:
1595         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1596                 return set_msr_mce(vcpu, msr, data);
1597
1598         /* Performance counters are not protected by a CPUID bit,
1599          * so we should check all of them in the generic path for the sake of
1600          * cross vendor migration.
1601          * Writing a zero into the event select MSRs disables them,
1602          * which we perfectly emulate ;-). Any other value should be at least
1603          * reported, some guests depend on them.
1604          */
1605         case MSR_K7_EVNTSEL0:
1606         case MSR_K7_EVNTSEL1:
1607         case MSR_K7_EVNTSEL2:
1608         case MSR_K7_EVNTSEL3:
1609                 if (data != 0)
1610                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1611                                 "0x%x data 0x%llx\n", msr, data);
1612                 break;
1613         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1614          * so we ignore writes to make it happy.
1615          */
1616         case MSR_K7_PERFCTR0:
1617         case MSR_K7_PERFCTR1:
1618         case MSR_K7_PERFCTR2:
1619         case MSR_K7_PERFCTR3:
1620                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1621                         "0x%x data 0x%llx\n", msr, data);
1622                 break;
1623         case MSR_K7_CLK_CTL:
1624                 /*
1625                  * Ignore all writes to this no longer documented MSR.
1626                  * Writes are only relevant for old K7 processors,
1627                  * all pre-dating SVM, but a recommended workaround from
1628                  * AMD for these chips. It is possible to speicify the
1629                  * affected processor models on the command line, hence
1630                  * the need to ignore the workaround.
1631                  */
1632                 break;
1633         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1634                 if (kvm_hv_msr_partition_wide(msr)) {
1635                         int r;
1636                         mutex_lock(&vcpu->kvm->lock);
1637                         r = set_msr_hyperv_pw(vcpu, msr, data);
1638                         mutex_unlock(&vcpu->kvm->lock);
1639                         return r;
1640                 } else
1641                         return set_msr_hyperv(vcpu, msr, data);
1642                 break;
1643         case MSR_IA32_BBL_CR_CTL3:
1644                 /* Drop writes to this legacy MSR -- see rdmsr
1645                  * counterpart for further detail.
1646                  */
1647                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1648                 break;
1649         default:
1650                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1651                         return xen_hvm_config(vcpu, data);
1652                 if (kvm_pmu_msr(vcpu, msr))
1653                         return kvm_pmu_set_msr(vcpu, msr, data);
1654                 if (!ignore_msrs) {
1655                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1656                                 msr, data);
1657                         return 1;
1658                 } else {
1659                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1660                                 msr, data);
1661                         break;
1662                 }
1663         }
1664         return 0;
1665 }
1666 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1667
1668
1669 /*
1670  * Reads an msr value (of 'msr_index') into 'pdata'.
1671  * Returns 0 on success, non-0 otherwise.
1672  * Assumes vcpu_load() was already called.
1673  */
1674 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1675 {
1676         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1677 }
1678
1679 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1680 {
1681         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1682
1683         if (!msr_mtrr_valid(msr))
1684                 return 1;
1685
1686         if (msr == MSR_MTRRdefType)
1687                 *pdata = vcpu->arch.mtrr_state.def_type +
1688                          (vcpu->arch.mtrr_state.enabled << 10);
1689         else if (msr == MSR_MTRRfix64K_00000)
1690                 *pdata = p[0];
1691         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1692                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1693         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1694                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1695         else if (msr == MSR_IA32_CR_PAT)
1696                 *pdata = vcpu->arch.pat;
1697         else {  /* Variable MTRRs */
1698                 int idx, is_mtrr_mask;
1699                 u64 *pt;
1700
1701                 idx = (msr - 0x200) / 2;
1702                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1703                 if (!is_mtrr_mask)
1704                         pt =
1705                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1706                 else
1707                         pt =
1708                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1709                 *pdata = *pt;
1710         }
1711
1712         return 0;
1713 }
1714
1715 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1716 {
1717         u64 data;
1718         u64 mcg_cap = vcpu->arch.mcg_cap;
1719         unsigned bank_num = mcg_cap & 0xff;
1720
1721         switch (msr) {
1722         case MSR_IA32_P5_MC_ADDR:
1723         case MSR_IA32_P5_MC_TYPE:
1724                 data = 0;
1725                 break;
1726         case MSR_IA32_MCG_CAP:
1727                 data = vcpu->arch.mcg_cap;
1728                 break;
1729         case MSR_IA32_MCG_CTL:
1730                 if (!(mcg_cap & MCG_CTL_P))
1731                         return 1;
1732                 data = vcpu->arch.mcg_ctl;
1733                 break;
1734         case MSR_IA32_MCG_STATUS:
1735                 data = vcpu->arch.mcg_status;
1736                 break;
1737         default:
1738                 if (msr >= MSR_IA32_MC0_CTL &&
1739                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1740                         u32 offset = msr - MSR_IA32_MC0_CTL;
1741                         data = vcpu->arch.mce_banks[offset];
1742                         break;
1743                 }
1744                 return 1;
1745         }
1746         *pdata = data;
1747         return 0;
1748 }
1749
1750 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1751 {
1752         u64 data = 0;
1753         struct kvm *kvm = vcpu->kvm;
1754
1755         switch (msr) {
1756         case HV_X64_MSR_GUEST_OS_ID:
1757                 data = kvm->arch.hv_guest_os_id;
1758                 break;
1759         case HV_X64_MSR_HYPERCALL:
1760                 data = kvm->arch.hv_hypercall;
1761                 break;
1762         default:
1763                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1764                 return 1;
1765         }
1766
1767         *pdata = data;
1768         return 0;
1769 }
1770
1771 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1772 {
1773         u64 data = 0;
1774
1775         switch (msr) {
1776         case HV_X64_MSR_VP_INDEX: {
1777                 int r;
1778                 struct kvm_vcpu *v;
1779                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1780                         if (v == vcpu)
1781                                 data = r;
1782                 break;
1783         }
1784         case HV_X64_MSR_EOI:
1785                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1786         case HV_X64_MSR_ICR:
1787                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1788         case HV_X64_MSR_TPR:
1789                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1790         case HV_X64_MSR_APIC_ASSIST_PAGE:
1791                 data = vcpu->arch.hv_vapic;
1792                 break;
1793         default:
1794                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1795                 return 1;
1796         }
1797         *pdata = data;
1798         return 0;
1799 }
1800
1801 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1802 {
1803         u64 data;
1804
1805         switch (msr) {
1806         case MSR_IA32_PLATFORM_ID:
1807         case MSR_IA32_EBL_CR_POWERON:
1808         case MSR_IA32_DEBUGCTLMSR:
1809         case MSR_IA32_LASTBRANCHFROMIP:
1810         case MSR_IA32_LASTBRANCHTOIP:
1811         case MSR_IA32_LASTINTFROMIP:
1812         case MSR_IA32_LASTINTTOIP:
1813         case MSR_K8_SYSCFG:
1814         case MSR_K7_HWCR:
1815         case MSR_VM_HSAVE_PA:
1816         case MSR_K7_EVNTSEL0:
1817         case MSR_K7_PERFCTR0:
1818         case MSR_K8_INT_PENDING_MSG:
1819         case MSR_AMD64_NB_CFG:
1820         case MSR_FAM10H_MMIO_CONF_BASE:
1821                 data = 0;
1822                 break;
1823         case MSR_IA32_UCODE_REV:
1824                 data = 0x100000000ULL;
1825                 break;
1826         case MSR_MTRRcap:
1827                 data = 0x500 | KVM_NR_VAR_MTRR;
1828                 break;
1829         case 0x200 ... 0x2ff:
1830                 return get_msr_mtrr(vcpu, msr, pdata);
1831         case 0xcd: /* fsb frequency */
1832                 data = 3;
1833                 break;
1834                 /*
1835                  * MSR_EBC_FREQUENCY_ID
1836                  * Conservative value valid for even the basic CPU models.
1837                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1838                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1839                  * and 266MHz for model 3, or 4. Set Core Clock
1840                  * Frequency to System Bus Frequency Ratio to 1 (bits
1841                  * 31:24) even though these are only valid for CPU
1842                  * models > 2, however guests may end up dividing or
1843                  * multiplying by zero otherwise.
1844                  */
1845         case MSR_EBC_FREQUENCY_ID:
1846                 data = 1 << 24;
1847                 break;
1848         case MSR_IA32_APICBASE:
1849                 data = kvm_get_apic_base(vcpu);
1850                 break;
1851         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1852                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1853                 break;
1854         case MSR_IA32_TSCDEADLINE:
1855                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1856                 break;
1857         case MSR_IA32_MISC_ENABLE:
1858                 data = vcpu->arch.ia32_misc_enable_msr;
1859                 break;
1860         case MSR_IA32_PERF_STATUS:
1861                 /* TSC increment by tick */
1862                 data = 1000ULL;
1863                 /* CPU multiplier */
1864                 data |= (((uint64_t)4ULL) << 40);
1865                 break;
1866         case MSR_EFER:
1867                 data = vcpu->arch.efer;
1868                 break;
1869         case MSR_KVM_WALL_CLOCK:
1870         case MSR_KVM_WALL_CLOCK_NEW:
1871                 data = vcpu->kvm->arch.wall_clock;
1872                 break;
1873         case MSR_KVM_SYSTEM_TIME:
1874         case MSR_KVM_SYSTEM_TIME_NEW:
1875                 data = vcpu->arch.time;
1876                 break;
1877         case MSR_KVM_ASYNC_PF_EN:
1878                 data = vcpu->arch.apf.msr_val;
1879                 break;
1880         case MSR_KVM_STEAL_TIME:
1881                 data = vcpu->arch.st.msr_val;
1882                 break;
1883         case MSR_IA32_P5_MC_ADDR:
1884         case MSR_IA32_P5_MC_TYPE:
1885         case MSR_IA32_MCG_CAP:
1886         case MSR_IA32_MCG_CTL:
1887         case MSR_IA32_MCG_STATUS:
1888         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1889                 return get_msr_mce(vcpu, msr, pdata);
1890         case MSR_K7_CLK_CTL:
1891                 /*
1892                  * Provide expected ramp-up count for K7. All other
1893                  * are set to zero, indicating minimum divisors for
1894                  * every field.
1895                  *
1896                  * This prevents guest kernels on AMD host with CPU
1897                  * type 6, model 8 and higher from exploding due to
1898                  * the rdmsr failing.
1899                  */
1900                 data = 0x20000000;
1901                 break;
1902         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1903                 if (kvm_hv_msr_partition_wide(msr)) {
1904                         int r;
1905                         mutex_lock(&vcpu->kvm->lock);
1906                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1907                         mutex_unlock(&vcpu->kvm->lock);
1908                         return r;
1909                 } else
1910                         return get_msr_hyperv(vcpu, msr, pdata);
1911                 break;
1912         case MSR_IA32_BBL_CR_CTL3:
1913                 /* This legacy MSR exists but isn't fully documented in current
1914                  * silicon.  It is however accessed by winxp in very narrow
1915                  * scenarios where it sets bit #19, itself documented as
1916                  * a "reserved" bit.  Best effort attempt to source coherent
1917                  * read data here should the balance of the register be
1918                  * interpreted by the guest:
1919                  *
1920                  * L2 cache control register 3: 64GB range, 256KB size,
1921                  * enabled, latency 0x1, configured
1922                  */
1923                 data = 0xbe702111;
1924                 break;
1925         default:
1926                 if (kvm_pmu_msr(vcpu, msr))
1927                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1928                 if (!ignore_msrs) {
1929                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1930                         return 1;
1931                 } else {
1932                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1933                         data = 0;
1934                 }
1935                 break;
1936         }
1937         *pdata = data;
1938         return 0;
1939 }
1940 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1941
1942 /*
1943  * Read or write a bunch of msrs. All parameters are kernel addresses.
1944  *
1945  * @return number of msrs set successfully.
1946  */
1947 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1948                     struct kvm_msr_entry *entries,
1949                     int (*do_msr)(struct kvm_vcpu *vcpu,
1950                                   unsigned index, u64 *data))
1951 {
1952         int i, idx;
1953
1954         idx = srcu_read_lock(&vcpu->kvm->srcu);
1955         for (i = 0; i < msrs->nmsrs; ++i)
1956                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1957                         break;
1958         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1959
1960         return i;
1961 }
1962
1963 /*
1964  * Read or write a bunch of msrs. Parameters are user addresses.
1965  *
1966  * @return number of msrs set successfully.
1967  */
1968 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1969                   int (*do_msr)(struct kvm_vcpu *vcpu,
1970                                 unsigned index, u64 *data),
1971                   int writeback)
1972 {
1973         struct kvm_msrs msrs;
1974         struct kvm_msr_entry *entries;
1975         int r, n;
1976         unsigned size;
1977
1978         r = -EFAULT;
1979         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1980                 goto out;
1981
1982         r = -E2BIG;
1983         if (msrs.nmsrs >= MAX_IO_MSRS)
1984                 goto out;
1985
1986         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1987         entries = memdup_user(user_msrs->entries, size);
1988         if (IS_ERR(entries)) {
1989                 r = PTR_ERR(entries);
1990                 goto out;
1991         }
1992
1993         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1994         if (r < 0)
1995                 goto out_free;
1996
1997         r = -EFAULT;
1998         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1999                 goto out_free;
2000
2001         r = n;
2002
2003 out_free:
2004         kfree(entries);
2005 out:
2006         return r;
2007 }
2008
2009 int kvm_dev_ioctl_check_extension(long ext)
2010 {
2011         int r;
2012
2013         switch (ext) {
2014         case KVM_CAP_IRQCHIP:
2015         case KVM_CAP_HLT:
2016         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2017         case KVM_CAP_SET_TSS_ADDR:
2018         case KVM_CAP_EXT_CPUID:
2019         case KVM_CAP_CLOCKSOURCE:
2020         case KVM_CAP_PIT:
2021         case KVM_CAP_NOP_IO_DELAY:
2022         case KVM_CAP_MP_STATE:
2023         case KVM_CAP_SYNC_MMU:
2024         case KVM_CAP_USER_NMI:
2025         case KVM_CAP_REINJECT_CONTROL:
2026         case KVM_CAP_IRQ_INJECT_STATUS:
2027         case KVM_CAP_ASSIGN_DEV_IRQ:
2028         case KVM_CAP_IRQFD:
2029         case KVM_CAP_IOEVENTFD:
2030         case KVM_CAP_PIT2:
2031         case KVM_CAP_PIT_STATE2:
2032         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2033         case KVM_CAP_XEN_HVM:
2034         case KVM_CAP_ADJUST_CLOCK:
2035         case KVM_CAP_VCPU_EVENTS:
2036         case KVM_CAP_HYPERV:
2037         case KVM_CAP_HYPERV_VAPIC:
2038         case KVM_CAP_HYPERV_SPIN:
2039         case KVM_CAP_PCI_SEGMENT:
2040         case KVM_CAP_DEBUGREGS:
2041         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2042         case KVM_CAP_XSAVE:
2043         case KVM_CAP_ASYNC_PF:
2044         case KVM_CAP_GET_TSC_KHZ:
2045                 r = 1;
2046                 break;
2047         case KVM_CAP_COALESCED_MMIO:
2048                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2049                 break;
2050         case KVM_CAP_VAPIC:
2051                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2052                 break;
2053         case KVM_CAP_NR_VCPUS:
2054                 r = KVM_SOFT_MAX_VCPUS;
2055                 break;
2056         case KVM_CAP_MAX_VCPUS:
2057                 r = KVM_MAX_VCPUS;
2058                 break;
2059         case KVM_CAP_NR_MEMSLOTS:
2060                 r = KVM_MEMORY_SLOTS;
2061                 break;
2062         case KVM_CAP_PV_MMU:    /* obsolete */
2063                 r = 0;
2064                 break;
2065         case KVM_CAP_IOMMU:
2066                 r = iommu_present(&pci_bus_type);
2067                 break;
2068         case KVM_CAP_MCE:
2069                 r = KVM_MAX_MCE_BANKS;
2070                 break;
2071         case KVM_CAP_XCRS:
2072                 r = cpu_has_xsave;
2073                 break;
2074         case KVM_CAP_TSC_CONTROL:
2075                 r = kvm_has_tsc_control;
2076                 break;
2077         case KVM_CAP_TSC_DEADLINE_TIMER:
2078                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2079                 break;
2080         default:
2081                 r = 0;
2082                 break;
2083         }
2084         return r;
2085
2086 }
2087
2088 long kvm_arch_dev_ioctl(struct file *filp,
2089                         unsigned int ioctl, unsigned long arg)
2090 {
2091         void __user *argp = (void __user *)arg;
2092         long r;
2093
2094         switch (ioctl) {
2095         case KVM_GET_MSR_INDEX_LIST: {
2096                 struct kvm_msr_list __user *user_msr_list = argp;
2097                 struct kvm_msr_list msr_list;
2098                 unsigned n;
2099
2100                 r = -EFAULT;
2101                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2102                         goto out;
2103                 n = msr_list.nmsrs;
2104                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2105                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2106                         goto out;
2107                 r = -E2BIG;
2108                 if (n < msr_list.nmsrs)
2109                         goto out;
2110                 r = -EFAULT;
2111                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2112                                  num_msrs_to_save * sizeof(u32)))
2113                         goto out;
2114                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2115                                  &emulated_msrs,
2116                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2117                         goto out;
2118                 r = 0;
2119                 break;
2120         }
2121         case KVM_GET_SUPPORTED_CPUID: {
2122                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2123                 struct kvm_cpuid2 cpuid;
2124
2125                 r = -EFAULT;
2126                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2127                         goto out;
2128                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2129                                                       cpuid_arg->entries);
2130                 if (r)
2131                         goto out;
2132
2133                 r = -EFAULT;
2134                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2135                         goto out;
2136                 r = 0;
2137                 break;
2138         }
2139         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2140                 u64 mce_cap;
2141
2142                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2143                 r = -EFAULT;
2144                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2145                         goto out;
2146                 r = 0;
2147                 break;
2148         }
2149         default:
2150                 r = -EINVAL;
2151         }
2152 out:
2153         return r;
2154 }
2155
2156 static void wbinvd_ipi(void *garbage)
2157 {
2158         wbinvd();
2159 }
2160
2161 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2162 {
2163         return vcpu->kvm->arch.iommu_domain &&
2164                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2165 }
2166
2167 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2168 {
2169         /* Address WBINVD may be executed by guest */
2170         if (need_emulate_wbinvd(vcpu)) {
2171                 if (kvm_x86_ops->has_wbinvd_exit())
2172                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2173                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2174                         smp_call_function_single(vcpu->cpu,
2175                                         wbinvd_ipi, NULL, 1);
2176         }
2177
2178         kvm_x86_ops->vcpu_load(vcpu, cpu);
2179         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2180                 /* Make sure TSC doesn't go backwards */
2181                 s64 tsc_delta;
2182                 u64 tsc;
2183
2184                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2185                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2186                              tsc - vcpu->arch.last_guest_tsc;
2187
2188                 if (tsc_delta < 0)
2189                         mark_tsc_unstable("KVM discovered backwards TSC");
2190                 if (check_tsc_unstable()) {
2191                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2192                         vcpu->arch.tsc_catchup = 1;
2193                 }
2194                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2195                 if (vcpu->cpu != cpu)
2196                         kvm_migrate_timers(vcpu);
2197                 vcpu->cpu = cpu;
2198         }
2199
2200         accumulate_steal_time(vcpu);
2201         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2202 }
2203
2204 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2205 {
2206         kvm_x86_ops->vcpu_put(vcpu);
2207         kvm_put_guest_fpu(vcpu);
2208         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2209 }
2210
2211 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2212                                     struct kvm_lapic_state *s)
2213 {
2214         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2215
2216         return 0;
2217 }
2218
2219 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2220                                     struct kvm_lapic_state *s)
2221 {
2222         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2223         kvm_apic_post_state_restore(vcpu);
2224         update_cr8_intercept(vcpu);
2225
2226         return 0;
2227 }
2228
2229 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2230                                     struct kvm_interrupt *irq)
2231 {
2232         if (irq->irq < 0 || irq->irq >= 256)
2233                 return -EINVAL;
2234         if (irqchip_in_kernel(vcpu->kvm))
2235                 return -ENXIO;
2236
2237         kvm_queue_interrupt(vcpu, irq->irq, false);
2238         kvm_make_request(KVM_REQ_EVENT, vcpu);
2239
2240         return 0;
2241 }
2242
2243 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2244 {
2245         kvm_inject_nmi(vcpu);
2246
2247         return 0;
2248 }
2249
2250 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2251                                            struct kvm_tpr_access_ctl *tac)
2252 {
2253         if (tac->flags)
2254                 return -EINVAL;
2255         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2256         return 0;
2257 }
2258
2259 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2260                                         u64 mcg_cap)
2261 {
2262         int r;
2263         unsigned bank_num = mcg_cap & 0xff, bank;
2264
2265         r = -EINVAL;
2266         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2267                 goto out;
2268         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2269                 goto out;
2270         r = 0;
2271         vcpu->arch.mcg_cap = mcg_cap;
2272         /* Init IA32_MCG_CTL to all 1s */
2273         if (mcg_cap & MCG_CTL_P)
2274                 vcpu->arch.mcg_ctl = ~(u64)0;
2275         /* Init IA32_MCi_CTL to all 1s */
2276         for (bank = 0; bank < bank_num; bank++)
2277                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2278 out:
2279         return r;
2280 }
2281
2282 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2283                                       struct kvm_x86_mce *mce)
2284 {
2285         u64 mcg_cap = vcpu->arch.mcg_cap;
2286         unsigned bank_num = mcg_cap & 0xff;
2287         u64 *banks = vcpu->arch.mce_banks;
2288
2289         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2290                 return -EINVAL;
2291         /*
2292          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2293          * reporting is disabled
2294          */
2295         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2296             vcpu->arch.mcg_ctl != ~(u64)0)
2297                 return 0;
2298         banks += 4 * mce->bank;
2299         /*
2300          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2301          * reporting is disabled for the bank
2302          */
2303         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2304                 return 0;
2305         if (mce->status & MCI_STATUS_UC) {
2306                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2307                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2308                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2309                         return 0;
2310                 }
2311                 if (banks[1] & MCI_STATUS_VAL)
2312                         mce->status |= MCI_STATUS_OVER;
2313                 banks[2] = mce->addr;
2314                 banks[3] = mce->misc;
2315                 vcpu->arch.mcg_status = mce->mcg_status;
2316                 banks[1] = mce->status;
2317                 kvm_queue_exception(vcpu, MC_VECTOR);
2318         } else if (!(banks[1] & MCI_STATUS_VAL)
2319                    || !(banks[1] & MCI_STATUS_UC)) {
2320                 if (banks[1] & MCI_STATUS_VAL)
2321                         mce->status |= MCI_STATUS_OVER;
2322                 banks[2] = mce->addr;
2323                 banks[3] = mce->misc;
2324                 banks[1] = mce->status;
2325         } else
2326                 banks[1] |= MCI_STATUS_OVER;
2327         return 0;
2328 }
2329
2330 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2331                                                struct kvm_vcpu_events *events)
2332 {
2333         process_nmi(vcpu);
2334         events->exception.injected =
2335                 vcpu->arch.exception.pending &&
2336                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2337         events->exception.nr = vcpu->arch.exception.nr;
2338         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2339         events->exception.pad = 0;
2340         events->exception.error_code = vcpu->arch.exception.error_code;
2341
2342         events->interrupt.injected =
2343                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2344         events->interrupt.nr = vcpu->arch.interrupt.nr;
2345         events->interrupt.soft = 0;
2346         events->interrupt.shadow =
2347                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2348                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2349
2350         events->nmi.injected = vcpu->arch.nmi_injected;
2351         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2352         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2353         events->nmi.pad = 0;
2354
2355         events->sipi_vector = vcpu->arch.sipi_vector;
2356
2357         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2358                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2359                          | KVM_VCPUEVENT_VALID_SHADOW);
2360         memset(&events->reserved, 0, sizeof(events->reserved));
2361 }
2362
2363 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2364                                               struct kvm_vcpu_events *events)
2365 {
2366         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2367                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2368                               | KVM_VCPUEVENT_VALID_SHADOW))
2369                 return -EINVAL;
2370
2371         process_nmi(vcpu);
2372         vcpu->arch.exception.pending = events->exception.injected;
2373         vcpu->arch.exception.nr = events->exception.nr;
2374         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2375         vcpu->arch.exception.error_code = events->exception.error_code;
2376
2377         vcpu->arch.interrupt.pending = events->interrupt.injected;
2378         vcpu->arch.interrupt.nr = events->interrupt.nr;
2379         vcpu->arch.interrupt.soft = events->interrupt.soft;
2380         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2381                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2382                                                   events->interrupt.shadow);
2383
2384         vcpu->arch.nmi_injected = events->nmi.injected;
2385         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2386                 vcpu->arch.nmi_pending = events->nmi.pending;
2387         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2388
2389         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2390                 vcpu->arch.sipi_vector = events->sipi_vector;
2391
2392         kvm_make_request(KVM_REQ_EVENT, vcpu);
2393
2394         return 0;
2395 }
2396
2397 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2398                                              struct kvm_debugregs *dbgregs)
2399 {
2400         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2401         dbgregs->dr6 = vcpu->arch.dr6;
2402         dbgregs->dr7 = vcpu->arch.dr7;
2403         dbgregs->flags = 0;
2404         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2405 }
2406
2407 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2408                                             struct kvm_debugregs *dbgregs)
2409 {
2410         if (dbgregs->flags)
2411                 return -EINVAL;
2412
2413         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2414         vcpu->arch.dr6 = dbgregs->dr6;
2415         vcpu->arch.dr7 = dbgregs->dr7;
2416
2417         return 0;
2418 }
2419
2420 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2421                                          struct kvm_xsave *guest_xsave)
2422 {
2423         if (cpu_has_xsave)
2424                 memcpy(guest_xsave->region,
2425                         &vcpu->arch.guest_fpu.state->xsave,
2426                         xstate_size);
2427         else {
2428                 memcpy(guest_xsave->region,
2429                         &vcpu->arch.guest_fpu.state->fxsave,
2430                         sizeof(struct i387_fxsave_struct));
2431                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2432                         XSTATE_FPSSE;
2433         }
2434 }
2435
2436 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2437                                         struct kvm_xsave *guest_xsave)
2438 {
2439         u64 xstate_bv =
2440                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2441
2442         if (cpu_has_xsave)
2443                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2444                         guest_xsave->region, xstate_size);
2445         else {
2446                 if (xstate_bv & ~XSTATE_FPSSE)
2447                         return -EINVAL;
2448                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2449                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2450         }
2451         return 0;
2452 }
2453
2454 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2455                                         struct kvm_xcrs *guest_xcrs)
2456 {
2457         if (!cpu_has_xsave) {
2458                 guest_xcrs->nr_xcrs = 0;
2459                 return;
2460         }
2461
2462         guest_xcrs->nr_xcrs = 1;
2463         guest_xcrs->flags = 0;
2464         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2465         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2466 }
2467
2468 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2469                                        struct kvm_xcrs *guest_xcrs)
2470 {
2471         int i, r = 0;
2472
2473         if (!cpu_has_xsave)
2474                 return -EINVAL;
2475
2476         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2477                 return -EINVAL;
2478
2479         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2480                 /* Only support XCR0 currently */
2481                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2482                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2483                                 guest_xcrs->xcrs[0].value);
2484                         break;
2485                 }
2486         if (r)
2487                 r = -EINVAL;
2488         return r;
2489 }
2490
2491 long kvm_arch_vcpu_ioctl(struct file *filp,
2492                          unsigned int ioctl, unsigned long arg)
2493 {
2494         struct kvm_vcpu *vcpu = filp->private_data;
2495         void __user *argp = (void __user *)arg;
2496         int r;
2497         union {
2498                 struct kvm_lapic_state *lapic;
2499                 struct kvm_xsave *xsave;
2500                 struct kvm_xcrs *xcrs;
2501                 void *buffer;
2502         } u;
2503
2504         u.buffer = NULL;
2505         switch (ioctl) {
2506         case KVM_GET_LAPIC: {
2507                 r = -EINVAL;
2508                 if (!vcpu->arch.apic)
2509                         goto out;
2510                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2511
2512                 r = -ENOMEM;
2513                 if (!u.lapic)
2514                         goto out;
2515                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2516                 if (r)
2517                         goto out;
2518                 r = -EFAULT;
2519                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2520                         goto out;
2521                 r = 0;
2522                 break;
2523         }
2524         case KVM_SET_LAPIC: {
2525                 r = -EINVAL;
2526                 if (!vcpu->arch.apic)
2527                         goto out;
2528                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2529                 if (IS_ERR(u.lapic)) {
2530                         r = PTR_ERR(u.lapic);
2531                         goto out;
2532                 }
2533
2534                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2535                 if (r)
2536                         goto out;
2537                 r = 0;
2538                 break;
2539         }
2540         case KVM_INTERRUPT: {
2541                 struct kvm_interrupt irq;
2542
2543                 r = -EFAULT;
2544                 if (copy_from_user(&irq, argp, sizeof irq))
2545                         goto out;
2546                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2547                 if (r)
2548                         goto out;
2549                 r = 0;
2550                 break;
2551         }
2552         case KVM_NMI: {
2553                 r = kvm_vcpu_ioctl_nmi(vcpu);
2554                 if (r)
2555                         goto out;
2556                 r = 0;
2557                 break;
2558         }
2559         case KVM_SET_CPUID: {
2560                 struct kvm_cpuid __user *cpuid_arg = argp;
2561                 struct kvm_cpuid cpuid;
2562
2563                 r = -EFAULT;
2564                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2565                         goto out;
2566                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2567                 if (r)
2568                         goto out;
2569                 break;
2570         }
2571         case KVM_SET_CPUID2: {
2572                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2573                 struct kvm_cpuid2 cpuid;
2574
2575                 r = -EFAULT;
2576                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2577                         goto out;
2578                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2579                                               cpuid_arg->entries);
2580                 if (r)
2581                         goto out;
2582                 break;
2583         }
2584         case KVM_GET_CPUID2: {
2585                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2586                 struct kvm_cpuid2 cpuid;
2587
2588                 r = -EFAULT;
2589                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2590                         goto out;
2591                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2592                                               cpuid_arg->entries);
2593                 if (r)
2594                         goto out;
2595                 r = -EFAULT;
2596                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2597                         goto out;
2598                 r = 0;
2599                 break;
2600         }
2601         case KVM_GET_MSRS:
2602                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2603                 break;
2604         case KVM_SET_MSRS:
2605                 r = msr_io(vcpu, argp, do_set_msr, 0);
2606                 break;
2607         case KVM_TPR_ACCESS_REPORTING: {
2608                 struct kvm_tpr_access_ctl tac;
2609
2610                 r = -EFAULT;
2611                 if (copy_from_user(&tac, argp, sizeof tac))
2612                         goto out;
2613                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2614                 if (r)
2615                         goto out;
2616                 r = -EFAULT;
2617                 if (copy_to_user(argp, &tac, sizeof tac))
2618                         goto out;
2619                 r = 0;
2620                 break;
2621         };
2622         case KVM_SET_VAPIC_ADDR: {
2623                 struct kvm_vapic_addr va;
2624
2625                 r = -EINVAL;
2626                 if (!irqchip_in_kernel(vcpu->kvm))
2627                         goto out;
2628                 r = -EFAULT;
2629                 if (copy_from_user(&va, argp, sizeof va))
2630                         goto out;
2631                 r = 0;
2632                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2633                 break;
2634         }
2635         case KVM_X86_SETUP_MCE: {
2636                 u64 mcg_cap;
2637
2638                 r = -EFAULT;
2639                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2640                         goto out;
2641                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2642                 break;
2643         }
2644         case KVM_X86_SET_MCE: {
2645                 struct kvm_x86_mce mce;
2646
2647                 r = -EFAULT;
2648                 if (copy_from_user(&mce, argp, sizeof mce))
2649                         goto out;
2650                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2651                 break;
2652         }
2653         case KVM_GET_VCPU_EVENTS: {
2654                 struct kvm_vcpu_events events;
2655
2656                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2657
2658                 r = -EFAULT;
2659                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2660                         break;
2661                 r = 0;
2662                 break;
2663         }
2664         case KVM_SET_VCPU_EVENTS: {
2665                 struct kvm_vcpu_events events;
2666
2667                 r = -EFAULT;
2668                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2669                         break;
2670
2671                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2672                 break;
2673         }
2674         case KVM_GET_DEBUGREGS: {
2675                 struct kvm_debugregs dbgregs;
2676
2677                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2678
2679                 r = -EFAULT;
2680                 if (copy_to_user(argp, &dbgregs,
2681                                  sizeof(struct kvm_debugregs)))
2682                         break;
2683                 r = 0;
2684                 break;
2685         }
2686         case KVM_SET_DEBUGREGS: {
2687                 struct kvm_debugregs dbgregs;
2688
2689                 r = -EFAULT;
2690                 if (copy_from_user(&dbgregs, argp,
2691                                    sizeof(struct kvm_debugregs)))
2692                         break;
2693
2694                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2695                 break;
2696         }
2697         case KVM_GET_XSAVE: {
2698                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2699                 r = -ENOMEM;
2700                 if (!u.xsave)
2701                         break;
2702
2703                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2704
2705                 r = -EFAULT;
2706                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2707                         break;
2708                 r = 0;
2709                 break;
2710         }
2711         case KVM_SET_XSAVE: {
2712                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2713                 if (IS_ERR(u.xsave)) {
2714                         r = PTR_ERR(u.xsave);
2715                         goto out;
2716                 }
2717
2718                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2719                 break;
2720         }
2721         case KVM_GET_XCRS: {
2722                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2723                 r = -ENOMEM;
2724                 if (!u.xcrs)
2725                         break;
2726
2727                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2728
2729                 r = -EFAULT;
2730                 if (copy_to_user(argp, u.xcrs,
2731                                  sizeof(struct kvm_xcrs)))
2732                         break;
2733                 r = 0;
2734                 break;
2735         }
2736         case KVM_SET_XCRS: {
2737                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2738                 if (IS_ERR(u.xcrs)) {
2739                         r = PTR_ERR(u.xcrs);
2740                         goto out;
2741                 }
2742
2743                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2744                 break;
2745         }
2746         case KVM_SET_TSC_KHZ: {
2747                 u32 user_tsc_khz;
2748
2749                 r = -EINVAL;
2750                 if (!kvm_has_tsc_control)
2751                         break;
2752
2753                 user_tsc_khz = (u32)arg;
2754
2755                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2756                         goto out;
2757
2758                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
2759
2760                 r = 0;
2761                 goto out;
2762         }
2763         case KVM_GET_TSC_KHZ: {
2764                 r = -EIO;
2765                 if (check_tsc_unstable())
2766                         goto out;
2767
2768                 r = vcpu_tsc_khz(vcpu);
2769
2770                 goto out;
2771         }
2772         default:
2773                 r = -EINVAL;
2774         }
2775 out:
2776         kfree(u.buffer);
2777         return r;
2778 }
2779
2780 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2781 {
2782         int ret;
2783
2784         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2785                 return -1;
2786         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2787         return ret;
2788 }
2789
2790 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2791                                               u64 ident_addr)
2792 {
2793         kvm->arch.ept_identity_map_addr = ident_addr;
2794         return 0;
2795 }
2796
2797 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2798                                           u32 kvm_nr_mmu_pages)
2799 {
2800         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2801                 return -EINVAL;
2802
2803         mutex_lock(&kvm->slots_lock);
2804         spin_lock(&kvm->mmu_lock);
2805
2806         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2807         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2808
2809         spin_unlock(&kvm->mmu_lock);
2810         mutex_unlock(&kvm->slots_lock);
2811         return 0;
2812 }
2813
2814 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2815 {
2816         return kvm->arch.n_max_mmu_pages;
2817 }
2818
2819 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2820 {
2821         int r;
2822
2823         r = 0;
2824         switch (chip->chip_id) {
2825         case KVM_IRQCHIP_PIC_MASTER:
2826                 memcpy(&chip->chip.pic,
2827                         &pic_irqchip(kvm)->pics[0],
2828                         sizeof(struct kvm_pic_state));
2829                 break;
2830         case KVM_IRQCHIP_PIC_SLAVE:
2831                 memcpy(&chip->chip.pic,
2832                         &pic_irqchip(kvm)->pics[1],
2833                         sizeof(struct kvm_pic_state));
2834                 break;
2835         case KVM_IRQCHIP_IOAPIC:
2836                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2837                 break;
2838         default:
2839                 r = -EINVAL;
2840                 break;
2841         }
2842         return r;
2843 }
2844
2845 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2846 {
2847         int r;
2848
2849         r = 0;
2850         switch (chip->chip_id) {
2851         case KVM_IRQCHIP_PIC_MASTER:
2852                 spin_lock(&pic_irqchip(kvm)->lock);
2853                 memcpy(&pic_irqchip(kvm)->pics[0],
2854                         &chip->chip.pic,
2855                         sizeof(struct kvm_pic_state));
2856                 spin_unlock(&pic_irqchip(kvm)->lock);
2857                 break;
2858         case KVM_IRQCHIP_PIC_SLAVE:
2859                 spin_lock(&pic_irqchip(kvm)->lock);
2860                 memcpy(&pic_irqchip(kvm)->pics[1],
2861                         &chip->chip.pic,
2862                         sizeof(struct kvm_pic_state));
2863                 spin_unlock(&pic_irqchip(kvm)->lock);
2864                 break;
2865         case KVM_IRQCHIP_IOAPIC:
2866                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2867                 break;
2868         default:
2869                 r = -EINVAL;
2870                 break;
2871         }
2872         kvm_pic_update_irq(pic_irqchip(kvm));
2873         return r;
2874 }
2875
2876 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2877 {
2878         int r = 0;
2879
2880         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2881         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2882         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2883         return r;
2884 }
2885
2886 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2887 {
2888         int r = 0;
2889
2890         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2891         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2892         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2893         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2894         return r;
2895 }
2896
2897 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2898 {
2899         int r = 0;
2900
2901         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2902         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2903                 sizeof(ps->channels));
2904         ps->flags = kvm->arch.vpit->pit_state.flags;
2905         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2906         memset(&ps->reserved, 0, sizeof(ps->reserved));
2907         return r;
2908 }
2909
2910 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2911 {
2912         int r = 0, start = 0;
2913         u32 prev_legacy, cur_legacy;
2914         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2915         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2916         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2917         if (!prev_legacy && cur_legacy)
2918                 start = 1;
2919         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2920                sizeof(kvm->arch.vpit->pit_state.channels));
2921         kvm->arch.vpit->pit_state.flags = ps->flags;
2922         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2923         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2924         return r;
2925 }
2926
2927 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2928                                  struct kvm_reinject_control *control)
2929 {
2930         if (!kvm->arch.vpit)
2931                 return -ENXIO;
2932         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2933         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2934         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2935         return 0;
2936 }
2937
2938 /**
2939  * write_protect_slot - write protect a slot for dirty logging
2940  * @kvm: the kvm instance
2941  * @memslot: the slot we protect
2942  * @dirty_bitmap: the bitmap indicating which pages are dirty
2943  * @nr_dirty_pages: the number of dirty pages
2944  *
2945  * We have two ways to find all sptes to protect:
2946  * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
2947  *    checks ones that have a spte mapping a page in the slot.
2948  * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
2949  *
2950  * Generally speaking, if there are not so many dirty pages compared to the
2951  * number of shadow pages, we should use the latter.
2952  *
2953  * Note that letting others write into a page marked dirty in the old bitmap
2954  * by using the remaining tlb entry is not a problem.  That page will become
2955  * write protected again when we flush the tlb and then be reported dirty to
2956  * the user space by copying the old bitmap.
2957  */
2958 static void write_protect_slot(struct kvm *kvm,
2959                                struct kvm_memory_slot *memslot,
2960                                unsigned long *dirty_bitmap,
2961                                unsigned long nr_dirty_pages)
2962 {
2963         /* Not many dirty pages compared to # of shadow pages. */
2964         if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
2965                 unsigned long gfn_offset;
2966
2967                 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
2968                         unsigned long gfn = memslot->base_gfn + gfn_offset;
2969
2970                         spin_lock(&kvm->mmu_lock);
2971                         kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
2972                         spin_unlock(&kvm->mmu_lock);
2973                 }
2974                 kvm_flush_remote_tlbs(kvm);
2975         } else {
2976                 spin_lock(&kvm->mmu_lock);
2977                 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
2978                 spin_unlock(&kvm->mmu_lock);
2979         }
2980 }
2981
2982 /*
2983  * Get (and clear) the dirty memory log for a memory slot.
2984  */
2985 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2986                                       struct kvm_dirty_log *log)
2987 {
2988         int r;
2989         struct kvm_memory_slot *memslot;
2990         unsigned long n, nr_dirty_pages;
2991
2992         mutex_lock(&kvm->slots_lock);
2993
2994         r = -EINVAL;
2995         if (log->slot >= KVM_MEMORY_SLOTS)
2996                 goto out;
2997
2998         memslot = id_to_memslot(kvm->memslots, log->slot);
2999         r = -ENOENT;
3000         if (!memslot->dirty_bitmap)
3001                 goto out;
3002
3003         n = kvm_dirty_bitmap_bytes(memslot);
3004         nr_dirty_pages = memslot->nr_dirty_pages;
3005
3006         /* If nothing is dirty, don't bother messing with page tables. */
3007         if (nr_dirty_pages) {
3008                 struct kvm_memslots *slots, *old_slots;
3009                 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3010
3011                 dirty_bitmap = memslot->dirty_bitmap;
3012                 dirty_bitmap_head = memslot->dirty_bitmap_head;
3013                 if (dirty_bitmap == dirty_bitmap_head)
3014                         dirty_bitmap_head += n / sizeof(long);
3015                 memset(dirty_bitmap_head, 0, n);
3016
3017                 r = -ENOMEM;
3018                 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3019                 if (!slots)
3020                         goto out;
3021
3022                 memslot = id_to_memslot(slots, log->slot);
3023                 memslot->nr_dirty_pages = 0;
3024                 memslot->dirty_bitmap = dirty_bitmap_head;
3025                 update_memslots(slots, NULL);
3026
3027                 old_slots = kvm->memslots;
3028                 rcu_assign_pointer(kvm->memslots, slots);
3029                 synchronize_srcu_expedited(&kvm->srcu);
3030                 kfree(old_slots);
3031
3032                 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3033
3034                 r = -EFAULT;
3035                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3036                         goto out;
3037         } else {
3038                 r = -EFAULT;
3039                 if (clear_user(log->dirty_bitmap, n))
3040                         goto out;
3041         }
3042
3043         r = 0;
3044 out:
3045         mutex_unlock(&kvm->slots_lock);
3046         return r;
3047 }
3048
3049 long kvm_arch_vm_ioctl(struct file *filp,
3050                        unsigned int ioctl, unsigned long arg)
3051 {
3052         struct kvm *kvm = filp->private_data;
3053         void __user *argp = (void __user *)arg;
3054         int r = -ENOTTY;
3055         /*
3056          * This union makes it completely explicit to gcc-3.x
3057          * that these two variables' stack usage should be
3058          * combined, not added together.
3059          */
3060         union {
3061                 struct kvm_pit_state ps;
3062                 struct kvm_pit_state2 ps2;
3063                 struct kvm_pit_config pit_config;
3064         } u;
3065
3066         switch (ioctl) {
3067         case KVM_SET_TSS_ADDR:
3068                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3069                 if (r < 0)
3070                         goto out;
3071                 break;
3072         case KVM_SET_IDENTITY_MAP_ADDR: {
3073                 u64 ident_addr;
3074
3075                 r = -EFAULT;
3076                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3077                         goto out;
3078                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3079                 if (r < 0)
3080                         goto out;
3081                 break;
3082         }
3083         case KVM_SET_NR_MMU_PAGES:
3084                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3085                 if (r)
3086                         goto out;
3087                 break;
3088         case KVM_GET_NR_MMU_PAGES:
3089                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3090                 break;
3091         case KVM_CREATE_IRQCHIP: {
3092                 struct kvm_pic *vpic;
3093
3094                 mutex_lock(&kvm->lock);
3095                 r = -EEXIST;
3096                 if (kvm->arch.vpic)
3097                         goto create_irqchip_unlock;
3098                 r = -ENOMEM;
3099                 vpic = kvm_create_pic(kvm);
3100                 if (vpic) {
3101                         r = kvm_ioapic_init(kvm);
3102                         if (r) {
3103                                 mutex_lock(&kvm->slots_lock);
3104                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3105                                                           &vpic->dev_master);
3106                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3107                                                           &vpic->dev_slave);
3108                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3109                                                           &vpic->dev_eclr);
3110                                 mutex_unlock(&kvm->slots_lock);
3111                                 kfree(vpic);
3112                                 goto create_irqchip_unlock;
3113                         }
3114                 } else
3115                         goto create_irqchip_unlock;
3116                 smp_wmb();
3117                 kvm->arch.vpic = vpic;
3118                 smp_wmb();
3119                 r = kvm_setup_default_irq_routing(kvm);
3120                 if (r) {
3121                         mutex_lock(&kvm->slots_lock);
3122                         mutex_lock(&kvm->irq_lock);
3123                         kvm_ioapic_destroy(kvm);
3124                         kvm_destroy_pic(kvm);
3125                         mutex_unlock(&kvm->irq_lock);
3126                         mutex_unlock(&kvm->slots_lock);
3127                 }
3128         create_irqchip_unlock:
3129                 mutex_unlock(&kvm->lock);
3130                 break;
3131         }
3132         case KVM_CREATE_PIT:
3133                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3134                 goto create_pit;
3135         case KVM_CREATE_PIT2:
3136                 r = -EFAULT;
3137                 if (copy_from_user(&u.pit_config, argp,
3138                                    sizeof(struct kvm_pit_config)))
3139                         goto out;
3140         create_pit:
3141                 mutex_lock(&kvm->slots_lock);
3142                 r = -EEXIST;
3143                 if (kvm->arch.vpit)
3144                         goto create_pit_unlock;
3145                 r = -ENOMEM;
3146                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3147                 if (kvm->arch.vpit)
3148                         r = 0;
3149         create_pit_unlock:
3150                 mutex_unlock(&kvm->slots_lock);
3151                 break;
3152         case KVM_IRQ_LINE_STATUS:
3153         case KVM_IRQ_LINE: {
3154                 struct kvm_irq_level irq_event;
3155
3156                 r = -EFAULT;
3157                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3158                         goto out;
3159                 r = -ENXIO;
3160                 if (irqchip_in_kernel(kvm)) {
3161                         __s32 status;
3162                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3163                                         irq_event.irq, irq_event.level);
3164                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3165                                 r = -EFAULT;
3166                                 irq_event.status = status;
3167                                 if (copy_to_user(argp, &irq_event,
3168                                                         sizeof irq_event))
3169                                         goto out;
3170                         }
3171                         r = 0;
3172                 }
3173                 break;
3174         }
3175         case KVM_GET_IRQCHIP: {
3176                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3177                 struct kvm_irqchip *chip;
3178
3179                 chip = memdup_user(argp, sizeof(*chip));
3180                 if (IS_ERR(chip)) {
3181                         r = PTR_ERR(chip);
3182                         goto out;
3183                 }
3184
3185                 r = -ENXIO;
3186                 if (!irqchip_in_kernel(kvm))
3187                         goto get_irqchip_out;
3188                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3189                 if (r)
3190                         goto get_irqchip_out;
3191                 r = -EFAULT;
3192                 if (copy_to_user(argp, chip, sizeof *chip))
3193                         goto get_irqchip_out;
3194                 r = 0;
3195         get_irqchip_out:
3196                 kfree(chip);
3197                 if (r)
3198                         goto out;
3199                 break;
3200         }
3201         case KVM_SET_IRQCHIP: {
3202                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3203                 struct kvm_irqchip *chip;
3204
3205                 chip = memdup_user(argp, sizeof(*chip));
3206                 if (IS_ERR(chip)) {
3207                         r = PTR_ERR(chip);
3208                         goto out;
3209                 }
3210
3211                 r = -ENXIO;
3212                 if (!irqchip_in_kernel(kvm))
3213                         goto set_irqchip_out;
3214                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3215                 if (r)
3216                         goto set_irqchip_out;
3217                 r = 0;
3218         set_irqchip_out:
3219                 kfree(chip);
3220                 if (r)
3221                         goto out;
3222                 break;
3223         }
3224         case KVM_GET_PIT: {
3225                 r = -EFAULT;
3226                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3227                         goto out;
3228                 r = -ENXIO;
3229                 if (!kvm->arch.vpit)
3230                         goto out;
3231                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3232                 if (r)
3233                         goto out;
3234                 r = -EFAULT;
3235                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3236                         goto out;
3237                 r = 0;
3238                 break;
3239         }
3240         case KVM_SET_PIT: {
3241                 r = -EFAULT;
3242                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3243                         goto out;
3244                 r = -ENXIO;
3245                 if (!kvm->arch.vpit)
3246                         goto out;
3247                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3248                 if (r)
3249                         goto out;
3250                 r = 0;
3251                 break;
3252         }
3253         case KVM_GET_PIT2: {
3254                 r = -ENXIO;
3255                 if (!kvm->arch.vpit)
3256                         goto out;
3257                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3258                 if (r)
3259                         goto out;
3260                 r = -EFAULT;
3261                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3262                         goto out;
3263                 r = 0;
3264                 break;
3265         }
3266         case KVM_SET_PIT2: {
3267                 r = -EFAULT;
3268                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3269                         goto out;
3270                 r = -ENXIO;
3271                 if (!kvm->arch.vpit)
3272                         goto out;
3273                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3274                 if (r)
3275                         goto out;
3276                 r = 0;
3277                 break;
3278         }
3279         case KVM_REINJECT_CONTROL: {
3280                 struct kvm_reinject_control control;
3281                 r =  -EFAULT;
3282                 if (copy_from_user(&control, argp, sizeof(control)))
3283                         goto out;
3284                 r = kvm_vm_ioctl_reinject(kvm, &control);
3285                 if (r)
3286                         goto out;
3287                 r = 0;
3288                 break;
3289         }
3290         case KVM_XEN_HVM_CONFIG: {
3291                 r = -EFAULT;
3292                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3293                                    sizeof(struct kvm_xen_hvm_config)))
3294                         goto out;
3295                 r = -EINVAL;
3296                 if (kvm->arch.xen_hvm_config.flags)
3297                         goto out;
3298                 r = 0;
3299                 break;
3300         }
3301         case KVM_SET_CLOCK: {
3302                 struct kvm_clock_data user_ns;
3303                 u64 now_ns;
3304                 s64 delta;
3305
3306                 r = -EFAULT;
3307                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3308                         goto out;
3309
3310                 r = -EINVAL;
3311                 if (user_ns.flags)
3312                         goto out;
3313
3314                 r = 0;
3315                 local_irq_disable();
3316                 now_ns = get_kernel_ns();
3317                 delta = user_ns.clock - now_ns;
3318                 local_irq_enable();
3319                 kvm->arch.kvmclock_offset = delta;
3320                 break;
3321         }
3322         case KVM_GET_CLOCK: {
3323                 struct kvm_clock_data user_ns;
3324                 u64 now_ns;
3325
3326                 local_irq_disable();
3327                 now_ns = get_kernel_ns();
3328                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3329                 local_irq_enable();
3330                 user_ns.flags = 0;
3331                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3332
3333                 r = -EFAULT;
3334                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3335                         goto out;
3336                 r = 0;
3337                 break;
3338         }
3339
3340         default:
3341                 ;
3342         }
3343 out:
3344         return r;
3345 }
3346
3347 static void kvm_init_msr_list(void)
3348 {
3349         u32 dummy[2];
3350         unsigned i, j;
3351
3352         /* skip the first msrs in the list. KVM-specific */
3353         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3354                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3355                         continue;
3356                 if (j < i)
3357                         msrs_to_save[j] = msrs_to_save[i];
3358                 j++;
3359         }
3360         num_msrs_to_save = j;
3361 }
3362
3363 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3364                            const void *v)
3365 {
3366         int handled = 0;
3367         int n;
3368
3369         do {
3370                 n = min(len, 8);
3371                 if (!(vcpu->arch.apic &&
3372                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3373                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3374                         break;
3375                 handled += n;
3376                 addr += n;
3377                 len -= n;
3378                 v += n;
3379         } while (len);
3380
3381         return handled;
3382 }
3383
3384 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3385 {
3386         int handled = 0;
3387         int n;
3388
3389         do {
3390                 n = min(len, 8);
3391                 if (!(vcpu->arch.apic &&
3392                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3393                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3394                         break;
3395                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3396                 handled += n;
3397                 addr += n;
3398                 len -= n;
3399                 v += n;
3400         } while (len);
3401
3402         return handled;
3403 }
3404
3405 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3406                         struct kvm_segment *var, int seg)
3407 {
3408         kvm_x86_ops->set_segment(vcpu, var, seg);
3409 }
3410
3411 void kvm_get_segment(struct kvm_vcpu *vcpu,
3412                      struct kvm_segment *var, int seg)
3413 {
3414         kvm_x86_ops->get_segment(vcpu, var, seg);
3415 }
3416
3417 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3418 {
3419         gpa_t t_gpa;
3420         struct x86_exception exception;
3421
3422         BUG_ON(!mmu_is_nested(vcpu));
3423
3424         /* NPT walks are always user-walks */
3425         access |= PFERR_USER_MASK;
3426         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3427
3428         return t_gpa;
3429 }
3430
3431 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3432                               struct x86_exception *exception)
3433 {
3434         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3435         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3436 }
3437
3438  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3439                                 struct x86_exception *exception)
3440 {
3441         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3442         access |= PFERR_FETCH_MASK;
3443         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3444 }
3445
3446 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3447                                struct x86_exception *exception)
3448 {
3449         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3450         access |= PFERR_WRITE_MASK;
3451         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3452 }
3453
3454 /* uses this to access any guest's mapped memory without checking CPL */
3455 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3456                                 struct x86_exception *exception)
3457 {
3458         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3459 }
3460
3461 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3462                                       struct kvm_vcpu *vcpu, u32 access,
3463                                       struct x86_exception *exception)
3464 {
3465         void *data = val;
3466         int r = X86EMUL_CONTINUE;
3467
3468         while (bytes) {
3469                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3470                                                             exception);
3471                 unsigned offset = addr & (PAGE_SIZE-1);
3472                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3473                 int ret;
3474
3475                 if (gpa == UNMAPPED_GVA)
3476                         return X86EMUL_PROPAGATE_FAULT;
3477                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3478                 if (ret < 0) {
3479                         r = X86EMUL_IO_NEEDED;
3480                         goto out;
3481                 }
3482
3483                 bytes -= toread;
3484                 data += toread;
3485                 addr += toread;
3486         }
3487 out:
3488         return r;
3489 }
3490
3491 /* used for instruction fetching */
3492 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3493                                 gva_t addr, void *val, unsigned int bytes,
3494                                 struct x86_exception *exception)
3495 {
3496         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3497         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3498
3499         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3500                                           access | PFERR_FETCH_MASK,
3501                                           exception);
3502 }
3503
3504 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3505                                gva_t addr, void *val, unsigned int bytes,
3506                                struct x86_exception *exception)
3507 {
3508         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3509         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3510
3511         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3512                                           exception);
3513 }
3514 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3515
3516 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3517                                       gva_t addr, void *val, unsigned int bytes,
3518                                       struct x86_exception *exception)
3519 {
3520         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3521         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3522 }
3523
3524 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3525                                        gva_t addr, void *val,
3526                                        unsigned int bytes,
3527                                        struct x86_exception *exception)
3528 {
3529         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3530         void *data = val;
3531         int r = X86EMUL_CONTINUE;
3532
3533         while (bytes) {
3534                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3535                                                              PFERR_WRITE_MASK,
3536                                                              exception);
3537                 unsigned offset = addr & (PAGE_SIZE-1);
3538                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3539                 int ret;
3540
3541                 if (gpa == UNMAPPED_GVA)
3542                         return X86EMUL_PROPAGATE_FAULT;
3543                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3544                 if (ret < 0) {
3545                         r = X86EMUL_IO_NEEDED;
3546                         goto out;
3547                 }
3548
3549                 bytes -= towrite;
3550                 data += towrite;
3551                 addr += towrite;
3552         }
3553 out:
3554         return r;
3555 }
3556 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3557
3558 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3559                                 gpa_t *gpa, struct x86_exception *exception,
3560                                 bool write)
3561 {
3562         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3563
3564         if (vcpu_match_mmio_gva(vcpu, gva) &&
3565                   check_write_user_access(vcpu, write, access,
3566                   vcpu->arch.access)) {
3567                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3568                                         (gva & (PAGE_SIZE - 1));
3569                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3570                 return 1;
3571         }
3572
3573         if (write)
3574                 access |= PFERR_WRITE_MASK;
3575
3576         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3577
3578         if (*gpa == UNMAPPED_GVA)
3579                 return -1;
3580
3581         /* For APIC access vmexit */
3582         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3583                 return 1;
3584
3585         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3586                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3587                 return 1;
3588         }
3589
3590         return 0;
3591 }
3592
3593 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3594                         const void *val, int bytes)
3595 {
3596         int ret;
3597
3598         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3599         if (ret < 0)
3600                 return 0;
3601         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3602         return 1;
3603 }
3604
3605 struct read_write_emulator_ops {
3606         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3607                                   int bytes);
3608         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3609                                   void *val, int bytes);
3610         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3611                                int bytes, void *val);
3612         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3613                                     void *val, int bytes);
3614         bool write;
3615 };
3616
3617 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3618 {
3619         if (vcpu->mmio_read_completed) {
3620                 memcpy(val, vcpu->mmio_data, bytes);
3621                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3622                                vcpu->mmio_phys_addr, *(u64 *)val);
3623                 vcpu->mmio_read_completed = 0;
3624                 return 1;
3625         }
3626
3627         return 0;
3628 }
3629
3630 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3631                         void *val, int bytes)
3632 {
3633         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3634 }
3635
3636 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3637                          void *val, int bytes)
3638 {
3639         return emulator_write_phys(vcpu, gpa, val, bytes);
3640 }
3641
3642 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3643 {
3644         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3645         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3646 }
3647
3648 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3649                           void *val, int bytes)
3650 {
3651         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3652         return X86EMUL_IO_NEEDED;
3653 }
3654
3655 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3656                            void *val, int bytes)
3657 {
3658         memcpy(vcpu->mmio_data, val, bytes);
3659         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3660         return X86EMUL_CONTINUE;
3661 }
3662
3663 static struct read_write_emulator_ops read_emultor = {
3664         .read_write_prepare = read_prepare,
3665         .read_write_emulate = read_emulate,
3666         .read_write_mmio = vcpu_mmio_read,
3667         .read_write_exit_mmio = read_exit_mmio,
3668 };
3669
3670 static struct read_write_emulator_ops write_emultor = {
3671         .read_write_emulate = write_emulate,
3672         .read_write_mmio = write_mmio,
3673         .read_write_exit_mmio = write_exit_mmio,
3674         .write = true,
3675 };
3676
3677 static int emulator_read_write_onepage(unsigned long addr, void *val,
3678                                        unsigned int bytes,
3679                                        struct x86_exception *exception,
3680                                        struct kvm_vcpu *vcpu,
3681                                        struct read_write_emulator_ops *ops)
3682 {
3683         gpa_t gpa;
3684         int handled, ret;
3685         bool write = ops->write;
3686
3687         if (ops->read_write_prepare &&
3688                   ops->read_write_prepare(vcpu, val, bytes))
3689                 return X86EMUL_CONTINUE;
3690
3691         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3692
3693         if (ret < 0)
3694                 return X86EMUL_PROPAGATE_FAULT;
3695
3696         /* For APIC access vmexit */
3697         if (ret)
3698                 goto mmio;
3699
3700         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3701                 return X86EMUL_CONTINUE;
3702
3703 mmio:
3704         /*
3705          * Is this MMIO handled locally?
3706          */
3707         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3708         if (handled == bytes)
3709                 return X86EMUL_CONTINUE;
3710
3711         gpa += handled;
3712         bytes -= handled;
3713         val += handled;
3714
3715         vcpu->mmio_needed = 1;
3716         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3717         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3718         vcpu->mmio_size = bytes;
3719         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3720         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3721         vcpu->mmio_index = 0;
3722
3723         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3724 }
3725
3726 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3727                         void *val, unsigned int bytes,
3728                         struct x86_exception *exception,
3729                         struct read_write_emulator_ops *ops)
3730 {
3731         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3732
3733         /* Crossing a page boundary? */
3734         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3735                 int rc, now;
3736
3737                 now = -addr & ~PAGE_MASK;
3738                 rc = emulator_read_write_onepage(addr, val, now, exception,
3739                                                  vcpu, ops);
3740
3741                 if (rc != X86EMUL_CONTINUE)
3742                         return rc;
3743                 addr += now;
3744                 val += now;
3745                 bytes -= now;
3746         }
3747
3748         return emulator_read_write_onepage(addr, val, bytes, exception,
3749                                            vcpu, ops);
3750 }
3751
3752 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3753                                   unsigned long addr,
3754                                   void *val,
3755                                   unsigned int bytes,
3756                                   struct x86_exception *exception)
3757 {
3758         return emulator_read_write(ctxt, addr, val, bytes,
3759                                    exception, &read_emultor);
3760 }
3761
3762 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3763                             unsigned long addr,
3764                             const void *val,
3765                             unsigned int bytes,
3766                             struct x86_exception *exception)
3767 {
3768         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3769                                    exception, &write_emultor);
3770 }
3771
3772 #define CMPXCHG_TYPE(t, ptr, old, new) \
3773         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3774
3775 #ifdef CONFIG_X86_64
3776 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3777 #else
3778 #  define CMPXCHG64(ptr, old, new) \
3779         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3780 #endif
3781
3782 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3783                                      unsigned long addr,
3784                                      const void *old,
3785                                      const void *new,
3786                                      unsigned int bytes,
3787                                      struct x86_exception *exception)
3788 {
3789         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3790         gpa_t gpa;
3791         struct page *page;
3792         char *kaddr;
3793         bool exchanged;
3794
3795         /* guests cmpxchg8b have to be emulated atomically */
3796         if (bytes > 8 || (bytes & (bytes - 1)))
3797                 goto emul_write;
3798
3799         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3800
3801         if (gpa == UNMAPPED_GVA ||
3802             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3803                 goto emul_write;
3804
3805         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3806                 goto emul_write;
3807
3808         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3809         if (is_error_page(page)) {
3810                 kvm_release_page_clean(page);
3811                 goto emul_write;
3812         }
3813
3814         kaddr = kmap_atomic(page, KM_USER0);
3815         kaddr += offset_in_page(gpa);
3816         switch (bytes) {
3817         case 1:
3818                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3819                 break;
3820         case 2:
3821                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3822                 break;
3823         case 4:
3824                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3825                 break;
3826         case 8:
3827                 exchanged = CMPXCHG64(kaddr, old, new);
3828                 break;
3829         default:
3830                 BUG();
3831         }
3832         kunmap_atomic(kaddr, KM_USER0);
3833         kvm_release_page_dirty(page);
3834
3835         if (!exchanged)
3836                 return X86EMUL_CMPXCHG_FAILED;
3837
3838         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3839
3840         return X86EMUL_CONTINUE;
3841
3842 emul_write:
3843         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3844
3845         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3846 }
3847
3848 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3849 {
3850         /* TODO: String I/O for in kernel device */
3851         int r;
3852
3853         if (vcpu->arch.pio.in)
3854                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3855                                     vcpu->arch.pio.size, pd);
3856         else
3857                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3858                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3859                                      pd);
3860         return r;
3861 }
3862
3863 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3864                                unsigned short port, void *val,
3865                                unsigned int count, bool in)
3866 {
3867         trace_kvm_pio(!in, port, size, count);
3868
3869         vcpu->arch.pio.port = port;
3870         vcpu->arch.pio.in = in;
3871         vcpu->arch.pio.count  = count;
3872         vcpu->arch.pio.size = size;
3873
3874         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3875                 vcpu->arch.pio.count = 0;
3876                 return 1;
3877         }
3878
3879         vcpu->run->exit_reason = KVM_EXIT_IO;
3880         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3881         vcpu->run->io.size = size;
3882         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3883         vcpu->run->io.count = count;
3884         vcpu->run->io.port = port;
3885
3886         return 0;
3887 }
3888
3889 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
3890                                     int size, unsigned short port, void *val,
3891                                     unsigned int count)
3892 {
3893         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3894         int ret;
3895
3896         if (vcpu->arch.pio.count)
3897                 goto data_avail;
3898
3899         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
3900         if (ret) {
3901 data_avail:
3902                 memcpy(val, vcpu->arch.pio_data, size * count);
3903                 vcpu->arch.pio.count = 0;
3904                 return 1;
3905         }
3906
3907         return 0;
3908 }
3909
3910 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
3911                                      int size, unsigned short port,
3912                                      const void *val, unsigned int count)
3913 {
3914         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3915
3916         memcpy(vcpu->arch.pio_data, val, size * count);
3917         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
3918 }
3919
3920 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3921 {
3922         return kvm_x86_ops->get_segment_base(vcpu, seg);
3923 }
3924
3925 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
3926 {
3927         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
3928 }
3929
3930 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3931 {
3932         if (!need_emulate_wbinvd(vcpu))
3933                 return X86EMUL_CONTINUE;
3934
3935         if (kvm_x86_ops->has_wbinvd_exit()) {
3936                 int cpu = get_cpu();
3937
3938                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3939                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3940                                 wbinvd_ipi, NULL, 1);
3941                 put_cpu();
3942                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3943         } else
3944                 wbinvd();
3945         return X86EMUL_CONTINUE;
3946 }
3947 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3948
3949 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
3950 {
3951         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
3952 }
3953
3954 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3955 {
3956         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
3957 }
3958
3959 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3960 {
3961
3962         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
3963 }
3964
3965 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3966 {
3967         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3968 }
3969
3970 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
3971 {
3972         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3973         unsigned long value;
3974
3975         switch (cr) {
3976         case 0:
3977                 value = kvm_read_cr0(vcpu);
3978                 break;
3979         case 2:
3980                 value = vcpu->arch.cr2;
3981                 break;
3982         case 3:
3983                 value = kvm_read_cr3(vcpu);
3984                 break;
3985         case 4:
3986                 value = kvm_read_cr4(vcpu);
3987                 break;
3988         case 8:
3989                 value = kvm_get_cr8(vcpu);
3990                 break;
3991         default:
3992                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3993                 return 0;
3994         }
3995
3996         return value;
3997 }
3998
3999 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4000 {
4001         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4002         int res = 0;
4003
4004         switch (cr) {
4005         case 0:
4006                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4007                 break;
4008         case 2:
4009                 vcpu->arch.cr2 = val;
4010                 break;
4011         case 3:
4012                 res = kvm_set_cr3(vcpu, val);
4013                 break;
4014         case 4:
4015                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4016                 break;
4017         case 8:
4018                 res = kvm_set_cr8(vcpu, val);
4019                 break;
4020         default:
4021                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4022                 res = -1;
4023         }
4024
4025         return res;
4026 }
4027
4028 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4029 {
4030         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4031 }
4032
4033 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4034 {
4035         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4036 }
4037
4038 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4039 {
4040         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4041 }
4042
4043 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4044 {
4045         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4046 }
4047
4048 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4049 {
4050         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4051 }
4052
4053 static unsigned long emulator_get_cached_segment_base(
4054         struct x86_emulate_ctxt *ctxt, int seg)
4055 {
4056         return get_segment_base(emul_to_vcpu(ctxt), seg);
4057 }
4058
4059 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4060                                  struct desc_struct *desc, u32 *base3,
4061                                  int seg)
4062 {
4063         struct kvm_segment var;
4064
4065         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4066         *selector = var.selector;
4067
4068         if (var.unusable)
4069                 return false;
4070
4071         if (var.g)
4072                 var.limit >>= 12;
4073         set_desc_limit(desc, var.limit);
4074         set_desc_base(desc, (unsigned long)var.base);
4075 #ifdef CONFIG_X86_64
4076         if (base3)
4077                 *base3 = var.base >> 32;
4078 #endif
4079         desc->type = var.type;
4080         desc->s = var.s;
4081         desc->dpl = var.dpl;
4082         desc->p = var.present;
4083         desc->avl = var.avl;
4084         desc->l = var.l;
4085         desc->d = var.db;
4086         desc->g = var.g;
4087
4088         return true;
4089 }
4090
4091 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4092                                  struct desc_struct *desc, u32 base3,
4093                                  int seg)
4094 {
4095         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4096         struct kvm_segment var;
4097
4098         var.selector = selector;
4099         var.base = get_desc_base(desc);
4100 #ifdef CONFIG_X86_64
4101         var.base |= ((u64)base3) << 32;
4102 #endif
4103         var.limit = get_desc_limit(desc);
4104         if (desc->g)
4105                 var.limit = (var.limit << 12) | 0xfff;
4106         var.type = desc->type;
4107         var.present = desc->p;
4108         var.dpl = desc->dpl;
4109         var.db = desc->d;
4110         var.s = desc->s;
4111         var.l = desc->l;
4112         var.g = desc->g;
4113         var.avl = desc->avl;
4114         var.present = desc->p;
4115         var.unusable = !var.present;
4116         var.padding = 0;
4117
4118         kvm_set_segment(vcpu, &var, seg);
4119         return;
4120 }
4121
4122 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4123                             u32 msr_index, u64 *pdata)
4124 {
4125         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4126 }
4127
4128 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4129                             u32 msr_index, u64 data)
4130 {
4131         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4132 }
4133
4134 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4135 {
4136         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4137 }
4138
4139 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4140 {
4141         preempt_disable();
4142         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4143         /*
4144          * CR0.TS may reference the host fpu state, not the guest fpu state,
4145          * so it may be clear at this point.
4146          */
4147         clts();
4148 }
4149
4150 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4151 {
4152         preempt_enable();
4153 }
4154
4155 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4156                               struct x86_instruction_info *info,
4157                               enum x86_intercept_stage stage)
4158 {
4159         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4160 }
4161
4162 static struct x86_emulate_ops emulate_ops = {
4163         .read_std            = kvm_read_guest_virt_system,
4164         .write_std           = kvm_write_guest_virt_system,
4165         .fetch               = kvm_fetch_guest_virt,
4166         .read_emulated       = emulator_read_emulated,
4167         .write_emulated      = emulator_write_emulated,
4168         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4169         .invlpg              = emulator_invlpg,
4170         .pio_in_emulated     = emulator_pio_in_emulated,
4171         .pio_out_emulated    = emulator_pio_out_emulated,
4172         .get_segment         = emulator_get_segment,
4173         .set_segment         = emulator_set_segment,
4174         .get_cached_segment_base = emulator_get_cached_segment_base,
4175         .get_gdt             = emulator_get_gdt,
4176         .get_idt             = emulator_get_idt,
4177         .set_gdt             = emulator_set_gdt,
4178         .set_idt             = emulator_set_idt,
4179         .get_cr              = emulator_get_cr,
4180         .set_cr              = emulator_set_cr,
4181         .cpl                 = emulator_get_cpl,
4182         .get_dr              = emulator_get_dr,
4183         .set_dr              = emulator_set_dr,
4184         .set_msr             = emulator_set_msr,
4185         .get_msr             = emulator_get_msr,
4186         .halt                = emulator_halt,
4187         .wbinvd              = emulator_wbinvd,
4188         .fix_hypercall       = emulator_fix_hypercall,
4189         .get_fpu             = emulator_get_fpu,
4190         .put_fpu             = emulator_put_fpu,
4191         .intercept           = emulator_intercept,
4192 };
4193
4194 static void cache_all_regs(struct kvm_vcpu *vcpu)
4195 {
4196         kvm_register_read(vcpu, VCPU_REGS_RAX);
4197         kvm_register_read(vcpu, VCPU_REGS_RSP);
4198         kvm_register_read(vcpu, VCPU_REGS_RIP);
4199         vcpu->arch.regs_dirty = ~0;
4200 }
4201
4202 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4203 {
4204         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4205         /*
4206          * an sti; sti; sequence only disable interrupts for the first
4207          * instruction. So, if the last instruction, be it emulated or
4208          * not, left the system with the INT_STI flag enabled, it
4209          * means that the last instruction is an sti. We should not
4210          * leave the flag on in this case. The same goes for mov ss
4211          */
4212         if (!(int_shadow & mask))
4213                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4214 }
4215
4216 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4217 {
4218         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4219         if (ctxt->exception.vector == PF_VECTOR)
4220                 kvm_propagate_fault(vcpu, &ctxt->exception);
4221         else if (ctxt->exception.error_code_valid)
4222                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4223                                       ctxt->exception.error_code);
4224         else
4225                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4226 }
4227
4228 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4229                               const unsigned long *regs)
4230 {
4231         memset(&ctxt->twobyte, 0,
4232                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4233         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4234
4235         ctxt->fetch.start = 0;
4236         ctxt->fetch.end = 0;
4237         ctxt->io_read.pos = 0;
4238         ctxt->io_read.end = 0;
4239         ctxt->mem_read.pos = 0;
4240         ctxt->mem_read.end = 0;
4241 }
4242
4243 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4244 {
4245         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4246         int cs_db, cs_l;
4247
4248         /*
4249          * TODO: fix emulate.c to use guest_read/write_register
4250          * instead of direct ->regs accesses, can save hundred cycles
4251          * on Intel for instructions that don't read/change RSP, for
4252          * for example.
4253          */
4254         cache_all_regs(vcpu);
4255
4256         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4257
4258         ctxt->eflags = kvm_get_rflags(vcpu);
4259         ctxt->eip = kvm_rip_read(vcpu);
4260         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4261                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4262                      cs_l                               ? X86EMUL_MODE_PROT64 :
4263                      cs_db                              ? X86EMUL_MODE_PROT32 :
4264                                                           X86EMUL_MODE_PROT16;
4265         ctxt->guest_mode = is_guest_mode(vcpu);
4266
4267         init_decode_cache(ctxt, vcpu->arch.regs);
4268         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4269 }
4270
4271 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4272 {
4273         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4274         int ret;
4275
4276         init_emulate_ctxt(vcpu);
4277
4278         ctxt->op_bytes = 2;
4279         ctxt->ad_bytes = 2;
4280         ctxt->_eip = ctxt->eip + inc_eip;
4281         ret = emulate_int_real(ctxt, irq);
4282
4283         if (ret != X86EMUL_CONTINUE)
4284                 return EMULATE_FAIL;
4285
4286         ctxt->eip = ctxt->_eip;
4287         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4288         kvm_rip_write(vcpu, ctxt->eip);
4289         kvm_set_rflags(vcpu, ctxt->eflags);
4290
4291         if (irq == NMI_VECTOR)
4292                 vcpu->arch.nmi_pending = 0;
4293         else
4294                 vcpu->arch.interrupt.pending = false;
4295
4296         return EMULATE_DONE;
4297 }
4298 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4299
4300 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4301 {
4302         int r = EMULATE_DONE;
4303
4304         ++vcpu->stat.insn_emulation_fail;
4305         trace_kvm_emulate_insn_failed(vcpu);
4306         if (!is_guest_mode(vcpu)) {
4307                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4308                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4309                 vcpu->run->internal.ndata = 0;
4310                 r = EMULATE_FAIL;
4311         }
4312         kvm_queue_exception(vcpu, UD_VECTOR);
4313
4314         return r;
4315 }
4316
4317 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4318 {
4319         gpa_t gpa;
4320
4321         if (tdp_enabled)
4322                 return false;
4323
4324         /*
4325          * if emulation was due to access to shadowed page table
4326          * and it failed try to unshadow page and re-entetr the
4327          * guest to let CPU execute the instruction.
4328          */
4329         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4330                 return true;
4331
4332         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4333
4334         if (gpa == UNMAPPED_GVA)
4335                 return true; /* let cpu generate fault */
4336
4337         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4338                 return true;
4339
4340         return false;
4341 }
4342
4343 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4344                               unsigned long cr2,  int emulation_type)
4345 {
4346         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4347         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4348
4349         last_retry_eip = vcpu->arch.last_retry_eip;
4350         last_retry_addr = vcpu->arch.last_retry_addr;
4351
4352         /*
4353          * If the emulation is caused by #PF and it is non-page_table
4354          * writing instruction, it means the VM-EXIT is caused by shadow
4355          * page protected, we can zap the shadow page and retry this
4356          * instruction directly.
4357          *
4358          * Note: if the guest uses a non-page-table modifying instruction
4359          * on the PDE that points to the instruction, then we will unmap
4360          * the instruction and go to an infinite loop. So, we cache the
4361          * last retried eip and the last fault address, if we meet the eip
4362          * and the address again, we can break out of the potential infinite
4363          * loop.
4364          */
4365         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4366
4367         if (!(emulation_type & EMULTYPE_RETRY))
4368                 return false;
4369
4370         if (x86_page_table_writing_insn(ctxt))
4371                 return false;
4372
4373         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4374                 return false;
4375
4376         vcpu->arch.last_retry_eip = ctxt->eip;
4377         vcpu->arch.last_retry_addr = cr2;
4378
4379         if (!vcpu->arch.mmu.direct_map)
4380                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4381
4382         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4383
4384         return true;
4385 }
4386
4387 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4388                             unsigned long cr2,
4389                             int emulation_type,
4390                             void *insn,
4391                             int insn_len)
4392 {
4393         int r;
4394         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4395         bool writeback = true;
4396
4397         kvm_clear_exception_queue(vcpu);
4398
4399         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4400                 init_emulate_ctxt(vcpu);
4401                 ctxt->interruptibility = 0;
4402                 ctxt->have_exception = false;
4403                 ctxt->perm_ok = false;
4404
4405                 ctxt->only_vendor_specific_insn
4406                         = emulation_type & EMULTYPE_TRAP_UD;
4407
4408                 r = x86_decode_insn(ctxt, insn, insn_len);
4409
4410                 trace_kvm_emulate_insn_start(vcpu);
4411                 ++vcpu->stat.insn_emulation;
4412                 if (r != EMULATION_OK)  {
4413                         if (emulation_type & EMULTYPE_TRAP_UD)
4414                                 return EMULATE_FAIL;
4415                         if (reexecute_instruction(vcpu, cr2))
4416                                 return EMULATE_DONE;
4417                         if (emulation_type & EMULTYPE_SKIP)
4418                                 return EMULATE_FAIL;
4419                         return handle_emulation_failure(vcpu);
4420                 }
4421         }
4422
4423         if (emulation_type & EMULTYPE_SKIP) {
4424                 kvm_rip_write(vcpu, ctxt->_eip);
4425                 return EMULATE_DONE;
4426         }
4427
4428         if (retry_instruction(ctxt, cr2, emulation_type))
4429                 return EMULATE_DONE;
4430
4431         /* this is needed for vmware backdoor interface to work since it
4432            changes registers values  during IO operation */
4433         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4434                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4435                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4436         }
4437
4438 restart:
4439         r = x86_emulate_insn(ctxt);
4440
4441         if (r == EMULATION_INTERCEPTED)
4442                 return EMULATE_DONE;
4443
4444         if (r == EMULATION_FAILED) {
4445                 if (reexecute_instruction(vcpu, cr2))
4446                         return EMULATE_DONE;
4447
4448                 return handle_emulation_failure(vcpu);
4449         }
4450
4451         if (ctxt->have_exception) {
4452                 inject_emulated_exception(vcpu);
4453                 r = EMULATE_DONE;
4454         } else if (vcpu->arch.pio.count) {
4455                 if (!vcpu->arch.pio.in)
4456                         vcpu->arch.pio.count = 0;
4457                 else
4458                         writeback = false;
4459                 r = EMULATE_DO_MMIO;
4460         } else if (vcpu->mmio_needed) {
4461                 if (!vcpu->mmio_is_write)
4462                         writeback = false;
4463                 r = EMULATE_DO_MMIO;
4464         } else if (r == EMULATION_RESTART)
4465                 goto restart;
4466         else
4467                 r = EMULATE_DONE;
4468
4469         if (writeback) {
4470                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4471                 kvm_set_rflags(vcpu, ctxt->eflags);
4472                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4473                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4474                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4475                 kvm_rip_write(vcpu, ctxt->eip);
4476         } else
4477                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4478
4479         return r;
4480 }
4481 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4482
4483 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4484 {
4485         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4486         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4487                                             size, port, &val, 1);
4488         /* do not return to emulator after return from userspace */
4489         vcpu->arch.pio.count = 0;
4490         return ret;
4491 }
4492 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4493
4494 static void tsc_bad(void *info)
4495 {
4496         __this_cpu_write(cpu_tsc_khz, 0);
4497 }
4498
4499 static void tsc_khz_changed(void *data)
4500 {
4501         struct cpufreq_freqs *freq = data;
4502         unsigned long khz = 0;
4503
4504         if (data)
4505                 khz = freq->new;
4506         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4507                 khz = cpufreq_quick_get(raw_smp_processor_id());
4508         if (!khz)
4509                 khz = tsc_khz;
4510         __this_cpu_write(cpu_tsc_khz, khz);
4511 }
4512
4513 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4514                                      void *data)
4515 {
4516         struct cpufreq_freqs *freq = data;
4517         struct kvm *kvm;
4518         struct kvm_vcpu *vcpu;
4519         int i, send_ipi = 0;
4520
4521         /*
4522          * We allow guests to temporarily run on slowing clocks,
4523          * provided we notify them after, or to run on accelerating
4524          * clocks, provided we notify them before.  Thus time never
4525          * goes backwards.
4526          *
4527          * However, we have a problem.  We can't atomically update
4528          * the frequency of a given CPU from this function; it is
4529          * merely a notifier, which can be called from any CPU.
4530          * Changing the TSC frequency at arbitrary points in time
4531          * requires a recomputation of local variables related to
4532          * the TSC for each VCPU.  We must flag these local variables
4533          * to be updated and be sure the update takes place with the
4534          * new frequency before any guests proceed.
4535          *
4536          * Unfortunately, the combination of hotplug CPU and frequency
4537          * change creates an intractable locking scenario; the order
4538          * of when these callouts happen is undefined with respect to
4539          * CPU hotplug, and they can race with each other.  As such,
4540          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4541          * undefined; you can actually have a CPU frequency change take
4542          * place in between the computation of X and the setting of the
4543          * variable.  To protect against this problem, all updates of
4544          * the per_cpu tsc_khz variable are done in an interrupt
4545          * protected IPI, and all callers wishing to update the value
4546          * must wait for a synchronous IPI to complete (which is trivial
4547          * if the caller is on the CPU already).  This establishes the
4548          * necessary total order on variable updates.
4549          *
4550          * Note that because a guest time update may take place
4551          * anytime after the setting of the VCPU's request bit, the
4552          * correct TSC value must be set before the request.  However,
4553          * to ensure the update actually makes it to any guest which
4554          * starts running in hardware virtualization between the set
4555          * and the acquisition of the spinlock, we must also ping the
4556          * CPU after setting the request bit.
4557          *
4558          */
4559
4560         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4561                 return 0;
4562         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4563                 return 0;
4564
4565         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4566
4567         raw_spin_lock(&kvm_lock);
4568         list_for_each_entry(kvm, &vm_list, vm_list) {
4569                 kvm_for_each_vcpu(i, vcpu, kvm) {
4570                         if (vcpu->cpu != freq->cpu)
4571                                 continue;
4572                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4573                         if (vcpu->cpu != smp_processor_id())
4574                                 send_ipi = 1;
4575                 }
4576         }
4577         raw_spin_unlock(&kvm_lock);
4578
4579         if (freq->old < freq->new && send_ipi) {
4580                 /*
4581                  * We upscale the frequency.  Must make the guest
4582                  * doesn't see old kvmclock values while running with
4583                  * the new frequency, otherwise we risk the guest sees
4584                  * time go backwards.
4585                  *
4586                  * In case we update the frequency for another cpu
4587                  * (which might be in guest context) send an interrupt
4588                  * to kick the cpu out of guest context.  Next time
4589                  * guest context is entered kvmclock will be updated,
4590                  * so the guest will not see stale values.
4591                  */
4592                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4593         }
4594         return 0;
4595 }
4596
4597 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4598         .notifier_call  = kvmclock_cpufreq_notifier
4599 };
4600
4601 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4602                                         unsigned long action, void *hcpu)
4603 {
4604         unsigned int cpu = (unsigned long)hcpu;
4605
4606         switch (action) {
4607                 case CPU_ONLINE:
4608                 case CPU_DOWN_FAILED:
4609                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4610                         break;
4611                 case CPU_DOWN_PREPARE:
4612                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4613                         break;
4614         }
4615         return NOTIFY_OK;
4616 }
4617
4618 static struct notifier_block kvmclock_cpu_notifier_block = {
4619         .notifier_call  = kvmclock_cpu_notifier,
4620         .priority = -INT_MAX
4621 };
4622
4623 static void kvm_timer_init(void)
4624 {
4625         int cpu;
4626
4627         max_tsc_khz = tsc_khz;
4628         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4629         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4630 #ifdef CONFIG_CPU_FREQ
4631                 struct cpufreq_policy policy;
4632                 memset(&policy, 0, sizeof(policy));
4633                 cpu = get_cpu();
4634                 cpufreq_get_policy(&policy, cpu);
4635                 if (policy.cpuinfo.max_freq)
4636                         max_tsc_khz = policy.cpuinfo.max_freq;
4637                 put_cpu();
4638 #endif
4639                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4640                                           CPUFREQ_TRANSITION_NOTIFIER);
4641         }
4642         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4643         for_each_online_cpu(cpu)
4644                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4645 }
4646
4647 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4648
4649 int kvm_is_in_guest(void)
4650 {
4651         return __this_cpu_read(current_vcpu) != NULL;
4652 }
4653
4654 static int kvm_is_user_mode(void)
4655 {
4656         int user_mode = 3;
4657
4658         if (__this_cpu_read(current_vcpu))
4659                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4660
4661         return user_mode != 0;
4662 }
4663
4664 static unsigned long kvm_get_guest_ip(void)
4665 {
4666         unsigned long ip = 0;
4667
4668         if (__this_cpu_read(current_vcpu))
4669                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4670
4671         return ip;
4672 }
4673
4674 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4675         .is_in_guest            = kvm_is_in_guest,
4676         .is_user_mode           = kvm_is_user_mode,
4677         .get_guest_ip           = kvm_get_guest_ip,
4678 };
4679
4680 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4681 {
4682         __this_cpu_write(current_vcpu, vcpu);
4683 }
4684 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4685
4686 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4687 {
4688         __this_cpu_write(current_vcpu, NULL);
4689 }
4690 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4691
4692 static void kvm_set_mmio_spte_mask(void)
4693 {
4694         u64 mask;
4695         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4696
4697         /*
4698          * Set the reserved bits and the present bit of an paging-structure
4699          * entry to generate page fault with PFER.RSV = 1.
4700          */
4701         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4702         mask |= 1ull;
4703
4704 #ifdef CONFIG_X86_64
4705         /*
4706          * If reserved bit is not supported, clear the present bit to disable
4707          * mmio page fault.
4708          */
4709         if (maxphyaddr == 52)
4710                 mask &= ~1ull;
4711 #endif
4712
4713         kvm_mmu_set_mmio_spte_mask(mask);
4714 }
4715
4716 int kvm_arch_init(void *opaque)
4717 {
4718         int r;
4719         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4720
4721         if (kvm_x86_ops) {
4722                 printk(KERN_ERR "kvm: already loaded the other module\n");
4723                 r = -EEXIST;
4724                 goto out;
4725         }
4726
4727         if (!ops->cpu_has_kvm_support()) {
4728                 printk(KERN_ERR "kvm: no hardware support\n");
4729                 r = -EOPNOTSUPP;
4730                 goto out;
4731         }
4732         if (ops->disabled_by_bios()) {
4733                 printk(KERN_ERR "kvm: disabled by bios\n");
4734                 r = -EOPNOTSUPP;
4735                 goto out;
4736         }
4737
4738         r = kvm_mmu_module_init();
4739         if (r)
4740                 goto out;
4741
4742         kvm_set_mmio_spte_mask();
4743         kvm_init_msr_list();
4744
4745         kvm_x86_ops = ops;
4746         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4747                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4748
4749         kvm_timer_init();
4750
4751         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4752
4753         if (cpu_has_xsave)
4754                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4755
4756         return 0;
4757
4758 out:
4759         return r;
4760 }
4761
4762 void kvm_arch_exit(void)
4763 {
4764         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4765
4766         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4767                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4768                                             CPUFREQ_TRANSITION_NOTIFIER);
4769         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4770         kvm_x86_ops = NULL;
4771         kvm_mmu_module_exit();
4772 }
4773
4774 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4775 {
4776         ++vcpu->stat.halt_exits;
4777         if (irqchip_in_kernel(vcpu->kvm)) {
4778                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4779                 return 1;
4780         } else {
4781                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4782                 return 0;
4783         }
4784 }
4785 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4786
4787 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4788 {
4789         u64 param, ingpa, outgpa, ret;
4790         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4791         bool fast, longmode;
4792         int cs_db, cs_l;
4793
4794         /*
4795          * hypercall generates UD from non zero cpl and real mode
4796          * per HYPER-V spec
4797          */
4798         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4799                 kvm_queue_exception(vcpu, UD_VECTOR);
4800                 return 0;
4801         }
4802
4803         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4804         longmode = is_long_mode(vcpu) && cs_l == 1;
4805
4806         if (!longmode) {
4807                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4808                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4809                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4810                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4811                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4812                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4813         }
4814 #ifdef CONFIG_X86_64
4815         else {
4816                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4817                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4818                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4819         }
4820 #endif
4821
4822         code = param & 0xffff;
4823         fast = (param >> 16) & 0x1;
4824         rep_cnt = (param >> 32) & 0xfff;
4825         rep_idx = (param >> 48) & 0xfff;
4826
4827         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4828
4829         switch (code) {
4830         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4831                 kvm_vcpu_on_spin(vcpu);
4832                 break;
4833         default:
4834                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4835                 break;
4836         }
4837
4838         ret = res | (((u64)rep_done & 0xfff) << 32);
4839         if (longmode) {
4840                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4841         } else {
4842                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4843                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4844         }
4845
4846         return 1;
4847 }
4848
4849 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4850 {
4851         unsigned long nr, a0, a1, a2, a3, ret;
4852         int r = 1;
4853
4854         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4855                 return kvm_hv_hypercall(vcpu);
4856
4857         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4858         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4859         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4860         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4861         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4862
4863         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4864
4865         if (!is_long_mode(vcpu)) {
4866                 nr &= 0xFFFFFFFF;
4867                 a0 &= 0xFFFFFFFF;
4868                 a1 &= 0xFFFFFFFF;
4869                 a2 &= 0xFFFFFFFF;
4870                 a3 &= 0xFFFFFFFF;
4871         }
4872
4873         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4874                 ret = -KVM_EPERM;
4875                 goto out;
4876         }
4877
4878         switch (nr) {
4879         case KVM_HC_VAPIC_POLL_IRQ:
4880                 ret = 0;
4881                 break;
4882         default:
4883                 ret = -KVM_ENOSYS;
4884                 break;
4885         }
4886 out:
4887         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4888         ++vcpu->stat.hypercalls;
4889         return r;
4890 }
4891 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4892
4893 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
4894 {
4895         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4896         char instruction[3];
4897         unsigned long rip = kvm_rip_read(vcpu);
4898
4899         /*
4900          * Blow out the MMU to ensure that no other VCPU has an active mapping
4901          * to ensure that the updated hypercall appears atomically across all
4902          * VCPUs.
4903          */
4904         kvm_mmu_zap_all(vcpu->kvm);
4905
4906         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4907
4908         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
4909 }
4910
4911 /*
4912  * Check if userspace requested an interrupt window, and that the
4913  * interrupt window is open.
4914  *
4915  * No need to exit to userspace if we already have an interrupt queued.
4916  */
4917 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4918 {
4919         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4920                 vcpu->run->request_interrupt_window &&
4921                 kvm_arch_interrupt_allowed(vcpu));
4922 }
4923
4924 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4925 {
4926         struct kvm_run *kvm_run = vcpu->run;
4927
4928         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4929         kvm_run->cr8 = kvm_get_cr8(vcpu);
4930         kvm_run->apic_base = kvm_get_apic_base(vcpu);
4931         if (irqchip_in_kernel(vcpu->kvm))
4932                 kvm_run->ready_for_interrupt_injection = 1;
4933         else
4934                 kvm_run->ready_for_interrupt_injection =
4935                         kvm_arch_interrupt_allowed(vcpu) &&
4936                         !kvm_cpu_has_interrupt(vcpu) &&
4937                         !kvm_event_needs_reinjection(vcpu);
4938 }
4939
4940 static void vapic_enter(struct kvm_vcpu *vcpu)
4941 {
4942         struct kvm_lapic *apic = vcpu->arch.apic;
4943         struct page *page;
4944
4945         if (!apic || !apic->vapic_addr)
4946                 return;
4947
4948         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4949
4950         vcpu->arch.apic->vapic_page = page;
4951 }
4952
4953 static void vapic_exit(struct kvm_vcpu *vcpu)
4954 {
4955         struct kvm_lapic *apic = vcpu->arch.apic;
4956         int idx;
4957
4958         if (!apic || !apic->vapic_addr)
4959                 return;
4960
4961         idx = srcu_read_lock(&vcpu->kvm->srcu);
4962         kvm_release_page_dirty(apic->vapic_page);
4963         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4964         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4965 }
4966
4967 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4968 {
4969         int max_irr, tpr;
4970
4971         if (!kvm_x86_ops->update_cr8_intercept)
4972                 return;
4973
4974         if (!vcpu->arch.apic)
4975                 return;
4976
4977         if (!vcpu->arch.apic->vapic_addr)
4978                 max_irr = kvm_lapic_find_highest_irr(vcpu);
4979         else
4980                 max_irr = -1;
4981
4982         if (max_irr != -1)
4983                 max_irr >>= 4;
4984
4985         tpr = kvm_lapic_get_cr8(vcpu);
4986
4987         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4988 }
4989
4990 static void inject_pending_event(struct kvm_vcpu *vcpu)
4991 {
4992         /* try to reinject previous events if any */
4993         if (vcpu->arch.exception.pending) {
4994                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4995                                         vcpu->arch.exception.has_error_code,
4996                                         vcpu->arch.exception.error_code);
4997                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4998                                           vcpu->arch.exception.has_error_code,
4999                                           vcpu->arch.exception.error_code,
5000                                           vcpu->arch.exception.reinject);
5001                 return;
5002         }
5003
5004         if (vcpu->arch.nmi_injected) {
5005                 kvm_x86_ops->set_nmi(vcpu);
5006                 return;
5007         }
5008
5009         if (vcpu->arch.interrupt.pending) {
5010                 kvm_x86_ops->set_irq(vcpu);
5011                 return;
5012         }
5013
5014         /* try to inject new event if pending */
5015         if (vcpu->arch.nmi_pending) {
5016                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5017                         --vcpu->arch.nmi_pending;
5018                         vcpu->arch.nmi_injected = true;
5019                         kvm_x86_ops->set_nmi(vcpu);
5020                 }
5021         } else if (kvm_cpu_has_interrupt(vcpu)) {
5022                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5023                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5024                                             false);
5025                         kvm_x86_ops->set_irq(vcpu);
5026                 }
5027         }
5028 }
5029
5030 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5031 {
5032         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5033                         !vcpu->guest_xcr0_loaded) {
5034                 /* kvm_set_xcr() also depends on this */
5035                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5036                 vcpu->guest_xcr0_loaded = 1;
5037         }
5038 }
5039
5040 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5041 {
5042         if (vcpu->guest_xcr0_loaded) {
5043                 if (vcpu->arch.xcr0 != host_xcr0)
5044                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5045                 vcpu->guest_xcr0_loaded = 0;
5046         }
5047 }
5048
5049 static void process_nmi(struct kvm_vcpu *vcpu)
5050 {
5051         unsigned limit = 2;
5052
5053         /*
5054          * x86 is limited to one NMI running, and one NMI pending after it.
5055          * If an NMI is already in progress, limit further NMIs to just one.
5056          * Otherwise, allow two (and we'll inject the first one immediately).
5057          */
5058         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5059                 limit = 1;
5060
5061         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5062         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5063         kvm_make_request(KVM_REQ_EVENT, vcpu);
5064 }
5065
5066 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5067 {
5068         int r;
5069         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5070                 vcpu->run->request_interrupt_window;
5071         bool req_immediate_exit = 0;
5072
5073         if (vcpu->requests) {
5074                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5075                         kvm_mmu_unload(vcpu);
5076                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5077                         __kvm_migrate_timers(vcpu);
5078                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5079                         r = kvm_guest_time_update(vcpu);
5080                         if (unlikely(r))
5081                                 goto out;
5082                 }
5083                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5084                         kvm_mmu_sync_roots(vcpu);
5085                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5086                         kvm_x86_ops->tlb_flush(vcpu);
5087                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5088                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5089                         r = 0;
5090                         goto out;
5091                 }
5092                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5093                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5094                         r = 0;
5095                         goto out;
5096                 }
5097                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5098                         vcpu->fpu_active = 0;
5099                         kvm_x86_ops->fpu_deactivate(vcpu);
5100                 }
5101                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5102                         /* Page is swapped out. Do synthetic halt */
5103                         vcpu->arch.apf.halted = true;
5104                         r = 1;
5105                         goto out;
5106                 }
5107                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5108                         record_steal_time(vcpu);
5109                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5110                         process_nmi(vcpu);
5111                 req_immediate_exit =
5112                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5113                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5114                         kvm_handle_pmu_event(vcpu);
5115                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5116                         kvm_deliver_pmi(vcpu);
5117         }
5118
5119         r = kvm_mmu_reload(vcpu);
5120         if (unlikely(r))
5121                 goto out;
5122
5123         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5124                 inject_pending_event(vcpu);
5125
5126                 /* enable NMI/IRQ window open exits if needed */
5127                 if (vcpu->arch.nmi_pending)
5128                         kvm_x86_ops->enable_nmi_window(vcpu);
5129                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5130                         kvm_x86_ops->enable_irq_window(vcpu);
5131
5132                 if (kvm_lapic_enabled(vcpu)) {
5133                         update_cr8_intercept(vcpu);
5134                         kvm_lapic_sync_to_vapic(vcpu);
5135                 }
5136         }
5137
5138         preempt_disable();
5139
5140         kvm_x86_ops->prepare_guest_switch(vcpu);
5141         if (vcpu->fpu_active)
5142                 kvm_load_guest_fpu(vcpu);
5143         kvm_load_guest_xcr0(vcpu);
5144
5145         vcpu->mode = IN_GUEST_MODE;
5146
5147         /* We should set ->mode before check ->requests,
5148          * see the comment in make_all_cpus_request.
5149          */
5150         smp_mb();
5151
5152         local_irq_disable();
5153
5154         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5155             || need_resched() || signal_pending(current)) {
5156                 vcpu->mode = OUTSIDE_GUEST_MODE;
5157                 smp_wmb();
5158                 local_irq_enable();
5159                 preempt_enable();
5160                 kvm_x86_ops->cancel_injection(vcpu);
5161                 r = 1;
5162                 goto out;
5163         }
5164
5165         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5166
5167         if (req_immediate_exit)
5168                 smp_send_reschedule(vcpu->cpu);
5169
5170         kvm_guest_enter();
5171
5172         if (unlikely(vcpu->arch.switch_db_regs)) {
5173                 set_debugreg(0, 7);
5174                 set_debugreg(vcpu->arch.eff_db[0], 0);
5175                 set_debugreg(vcpu->arch.eff_db[1], 1);
5176                 set_debugreg(vcpu->arch.eff_db[2], 2);
5177                 set_debugreg(vcpu->arch.eff_db[3], 3);
5178         }
5179
5180         trace_kvm_entry(vcpu->vcpu_id);
5181         kvm_x86_ops->run(vcpu);
5182
5183         /*
5184          * If the guest has used debug registers, at least dr7
5185          * will be disabled while returning to the host.
5186          * If we don't have active breakpoints in the host, we don't
5187          * care about the messed up debug address registers. But if
5188          * we have some of them active, restore the old state.
5189          */
5190         if (hw_breakpoint_active())
5191                 hw_breakpoint_restore();
5192
5193         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5194
5195         vcpu->mode = OUTSIDE_GUEST_MODE;
5196         smp_wmb();
5197         local_irq_enable();
5198
5199         ++vcpu->stat.exits;
5200
5201         /*
5202          * We must have an instruction between local_irq_enable() and
5203          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5204          * the interrupt shadow.  The stat.exits increment will do nicely.
5205          * But we need to prevent reordering, hence this barrier():
5206          */
5207         barrier();
5208
5209         kvm_guest_exit();
5210
5211         preempt_enable();
5212
5213         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5214
5215         /*
5216          * Profile KVM exit RIPs:
5217          */
5218         if (unlikely(prof_on == KVM_PROFILING)) {
5219                 unsigned long rip = kvm_rip_read(vcpu);
5220                 profile_hit(KVM_PROFILING, (void *)rip);
5221         }
5222
5223
5224         kvm_lapic_sync_from_vapic(vcpu);
5225
5226         r = kvm_x86_ops->handle_exit(vcpu);
5227 out:
5228         return r;
5229 }
5230
5231
5232 static int __vcpu_run(struct kvm_vcpu *vcpu)
5233 {
5234         int r;
5235         struct kvm *kvm = vcpu->kvm;
5236
5237         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5238                 pr_debug("vcpu %d received sipi with vector # %x\n",
5239                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5240                 kvm_lapic_reset(vcpu);
5241                 r = kvm_arch_vcpu_reset(vcpu);
5242                 if (r)
5243                         return r;
5244                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5245         }
5246
5247         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5248         vapic_enter(vcpu);
5249
5250         r = 1;
5251         while (r > 0) {
5252                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5253                     !vcpu->arch.apf.halted)
5254                         r = vcpu_enter_guest(vcpu);
5255                 else {
5256                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5257                         kvm_vcpu_block(vcpu);
5258                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5259                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5260                         {
5261                                 switch(vcpu->arch.mp_state) {
5262                                 case KVM_MP_STATE_HALTED:
5263                                         vcpu->arch.mp_state =
5264                                                 KVM_MP_STATE_RUNNABLE;
5265                                 case KVM_MP_STATE_RUNNABLE:
5266                                         vcpu->arch.apf.halted = false;
5267                                         break;
5268                                 case KVM_MP_STATE_SIPI_RECEIVED:
5269                                 default:
5270                                         r = -EINTR;
5271                                         break;
5272                                 }
5273                         }
5274                 }
5275
5276                 if (r <= 0)
5277                         break;
5278
5279                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5280                 if (kvm_cpu_has_pending_timer(vcpu))
5281                         kvm_inject_pending_timer_irqs(vcpu);
5282
5283                 if (dm_request_for_irq_injection(vcpu)) {
5284                         r = -EINTR;
5285                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5286                         ++vcpu->stat.request_irq_exits;
5287                 }
5288
5289                 kvm_check_async_pf_completion(vcpu);
5290
5291                 if (signal_pending(current)) {
5292                         r = -EINTR;
5293                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5294                         ++vcpu->stat.signal_exits;
5295                 }
5296                 if (need_resched()) {
5297                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5298                         kvm_resched(vcpu);
5299                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5300                 }
5301         }
5302
5303         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5304
5305         vapic_exit(vcpu);
5306
5307         return r;
5308 }
5309
5310 static int complete_mmio(struct kvm_vcpu *vcpu)
5311 {
5312         struct kvm_run *run = vcpu->run;
5313         int r;
5314
5315         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5316                 return 1;
5317
5318         if (vcpu->mmio_needed) {
5319                 vcpu->mmio_needed = 0;
5320                 if (!vcpu->mmio_is_write)
5321                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5322                                run->mmio.data, 8);
5323                 vcpu->mmio_index += 8;
5324                 if (vcpu->mmio_index < vcpu->mmio_size) {
5325                         run->exit_reason = KVM_EXIT_MMIO;
5326                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5327                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5328                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5329                         run->mmio.is_write = vcpu->mmio_is_write;
5330                         vcpu->mmio_needed = 1;
5331                         return 0;
5332                 }
5333                 if (vcpu->mmio_is_write)
5334                         return 1;
5335                 vcpu->mmio_read_completed = 1;
5336         }
5337         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5338         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5339         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5340         if (r != EMULATE_DONE)
5341                 return 0;
5342         return 1;
5343 }
5344
5345 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5346 {
5347         int r;
5348         sigset_t sigsaved;
5349
5350         if (!tsk_used_math(current) && init_fpu(current))
5351                 return -ENOMEM;
5352
5353         if (vcpu->sigset_active)
5354                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5355
5356         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5357                 kvm_vcpu_block(vcpu);
5358                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5359                 r = -EAGAIN;
5360                 goto out;
5361         }
5362
5363         /* re-sync apic's tpr */
5364         if (!irqchip_in_kernel(vcpu->kvm)) {
5365                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5366                         r = -EINVAL;
5367                         goto out;
5368                 }
5369         }
5370
5371         r = complete_mmio(vcpu);
5372         if (r <= 0)
5373                 goto out;
5374
5375         r = __vcpu_run(vcpu);
5376
5377 out:
5378         post_kvm_run_save(vcpu);
5379         if (vcpu->sigset_active)
5380                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5381
5382         return r;
5383 }
5384
5385 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5386 {
5387         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5388                 /*
5389                  * We are here if userspace calls get_regs() in the middle of
5390                  * instruction emulation. Registers state needs to be copied
5391                  * back from emulation context to vcpu. Usrapace shouldn't do
5392                  * that usually, but some bad designed PV devices (vmware
5393                  * backdoor interface) need this to work
5394                  */
5395                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5396                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5397                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5398         }
5399         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5400         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5401         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5402         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5403         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5404         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5405         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5406         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5407 #ifdef CONFIG_X86_64
5408         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5409         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5410         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5411         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5412         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5413         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5414         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5415         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5416 #endif
5417
5418         regs->rip = kvm_rip_read(vcpu);
5419         regs->rflags = kvm_get_rflags(vcpu);
5420
5421         return 0;
5422 }
5423
5424 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5425 {
5426         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5427         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5428
5429         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5430         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5431         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5432         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5433         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5434         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5435         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5436         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5437 #ifdef CONFIG_X86_64
5438         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5439         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5440         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5441         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5442         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5443         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5444         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5445         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5446 #endif
5447
5448         kvm_rip_write(vcpu, regs->rip);
5449         kvm_set_rflags(vcpu, regs->rflags);
5450
5451         vcpu->arch.exception.pending = false;
5452
5453         kvm_make_request(KVM_REQ_EVENT, vcpu);
5454
5455         return 0;
5456 }
5457
5458 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5459 {
5460         struct kvm_segment cs;
5461
5462         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5463         *db = cs.db;
5464         *l = cs.l;
5465 }
5466 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5467
5468 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5469                                   struct kvm_sregs *sregs)
5470 {
5471         struct desc_ptr dt;
5472
5473         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5474         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5475         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5476         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5477         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5478         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5479
5480         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5481         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5482
5483         kvm_x86_ops->get_idt(vcpu, &dt);
5484         sregs->idt.limit = dt.size;
5485         sregs->idt.base = dt.address;
5486         kvm_x86_ops->get_gdt(vcpu, &dt);
5487         sregs->gdt.limit = dt.size;
5488         sregs->gdt.base = dt.address;
5489
5490         sregs->cr0 = kvm_read_cr0(vcpu);
5491         sregs->cr2 = vcpu->arch.cr2;
5492         sregs->cr3 = kvm_read_cr3(vcpu);
5493         sregs->cr4 = kvm_read_cr4(vcpu);
5494         sregs->cr8 = kvm_get_cr8(vcpu);
5495         sregs->efer = vcpu->arch.efer;
5496         sregs->apic_base = kvm_get_apic_base(vcpu);
5497
5498         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5499
5500         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5501                 set_bit(vcpu->arch.interrupt.nr,
5502                         (unsigned long *)sregs->interrupt_bitmap);
5503
5504         return 0;
5505 }
5506
5507 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5508                                     struct kvm_mp_state *mp_state)
5509 {
5510         mp_state->mp_state = vcpu->arch.mp_state;
5511         return 0;
5512 }
5513
5514 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5515                                     struct kvm_mp_state *mp_state)
5516 {
5517         vcpu->arch.mp_state = mp_state->mp_state;
5518         kvm_make_request(KVM_REQ_EVENT, vcpu);
5519         return 0;
5520 }
5521
5522 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5523                     bool has_error_code, u32 error_code)
5524 {
5525         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5526         int ret;
5527
5528         init_emulate_ctxt(vcpu);
5529
5530         ret = emulator_task_switch(ctxt, tss_selector, reason,
5531                                    has_error_code, error_code);
5532
5533         if (ret)
5534                 return EMULATE_FAIL;
5535
5536         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5537         kvm_rip_write(vcpu, ctxt->eip);
5538         kvm_set_rflags(vcpu, ctxt->eflags);
5539         kvm_make_request(KVM_REQ_EVENT, vcpu);
5540         return EMULATE_DONE;
5541 }
5542 EXPORT_SYMBOL_GPL(kvm_task_switch);
5543
5544 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5545                                   struct kvm_sregs *sregs)
5546 {
5547         int mmu_reset_needed = 0;
5548         int pending_vec, max_bits, idx;
5549         struct desc_ptr dt;
5550
5551         dt.size = sregs->idt.limit;
5552         dt.address = sregs->idt.base;
5553         kvm_x86_ops->set_idt(vcpu, &dt);
5554         dt.size = sregs->gdt.limit;
5555         dt.address = sregs->gdt.base;
5556         kvm_x86_ops->set_gdt(vcpu, &dt);
5557
5558         vcpu->arch.cr2 = sregs->cr2;
5559         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5560         vcpu->arch.cr3 = sregs->cr3;
5561         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5562
5563         kvm_set_cr8(vcpu, sregs->cr8);
5564
5565         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5566         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5567         kvm_set_apic_base(vcpu, sregs->apic_base);
5568
5569         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5570         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5571         vcpu->arch.cr0 = sregs->cr0;
5572
5573         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5574         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5575         if (sregs->cr4 & X86_CR4_OSXSAVE)
5576                 kvm_update_cpuid(vcpu);
5577
5578         idx = srcu_read_lock(&vcpu->kvm->srcu);
5579         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5580                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5581                 mmu_reset_needed = 1;
5582         }
5583         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5584
5585         if (mmu_reset_needed)
5586                 kvm_mmu_reset_context(vcpu);
5587
5588         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5589         pending_vec = find_first_bit(
5590                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5591         if (pending_vec < max_bits) {
5592                 kvm_queue_interrupt(vcpu, pending_vec, false);
5593                 pr_debug("Set back pending irq %d\n", pending_vec);
5594         }
5595
5596         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5597         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5598         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5599         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5600         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5601         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5602
5603         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5604         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5605
5606         update_cr8_intercept(vcpu);
5607
5608         /* Older userspace won't unhalt the vcpu on reset. */
5609         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5610             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5611             !is_protmode(vcpu))
5612                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5613
5614         kvm_make_request(KVM_REQ_EVENT, vcpu);
5615
5616         return 0;
5617 }
5618
5619 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5620                                         struct kvm_guest_debug *dbg)
5621 {
5622         unsigned long rflags;
5623         int i, r;
5624
5625         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5626                 r = -EBUSY;
5627                 if (vcpu->arch.exception.pending)
5628                         goto out;
5629                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5630                         kvm_queue_exception(vcpu, DB_VECTOR);
5631                 else
5632                         kvm_queue_exception(vcpu, BP_VECTOR);
5633         }
5634
5635         /*
5636          * Read rflags as long as potentially injected trace flags are still
5637          * filtered out.
5638          */
5639         rflags = kvm_get_rflags(vcpu);
5640
5641         vcpu->guest_debug = dbg->control;
5642         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5643                 vcpu->guest_debug = 0;
5644
5645         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5646                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5647                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5648                 vcpu->arch.switch_db_regs =
5649                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5650         } else {
5651                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5652                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5653                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5654         }
5655
5656         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5657                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5658                         get_segment_base(vcpu, VCPU_SREG_CS);
5659
5660         /*
5661          * Trigger an rflags update that will inject or remove the trace
5662          * flags.
5663          */
5664         kvm_set_rflags(vcpu, rflags);
5665
5666         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5667
5668         r = 0;
5669
5670 out:
5671
5672         return r;
5673 }
5674
5675 /*
5676  * Translate a guest virtual address to a guest physical address.
5677  */
5678 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5679                                     struct kvm_translation *tr)
5680 {
5681         unsigned long vaddr = tr->linear_address;
5682         gpa_t gpa;
5683         int idx;
5684
5685         idx = srcu_read_lock(&vcpu->kvm->srcu);
5686         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5687         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5688         tr->physical_address = gpa;
5689         tr->valid = gpa != UNMAPPED_GVA;
5690         tr->writeable = 1;
5691         tr->usermode = 0;
5692
5693         return 0;
5694 }
5695
5696 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5697 {
5698         struct i387_fxsave_struct *fxsave =
5699                         &vcpu->arch.guest_fpu.state->fxsave;
5700
5701         memcpy(fpu->fpr, fxsave->st_space, 128);
5702         fpu->fcw = fxsave->cwd;
5703         fpu->fsw = fxsave->swd;
5704         fpu->ftwx = fxsave->twd;
5705         fpu->last_opcode = fxsave->fop;
5706         fpu->last_ip = fxsave->rip;
5707         fpu->last_dp = fxsave->rdp;
5708         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5709
5710         return 0;
5711 }
5712
5713 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5714 {
5715         struct i387_fxsave_struct *fxsave =
5716                         &vcpu->arch.guest_fpu.state->fxsave;
5717
5718         memcpy(fxsave->st_space, fpu->fpr, 128);
5719         fxsave->cwd = fpu->fcw;
5720         fxsave->swd = fpu->fsw;
5721         fxsave->twd = fpu->ftwx;
5722         fxsave->fop = fpu->last_opcode;
5723         fxsave->rip = fpu->last_ip;
5724         fxsave->rdp = fpu->last_dp;
5725         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5726
5727         return 0;
5728 }
5729
5730 int fx_init(struct kvm_vcpu *vcpu)
5731 {
5732         int err;
5733
5734         err = fpu_alloc(&vcpu->arch.guest_fpu);
5735         if (err)
5736                 return err;
5737
5738         fpu_finit(&vcpu->arch.guest_fpu);
5739
5740         /*
5741          * Ensure guest xcr0 is valid for loading
5742          */
5743         vcpu->arch.xcr0 = XSTATE_FP;
5744
5745         vcpu->arch.cr0 |= X86_CR0_ET;
5746
5747         return 0;
5748 }
5749 EXPORT_SYMBOL_GPL(fx_init);
5750
5751 static void fx_free(struct kvm_vcpu *vcpu)
5752 {
5753         fpu_free(&vcpu->arch.guest_fpu);
5754 }
5755
5756 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5757 {
5758         if (vcpu->guest_fpu_loaded)
5759                 return;
5760
5761         /*
5762          * Restore all possible states in the guest,
5763          * and assume host would use all available bits.
5764          * Guest xcr0 would be loaded later.
5765          */
5766         kvm_put_guest_xcr0(vcpu);
5767         vcpu->guest_fpu_loaded = 1;
5768         unlazy_fpu(current);
5769         fpu_restore_checking(&vcpu->arch.guest_fpu);
5770         trace_kvm_fpu(1);
5771 }
5772
5773 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5774 {
5775         kvm_put_guest_xcr0(vcpu);
5776
5777         if (!vcpu->guest_fpu_loaded)
5778                 return;
5779
5780         vcpu->guest_fpu_loaded = 0;
5781         fpu_save_init(&vcpu->arch.guest_fpu);
5782         ++vcpu->stat.fpu_reload;
5783         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5784         trace_kvm_fpu(0);
5785 }
5786
5787 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5788 {
5789         kvmclock_reset(vcpu);
5790
5791         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5792         fx_free(vcpu);
5793         kvm_x86_ops->vcpu_free(vcpu);
5794 }
5795
5796 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5797                                                 unsigned int id)
5798 {
5799         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5800                 printk_once(KERN_WARNING
5801                 "kvm: SMP vm created on host with unstable TSC; "
5802                 "guest TSC will not be reliable\n");
5803         return kvm_x86_ops->vcpu_create(kvm, id);
5804 }
5805
5806 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5807 {
5808         int r;
5809
5810         vcpu->arch.mtrr_state.have_fixed = 1;
5811         vcpu_load(vcpu);
5812         r = kvm_arch_vcpu_reset(vcpu);
5813         if (r == 0)
5814                 r = kvm_mmu_setup(vcpu);
5815         vcpu_put(vcpu);
5816
5817         return r;
5818 }
5819
5820 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5821 {
5822         vcpu->arch.apf.msr_val = 0;
5823
5824         vcpu_load(vcpu);
5825         kvm_mmu_unload(vcpu);
5826         vcpu_put(vcpu);
5827
5828         fx_free(vcpu);
5829         kvm_x86_ops->vcpu_free(vcpu);
5830 }
5831
5832 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5833 {
5834         atomic_set(&vcpu->arch.nmi_queued, 0);
5835         vcpu->arch.nmi_pending = 0;
5836         vcpu->arch.nmi_injected = false;
5837
5838         vcpu->arch.switch_db_regs = 0;
5839         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5840         vcpu->arch.dr6 = DR6_FIXED_1;
5841         vcpu->arch.dr7 = DR7_FIXED_1;
5842
5843         kvm_make_request(KVM_REQ_EVENT, vcpu);
5844         vcpu->arch.apf.msr_val = 0;
5845         vcpu->arch.st.msr_val = 0;
5846
5847         kvmclock_reset(vcpu);
5848
5849         kvm_clear_async_pf_completion_queue(vcpu);
5850         kvm_async_pf_hash_reset(vcpu);
5851         vcpu->arch.apf.halted = false;
5852
5853         kvm_pmu_reset(vcpu);
5854
5855         return kvm_x86_ops->vcpu_reset(vcpu);
5856 }
5857
5858 int kvm_arch_hardware_enable(void *garbage)
5859 {
5860         struct kvm *kvm;
5861         struct kvm_vcpu *vcpu;
5862         int i;
5863
5864         kvm_shared_msr_cpu_online();
5865         list_for_each_entry(kvm, &vm_list, vm_list)
5866                 kvm_for_each_vcpu(i, vcpu, kvm)
5867                         if (vcpu->cpu == smp_processor_id())
5868                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5869         return kvm_x86_ops->hardware_enable(garbage);
5870 }
5871
5872 void kvm_arch_hardware_disable(void *garbage)
5873 {
5874         kvm_x86_ops->hardware_disable(garbage);
5875         drop_user_return_notifiers(garbage);
5876 }
5877
5878 int kvm_arch_hardware_setup(void)
5879 {
5880         return kvm_x86_ops->hardware_setup();
5881 }
5882
5883 void kvm_arch_hardware_unsetup(void)
5884 {
5885         kvm_x86_ops->hardware_unsetup();
5886 }
5887
5888 void kvm_arch_check_processor_compat(void *rtn)
5889 {
5890         kvm_x86_ops->check_processor_compatibility(rtn);
5891 }
5892
5893 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5894 {
5895         struct page *page;
5896         struct kvm *kvm;
5897         int r;
5898
5899         BUG_ON(vcpu->kvm == NULL);
5900         kvm = vcpu->kvm;
5901
5902         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5903         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5904                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5905         else
5906                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5907
5908         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5909         if (!page) {
5910                 r = -ENOMEM;
5911                 goto fail;
5912         }
5913         vcpu->arch.pio_data = page_address(page);
5914
5915         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
5916
5917         r = kvm_mmu_create(vcpu);
5918         if (r < 0)
5919                 goto fail_free_pio_data;
5920
5921         if (irqchip_in_kernel(kvm)) {
5922                 r = kvm_create_lapic(vcpu);
5923                 if (r < 0)
5924                         goto fail_mmu_destroy;
5925         }
5926
5927         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5928                                        GFP_KERNEL);
5929         if (!vcpu->arch.mce_banks) {
5930                 r = -ENOMEM;
5931                 goto fail_free_lapic;
5932         }
5933         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5934
5935         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5936                 goto fail_free_mce_banks;
5937
5938         kvm_async_pf_hash_reset(vcpu);
5939         kvm_pmu_init(vcpu);
5940
5941         return 0;
5942 fail_free_mce_banks:
5943         kfree(vcpu->arch.mce_banks);
5944 fail_free_lapic:
5945         kvm_free_lapic(vcpu);
5946 fail_mmu_destroy:
5947         kvm_mmu_destroy(vcpu);
5948 fail_free_pio_data:
5949         free_page((unsigned long)vcpu->arch.pio_data);
5950 fail:
5951         return r;
5952 }
5953
5954 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5955 {
5956         int idx;
5957
5958         kvm_pmu_destroy(vcpu);
5959         kfree(vcpu->arch.mce_banks);
5960         kvm_free_lapic(vcpu);
5961         idx = srcu_read_lock(&vcpu->kvm->srcu);
5962         kvm_mmu_destroy(vcpu);
5963         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5964         free_page((unsigned long)vcpu->arch.pio_data);
5965 }
5966
5967 int kvm_arch_init_vm(struct kvm *kvm)
5968 {
5969         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5970         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5971
5972         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5973         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5974
5975         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
5976
5977         return 0;
5978 }
5979
5980 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5981 {
5982         vcpu_load(vcpu);
5983         kvm_mmu_unload(vcpu);
5984         vcpu_put(vcpu);
5985 }
5986
5987 static void kvm_free_vcpus(struct kvm *kvm)
5988 {
5989         unsigned int i;
5990         struct kvm_vcpu *vcpu;
5991
5992         /*
5993          * Unpin any mmu pages first.
5994          */
5995         kvm_for_each_vcpu(i, vcpu, kvm) {
5996                 kvm_clear_async_pf_completion_queue(vcpu);
5997                 kvm_unload_vcpu_mmu(vcpu);
5998         }
5999         kvm_for_each_vcpu(i, vcpu, kvm)
6000                 kvm_arch_vcpu_free(vcpu);
6001
6002         mutex_lock(&kvm->lock);
6003         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6004                 kvm->vcpus[i] = NULL;
6005
6006         atomic_set(&kvm->online_vcpus, 0);
6007         mutex_unlock(&kvm->lock);
6008 }
6009
6010 void kvm_arch_sync_events(struct kvm *kvm)
6011 {
6012         kvm_free_all_assigned_devices(kvm);
6013         kvm_free_pit(kvm);
6014 }
6015
6016 void kvm_arch_destroy_vm(struct kvm *kvm)
6017 {
6018         kvm_iommu_unmap_guest(kvm);
6019         kfree(kvm->arch.vpic);
6020         kfree(kvm->arch.vioapic);
6021         kvm_free_vcpus(kvm);
6022         if (kvm->arch.apic_access_page)
6023                 put_page(kvm->arch.apic_access_page);
6024         if (kvm->arch.ept_identity_pagetable)
6025                 put_page(kvm->arch.ept_identity_pagetable);
6026 }
6027
6028 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6029                                 struct kvm_memory_slot *memslot,
6030                                 struct kvm_memory_slot old,
6031                                 struct kvm_userspace_memory_region *mem,
6032                                 int user_alloc)
6033 {
6034         int npages = memslot->npages;
6035         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6036
6037         /* Prevent internal slot pages from being moved by fork()/COW. */
6038         if (memslot->id >= KVM_MEMORY_SLOTS)
6039                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6040
6041         /*To keep backward compatibility with older userspace,
6042          *x86 needs to hanlde !user_alloc case.
6043          */
6044         if (!user_alloc) {
6045                 if (npages && !old.rmap) {
6046                         unsigned long userspace_addr;
6047
6048                         down_write(&current->mm->mmap_sem);
6049                         userspace_addr = do_mmap(NULL, 0,
6050                                                  npages * PAGE_SIZE,
6051                                                  PROT_READ | PROT_WRITE,
6052                                                  map_flags,
6053                                                  0);
6054                         up_write(&current->mm->mmap_sem);
6055
6056                         if (IS_ERR((void *)userspace_addr))
6057                                 return PTR_ERR((void *)userspace_addr);
6058
6059                         memslot->userspace_addr = userspace_addr;
6060                 }
6061         }
6062
6063
6064         return 0;
6065 }
6066
6067 void kvm_arch_commit_memory_region(struct kvm *kvm,
6068                                 struct kvm_userspace_memory_region *mem,
6069                                 struct kvm_memory_slot old,
6070                                 int user_alloc)
6071 {
6072
6073         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6074
6075         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6076                 int ret;
6077
6078                 down_write(&current->mm->mmap_sem);
6079                 ret = do_munmap(current->mm, old.userspace_addr,
6080                                 old.npages * PAGE_SIZE);
6081                 up_write(&current->mm->mmap_sem);
6082                 if (ret < 0)
6083                         printk(KERN_WARNING
6084                                "kvm_vm_ioctl_set_memory_region: "
6085                                "failed to munmap memory\n");
6086         }
6087
6088         if (!kvm->arch.n_requested_mmu_pages)
6089                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6090
6091         spin_lock(&kvm->mmu_lock);
6092         if (nr_mmu_pages)
6093                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6094         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6095         spin_unlock(&kvm->mmu_lock);
6096 }
6097
6098 void kvm_arch_flush_shadow(struct kvm *kvm)
6099 {
6100         kvm_mmu_zap_all(kvm);
6101         kvm_reload_remote_mmus(kvm);
6102 }
6103
6104 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6105 {
6106         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6107                 !vcpu->arch.apf.halted)
6108                 || !list_empty_careful(&vcpu->async_pf.done)
6109                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6110                 || atomic_read(&vcpu->arch.nmi_queued) ||
6111                 (kvm_arch_interrupt_allowed(vcpu) &&
6112                  kvm_cpu_has_interrupt(vcpu));
6113 }
6114
6115 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6116 {
6117         int me;
6118         int cpu = vcpu->cpu;
6119
6120         if (waitqueue_active(&vcpu->wq)) {
6121                 wake_up_interruptible(&vcpu->wq);
6122                 ++vcpu->stat.halt_wakeup;
6123         }
6124
6125         me = get_cpu();
6126         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6127                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6128                         smp_send_reschedule(cpu);
6129         put_cpu();
6130 }
6131
6132 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6133 {
6134         return kvm_x86_ops->interrupt_allowed(vcpu);
6135 }
6136
6137 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6138 {
6139         unsigned long current_rip = kvm_rip_read(vcpu) +
6140                 get_segment_base(vcpu, VCPU_SREG_CS);
6141
6142         return current_rip == linear_rip;
6143 }
6144 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6145
6146 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6147 {
6148         unsigned long rflags;
6149
6150         rflags = kvm_x86_ops->get_rflags(vcpu);
6151         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6152                 rflags &= ~X86_EFLAGS_TF;
6153         return rflags;
6154 }
6155 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6156
6157 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6158 {
6159         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6160             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6161                 rflags |= X86_EFLAGS_TF;
6162         kvm_x86_ops->set_rflags(vcpu, rflags);
6163         kvm_make_request(KVM_REQ_EVENT, vcpu);
6164 }
6165 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6166
6167 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6168 {
6169         int r;
6170
6171         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6172               is_error_page(work->page))
6173                 return;
6174
6175         r = kvm_mmu_reload(vcpu);
6176         if (unlikely(r))
6177                 return;
6178
6179         if (!vcpu->arch.mmu.direct_map &&
6180               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6181                 return;
6182
6183         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6184 }
6185
6186 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6187 {
6188         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6189 }
6190
6191 static inline u32 kvm_async_pf_next_probe(u32 key)
6192 {
6193         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6194 }
6195
6196 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6197 {
6198         u32 key = kvm_async_pf_hash_fn(gfn);
6199
6200         while (vcpu->arch.apf.gfns[key] != ~0)
6201                 key = kvm_async_pf_next_probe(key);
6202
6203         vcpu->arch.apf.gfns[key] = gfn;
6204 }
6205
6206 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6207 {
6208         int i;
6209         u32 key = kvm_async_pf_hash_fn(gfn);
6210
6211         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6212                      (vcpu->arch.apf.gfns[key] != gfn &&
6213                       vcpu->arch.apf.gfns[key] != ~0); i++)
6214                 key = kvm_async_pf_next_probe(key);
6215
6216         return key;
6217 }
6218
6219 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6220 {
6221         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6222 }
6223
6224 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6225 {
6226         u32 i, j, k;
6227
6228         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6229         while (true) {
6230                 vcpu->arch.apf.gfns[i] = ~0;
6231                 do {
6232                         j = kvm_async_pf_next_probe(j);
6233                         if (vcpu->arch.apf.gfns[j] == ~0)
6234                                 return;
6235                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6236                         /*
6237                          * k lies cyclically in ]i,j]
6238                          * |    i.k.j |
6239                          * |....j i.k.| or  |.k..j i...|
6240                          */
6241                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6242                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6243                 i = j;
6244         }
6245 }
6246
6247 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6248 {
6249
6250         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6251                                       sizeof(val));
6252 }
6253
6254 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6255                                      struct kvm_async_pf *work)
6256 {
6257         struct x86_exception fault;
6258
6259         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6260         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6261
6262         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6263             (vcpu->arch.apf.send_user_only &&
6264              kvm_x86_ops->get_cpl(vcpu) == 0))
6265                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6266         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6267                 fault.vector = PF_VECTOR;
6268                 fault.error_code_valid = true;
6269                 fault.error_code = 0;
6270                 fault.nested_page_fault = false;
6271                 fault.address = work->arch.token;
6272                 kvm_inject_page_fault(vcpu, &fault);
6273         }
6274 }
6275
6276 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6277                                  struct kvm_async_pf *work)
6278 {
6279         struct x86_exception fault;
6280
6281         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6282         if (is_error_page(work->page))
6283                 work->arch.token = ~0; /* broadcast wakeup */
6284         else
6285                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6286
6287         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6288             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6289                 fault.vector = PF_VECTOR;
6290                 fault.error_code_valid = true;
6291                 fault.error_code = 0;
6292                 fault.nested_page_fault = false;
6293                 fault.address = work->arch.token;
6294                 kvm_inject_page_fault(vcpu, &fault);
6295         }
6296         vcpu->arch.apf.halted = false;
6297 }
6298
6299 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6300 {
6301         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6302                 return true;
6303         else
6304                 return !kvm_event_needs_reinjection(vcpu) &&
6305                         kvm_x86_ops->interrupt_allowed(vcpu);
6306 }
6307
6308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6309 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6310 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6311 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6312 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6313 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6314 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6315 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6316 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6317 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6318 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6319 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);