2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 static u8 parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61 spin_lock_bh(&txq->axq_lock);
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
66 spin_unlock_bh(&txq->axq_lock);
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
82 void ath9k_ps_wakeup(struct ath_softc *sc)
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
86 enum ath9k_power_mode power_mode;
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 spin_unlock(&common->cc_lock);
108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
111 void ath9k_ps_restore(struct ath_softc *sc)
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114 enum ath9k_power_mode mode;
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 if (--sc->ps_usecount != 0)
121 if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
122 mode = ATH9K_PM_FULL_SLEEP;
123 else if (sc->ps_enabled &&
124 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
126 PS_WAIT_FOR_PSPOLL_DATA |
127 PS_WAIT_FOR_TX_ACK)))
128 mode = ATH9K_PM_NETWORK_SLEEP;
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 spin_unlock(&common->cc_lock);
136 ath9k_hw_setpower(sc->sc_ah, mode);
139 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
142 void ath_start_ani(struct ath_common *common)
144 struct ath_hw *ah = common->ah;
145 unsigned long timestamp = jiffies_to_msecs(jiffies);
146 struct ath_softc *sc = (struct ath_softc *) common->priv;
148 if (!(sc->sc_flags & SC_OP_ANI_RUN))
151 if (sc->sc_flags & SC_OP_OFFCHANNEL)
154 common->ani.longcal_timer = timestamp;
155 common->ani.shortcal_timer = timestamp;
156 common->ani.checkani_timer = timestamp;
158 mod_timer(&common->ani.timer,
160 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
163 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
165 struct ath_hw *ah = sc->sc_ah;
166 struct ath9k_channel *chan = &ah->channels[channel];
167 struct survey_info *survey = &sc->survey[channel];
169 if (chan->noisefloor) {
170 survey->filled |= SURVEY_INFO_NOISE_DBM;
171 survey->noise = ath9k_hw_getchan_noise(ah, chan);
176 * Updates the survey statistics and returns the busy time since last
177 * update in %, if the measurement duration was long enough for the
178 * result to be useful, -1 otherwise.
180 static int ath_update_survey_stats(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
193 if (ah->power_mode == ATH9K_PM_AWAKE)
194 ath_hw_cycle_counters_update(common);
196 if (cc->cycles > 0) {
197 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
198 SURVEY_INFO_CHANNEL_TIME_BUSY |
199 SURVEY_INFO_CHANNEL_TIME_RX |
200 SURVEY_INFO_CHANNEL_TIME_TX;
201 survey->channel_time += cc->cycles / div;
202 survey->channel_time_busy += cc->rx_busy / div;
203 survey->channel_time_rx += cc->rx_frame / div;
204 survey->channel_time_tx += cc->tx_frame / div;
207 if (cc->cycles < div)
211 ret = cc->rx_busy * 100 / cc->cycles;
213 memset(cc, 0, sizeof(*cc));
215 ath_update_survey_nf(sc, pos);
220 static void __ath_cancel_work(struct ath_softc *sc)
222 cancel_work_sync(&sc->paprd_work);
223 cancel_work_sync(&sc->hw_check_work);
224 cancel_delayed_work_sync(&sc->tx_complete_work);
225 cancel_delayed_work_sync(&sc->hw_pll_work);
228 static void ath_cancel_work(struct ath_softc *sc)
230 __ath_cancel_work(sc);
231 cancel_work_sync(&sc->hw_reset_work);
234 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
236 struct ath_hw *ah = sc->sc_ah;
237 struct ath_common *common = ath9k_hw_common(ah);
240 ieee80211_stop_queues(sc->hw);
242 sc->hw_busy_count = 0;
243 del_timer_sync(&common->ani.timer);
245 ath9k_debug_samp_bb_mac(sc);
246 ath9k_hw_disable_interrupts(ah);
248 ret = ath_drain_all_txq(sc, retry_tx);
250 if (!ath_stoprecv(sc))
254 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
255 ath_rx_tasklet(sc, 1, true);
256 ath_rx_tasklet(sc, 1, false);
264 static bool ath_complete_reset(struct ath_softc *sc, bool start)
266 struct ath_hw *ah = sc->sc_ah;
267 struct ath_common *common = ath9k_hw_common(ah);
269 if (ath_startrecv(sc) != 0) {
270 ath_err(common, "Unable to restart recv logic\n");
274 ath9k_cmn_update_txpow(ah, sc->curtxpow,
275 sc->config.txpowlimit, &sc->curtxpow);
276 ath9k_hw_set_interrupts(ah);
277 ath9k_hw_enable_interrupts(ah);
279 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
280 if (sc->sc_flags & SC_OP_BEACONS)
283 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
284 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
285 if (!common->disable_ani)
286 ath_start_ani(common);
289 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
290 struct ath_hw_antcomb_conf div_ant_conf;
293 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
296 lna_conf = ATH_ANT_DIV_COMB_LNA1;
298 lna_conf = ATH_ANT_DIV_COMB_LNA2;
299 div_ant_conf.main_lna_conf = lna_conf;
300 div_ant_conf.alt_lna_conf = lna_conf;
302 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
305 ieee80211_wake_queues(sc->hw);
310 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
313 struct ath_hw *ah = sc->sc_ah;
314 struct ath_common *common = ath9k_hw_common(ah);
315 struct ath9k_hw_cal_data *caldata = NULL;
320 __ath_cancel_work(sc);
322 spin_lock_bh(&sc->sc_pcu_lock);
324 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
326 caldata = &sc->caldata;
335 if (!ath_prepare_reset(sc, retry_tx, flush))
338 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
339 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
341 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
344 "Unable to reset channel, reset status %d\n", r);
348 if (!ath_complete_reset(sc, true))
352 spin_unlock_bh(&sc->sc_pcu_lock);
358 * Set/change channels. If the channel is really being changed, it's done
359 * by reseting the chip. To accomplish this we must first cleanup any pending
360 * DMA, then restart stuff.
362 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
363 struct ath9k_channel *hchan)
367 if (sc->sc_flags & SC_OP_INVALID)
370 r = ath_reset_internal(sc, hchan, false);
375 static void ath_paprd_activate(struct ath_softc *sc)
377 struct ath_hw *ah = sc->sc_ah;
378 struct ath9k_hw_cal_data *caldata = ah->caldata;
381 if (!caldata || !caldata->paprd_done)
385 ar9003_paprd_enable(ah, false);
386 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
387 if (!(ah->txchainmask & BIT(chain)))
390 ar9003_paprd_populate_single_table(ah, caldata, chain);
393 ar9003_paprd_enable(ah, true);
394 ath9k_ps_restore(sc);
397 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
399 struct ieee80211_hw *hw = sc->hw;
400 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
401 struct ath_hw *ah = sc->sc_ah;
402 struct ath_common *common = ath9k_hw_common(ah);
403 struct ath_tx_control txctl;
406 memset(&txctl, 0, sizeof(txctl));
407 txctl.txq = sc->tx.txq_map[WME_AC_BE];
409 memset(tx_info, 0, sizeof(*tx_info));
410 tx_info->band = hw->conf.channel->band;
411 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
412 tx_info->control.rates[0].idx = 0;
413 tx_info->control.rates[0].count = 1;
414 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
415 tx_info->control.rates[1].idx = -1;
417 init_completion(&sc->paprd_complete);
418 txctl.paprd = BIT(chain);
420 if (ath_tx_start(hw, skb, &txctl) != 0) {
421 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
422 dev_kfree_skb_any(skb);
426 time_left = wait_for_completion_timeout(&sc->paprd_complete,
427 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
430 ath_dbg(common, CALIBRATE,
431 "Timeout waiting for paprd training on TX chain %d\n",
437 void ath_paprd_calibrate(struct work_struct *work)
439 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
440 struct ieee80211_hw *hw = sc->hw;
441 struct ath_hw *ah = sc->sc_ah;
442 struct ieee80211_hdr *hdr;
443 struct sk_buff *skb = NULL;
444 struct ath9k_hw_cal_data *caldata = ah->caldata;
445 struct ath_common *common = ath9k_hw_common(ah);
456 if (ar9003_paprd_init_table(ah) < 0)
459 skb = alloc_skb(len, GFP_KERNEL);
464 memset(skb->data, 0, len);
465 hdr = (struct ieee80211_hdr *)skb->data;
466 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
467 hdr->frame_control = cpu_to_le16(ftype);
468 hdr->duration_id = cpu_to_le16(10);
469 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
470 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
471 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
473 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
474 if (!(ah->txchainmask & BIT(chain)))
479 ath_dbg(common, CALIBRATE,
480 "Sending PAPRD frame for thermal measurement on chain %d\n",
482 if (!ath_paprd_send_frame(sc, skb, chain))
485 ar9003_paprd_setup_gain_table(ah, chain);
487 ath_dbg(common, CALIBRATE,
488 "Sending PAPRD training frame on chain %d\n", chain);
489 if (!ath_paprd_send_frame(sc, skb, chain))
492 if (!ar9003_paprd_is_done(ah)) {
493 ath_dbg(common, CALIBRATE,
494 "PAPRD not yet done on chain %d\n", chain);
498 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
499 ath_dbg(common, CALIBRATE,
500 "PAPRD create curve failed on chain %d\n",
510 caldata->paprd_done = true;
511 ath_paprd_activate(sc);
515 ath9k_ps_restore(sc);
519 * This routine performs the periodic noise floor calibration function
520 * that is used to adjust and optimize the chip performance. This
521 * takes environmental changes (location, temperature) into account.
522 * When the task is complete, it reschedules itself depending on the
523 * appropriate interval that was calculated.
525 void ath_ani_calibrate(unsigned long data)
527 struct ath_softc *sc = (struct ath_softc *)data;
528 struct ath_hw *ah = sc->sc_ah;
529 struct ath_common *common = ath9k_hw_common(ah);
530 bool longcal = false;
531 bool shortcal = false;
532 bool aniflag = false;
533 unsigned int timestamp = jiffies_to_msecs(jiffies);
534 u32 cal_interval, short_cal_interval, long_cal_interval;
537 if (ah->caldata && ah->caldata->nfcal_interference)
538 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
540 long_cal_interval = ATH_LONG_CALINTERVAL;
542 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
543 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
545 /* Only calibrate if awake */
546 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
551 /* Long calibration runs independently of short calibration. */
552 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
554 common->ani.longcal_timer = timestamp;
557 /* Short calibration applies only while caldone is false */
558 if (!common->ani.caldone) {
559 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
561 common->ani.shortcal_timer = timestamp;
562 common->ani.resetcal_timer = timestamp;
565 if ((timestamp - common->ani.resetcal_timer) >=
566 ATH_RESTART_CALINTERVAL) {
567 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
568 if (common->ani.caldone)
569 common->ani.resetcal_timer = timestamp;
573 /* Verify whether we must check ANI */
574 if (sc->sc_ah->config.enable_ani
575 && (timestamp - common->ani.checkani_timer) >=
576 ah->config.ani_poll_interval) {
578 common->ani.checkani_timer = timestamp;
581 /* Call ANI routine if necessary */
583 spin_lock_irqsave(&common->cc_lock, flags);
584 ath9k_hw_ani_monitor(ah, ah->curchan);
585 ath_update_survey_stats(sc);
586 spin_unlock_irqrestore(&common->cc_lock, flags);
589 /* Perform calibration if necessary */
590 if (longcal || shortcal) {
591 common->ani.caldone =
592 ath9k_hw_calibrate(ah, ah->curchan,
593 ah->rxchainmask, longcal);
597 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
599 longcal ? "long" : "", shortcal ? "short" : "",
600 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
602 ath9k_ps_restore(sc);
606 * Set timer interval based on previous results.
607 * The interval must be the shortest necessary to satisfy ANI,
608 * short calibration and long calibration.
610 ath9k_debug_samp_bb_mac(sc);
611 cal_interval = ATH_LONG_CALINTERVAL;
612 if (sc->sc_ah->config.enable_ani)
613 cal_interval = min(cal_interval,
614 (u32)ah->config.ani_poll_interval);
615 if (!common->ani.caldone)
616 cal_interval = min(cal_interval, (u32)short_cal_interval);
618 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
619 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
620 if (!ah->caldata->paprd_done)
621 ieee80211_queue_work(sc->hw, &sc->paprd_work);
622 else if (!ah->paprd_table_write_done)
623 ath_paprd_activate(sc);
627 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
628 struct ieee80211_vif *vif)
631 an = (struct ath_node *)sta->drv_priv;
633 #ifdef CONFIG_ATH9K_DEBUGFS
634 spin_lock(&sc->nodes_lock);
635 list_add(&an->list, &sc->nodes);
636 spin_unlock(&sc->nodes_lock);
641 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
642 ath_tx_node_init(sc, an);
643 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
644 sta->ht_cap.ampdu_factor);
645 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
649 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
651 struct ath_node *an = (struct ath_node *)sta->drv_priv;
653 #ifdef CONFIG_ATH9K_DEBUGFS
654 spin_lock(&sc->nodes_lock);
656 spin_unlock(&sc->nodes_lock);
660 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
661 ath_tx_node_cleanup(sc, an);
665 void ath9k_tasklet(unsigned long data)
667 struct ath_softc *sc = (struct ath_softc *)data;
668 struct ath_hw *ah = sc->sc_ah;
669 struct ath_common *common = ath9k_hw_common(ah);
671 u32 status = sc->intrstatus;
675 spin_lock(&sc->sc_pcu_lock);
677 if ((status & ATH9K_INT_FATAL) ||
678 (status & ATH9K_INT_BB_WATCHDOG)) {
679 #ifdef CONFIG_ATH9K_DEBUGFS
680 enum ath_reset_type type;
682 if (status & ATH9K_INT_FATAL)
683 type = RESET_TYPE_FATAL_INT;
685 type = RESET_TYPE_BB_WATCHDOG;
687 RESET_STAT_INC(sc, type);
689 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
694 * Only run the baseband hang check if beacons stop working in AP or
695 * IBSS mode, because it has a high false positive rate. For station
696 * mode it should not be necessary, since the upper layers will detect
697 * this through a beacon miss automatically and the following channel
698 * change will trigger a hardware reset anyway
700 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
701 !ath9k_hw_check_alive(ah))
702 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
704 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
706 * TSF sync does not look correct; remain awake to sync with
709 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
710 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
713 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
714 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
717 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
719 if (status & rxmask) {
720 /* Check for high priority Rx first */
721 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
722 (status & ATH9K_INT_RXHP))
723 ath_rx_tasklet(sc, 0, true);
725 ath_rx_tasklet(sc, 0, false);
728 if (status & ATH9K_INT_TX) {
729 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
730 ath_tx_edma_tasklet(sc);
735 ath9k_btcoex_handle_interrupt(sc, status);
738 /* re-enable hardware interrupt */
739 ath9k_hw_enable_interrupts(ah);
741 spin_unlock(&sc->sc_pcu_lock);
742 ath9k_ps_restore(sc);
745 irqreturn_t ath_isr(int irq, void *dev)
747 #define SCHED_INTR ( \
749 ATH9K_INT_BB_WATCHDOG | \
759 ATH9K_INT_GENTIMER | \
762 struct ath_softc *sc = dev;
763 struct ath_hw *ah = sc->sc_ah;
764 struct ath_common *common = ath9k_hw_common(ah);
765 enum ath9k_int status;
769 * The hardware is not ready/present, don't
770 * touch anything. Note this can happen early
771 * on if the IRQ is shared.
773 if (sc->sc_flags & SC_OP_INVALID)
777 /* shared irq, not for us */
779 if (!ath9k_hw_intrpend(ah))
783 * Figure out the reason(s) for the interrupt. Note
784 * that the hal returns a pseudo-ISR that may include
785 * bits we haven't explicitly enabled so we mask the
786 * value to insure we only process bits we requested.
788 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
789 status &= ah->imask; /* discard unasked-for bits */
792 * If there are no status bits set, then this interrupt was not
793 * for me (should have been caught above).
798 /* Cache the status */
799 sc->intrstatus = status;
801 if (status & SCHED_INTR)
805 * If a FATAL or RXORN interrupt is received, we have to reset the
808 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
809 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
812 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
813 (status & ATH9K_INT_BB_WATCHDOG)) {
815 spin_lock(&common->cc_lock);
816 ath_hw_cycle_counters_update(common);
817 ar9003_hw_bb_watchdog_dbg_info(ah);
818 spin_unlock(&common->cc_lock);
823 if (status & ATH9K_INT_SWBA)
824 tasklet_schedule(&sc->bcon_tasklet);
826 if (status & ATH9K_INT_TXURN)
827 ath9k_hw_updatetxtriglevel(ah, true);
829 if (status & ATH9K_INT_RXEOL) {
830 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
831 ath9k_hw_set_interrupts(ah);
834 if (status & ATH9K_INT_MIB) {
836 * Disable interrupts until we service the MIB
837 * interrupt; otherwise it will continue to
840 ath9k_hw_disable_interrupts(ah);
842 * Let the hal handle the event. We assume
843 * it will clear whatever condition caused
846 spin_lock(&common->cc_lock);
847 ath9k_hw_proc_mib_event(ah);
848 spin_unlock(&common->cc_lock);
849 ath9k_hw_enable_interrupts(ah);
852 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
853 if (status & ATH9K_INT_TIM_TIMER) {
854 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
856 /* Clear RxAbort bit so that we can
858 ath9k_setpower(sc, ATH9K_PM_AWAKE);
859 ath9k_hw_setrxabort(sc->sc_ah, 0);
860 sc->ps_flags |= PS_WAIT_FOR_BEACON;
865 ath_debug_stat_interrupt(sc, status);
868 /* turn off every interrupt */
869 ath9k_hw_disable_interrupts(ah);
870 tasklet_schedule(&sc->intr_tq);
878 static int ath_reset(struct ath_softc *sc, bool retry_tx)
884 r = ath_reset_internal(sc, NULL, retry_tx);
888 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
889 if (ATH_TXQ_SETUP(sc, i)) {
890 spin_lock_bh(&sc->tx.txq[i].axq_lock);
891 ath_txq_schedule(sc, &sc->tx.txq[i]);
892 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
897 ath9k_ps_restore(sc);
902 void ath_reset_work(struct work_struct *work)
904 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
909 void ath_hw_check(struct work_struct *work)
911 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
912 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
917 if (ath9k_hw_check_alive(sc->sc_ah))
920 spin_lock_irqsave(&common->cc_lock, flags);
921 busy = ath_update_survey_stats(sc);
922 spin_unlock_irqrestore(&common->cc_lock, flags);
924 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
925 busy, sc->hw_busy_count + 1);
927 if (++sc->hw_busy_count >= 3) {
928 RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
929 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
932 } else if (busy >= 0)
933 sc->hw_busy_count = 0;
936 ath9k_ps_restore(sc);
939 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
942 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
944 if (pll_sqsum >= 0x40000) {
947 /* Rx is hung for more than 500ms. Reset it */
948 ath_dbg(common, RESET, "Possible RX hang, resetting\n");
949 RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
950 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
957 void ath_hw_pll_work(struct work_struct *work)
959 struct ath_softc *sc = container_of(work, struct ath_softc,
963 if (AR_SREV_9485(sc->sc_ah)) {
966 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
967 ath9k_ps_restore(sc);
969 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
971 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
975 /**********************/
976 /* mac80211 callbacks */
977 /**********************/
979 static int ath9k_start(struct ieee80211_hw *hw)
981 struct ath_softc *sc = hw->priv;
982 struct ath_hw *ah = sc->sc_ah;
983 struct ath_common *common = ath9k_hw_common(ah);
984 struct ieee80211_channel *curchan = hw->conf.channel;
985 struct ath9k_channel *init_channel;
988 ath_dbg(common, CONFIG,
989 "Starting driver with initial channel: %d MHz\n",
990 curchan->center_freq);
993 mutex_lock(&sc->mutex);
995 init_channel = ath9k_cmn_get_curchannel(hw, ah);
997 /* Reset SERDES registers */
998 ath9k_hw_configpcipowersave(ah, false);
1001 * The basic interface to setting the hardware in a good
1002 * state is ``reset''. On return the hardware is known to
1003 * be powered up and with interrupts disabled. This must
1004 * be followed by initialization of the appropriate bits
1005 * and then setup of the interrupt mask.
1007 spin_lock_bh(&sc->sc_pcu_lock);
1009 atomic_set(&ah->intr_ref_cnt, -1);
1011 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1014 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1015 r, curchan->center_freq);
1016 spin_unlock_bh(&sc->sc_pcu_lock);
1020 /* Setup our intr mask. */
1021 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1022 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1025 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1026 ah->imask |= ATH9K_INT_RXHP |
1028 ATH9K_INT_BB_WATCHDOG;
1030 ah->imask |= ATH9K_INT_RX;
1032 ah->imask |= ATH9K_INT_GTT;
1034 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1035 ah->imask |= ATH9K_INT_CST;
1037 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
1038 ah->imask |= ATH9K_INT_MCI;
1040 sc->sc_flags &= ~SC_OP_INVALID;
1041 sc->sc_ah->is_monitoring = false;
1043 if (!ath_complete_reset(sc, false)) {
1045 spin_unlock_bh(&sc->sc_pcu_lock);
1049 if (ah->led_pin >= 0) {
1050 ath9k_hw_cfg_output(ah, ah->led_pin,
1051 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1052 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
1056 * Reset key cache to sane defaults (all entries cleared) instead of
1057 * semi-random values after suspend/resume.
1059 ath9k_cmn_init_crypto(sc->sc_ah);
1061 spin_unlock_bh(&sc->sc_pcu_lock);
1063 ath9k_start_btcoex(sc);
1065 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1066 common->bus_ops->extn_synch_en(common);
1069 mutex_unlock(&sc->mutex);
1071 ath9k_ps_restore(sc);
1076 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1078 struct ath_softc *sc = hw->priv;
1079 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1080 struct ath_tx_control txctl;
1081 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1083 if (sc->ps_enabled) {
1085 * mac80211 does not set PM field for normal data frames, so we
1086 * need to update that based on the current PS mode.
1088 if (ieee80211_is_data(hdr->frame_control) &&
1089 !ieee80211_is_nullfunc(hdr->frame_control) &&
1090 !ieee80211_has_pm(hdr->frame_control)) {
1092 "Add PM=1 for a TX frame while in PS mode\n");
1093 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1098 * Cannot tx while the hardware is in full sleep, it first needs a full
1099 * chip reset to recover from that
1101 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
1104 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1106 * We are using PS-Poll and mac80211 can request TX while in
1107 * power save mode. Need to wake up hardware for the TX to be
1108 * completed and if needed, also for RX of buffered frames.
1110 ath9k_ps_wakeup(sc);
1111 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1112 ath9k_hw_setrxabort(sc->sc_ah, 0);
1113 if (ieee80211_is_pspoll(hdr->frame_control)) {
1115 "Sending PS-Poll to pick a buffered frame\n");
1116 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1118 ath_dbg(common, PS, "Wake up to complete TX\n");
1119 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1122 * The actual restore operation will happen only after
1123 * the sc_flags bit is cleared. We are just dropping
1124 * the ps_usecount here.
1126 ath9k_ps_restore(sc);
1129 memset(&txctl, 0, sizeof(struct ath_tx_control));
1130 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1132 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
1134 if (ath_tx_start(hw, skb, &txctl) != 0) {
1135 ath_dbg(common, XMIT, "TX failed\n");
1141 dev_kfree_skb_any(skb);
1144 static void ath9k_stop(struct ieee80211_hw *hw)
1146 struct ath_softc *sc = hw->priv;
1147 struct ath_hw *ah = sc->sc_ah;
1148 struct ath_common *common = ath9k_hw_common(ah);
1151 mutex_lock(&sc->mutex);
1153 ath_cancel_work(sc);
1155 if (sc->sc_flags & SC_OP_INVALID) {
1156 ath_dbg(common, ANY, "Device not present\n");
1157 mutex_unlock(&sc->mutex);
1161 /* Ensure HW is awake when we try to shut it down. */
1162 ath9k_ps_wakeup(sc);
1164 ath9k_stop_btcoex(sc);
1166 spin_lock_bh(&sc->sc_pcu_lock);
1168 /* prevent tasklets to enable interrupts once we disable them */
1169 ah->imask &= ~ATH9K_INT_GLOBAL;
1171 /* make sure h/w will not generate any interrupt
1172 * before setting the invalid flag. */
1173 ath9k_hw_disable_interrupts(ah);
1175 spin_unlock_bh(&sc->sc_pcu_lock);
1177 /* we can now sync irq and kill any running tasklets, since we already
1178 * disabled interrupts and not holding a spin lock */
1179 synchronize_irq(sc->irq);
1180 tasklet_kill(&sc->intr_tq);
1181 tasklet_kill(&sc->bcon_tasklet);
1183 prev_idle = sc->ps_idle;
1186 spin_lock_bh(&sc->sc_pcu_lock);
1188 if (ah->led_pin >= 0) {
1189 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
1190 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
1193 ath_prepare_reset(sc, false, true);
1196 dev_kfree_skb_any(sc->rx.frag);
1201 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
1203 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
1204 ath9k_hw_phy_disable(ah);
1206 ath9k_hw_configpcipowersave(ah, true);
1208 spin_unlock_bh(&sc->sc_pcu_lock);
1210 ath9k_ps_restore(sc);
1212 sc->sc_flags |= SC_OP_INVALID;
1213 sc->ps_idle = prev_idle;
1215 mutex_unlock(&sc->mutex);
1217 ath_dbg(common, CONFIG, "Driver halt\n");
1220 bool ath9k_uses_beacons(int type)
1223 case NL80211_IFTYPE_AP:
1224 case NL80211_IFTYPE_ADHOC:
1225 case NL80211_IFTYPE_MESH_POINT:
1232 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1233 struct ieee80211_vif *vif)
1235 struct ath_vif *avp = (void *)vif->drv_priv;
1237 ath9k_set_beaconing_status(sc, false);
1238 ath_beacon_return(sc, avp);
1239 ath9k_set_beaconing_status(sc, true);
1240 sc->sc_flags &= ~SC_OP_BEACONS;
1243 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1245 struct ath9k_vif_iter_data *iter_data = data;
1248 if (iter_data->hw_macaddr)
1249 for (i = 0; i < ETH_ALEN; i++)
1250 iter_data->mask[i] &=
1251 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1253 switch (vif->type) {
1254 case NL80211_IFTYPE_AP:
1257 case NL80211_IFTYPE_STATION:
1258 iter_data->nstations++;
1260 case NL80211_IFTYPE_ADHOC:
1261 iter_data->nadhocs++;
1263 case NL80211_IFTYPE_MESH_POINT:
1264 iter_data->nmeshes++;
1266 case NL80211_IFTYPE_WDS:
1274 /* Called with sc->mutex held. */
1275 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1276 struct ieee80211_vif *vif,
1277 struct ath9k_vif_iter_data *iter_data)
1279 struct ath_softc *sc = hw->priv;
1280 struct ath_hw *ah = sc->sc_ah;
1281 struct ath_common *common = ath9k_hw_common(ah);
1284 * Use the hardware MAC address as reference, the hardware uses it
1285 * together with the BSSID mask when matching addresses.
1287 memset(iter_data, 0, sizeof(*iter_data));
1288 iter_data->hw_macaddr = common->macaddr;
1289 memset(&iter_data->mask, 0xff, ETH_ALEN);
1292 ath9k_vif_iter(iter_data, vif->addr, vif);
1294 /* Get list of all active MAC addresses */
1295 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1299 /* Called with sc->mutex held. */
1300 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1301 struct ieee80211_vif *vif)
1303 struct ath_softc *sc = hw->priv;
1304 struct ath_hw *ah = sc->sc_ah;
1305 struct ath_common *common = ath9k_hw_common(ah);
1306 struct ath9k_vif_iter_data iter_data;
1308 ath9k_calculate_iter_data(hw, vif, &iter_data);
1310 /* Set BSSID mask. */
1311 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1312 ath_hw_setbssidmask(common);
1314 /* Set op-mode & TSF */
1315 if (iter_data.naps > 0) {
1316 ath9k_hw_set_tsfadjust(ah, 1);
1317 sc->sc_flags |= SC_OP_TSF_RESET;
1318 ah->opmode = NL80211_IFTYPE_AP;
1320 ath9k_hw_set_tsfadjust(ah, 0);
1321 sc->sc_flags &= ~SC_OP_TSF_RESET;
1323 if (iter_data.nmeshes)
1324 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1325 else if (iter_data.nwds)
1326 ah->opmode = NL80211_IFTYPE_AP;
1327 else if (iter_data.nadhocs)
1328 ah->opmode = NL80211_IFTYPE_ADHOC;
1330 ah->opmode = NL80211_IFTYPE_STATION;
1334 * Enable MIB interrupts when there are hardware phy counters.
1336 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1337 if (ah->config.enable_ani)
1338 ah->imask |= ATH9K_INT_MIB;
1339 ah->imask |= ATH9K_INT_TSFOOR;
1341 ah->imask &= ~ATH9K_INT_MIB;
1342 ah->imask &= ~ATH9K_INT_TSFOOR;
1345 ath9k_hw_set_interrupts(ah);
1348 if (iter_data.naps > 0) {
1349 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1351 if (!common->disable_ani) {
1352 sc->sc_flags |= SC_OP_ANI_RUN;
1353 ath_start_ani(common);
1357 sc->sc_flags &= ~SC_OP_ANI_RUN;
1358 del_timer_sync(&common->ani.timer);
1362 /* Called with sc->mutex held, vif counts set up properly. */
1363 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1364 struct ieee80211_vif *vif)
1366 struct ath_softc *sc = hw->priv;
1368 ath9k_calculate_summary_state(hw, vif);
1370 if (ath9k_uses_beacons(vif->type)) {
1372 /* This may fail because upper levels do not have beacons
1373 * properly configured yet. That's OK, we assume it
1374 * will be properly configured and then we will be notified
1375 * in the info_changed method and set up beacons properly
1378 ath9k_set_beaconing_status(sc, false);
1379 error = ath_beacon_alloc(sc, vif);
1381 ath_beacon_config(sc, vif);
1382 ath9k_set_beaconing_status(sc, true);
1387 static int ath9k_add_interface(struct ieee80211_hw *hw,
1388 struct ieee80211_vif *vif)
1390 struct ath_softc *sc = hw->priv;
1391 struct ath_hw *ah = sc->sc_ah;
1392 struct ath_common *common = ath9k_hw_common(ah);
1395 ath9k_ps_wakeup(sc);
1396 mutex_lock(&sc->mutex);
1398 switch (vif->type) {
1399 case NL80211_IFTYPE_STATION:
1400 case NL80211_IFTYPE_WDS:
1401 case NL80211_IFTYPE_ADHOC:
1402 case NL80211_IFTYPE_AP:
1403 case NL80211_IFTYPE_MESH_POINT:
1406 ath_err(common, "Interface type %d not yet supported\n",
1412 if (ath9k_uses_beacons(vif->type)) {
1413 if (sc->nbcnvifs >= ATH_BCBUF) {
1414 ath_err(common, "Not enough beacon buffers when adding"
1415 " new interface of type: %i\n",
1422 if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1423 ((vif->type == NL80211_IFTYPE_ADHOC) &&
1425 ath_err(common, "Cannot create ADHOC interface when other"
1426 " interfaces already exist.\n");
1431 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1435 ath9k_do_vif_add_setup(hw, vif);
1437 mutex_unlock(&sc->mutex);
1438 ath9k_ps_restore(sc);
1442 static int ath9k_change_interface(struct ieee80211_hw *hw,
1443 struct ieee80211_vif *vif,
1444 enum nl80211_iftype new_type,
1447 struct ath_softc *sc = hw->priv;
1448 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1451 ath_dbg(common, CONFIG, "Change Interface\n");
1452 mutex_lock(&sc->mutex);
1453 ath9k_ps_wakeup(sc);
1455 /* See if new interface type is valid. */
1456 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1458 ath_err(common, "When using ADHOC, it must be the only"
1464 if (ath9k_uses_beacons(new_type) &&
1465 !ath9k_uses_beacons(vif->type)) {
1466 if (sc->nbcnvifs >= ATH_BCBUF) {
1467 ath_err(common, "No beacon slot available\n");
1473 /* Clean up old vif stuff */
1474 if (ath9k_uses_beacons(vif->type))
1475 ath9k_reclaim_beacon(sc, vif);
1477 /* Add new settings */
1478 vif->type = new_type;
1481 ath9k_do_vif_add_setup(hw, vif);
1483 ath9k_ps_restore(sc);
1484 mutex_unlock(&sc->mutex);
1488 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1489 struct ieee80211_vif *vif)
1491 struct ath_softc *sc = hw->priv;
1492 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1494 ath_dbg(common, CONFIG, "Detach Interface\n");
1496 ath9k_ps_wakeup(sc);
1497 mutex_lock(&sc->mutex);
1501 /* Reclaim beacon resources */
1502 if (ath9k_uses_beacons(vif->type))
1503 ath9k_reclaim_beacon(sc, vif);
1505 ath9k_calculate_summary_state(hw, NULL);
1507 mutex_unlock(&sc->mutex);
1508 ath9k_ps_restore(sc);
1511 static void ath9k_enable_ps(struct ath_softc *sc)
1513 struct ath_hw *ah = sc->sc_ah;
1515 sc->ps_enabled = true;
1516 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1517 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1518 ah->imask |= ATH9K_INT_TIM_TIMER;
1519 ath9k_hw_set_interrupts(ah);
1521 ath9k_hw_setrxabort(ah, 1);
1525 static void ath9k_disable_ps(struct ath_softc *sc)
1527 struct ath_hw *ah = sc->sc_ah;
1529 sc->ps_enabled = false;
1530 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1531 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1532 ath9k_hw_setrxabort(ah, 0);
1533 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1535 PS_WAIT_FOR_PSPOLL_DATA |
1536 PS_WAIT_FOR_TX_ACK);
1537 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1538 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1539 ath9k_hw_set_interrupts(ah);
1545 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1547 struct ath_softc *sc = hw->priv;
1548 struct ath_hw *ah = sc->sc_ah;
1549 struct ath_common *common = ath9k_hw_common(ah);
1550 struct ieee80211_conf *conf = &hw->conf;
1551 bool reset_channel = false;
1553 ath9k_ps_wakeup(sc);
1554 mutex_lock(&sc->mutex);
1556 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1557 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1559 ath_cancel_work(sc);
1562 * The chip needs a reset to properly wake up from
1565 reset_channel = ah->chip_fullsleep;
1569 * We just prepare to enable PS. We have to wait until our AP has
1570 * ACK'd our null data frame to disable RX otherwise we'll ignore
1571 * those ACKs and end up retransmitting the same null data frames.
1572 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1574 if (changed & IEEE80211_CONF_CHANGE_PS) {
1575 unsigned long flags;
1576 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1577 if (conf->flags & IEEE80211_CONF_PS)
1578 ath9k_enable_ps(sc);
1580 ath9k_disable_ps(sc);
1581 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1584 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1585 if (conf->flags & IEEE80211_CONF_MONITOR) {
1586 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1587 sc->sc_ah->is_monitoring = true;
1589 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1590 sc->sc_ah->is_monitoring = false;
1594 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1595 struct ieee80211_channel *curchan = hw->conf.channel;
1596 int pos = curchan->hw_value;
1598 unsigned long flags;
1601 old_pos = ah->curchan - &ah->channels[0];
1603 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1604 sc->sc_flags |= SC_OP_OFFCHANNEL;
1606 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1608 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
1609 curchan->center_freq, conf->channel_type);
1611 /* update survey stats for the old channel before switching */
1612 spin_lock_irqsave(&common->cc_lock, flags);
1613 ath_update_survey_stats(sc);
1614 spin_unlock_irqrestore(&common->cc_lock, flags);
1617 * Preserve the current channel values, before updating
1620 if (ah->curchan && (old_pos == pos))
1621 ath9k_hw_getnf(ah, ah->curchan);
1623 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1624 curchan, conf->channel_type);
1627 * If the operating channel changes, change the survey in-use flags
1629 * Reset the survey data for the new channel, unless we're switching
1630 * back to the operating channel from an off-channel operation.
1632 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1633 sc->cur_survey != &sc->survey[pos]) {
1636 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1638 sc->cur_survey = &sc->survey[pos];
1640 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1641 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1642 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1643 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1646 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1647 ath_err(common, "Unable to set channel\n");
1648 mutex_unlock(&sc->mutex);
1653 * The most recent snapshot of channel->noisefloor for the old
1654 * channel is only available after the hardware reset. Copy it to
1655 * the survey stats now.
1658 ath_update_survey_nf(sc, old_pos);
1661 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1662 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1663 sc->config.txpowlimit = 2 * conf->power_level;
1664 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1665 sc->config.txpowlimit, &sc->curtxpow);
1668 mutex_unlock(&sc->mutex);
1669 ath9k_ps_restore(sc);
1674 #define SUPPORTED_FILTERS \
1675 (FIF_PROMISC_IN_BSS | \
1680 FIF_BCN_PRBRESP_PROMISC | \
1684 /* FIXME: sc->sc_full_reset ? */
1685 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1686 unsigned int changed_flags,
1687 unsigned int *total_flags,
1690 struct ath_softc *sc = hw->priv;
1693 changed_flags &= SUPPORTED_FILTERS;
1694 *total_flags &= SUPPORTED_FILTERS;
1696 sc->rx.rxfilter = *total_flags;
1697 ath9k_ps_wakeup(sc);
1698 rfilt = ath_calcrxfilter(sc);
1699 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1700 ath9k_ps_restore(sc);
1702 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1706 static int ath9k_sta_add(struct ieee80211_hw *hw,
1707 struct ieee80211_vif *vif,
1708 struct ieee80211_sta *sta)
1710 struct ath_softc *sc = hw->priv;
1711 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1712 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1713 struct ieee80211_key_conf ps_key = { };
1715 ath_node_attach(sc, sta, vif);
1717 if (vif->type != NL80211_IFTYPE_AP &&
1718 vif->type != NL80211_IFTYPE_AP_VLAN)
1721 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1726 static void ath9k_del_ps_key(struct ath_softc *sc,
1727 struct ieee80211_vif *vif,
1728 struct ieee80211_sta *sta)
1730 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1731 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1732 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1737 ath_key_delete(common, &ps_key);
1740 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1741 struct ieee80211_vif *vif,
1742 struct ieee80211_sta *sta)
1744 struct ath_softc *sc = hw->priv;
1746 ath9k_del_ps_key(sc, vif, sta);
1747 ath_node_detach(sc, sta);
1752 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1753 struct ieee80211_vif *vif,
1754 enum sta_notify_cmd cmd,
1755 struct ieee80211_sta *sta)
1757 struct ath_softc *sc = hw->priv;
1758 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1760 if (!sta->ht_cap.ht_supported)
1764 case STA_NOTIFY_SLEEP:
1765 an->sleeping = true;
1766 ath_tx_aggr_sleep(sta, sc, an);
1768 case STA_NOTIFY_AWAKE:
1769 an->sleeping = false;
1770 ath_tx_aggr_wakeup(sc, an);
1775 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1776 struct ieee80211_vif *vif, u16 queue,
1777 const struct ieee80211_tx_queue_params *params)
1779 struct ath_softc *sc = hw->priv;
1780 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1781 struct ath_txq *txq;
1782 struct ath9k_tx_queue_info qi;
1785 if (queue >= WME_NUM_AC)
1788 txq = sc->tx.txq_map[queue];
1790 ath9k_ps_wakeup(sc);
1791 mutex_lock(&sc->mutex);
1793 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1795 qi.tqi_aifs = params->aifs;
1796 qi.tqi_cwmin = params->cw_min;
1797 qi.tqi_cwmax = params->cw_max;
1798 qi.tqi_burstTime = params->txop;
1800 ath_dbg(common, CONFIG,
1801 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1802 queue, txq->axq_qnum, params->aifs, params->cw_min,
1803 params->cw_max, params->txop);
1805 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1807 ath_err(common, "TXQ Update failed\n");
1809 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1810 if (queue == WME_AC_BE && !ret)
1811 ath_beaconq_config(sc);
1813 mutex_unlock(&sc->mutex);
1814 ath9k_ps_restore(sc);
1819 static int ath9k_set_key(struct ieee80211_hw *hw,
1820 enum set_key_cmd cmd,
1821 struct ieee80211_vif *vif,
1822 struct ieee80211_sta *sta,
1823 struct ieee80211_key_conf *key)
1825 struct ath_softc *sc = hw->priv;
1826 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1829 if (ath9k_modparam_nohwcrypt)
1832 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1833 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1834 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1835 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1836 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1838 * For now, disable hw crypto for the RSN IBSS group keys. This
1839 * could be optimized in the future to use a modified key cache
1840 * design to support per-STA RX GTK, but until that gets
1841 * implemented, use of software crypto for group addressed
1842 * frames is a acceptable to allow RSN IBSS to be used.
1847 mutex_lock(&sc->mutex);
1848 ath9k_ps_wakeup(sc);
1849 ath_dbg(common, CONFIG, "Set HW Key\n");
1854 ath9k_del_ps_key(sc, vif, sta);
1856 ret = ath_key_config(common, vif, sta, key);
1858 key->hw_key_idx = ret;
1859 /* push IV and Michael MIC generation to stack */
1860 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1861 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1862 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1863 if (sc->sc_ah->sw_mgmt_crypto &&
1864 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1865 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1870 ath_key_delete(common, key);
1876 ath9k_ps_restore(sc);
1877 mutex_unlock(&sc->mutex);
1881 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1883 struct ath_softc *sc = data;
1884 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1885 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1886 struct ath_vif *avp = (void *)vif->drv_priv;
1889 * Skip iteration if primary station vif's bss info
1892 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1895 if (bss_conf->assoc) {
1896 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1897 avp->primary_sta_vif = true;
1898 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1899 common->curaid = bss_conf->aid;
1900 ath9k_hw_write_associd(sc->sc_ah);
1901 ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
1902 bss_conf->aid, common->curbssid);
1903 ath_beacon_config(sc, vif);
1905 * Request a re-configuration of Beacon related timers
1906 * on the receipt of the first Beacon frame (i.e.,
1907 * after time sync with the AP).
1909 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1910 /* Reset rssi stats */
1911 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1912 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1914 if (!common->disable_ani) {
1915 sc->sc_flags |= SC_OP_ANI_RUN;
1916 ath_start_ani(common);
1922 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1924 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1925 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1926 struct ath_vif *avp = (void *)vif->drv_priv;
1928 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1931 /* Reconfigure bss info */
1932 if (avp->primary_sta_vif && !bss_conf->assoc) {
1933 ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
1934 common->curaid, common->curbssid);
1935 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
1936 avp->primary_sta_vif = false;
1937 memset(common->curbssid, 0, ETH_ALEN);
1941 ieee80211_iterate_active_interfaces_atomic(
1942 sc->hw, ath9k_bss_iter, sc);
1945 * None of station vifs are associated.
1948 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
1949 ath9k_hw_write_associd(sc->sc_ah);
1951 sc->sc_flags &= ~SC_OP_ANI_RUN;
1952 del_timer_sync(&common->ani.timer);
1953 memset(&sc->caldata, 0, sizeof(sc->caldata));
1957 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1958 struct ieee80211_vif *vif,
1959 struct ieee80211_bss_conf *bss_conf,
1962 struct ath_softc *sc = hw->priv;
1963 struct ath_hw *ah = sc->sc_ah;
1964 struct ath_common *common = ath9k_hw_common(ah);
1965 struct ath_vif *avp = (void *)vif->drv_priv;
1969 ath9k_ps_wakeup(sc);
1970 mutex_lock(&sc->mutex);
1972 if (changed & BSS_CHANGED_ASSOC) {
1973 ath9k_config_bss(sc, vif);
1975 ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
1976 common->curbssid, common->curaid);
1979 if (changed & BSS_CHANGED_IBSS) {
1980 /* There can be only one vif available */
1981 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1982 common->curaid = bss_conf->aid;
1983 ath9k_hw_write_associd(sc->sc_ah);
1985 if (bss_conf->ibss_joined) {
1986 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1988 if (!common->disable_ani) {
1989 sc->sc_flags |= SC_OP_ANI_RUN;
1990 ath_start_ani(common);
1994 sc->sc_flags &= ~SC_OP_ANI_RUN;
1995 del_timer_sync(&common->ani.timer);
1999 /* Enable transmission of beacons (AP, IBSS, MESH) */
2000 if ((changed & BSS_CHANGED_BEACON) ||
2001 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2002 ath9k_set_beaconing_status(sc, false);
2003 error = ath_beacon_alloc(sc, vif);
2005 ath_beacon_config(sc, vif);
2006 ath9k_set_beaconing_status(sc, true);
2009 if (changed & BSS_CHANGED_ERP_SLOT) {
2010 if (bss_conf->use_short_slot)
2014 if (vif->type == NL80211_IFTYPE_AP) {
2016 * Defer update, so that connected stations can adjust
2017 * their settings at the same time.
2018 * See beacon.c for more details
2020 sc->beacon.slottime = slottime;
2021 sc->beacon.updateslot = UPDATE;
2023 ah->slottime = slottime;
2024 ath9k_hw_init_global_settings(ah);
2028 /* Disable transmission of beacons */
2029 if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2030 !bss_conf->enable_beacon) {
2031 ath9k_set_beaconing_status(sc, false);
2032 avp->is_bslot_active = false;
2033 ath9k_set_beaconing_status(sc, true);
2036 if (changed & BSS_CHANGED_BEACON_INT) {
2038 * In case of AP mode, the HW TSF has to be reset
2039 * when the beacon interval changes.
2041 if (vif->type == NL80211_IFTYPE_AP) {
2042 sc->sc_flags |= SC_OP_TSF_RESET;
2043 ath9k_set_beaconing_status(sc, false);
2044 error = ath_beacon_alloc(sc, vif);
2046 ath_beacon_config(sc, vif);
2047 ath9k_set_beaconing_status(sc, true);
2049 ath_beacon_config(sc, vif);
2052 mutex_unlock(&sc->mutex);
2053 ath9k_ps_restore(sc);
2056 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2058 struct ath_softc *sc = hw->priv;
2061 mutex_lock(&sc->mutex);
2062 ath9k_ps_wakeup(sc);
2063 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2064 ath9k_ps_restore(sc);
2065 mutex_unlock(&sc->mutex);
2070 static void ath9k_set_tsf(struct ieee80211_hw *hw,
2071 struct ieee80211_vif *vif,
2074 struct ath_softc *sc = hw->priv;
2076 mutex_lock(&sc->mutex);
2077 ath9k_ps_wakeup(sc);
2078 ath9k_hw_settsf64(sc->sc_ah, tsf);
2079 ath9k_ps_restore(sc);
2080 mutex_unlock(&sc->mutex);
2083 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2085 struct ath_softc *sc = hw->priv;
2087 mutex_lock(&sc->mutex);
2089 ath9k_ps_wakeup(sc);
2090 ath9k_hw_reset_tsf(sc->sc_ah);
2091 ath9k_ps_restore(sc);
2093 mutex_unlock(&sc->mutex);
2096 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2097 struct ieee80211_vif *vif,
2098 enum ieee80211_ampdu_mlme_action action,
2099 struct ieee80211_sta *sta,
2100 u16 tid, u16 *ssn, u8 buf_size)
2102 struct ath_softc *sc = hw->priv;
2108 case IEEE80211_AMPDU_RX_START:
2110 case IEEE80211_AMPDU_RX_STOP:
2112 case IEEE80211_AMPDU_TX_START:
2113 ath9k_ps_wakeup(sc);
2114 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2116 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2117 ath9k_ps_restore(sc);
2119 case IEEE80211_AMPDU_TX_STOP:
2120 ath9k_ps_wakeup(sc);
2121 ath_tx_aggr_stop(sc, sta, tid);
2122 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2123 ath9k_ps_restore(sc);
2125 case IEEE80211_AMPDU_TX_OPERATIONAL:
2126 ath9k_ps_wakeup(sc);
2127 ath_tx_aggr_resume(sc, sta, tid);
2128 ath9k_ps_restore(sc);
2131 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2139 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2140 struct survey_info *survey)
2142 struct ath_softc *sc = hw->priv;
2143 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2144 struct ieee80211_supported_band *sband;
2145 struct ieee80211_channel *chan;
2146 unsigned long flags;
2149 spin_lock_irqsave(&common->cc_lock, flags);
2151 ath_update_survey_stats(sc);
2153 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2154 if (sband && idx >= sband->n_channels) {
2155 idx -= sband->n_channels;
2160 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2162 if (!sband || idx >= sband->n_channels) {
2163 spin_unlock_irqrestore(&common->cc_lock, flags);
2167 chan = &sband->channels[idx];
2168 pos = chan->hw_value;
2169 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2170 survey->channel = chan;
2171 spin_unlock_irqrestore(&common->cc_lock, flags);
2176 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2178 struct ath_softc *sc = hw->priv;
2179 struct ath_hw *ah = sc->sc_ah;
2181 mutex_lock(&sc->mutex);
2182 ah->coverage_class = coverage_class;
2184 ath9k_ps_wakeup(sc);
2185 ath9k_hw_init_global_settings(ah);
2186 ath9k_ps_restore(sc);
2188 mutex_unlock(&sc->mutex);
2191 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2193 struct ath_softc *sc = hw->priv;
2194 struct ath_hw *ah = sc->sc_ah;
2195 struct ath_common *common = ath9k_hw_common(ah);
2196 int timeout = 200; /* ms */
2200 mutex_lock(&sc->mutex);
2201 cancel_delayed_work_sync(&sc->tx_complete_work);
2203 if (ah->ah_flags & AH_UNPLUGGED) {
2204 ath_dbg(common, ANY, "Device has been unplugged!\n");
2205 mutex_unlock(&sc->mutex);
2209 if (sc->sc_flags & SC_OP_INVALID) {
2210 ath_dbg(common, ANY, "Device not present\n");
2211 mutex_unlock(&sc->mutex);
2215 for (j = 0; j < timeout; j++) {
2219 usleep_range(1000, 2000);
2221 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2222 if (!ATH_TXQ_SETUP(sc, i))
2225 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2236 ath9k_ps_wakeup(sc);
2237 spin_lock_bh(&sc->sc_pcu_lock);
2238 drain_txq = ath_drain_all_txq(sc, false);
2239 spin_unlock_bh(&sc->sc_pcu_lock);
2242 ath_reset(sc, false);
2244 ath9k_ps_restore(sc);
2245 ieee80211_wake_queues(hw);
2248 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2249 mutex_unlock(&sc->mutex);
2252 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2254 struct ath_softc *sc = hw->priv;
2257 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2258 if (!ATH_TXQ_SETUP(sc, i))
2261 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2267 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2269 struct ath_softc *sc = hw->priv;
2270 struct ath_hw *ah = sc->sc_ah;
2271 struct ieee80211_vif *vif;
2272 struct ath_vif *avp;
2274 struct ath_tx_status ts;
2275 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2278 vif = sc->beacon.bslot[0];
2282 avp = (void *)vif->drv_priv;
2283 if (!avp->is_bslot_active)
2286 if (!sc->beacon.tx_processed && !edma) {
2287 tasklet_disable(&sc->bcon_tasklet);
2290 if (!bf || !bf->bf_mpdu)
2293 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2294 if (status == -EINPROGRESS)
2297 sc->beacon.tx_processed = true;
2298 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2301 tasklet_enable(&sc->bcon_tasklet);
2304 return sc->beacon.tx_last;
2307 static int ath9k_get_stats(struct ieee80211_hw *hw,
2308 struct ieee80211_low_level_stats *stats)
2310 struct ath_softc *sc = hw->priv;
2311 struct ath_hw *ah = sc->sc_ah;
2312 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2314 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2315 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2316 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2317 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2321 static u32 fill_chainmask(u32 cap, u32 new)
2326 for (i = 0; cap && new; i++, cap >>= 1) {
2327 if (!(cap & BIT(0)))
2339 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2341 struct ath_softc *sc = hw->priv;
2342 struct ath_hw *ah = sc->sc_ah;
2344 if (!rx_ant || !tx_ant)
2347 sc->ant_rx = rx_ant;
2348 sc->ant_tx = tx_ant;
2350 if (ah->caps.rx_chainmask == 1)
2353 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2354 if (AR_SREV_9100(ah))
2355 ah->rxchainmask = 0x7;
2357 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2359 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2360 ath9k_reload_chainmask_settings(sc);
2365 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2367 struct ath_softc *sc = hw->priv;
2369 *tx_ant = sc->ant_tx;
2370 *rx_ant = sc->ant_rx;
2374 struct ieee80211_ops ath9k_ops = {
2376 .start = ath9k_start,
2378 .add_interface = ath9k_add_interface,
2379 .change_interface = ath9k_change_interface,
2380 .remove_interface = ath9k_remove_interface,
2381 .config = ath9k_config,
2382 .configure_filter = ath9k_configure_filter,
2383 .sta_add = ath9k_sta_add,
2384 .sta_remove = ath9k_sta_remove,
2385 .sta_notify = ath9k_sta_notify,
2386 .conf_tx = ath9k_conf_tx,
2387 .bss_info_changed = ath9k_bss_info_changed,
2388 .set_key = ath9k_set_key,
2389 .get_tsf = ath9k_get_tsf,
2390 .set_tsf = ath9k_set_tsf,
2391 .reset_tsf = ath9k_reset_tsf,
2392 .ampdu_action = ath9k_ampdu_action,
2393 .get_survey = ath9k_get_survey,
2394 .rfkill_poll = ath9k_rfkill_poll_state,
2395 .set_coverage_class = ath9k_set_coverage_class,
2396 .flush = ath9k_flush,
2397 .tx_frames_pending = ath9k_tx_frames_pending,
2398 .tx_last_beacon = ath9k_tx_last_beacon,
2399 .get_stats = ath9k_get_stats,
2400 .set_antenna = ath9k_set_antenna,
2401 .get_antenna = ath9k_get_antenna,