2 * Aic94xx SAS/SATA driver hardware interface.
4 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
5 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
7 * This file is licensed under GPLv2.
9 * This file is part of the aic94xx driver.
11 * The aic94xx driver is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; version 2 of the
16 * The aic94xx driver is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with the aic94xx driver; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
25 * $Id: //depot/aic94xx/aic94xx_hwi.c#107 $
28 #include <linux/pci.h>
29 #include <linux/delay.h>
30 #include <linux/module.h>
32 #include <scsi/sas/sas_task.h>
35 #include "aic94xx_reg.h"
36 #include "aic94xx_hwi.h"
37 #include "aic94xx_seq.h"
38 #include "aic94xx_dump.h"
42 /* ---------- Initialization ---------- */
44 static void asd_get_user_sas_addr(struct asd_ha_struct *asd_ha)
46 extern char sas_addr_str[];
47 /* If the user has specified a WWN it overrides other settings
49 if (sas_addr_str[0] != '\0')
50 asd_destringify_sas_addr(asd_ha->hw_prof.sas_addr,
52 else if (asd_ha->hw_prof.sas_addr[0] != 0)
53 asd_stringify_sas_addr(sas_addr_str, asd_ha->hw_prof.sas_addr);
56 static void asd_propagate_sas_addr(struct asd_ha_struct *asd_ha)
60 for (i = 0; i < ASD_MAX_PHYS; i++) {
61 if (asd_ha->hw_prof.phy_desc[i].sas_addr[0] == 0)
63 /* Set a phy's address only if it has none.
65 ASD_DPRINTK("setting phy%d addr to %llx\n", i,
66 SAS_ADDR(asd_ha->hw_prof.sas_addr));
67 memcpy(asd_ha->hw_prof.phy_desc[i].sas_addr,
68 asd_ha->hw_prof.sas_addr, SAS_ADDR_SIZE);
72 /* ---------- PHY initialization ---------- */
74 static void asd_init_phy_identify(struct asd_phy *phy)
76 phy->identify_frame = phy->id_frm_tok->vaddr;
78 memset(phy->identify_frame, 0, sizeof(*phy->identify_frame));
80 phy->identify_frame->dev_type = SAS_END_DEV;
81 if (phy->sas_phy.role & PHY_ROLE_INITIATOR)
82 phy->identify_frame->initiator_bits = phy->sas_phy.iproto;
83 if (phy->sas_phy.role & PHY_ROLE_TARGET)
84 phy->identify_frame->target_bits = phy->sas_phy.tproto;
85 memcpy(phy->identify_frame->sas_addr, phy->phy_desc->sas_addr,
87 phy->identify_frame->phy_id = phy->sas_phy.id;
90 static int asd_init_phy(struct asd_phy *phy)
92 struct asd_ha_struct *asd_ha = phy->sas_phy.ha->lldd_ha;
93 struct asd_sas_phy *sas_phy = &phy->sas_phy;
97 sas_phy->iproto = SAS_PROTO_ALL;
99 sas_phy->type = PHY_TYPE_PHYSICAL;
100 sas_phy->role = PHY_ROLE_INITIATOR;
101 sas_phy->oob_mode = OOB_NOT_CONNECTED;
102 sas_phy->linkrate = PHY_LINKRATE_NONE;
104 phy->id_frm_tok = asd_alloc_coherent(asd_ha,
105 sizeof(*phy->identify_frame),
107 if (!phy->id_frm_tok) {
108 asd_printk("no mem for IDENTIFY for phy%d\n", sas_phy->id);
111 asd_init_phy_identify(phy);
113 memset(phy->frame_rcvd, 0, sizeof(phy->frame_rcvd));
118 static int asd_init_phys(struct asd_ha_struct *asd_ha)
121 u8 phy_mask = asd_ha->hw_prof.enabled_phys;
123 for (i = 0; i < ASD_MAX_PHYS; i++) {
124 struct asd_phy *phy = &asd_ha->phys[i];
126 phy->phy_desc = &asd_ha->hw_prof.phy_desc[i];
128 phy->sas_phy.enabled = 0;
130 phy->sas_phy.sas_addr = &phy->phy_desc->sas_addr[0];
131 phy->sas_phy.frame_rcvd = &phy->frame_rcvd[0];
132 phy->sas_phy.ha = &asd_ha->sas_ha;
133 phy->sas_phy.lldd_phy = phy;
136 /* Now enable and initialize only the enabled phys. */
137 for_each_phy(phy_mask, phy_mask, i) {
138 int err = asd_init_phy(&asd_ha->phys[i]);
146 /* ---------- Sliding windows ---------- */
148 static int asd_init_sw(struct asd_ha_struct *asd_ha)
150 struct pci_dev *pcidev = asd_ha->pcidev;
155 err = pci_read_config_dword(pcidev, PCI_CONF_MBAR_KEY, &v);
157 asd_printk("couldn't access conf. space of %s\n",
162 err = pci_write_config_dword(pcidev, PCI_CONF_MBAR_KEY, v);
164 asd_printk("couldn't write to MBAR_KEY of %s\n",
169 /* Set sliding windows A, B and C to point to proper internal
172 pci_write_config_dword(pcidev, PCI_CONF_MBAR0_SWA, REG_BASE_ADDR);
173 pci_write_config_dword(pcidev, PCI_CONF_MBAR0_SWB,
174 REG_BASE_ADDR_CSEQCIO);
175 pci_write_config_dword(pcidev, PCI_CONF_MBAR0_SWC, REG_BASE_ADDR_EXSI);
176 asd_ha->io_handle[0].swa_base = REG_BASE_ADDR;
177 asd_ha->io_handle[0].swb_base = REG_BASE_ADDR_CSEQCIO;
178 asd_ha->io_handle[0].swc_base = REG_BASE_ADDR_EXSI;
179 MBAR0_SWB_SIZE = asd_ha->io_handle[0].len - 0x80;
180 if (!asd_ha->iospace) {
181 /* MBAR1 will point to OCM (On Chip Memory) */
182 pci_write_config_dword(pcidev, PCI_CONF_MBAR1, OCM_BASE_ADDR);
183 asd_ha->io_handle[1].swa_base = OCM_BASE_ADDR;
185 spin_lock_init(&asd_ha->iolock);
190 /* ---------- SCB initialization ---------- */
193 * asd_init_scbs - manually allocate the first SCB.
194 * @asd_ha: pointer to host adapter structure
196 * This allocates the very first SCB which would be sent to the
197 * sequencer for execution. Its bus address is written to
198 * CSEQ_Q_NEW_POINTER, mode page 2, mode 8. Since the bus address of
199 * the _next_ scb to be DMA-ed to the host adapter is read from the last
200 * SCB DMA-ed to the host adapter, we have to always stay one step
201 * ahead of the sequencer and keep one SCB already allocated.
203 static int asd_init_scbs(struct asd_ha_struct *asd_ha)
205 struct asd_seq_data *seq = &asd_ha->seq;
208 /* allocate the index array and bitmap */
209 asd_ha->seq.tc_index_bitmap_bits = asd_ha->hw_prof.max_scbs;
210 asd_ha->seq.tc_index_array = kzalloc(asd_ha->seq.tc_index_bitmap_bits*
211 sizeof(void *), GFP_KERNEL);
212 if (!asd_ha->seq.tc_index_array)
215 bitmap_bytes = (asd_ha->seq.tc_index_bitmap_bits+7)/8;
216 bitmap_bytes = BITS_TO_LONGS(bitmap_bytes*8)*sizeof(unsigned long);
217 asd_ha->seq.tc_index_bitmap = kzalloc(bitmap_bytes, GFP_KERNEL);
218 if (!asd_ha->seq.tc_index_bitmap)
221 spin_lock_init(&seq->tc_index_lock);
223 seq->next_scb.size = sizeof(struct scb);
224 seq->next_scb.vaddr = dma_pool_alloc(asd_ha->scb_pool, GFP_KERNEL,
225 &seq->next_scb.dma_handle);
226 if (!seq->next_scb.vaddr) {
227 kfree(asd_ha->seq.tc_index_bitmap);
228 kfree(asd_ha->seq.tc_index_array);
229 asd_ha->seq.tc_index_bitmap = NULL;
230 asd_ha->seq.tc_index_array = NULL;
235 spin_lock_init(&seq->pend_q_lock);
236 INIT_LIST_HEAD(&seq->pend_q);
241 static inline void asd_get_max_scb_ddb(struct asd_ha_struct *asd_ha)
243 asd_ha->hw_prof.max_scbs = asd_get_cmdctx_size(asd_ha)/ASD_SCB_SIZE;
244 asd_ha->hw_prof.max_ddbs = asd_get_devctx_size(asd_ha)/ASD_DDB_SIZE;
245 ASD_DPRINTK("max_scbs:%d, max_ddbs:%d\n",
246 asd_ha->hw_prof.max_scbs,
247 asd_ha->hw_prof.max_ddbs);
250 /* ---------- Done List initialization ---------- */
252 static void asd_dl_tasklet_handler(unsigned long);
254 static int asd_init_dl(struct asd_ha_struct *asd_ha)
256 asd_ha->seq.actual_dl
257 = asd_alloc_coherent(asd_ha,
258 ASD_DL_SIZE * sizeof(struct done_list_struct),
260 if (!asd_ha->seq.actual_dl)
262 asd_ha->seq.dl = asd_ha->seq.actual_dl->vaddr;
263 asd_ha->seq.dl_toggle = ASD_DEF_DL_TOGGLE;
264 asd_ha->seq.dl_next = 0;
265 tasklet_init(&asd_ha->seq.dl_tasklet, asd_dl_tasklet_handler,
266 (unsigned long) asd_ha);
271 /* ---------- EDB and ESCB init ---------- */
273 static int asd_alloc_edbs(struct asd_ha_struct *asd_ha, unsigned int gfp_flags)
275 struct asd_seq_data *seq = &asd_ha->seq;
278 seq->edb_arr = kmalloc(seq->num_edbs*sizeof(*seq->edb_arr), gfp_flags);
282 for (i = 0; i < seq->num_edbs; i++) {
283 seq->edb_arr[i] = asd_alloc_coherent(asd_ha, ASD_EDB_SIZE,
285 if (!seq->edb_arr[i])
287 memset(seq->edb_arr[i]->vaddr, 0, ASD_EDB_SIZE);
290 ASD_DPRINTK("num_edbs:%d\n", seq->num_edbs);
295 for (i-- ; i >= 0; i--)
296 asd_free_coherent(asd_ha, seq->edb_arr[i]);
303 static int asd_alloc_escbs(struct asd_ha_struct *asd_ha,
304 unsigned int gfp_flags)
306 struct asd_seq_data *seq = &asd_ha->seq;
307 struct asd_ascb *escb;
310 seq->escb_arr = kmalloc(seq->num_escbs*sizeof(*seq->escb_arr),
315 escbs = seq->num_escbs;
316 escb = asd_ascb_alloc_list(asd_ha, &escbs, gfp_flags);
318 asd_printk("couldn't allocate list of escbs\n");
321 seq->num_escbs -= escbs; /* subtract what was not allocated */
322 ASD_DPRINTK("num_escbs:%d\n", seq->num_escbs);
324 for (i = 0; i < seq->num_escbs; i++, escb = list_entry(escb->list.next,
327 seq->escb_arr[i] = escb;
328 escb->scb->header.opcode = EMPTY_SCB;
333 kfree(seq->escb_arr);
334 seq->escb_arr = NULL;
339 static void asd_assign_edbs2escbs(struct asd_ha_struct *asd_ha)
341 struct asd_seq_data *seq = &asd_ha->seq;
344 for (i = 0; i < seq->num_escbs; i++) {
345 struct asd_ascb *ascb = seq->escb_arr[i];
346 struct empty_scb *escb = &ascb->scb->escb;
350 escb->num_valid = ASD_EDBS_PER_SCB;
352 for (k = 0; k < ASD_EDBS_PER_SCB; k++) {
353 struct sg_el *eb = &escb->eb[k];
354 struct asd_dma_tok *edb = seq->edb_arr[z++];
356 memset(eb, 0, sizeof(*eb));
357 eb->bus_addr = cpu_to_le64(((u64) edb->dma_handle));
358 eb->size = cpu_to_le32(((u32) edb->size));
364 * asd_init_escbs -- allocate and initialize empty scbs
365 * @asd_ha: pointer to host adapter structure
367 * An empty SCB has sg_elements of ASD_EDBS_PER_SCB (7) buffers.
368 * They transport sense data, etc.
370 static int asd_init_escbs(struct asd_ha_struct *asd_ha)
372 struct asd_seq_data *seq = &asd_ha->seq;
375 /* Allocate two empty data buffers (edb) per sequencer. */
376 int edbs = 2*(1+asd_ha->hw_prof.num_phys);
378 seq->num_escbs = (edbs+ASD_EDBS_PER_SCB-1)/ASD_EDBS_PER_SCB;
379 seq->num_edbs = seq->num_escbs * ASD_EDBS_PER_SCB;
381 err = asd_alloc_edbs(asd_ha, GFP_KERNEL);
383 asd_printk("couldn't allocate edbs\n");
387 err = asd_alloc_escbs(asd_ha, GFP_KERNEL);
389 asd_printk("couldn't allocate escbs\n");
393 asd_assign_edbs2escbs(asd_ha);
394 /* In order to insure that normal SCBs do not overfill sequencer
395 * memory and leave no space for escbs (halting condition),
396 * we increment pending here by the number of escbs. However,
397 * escbs are never pending.
399 seq->pending = seq->num_escbs;
400 seq->can_queue = 1 + (asd_ha->hw_prof.max_scbs - seq->pending)/2;
405 /* ---------- HW initialization ---------- */
408 * asd_chip_hardrst -- hard reset the chip
409 * @asd_ha: pointer to host adapter structure
411 * This takes 16 cycles and is synchronous to CFCLK, which runs
412 * at 200 MHz, so this should take at most 80 nanoseconds.
414 int asd_chip_hardrst(struct asd_ha_struct *asd_ha)
420 for (i = 0 ; i < 4 ; i++) {
421 asd_write_reg_dword(asd_ha, COMBIST, HARDRST);
426 reg = asd_read_reg_dword(asd_ha, CHIMINT);
427 if (reg & HARDRSTDET) {
428 asd_write_reg_dword(asd_ha, CHIMINT,
429 HARDRSTDET|PORRSTDET);
432 } while (--count > 0);
438 * asd_init_chip -- initialize the chip
439 * @asd_ha: pointer to host adapter structure
441 * Hard resets the chip, disables HA interrupts, downloads the sequnecer
442 * microcode and starts the sequencers. The caller has to explicitly
443 * enable HA interrupts with asd_enable_ints(asd_ha).
445 static int asd_init_chip(struct asd_ha_struct *asd_ha)
449 err = asd_chip_hardrst(asd_ha);
451 asd_printk("couldn't hard reset %s\n",
452 pci_name(asd_ha->pcidev));
456 asd_disable_ints(asd_ha);
458 err = asd_init_seqs(asd_ha);
460 asd_printk("couldn't init seqs for %s\n",
461 pci_name(asd_ha->pcidev));
465 err = asd_start_seqs(asd_ha);
467 asd_printk("coudln't start seqs for %s\n",
468 pci_name(asd_ha->pcidev));
475 #define MAX_DEVS ((OCM_MAX_SIZE) / (ASD_DDB_SIZE))
477 static int max_devs = 0;
478 module_param_named(max_devs, max_devs, int, S_IRUGO);
479 MODULE_PARM_DESC(max_devs, "\n"
480 "\tMaximum number of SAS devices to support (not LUs).\n"
481 "\tDefault: 2176, Maximum: 65663.\n");
483 static int max_cmnds = 0;
484 module_param_named(max_cmnds, max_cmnds, int, S_IRUGO);
485 MODULE_PARM_DESC(max_cmnds, "\n"
486 "\tMaximum number of commands queuable.\n"
487 "\tDefault: 512, Maximum: 66047.\n");
489 static void asd_extend_devctx_ocm(struct asd_ha_struct *asd_ha)
491 unsigned long dma_addr = OCM_BASE_ADDR;
494 dma_addr -= asd_ha->hw_prof.max_ddbs * ASD_DDB_SIZE;
495 asd_write_reg_addr(asd_ha, DEVCTXBASE, (dma_addr_t) dma_addr);
496 d = asd_read_reg_dword(asd_ha, CTXDOMAIN);
498 asd_write_reg_dword(asd_ha, CTXDOMAIN, d);
499 asd_ha->hw_prof.max_ddbs += MAX_DEVS;
502 static int asd_extend_devctx(struct asd_ha_struct *asd_ha)
504 dma_addr_t dma_handle;
505 unsigned long dma_addr;
509 asd_extend_devctx_ocm(asd_ha);
511 asd_ha->hw_prof.ddb_ext = NULL;
512 if (max_devs <= asd_ha->hw_prof.max_ddbs || max_devs > 0xFFFF) {
513 max_devs = asd_ha->hw_prof.max_ddbs;
517 size = (max_devs - asd_ha->hw_prof.max_ddbs + 1) * ASD_DDB_SIZE;
519 asd_ha->hw_prof.ddb_ext = asd_alloc_coherent(asd_ha, size, GFP_KERNEL);
520 if (!asd_ha->hw_prof.ddb_ext) {
521 asd_printk("couldn't allocate memory for %d devices\n",
523 max_devs = asd_ha->hw_prof.max_ddbs;
526 dma_handle = asd_ha->hw_prof.ddb_ext->dma_handle;
527 dma_addr = ALIGN((unsigned long) dma_handle, ASD_DDB_SIZE);
528 dma_addr -= asd_ha->hw_prof.max_ddbs * ASD_DDB_SIZE;
529 dma_handle = (dma_addr_t) dma_addr;
530 asd_write_reg_addr(asd_ha, DEVCTXBASE, dma_handle);
531 d = asd_read_reg_dword(asd_ha, CTXDOMAIN);
533 asd_write_reg_dword(asd_ha, CTXDOMAIN, d);
535 asd_ha->hw_prof.max_ddbs = max_devs;
540 static int asd_extend_cmdctx(struct asd_ha_struct *asd_ha)
542 dma_addr_t dma_handle;
543 unsigned long dma_addr;
547 asd_ha->hw_prof.scb_ext = NULL;
548 if (max_cmnds <= asd_ha->hw_prof.max_scbs || max_cmnds > 0xFFFF) {
549 max_cmnds = asd_ha->hw_prof.max_scbs;
553 size = (max_cmnds - asd_ha->hw_prof.max_scbs + 1) * ASD_SCB_SIZE;
555 asd_ha->hw_prof.scb_ext = asd_alloc_coherent(asd_ha, size, GFP_KERNEL);
556 if (!asd_ha->hw_prof.scb_ext) {
557 asd_printk("couldn't allocate memory for %d commands\n",
559 max_cmnds = asd_ha->hw_prof.max_scbs;
562 dma_handle = asd_ha->hw_prof.scb_ext->dma_handle;
563 dma_addr = ALIGN((unsigned long) dma_handle, ASD_SCB_SIZE);
564 dma_addr -= asd_ha->hw_prof.max_scbs * ASD_SCB_SIZE;
565 dma_handle = (dma_addr_t) dma_addr;
566 asd_write_reg_addr(asd_ha, CMDCTXBASE, dma_handle);
567 d = asd_read_reg_dword(asd_ha, CTXDOMAIN);
569 asd_write_reg_dword(asd_ha, CTXDOMAIN, d);
571 asd_ha->hw_prof.max_scbs = max_cmnds;
577 * asd_init_ctxmem -- initialize context memory
578 * asd_ha: pointer to host adapter structure
580 * This function sets the maximum number of SCBs and
581 * DDBs which can be used by the sequencer. This is normally
582 * 512 and 128 respectively. If support for more SCBs or more DDBs
583 * is required then CMDCTXBASE, DEVCTXBASE and CTXDOMAIN are
584 * initialized here to extend context memory to point to host memory,
585 * thus allowing unlimited support for SCBs and DDBs -- only limited
588 static int asd_init_ctxmem(struct asd_ha_struct *asd_ha)
592 asd_get_max_scb_ddb(asd_ha);
593 asd_extend_devctx(asd_ha);
594 asd_extend_cmdctx(asd_ha);
596 /* The kernel wants bitmaps to be unsigned long sized. */
597 bitmap_bytes = (asd_ha->hw_prof.max_ddbs+7)/8;
598 bitmap_bytes = BITS_TO_LONGS(bitmap_bytes*8)*sizeof(unsigned long);
599 asd_ha->hw_prof.ddb_bitmap = kzalloc(bitmap_bytes, GFP_KERNEL);
600 if (!asd_ha->hw_prof.ddb_bitmap)
602 spin_lock_init(&asd_ha->hw_prof.ddb_lock);
607 int asd_init_hw(struct asd_ha_struct *asd_ha)
612 err = asd_init_sw(asd_ha);
616 err = pci_read_config_dword(asd_ha->pcidev, PCIC_HSTPCIX_CNTRL, &v);
618 asd_printk("couldn't read PCIC_HSTPCIX_CNTRL of %s\n",
619 pci_name(asd_ha->pcidev));
622 pci_write_config_dword(asd_ha->pcidev, PCIC_HSTPCIX_CNTRL,
625 asd_printk("couldn't disable split completion timer of %s\n",
626 pci_name(asd_ha->pcidev));
630 err = asd_read_ocm(asd_ha);
632 asd_printk("couldn't read ocm(%d)\n", err);
633 /* While suspicios, it is not an error that we
634 * couldn't read the OCM. */
637 err = asd_read_flash(asd_ha);
639 asd_printk("couldn't read flash(%d)\n", err);
640 /* While suspicios, it is not an error that we
641 * couldn't read FLASH memory.
645 asd_init_ctxmem(asd_ha);
647 asd_get_user_sas_addr(asd_ha);
648 if (!asd_ha->hw_prof.sas_addr[0]) {
649 asd_printk("No SAS Address provided for %s\n",
650 pci_name(asd_ha->pcidev));
655 asd_propagate_sas_addr(asd_ha);
657 err = asd_init_phys(asd_ha);
659 asd_printk("couldn't initialize phys for %s\n",
660 pci_name(asd_ha->pcidev));
664 err = asd_init_scbs(asd_ha);
666 asd_printk("couldn't initialize scbs for %s\n",
667 pci_name(asd_ha->pcidev));
671 err = asd_init_dl(asd_ha);
673 asd_printk("couldn't initialize the done list:%d\n",
678 err = asd_init_escbs(asd_ha);
680 asd_printk("couldn't initialize escbs\n");
684 err = asd_init_chip(asd_ha);
686 asd_printk("couldn't init the chip\n");
693 /* ---------- Chip reset ---------- */
696 * asd_chip_reset -- reset the host adapter, etc
697 * @asd_ha: pointer to host adapter structure of interest
699 * Called from the ISR. Hard reset the chip. Let everything
700 * timeout. This should be no different than hot-unplugging the
701 * host adapter. Once everything times out we'll init the chip with
702 * a call to asd_init_chip() and enable interrupts with asd_enable_ints().
705 static void asd_chip_reset(struct asd_ha_struct *asd_ha)
707 struct sas_ha_struct *sas_ha = &asd_ha->sas_ha;
709 ASD_DPRINTK("chip reset for %s\n", pci_name(asd_ha->pcidev));
710 asd_chip_hardrst(asd_ha);
711 sas_ha->notify_ha_event(sas_ha, HAE_RESET);
714 /* ---------- Done List Routines ---------- */
716 static void asd_dl_tasklet_handler(unsigned long data)
718 struct asd_ha_struct *asd_ha = (struct asd_ha_struct *) data;
719 struct asd_seq_data *seq = &asd_ha->seq;
723 struct done_list_struct *dl = &seq->dl[seq->dl_next];
724 struct asd_ascb *ascb;
726 if ((dl->toggle & DL_TOGGLE_MASK) != seq->dl_toggle)
730 spin_lock_irqsave(&seq->tc_index_lock, flags);
731 ascb = asd_tc_index_find(seq, (int)le16_to_cpu(dl->index));
732 spin_unlock_irqrestore(&seq->tc_index_lock, flags);
733 if (unlikely(!ascb)) {
734 ASD_DPRINTK("BUG:sequencer:dl:no ascb?!\n");
736 } else if (ascb->scb->header.opcode == EMPTY_SCB) {
738 } else if (!ascb->uldd_timer && !del_timer(&ascb->timer)) {
741 spin_lock_irqsave(&seq->pend_q_lock, flags);
742 list_del_init(&ascb->list);
744 spin_unlock_irqrestore(&seq->pend_q_lock, flags);
746 ascb->tasklet_complete(ascb, dl);
749 seq->dl_next = (seq->dl_next + 1) & (ASD_DL_SIZE-1);
751 seq->dl_toggle ^= DL_TOGGLE_MASK;
755 /* ---------- Interrupt Service Routines ---------- */
758 * asd_process_donelist_isr -- schedule processing of done list entries
759 * @asd_ha: pointer to host adapter structure
761 static inline void asd_process_donelist_isr(struct asd_ha_struct *asd_ha)
763 tasklet_schedule(&asd_ha->seq.dl_tasklet);
767 * asd_com_sas_isr -- process device communication interrupt (COMINT)
768 * @asd_ha: pointer to host adapter structure
770 static inline void asd_com_sas_isr(struct asd_ha_struct *asd_ha)
772 u32 comstat = asd_read_reg_dword(asd_ha, COMSTAT);
774 /* clear COMSTAT int */
775 asd_write_reg_dword(asd_ha, COMSTAT, 0xFFFFFFFF);
777 if (comstat & CSBUFPERR) {
778 asd_printk("%s: command/status buffer dma parity error\n",
779 pci_name(asd_ha->pcidev));
780 } else if (comstat & CSERR) {
782 u32 dmaerr = asd_read_reg_dword(asd_ha, DMAERR);
784 asd_printk("%s: command/status dma error, DMAERR: 0x%02x, "
785 "CSDMAADR: 0x%04x, CSDMAADR+4: 0x%04x\n",
786 pci_name(asd_ha->pcidev),
788 asd_read_reg_dword(asd_ha, CSDMAADR),
789 asd_read_reg_dword(asd_ha, CSDMAADR+4));
790 asd_printk("CSBUFFER:\n");
791 for (i = 0; i < 8; i++) {
792 asd_printk("%08x %08x %08x %08x\n",
793 asd_read_reg_dword(asd_ha, CSBUFFER),
794 asd_read_reg_dword(asd_ha, CSBUFFER+4),
795 asd_read_reg_dword(asd_ha, CSBUFFER+8),
796 asd_read_reg_dword(asd_ha, CSBUFFER+12));
798 asd_dump_seq_state(asd_ha, 0);
799 } else if (comstat & OVLYERR) {
800 u32 dmaerr = asd_read_reg_dword(asd_ha, DMAERR);
801 dmaerr = (dmaerr >> 8) & 0xFF;
802 asd_printk("%s: overlay dma error:0x%x\n",
803 pci_name(asd_ha->pcidev),
806 asd_chip_reset(asd_ha);
809 static inline void asd_arp2_err(struct asd_ha_struct *asd_ha, u32 dchstatus)
811 static const char *halt_code[256] = {
812 "UNEXPECTED_INTERRUPT0",
813 "UNEXPECTED_INTERRUPT1",
814 "UNEXPECTED_INTERRUPT2",
815 "UNEXPECTED_INTERRUPT3",
816 "UNEXPECTED_INTERRUPT4",
817 "UNEXPECTED_INTERRUPT5",
818 "UNEXPECTED_INTERRUPT6",
819 "UNEXPECTED_INTERRUPT7",
820 "UNEXPECTED_INTERRUPT8",
821 "UNEXPECTED_INTERRUPT9",
822 "UNEXPECTED_INTERRUPT10",
823 [11 ... 19] = "unknown[11,19]",
824 "NO_FREE_SCB_AVAILABLE",
825 "INVALID_SCB_OPCODE",
826 "INVALID_MBX_OPCODE",
829 "ATA_TAG_TABLE_FAULT",
830 "ATA_TAG_MASK_FAULT",
831 "BAD_LINK_QUEUE_STATE",
832 "DMA2CHIM_QUEUE_ERROR",
833 "EMPTY_SCB_LIST_FULL",
835 "IN_USE_SCB_ON_FREE_LIST",
836 "BAD_OPEN_WAIT_STATE",
837 "INVALID_STP_AFFILIATION",
840 "TOO_MANY_EMPTIES_NEEDED",
841 "EMPTY_REQ_QUEUE_ERROR",
842 "Q_MONIRTT_MGMT_ERROR",
843 "TARGET_MODE_FLOW_ERROR",
844 "DEVICE_QUEUE_NOT_FOUND",
845 "START_IRTT_TIMER_ERROR",
846 "ABORT_TASK_ILLEGAL_REQ",
847 [43 ... 255] = "unknown[43,255]"
850 if (dchstatus & CSEQINT) {
851 u32 arp2int = asd_read_reg_dword(asd_ha, CARP2INT);
853 if (arp2int & (ARP2WAITTO|ARP2ILLOPC|ARP2PERR|ARP2CIOPERR)) {
854 asd_printk("%s: CSEQ arp2int:0x%x\n",
855 pci_name(asd_ha->pcidev),
857 } else if (arp2int & ARP2HALTC)
858 asd_printk("%s: CSEQ halted: %s\n",
859 pci_name(asd_ha->pcidev),
860 halt_code[(arp2int>>16)&0xFF]);
862 asd_printk("%s: CARP2INT:0x%x\n",
863 pci_name(asd_ha->pcidev),
866 if (dchstatus & LSEQINT_MASK) {
868 u8 lseq_mask = dchstatus & LSEQINT_MASK;
870 for_each_sequencer(lseq_mask, lseq_mask, lseq) {
871 u32 arp2int = asd_read_reg_dword(asd_ha,
873 if (arp2int & (ARP2WAITTO | ARP2ILLOPC | ARP2PERR
875 asd_printk("%s: LSEQ%d arp2int:0x%x\n",
876 pci_name(asd_ha->pcidev),
878 /* XXX we should only do lseq reset */
879 } else if (arp2int & ARP2HALTC)
880 asd_printk("%s: LSEQ%d halted: %s\n",
881 pci_name(asd_ha->pcidev),
882 lseq,halt_code[(arp2int>>16)&0xFF]);
884 asd_printk("%s: LSEQ%d ARP2INT:0x%x\n",
885 pci_name(asd_ha->pcidev), lseq,
889 asd_chip_reset(asd_ha);
893 * asd_dch_sas_isr -- process device channel interrupt (DEVINT)
894 * @asd_ha: pointer to host adapter structure
896 static inline void asd_dch_sas_isr(struct asd_ha_struct *asd_ha)
898 u32 dchstatus = asd_read_reg_dword(asd_ha, DCHSTATUS);
900 if (dchstatus & CFIFTOERR) {
901 asd_printk("%s: CFIFTOERR\n", pci_name(asd_ha->pcidev));
902 asd_chip_reset(asd_ha);
904 asd_arp2_err(asd_ha, dchstatus);
908 * ads_rbi_exsi_isr -- process external system interface interrupt (INITERR)
909 * @asd_ha: pointer to host adapter structure
911 static inline void asd_rbi_exsi_isr(struct asd_ha_struct *asd_ha)
913 u32 stat0r = asd_read_reg_dword(asd_ha, ASISTAT0R);
915 if (!(stat0r & ASIERR)) {
916 asd_printk("hmm, EXSI interrupted but no error?\n");
920 if (stat0r & ASIFMTERR) {
921 asd_printk("ASI SEEPROM format error for %s\n",
922 pci_name(asd_ha->pcidev));
923 } else if (stat0r & ASISEECHKERR) {
924 u32 stat1r = asd_read_reg_dword(asd_ha, ASISTAT1R);
925 asd_printk("ASI SEEPROM checksum 0x%x error for %s\n",
926 stat1r & CHECKSUM_MASK,
927 pci_name(asd_ha->pcidev));
929 u32 statr = asd_read_reg_dword(asd_ha, ASIERRSTATR);
931 if (!(statr & CPI2ASIMSTERR_MASK)) {
932 ASD_DPRINTK("hmm, ASIERR?\n");
935 u32 addr = asd_read_reg_dword(asd_ha, ASIERRADDR);
936 u32 data = asd_read_reg_dword(asd_ha, ASIERRDATAR);
938 asd_printk("%s: CPI2 xfer err: addr: 0x%x, wdata: 0x%x, "
939 "count: 0x%x, byteen: 0x%x, targerr: 0x%x "
940 "master id: 0x%x, master err: 0x%x\n",
941 pci_name(asd_ha->pcidev),
943 (statr & CPI2ASIBYTECNT_MASK) >> 16,
944 (statr & CPI2ASIBYTEEN_MASK) >> 12,
945 (statr & CPI2ASITARGERR_MASK) >> 8,
946 (statr & CPI2ASITARGMID_MASK) >> 4,
947 (statr & CPI2ASIMSTERR_MASK));
950 asd_chip_reset(asd_ha);
954 * asd_hst_pcix_isr -- process host interface interrupts
955 * @asd_ha: pointer to host adapter structure
957 * Asserted on PCIX errors: target abort, etc.
959 static inline void asd_hst_pcix_isr(struct asd_ha_struct *asd_ha)
965 pci_read_config_word(asd_ha->pcidev, PCI_STATUS, &status);
966 pci_read_config_dword(asd_ha->pcidev, PCIX_STATUS, &pcix_status);
967 pci_read_config_dword(asd_ha->pcidev, ECC_CTRL_STAT, &ecc_status);
969 if (status & PCI_STATUS_DETECTED_PARITY)
970 asd_printk("parity error for %s\n", pci_name(asd_ha->pcidev));
971 else if (status & PCI_STATUS_REC_MASTER_ABORT)
972 asd_printk("master abort for %s\n", pci_name(asd_ha->pcidev));
973 else if (status & PCI_STATUS_REC_TARGET_ABORT)
974 asd_printk("target abort for %s\n", pci_name(asd_ha->pcidev));
975 else if (status & PCI_STATUS_PARITY)
976 asd_printk("data parity for %s\n", pci_name(asd_ha->pcidev));
977 else if (pcix_status & RCV_SCE) {
978 asd_printk("received split completion error for %s\n",
979 pci_name(asd_ha->pcidev));
980 pci_write_config_dword(asd_ha->pcidev,PCIX_STATUS,pcix_status);
981 /* XXX: Abort task? */
983 } else if (pcix_status & UNEXP_SC) {
984 asd_printk("unexpected split completion for %s\n",
985 pci_name(asd_ha->pcidev));
986 pci_write_config_dword(asd_ha->pcidev,PCIX_STATUS,pcix_status);
989 } else if (pcix_status & SC_DISCARD)
990 asd_printk("split completion discarded for %s\n",
991 pci_name(asd_ha->pcidev));
992 else if (ecc_status & UNCOR_ECCERR)
993 asd_printk("uncorrectable ECC error for %s\n",
994 pci_name(asd_ha->pcidev));
995 asd_chip_reset(asd_ha);
999 * asd_hw_isr -- host adapter interrupt service routine
1001 * @dev_id: pointer to host adapter structure
1004 * The ISR processes done list entries and level 3 error handling.
1006 irqreturn_t asd_hw_isr(int irq, void *dev_id, struct pt_regs *regs)
1008 struct asd_ha_struct *asd_ha = dev_id;
1009 u32 chimint = asd_read_reg_dword(asd_ha, CHIMINT);
1014 asd_write_reg_dword(asd_ha, CHIMINT, chimint);
1015 (void) asd_read_reg_dword(asd_ha, CHIMINT);
1017 if (chimint & DLAVAIL)
1018 asd_process_donelist_isr(asd_ha);
1019 if (chimint & COMINT)
1020 asd_com_sas_isr(asd_ha);
1021 if (chimint & DEVINT)
1022 asd_dch_sas_isr(asd_ha);
1023 if (chimint & INITERR)
1024 asd_rbi_exsi_isr(asd_ha);
1025 if (chimint & HOSTERR)
1026 asd_hst_pcix_isr(asd_ha);
1031 /* ---------- SCB handling ---------- */
1033 static inline struct asd_ascb *asd_ascb_alloc(struct asd_ha_struct *asd_ha,
1034 unsigned int gfp_flags)
1036 extern kmem_cache_t *asd_ascb_cache;
1037 struct asd_seq_data *seq = &asd_ha->seq;
1038 struct asd_ascb *ascb;
1039 unsigned long flags;
1041 ascb = kmem_cache_alloc(asd_ascb_cache, gfp_flags);
1044 memset(ascb, 0, sizeof(*ascb));
1045 ascb->dma_scb.size = sizeof(struct scb);
1046 ascb->dma_scb.vaddr = dma_pool_alloc(asd_ha->scb_pool,
1048 &ascb->dma_scb.dma_handle);
1049 if (!ascb->dma_scb.vaddr) {
1050 kmem_cache_free(asd_ascb_cache, ascb);
1053 memset(ascb->dma_scb.vaddr, 0, sizeof(struct scb));
1054 asd_init_ascb(asd_ha, ascb);
1056 spin_lock_irqsave(&seq->tc_index_lock, flags);
1057 ascb->tc_index = asd_tc_index_get(seq, ascb);
1058 spin_unlock_irqrestore(&seq->tc_index_lock, flags);
1059 if (ascb->tc_index == -1)
1062 ascb->scb->header.index = cpu_to_le16((u16)ascb->tc_index);
1067 dma_pool_free(asd_ha->scb_pool, ascb->dma_scb.vaddr,
1068 ascb->dma_scb.dma_handle);
1069 kmem_cache_free(asd_ascb_cache, ascb);
1070 ASD_DPRINTK("no index for ascb\n");
1075 * asd_ascb_alloc_list -- allocate a list of aSCBs
1076 * @asd_ha: pointer to host adapter structure
1077 * @num: pointer to integer number of aSCBs
1078 * @gfp_flags: GFP_ flags.
1080 * This is the only function which is used to allocate aSCBs.
1081 * It can allocate one or many. If more than one, then they form
1082 * a linked list in two ways: by their list field of the ascb struct
1083 * and by the next_scb field of the scb_header.
1085 * Returns NULL if no memory was available, else pointer to a list
1086 * of ascbs. When this function returns, @num would be the number
1087 * of SCBs which were not able to be allocated, 0 if all requested
1088 * were able to be allocated.
1090 struct asd_ascb *asd_ascb_alloc_list(struct asd_ha_struct
1092 unsigned int gfp_flags)
1094 struct asd_ascb *first = NULL;
1096 for ( ; *num > 0; --*num) {
1097 struct asd_ascb *ascb = asd_ascb_alloc(asd_ha, gfp_flags);
1104 struct asd_ascb *last = list_entry(first->list.prev,
1107 list_add_tail(&ascb->list, &first->list);
1108 last->scb->header.next_scb =
1109 cpu_to_le64(((u64)ascb->dma_scb.dma_handle));
1117 * asd_swap_head_scb -- swap the head scb
1118 * @asd_ha: pointer to host adapter structure
1119 * @ascb: pointer to the head of an ascb list
1121 * The sequencer knows the DMA address of the next SCB to be DMAed to
1122 * the host adapter, from initialization or from the last list DMAed.
1123 * seq->next_scb keeps the address of this SCB. The sequencer will
1124 * DMA to the host adapter this list of SCBs. But the head (first
1125 * element) of this list is not known to the sequencer. Here we swap
1126 * the head of the list with the known SCB (memcpy()).
1127 * Only one memcpy() is required per list so it is in our interest
1128 * to keep the list of SCB as long as possible so that the ratio
1129 * of number of memcpy calls to the number of SCB DMA-ed is as small
1132 * LOCKING: called with the pending list lock held.
1134 static inline void asd_swap_head_scb(struct asd_ha_struct *asd_ha,
1135 struct asd_ascb *ascb)
1137 struct asd_seq_data *seq = &asd_ha->seq;
1138 struct asd_ascb *last = list_entry(ascb->list.prev,
1141 struct asd_dma_tok t = ascb->dma_scb;
1143 memcpy(seq->next_scb.vaddr, ascb->scb, sizeof(*ascb->scb));
1144 ascb->dma_scb = seq->next_scb;
1145 ascb->scb = ascb->dma_scb.vaddr;
1147 last->scb->header.next_scb =
1148 cpu_to_le64(((u64)seq->next_scb.dma_handle));
1152 * asd_start_timers -- (add and) start timers of SCBs
1153 * @list: pointer to struct list_head of the scbs
1154 * @to: timeout in jiffies
1156 * If an SCB in the @list has no timer function, assign the default
1157 * one, then start the timer of the SCB. This function is
1158 * intended to be called from asd_post_ascb_list(), just prior to
1159 * posting the SCBs to the sequencer.
1161 static inline void asd_start_scb_timers(struct list_head *list)
1163 struct asd_ascb *ascb;
1164 list_for_each_entry(ascb, list, list) {
1165 if (!ascb->uldd_timer) {
1166 ascb->timer.data = (unsigned long) ascb;
1167 ascb->timer.function = asd_ascb_timedout;
1168 ascb->timer.expires = jiffies + AIC94XX_SCB_TIMEOUT;
1169 add_timer(&ascb->timer);
1175 * asd_post_ascb_list -- post a list of 1 or more aSCBs to the host adapter
1176 * @asd_ha: pointer to a host adapter structure
1177 * @ascb: pointer to the first aSCB in the list
1178 * @num: number of aSCBs in the list (to be posted)
1180 * See queueing comment in asd_post_escb_list().
1182 * Additional note on queuing: In order to minimize the ratio of memcpy()
1183 * to the number of ascbs sent, we try to batch-send as many ascbs as possible
1185 * Two cases are possible:
1186 * A) can_queue >= num,
1187 * B) can_queue < num.
1188 * Case A: we can send the whole batch at once. Increment "pending"
1189 * in the beginning of this function, when it is checked, in order to
1190 * eliminate races when this function is called by multiple processes.
1191 * Case B: should never happen if the managing layer considers
1194 int asd_post_ascb_list(struct asd_ha_struct *asd_ha, struct asd_ascb *ascb,
1197 unsigned long flags;
1201 spin_lock_irqsave(&asd_ha->seq.pend_q_lock, flags);
1202 can_queue = asd_ha->hw_prof.max_scbs - asd_ha->seq.pending;
1203 if (can_queue >= num)
1204 asd_ha->seq.pending += num;
1209 spin_unlock_irqrestore(&asd_ha->seq.pend_q_lock, flags);
1210 asd_printk("%s: scb queue full\n", pci_name(asd_ha->pcidev));
1211 return -SAS_QUEUE_FULL;
1214 asd_swap_head_scb(asd_ha, ascb);
1216 __list_add(&list, ascb->list.prev, &ascb->list);
1218 asd_start_scb_timers(&list);
1220 asd_ha->seq.scbpro += num;
1221 list_splice_init(&list, asd_ha->seq.pend_q.prev);
1222 asd_write_reg_dword(asd_ha, SCBPRO, (u32)asd_ha->seq.scbpro);
1223 spin_unlock_irqrestore(&asd_ha->seq.pend_q_lock, flags);
1229 * asd_post_escb_list -- post a list of 1 or more empty scb
1230 * @asd_ha: pointer to a host adapter structure
1231 * @ascb: pointer to the first empty SCB in the list
1232 * @num: number of aSCBs in the list (to be posted)
1234 * This is essentially the same as asd_post_ascb_list, but we do not
1235 * increment pending, add those to the pending list or get indexes.
1236 * See asd_init_escbs() and asd_init_post_escbs().
1238 * Since sending a list of ascbs is a superset of sending a single
1239 * ascb, this function exists to generalize this. More specifically,
1240 * when sending a list of those, we want to do only a _single_
1241 * memcpy() at swap head, as opposed to for each ascb sent (in the
1242 * case of sending them one by one). That is, we want to minimize the
1243 * ratio of memcpy() operations to the number of ascbs sent. The same
1244 * logic applies to asd_post_ascb_list().
1246 int asd_post_escb_list(struct asd_ha_struct *asd_ha, struct asd_ascb *ascb,
1249 unsigned long flags;
1251 spin_lock_irqsave(&asd_ha->seq.pend_q_lock, flags);
1252 asd_swap_head_scb(asd_ha, ascb);
1253 asd_ha->seq.scbpro += num;
1254 asd_write_reg_dword(asd_ha, SCBPRO, (u32)asd_ha->seq.scbpro);
1255 spin_unlock_irqrestore(&asd_ha->seq.pend_q_lock, flags);
1260 /* ---------- LED ---------- */
1263 * asd_turn_led -- turn on/off an LED
1264 * @asd_ha: pointer to host adapter structure
1265 * @phy_id: the PHY id whose LED we want to manupulate
1266 * @op: 1 to turn on, 0 to turn off
1268 void asd_turn_led(struct asd_ha_struct *asd_ha, int phy_id, int op)
1270 if (phy_id < ASD_MAX_PHYS) {
1271 u32 v = asd_read_reg_dword(asd_ha, LmCONTROL(phy_id));
1276 asd_write_reg_dword(asd_ha, LmCONTROL(phy_id), v);
1281 * asd_control_led -- enable/disable an LED on the board
1282 * @asd_ha: pointer to host adapter structure
1283 * @phy_id: integer, the phy id
1284 * @op: integer, 1 to enable, 0 to disable the LED
1286 * First we output enable the LED, then we set the source
1287 * to be an external module.
1289 void asd_control_led(struct asd_ha_struct *asd_ha, int phy_id, int op)
1291 if (phy_id < ASD_MAX_PHYS) {
1294 v = asd_read_reg_dword(asd_ha, GPIOOER);
1298 v &= ~(1 << phy_id);
1299 asd_write_reg_dword(asd_ha, GPIOOER, v);
1301 v = asd_read_reg_dword(asd_ha, GPIOCNFGR);
1305 v &= ~(1 << phy_id);
1306 asd_write_reg_dword(asd_ha, GPIOCNFGR, v);
1310 /* ---------- PHY enable ---------- */
1312 static int asd_enable_phy(struct asd_ha_struct *asd_ha, int phy_id)
1314 struct asd_phy *phy = &asd_ha->phys[phy_id];
1316 asd_write_reg_byte(asd_ha, LmSEQ_OOB_REG(phy_id, INT_ENABLE_2), 0);
1317 asd_write_reg_byte(asd_ha, LmSEQ_OOB_REG(phy_id, HOT_PLUG_DELAY),
1318 HOTPLUG_DELAY_TIMEOUT);
1320 /* Get defaults from manuf. sector */
1321 /* XXX we need defaults for those in case MS is broken. */
1322 asd_write_reg_byte(asd_ha, LmSEQ_OOB_REG(phy_id, PHY_CONTROL_0),
1323 phy->phy_desc->phy_control_0);
1324 asd_write_reg_byte(asd_ha, LmSEQ_OOB_REG(phy_id, PHY_CONTROL_1),
1325 phy->phy_desc->phy_control_1);
1326 asd_write_reg_byte(asd_ha, LmSEQ_OOB_REG(phy_id, PHY_CONTROL_2),
1327 phy->phy_desc->phy_control_2);
1328 asd_write_reg_byte(asd_ha, LmSEQ_OOB_REG(phy_id, PHY_CONTROL_3),
1329 phy->phy_desc->phy_control_3);
1331 asd_write_reg_dword(asd_ha, LmSEQ_TEN_MS_COMINIT_TIMEOUT(phy_id),
1332 ASD_COMINIT_TIMEOUT);
1334 asd_write_reg_addr(asd_ha, LmSEQ_TX_ID_ADDR_FRAME(phy_id),
1335 phy->id_frm_tok->dma_handle);
1337 asd_control_led(asd_ha, phy_id, 1);
1342 int asd_enable_phys(struct asd_ha_struct *asd_ha, const u8 phy_mask)
1347 struct asd_ascb *ascb;
1348 struct asd_ascb *ascb_list;
1351 asd_printk("%s called with phy_mask of 0!?\n", __FUNCTION__);
1355 for_each_phy(phy_mask, phy_m, i) {
1357 asd_enable_phy(asd_ha, i);
1361 ascb_list = asd_ascb_alloc_list(asd_ha, &k, GFP_KERNEL);
1363 asd_printk("no memory for control phy ascb list\n");
1369 for_each_phy(phy_mask, phy_m, i) {
1370 asd_build_control_phy(ascb, i, ENABLE_PHY);
1371 ascb = list_entry(ascb->list.next, struct asd_ascb, list);
1373 ASD_DPRINTK("posting %d control phy scbs\n", num);
1374 k = asd_post_ascb_list(asd_ha, ascb_list, num);
1376 asd_ascb_free_list(ascb_list);