1 .TH RD 1 "September 20, 2005"
3 rd, rm\- Register manipulation commands
7 rm \fIregister-name\fP \fInew-contents\fP
13 command is used to display the contents of processor and coprocessor registers.
14 Without any arguments, the rd command displays the contents of the general
15 register set at the point at which the kernel debugger was entered.
16 If the bt* or pid commands have been used to change the current process then
20 may not be able to display any registers.
21 'n' argument is only used for XScale platform to identify the desired
22 coprocessor number, while 'd' option is not valid for XScale platform.
24 On IA32 and IA64, with the 'c' argument, the processor control registers
25 %cr0, %cr1, %cr2 and %cr4 are displayed, while with the 'd' argument
26 the processor debug registers are displayed. If the 'u' argument
27 is supplied, the registers for the current task as of the last
28 time the current task entered the kernel are displayed.
30 On XScale, 'c' argument is used to display the
31 all coprocessor control registers or specified coprocessor registers by
32 argumnet 'n'. Argument 'u' is used to display the
33 registers for the current task as of the last time the current task
34 entered the kernel. Argument 'd' is not supported.
38 command allows modification of a register. The following
39 register names are valid: \fB%eax\fP, \fB%ebx\fP, \fB%ecx\fP,
40 \fB%edx\fP, \fB%esi\fP, \fB%edi\fP, \fB%esp\fP, \fB%eip\fP,
41 and \fB%ebp\fP. Note that if two '%' symbols are used
42 consecutively, the register set displayed by the 'u' argument
43 to the \fBrd\fP command is modified.
45 The debug registers, \fBdr0\fP through \fBdr3\fP and both
46 \fBdr6\fP and \fBdr7\fP can also be modified with the \fBrm\fP
49 On sparc64, the valid registers are named \fB%g0\fP through
50 \fB%g7\fP, \fB%l0\fP through \fB%l7\fP, \fB%o0\fP through
51 \fB%o7\fP, and \fB%i0\fP through \fB%i7\fP, with the exceptions
52 that \fB%o6\fP is called \fB%sp\fP and that \fB%i6\fP is called
53 \fB%fp\fP. The registers \fB%tstate\fP, \fB%tpc\fP, \fB%tnpc\fP,
54 \fB%y\fP, and \fB%fprs\fP provide state information at the time
55 the system entered kdb. Additionally, when viewing registers, two
56 convenience names are provided: \fB%®s\fP shows the
57 address on the stack of the current registers, and \fB%csp\fP
58 shows the current stack pointer within kdb itself.
60 While on XScale, both the cpu registers and most coprocessor
61 registers can be be modified. \fIregister-name\fP can be followings like
62 r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14,
63 r15, cpsr to address cpu registers. For the coprocessor registers in XSacle,
64 either alias name or \fICpcc[CRndd[CRmbb[Opaa]]]\fP can be used to address
65 the register in coprocessor cc with CRn=dd, CRm=bb and opcode2=aa. All aa, bb, cc, dd can be
66 1 or 2 decimal digitals, the default value is 0 when any of them is omitted. Name
67 acc0_h and acc0_l are used to identify the high byte and
68 low word of accumulator in coprocessor 0.
70 On IA64, the parameter to
72 can be d (debug registers), u (user registers at most recent entry to kernel),
73 i (interrupt registers), %isr (current interrupt status), s (stacked
74 registers), k (kernel registers). You can also specify these individual
119 can change any of the individual registers or the stacked registers.
123 command displays an exception frame at the specified address.
125 Currently the \fBrm\fP command will not allow modification of the
128 Currently neither the \fBrd\fP command nor the \fBrm\fP command will
129 display or modify the model specific registers on the Pentium
130 and Pentium Pro families.
133 .SH SMP CONSIDERATIONS
138 Display general register set from kdb's current task.
142 Display coprocessor 0 registers.
146 Set the contents of \fB%eax\fP to zero. This will be the
147 value of %eax when kdb returns from the condition which
152 Set the value of the \fB%eax\fP register to zero. This will
153 be the value the user-mode application will see upon returning
158 Set the contents of high byte of accumulator to zero.
162 Set the value of the \fBdr0\fB register to \f(CW0xc1287220\fP.
166 Write 0 to coprocessor 15 register with CRn=7, CRm=5, opcode2=6.
169 rm %CP15CRn7CRm5Op6 0