drivers/media/dvb/b2c2/skystar2.c

   1 /*
   2  * skystar2.c - driver for the Technisat SkyStar2 PCI DVB card
   3  *              based on the FlexCopII by B2C2,Inc.
   4  *
   5  * Copyright (C) 2003  Vadim Catana, skystar@moldova.cc
   6  *
   7  * FIX: DISEQC Tone Burst in flexcop_diseqc_ioctl()
   8  * FIX: FULL soft DiSEqC for skystar2 (FlexCopII rev 130) VP310 equipped
   9  *     Vincenzo Di Massa, hawk.it at tiscalinet.it
  10  *
  11  * Converted to Linux coding style
  12  * Misc reorganization, polishing, restyling
  13  *     Roberto Ragusa, r.ragusa at libero.it
  14  *
  15  * Added hardware filtering support,
  16  *     Niklas Peinecke, peinecke at gdv.uni-hannover.de
  17  *
  18  *
  19  * This program is free software; you can redistribute it and/or
  20  * modify it under the terms of the GNU Lesser General Public License
  21  * as published by the Free Software Foundation; either version 2.1
  22  * of the License, or (at your option) any later version.
  23  *
  24  * This program is distributed in the hope that it will be useful,
  25  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27  * GNU General Public License for more details.
  28  *
  29  * You should have received a copy of the GNU Lesser General Public License
  30  * along with this program; if not, write to the Free Software
  31  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  32  */
  33
  34 #include <linux/module.h>
  35 #include <linux/moduleparam.h>
  36 #include <linux/delay.h>
  37 #include <linux/pci.h>
  38 #include <linux/init.h>
  39 #include <linux/version.h>
  40
  41 #include <asm/io.h>
  42
  43 #include "dvb_frontend.h"
  44
  45 #include <linux/dvb/frontend.h>
  46 #include <linux/dvb/dmx.h>
  47 #include "dvb_demux.h"
  48 #include "dmxdev.h"
  49 #include "dvb_filter.h"
  50 #include "dvbdev.h"
  51 #include "demux.h"
  52 #include "dvb_net.h"
  53 #include "stv0299.h"
  54 #include "mt352.h"
  55 #include "mt312.h"
  56
  57
  58 static int debug;
  59 static int enable_hw_filters = 2;
  60
  61 module_param(debug, int, 0644);
  62 MODULE_PARM_DESC(debug, "Set debugging level (0 = default, 1 = most messages, 2 = all messages).");
  63 module_param(enable_hw_filters, int, 0444);
  64 MODULE_PARM_DESC(enable_hw_filters, "enable hardware filters: supported values: 0 (none), 1, 2");
  65
  66 #define dprintk(x...)   do { if (debug>=1) printk(x); } while (0)
  67 #define ddprintk(x...)  do { if (debug>=2) printk(x); } while (0)
  68
  69 #define SIZE_OF_BUF_DMA1        0x3ac00
  70 #define SIZE_OF_BUF_DMA2        0x758
  71
  72 #define MAX_N_HW_FILTERS        (6+32)
  73 #define N_PID_SLOTS             256
  74
  75 struct dmaq {
  76         u32 bus_addr;
  77         u32 head;
  78         u32 tail;
  79         u32 buffer_size;
  80         u8 *buffer;
  81 };
  82
  83 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
  84 #define __iomem
  85 #endif
  86
  87 struct adapter {
  88         struct pci_dev *pdev;
  89
  90         u8 card_revision;
  91         u32 b2c2_revision;
  92         u32 pid_filter_max;
  93         u32 mac_filter_max;
  94         u32 irq;
  95         void __iomem *io_mem;
  96         unsigned long io_port;
  97         u8 mac_addr[8];
  98         u32 dw_sram_type;
  99
 100         struct dvb_adapter *dvb_adapter;
 101         struct dvb_demux demux;
 102         struct dmxdev dmxdev;
 103         struct dmx_frontend hw_frontend;
 104         struct dmx_frontend mem_frontend;
 105         struct i2c_adapter i2c_adap;
 106         struct dvb_net dvbnet;
 107
 108         struct semaphore i2c_sem;
 109
 110         struct dmaq dmaq1;
 111         struct dmaq dmaq2;
 112
 113         u32 dma_ctrl;
 114         u32 dma_status;
 115
 116         int capturing;
 117
 118         spinlock_t lock;
 119
 120         int useable_hw_filters;
 121         u16 hw_pids[MAX_N_HW_FILTERS];
 122         u16 pid_list[N_PID_SLOTS];
 123         int pid_rc[N_PID_SLOTS];        // ref counters for the pids
 124         int pid_count;
 125         int whole_bandwidth_count;
 126         u32 mac_filter;
 127
 128         struct dvb_frontend* fe;
 129         int (*fe_sleep)(struct dvb_frontend* fe);
 130 };
 131
 132 #define write_reg_dw(adapter,reg,value) writel(value, adapter->io_mem + reg)
 133 #define read_reg_dw(adapter,reg) readl(adapter->io_mem + reg)
 134
 135 static void write_reg_bitfield(struct adapter *adapter, u32 reg, u32 zeromask, u32 orvalue)
 136 {
 137         u32 tmp;
 138
 139         tmp = read_reg_dw(adapter, reg);
 140         tmp = (tmp & ~zeromask) | orvalue;
 141         write_reg_dw(adapter, reg, tmp);
 142 }
 143
 144 /* i2c functions */
 145 static int i2c_main_write_for_flex2(struct adapter *adapter, u32 command, u8 *buf, int retries)
 146 {
 147         int i;
 148         u32 value;
 149
 150         write_reg_dw(adapter, 0x100, 0);
 151         write_reg_dw(adapter, 0x100, command);
 152
 153         for (i = 0; i < retries; i++) {
 154                 value = read_reg_dw(adapter, 0x100);
 155
 156                 if ((value & 0x40000000) == 0) {
 157                         if ((value & 0x81000000) == 0x80000000) {
 158                                 if (buf != 0)
 159                                         *buf = (value >> 0x10) & 0xff;
 160
 161                                 return 1;
 162                         }
 163                 } else {
 164                         write_reg_dw(adapter, 0x100, 0);
 165                         write_reg_dw(adapter, 0x100, command);
 166                 }
 167         }
 168
 169         return 0;
 170 }
 171
 172 /* device = 0x10000000 for tuner, 0x20000000 for eeprom */
 173 static void i2c_main_setup(u32 device, u32 chip_addr, u8 op, u8 addr, u32 value, u32 len, u32 *command)
 174 {
 175         *command = device | ((len - 1) << 26) | (value << 16) | (addr << 8) | chip_addr;
 176
 177         if (op != 0)
 178                 *command = *command | 0x03000000;
 179         else
 180                 *command = *command | 0x01000000;
 181 }
 182
 183 static int flex_i2c_read4(struct adapter *adapter, u32 device, u32 chip_addr, u16 addr, u8 *buf, u8 len)
 184 {
 185         u32 command;
 186         u32 value;
 187
 188         int result, i;
 189
 190         i2c_main_setup(device, chip_addr, 1, addr, 0, len, &command);
 191
 192         result = i2c_main_write_for_flex2(adapter, command, buf, 100000);
 193
 194         if ((result & 0xff) != 0) {
 195                 if (len > 1) {
 196                         value = read_reg_dw(adapter, 0x104);
 197
 198                         for (i = 1; i < len; i++) {
 199                                 buf[i] = value & 0xff;
 200                                 value = value >> 8;
 201                         }
 202                 }
 203         }
 204
 205         return result;
 206 }
 207
 208 static int flex_i2c_write4(struct adapter *adapter, u32 device, u32 chip_addr, u32 addr, u8 *buf, u8 len)
 209 {
 210         u32 command;
 211         u32 value;
 212         int i;
 213
 214         if (len > 1) {
 215                 value = 0;
 216
 217                 for (i = len; i > 1; i--) {
 218                         value = value << 8;
 219                         value = value | buf[i - 1];
 220                 }
 221
 222                 write_reg_dw(adapter, 0x104, value);
 223         }
 224
 225         i2c_main_setup(device, chip_addr, 0, addr, buf[0], len, &command);
 226
 227         return i2c_main_write_for_flex2(adapter, command, NULL, 100000);
 228 }
 229
 230 static void fixchipaddr(u32 device, u32 bus, u32 addr, u32 *ret)
 231 {
 232         if (device == 0x20000000)
 233                 *ret = bus | ((addr >> 8) & 3);
 234
 235         *ret = bus;
 236 }
 237
 238 static u32 flex_i2c_read(struct adapter *adapter, u32 device, u32 bus, u32 addr, u8 *buf, u32 len)
 239 {
 240         u32 chipaddr;
 241         u32 bytes_to_transfer;
 242         u8 *start;
 243
 244         ddprintk("%s:\n", __FUNCTION__);
 245
 246         start = buf;
 247
 248         while (len != 0) {
 249                 bytes_to_transfer = len;
 250
 251                 if (bytes_to_transfer > 4)
 252                         bytes_to_transfer = 4;
 253
 254                 fixchipaddr(device, bus, addr, &chipaddr);
 255
 256                 if (flex_i2c_read4(adapter, device, chipaddr, addr, buf, bytes_to_transfer) == 0)
 257                         return buf - start;
 258
 259                 buf = buf + bytes_to_transfer;
 260                 addr = addr + bytes_to_transfer;
 261                 len = len - bytes_to_transfer;
 262         };
 263
 264         return buf - start;
 265 }
 266
 267 static u32 flex_i2c_write(struct adapter *adapter, u32 device, u32 bus, u32 addr, u8 *buf, u32 len)
 268 {
 269         u32 chipaddr;
 270         u32 bytes_to_transfer;
 271         u8 *start;
 272
 273         ddprintk("%s:\n", __FUNCTION__);
 274
 275         start = buf;
 276
 277         while (len != 0) {
 278                 bytes_to_transfer = len;
 279
 280                 if (bytes_to_transfer > 4)
 281                         bytes_to_transfer = 4;
 282
 283                 fixchipaddr(device, bus, addr, &chipaddr);
 284
 285                 if (flex_i2c_write4(adapter, device, chipaddr, addr, buf, bytes_to_transfer) == 0)
 286                         return buf - start;
 287
 288                 buf = buf + bytes_to_transfer;
 289                 addr = addr + bytes_to_transfer;
 290                 len = len - bytes_to_transfer;
 291         }
 292
 293         return buf - start;
 294 }
 295
 296 static int master_xfer(struct i2c_adapter* adapter, struct i2c_msg msgs[], int num)
 297 {
 298         struct adapter *tmp = i2c_get_adapdata(adapter);
 299         int i, ret = 0;
 300
 301         if (down_interruptible(&tmp->i2c_sem))
 302                 return -ERESTARTSYS;
 303
 304         ddprintk("%s: %d messages to transfer\n", __FUNCTION__, num);
 305
 306                 for (i = 0; i < num; i++) {
 307                 ddprintk("message %d: flags=0x%x, addr=0x%x, buf=0x%x, len=%d \n", i,
 308                          msgs[i].flags, msgs[i].addr, msgs[i].buf[0], msgs[i].len);
 309         }
 310
 311         // read command
 312         if ((num == 2) && (msgs[0].flags == 0) && (msgs[1].flags == I2C_M_RD) && (msgs[0].buf != NULL) && (msgs[1].buf != NULL)) {
 313
 314                 ret = flex_i2c_read(tmp, 0x10000000, msgs[0].addr, msgs[0].buf[0], msgs[1].buf, msgs[1].len);
 315
 316                 up(&tmp->i2c_sem);
 317
 318                 if (ret != msgs[1].len) {
 319                         dprintk("%s: read error !\n", __FUNCTION__);
 320
 321                         for (i = 0; i < 2; i++) {
 322                                 dprintk("message %d: flags=0x%x, addr=0x%x, buf=0x%x, len=%d \n", i,
 323                                        msgs[i].flags, msgs[i].addr, msgs[i].buf[0], msgs[i].len);
 324                 }
 325
 326                         return -EREMOTEIO;
 327                 }
 328
 329                 return num;
 330         }
 331         // write command
 332         for (i = 0; i < num; i++) {
 333
 334                 if ((msgs[i].flags != 0) || (msgs[i].buf == NULL) || (msgs[i].len < 2))
 335                         return -EINVAL;
 336
 337                 ret = flex_i2c_write(tmp, 0x10000000, msgs[i].addr, msgs[i].buf[0], &msgs[i].buf[1], msgs[i].len - 1);
 338
 339                 up(&tmp->i2c_sem);
 340
 341                 if (ret != msgs[0].len - 1) {
 342                         dprintk("%s: write error %i !\n", __FUNCTION__, ret);
 343
 344                         dprintk("message %d: flags=0x%x, addr=0x%x, buf[0]=0x%x, len=%d \n", i,
 345                                msgs[i].flags, msgs[i].addr, msgs[i].buf[0], msgs[i].len);
 346
 347                         return -EREMOTEIO;
 348                 }
 349
 350                 return num;
 351         }
 352
 353         printk("%s: unknown command format !\n", __FUNCTION__);
 354
 355         return -EINVAL;
 356 }
 357
 358 /* SRAM (Skystar2 rev2.3 has one "ISSI IS61LV256" chip on board,
 359    but it seems that FlexCopII can work with more than one chip) */
 360 static void sram_set_net_dest(struct adapter *adapter, u8 dest)
 361 {
 362         u32 tmp;
 363
 364         udelay(1000);
 365
 366         tmp = (read_reg_dw(adapter, 0x714) & 0xfffffffc) | (dest & 3);
 367
 368         udelay(1000);
 369
 370         write_reg_dw(adapter, 0x714, tmp);
 371         write_reg_dw(adapter, 0x714, tmp);
 372
 373         udelay(1000);
 374
 375         /* return value is never used? */
 376 /*      return tmp; */
 377 }
 378
 379 static void sram_set_cai_dest(struct adapter *adapter, u8 dest)
 380 {
 381         u32 tmp;
 382
 383         udelay(1000);
 384
 385         tmp = (read_reg_dw(adapter, 0x714) & 0xfffffff3) | ((dest & 3) << 2);
 386
 387         udelay(1000);
 388         udelay(1000);
 389
 390         write_reg_dw(adapter, 0x714, tmp);
 391         write_reg_dw(adapter, 0x714, tmp);
 392
 393         udelay(1000);
 394
 395         /* return value is never used? */
 396 /*      return tmp; */
 397 }
 398
 399 static void sram_set_cao_dest(struct adapter *adapter, u8 dest)
 400 {
 401         u32 tmp;
 402
 403         udelay(1000);
 404
 405         tmp = (read_reg_dw(adapter, 0x714) & 0xffffffcf) | ((dest & 3) << 4);
 406
 407         udelay(1000);
 408         udelay(1000);
 409
 410         write_reg_dw(adapter, 0x714, tmp);
 411         write_reg_dw(adapter, 0x714, tmp);
 412
 413         udelay(1000);
 414
 415         /* return value is never used? */
 416 /*      return tmp; */
 417 }
 418
 419 static void sram_set_media_dest(struct adapter *adapter, u8 dest)
 420 {
 421         u32 tmp;
 422
 423         udelay(1000);
 424
 425         tmp = (read_reg_dw(adapter, 0x714) & 0xffffff3f) | ((dest & 3) << 6);
 426
 427         udelay(1000);
 428         udelay(1000);
 429
 430         write_reg_dw(adapter, 0x714, tmp);
 431         write_reg_dw(adapter, 0x714, tmp);
 432
 433         udelay(1000);
 434
 435         /* return value is never used? */
 436 /*      return tmp; */
 437 }
 438
 439 /* SRAM memory is accessed through a buffer register in the FlexCop
 440    chip (0x700). This register has the following structure:
 441     bits 0-14  : address
 442     bit  15    : read/write flag
 443     bits 16-23 : 8-bit word to write
 444     bits 24-27 : = 4
 445     bits 28-29 : memory bank selector
 446     bit  31    : busy flag
 447 */
 448 static void flex_sram_write(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
 449 {
 450         int i, retries;
 451         u32 command;
 452
 453         for (i = 0; i < len; i++) {
 454                 command = bank | addr | 0x04000000 | (*buf << 0x10);
 455
 456                 retries = 2;
 457
 458                 while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
 459                         mdelay(1);
 460                         retries--;
 461                 };
 462
 463                 if (retries == 0)
 464                         printk("%s: SRAM timeout\n", __FUNCTION__);
 465
 466                 write_reg_dw(adapter, 0x700, command);
 467
 468                 buf++;
 469                 addr++;
 470         }
 471 }
 472
 473 static void flex_sram_read(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
 474 {
 475         int i, retries;
 476         u32 command, value;
 477
 478         for (i = 0; i < len; i++) {
 479                 command = bank | addr | 0x04008000;
 480
 481                 retries = 10000;
 482
 483                 while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
 484                         mdelay(1);
 485                         retries--;
 486                 };
 487
 488                 if (retries == 0)
 489                         printk("%s: SRAM timeout\n", __FUNCTION__);
 490
 491                 write_reg_dw(adapter, 0x700, command);
 492
 493                 retries = 10000;
 494
 495                 while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
 496                         mdelay(1);
 497                         retries--;
 498                 };
 499
 500                 if (retries == 0)
 501                         printk("%s: SRAM timeout\n", __FUNCTION__);
 502
 503                 value = read_reg_dw(adapter, 0x700) >> 0x10;
 504
 505                 *buf = (value & 0xff);
 506
 507                 addr++;
 508                 buf++;
 509         }
 510 }
 511
 512 static void sram_write_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
 513 {
 514         u32 bank;
 515
 516         bank = 0;
 517
 518         if (adapter->dw_sram_type == 0x20000) {
 519                 bank = (addr & 0x18000) << 0x0d;
 520         }
 521
 522         if (adapter->dw_sram_type == 0x00000) {
 523                 if ((addr >> 0x0f) == 0)
 524                         bank = 0x20000000;
 525                 else
 526                         bank = 0x10000000;
 527         }
 528
 529         flex_sram_write(adapter, bank, addr & 0x7fff, buf, len);
 530 }
 531
 532 static void sram_read_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
 533 {
 534         u32 bank;
 535
 536         bank = 0;
 537
 538         if (adapter->dw_sram_type == 0x20000) {
 539                 bank = (addr & 0x18000) << 0x0d;
 540         }
 541
 542         if (adapter->dw_sram_type == 0x00000) {
 543                 if ((addr >> 0x0f) == 0)
 544                         bank = 0x20000000;
 545                 else
 546                         bank = 0x10000000;
 547         }
 548
 549         flex_sram_read(adapter, bank, addr & 0x7fff, buf, len);
 550 }
 551
 552 static void sram_read(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
 553 {
 554         u32 length;
 555
 556         while (len != 0) {
 557                 length = len;
 558
 559                 // check if the address range belongs to the same
 560                 // 32K memory chip. If not, the data is read from
 561                 // one chip at a time.
 562                 if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
 563                         length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
 564                 }
 565
 566                 sram_read_chunk(adapter, addr, buf, length);
 567
 568                 addr = addr + length;
 569                 buf = buf + length;
 570                 len = len - length;
 571         }
 572 }
 573
 574 static void sram_write(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
 575 {
 576         u32 length;
 577
 578         while (len != 0) {
 579                 length = len;
 580
 581                 // check if the address range belongs to the same
 582                 // 32K memory chip. If not, the data is written to
 583                 // one chip at a time.
 584                 if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
 585                         length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
 586                 }
 587
 588                 sram_write_chunk(adapter, addr, buf, length);
 589
 590                 addr = addr + length;
 591                 buf = buf + length;
 592                 len = len - length;
 593         }
 594 }
 595
 596 static void sram_set_size(struct adapter *adapter, u32 mask)
 597 {
 598         write_reg_dw(adapter, 0x71c, (mask | (~0x30000 & read_reg_dw(adapter, 0x71c))));
 599 }
 600
 601 static void sram_init(struct adapter *adapter)
 602 {
 603         u32 tmp;
 604
 605         tmp = read_reg_dw(adapter, 0x71c);
 606
 607         write_reg_dw(adapter, 0x71c, 1);
 608
 609         if (read_reg_dw(adapter, 0x71c) != 0) {
 610                 write_reg_dw(adapter, 0x71c, tmp);
 611
 612                 adapter->dw_sram_type = tmp & 0x30000;
 613
 614                 ddprintk("%s: dw_sram_type = %x\n", __FUNCTION__, adapter->dw_sram_type);
 615
 616         } else {
 617
 618                 adapter->dw_sram_type = 0x10000;
 619
 620                 ddprintk("%s: dw_sram_type = %x\n", __FUNCTION__, adapter->dw_sram_type);
 621         }
 622
 623         /* return value is never used? */
 624 /*      return adapter->dw_sram_type; */
 625 }
 626
 627 static int sram_test_location(struct adapter *adapter, u32 mask, u32 addr)
 628 {
 629         u8 tmp1, tmp2;
 630
 631         dprintk("%s: mask = %x, addr = %x\n", __FUNCTION__, mask, addr);
 632
 633         sram_set_size(adapter, mask);
 634         sram_init(adapter);
 635
 636         tmp2 = 0xa5;
 637         tmp1 = 0x4f;
 638
 639         sram_write(adapter, addr, &tmp2, 1);
 640         sram_write(adapter, addr + 4, &tmp1, 1);
 641
 642         tmp2 = 0;
 643
 644         mdelay(20);
 645
 646         sram_read(adapter, addr, &tmp2, 1);
 647         sram_read(adapter, addr, &tmp2, 1);
 648
 649         dprintk("%s: wrote 0xa5, read 0x%2x\n", __FUNCTION__, tmp2);
 650
 651         if (tmp2 != 0xa5)
 652                 return 0;
 653
 654         tmp2 = 0x5a;
 655         tmp1 = 0xf4;
 656
 657         sram_write(adapter, addr, &tmp2, 1);
 658         sram_write(adapter, addr + 4, &tmp1, 1);
 659
 660         tmp2 = 0;
 661
 662         mdelay(20);
 663
 664         sram_read(adapter, addr, &tmp2, 1);
 665         sram_read(adapter, addr, &tmp2, 1);
 666
 667         dprintk("%s: wrote 0x5a, read 0x%2x\n", __FUNCTION__, tmp2);
 668
 669         if (tmp2 != 0x5a)
 670                 return 0;
 671
 672         return 1;
 673 }
 674
 675 static u32 sram_length(struct adapter *adapter)
 676 {
 677         if (adapter->dw_sram_type == 0x10000)
 678                 return 32768;   //  32K
 679         if (adapter->dw_sram_type == 0x00000)
 680                 return 65536;   //  64K
 681         if (adapter->dw_sram_type == 0x20000)
 682                 return 131072;  // 128K
 683
 684         return 32768;           // 32K
 685 }
 686
 687 /* FlexcopII can work with 32K, 64K or 128K of external SRAM memory.
 688     - for 128K there are 4x32K chips at bank 0,1,2,3.
 689     - for  64K there are 2x32K chips at bank 1,2.
 690     - for  32K there is one 32K chip at bank 0.
 691
 692    FlexCop works only with one bank at a time. The bank is selected
 693    by bits 28-29 of the 0x700 register.
 694
 695    bank 0 covers addresses 0x00000-0x07fff
 696    bank 1 covers addresses 0x08000-0x0ffff
 697    bank 2 covers addresses 0x10000-0x17fff
 698    bank 3 covers addresses 0x18000-0x1ffff
 699 */
 700 static int sram_detect_for_flex2(struct adapter *adapter)
 701 {
 702         u32 tmp, tmp2, tmp3;
 703
 704         dprintk("%s:\n", __FUNCTION__);
 705
 706         tmp = read_reg_dw(adapter, 0x208);
 707         write_reg_dw(adapter, 0x208, 0);
 708
 709         tmp2 = read_reg_dw(adapter, 0x71c);
 710
 711         dprintk("%s: tmp2 = %x\n", __FUNCTION__, tmp2);
 712
 713         write_reg_dw(adapter, 0x71c, 1);
 714
 715         tmp3 = read_reg_dw(adapter, 0x71c);
 716
 717         dprintk("%s: tmp3 = %x\n", __FUNCTION__, tmp3);
 718
 719         write_reg_dw(adapter, 0x71c, tmp2);
 720
 721         // check for internal SRAM ???
 722         tmp3--;
 723         if (tmp3 != 0) {
 724                 sram_set_size(adapter, 0x10000);
 725                 sram_init(adapter);
 726                 write_reg_dw(adapter, 0x208, tmp);
 727
 728                 dprintk("%s: sram size = 32K\n", __FUNCTION__);
 729
 730                 return 32;
 731         }
 732
 733         if (sram_test_location(adapter, 0x20000, 0x18000) != 0) {
 734                 sram_set_size(adapter, 0x20000);
 735                 sram_init(adapter);
 736                 write_reg_dw(adapter, 0x208, tmp);
 737
 738                 dprintk("%s: sram size = 128K\n", __FUNCTION__);
 739
 740                 return 128;
 741         }
 742
 743         if (sram_test_location(adapter, 0x00000, 0x10000) != 0) {
 744                 sram_set_size(adapter, 0x00000);
 745                 sram_init(adapter);
 746                 write_reg_dw(adapter, 0x208, tmp);
 747
 748                 dprintk("%s: sram size = 64K\n", __FUNCTION__);
 749
 750                 return 64;
 751         }
 752
 753         if (sram_test_location(adapter, 0x10000, 0x00000) != 0) {
 754                 sram_set_size(adapter, 0x10000);
 755                 sram_init(adapter);
 756                 write_reg_dw(adapter, 0x208, tmp);
 757
 758                 dprintk("%s: sram size = 32K\n", __FUNCTION__);
 759
 760                 return 32;
 761         }
 762
 763         sram_set_size(adapter, 0x10000);
 764         sram_init(adapter);
 765         write_reg_dw(adapter, 0x208, tmp);
 766
 767         dprintk("%s: SRAM detection failed. Set to 32K \n", __FUNCTION__);
 768
 769         return 0;
 770 }
 771
 772 static void sll_detect_sram_size(struct adapter *adapter)
 773 {
 774         sram_detect_for_flex2(adapter);
 775 }
 776
 777 /* EEPROM (Skystar2 has one "24LC08B" chip on board) */
 778 /*
 779 static int eeprom_write(struct adapter *adapter, u16 addr, u8 *buf, u16 len)
 780 {
 781         return flex_i2c_write(adapter, 0x20000000, 0x50, addr, buf, len);
 782 }
 783 */
 784
 785 static int eeprom_read(struct adapter *adapter, u16 addr, u8 *buf, u16 len)
 786 {
 787         return flex_i2c_read(adapter, 0x20000000, 0x50, addr, buf, len);
 788 }
 789
 790 static u8 calc_lrc(u8 *buf, int len)
 791 {
 792         int i;
 793         u8 sum;
 794
 795         sum = 0;
 796
 797         for (i = 0; i < len; i++)
 798                 sum = sum ^ buf[i];
 799
 800         return sum;
 801 }
 802
 803 static int eeprom_lrc_read(struct adapter *adapter, u32 addr, u32 len, u8 *buf, int retries)
 804 {
 805         int i;
 806
 807         for (i = 0; i < retries; i++) {
 808                 if (eeprom_read(adapter, addr, buf, len) == len) {
 809                         if (calc_lrc(buf, len - 1) == buf[len - 1])
 810                                 return 1;
 811                 }
 812         }
 813
 814         return 0;
 815 }
 816
 817 /*
 818 static int eeprom_lrc_write(struct adapter *adapter, u32 addr, u32 len, u8 *wbuf, u8 *rbuf, int retries)
 819 {
 820         int i;
 821
 822         for (i = 0; i < retries; i++) {
 823                 if (eeprom_write(adapter, addr, wbuf, len) == len) {
 824                         if (eeprom_lrc_read(adapter, addr, len, rbuf, retries) == 1)
 825                                 return 1;
 826                 }
 827         }
 828
 829         return 0;
 830 }
 831 */
 832
 833
 834 /* These functions could be used to unlock SkyStar2 cards. */
 835
 836 /*
 837 static int eeprom_writeKey(struct adapter *adapter, u8 *key, u32 len)
 838 {
 839         u8 rbuf[20];
 840         u8 wbuf[20];
 841
 842         if (len != 16)
 843                 return 0;
 844
 845         memcpy(wbuf, key, len);
 846
 847         wbuf[16] = 0;
 848         wbuf[17] = 0;
 849         wbuf[18] = 0;
 850         wbuf[19] = calc_lrc(wbuf, 19);
 851
 852         return eeprom_lrc_write(adapter, 0x3e4, 20, wbuf, rbuf, 4);
 853 }
 854
 855 static int eeprom_readKey(struct adapter *adapter, u8 *key, u32 len)
 856 {
 857         u8 buf[20];
 858
 859         if (len != 16)
 860                 return 0;
 861
 862         if (eeprom_lrc_read(adapter, 0x3e4, 20, buf, 4) == 0)
 863                 return 0;
 864
 865         memcpy(key, buf, len);
 866
 867         return 1;
 868 }
 869 */
 870
 871 static int eeprom_get_mac_addr(struct adapter *adapter, char type, u8 *mac)
 872 {
 873         u8 tmp[8];
 874
 875         if (eeprom_lrc_read(adapter, 0x3f8, 8, tmp, 4) != 0) {
 876                 if (type != 0) {
 877                         mac[0] = tmp[0];
 878                         mac[1] = tmp[1];
 879                         mac[2] = tmp[2];
 880                         mac[3] = 0xfe;
 881                         mac[4] = 0xff;
 882                         mac[5] = tmp[3];
 883                         mac[6] = tmp[4];
 884                         mac[7] = tmp[5];
 885
 886                 } else {
 887
 888                         mac[0] = tmp[0];
 889                         mac[1] = tmp[1];
 890                         mac[2] = tmp[2];
 891                         mac[3] = tmp[3];
 892                         mac[4] = tmp[4];
 893                         mac[5] = tmp[5];
 894                 }
 895
 896                 return 1;
 897
 898         } else {
 899
 900                 if (type == 0) {
 901                         memset(mac, 0, 6);
 902
 903                 } else {
 904
 905                         memset(mac, 0, 8);
 906                 }
 907
 908                 return 0;
 909         }
 910 }
 911
 912 /*
 913 static char eeprom_set_mac_addr(struct adapter *adapter, char type, u8 *mac)
 914 {
 915         u8 tmp[8];
 916
 917         if (type != 0) {
 918                 tmp[0] = mac[0];
 919                 tmp[1] = mac[1];
 920                 tmp[2] = mac[2];
 921                 tmp[3] = mac[5];
 922                 tmp[4] = mac[6];
 923                 tmp[5] = mac[7];
 924
 925         } else {
 926
 927                 tmp[0] = mac[0];
 928                 tmp[1] = mac[1];
 929                 tmp[2] = mac[2];
 930                 tmp[3] = mac[3];
 931                 tmp[4] = mac[4];
 932                 tmp[5] = mac[5];
 933         }
 934
 935         tmp[6] = 0;
 936         tmp[7] = calc_lrc(tmp, 7);
 937
 938         if (eeprom_write(adapter, 0x3f8, tmp, 8) == 8)
 939                 return 1;
 940
 941         return 0;
 942 }
 943 */
 944
 945 /* PID filter */
 946
 947 /* every flexcop has 6 "lower" hw PID filters     */
 948 /* these are enabled by setting bits 0-5 of 0x208 */
 949 /* for the 32 additional filters we have to select one */
 950 /* of them through 0x310 and modify through 0x314 */
 951 /* op: 0=disable, 1=enable */
 952 static void filter_enable_hw_filter(struct adapter *adapter, int id, u8 op)
 953 {
 954         dprintk("%s: id=%d op=%d\n", __FUNCTION__, id, op);
 955         if (id <= 5) {
 956                 u32 mask = (0x00000001 << id);
 957                 write_reg_bitfield(adapter, 0x208, mask, op ? mask : 0);
 958         } else {
 959                 /* select */
 960                 write_reg_bitfield(adapter, 0x310, 0x1f, (id - 6) & 0x1f);
 961                 /* modify */
 962                 write_reg_bitfield(adapter, 0x314, 0x00006000, op ? 0x00004000 : 0);
 963         }
 964 }
 965
 966 /* this sets the PID that should pass the specified filter */
 967 static void pid_set_hw_pid(struct adapter *adapter, int id, u16 pid)
 968 {
 969         dprintk("%s: id=%d  pid=%d\n", __FUNCTION__, id, pid);
 970         if (id <= 5) {
 971                 u32 adr = 0x300 + ((id & 6) << 1);
 972                 int shift = (id & 1) ? 16 : 0;
 973                 dprintk("%s: id=%d  addr=%x %c  pid=%d\n", __FUNCTION__, id, adr, (id & 1) ? 'h' : 'l', pid);
 974                 write_reg_bitfield(adapter, adr, (0x7fff) << shift, (pid & 0x1fff) << shift);
 975         } else {
 976                 /* select */
 977                 write_reg_bitfield(adapter, 0x310, 0x1f, (id - 6) & 0x1f);
 978                 /* modify */
 979                 write_reg_bitfield(adapter, 0x314, 0x1fff, pid & 0x1fff);
 980         }
 981 }
 982
 983
 984 /*
 985 static void filter_enable_null_filter(struct adapter *adapter, u32 op)
 986 {
 987         dprintk("%s: op=%x\n", __FUNCTION__, op);
 988
 989         write_reg_bitfield(adapter, 0x208, 0x00000040, op?0x00000040:0);
 990 }
 991 */
 992
 993 static void filter_enable_mask_filter(struct adapter *adapter, u32 op)
 994 {
 995         dprintk("%s: op=%x\n", __FUNCTION__, op);
 996
 997         write_reg_bitfield(adapter, 0x208, 0x00000080, op ? 0x00000080 : 0);
 998 }
 999
1000
1001 static void ctrl_enable_mac(struct adapter *adapter, u32 op)
1002 {
1003         write_reg_bitfield(adapter, 0x208, 0x00004000, op ? 0x00004000 : 0);
1004 }
1005
1006 static int ca_set_mac_dst_addr_filter(struct adapter *adapter, u8 *mac)
1007 {
1008         u32 tmp1, tmp2;
1009
1010         tmp1 = (mac[3] << 0x18) | (mac[2] << 0x10) | (mac[1] << 0x08) | mac[0];
1011         tmp2 = (mac[5] << 0x08) | mac[4];
1012
1013         write_reg_dw(adapter, 0x418, tmp1);
1014         write_reg_dw(adapter, 0x41c, tmp2);
1015
1016         return 0;
1017 }
1018
1019 /*
1020 static void set_ignore_mac_filter(struct adapter *adapter, u8 op)
1021 {
1022         if (op != 0) {
1023                 write_reg_bitfield(adapter, 0x208, 0x00004000, 0);
1024                 adapter->mac_filter = 1;
1025         } else {
1026                 if (adapter->mac_filter != 0) {
1027                         adapter->mac_filter = 0;
1028                         write_reg_bitfield(adapter, 0x208, 0x00004000, 0x00004000);
1029                 }
1030         }
1031 }
1032 */
1033
1034 /*
1035 static void check_null_filter_enable(struct adapter *adapter)
1036 {
1037         filter_enable_null_filter(adapter, 1);
1038         filter_enable_mask_filter(adapter, 1);
1039 }
1040 */
1041
1042 static void pid_set_group_pid(struct adapter *adapter, u16 pid)
1043 {
1044         u32 value;
1045
1046         dprintk("%s: pid=%x\n", __FUNCTION__, pid);
1047         value = (pid & 0x3fff) | (read_reg_dw(adapter, 0x30c) & 0xffff0000);
1048         write_reg_dw(adapter, 0x30c, value);
1049 }
1050
1051 static void pid_set_group_mask(struct adapter *adapter, u16 pid)
1052 {
1053         u32 value;
1054
1055         dprintk("%s: pid=%x\n", __FUNCTION__, pid);
1056         value = ((pid & 0x3fff) << 0x10) | (read_reg_dw(adapter, 0x30c) & 0xffff);
1057         write_reg_dw(adapter, 0x30c, value);
1058 }
1059
1060 /*
1061 static int pid_get_group_pid(struct adapter *adapter)
1062 {
1063         return read_reg_dw(adapter, 0x30c) & 0x00001fff;
1064 }
1065
1066 static int pid_get_group_mask(struct adapter *adapter)
1067 {
1068         return (read_reg_dw(adapter, 0x30c) >> 0x10)& 0x00001fff;
1069 }
1070 */
1071
1072 /*
1073 static void reset_hardware_pid_filter(struct adapter *adapter)
1074 {
1075         pid_set_stream1_pid(adapter, 0x1fff);
1076
1077         pid_set_stream2_pid(adapter, 0x1fff);
1078         filter_enable_stream2_filter(adapter, 0);
1079
1080         pid_set_pcr_pid(adapter, 0x1fff);
1081         filter_enable_pcr_filter(adapter, 0);
1082
1083         pid_set_pmt_pid(adapter, 0x1fff);
1084         filter_enable_pmt_filter(adapter, 0);
1085
1086         pid_set_ecm_pid(adapter, 0x1fff);
1087         filter_enable_ecm_filter(adapter, 0);
1088
1089         pid_set_emm_pid(adapter, 0x1fff);
1090         filter_enable_emm_filter(adapter, 0);
1091 }
1092 */
1093
1094 static void init_pids(struct adapter *adapter)
1095 {
1096         int i;
1097
1098         adapter->pid_count = 0;
1099         adapter->whole_bandwidth_count = 0;
1100         for (i = 0; i < adapter->useable_hw_filters; i++) {
1101                 dprintk("%s: setting filter %d to 0x1fff\n", __FUNCTION__, i);
1102                 adapter->hw_pids[i] = 0x1fff;
1103                 pid_set_hw_pid(adapter, i, 0x1fff);
1104 }
1105
1106         pid_set_group_pid(adapter, 0);
1107         pid_set_group_mask(adapter, 0x1fe0);
1108 }
1109
1110 static void open_whole_bandwidth(struct adapter *adapter)
1111 {
1112         dprintk("%s:\n", __FUNCTION__);
1113         pid_set_group_pid(adapter, 0);
1114         pid_set_group_mask(adapter, 0);
1115 /*
1116         filter_enable_mask_filter(adapter, 1);
1117 */
1118 }
1119
1120 static void close_whole_bandwidth(struct adapter *adapter)
1121 {
1122         dprintk("%s:\n", __FUNCTION__);
1123         pid_set_group_pid(adapter, 0);
1124         pid_set_group_mask(adapter, 0x1fe0);
1125 /*
1126         filter_enable_mask_filter(adapter, 1);
1127 */
1128 }
1129
1130 static void whole_bandwidth_inc(struct adapter *adapter)
1131 {
1132         if (adapter->whole_bandwidth_count++ == 0)
1133                 open_whole_bandwidth(adapter);
1134 }
1135
1136 static void whole_bandwidth_dec(struct adapter *adapter)
1137 {
1138         if (--adapter->whole_bandwidth_count <= 0)
1139                 close_whole_bandwidth(adapter);
1140 }
1141
1142 /* The specified PID has to be let through the
1143    hw filters.
1144    We try to allocate an hardware filter and open whole
1145    bandwidth when allocation is impossible.
1146    All pids<=0x1f pass through the group filter.
1147    Returns 1 on success, -1 on error */
1148 static int add_hw_pid(struct adapter *adapter, u16 pid)
1149 {
1150         int i;
1151
1152         dprintk("%s: pid=%d\n", __FUNCTION__, pid);
1153
1154         if (pid <= 0x1f)
1155                 return 1;
1156
1157         /* we can't use a filter for 0x2000, so no search */
1158         if (pid != 0x2000) {
1159                 /* find an unused hardware filter */
1160                 for (i = 0; i < adapter->useable_hw_filters; i++) {
1161                         dprintk("%s: pid=%d searching slot=%d\n", __FUNCTION__, pid, i);
1162                         if (adapter->hw_pids[i] == 0x1fff) {
1163                                 dprintk("%s: pid=%d slot=%d\n", __FUNCTION__, pid, i);
1164                                 adapter->hw_pids[i] = pid;
1165                                 pid_set_hw_pid(adapter, i, pid);
1166                                 filter_enable_hw_filter(adapter, i, 1);
1167                 return 1;
1168         }
1169         }
1170         }
1171         /* if we have not used a filter, this pid depends on whole bandwidth */
1172         dprintk("%s: pid=%d whole_bandwidth\n", __FUNCTION__, pid);
1173         whole_bandwidth_inc(adapter);
1174                 return 1;
1175         }
1176
1177 /* returns -1 if the pid was not present in the filters */
1178 static int remove_hw_pid(struct adapter *adapter, u16 pid)
1179 {
1180         int i;
1181
1182         dprintk("%s: pid=%d\n", __FUNCTION__, pid);
1183
1184         if (pid <= 0x1f)
1185                 return 1;
1186
1187         /* we can't use a filter for 0x2000, so no search */
1188         if (pid != 0x2000) {
1189                 for (i = 0; i < adapter->useable_hw_filters; i++) {
1190                         dprintk("%s: pid=%d searching slot=%d\n", __FUNCTION__, pid, i);
1191                         if (adapter->hw_pids[i] == pid) {       // find the pid slot
1192                                 dprintk("%s: pid=%d slot=%d\n", __FUNCTION__, pid, i);
1193                                 adapter->hw_pids[i] = 0x1fff;
1194                                 pid_set_hw_pid(adapter, i, 0x1fff);
1195                                 filter_enable_hw_filter(adapter, i, 0);
1196                 return 1;
1197         }
1198         }
1199         }
1200         /* if we have not used a filter, this pid depended on whole bandwith */
1201         dprintk("%s: pid=%d whole_bandwidth\n", __FUNCTION__, pid);
1202         whole_bandwidth_dec(adapter);
1203                 return 1;
1204         }
1205
1206 /* Adds a PID to the filters.
1207    Adding a pid more than once is possible, we keep reference counts.
1208    Whole stream available through pid==0x2000.
1209    Returns 1 on success, -1 on error */
1210 static int add_pid(struct adapter *adapter, u16 pid)
1211 {
1212         int i;
1213
1214         dprintk("%s: pid=%d\n", __FUNCTION__, pid);
1215
1216         if (pid > 0x1ffe && pid != 0x2000)
1217                 return -1;
1218
1219         // check if the pid is already present
1220         for (i = 0; i < adapter->pid_count; i++)
1221                 if (adapter->pid_list[i] == pid) {
1222                         adapter->pid_rc[i]++;   // increment ref counter
1223                 return 1;
1224                 }
1225
1226         if (adapter->pid_count == N_PID_SLOTS)
1227                 return -1;      // no more pids can be added
1228         adapter->pid_list[adapter->pid_count] = pid;    // register pid
1229         adapter->pid_rc[adapter->pid_count] = 1;
1230         adapter->pid_count++;
1231         // hardware setting
1232         add_hw_pid(adapter, pid);
1233
1234                         return 1;
1235                 }
1236
1237 /* Removes a PID from the filters. */
1238 static int remove_pid(struct adapter *adapter, u16 pid)
1239 {
1240         int i;
1241
1242         dprintk("%s: pid=%d\n", __FUNCTION__, pid);
1243
1244         if (pid > 0x1ffe && pid != 0x2000)
1245                 return -1;
1246
1247         // check if the pid is present (it must be!)
1248         for (i = 0; i < adapter->pid_count; i++) {
1249                 if (adapter->pid_list[i] == pid) {
1250                         adapter->pid_rc[i]--;
1251                         if (adapter->pid_rc[i] <= 0) {
1252                                 // remove from the list
1253                                 adapter->pid_count--;
1254                                 adapter->pid_list[i]=adapter->pid_list[adapter->pid_count];
1255                                 adapter->pid_rc[i] = adapter->pid_rc[adapter->pid_count];
1256                                 // hardware setting
1257                                 remove_hw_pid(adapter, pid);
1258                         }
1259                         return 1;
1260                 }
1261         }
1262
1263         return -1;
1264 }
1265
1266
1267 /* dma & irq */
1268 static void ctrl_enable_smc(struct adapter *adapter, u32 op)
1269 {
1270         write_reg_bitfield(adapter, 0x208, 0x00000800, op ? 0x00000800 : 0);
1271 }
1272
1273 static void dma_enable_disable_irq(struct adapter *adapter, u32 flag1, u32 flag2, u32 flag3)
1274 {
1275         adapter->dma_ctrl = adapter->dma_ctrl & 0x000f0000;
1276
1277         if (flag1 == 0) {
1278                 if (flag2 == 0)
1279                         adapter->dma_ctrl = adapter->dma_ctrl & ~0x00010000;
1280                 else
1281                         adapter->dma_ctrl = adapter->dma_ctrl | 0x00010000;
1282
1283                 if (flag3 == 0)
1284                         adapter->dma_ctrl = adapter->dma_ctrl & ~0x00020000;
1285                 else
1286                         adapter->dma_ctrl = adapter->dma_ctrl | 0x00020000;
1287
1288         } else {
1289
1290                 if (flag2 == 0)
1291                         adapter->dma_ctrl = adapter->dma_ctrl & ~0x00040000;
1292                 else
1293                         adapter->dma_ctrl = adapter->dma_ctrl | 0x00040000;
1294
1295                 if (flag3 == 0)
1296                         adapter->dma_ctrl = adapter->dma_ctrl & ~0x00080000;
1297                 else
1298                         adapter->dma_ctrl = adapter->dma_ctrl | 0x00080000;
1299         }
1300 }
1301
1302 static void irq_dma_enable_disable_irq(struct adapter *adapter, u32 op)
1303 {
1304         u32 value;
1305
1306         value = read_reg_dw(adapter, 0x208) & 0xfff0ffff;
1307
1308         if (op != 0)
1309                 value = value | (adapter->dma_ctrl & 0x000f0000);
1310
1311         write_reg_dw(adapter, 0x208, value);
1312 }
1313
1314 /* FlexCopII has 2 dma channels. DMA1 is used to transfer TS data to
1315    system memory.
1316
1317    The DMA1 buffer is divided in 2 subbuffers of equal size.
1318    FlexCopII will transfer TS data to one subbuffer, signal an interrupt
1319    when the subbuffer is full and continue fillig the second subbuffer.
1320
1321    For DMA1:
1322        subbuffer size in 32-bit words is stored in the first 24 bits of
1323        register 0x004. The last 8 bits of register 0x004 contain the number
1324        of subbuffers.
1325
1326        the first 30 bits of register 0x000 contain the address of the first
1327        subbuffer. The last 2 bits contain 0, when dma1 is disabled and 1,
1328        when dma1 is enabled.
1329
1330        the first 30 bits of register 0x00c contain the address of the second
1331        subbuffer. the last 2 bits contain 1.
1332
1333        register 0x008 will contain the address of the subbuffer that was filled
1334        with TS data, when FlexCopII will generate an interrupt.
1335
1336    For DMA2:
1337        subbuffer size in 32-bit words is stored in the first 24 bits of
1338        register 0x014. The last 8 bits of register 0x014 contain the number
1339        of subbuffers.
1340
1341        the first 30 bits of register 0x010 contain the address of the first
1342        subbuffer.  The last 2 bits contain 0, when dma1 is disabled and 1,
1343        when dma1 is enabled.
1344
1345        the first 30 bits of register 0x01c contain the address of the second
1346        subbuffer. the last 2 bits contain 1.
1347
1348        register 0x018 contains the address of the subbuffer that was filled
1349        with TS data, when FlexCopII generates an interrupt.
1350 */
1351 static int dma_init_dma(struct adapter *adapter, u32 dma_channel)
1352 {
1353         u32 subbuffers, subbufsize, subbuf0, subbuf1;
1354
1355         if (dma_channel == 0) {
1356                 dprintk("%s: Initializing DMA1 channel\n", __FUNCTION__);
1357
1358                 subbuffers = 2;
1359
1360                 subbufsize = (((adapter->dmaq1.buffer_size / 2) / 4) << 8) | subbuffers;
1361
1362                 subbuf0 = adapter->dmaq1.bus_addr & 0xfffffffc;
1363
1364                 subbuf1 = ((adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) & 0xfffffffc) | 1;
1365
1366                 dprintk("%s: first subbuffer address = 0x%x\n", __FUNCTION__, subbuf0);
1367                 udelay(1000);
1368                 write_reg_dw(adapter, 0x000, subbuf0);
1369
1370                 dprintk("%s: subbuffer size = 0x%x\n", __FUNCTION__, (subbufsize >> 8) * 4);
1371                 udelay(1000);
1372                 write_reg_dw(adapter, 0x004, subbufsize);
1373
1374                 dprintk("%s: second subbuffer address = 0x%x\n", __FUNCTION__, subbuf1);
1375                 udelay(1000);
1376                 write_reg_dw(adapter, 0x00c, subbuf1);
1377
1378                 dprintk("%s: counter = 0x%x\n", __FUNCTION__, adapter->dmaq1.bus_addr & 0xfffffffc);
1379                 write_reg_dw(adapter, 0x008, adapter->dmaq1.bus_addr & 0xfffffffc);
1380                 udelay(1000);
1381
1382                 if (subbuffers == 0)
1383                         dma_enable_disable_irq(adapter, 0, 1, 0);
1384                 else
1385                         dma_enable_disable_irq(adapter, 0, 1, 1);
1386
1387                 irq_dma_enable_disable_irq(adapter, 1);
1388
1389                 sram_set_media_dest(adapter, 1);
1390                 sram_set_net_dest(adapter, 1);
1391                 sram_set_cai_dest(adapter, 2);
1392                 sram_set_cao_dest(adapter, 2);
1393         }
1394
1395         if (dma_channel == 1) {
1396                 dprintk("%s: Initializing DMA2 channel\n", __FUNCTION__);
1397
1398                 subbuffers = 2;
1399
1400                 subbufsize = (((adapter->dmaq2.buffer_size / 2) / 4) << 8) | subbuffers;
1401
1402                 subbuf0 = adapter->dmaq2.bus_addr & 0xfffffffc;
1403
1404                 subbuf1 = ((adapter->dmaq2.bus_addr + adapter->dmaq2.buffer_size / 2) & 0xfffffffc) | 1;
1405
1406                 dprintk("%s: first subbuffer address = 0x%x\n", __FUNCTION__, subbuf0);
1407                 udelay(1000);
1408                 write_reg_dw(adapter, 0x010, subbuf0);
1409
1410                 dprintk("%s: subbuffer size = 0x%x\n", __FUNCTION__, (subbufsize >> 8) * 4);
1411                 udelay(1000);
1412                 write_reg_dw(adapter, 0x014, subbufsize);
1413
1414                 dprintk("%s: second buffer address = 0x%x\n", __FUNCTION__, subbuf1);
1415                 udelay(1000);
1416                 write_reg_dw(adapter, 0x01c, subbuf1);
1417
1418                 sram_set_cai_dest(adapter, 2);
1419         }
1420
1421         return 0;
1422 }
1423
1424 static void ctrl_enable_receive_data(struct adapter *adapter, u32 op)
1425 {
1426         if (op == 0) {
1427                 write_reg_bitfield(adapter, 0x208, 0x00008000, 0);
1428                 adapter->dma_status = adapter->dma_status & ~0x00000004;
1429         } else {
1430                 write_reg_bitfield(adapter, 0x208, 0x00008000, 0x00008000);
1431                 adapter->dma_status = adapter->dma_status | 0x00000004;
1432         }
1433 }
1434
1435 /* bit 0 of dma_mask is set to 1 if dma1 channel has to be enabled/disabled
1436    bit 1 of dma_mask is set to 1 if dma2 channel has to be enabled/disabled
1437 */
1438 static void dma_start_stop(struct adapter *adapter, u32 dma_mask, int start_stop)
1439 {
1440         u32 dma_enable, dma1_enable, dma2_enable;
1441
1442         dprintk("%s: dma_mask=%x\n", __FUNCTION__, dma_mask);
1443
1444         if (start_stop == 1) {
1445                 dprintk("%s: starting dma\n", __FUNCTION__);
1446
1447                 dma1_enable = 0;
1448                 dma2_enable = 0;
1449
1450                 if (((dma_mask & 1) != 0) && ((adapter->dma_status & 1) == 0) && (adapter->dmaq1.bus_addr != 0)) {
1451                         adapter->dma_status = adapter->dma_status | 1;
1452                         dma1_enable = 1;
1453                 }
1454
1455                 if (((dma_mask & 2) != 0) && ((adapter->dma_status & 2) == 0) && (adapter->dmaq2.bus_addr != 0)) {
1456                         adapter->dma_status = adapter->dma_status | 2;
1457                         dma2_enable = 1;
1458                 }
1459                 // enable dma1 and dma2
1460                 if ((dma1_enable == 1) && (dma2_enable == 1)) {
1461                         write_reg_dw(adapter, 0x000, adapter->dmaq1.bus_addr | 1);
1462                         write_reg_dw(adapter, 0x00c, (adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) | 1);
1463                         write_reg_dw(adapter, 0x010, adapter->dmaq2.bus_addr | 1);
1464
1465                         ctrl_enable_receive_data(adapter, 1);
1466
1467                         return;
1468                 }
1469                 // enable dma1
1470                 if ((dma1_enable == 1) && (dma2_enable == 0)) {
1471                         write_reg_dw(adapter, 0x000, adapter->dmaq1.bus_addr | 1);
1472                         write_reg_dw(adapter, 0x00c, (adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) | 1);
1473
1474                         ctrl_enable_receive_data(adapter, 1);
1475
1476                         return;
1477                 }
1478                 // enable dma2
1479                 if ((dma1_enable == 0) && (dma2_enable == 1)) {
1480                         write_reg_dw(adapter, 0x010, adapter->dmaq2.bus_addr | 1);
1481
1482                         ctrl_enable_receive_data(adapter, 1);
1483
1484                         return;
1485                 }
1486                 // start dma
1487                 if ((dma1_enable == 0) && (dma2_enable == 0)) {
1488                         ctrl_enable_receive_data(adapter, 1);
1489
1490                         return;
1491                 }
1492
1493         } else {
1494
1495                 dprintk("%s: stopping dma\n", __FUNCTION__);
1496
1497                 dma_enable = adapter->dma_status & 0x00000003;
1498
1499                 if (((dma_mask & 1) != 0) && ((adapter->dma_status & 1) != 0)) {
1500                         dma_enable = dma_enable & 0xfffffffe;
1501                 }
1502
1503                 if (((dma_mask & 2) != 0) && ((adapter->dma_status & 2) != 0)) {
1504                         dma_enable = dma_enable & 0xfffffffd;
1505                 }
1506                 //stop dma
1507                 if ((dma_enable == 0) && ((adapter->dma_status & 4) != 0)) {
1508                         ctrl_enable_receive_data(adapter, 0);
1509
1510                         udelay(3000);
1511                 }
1512                 //disable dma1
1513                 if (((dma_mask & 1) != 0) && ((adapter->dma_status & 1) != 0) && (adapter->dmaq1.bus_addr != 0)) {
1514                         write_reg_dw(adapter, 0x000, adapter->dmaq1.bus_addr);
1515                         write_reg_dw(adapter, 0x00c, (adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) | 1);
1516
1517                         adapter->dma_status = adapter->dma_status & ~0x00000001;
1518                 }
1519                 //disable dma2
1520                 if (((dma_mask & 2) != 0) && ((adapter->dma_status & 2) != 0) && (adapter->dmaq2.bus_addr != 0)) {
1521                         write_reg_dw(adapter, 0x010, adapter->dmaq2.bus_addr);
1522
1523                         adapter->dma_status = adapter->dma_status & ~0x00000002;
1524                 }
1525         }
1526 }
1527
1528 static void open_stream(struct adapter *adapter, u16 pid)
1529 {
1530         u32 dma_mask;
1531
1532         ++adapter->capturing;
1533
1534         filter_enable_mask_filter(adapter, 1);
1535
1536         add_pid(adapter, pid);
1537
1538         dprintk("%s: adapter->dma_status=%x\n", __FUNCTION__, adapter->dma_status);
1539
1540         if ((adapter->dma_status & 7) != 7) {
1541                 dma_mask = 0;
1542
1543                 if (((adapter->dma_status & 0x10000000) != 0) && ((adapter->dma_status & 1) == 0)) {
1544                         dma_mask = dma_mask | 1;
1545
1546                         adapter->dmaq1.head = 0;
1547                         adapter->dmaq1.tail = 0;
1548
1549                         memset(adapter->dmaq1.buffer, 0, adapter->dmaq1.buffer_size);
1550                 }
1551
1552                 if (((adapter->dma_status & 0x20000000) != 0) && ((adapter->dma_status & 2) == 0)) {
1553                         dma_mask = dma_mask | 2;
1554
1555                         adapter->dmaq2.head = 0;
1556                         adapter->dmaq2.tail = 0;
1557                 }
1558
1559                 if (dma_mask != 0) {
1560                         irq_dma_enable_disable_irq(adapter, 1);
1561
1562                         dma_start_stop(adapter, dma_mask, 1);
1563                 }
1564         }
1565 }
1566
1567 static void close_stream(struct adapter *adapter, u16 pid)
1568 {
1569         if (adapter->capturing > 0)
1570                 --adapter->capturing;
1571
1572         dprintk("%s: dma_status=%x\n", __FUNCTION__, adapter->dma_status);
1573
1574         if (adapter->capturing == 0) {
1575                 u32 dma_mask = 0;
1576
1577         if ((adapter->dma_status & 1) != 0)
1578                 dma_mask = dma_mask | 0x00000001;
1579         if ((adapter->dma_status & 2) != 0)
1580                 dma_mask = dma_mask | 0x00000002;
1581
1582         if (dma_mask != 0) {
1583                         dma_start_stop(adapter, dma_mask, 0);
1584         }
1585         }
1586         remove_pid(adapter, pid);
1587 }
1588
1589 static void interrupt_service_dma1(struct adapter *adapter)
1590 {
1591         struct dvb_demux *dvbdmx = &adapter->demux;
1592
1593         int n_cur_dma_counter;
1594         u32 n_num_bytes_parsed;
1595         u32 n_num_new_bytes_transferred;
1596         u32 dw_default_packet_size = 188;
1597         u8 gb_tmp_buffer[188];
1598         u8 *pb_dma_buf_cur_pos;
1599
1600         n_cur_dma_counter = readl(adapter->io_mem + 0x008) - adapter->dmaq1.bus_addr;
1601         n_cur_dma_counter = (n_cur_dma_counter / dw_default_packet_size) * dw_default_packet_size;
1602
1603         if ((n_cur_dma_counter < 0) || (n_cur_dma_counter > adapter->dmaq1.buffer_size)) {
1604                 dprintk("%s: dma counter outside dma buffer\n", __FUNCTION__);
1605                 return;
1606         }
1607
1608         adapter->dmaq1.head = n_cur_dma_counter;
1609
1610         if (adapter->dmaq1.tail <= n_cur_dma_counter) {
1611                 n_num_new_bytes_transferred = n_cur_dma_counter - adapter->dmaq1.tail;
1612
1613         } else {
1614
1615                 n_num_new_bytes_transferred = (adapter->dmaq1.buffer_size - adapter->dmaq1.tail) + n_cur_dma_counter;
1616         }
1617
1618         ddprintk("%s: n_cur_dma_counter = %d\n", __FUNCTION__, n_cur_dma_counter);
1619         ddprintk("%s: dmaq1.tail        = %d\n", __FUNCTION__, adapter->dmaq1.tail);
1620         ddprintk("%s: bytes_transferred = %d\n", __FUNCTION__, n_num_new_bytes_transferred);
1621
1622         if (n_num_new_bytes_transferred < dw_default_packet_size)
1623                 return;
1624
1625         n_num_bytes_parsed = 0;
1626
1627         while (n_num_bytes_parsed < n_num_new_bytes_transferred) {
1628                 pb_dma_buf_cur_pos = adapter->dmaq1.buffer + adapter->dmaq1.tail;
1629
1630                 if (adapter->dmaq1.buffer + adapter->dmaq1.buffer_size < adapter->dmaq1.buffer + adapter->dmaq1.tail + 188) {
1631                         memcpy(gb_tmp_buffer, adapter->dmaq1.buffer + adapter->dmaq1.tail,
1632                                adapter->dmaq1.buffer_size - adapter->dmaq1.tail);
1633                         memcpy(gb_tmp_buffer + (adapter->dmaq1.buffer_size - adapter->dmaq1.tail), adapter->dmaq1.buffer,
1634                                (188 - (adapter->dmaq1.buffer_size - adapter->dmaq1.tail)));
1635
1636                         pb_dma_buf_cur_pos = gb_tmp_buffer;
1637                 }
1638
1639                 if (adapter->capturing != 0) {
1640                         dvb_dmx_swfilter_packets(dvbdmx, pb_dma_buf_cur_pos, dw_default_packet_size / 188);
1641                 }
1642
1643                 n_num_bytes_parsed = n_num_bytes_parsed + dw_default_packet_size;
1644
1645                 adapter->dmaq1.tail = adapter->dmaq1.tail + dw_default_packet_size;
1646
1647                 if (adapter->dmaq1.tail >= adapter->dmaq1.buffer_size)
1648                         adapter->dmaq1.tail = adapter->dmaq1.tail - adapter->dmaq1.buffer_size;
1649         };
1650 }
1651
1652 static void interrupt_service_dma2(struct adapter *adapter)
1653 {
1654         printk("%s:\n", __FUNCTION__);
1655 }
1656
1657 static irqreturn_t isr(int irq, void *dev_id, struct pt_regs *regs)
1658 {
1659         struct adapter *tmp = dev_id;
1660
1661         u32 value;
1662
1663         ddprintk("%s:\n", __FUNCTION__);
1664
1665         spin_lock_irq(&tmp->lock);
1666
1667         if (0 == ((value = read_reg_dw(tmp, 0x20c)) & 0x0f)) {
1668                 spin_unlock_irq(&tmp->lock);
1669                 return IRQ_NONE;
1670         }
1671
1672         while (value != 0) {
1673                 if ((value & 0x03) != 0)
1674                         interrupt_service_dma1(tmp);
1675                 if ((value & 0x0c) != 0)
1676                         interrupt_service_dma2(tmp);
1677                 value = read_reg_dw(tmp, 0x20c) & 0x0f;
1678         }
1679
1680         spin_unlock_irq(&tmp->lock);
1681         return IRQ_HANDLED;
1682 }
1683
1684 static void init_dma_queue(struct adapter *adapter)
1685 {
1686         dma_addr_t dma_addr;
1687
1688         if (adapter->dmaq1.buffer != 0)
1689                 return;
1690
1691         adapter->dmaq1.head = 0;
1692         adapter->dmaq1.tail = 0;
1693         adapter->dmaq1.buffer = NULL;
1694
1695         adapter->dmaq1.buffer = pci_alloc_consistent(adapter->pdev, SIZE_OF_BUF_DMA1 + 0x80, &dma_addr);
1696
1697         if (adapter->dmaq1.buffer != 0) {
1698                 memset(adapter->dmaq1.buffer, 0, SIZE_OF_BUF_DMA1);
1699
1700                 adapter->dmaq1.bus_addr = dma_addr;
1701                 adapter->dmaq1.buffer_size = SIZE_OF_BUF_DMA1;
1702
1703                 dma_init_dma(adapter, 0);
1704
1705                 adapter->dma_status = adapter->dma_status | 0x10000000;
1706
1707                 ddprintk("%s: allocated dma buffer at 0x%p, length=%d\n", __FUNCTION__, adapter->dmaq1.buffer, SIZE_OF_BUF_DMA1);
1708
1709         } else {
1710
1711                 adapter->dma_status = adapter->dma_status & ~0x10000000;
1712         }
1713
1714         if (adapter->dmaq2.buffer != 0)
1715                 return;
1716
1717         adapter->dmaq2.head = 0;
1718         adapter->dmaq2.tail = 0;
1719         adapter->dmaq2.buffer = NULL;
1720
1721         adapter->dmaq2.buffer = pci_alloc_consistent(adapter->pdev, SIZE_OF_BUF_DMA2 + 0x80, &dma_addr);
1722
1723         if (adapter->dmaq2.buffer != 0) {
1724                 memset(adapter->dmaq2.buffer, 0, SIZE_OF_BUF_DMA2);
1725
1726                 adapter->dmaq2.bus_addr = dma_addr;
1727                 adapter->dmaq2.buffer_size = SIZE_OF_BUF_DMA2;
1728
1729                 dma_init_dma(adapter, 1);
1730
1731                 adapter->dma_status = adapter->dma_status | 0x20000000;
1732
1733                 ddprintk("%s: allocated dma buffer at 0x%p, length=%d\n", __FUNCTION__, adapter->dmaq2.buffer, (int) SIZE_OF_BUF_DMA2);
1734
1735         } else {
1736
1737                 adapter->dma_status = adapter->dma_status & ~0x20000000;
1738         }
1739 }
1740
1741 static void free_dma_queue(struct adapter *adapter)
1742 {
1743         if (adapter->dmaq1.buffer != 0) {
1744                 pci_free_consistent(adapter->pdev, SIZE_OF_BUF_DMA1 + 0x80, adapter->dmaq1.buffer, adapter->dmaq1.bus_addr);
1745
1746                 adapter->dmaq1.bus_addr = 0;
1747                 adapter->dmaq1.head = 0;
1748                 adapter->dmaq1.tail = 0;
1749                 adapter->dmaq1.buffer_size = 0;
1750                 adapter->dmaq1.buffer = NULL;
1751         }
1752
1753         if (adapter->dmaq2.buffer != 0) {
1754                 pci_free_consistent(adapter->pdev, SIZE_OF_BUF_DMA2 + 0x80, adapter->dmaq2.buffer, adapter->dmaq2.bus_addr);
1755
1756                 adapter->dmaq2.bus_addr = 0;
1757                 adapter->dmaq2.head = 0;
1758                 adapter->dmaq2.tail = 0;
1759                 adapter->dmaq2.buffer_size = 0;
1760                 adapter->dmaq2.buffer = NULL;
1761         }
1762 }
1763
1764 static void free_adapter_object(struct adapter *adapter)
1765 {
1766         dprintk("%s:\n", __FUNCTION__);
1767
1768         close_stream(adapter, 0);
1769
1770         if (adapter->irq != 0)
1771                 free_irq(adapter->irq, adapter);
1772
1773         free_dma_queue(adapter);
1774
1775         if (adapter->io_mem)
1776                 iounmap(adapter->io_mem);
1777
1778         if (adapter != 0)
1779         kfree(adapter);
1780 }
1781
1782 static struct pci_driver skystar2_pci_driver;
1783
1784 static int claim_adapter(struct adapter *adapter)
1785 {
1786         struct pci_dev *pdev = adapter->pdev;
1787
1788         u16 var;
1789
1790         if (!request_region(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1), skystar2_pci_driver.name))
1791                 return -EBUSY;
1792
1793         if (!request_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0), skystar2_pci_driver.name))
1794                 return -EBUSY;
1795
1796         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &adapter->card_revision);
1797
1798         dprintk("%s: card revision %x \n", __FUNCTION__, adapter->card_revision);
1799
1800         if (pci_enable_device(pdev))
1801                 return -EIO;
1802
1803         pci_read_config_word(pdev, 4, &var);
1804
1805         if ((var & 4) == 0)
1806                 pci_set_master(pdev);
1807
1808         adapter->io_port = pdev->resource[1].start;
1809
1810         adapter->io_mem = ioremap(pdev->resource[0].start, 0x800);
1811
1812         if (!adapter->io_mem) {
1813                 dprintk("%s: can not map io memory\n", __FUNCTION__);
1814
1815                 return 2;
1816         }
1817
1818         dprintk("%s: io memory maped at %p\n", __FUNCTION__, adapter->io_mem);
1819
1820         return 1;
1821 }
1822
1823 /*
1824 static int sll_reset_flexcop(struct adapter *adapter)
1825 {
1826         write_reg_dw(adapter, 0x208, 0);
1827         write_reg_dw(adapter, 0x210, 0xb2ff);
1828
1829         return 0;
1830 }
1831 */
1832
1833 static void decide_how_many_hw_filters(struct adapter *adapter)
1834 {
1835         int hw_filters;
1836         int mod_option_hw_filters;
1837
1838         // FlexCop IIb & III have 6+32 hw filters
1839         // FlexCop II has 6 hw filters, every other should have at least 6
1840         switch (adapter->b2c2_revision) {
1841         case 0x82:              /* II */
1842                 hw_filters = 6;
1843                 break;
1844         case 0xc3:              /* IIB */
1845                 hw_filters = 6 + 32;
1846                 break;
1847         case 0xc0:              /* III */
1848                 hw_filters = 6 + 32;
1849                 break;
1850         default:
1851                 hw_filters = 6;
1852                 break;
1853         }
1854         printk("%s: the chip has %i hardware filters", __FILE__, hw_filters);
1855
1856         mod_option_hw_filters = 0;
1857         if (enable_hw_filters >= 1)
1858                 mod_option_hw_filters += 6;
1859         if (enable_hw_filters >= 2)
1860                 mod_option_hw_filters += 32;
1861
1862         if (mod_option_hw_filters >= hw_filters) {
1863                 adapter->useable_hw_filters = hw_filters;
1864         } else {
1865                 adapter->useable_hw_filters = mod_option_hw_filters;
1866                 printk(", but only %d will be used because of module option", mod_option_hw_filters);
1867         }
1868         printk("\n");
1869         dprintk("%s: useable_hardware_filters set to %i\n", __FILE__, adapter->useable_hw_filters);
1870 }
1871
1872 static int driver_initialize(struct pci_dev *pdev)
1873 {
1874         struct adapter *adapter;
1875         u32 tmp;
1876
1877         if (!(adapter = kmalloc(sizeof(struct adapter), GFP_KERNEL))) {
1878                 dprintk("%s: out of memory!\n", __FUNCTION__);
1879
1880                 return -ENOMEM;
1881         }
1882
1883         memset(adapter, 0, sizeof(struct adapter));
1884
1885         pci_set_drvdata(pdev,adapter);
1886
1887         adapter->pdev = pdev;
1888         adapter->irq = pdev->irq;
1889
1890         if ((claim_adapter(adapter)) != 1) {
1891                 free_adapter_object(adapter);
1892
1893                 return -ENODEV;
1894         }
1895
1896         irq_dma_enable_disable_irq(adapter, 0);
1897
1898         if (request_irq(pdev->irq, isr, 0x4000000, "Skystar2", adapter) != 0) {
1899                 dprintk("%s: unable to allocate irq=%d !\n", __FUNCTION__, pdev->irq);
1900
1901                 free_adapter_object(adapter);
1902
1903                 return -ENODEV;
1904         }
1905
1906         read_reg_dw(adapter, 0x208);
1907         write_reg_dw(adapter, 0x208, 0);
1908         write_reg_dw(adapter, 0x210, 0xb2ff);
1909         write_reg_dw(adapter, 0x208, 0x40);
1910
1911         init_dma_queue(adapter);
1912
1913         if ((adapter->dma_status & 0x30000000) == 0) {
1914                 free_adapter_object(adapter);
1915
1916                 return -ENODEV;
1917         }
1918
1919         adapter->b2c2_revision = (read_reg_dw(adapter, 0x204) >> 0x18);
1920
1921         switch (adapter->b2c2_revision) {
1922         case 0x82:
1923                 printk("%s: FlexCopII(rev.130) chip found\n", __FILE__);
1924                 break;
1925         case 0xc3:
1926                 printk("%s: FlexCopIIB(rev.195) chip found\n", __FILE__);
1927                 break;
1928         case 0xc0:
1929                 printk("%s: FlexCopIII(rev.192) chip found\n", __FILE__);
1930                 break;
1931         default:
1932                 printk("%s: The revision of the FlexCop chip on your card is %d\n", __FILE__, adapter->b2c2_revision);
1933                 printk("%s: This driver works only with FlexCopII(rev.130), FlexCopIIB(rev.195) and FlexCopIII(rev.192).\n", __FILE__);
1934                 free_adapter_object(adapter);
1935                 pci_set_drvdata(pdev, NULL);
1936                 release_region(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
1937                 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1938                         return -ENODEV;
1939                 }
1940
1941         decide_how_many_hw_filters(adapter);
1942
1943         init_pids(adapter);
1944
1945         tmp = read_reg_dw(adapter, 0x204);
1946
1947         write_reg_dw(adapter, 0x204, 0);
1948         mdelay(20);
1949
1950         write_reg_dw(adapter, 0x204, tmp);
1951         mdelay(10);
1952
1953         tmp = read_reg_dw(adapter, 0x308);
1954         write_reg_dw(adapter, 0x308, 0x4000 | tmp);
1955
1956         adapter->dw_sram_type = 0x10000;
1957
1958         sll_detect_sram_size(adapter);
1959
1960         dprintk("%s sram length = %d, sram type= %x\n", __FUNCTION__, sram_length(adapter), adapter->dw_sram_type);
1961
1962         sram_set_media_dest(adapter, 1);
1963         sram_set_net_dest(adapter, 1);
1964
1965         ctrl_enable_smc(adapter, 0);
1966
1967         sram_set_cai_dest(adapter, 2);
1968         sram_set_cao_dest(adapter, 2);
1969
1970         dma_enable_disable_irq(adapter, 1, 0, 0);
1971
1972         if (eeprom_get_mac_addr(adapter, 0, adapter->mac_addr) != 0) {
1973                 printk("%s MAC address = %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x \n", __FUNCTION__, adapter->mac_addr[0],
1974                        adapter->mac_addr[1], adapter->mac_addr[2], adapter->mac_addr[3], adapter->mac_addr[4], adapter->mac_addr[5],
1975                        adapter->mac_addr[6], adapter->mac_addr[7]
1976                     );
1977
1978                 ca_set_mac_dst_addr_filter(adapter, adapter->mac_addr);
1979                 ctrl_enable_mac(adapter, 1);
1980         }
1981
1982         spin_lock_init(&adapter->lock);
1983
1984         return 0;
1985 }
1986
1987 static void driver_halt(struct pci_dev *pdev)
1988 {
1989         struct adapter *adapter;
1990
1991         adapter = pci_get_drvdata(pdev);
1992
1993         irq_dma_enable_disable_irq(adapter, 0);
1994
1995         ctrl_enable_receive_data(adapter, 0);
1996
1997         free_adapter_object(adapter);
1998
1999         pci_set_drvdata(pdev, NULL);
2000
2001         release_region(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
2002
2003         release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2004 }
2005
2006 static int dvb_start_feed(struct dvb_demux_feed *dvbdmxfeed)
2007 {
2008         struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
2009         struct adapter *adapter = (struct adapter *) dvbdmx->priv;
2010
2011         dprintk("%s: PID=%d, type=%d\n", __FUNCTION__, dvbdmxfeed->pid, dvbdmxfeed->type);
2012
2013         open_stream(adapter, dvbdmxfeed->pid);
2014
2015         return 0;
2016 }
2017
2018 static int dvb_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
2019 {
2020         struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
2021         struct adapter *adapter = (struct adapter *) dvbdmx->priv;
2022
2023         dprintk("%s: PID=%d, type=%d\n", __FUNCTION__, dvbdmxfeed->pid, dvbdmxfeed->type);
2024
2025         close_stream(adapter, dvbdmxfeed->pid);
2026
2027         return 0;
2028 }
2029
2030 /* lnb control */
2031 static void set_tuner_tone(struct adapter *adapter, u8 tone)
2032 {
2033         u16 wz_half_period_for_45_mhz[] = { 0x01ff, 0x0154, 0x00ff, 0x00cc };
2034         u16 ax;
2035
2036         dprintk("%s: %u\n", __FUNCTION__, tone);
2037
2038         switch (tone) {
2039         case 1:
2040                 ax = wz_half_period_for_45_mhz[0];
2041                 break;
2042         case 2:
2043                 ax = wz_half_period_for_45_mhz[1];
2044                 break;
2045         case 3:
2046                 ax = wz_half_period_for_45_mhz[2];
2047                 break;
2048         case 4:
2049                 ax = wz_half_period_for_45_mhz[3];
2050                 break;
2051
2052         default:
2053                 ax = 0;
2054         }
2055
2056         if (ax != 0) {
2057                 write_reg_dw(adapter, 0x200, ((ax << 0x0f) + (ax & 0x7fff)) | 0x40000000);
2058
2059         } else {
2060
2061                 write_reg_dw(adapter, 0x200, 0x40ff8000);
2062         }
2063 }
2064
2065 static void set_tuner_polarity(struct adapter *adapter, u8 polarity)
2066 {
2067         u32 var;
2068
2069         dprintk("%s : polarity = %u \n", __FUNCTION__, polarity);
2070
2071         var = read_reg_dw(adapter, 0x204);
2072
2073         if (polarity == 0) {
2074                 dprintk("%s: LNB power off\n", __FUNCTION__);
2075                 var = var | 1;
2076         };
2077
2078         if (polarity == 1) {
2079                 var = var & ~1;
2080                 var = var & ~4;
2081         };
2082
2083         if (polarity == 2) {
2084                 var = var & ~1;
2085                 var = var | 4;
2086         }
2087
2088         write_reg_dw(adapter, 0x204, var);
2089 }
2090
2091 static void diseqc_send_bit(struct adapter *adapter, int data)
2092 {
2093         set_tuner_tone(adapter, 1);
2094         udelay(data ? 500 : 1000);
2095         set_tuner_tone(adapter, 0);
2096         udelay(data ? 1000 : 500);
2097 }
2098
2099
2100 static void diseqc_send_byte(struct adapter *adapter, int data)
2101                 {
2102         int i, par = 1, d;
2103
2104         for (i = 7; i >= 0; i--) {
2105                 d = (data >> i) & 1;
2106                 par ^= d;
2107                 diseqc_send_bit(adapter, d);
2108         }
2109
2110         diseqc_send_bit(adapter, par);
2111                 }
2112
2113
2114 static int send_diseqc_msg(struct adapter *adapter, int len, u8 *msg, unsigned long burst)
2115 {
2116         int i;
2117
2118         set_tuner_tone(adapter, 0);
2119         mdelay(16);
2120
2121         for (i = 0; i < len; i++)
2122                 diseqc_send_byte(adapter, msg[i]);
2123
2124         mdelay(16);
2125
2126         if (burst != -1) {
2127                 if (burst)
2128                         diseqc_send_byte(adapter, 0xff);
2129                 else {
2130                         set_tuner_tone(adapter, 1);
2131                         udelay(12500);
2132                         set_tuner_tone(adapter, 0);
2133                 }
2134                 msleep(20);
2135         }
2136
2137         return 0;
2138 }
2139
2140 static int flexcop_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
2141 {
2142         struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2143
2144         switch(tone) {
2145                 case SEC_TONE_ON:
2146                         set_tuner_tone(adapter, 1);
2147                         break;
2148                 case SEC_TONE_OFF:
2149                         set_tuner_tone(adapter, 0);
2150                                 break;
2151                         default:
2152                                 return -EINVAL;
2153                         };
2154
2155         return 0;
2156 }
2157
2158 static int flexcop_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)
2159                 {
2160         struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2161
2162                         send_diseqc_msg(adapter, cmd->msg_len, cmd->msg, 0);
2163
2164         return 0;
2165                 }
2166
2167 static int flexcop_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
2168 {
2169         struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2170
2171         send_diseqc_msg(adapter, 0, NULL, minicmd);
2172
2173         return 0;
2174 }
2175
2176 static int flexcop_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
2177                 {
2178         struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2179
2180         dprintk("%s: FE_SET_VOLTAGE\n", __FUNCTION__);
2181
2182         switch (voltage) {
2183         case SEC_VOLTAGE_13:
2184                 dprintk("%s: SEC_VOLTAGE_13, %x\n", __FUNCTION__, SEC_VOLTAGE_13);
2185                 set_tuner_polarity(adapter, 1);
2186                 return 0;
2187
2188         case SEC_VOLTAGE_18:
2189                 dprintk("%s: SEC_VOLTAGE_18, %x\n", __FUNCTION__, SEC_VOLTAGE_18);
2190                 set_tuner_polarity(adapter, 2);
2191                         return 0;
2192
2193         default:
2194                 return -EINVAL;
2195         }
2196         }
2197
2198 static int flexcop_sleep(struct dvb_frontend* fe)
2199                 {
2200         struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2201
2202         dprintk("%s: FE_SLEEP\n", __FUNCTION__);
2203                         set_tuner_polarity(adapter, 0);
2204
2205         if (adapter->fe_sleep) return adapter->fe_sleep(fe);
2206         return 0;
2207                 }
2208
2209 static u32 flexcop_i2c_func(struct i2c_adapter *adapter)
2210                 {
2211         printk("flexcop_i2c_func\n");
2212
2213         return I2C_FUNC_I2C;
2214 }
2215
2216 static struct i2c_algorithm    flexcop_algo = {
2217         .name           = "flexcop i2c algorithm",
2218         .id             = I2C_ALGO_BIT,
2219         .master_xfer    = master_xfer,
2220         .functionality  = flexcop_i2c_func,
2221 };
2222
2223
2224
2225
2226 static int samsung_tbmu24112_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
2227 {
2228         u8 aclk = 0;
2229         u8 bclk = 0;
2230
2231         if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
2232         else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
2233         else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
2234         else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
2235         else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
2236         else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
2237
2238         stv0299_writereg (fe, 0x13, aclk);
2239         stv0299_writereg (fe, 0x14, bclk);
2240         stv0299_writereg (fe, 0x1f, (ratio >> 16) & 0xff);
2241         stv0299_writereg (fe, 0x20, (ratio >>  8) & 0xff);
2242         stv0299_writereg (fe, 0x21, (ratio      ) & 0xf0);
2243
2244         return 0;
2245 }
2246
2247 static int samsung_tbmu24112_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
2248 {
2249         u8 buf[4];
2250         u32 div;
2251         struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
2252         struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2253
2254         div = params->frequency / 125;
2255
2256         buf[0] = (div >> 8) & 0x7f;
2257         buf[1] = div & 0xff;
2258         buf[2] = 0x84;  // 0xC4
2259         buf[3] = 0x08;
2260
2261         if (params->frequency < 1500000) buf[3] |= 0x10;
2262
2263         if (i2c_transfer (&adapter->i2c_adap, &msg, 1) != 1) return -EIO;
2264         return 0;
2265 }
2266
2267 static u8 samsung_tbmu24112_inittab[] = {
2268              0x01, 0x15,
2269              0x02, 0x30,
2270              0x03, 0x00,
2271              0x04, 0x7D,
2272              0x05, 0x35,
2273              0x06, 0x02,
2274              0x07, 0x00,
2275              0x08, 0xC3,
2276              0x0C, 0x00,
2277              0x0D, 0x81,
2278              0x0E, 0x23,
2279              0x0F, 0x12,
2280              0x10, 0x7E,
2281              0x11, 0x84,
2282              0x12, 0xB9,
2283              0x13, 0x88,
2284              0x14, 0x89,
2285              0x15, 0xC9,
2286              0x16, 0x00,
2287              0x17, 0x5C,
2288              0x18, 0x00,
2289              0x19, 0x00,
2290              0x1A, 0x00,
2291              0x1C, 0x00,
2292              0x1D, 0x00,
2293              0x1E, 0x00,
2294              0x1F, 0x3A,
2295              0x20, 0x2E,
2296              0x21, 0x80,
2297              0x22, 0xFF,
2298              0x23, 0xC1,
2299              0x28, 0x00,
2300              0x29, 0x1E,
2301              0x2A, 0x14,
2302              0x2B, 0x0F,
2303              0x2C, 0x09,
2304              0x2D, 0x05,
2305              0x31, 0x1F,
2306              0x32, 0x19,
2307              0x33, 0xFE,
2308              0x34, 0x93,
2309              0xff, 0xff,
2310                         };
2311
2312 static struct stv0299_config samsung_tbmu24112_config = {
2313         .demod_address = 0x68,
2314         .inittab = samsung_tbmu24112_inittab,
2315         .mclk = 88000000UL,
2316         .invert = 0,
2317         .enhanced_tuning = 0,
2318         .skip_reinit = 0,
2319         .lock_output = STV0229_LOCKOUTPUT_LK,
2320         .volt13_op0_op1 = STV0299_VOLT13_OP1,
2321         .min_delay_ms = 100,
2322         .set_symbol_rate = samsung_tbmu24112_set_symbol_rate,
2323         .pll_set = samsung_tbmu24112_pll_set,
2324 };
2325
2326
2327
2328
2329
2330 static int samsung_tdtc9251dh0_demod_init(struct dvb_frontend* fe)
2331 {
2332         static u8 mt352_clock_config [] = { 0x89, 0x10, 0x2d };
2333         static u8 mt352_reset [] = { 0x50, 0x80 };
2334         static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 };
2335         static u8 mt352_agc_cfg [] = { 0x67, 0x28, 0xa1 };
2336         static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
2337
2338         mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
2339         udelay(2000);
2340         mt352_write(fe, mt352_reset, sizeof(mt352_reset));
2341         mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
2342
2343         mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg));
2344         mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
2345
2346         return 0;
2347 }
2348
2349 int samsung_tdtc9251dh0_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u8* pllbuf)
2350 {
2351         u32 div;
2352         unsigned char bs = 0;
2353
2354         #define IF_FREQUENCYx6 217    /* 6 * 36.16666666667MHz */
2355         div = (((params->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
2356
2357         if (params->frequency >= 48000000 && params->frequency <= 154000000) bs = 0x09;
2358         if (params->frequency >= 161000000 && params->frequency <= 439000000) bs = 0x0a;
2359         if (params->frequency >= 447000000 && params->frequency <= 863000000) bs = 0x08;
2360
2361         pllbuf[0] = 0xc2; // Note: non-linux standard PLL i2c address
2362         pllbuf[1] = div >> 8;
2363         pllbuf[2] = div & 0xff;
2364         pllbuf[3] = 0xcc;
2365         pllbuf[4] = bs;
2366
2367         return 0;
2368 }
2369
2370 static struct mt352_config samsung_tdtc9251dh0_config = {
2371
2372         .demod_address = 0x0f,
2373         .demod_init = samsung_tdtc9251dh0_demod_init,
2374         .pll_set = samsung_tdtc9251dh0_pll_set,
2375 };
2376
2377 static int skystar23_samsung_tbdu18132_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
2378 {
2379         u8 buf[4];
2380         u32 div;
2381         struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
2382         struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2383
2384         div = (params->frequency + (125/2)) / 125;
2385
2386         buf[0] = (div >> 8) & 0x7f;
2387         buf[1] = (div >> 0) & 0xff;
2388         buf[2] = 0x84 | ((div >> 10) & 0x60);
2389         buf[3] = 0x80;
2390
2391         if (params->frequency < 1550000)
2392                 buf[3] |= 0x02;
2393
2394         if (i2c_transfer (&adapter->i2c_adap, &msg, 1) != 1) return -EIO;
2395         return 0;
2396 }
2397
2398 static struct mt312_config skystar23_samsung_tbdu18132_config = {
2399
2400         .demod_address = 0x0e,
2401         .pll_set = skystar23_samsung_tbdu18132_pll_set,
2402 };
2403
2404
2405
2406
2407 static void frontend_init(struct adapter *skystar2)
2408 {
2409         switch(skystar2->pdev->device) {
2410         case 0x2103: // Technisat Skystar2 OR Technisat Airstar2
2411
2412                 // try the skystar2 v2.6 first (stv0299/Samsung tbmu24112(sl1935))
2413                 skystar2->fe = stv0299_attach(&samsung_tbmu24112_config, &skystar2->i2c_adap);
2414                 if (skystar2->fe != NULL) {
2415                         skystar2->fe->ops->set_voltage = flexcop_set_voltage;
2416                         skystar2->fe_sleep = skystar2->fe->ops->sleep;
2417                         skystar2->fe->ops->sleep = flexcop_sleep;
2418                         break;
2419 }
2420
2421                 // try the airstar2 (mt352/Samsung tdtc9251dh0(??))
2422                 skystar2->fe = mt352_attach(&samsung_tdtc9251dh0_config, &skystar2->i2c_adap);
2423                 if (skystar2->fe != NULL) {
2424                         skystar2->fe->ops->info.frequency_min = 474000000;
2425                         skystar2->fe->ops->info.frequency_max = 858000000;
2426                         break;
2427                 }
2428
2429                 // try the skystar2 v2.3 (vp310/Samsung tbdu18132(tsa5059))
2430                 skystar2->fe = vp310_attach(&skystar23_samsung_tbdu18132_config, &skystar2->i2c_adap);
2431                 if (skystar2->fe != NULL) {
2432                         skystar2->fe->ops->diseqc_send_master_cmd = flexcop_diseqc_send_master_cmd;
2433                         skystar2->fe->ops->diseqc_send_burst = flexcop_diseqc_send_burst;
2434                         skystar2->fe->ops->set_tone = flexcop_set_tone;
2435                         skystar2->fe->ops->set_voltage = flexcop_set_voltage;
2436                         skystar2->fe_sleep = skystar2->fe->ops->sleep;
2437                         skystar2->fe->ops->sleep = flexcop_sleep;
2438                         break;
2439                 }
2440                 break;
2441         }
2442
2443         if (skystar2->fe == NULL) {
2444                 printk("skystar2: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
2445                        skystar2->pdev->vendor,
2446                        skystar2->pdev->device,
2447                        skystar2->pdev->subsystem_vendor,
2448                        skystar2->pdev->subsystem_device);
2449         } else {
2450                 if (dvb_register_frontend(skystar2->dvb_adapter, skystar2->fe)) {
2451                         printk("skystar2: Frontend registration failed!\n");
2452                         if (skystar2->fe->ops->release)
2453                                 skystar2->fe->ops->release(skystar2->fe);
2454                         skystar2->fe = NULL;
2455                 }
2456         }
2457 }
2458
2459
2460 static int skystar2_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2461 {
2462         struct adapter *adapter;
2463         struct dvb_adapter *dvb_adapter;
2464         struct dvb_demux *dvbdemux;
2465
2466         int ret;
2467
2468         if (pdev == NULL)
2469                 return -ENODEV;
2470
2471         if (driver_initialize(pdev) != 0)
2472                 return -ENODEV;
2473
2474         dvb_register_adapter(&dvb_adapter, skystar2_pci_driver.name, THIS_MODULE);
2475
2476         if (dvb_adapter == NULL) {
2477                 printk("%s: Error registering DVB adapter\n", __FUNCTION__);
2478
2479                 driver_halt(pdev);
2480
2481                 return -ENODEV;
2482         }
2483
2484         adapter = (struct adapter *) pci_get_drvdata(pdev);
2485
2486         dvb_adapter->priv = adapter;
2487         adapter->dvb_adapter = dvb_adapter;
2488
2489
2490         init_MUTEX(&adapter->i2c_sem);
2491
2492
2493         memset(&adapter->i2c_adap, 0, sizeof(struct i2c_adapter));
2494         strcpy(adapter->i2c_adap.name, "SkyStar2");
2495
2496         i2c_set_adapdata(&adapter->i2c_adap, adapter);
2497
2498 #ifdef I2C_ADAP_CLASS_TV_DIGITAL
2499         adapter->i2c_adap.class             = I2C_ADAP_CLASS_TV_DIGITAL;
2500 #else
2501         adapter->i2c_adap.class             = I2C_CLASS_TV_DIGITAL;
2502 #endif
2503         adapter->i2c_adap.algo              = &flexcop_algo;
2504         adapter->i2c_adap.algo_data         = NULL;
2505         adapter->i2c_adap.id                = I2C_ALGO_BIT;
2506
2507         if (i2c_add_adapter(&adapter->i2c_adap) < 0) {
2508                 dvb_unregister_adapter (adapter->dvb_adapter);
2509                 return -ENOMEM;
2510         }
2511
2512         dvbdemux = &adapter->demux;
2513
2514         dvbdemux->priv = (void *) adapter;
2515         dvbdemux->filternum = N_PID_SLOTS;
2516         dvbdemux->feednum = N_PID_SLOTS;
2517         dvbdemux->start_feed = dvb_start_feed;
2518         dvbdemux->stop_feed = dvb_stop_feed;
2519         dvbdemux->write_to_decoder = NULL;
2520         dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
2521
2522         dvb_dmx_init(&adapter->demux);
2523
2524         adapter->hw_frontend.source = DMX_FRONTEND_0;
2525
2526         adapter->dmxdev.filternum = N_PID_SLOTS;
2527         adapter->dmxdev.demux = &dvbdemux->dmx;
2528         adapter->dmxdev.capabilities = 0;
2529
2530         dvb_dmxdev_init(&adapter->dmxdev, adapter->dvb_adapter);
2531
2532         ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &adapter->hw_frontend);
2533         if (ret < 0)
2534                 return ret;
2535
2536         adapter->mem_frontend.source = DMX_MEMORY_FE;
2537
2538         ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &adapter->mem_frontend);
2539         if (ret < 0)
2540                 return ret;
2541
2542         ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &adapter->hw_frontend);
2543         if (ret < 0)
2544                 return ret;
2545
2546         dvb_net_init(adapter->dvb_adapter, &adapter->dvbnet, &dvbdemux->dmx);
2547
2548         frontend_init(adapter);
2549
2550         return 0;
2551 }
2552
2553 static void skystar2_remove(struct pci_dev *pdev)
2554 {
2555         struct adapter *adapter;
2556         struct dvb_demux *dvbdemux;
2557
2558         if (pdev == NULL)
2559                 return;
2560
2561         adapter = pci_get_drvdata(pdev);
2562
2563         if (adapter != NULL) {
2564                 dvb_net_release(&adapter->dvbnet);
2565                 dvbdemux = &adapter->demux;
2566
2567                 dvbdemux->dmx.close(&dvbdemux->dmx);
2568                 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &adapter->hw_frontend);
2569                 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &adapter->mem_frontend);
2570
2571                 dvb_dmxdev_release(&adapter->dmxdev);
2572                 dvb_dmx_release(&adapter->demux);
2573
2574                 if (adapter->fe != NULL) dvb_unregister_frontend(adapter->fe);
2575
2576                 if (adapter->dvb_adapter != NULL) {
2577                         i2c_del_adapter(&adapter->i2c_adap);
2578
2579                         dvb_unregister_adapter(adapter->dvb_adapter);
2580                 }
2581                 driver_halt(pdev);
2582         }
2583 }
2584
2585 static struct pci_device_id skystar2_pci_tbl[] = {
2586         {0x000013d0, 0x00002103, 0xffffffff, 0xffffffff, 0x00000000, 0x00000000, 0x00000000},
2587 /*      {0x000013d0, 0x00002200, 0xffffffff, 0xffffffff, 0x00000000, 0x00000000, 0x00000000}, UNDEFINED HARDWARE - mail linuxtv.org list */     //FCIII
2588         {0,},
2589 };
2590
2591 MODULE_DEVICE_TABLE(pci, skystar2_pci_tbl);
2592
2593 static struct pci_driver skystar2_pci_driver = {
2594         .name = "SkyStar2",
2595         .id_table = skystar2_pci_tbl,
2596         .probe = skystar2_probe,
2597         .remove = skystar2_remove,
2598 };
2599
2600 static int skystar2_init(void)
2601 {
2602         return pci_module_init(&skystar2_pci_driver);
2603 }
2604
2605 static void skystar2_cleanup(void)
2606 {
2607         pci_unregister_driver(&skystar2_pci_driver);
2608 }
2609
2610 module_init(skystar2_init);
2611 module_exit(skystar2_cleanup);
2612
2613 MODULE_DESCRIPTION("Technisat SkyStar2 DVB PCI Driver");
2614 MODULE_LICENSE("GPL");