1 /* ----------------------------------------------------------------------------
2 Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
9 Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
16 Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
34 The Linux client driver is based on the 3c589_cs.c client driver by
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
44 Special thanks for testing and help in debugging this driver goes
47 -------------------------------------------------------------------------------
48 Driver Notes and Issues
49 -------------------------------------------------------------------------------
51 1. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
55 2. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
60 3. If hot extraction does not work for you, use 'ifconfig eth0 down'
63 4. There is a bad slow-down problem in this driver.
65 5. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
68 -------------------------------------------------------------------------------
70 -------------------------------------------------------------------------------
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@redhat.com>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
87 * Revision 0.13 1995/05/18 05:56:34 rpao
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
103 95/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
106 Bug fix: Make all non-exported functions private by using
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
109 95/05/10 rpao V0.07 Statistics.
110 95/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
112 ---------------------------------------------------------------------------- */
114 #define DRV_NAME "nmclan_cs"
115 #define DRV_VERSION "0.16"
118 /* ----------------------------------------------------------------------------
119 Conditional Compilation Options
120 ---------------------------------------------------------------------------- */
123 #define RESET_ON_TIMEOUT 1
124 #define TX_INTERRUPTABLE 1
125 #define RESET_XILINX 0
127 /* ----------------------------------------------------------------------------
129 ---------------------------------------------------------------------------- */
131 #include <linux/module.h>
132 #include <linux/kernel.h>
133 #include <linux/init.h>
134 #include <linux/ptrace.h>
135 #include <linux/slab.h>
136 #include <linux/string.h>
137 #include <linux/timer.h>
138 #include <linux/interrupt.h>
139 #include <linux/in.h>
140 #include <linux/delay.h>
141 #include <linux/ethtool.h>
142 #include <linux/netdevice.h>
143 #include <linux/etherdevice.h>
144 #include <linux/skbuff.h>
145 #include <linux/if_arp.h>
146 #include <linux/ioport.h>
148 #include <pcmcia/version.h>
149 #include <pcmcia/cs_types.h>
150 #include <pcmcia/cs.h>
151 #include <pcmcia/cisreg.h>
152 #include <pcmcia/cistpl.h>
153 #include <pcmcia/ds.h>
155 #include <asm/uaccess.h>
157 #include <asm/system.h>
158 #include <asm/bitops.h>
160 /* ----------------------------------------------------------------------------
162 ---------------------------------------------------------------------------- */
164 #define ETHER_ADDR_LEN ETH_ALEN
165 /* 6 bytes in an Ethernet Address */
166 #define MACE_LADRF_LEN 8
167 /* 8 bytes in Logical Address Filter */
169 /* Loop Control Defines */
170 #define MACE_MAX_IR_ITERATIONS 10
171 #define MACE_MAX_RX_ITERATIONS 12
173 TBD: Dean brought this up, and I assumed the hardware would
176 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
177 non-zero when the isr exits. We may not get another interrupt
178 to process the remaining packets for some time.
182 The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
183 which manages the interface between the MACE and the PCMCIA bus. It
184 also includes buffer management for the 32K x 8 SRAM to control up to
185 four transmit and 12 receive frames at a time.
187 #define AM2150_MAX_TX_FRAMES 4
188 #define AM2150_MAX_RX_FRAMES 12
190 /* Am2150 Ethernet Card I/O Mapping */
191 #define AM2150_RCV 0x00
192 #define AM2150_XMT 0x04
193 #define AM2150_XMT_SKIP 0x09
194 #define AM2150_RCV_NEXT 0x0A
195 #define AM2150_RCV_FRAME_COUNT 0x0B
196 #define AM2150_MACE_BANK 0x0C
197 #define AM2150_MACE_BASE 0x10
200 #define MACE_RCVFIFO 0
201 #define MACE_XMTFIFO 1
207 #define MACE_FIFOFC 7
211 #define MACE_BIUCC 11
212 #define MACE_FIFOCC 12
213 #define MACE_MACCC 13
214 #define MACE_PLSCC 14
215 #define MACE_PHYCC 15
216 #define MACE_CHIPIDL 16
217 #define MACE_CHIPIDH 17
220 #define MACE_LADRF 20
226 #define MACE_RNTPC 26
227 #define MACE_RCVCC 27
234 #define MACE_XMTRC_EXDEF 0x80
235 #define MACE_XMTRC_XMTRC 0x0F
237 #define MACE_XMTFS_XMTSV 0x80
238 #define MACE_XMTFS_UFLO 0x40
239 #define MACE_XMTFS_LCOL 0x20
240 #define MACE_XMTFS_MORE 0x10
241 #define MACE_XMTFS_ONE 0x08
242 #define MACE_XMTFS_DEFER 0x04
243 #define MACE_XMTFS_LCAR 0x02
244 #define MACE_XMTFS_RTRY 0x01
246 #define MACE_RCVFS_RCVSTS 0xF000
247 #define MACE_RCVFS_OFLO 0x8000
248 #define MACE_RCVFS_CLSN 0x4000
249 #define MACE_RCVFS_FRAM 0x2000
250 #define MACE_RCVFS_FCS 0x1000
252 #define MACE_FIFOFC_RCVFC 0xF0
253 #define MACE_FIFOFC_XMTFC 0x0F
255 #define MACE_IR_JAB 0x80
256 #define MACE_IR_BABL 0x40
257 #define MACE_IR_CERR 0x20
258 #define MACE_IR_RCVCCO 0x10
259 #define MACE_IR_RNTPCO 0x08
260 #define MACE_IR_MPCO 0x04
261 #define MACE_IR_RCVINT 0x02
262 #define MACE_IR_XMTINT 0x01
264 #define MACE_MACCC_PROM 0x80
265 #define MACE_MACCC_DXMT2PD 0x40
266 #define MACE_MACCC_EMBA 0x20
267 #define MACE_MACCC_RESERVED 0x10
268 #define MACE_MACCC_DRCVPA 0x08
269 #define MACE_MACCC_DRCVBC 0x04
270 #define MACE_MACCC_ENXMT 0x02
271 #define MACE_MACCC_ENRCV 0x01
273 #define MACE_PHYCC_LNKFL 0x80
274 #define MACE_PHYCC_DLNKTST 0x40
275 #define MACE_PHYCC_REVPOL 0x20
276 #define MACE_PHYCC_DAPC 0x10
277 #define MACE_PHYCC_LRT 0x08
278 #define MACE_PHYCC_ASEL 0x04
279 #define MACE_PHYCC_RWAKE 0x02
280 #define MACE_PHYCC_AWAKE 0x01
282 #define MACE_IAC_ADDRCHG 0x80
283 #define MACE_IAC_PHYADDR 0x04
284 #define MACE_IAC_LOGADDR 0x02
286 #define MACE_UTR_RTRE 0x80
287 #define MACE_UTR_RTRD 0x40
288 #define MACE_UTR_RPA 0x20
289 #define MACE_UTR_FCOLL 0x10
290 #define MACE_UTR_RCVFCSE 0x08
291 #define MACE_UTR_LOOP_INCL_MENDEC 0x06
292 #define MACE_UTR_LOOP_NO_MENDEC 0x04
293 #define MACE_UTR_LOOP_EXTERNAL 0x02
294 #define MACE_UTR_LOOP_NONE 0x00
295 #define MACE_UTR_RESERVED 0x01
297 /* Switch MACE register bank (only 0 and 1 are valid) */
298 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
300 #define MACE_IMR_DEFAULT \
311 #undef MACE_IMR_DEFAULT
312 #define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
314 #define TX_TIMEOUT ((400*HZ)/1000)
316 /* ----------------------------------------------------------------------------
318 ---------------------------------------------------------------------------- */
320 typedef struct _mace_statistics {
335 /* RFS1--Receive Status (RCVSTS) */
341 /* RFS2--Runt Packet Count (RNTPC) */
344 /* RFS3--Receive Collision Count (RCVCC) */
365 typedef struct _mace_private {
368 struct net_device_stats linux_stats; /* Linux statistics counters */
369 mace_statistics mace_stats; /* MACE chip statistics counters */
371 /* restore_multicast_list() state variables */
372 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
373 int multicast_num_addrs;
375 char tx_free_frames; /* Number of free transmit frame buffers */
376 char tx_irq_disabled; /* MACE TX interrupt disabled */
378 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
381 /* ----------------------------------------------------------------------------
382 Private Global Variables
383 ---------------------------------------------------------------------------- */
386 static char rcsid[] =
387 "nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao";
388 static char *version =
389 DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
392 static dev_info_t dev_info="nmclan_cs";
393 static dev_link_t *dev_list;
395 static char *if_names[]={
396 "Auto", "10baseT", "BNC",
399 /* ----------------------------------------------------------------------------
401 These are the parameters that can be set during loading with
403 ---------------------------------------------------------------------------- */
405 MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
406 MODULE_LICENSE("GPL");
408 #define INT_MODULE_PARM(n, v) static int n = v; MODULE_PARM(n, "i")
410 static int irq_list[4] = { -1 };
411 MODULE_PARM(irq_list, "1-4i");
413 /* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
414 INT_MODULE_PARM(if_port, 0);
415 /* Bit map of interrupts to choose from */
416 INT_MODULE_PARM(irq_mask, 0xdeb8);
419 INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
420 #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
422 #define DEBUG(n, args...)
425 /* ----------------------------------------------------------------------------
427 ---------------------------------------------------------------------------- */
429 static void nmclan_config(dev_link_t *link);
430 static void nmclan_release(u_long arg);
431 static int nmclan_event(event_t event, int priority,
432 event_callback_args_t *args);
434 static void nmclan_reset(struct net_device *dev);
435 static int mace_config(struct net_device *dev, struct ifmap *map);
436 static int mace_open(struct net_device *dev);
437 static int mace_close(struct net_device *dev);
438 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev);
439 static void mace_tx_timeout(struct net_device *dev);
440 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs);
441 static struct net_device_stats *mace_get_stats(struct net_device *dev);
442 static int mace_rx(struct net_device *dev, unsigned char RxCnt);
443 static void restore_multicast_list(struct net_device *dev);
444 static void set_multicast_list(struct net_device *dev);
445 static int mace_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
447 static dev_link_t *nmclan_attach(void);
448 static void nmclan_detach(dev_link_t *);
450 /* ----------------------------------------------------------------------------
452 Clean up stale device structures
453 ---------------------------------------------------------------------------- */
455 static void flush_stale_links(void)
457 dev_link_t *link, *next;
458 for (link = dev_list; link; link = next) {
460 if (link->state & DEV_STALE_LINK)
465 /* ----------------------------------------------------------------------------
467 Creates an "instance" of the driver, allocating local data
468 structures for one device. The device is registered with Card
470 ---------------------------------------------------------------------------- */
472 static dev_link_t *nmclan_attach(void)
476 struct net_device *dev;
477 client_reg_t client_reg;
480 DEBUG(0, "nmclan_attach()\n");
481 DEBUG(1, "%s\n", rcsid);
484 /* Create new ethernet device */
485 dev = alloc_etherdev(sizeof(mace_private));
492 spin_lock_init(&lp->bank_lock);
493 init_timer(&link->release);
494 link->release.function = &nmclan_release;
495 link->release.data = (u_long)link;
496 link->io.NumPorts1 = 32;
497 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
498 link->io.IOAddrLines = 5;
499 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
500 link->irq.IRQInfo1 = IRQ_INFO2_VALID|IRQ_LEVEL_ID;
501 if (irq_list[0] == -1)
502 link->irq.IRQInfo2 = irq_mask;
504 for (i = 0; i < 4; i++)
505 link->irq.IRQInfo2 |= 1 << irq_list[i];
506 link->irq.Handler = &mace_interrupt;
507 link->irq.Instance = dev;
508 link->conf.Attributes = CONF_ENABLE_IRQ;
510 link->conf.IntType = INT_MEMORY_AND_IO;
511 link->conf.ConfigIndex = 1;
512 link->conf.Present = PRESENT_OPTION;
514 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
516 SET_MODULE_OWNER(dev);
517 dev->hard_start_xmit = &mace_start_xmit;
518 dev->set_config = &mace_config;
519 dev->get_stats = &mace_get_stats;
520 dev->set_multicast_list = &set_multicast_list;
521 dev->do_ioctl = &mace_ioctl;
522 dev->open = &mace_open;
523 dev->stop = &mace_close;
524 #ifdef HAVE_TX_TIMEOUT
525 dev->tx_timeout = mace_tx_timeout;
526 dev->watchdog_timeo = TX_TIMEOUT;
529 /* Register with Card Services */
530 link->next = dev_list;
532 client_reg.dev_info = &dev_info;
533 client_reg.Attributes = INFO_IO_CLIENT | INFO_CARD_SHARE;
534 client_reg.EventMask =
535 CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL |
536 CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET |
537 CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME;
538 client_reg.event_handler = &nmclan_event;
539 client_reg.Version = 0x0210;
540 client_reg.event_callback_args.client_data = link;
541 ret = CardServices(RegisterClient, &link->handle, &client_reg);
543 cs_error(link->handle, RegisterClient, ret);
549 } /* nmclan_attach */
551 /* ----------------------------------------------------------------------------
553 This deletes a driver "instance". The device is de-registered
554 with Card Services. If it has been released, all local data
555 structures are freed. Otherwise, the structures will be freed
556 when the device is released.
557 ---------------------------------------------------------------------------- */
559 static void nmclan_detach(dev_link_t *link)
561 struct net_device *dev = link->priv;
564 DEBUG(0, "nmclan_detach(0x%p)\n", link);
566 /* Locate device structure */
567 for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next)
568 if (*linkp == link) break;
572 del_timer_sync(&link->release);
573 if (link->state & DEV_CONFIG) {
574 nmclan_release((u_long)link);
575 if (link->state & DEV_STALE_CONFIG) {
576 link->state |= DEV_STALE_LINK;
582 CardServices(DeregisterClient, link->handle);
584 /* Unlink device structure, free bits */
587 unregister_netdev(dev);
590 } /* nmclan_detach */
592 /* ----------------------------------------------------------------------------
594 Reads a MACE register. This is bank independent; however, the
595 caller must ensure that this call is not interruptable. We are
596 assuming that during normal operation, the MACE is always in
598 ---------------------------------------------------------------------------- */
599 static int mace_read(mace_private *lp, ioaddr_t ioaddr, int reg)
605 case 0: /* register 0-15 */
606 data = inb(ioaddr + AM2150_MACE_BASE + reg);
608 case 1: /* register 16-31 */
609 spin_lock_irqsave(&lp->bank_lock, flags);
611 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
613 spin_unlock_irqrestore(&lp->bank_lock, flags);
616 return (data & 0xFF);
619 /* ----------------------------------------------------------------------------
621 Writes to a MACE register. This is bank independent; however,
622 the caller must ensure that this call is not interruptable. We
623 are assuming that during normal operation, the MACE is always in
625 ---------------------------------------------------------------------------- */
626 static void mace_write(mace_private *lp, ioaddr_t ioaddr, int reg, int data)
631 case 0: /* register 0-15 */
632 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
634 case 1: /* register 16-31 */
635 spin_lock_irqsave(&lp->bank_lock, flags);
637 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
639 spin_unlock_irqrestore(&lp->bank_lock, flags);
644 /* ----------------------------------------------------------------------------
646 Resets the MACE chip.
647 ---------------------------------------------------------------------------- */
648 static int mace_init(mace_private *lp, ioaddr_t ioaddr, char *enet_addr)
653 /* MACE Software reset */
654 mace_write(lp, ioaddr, MACE_BIUCC, 1);
655 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
656 /* Wait for reset bit to be cleared automatically after <= 200ns */;
659 printk(KERN_ERR "mace: reset failed, card removed ?\n");
664 mace_write(lp, ioaddr, MACE_BIUCC, 0);
666 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
667 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
669 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
670 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
673 * Bit 2-1 PORTSEL[1-0] Port Select.
676 * 10 DAI Port (reserved in Am2150)
678 * For this card, only the first two are valid.
679 * So, PLSCC should be set to
682 * Or just set ASEL in PHYCC below!
686 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
689 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
692 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
693 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
694 and the MACE device will automatically select the operating media
699 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
700 /* Poll ADDRCHG bit */
702 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
706 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
710 /* Set PADR register */
711 for (i = 0; i < ETHER_ADDR_LEN; i++)
712 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
714 /* MAC Configuration Control Register should be written last */
715 /* Let set_multicast_list set this. */
716 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
717 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
721 /* ----------------------------------------------------------------------------
723 This routine is scheduled to run after a CARD_INSERTION event
724 is received, to configure the PCMCIA socket, and to make the
725 ethernet device available to the system.
726 ---------------------------------------------------------------------------- */
728 #define CS_CHECK(fn, args...) \
729 while ((last_ret=CardServices(last_fn=(fn), args))!=0) goto cs_failed
731 static void nmclan_config(dev_link_t *link)
733 client_handle_t handle = link->handle;
734 struct net_device *dev = link->priv;
735 mace_private *lp = dev->priv;
739 int i, last_ret, last_fn;
742 DEBUG(0, "nmclan_config(0x%p)\n", link);
744 tuple.Attributes = 0;
745 tuple.TupleData = buf;
746 tuple.TupleDataMax = 64;
747 tuple.TupleOffset = 0;
748 tuple.DesiredTuple = CISTPL_CONFIG;
749 CS_CHECK(GetFirstTuple, handle, &tuple);
750 CS_CHECK(GetTupleData, handle, &tuple);
751 CS_CHECK(ParseTuple, handle, &tuple, &parse);
752 link->conf.ConfigBase = parse.config.base;
755 link->state |= DEV_CONFIG;
757 CS_CHECK(RequestIO, handle, &link->io);
758 CS_CHECK(RequestIRQ, handle, &link->irq);
759 CS_CHECK(RequestConfiguration, handle, &link->conf);
760 dev->irq = link->irq.AssignedIRQ;
761 dev->base_addr = link->io.BasePort1;
762 i = register_netdev(dev);
764 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
768 ioaddr = dev->base_addr;
770 /* Read the ethernet address from the CIS. */
771 tuple.DesiredTuple = 0x80 /* CISTPL_CFTABLE_ENTRY_MISC */;
772 tuple.TupleData = buf;
773 tuple.TupleDataMax = 64;
774 tuple.TupleOffset = 0;
775 CS_CHECK(GetFirstTuple, handle, &tuple);
776 CS_CHECK(GetTupleData, handle, &tuple);
777 memcpy(dev->dev_addr, tuple.TupleData, ETHER_ADDR_LEN);
779 /* Verify configuration by reading the MACE ID. */
783 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
784 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
785 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
786 DEBUG(0, "nmclan_cs configured: mace id=%x %x\n",
789 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
790 " be 0x40 0x?9\n", sig[0], sig[1]);
791 link->state &= ~DEV_CONFIG_PENDING;
796 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
799 /* The if_port symbol can be set when the module is loaded */
801 dev->if_port = if_port;
803 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
805 strcpy(lp->node.dev_name, dev->name);
806 link->dev = &lp->node;
807 link->state &= ~DEV_CONFIG_PENDING;
809 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port, hw_addr ",
810 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port]);
811 for (i = 0; i < 6; i++)
812 printk("%02X%s", dev->dev_addr[i], ((i<5) ? ":" : "\n"));
816 cs_error(link->handle, last_fn, last_ret);
818 nmclan_release((u_long)link);
821 } /* nmclan_config */
823 /* ----------------------------------------------------------------------------
825 After a card is removed, nmclan_release() will unregister the
826 net device, and release the PCMCIA configuration. If the device
827 is still open, this will be postponed until it is closed.
828 ---------------------------------------------------------------------------- */
829 static void nmclan_release(u_long arg)
831 dev_link_t *link = (dev_link_t *)arg;
833 DEBUG(0, "nmclan_release(0x%p)\n", link);
836 DEBUG(1, "nmclan_cs: release postponed, '%s' "
837 "still open\n", link->dev->dev_name);
838 link->state |= DEV_STALE_CONFIG;
842 CardServices(ReleaseConfiguration, link->handle);
843 CardServices(ReleaseIO, link->handle, &link->io);
844 CardServices(ReleaseIRQ, link->handle, &link->irq);
846 link->state &= ~DEV_CONFIG;
848 } /* nmclan_release */
850 /* ----------------------------------------------------------------------------
852 The card status event handler. Mostly, this schedules other
853 stuff to run after an event is received. A CARD_REMOVAL event
854 also sets some flags to discourage the net drivers from trying
855 to talk to the card any more.
856 ---------------------------------------------------------------------------- */
857 static int nmclan_event(event_t event, int priority,
858 event_callback_args_t *args)
860 dev_link_t *link = args->client_data;
861 struct net_device *dev = link->priv;
863 DEBUG(1, "nmclan_event(0x%06x)\n", event);
866 case CS_EVENT_CARD_REMOVAL:
867 link->state &= ~DEV_PRESENT;
868 if (link->state & DEV_CONFIG) {
869 netif_device_detach(dev);
870 mod_timer(&link->release, jiffies + HZ/20);
873 case CS_EVENT_CARD_INSERTION:
874 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
877 case CS_EVENT_PM_SUSPEND:
878 link->state |= DEV_SUSPEND;
879 /* Fall through... */
880 case CS_EVENT_RESET_PHYSICAL:
881 if (link->state & DEV_CONFIG) {
883 netif_device_detach(dev);
884 CardServices(ReleaseConfiguration, link->handle);
887 case CS_EVENT_PM_RESUME:
888 link->state &= ~DEV_SUSPEND;
889 /* Fall through... */
890 case CS_EVENT_CARD_RESET:
891 if (link->state & DEV_CONFIG) {
892 CardServices(RequestConfiguration, link->handle, &link->conf);
895 netif_device_attach(dev);
899 case CS_EVENT_RESET_REQUEST:
906 /* ----------------------------------------------------------------------------
908 Reset and restore all of the Xilinx and MACE registers.
909 ---------------------------------------------------------------------------- */
910 static void nmclan_reset(struct net_device *dev)
912 mace_private *lp = dev->priv;
915 dev_link_t *link = &lp->link;
919 /* Save original COR value */
921 reg.Action = CS_READ;
922 reg.Offset = CISREG_COR;
924 CardServices(AccessConfigurationRegister, link->handle, ®);
925 OrigCorValue = reg.Value;
928 reg.Action = CS_WRITE;
929 reg.Offset = CISREG_COR;
930 DEBUG(1, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
932 reg.Value = COR_SOFT_RESET;
933 CardServices(AccessConfigurationRegister, link->handle, ®);
934 /* Need to wait for 20 ms for PCMCIA to finish reset. */
936 /* Restore original COR configuration index */
937 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
938 CardServices(AccessConfigurationRegister, link->handle, ®);
939 /* Xilinx is now completely reset along with the MACE chip. */
940 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
942 #endif /* #if RESET_XILINX */
944 /* Xilinx is now completely reset along with the MACE chip. */
945 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
947 /* Reinitialize the MACE chip for operation. */
948 mace_init(lp, dev->base_addr, dev->dev_addr);
949 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
951 /* Restore the multicast list and enable TX and RX. */
952 restore_multicast_list(dev);
955 /* ----------------------------------------------------------------------------
957 [Someone tell me what this is supposed to do? Is if_port a defined
958 standard? If so, there should be defines to indicate 1=10Base-T,
959 2=10Base-2, etc. including limited automatic detection.]
960 ---------------------------------------------------------------------------- */
961 static int mace_config(struct net_device *dev, struct ifmap *map)
963 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
964 if (map->port <= 2) {
965 dev->if_port = map->port;
966 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
967 if_names[dev->if_port]);
974 /* ----------------------------------------------------------------------------
977 ---------------------------------------------------------------------------- */
978 static int mace_open(struct net_device *dev)
980 ioaddr_t ioaddr = dev->base_addr;
981 mace_private *lp = dev->priv;
982 dev_link_t *link = &lp->link;
991 netif_start_queue(dev);
994 return 0; /* Always succeed */
997 /* ----------------------------------------------------------------------------
999 Closes device driver.
1000 ---------------------------------------------------------------------------- */
1001 static int mace_close(struct net_device *dev)
1003 ioaddr_t ioaddr = dev->base_addr;
1004 mace_private *lp = dev->priv;
1005 dev_link_t *link = &lp->link;
1007 DEBUG(2, "%s: shutting down ethercard.\n", dev->name);
1009 /* Mask off all interrupts from the MACE chip. */
1010 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
1013 netif_stop_queue(dev);
1014 if (link->state & DEV_STALE_CONFIG)
1015 mod_timer(&link->release, jiffies + HZ/20);
1020 static int netdev_ethtool_ioctl (struct net_device *dev, void *useraddr)
1024 /* dev_ioctl() in ../../net/core/dev.c has already checked
1025 capable(CAP_NET_ADMIN), so don't bother with that here. */
1027 if (get_user(ethcmd, (u32 *)useraddr))
1032 case ETHTOOL_GDRVINFO: {
1033 struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
1034 strcpy (info.driver, DRV_NAME);
1035 strcpy (info.version, DRV_VERSION);
1036 sprintf(info.bus_info, "PCMCIA 0x%lx", dev->base_addr);
1037 if (copy_to_user (useraddr, &info, sizeof (info)))
1043 /* get message-level */
1044 case ETHTOOL_GMSGLVL: {
1045 struct ethtool_value edata = {ETHTOOL_GMSGLVL};
1046 edata.data = pc_debug;
1047 if (copy_to_user(useraddr, &edata, sizeof(edata)))
1051 /* set message-level */
1052 case ETHTOOL_SMSGLVL: {
1053 struct ethtool_value edata;
1054 if (copy_from_user(&edata, useraddr, sizeof(edata)))
1056 pc_debug = edata.data;
1068 static int mace_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1072 return netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
1080 /* ----------------------------------------------------------------------------
1082 This routine begins the packet transmit function. When completed,
1083 it will generate a transmit interrupt.
1085 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
1086 returns 0, the "packet is now solely the responsibility of the
1087 driver." If _start_xmit returns non-zero, the "transmission
1088 failed, put skb back into a list."
1089 ---------------------------------------------------------------------------- */
1091 static void mace_tx_timeout(struct net_device *dev)
1093 mace_private *lp = (mace_private *)dev->priv;
1094 dev_link_t *link = &lp->link;
1096 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
1097 #if RESET_ON_TIMEOUT
1098 printk("resetting card\n");
1099 CardServices(ResetCard, link->handle);
1100 #else /* #if RESET_ON_TIMEOUT */
1101 printk("NOT resetting card\n");
1102 #endif /* #if RESET_ON_TIMEOUT */
1103 dev->trans_start = jiffies;
1104 netif_wake_queue(dev);
1107 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
1109 mace_private *lp = (mace_private *)dev->priv;
1110 ioaddr_t ioaddr = dev->base_addr;
1112 netif_stop_queue(dev);
1114 DEBUG(3, "%s: mace_start_xmit(length = %ld) called.\n",
1115 dev->name, (long)skb->len);
1117 #if (!TX_INTERRUPTABLE)
1118 /* Disable MACE TX interrupts. */
1119 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
1120 ioaddr + AM2150_MACE_BASE + MACE_IMR);
1121 lp->tx_irq_disabled=1;
1122 #endif /* #if (!TX_INTERRUPTABLE) */
1125 /* This block must not be interrupted by another transmit request!
1126 mace_tx_timeout will take care of timer-based retransmissions from
1127 the upper layers. The interrupt handler is guaranteed never to
1128 service a transmit interrupt while we are in here.
1131 lp->linux_stats.tx_bytes += skb->len;
1132 lp->tx_free_frames--;
1134 /* WARNING: Write the _exact_ number of bytes written in the header! */
1135 /* Put out the word header [must be an outw()] . . . */
1136 outw(skb->len, ioaddr + AM2150_XMT);
1137 /* . . . and the packet [may be any combination of outw() and outb()] */
1138 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
1140 /* Odd byte transfer */
1141 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
1144 dev->trans_start = jiffies;
1147 if (lp->tx_free_frames > 0)
1148 netif_start_queue(dev);
1149 #endif /* #if MULTI_TX */
1152 #if (!TX_INTERRUPTABLE)
1153 /* Re-enable MACE TX interrupts. */
1154 lp->tx_irq_disabled=0;
1155 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
1156 #endif /* #if (!TX_INTERRUPTABLE) */
1161 } /* mace_start_xmit */
1163 /* ----------------------------------------------------------------------------
1165 The interrupt handler.
1166 ---------------------------------------------------------------------------- */
1167 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1169 struct net_device *dev = (struct net_device *) dev_id;
1170 mace_private *lp = dev->priv;
1171 ioaddr_t ioaddr = dev->base_addr;
1173 int IntrCnt = MACE_MAX_IR_ITERATIONS;
1176 DEBUG(2, "mace_interrupt(): irq 0x%X for unknown device.\n",
1181 if (lp->tx_irq_disabled) {
1183 (lp->tx_irq_disabled?
1184 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
1185 "[isr=%02X, imr=%02X]\n":
1186 KERN_NOTICE "%s: Re-entering the interrupt handler "
1187 "[isr=%02X, imr=%02X]\n"),
1189 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
1190 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
1192 /* WARNING: MACE_IR has been read! */
1196 if (!netif_device_present(dev)) {
1197 DEBUG(2, "%s: interrupt from dead card\n", dev->name);
1202 /* WARNING: MACE_IR is a READ/CLEAR port! */
1203 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1205 DEBUG(3, "mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1207 if (status & MACE_IR_RCVINT) {
1208 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1211 if (status & MACE_IR_XMTINT) {
1212 unsigned char fifofc;
1213 unsigned char xmtrc;
1214 unsigned char xmtfs;
1216 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1217 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1218 lp->linux_stats.tx_errors++;
1219 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1222 /* Transmit Retry Count (XMTRC, reg 4) */
1223 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1224 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1225 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1228 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1229 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1231 lp->mace_stats.xmtsv++;
1233 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1234 if (xmtfs & MACE_XMTFS_UFLO) {
1235 /* Underflow. Indicates that the Transmit FIFO emptied before
1236 the end of frame was reached. */
1237 lp->mace_stats.uflo++;
1239 if (xmtfs & MACE_XMTFS_LCOL) {
1240 /* Late Collision */
1241 lp->mace_stats.lcol++;
1243 if (xmtfs & MACE_XMTFS_MORE) {
1244 /* MORE than one retry was needed */
1245 lp->mace_stats.more++;
1247 if (xmtfs & MACE_XMTFS_ONE) {
1248 /* Exactly ONE retry occurred */
1249 lp->mace_stats.one++;
1251 if (xmtfs & MACE_XMTFS_DEFER) {
1252 /* Transmission was defered */
1253 lp->mace_stats.defer++;
1255 if (xmtfs & MACE_XMTFS_LCAR) {
1256 /* Loss of carrier */
1257 lp->mace_stats.lcar++;
1259 if (xmtfs & MACE_XMTFS_RTRY) {
1260 /* Retry error: transmit aborted after 16 attempts */
1261 lp->mace_stats.rtry++;
1263 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1265 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1267 lp->linux_stats.tx_packets++;
1268 lp->tx_free_frames++;
1269 netif_wake_queue(dev);
1270 } /* if (status & MACE_IR_XMTINT) */
1272 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1273 if (status & MACE_IR_JAB) {
1274 /* Jabber Error. Excessive transmit duration (20-150ms). */
1275 lp->mace_stats.jab++;
1277 if (status & MACE_IR_BABL) {
1278 /* Babble Error. >1518 bytes transmitted. */
1279 lp->mace_stats.babl++;
1281 if (status & MACE_IR_CERR) {
1282 /* Collision Error. CERR indicates the absence of the
1283 Signal Quality Error Test message after a packet
1285 lp->mace_stats.cerr++;
1287 if (status & MACE_IR_RCVCCO) {
1288 /* Receive Collision Count Overflow; */
1289 lp->mace_stats.rcvcco++;
1291 if (status & MACE_IR_RNTPCO) {
1292 /* Runt Packet Count Overflow */
1293 lp->mace_stats.rntpco++;
1295 if (status & MACE_IR_MPCO) {
1296 /* Missed Packet Count Overflow */
1297 lp->mace_stats.mpco++;
1299 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1301 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1304 } /* mace_interrupt */
1306 /* ----------------------------------------------------------------------------
1309 ---------------------------------------------------------------------------- */
1310 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1312 mace_private *lp = (mace_private *)dev->priv;
1313 ioaddr_t ioaddr = dev->base_addr;
1314 unsigned char rx_framecnt;
1315 unsigned short rx_status;
1318 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1319 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1322 rx_status = inw(ioaddr + AM2150_RCV);
1324 DEBUG(3, "%s: in mace_rx(), framecnt 0x%X, rx_status"
1325 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1327 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1328 lp->linux_stats.rx_errors++;
1329 if (rx_status & MACE_RCVFS_OFLO) {
1330 lp->mace_stats.oflo++;
1332 if (rx_status & MACE_RCVFS_CLSN) {
1333 lp->mace_stats.clsn++;
1335 if (rx_status & MACE_RCVFS_FRAM) {
1336 lp->mace_stats.fram++;
1338 if (rx_status & MACE_RCVFS_FCS) {
1339 lp->mace_stats.fcs++;
1342 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1343 /* Auto Strip is off, always subtract 4 */
1344 struct sk_buff *skb;
1346 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1347 /* runt packet count */
1348 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1349 /* rcv collision count */
1351 DEBUG(3, " receiving packet size 0x%X rx_status"
1352 " 0x%X.\n", pkt_len, rx_status);
1354 skb = dev_alloc_skb(pkt_len+2);
1359 skb_reserve(skb, 2);
1360 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1362 *(skb->tail-1) = inb(ioaddr + AM2150_RCV);
1363 skb->protocol = eth_type_trans(skb, dev);
1365 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1367 dev->last_rx = jiffies;
1368 lp->linux_stats.rx_packets++;
1369 lp->linux_stats.rx_bytes += skb->len;
1370 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1373 DEBUG(1, "%s: couldn't allocate a sk_buff of size"
1374 " %d.\n", dev->name, pkt_len);
1375 lp->linux_stats.rx_dropped++;
1378 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1384 /* ----------------------------------------------------------------------------
1386 ---------------------------------------------------------------------------- */
1387 static void pr_linux_stats(struct net_device_stats *pstats)
1389 DEBUG(2, "pr_linux_stats\n");
1390 DEBUG(2, " rx_packets=%-7ld tx_packets=%ld\n",
1391 (long)pstats->rx_packets, (long)pstats->tx_packets);
1392 DEBUG(2, " rx_errors=%-7ld tx_errors=%ld\n",
1393 (long)pstats->rx_errors, (long)pstats->tx_errors);
1394 DEBUG(2, " rx_dropped=%-7ld tx_dropped=%ld\n",
1395 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1396 DEBUG(2, " multicast=%-7ld collisions=%ld\n",
1397 (long)pstats->multicast, (long)pstats->collisions);
1399 DEBUG(2, " rx_length_errors=%-7ld rx_over_errors=%ld\n",
1400 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1401 DEBUG(2, " rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1402 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1403 DEBUG(2, " rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1404 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1406 DEBUG(2, " tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1407 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1408 DEBUG(2, " tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1409 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1410 DEBUG(2, " tx_window_errors=%ld\n",
1411 (long)pstats->tx_window_errors);
1412 } /* pr_linux_stats */
1414 /* ----------------------------------------------------------------------------
1416 ---------------------------------------------------------------------------- */
1417 static void pr_mace_stats(mace_statistics *pstats)
1419 DEBUG(2, "pr_mace_stats\n");
1421 DEBUG(2, " xmtsv=%-7d uflo=%d\n",
1422 pstats->xmtsv, pstats->uflo);
1423 DEBUG(2, " lcol=%-7d more=%d\n",
1424 pstats->lcol, pstats->more);
1425 DEBUG(2, " one=%-7d defer=%d\n",
1426 pstats->one, pstats->defer);
1427 DEBUG(2, " lcar=%-7d rtry=%d\n",
1428 pstats->lcar, pstats->rtry);
1431 DEBUG(2, " exdef=%-7d xmtrc=%d\n",
1432 pstats->exdef, pstats->xmtrc);
1434 /* RFS1--Receive Status (RCVSTS) */
1435 DEBUG(2, " oflo=%-7d clsn=%d\n",
1436 pstats->oflo, pstats->clsn);
1437 DEBUG(2, " fram=%-7d fcs=%d\n",
1438 pstats->fram, pstats->fcs);
1440 /* RFS2--Runt Packet Count (RNTPC) */
1441 /* RFS3--Receive Collision Count (RCVCC) */
1442 DEBUG(2, " rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1443 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1446 DEBUG(2, " jab=%-7d babl=%d\n",
1447 pstats->jab, pstats->babl);
1448 DEBUG(2, " cerr=%-7d rcvcco=%d\n",
1449 pstats->cerr, pstats->rcvcco);
1450 DEBUG(2, " rntpco=%-7d mpco=%d\n",
1451 pstats->rntpco, pstats->mpco);
1454 DEBUG(2, " mpc=%d\n", pstats->mpc);
1457 DEBUG(2, " rntpc=%d\n", pstats->rntpc);
1460 DEBUG(2, " rcvcc=%d\n", pstats->rcvcc);
1462 } /* pr_mace_stats */
1464 /* ----------------------------------------------------------------------------
1466 Update statistics. We change to register window 1, so this
1467 should be run single-threaded if the device is active. This is
1468 expected to be a rare operation, and it's simpler for the rest
1469 of the driver to assume that window 0 is always valid rather
1470 than use a special window-state variable.
1472 oflo & uflo should _never_ occur since it would mean the Xilinx
1473 was not able to transfer data between the MACE FIFO and the
1474 card's SRAM fast enough. If this happens, something is
1475 seriously wrong with the hardware.
1476 ---------------------------------------------------------------------------- */
1477 static void update_stats(ioaddr_t ioaddr, struct net_device *dev)
1479 mace_private *lp = (mace_private *)dev->priv;
1481 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1482 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1483 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1484 /* At this point, mace_stats is fully updated for this call.
1485 We may now update the linux_stats. */
1487 /* The MACE has no equivalent for linux_stats field which are commented
1490 /* lp->linux_stats.multicast; */
1491 lp->linux_stats.collisions =
1492 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1493 /* Collision: The MACE may retry sending a packet 15 times
1494 before giving up. The retry count is in XMTRC.
1495 Does each retry constitute a collision?
1496 If so, why doesn't the RCVCC record these collisions? */
1498 /* detailed rx_errors: */
1499 lp->linux_stats.rx_length_errors =
1500 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1501 /* lp->linux_stats.rx_over_errors */
1502 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1503 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1504 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1505 lp->linux_stats.rx_missed_errors =
1506 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1508 /* detailed tx_errors */
1509 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1510 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1511 /* LCAR usually results from bad cabling. */
1512 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1513 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1514 /* lp->linux_stats.tx_window_errors; */
1517 } /* update_stats */
1519 /* ----------------------------------------------------------------------------
1521 Gathers ethernet statistics from the MACE chip.
1522 ---------------------------------------------------------------------------- */
1523 static struct net_device_stats *mace_get_stats(struct net_device *dev)
1525 mace_private *lp = (mace_private *)dev->priv;
1527 update_stats(dev->base_addr, dev);
1529 DEBUG(1, "%s: updating the statistics.\n", dev->name);
1530 pr_linux_stats(&lp->linux_stats);
1531 pr_mace_stats(&lp->mace_stats);
1533 return &lp->linux_stats;
1534 } /* net_device_stats */
1536 /* ----------------------------------------------------------------------------
1538 Modified from Am79C90 data sheet.
1539 ---------------------------------------------------------------------------- */
1541 #if BROKEN_MULTICAST
1543 static void updateCRC(int *CRC, int bit)
1550 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1551 CRC generator polynomial. */
1555 /* shift CRC and control bit (CRC[32]) */
1556 for (j = 32; j > 0; j--)
1560 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1562 for (j = 0; j < 32; j++)
1566 /* ----------------------------------------------------------------------------
1568 Build logical address filter.
1569 Modified from Am79C90 data sheet.
1572 ladrf: logical address filter (contents initialized to 0)
1573 adr: ethernet address
1574 ---------------------------------------------------------------------------- */
1575 static void BuildLAF(int *ladrf, int *adr)
1577 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1579 int i, byte; /* temporary array indices */
1580 int hashcode; /* the output object */
1584 for (byte = 0; byte < 6; byte++)
1585 for (i = 0; i < 8; i++)
1586 updateCRC(CRC, (adr[byte] >> i) & 1);
1589 for (i = 0; i < 6; i++)
1590 hashcode = (hashcode << 1) + CRC[i];
1592 byte = hashcode >> 3;
1593 ladrf[byte] |= (1 << (hashcode & 7));
1597 printk(KERN_DEBUG " adr =");
1598 for (i = 0; i < 6; i++)
1599 printk(" %02X", adr[i]);
1600 printk("\n" KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63]"
1602 for (i = 0; i < 8; i++)
1603 printk(" %02X", ladrf[i]);
1609 /* ----------------------------------------------------------------------------
1610 restore_multicast_list
1611 Restores the multicast filter for MACE chip to the last
1612 set_multicast_list() call.
1617 ---------------------------------------------------------------------------- */
1618 static void restore_multicast_list(struct net_device *dev)
1620 mace_private *lp = (mace_private *)dev->priv;
1621 int num_addrs = lp->multicast_num_addrs;
1622 int *ladrf = lp->multicast_ladrf;
1623 ioaddr_t ioaddr = dev->base_addr;
1626 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
1627 dev->name, num_addrs);
1629 if (num_addrs > 0) {
1631 DEBUG(1, "Attempt to restore multicast list detected.\n");
1633 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1634 /* Poll ADDRCHG bit */
1635 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1637 /* Set LADRF register */
1638 for (i = 0; i < MACE_LADRF_LEN; i++)
1639 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1641 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1642 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1644 } else if (num_addrs < 0) {
1646 /* Promiscuous mode: receive all packets */
1647 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1648 mace_write(lp, ioaddr, MACE_MACCC,
1649 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1655 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1656 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1659 } /* restore_multicast_list */
1661 /* ----------------------------------------------------------------------------
1663 Set or clear the multicast filter for this adaptor.
1666 num_addrs == -1 Promiscuous mode, receive all packets
1667 num_addrs == 0 Normal mode, clear multicast list
1668 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1669 best-effort filtering.
1673 ---------------------------------------------------------------------------- */
1675 static void set_multicast_list(struct net_device *dev)
1677 mace_private *lp = (mace_private *)dev->priv;
1678 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1680 struct dev_mc_list *dmi = dev->mc_list;
1685 if (dev->mc_count != old) {
1686 old = dev->mc_count;
1687 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1693 /* Set multicast_num_addrs. */
1694 lp->multicast_num_addrs = dev->mc_count;
1696 /* Set multicast_ladrf. */
1697 if (num_addrs > 0) {
1698 /* Calculate multicast logical address filter */
1699 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1700 for (i = 0; i < dev->mc_count; i++) {
1701 memcpy(adr, dmi->dmi_addr, ETHER_ADDR_LEN);
1703 BuildLAF(lp->multicast_ladrf, adr);
1707 restore_multicast_list(dev);
1709 } /* set_multicast_list */
1711 #endif /* BROKEN_MULTICAST */
1713 static void restore_multicast_list(struct net_device *dev)
1715 ioaddr_t ioaddr = dev->base_addr;
1716 mace_private *lp = (mace_private *)dev->priv;
1718 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
1719 ((mace_private *)(dev->priv))->multicast_num_addrs);
1721 if (dev->flags & IFF_PROMISC) {
1722 /* Promiscuous mode: receive all packets */
1723 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1724 mace_write(lp, ioaddr, MACE_MACCC,
1725 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1729 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1730 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1732 } /* restore_multicast_list */
1734 static void set_multicast_list(struct net_device *dev)
1736 mace_private *lp = (mace_private *)dev->priv;
1741 if (dev->mc_count != old) {
1742 old = dev->mc_count;
1743 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1749 lp->multicast_num_addrs = dev->mc_count;
1750 restore_multicast_list(dev);
1752 } /* set_multicast_list */
1754 static struct pcmcia_driver nmclan_cs_driver = {
1755 .owner = THIS_MODULE,
1757 .name = "nmclan_cs",
1759 .attach = nmclan_attach,
1760 .detach = nmclan_detach,
1763 static int __init init_nmclan_cs(void)
1765 return pcmcia_register_driver(&nmclan_cs_driver);
1768 static void __exit exit_nmclan_cs(void)
1770 pcmcia_unregister_driver(&nmclan_cs_driver);
1771 while (dev_list != NULL)
1772 nmclan_detach(dev_list);
1775 module_init(init_nmclan_cs);
1776 module_exit(exit_nmclan_cs);