arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <trace/events/kvm.h>
  50
  51 #define CREATE_TRACE_POINTS
  52 #include "trace.h"
  53
  54 #include <asm/debugreg.h>
  55 #include <asm/msr.h>
  56 #include <asm/desc.h>
  57 #include <asm/mtrr.h>
  58 #include <asm/mce.h>
  59 #include <asm/i387.h>
  60 #include <asm/xcr.h>
  61 #include <asm/pvclock.h>
  62 #include <asm/div64.h>
  63
  64 #define MAX_IO_MSRS 256
  65 #define KVM_MAX_MCE_BANKS 32
  66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  67
  68 #define emul_to_vcpu(ctxt) \
  69         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  70
  71 /* EFER defaults:
  72  * - enable syscall per default because its emulated by KVM
  73  * - enable LME and LMA per default on 64 bit KVM
  74  */
  75 #ifdef CONFIG_X86_64
  76 static
  77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  78 #else
  79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  80 #endif
  81
  82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  84
  85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  86 static void process_nmi(struct kvm_vcpu *vcpu);
  87
  88 struct kvm_x86_ops *kvm_x86_ops;
  89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  90
  91 static bool ignore_msrs = 0;
  92 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  93
  94 bool kvm_has_tsc_control;
  95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  96 u32  kvm_max_guest_tsc_khz;
  97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  98
  99 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 100 static u32 tsc_tolerance_ppm = 250;
 101 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 161
 162 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 163 {
 164         int i;
 165         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 166                 vcpu->arch.apf.gfns[i] = ~0;
 167 }
 168
 169 static void kvm_on_user_return(struct user_return_notifier *urn)
 170 {
 171         unsigned slot;
 172         struct kvm_shared_msrs *locals
 173                 = container_of(urn, struct kvm_shared_msrs, urn);
 174         struct kvm_shared_msr_values *values;
 175
 176         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 177                 values = &locals->values[slot];
 178                 if (values->host != values->curr) {
 179                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 180                         values->curr = values->host;
 181                 }
 182         }
 183         locals->registered = false;
 184         user_return_notifier_unregister(urn);
 185 }
 186
 187 static void shared_msr_update(unsigned slot, u32 msr)
 188 {
 189         struct kvm_shared_msrs *smsr;
 190         u64 value;
 191
 192         smsr = &__get_cpu_var(shared_msrs);
 193         /* only read, and nobody should modify it at this time,
 194          * so don't need lock */
 195         if (slot >= shared_msrs_global.nr) {
 196                 printk(KERN_ERR "kvm: invalid MSR slot!");
 197                 return;
 198         }
 199         rdmsrl_safe(msr, &value);
 200         smsr->values[slot].host = value;
 201         smsr->values[slot].curr = value;
 202 }
 203
 204 void kvm_define_shared_msr(unsigned slot, u32 msr)
 205 {
 206         if (slot >= shared_msrs_global.nr)
 207                 shared_msrs_global.nr = slot + 1;
 208         shared_msrs_global.msrs[slot] = msr;
 209         /* we need ensured the shared_msr_global have been updated */
 210         smp_wmb();
 211 }
 212 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 213
 214 static void kvm_shared_msr_cpu_online(void)
 215 {
 216         unsigned i;
 217
 218         for (i = 0; i < shared_msrs_global.nr; ++i)
 219                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 220 }
 221
 222 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 223 {
 224         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 225
 226         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 227                 return;
 228         smsr->values[slot].curr = value;
 229         wrmsrl(shared_msrs_global.msrs[slot], value);
 230         if (!smsr->registered) {
 231                 smsr->urn.on_user_return = kvm_on_user_return;
 232                 user_return_notifier_register(&smsr->urn);
 233                 smsr->registered = true;
 234         }
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 237
 238 static void drop_user_return_notifiers(void *ignore)
 239 {
 240         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 241
 242         if (smsr->registered)
 243                 kvm_on_user_return(&smsr->urn);
 244 }
 245
 246 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 247 {
 248         if (irqchip_in_kernel(vcpu->kvm))
 249                 return vcpu->arch.apic_base;
 250         else
 251                 return vcpu->arch.apic_base;
 252 }
 253 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 254
 255 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 256 {
 257         /* TODO: reserve bits check */
 258         if (irqchip_in_kernel(vcpu->kvm))
 259                 kvm_lapic_set_base(vcpu, data);
 260         else
 261                 vcpu->arch.apic_base = data;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 264
 265 #define EXCPT_BENIGN            0
 266 #define EXCPT_CONTRIBUTORY      1
 267 #define EXCPT_PF                2
 268
 269 static int exception_class(int vector)
 270 {
 271         switch (vector) {
 272         case PF_VECTOR:
 273                 return EXCPT_PF;
 274         case DE_VECTOR:
 275         case TS_VECTOR:
 276         case NP_VECTOR:
 277         case SS_VECTOR:
 278         case GP_VECTOR:
 279                 return EXCPT_CONTRIBUTORY;
 280         default:
 281                 break;
 282         }
 283         return EXCPT_BENIGN;
 284 }
 285
 286 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 287                 unsigned nr, bool has_error, u32 error_code,
 288                 bool reinject)
 289 {
 290         u32 prev_nr;
 291         int class1, class2;
 292
 293         kvm_make_request(KVM_REQ_EVENT, vcpu);
 294
 295         if (!vcpu->arch.exception.pending) {
 296         queue:
 297                 vcpu->arch.exception.pending = true;
 298                 vcpu->arch.exception.has_error_code = has_error;
 299                 vcpu->arch.exception.nr = nr;
 300                 vcpu->arch.exception.error_code = error_code;
 301                 vcpu->arch.exception.reinject = reinject;
 302                 return;
 303         }
 304
 305         /* to check exception */
 306         prev_nr = vcpu->arch.exception.nr;
 307         if (prev_nr == DF_VECTOR) {
 308                 /* triple fault -> shutdown */
 309                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 310                 return;
 311         }
 312         class1 = exception_class(prev_nr);
 313         class2 = exception_class(nr);
 314         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 315                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 316                 /* generate double fault per SDM Table 5-5 */
 317                 vcpu->arch.exception.pending = true;
 318                 vcpu->arch.exception.has_error_code = true;
 319                 vcpu->arch.exception.nr = DF_VECTOR;
 320                 vcpu->arch.exception.error_code = 0;
 321         } else
 322                 /* replace previous exception with a new one in a hope
 323                    that instruction re-execution will regenerate lost
 324                    exception */
 325                 goto queue;
 326 }
 327
 328 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 329 {
 330         kvm_multiple_exception(vcpu, nr, false, 0, false);
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 333
 334 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, true);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 339
 340 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 341 {
 342         if (err)
 343                 kvm_inject_gp(vcpu, 0);
 344         else
 345                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 348
 349 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 350 {
 351         ++vcpu->stat.pf_guest;
 352         vcpu->arch.cr2 = fault->address;
 353         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 356
 357 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 358 {
 359         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 360                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 361         else
 362                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 363 }
 364
 365 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 366 {
 367         atomic_inc(&vcpu->arch.nmi_queued);
 368         kvm_make_request(KVM_REQ_NMI, vcpu);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 371
 372 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 377
 378 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 383
 384 /*
 385  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 386  * a #GP and return false.
 387  */
 388 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 389 {
 390         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 391                 return true;
 392         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 393         return false;
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 396
 397 /*
 398  * This function will be used to read from the physical memory of the currently
 399  * running guest. The difference to kvm_read_guest_page is that this function
 400  * can read from guest physical or from the guest's guest physical memory.
 401  */
 402 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 403                             gfn_t ngfn, void *data, int offset, int len,
 404                             u32 access)
 405 {
 406         gfn_t real_gfn;
 407         gpa_t ngpa;
 408
 409         ngpa     = gfn_to_gpa(ngfn);
 410         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 411         if (real_gfn == UNMAPPED_GVA)
 412                 return -EFAULT;
 413
 414         real_gfn = gpa_to_gfn(real_gfn);
 415
 416         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 419
 420 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 421                                void *data, int offset, int len, u32 access)
 422 {
 423         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 424                                        data, offset, len, access);
 425 }
 426
 427 /*
 428  * Load the pae pdptrs.  Return true is they are all valid.
 429  */
 430 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 431 {
 432         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 433         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 434         int i;
 435         int ret;
 436         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 437
 438         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 439                                       offset * sizeof(u64), sizeof(pdpte),
 440                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 441         if (ret < 0) {
 442                 ret = 0;
 443                 goto out;
 444         }
 445         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 446                 if (is_present_gpte(pdpte[i]) &&
 447                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 448                         ret = 0;
 449                         goto out;
 450                 }
 451         }
 452         ret = 1;
 453
 454         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 455         __set_bit(VCPU_EXREG_PDPTR,
 456                   (unsigned long *)&vcpu->arch.regs_avail);
 457         __set_bit(VCPU_EXREG_PDPTR,
 458                   (unsigned long *)&vcpu->arch.regs_dirty);
 459 out:
 460
 461         return ret;
 462 }
 463 EXPORT_SYMBOL_GPL(load_pdptrs);
 464
 465 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 466 {
 467         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 468         bool changed = true;
 469         int offset;
 470         gfn_t gfn;
 471         int r;
 472
 473         if (is_long_mode(vcpu) || !is_pae(vcpu))
 474                 return false;
 475
 476         if (!test_bit(VCPU_EXREG_PDPTR,
 477                       (unsigned long *)&vcpu->arch.regs_avail))
 478                 return true;
 479
 480         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 481         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 482         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 483                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 484         if (r < 0)
 485                 goto out;
 486         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 487 out:
 488
 489         return changed;
 490 }
 491
 492 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 493 {
 494         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 495         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 496                                     X86_CR0_CD | X86_CR0_NW;
 497
 498         cr0 |= X86_CR0_ET;
 499
 500 #ifdef CONFIG_X86_64
 501         if (cr0 & 0xffffffff00000000UL)
 502                 return 1;
 503 #endif
 504
 505         cr0 &= ~CR0_RESERVED_BITS;
 506
 507         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 508                 return 1;
 509
 510         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 511                 return 1;
 512
 513         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 514 #ifdef CONFIG_X86_64
 515                 if ((vcpu->arch.efer & EFER_LME)) {
 516                         int cs_db, cs_l;
 517
 518                         if (!is_pae(vcpu))
 519                                 return 1;
 520                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 521                         if (cs_l)
 522                                 return 1;
 523                 } else
 524 #endif
 525                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 526                                                  kvm_read_cr3(vcpu)))
 527                         return 1;
 528         }
 529
 530         kvm_x86_ops->set_cr0(vcpu, cr0);
 531
 532         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 533                 kvm_clear_async_pf_completion_queue(vcpu);
 534                 kvm_async_pf_hash_reset(vcpu);
 535         }
 536
 537         if ((cr0 ^ old_cr0) & update_bits)
 538                 kvm_mmu_reset_context(vcpu);
 539         return 0;
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 542
 543 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 544 {
 545         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_lmsw);
 548
 549 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 550 {
 551         u64 xcr0;
 552
 553         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 554         if (index != XCR_XFEATURE_ENABLED_MASK)
 555                 return 1;
 556         xcr0 = xcr;
 557         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 558                 return 1;
 559         if (!(xcr0 & XSTATE_FP))
 560                 return 1;
 561         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 562                 return 1;
 563         if (xcr0 & ~host_xcr0)
 564                 return 1;
 565         vcpu->arch.xcr0 = xcr0;
 566         vcpu->guest_xcr0_loaded = 0;
 567         return 0;
 568 }
 569
 570 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 571 {
 572         if (__kvm_set_xcr(vcpu, index, xcr)) {
 573                 kvm_inject_gp(vcpu, 0);
 574                 return 1;
 575         }
 576         return 0;
 577 }
 578 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 579
 580 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 581 {
 582         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 583         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 584                                    X86_CR4_PAE | X86_CR4_SMEP;
 585         if (cr4 & CR4_RESERVED_BITS)
 586                 return 1;
 587
 588         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 589                 return 1;
 590
 591         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 592                 return 1;
 593
 594         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 595                 return 1;
 596
 597         if (is_long_mode(vcpu)) {
 598                 if (!(cr4 & X86_CR4_PAE))
 599                         return 1;
 600         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 601                    && ((cr4 ^ old_cr4) & pdptr_bits)
 602                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 603                                    kvm_read_cr3(vcpu)))
 604                 return 1;
 605
 606         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 607                 return 1;
 608
 609         if ((cr4 ^ old_cr4) & pdptr_bits)
 610                 kvm_mmu_reset_context(vcpu);
 611
 612         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 613                 kvm_update_cpuid(vcpu);
 614
 615         return 0;
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 618
 619 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 620 {
 621         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 622                 kvm_mmu_sync_roots(vcpu);
 623                 kvm_mmu_flush_tlb(vcpu);
 624                 return 0;
 625         }
 626
 627         if (is_long_mode(vcpu)) {
 628                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 629                         return 1;
 630         } else {
 631                 if (is_pae(vcpu)) {
 632                         if (cr3 & CR3_PAE_RESERVED_BITS)
 633                                 return 1;
 634                         if (is_paging(vcpu) &&
 635                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 636                                 return 1;
 637                 }
 638                 /*
 639                  * We don't check reserved bits in nonpae mode, because
 640                  * this isn't enforced, and VMware depends on this.
 641                  */
 642         }
 643
 644         /*
 645          * Does the new cr3 value map to physical memory? (Note, we
 646          * catch an invalid cr3 even in real-mode, because it would
 647          * cause trouble later on when we turn on paging anyway.)
 648          *
 649          * A real CPU would silently accept an invalid cr3 and would
 650          * attempt to use it - with largely undefined (and often hard
 651          * to debug) behavior on the guest side.
 652          */
 653         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 654                 return 1;
 655         vcpu->arch.cr3 = cr3;
 656         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 657         vcpu->arch.mmu.new_cr3(vcpu);
 658         return 0;
 659 }
 660 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 661
 662 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 663 {
 664         if (cr8 & CR8_RESERVED_BITS)
 665                 return 1;
 666         if (irqchip_in_kernel(vcpu->kvm))
 667                 kvm_lapic_set_tpr(vcpu, cr8);
 668         else
 669                 vcpu->arch.cr8 = cr8;
 670         return 0;
 671 }
 672 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 673
 674 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 675 {
 676         if (irqchip_in_kernel(vcpu->kvm))
 677                 return kvm_lapic_get_cr8(vcpu);
 678         else
 679                 return vcpu->arch.cr8;
 680 }
 681 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 682
 683 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 684 {
 685         switch (dr) {
 686         case 0 ... 3:
 687                 vcpu->arch.db[dr] = val;
 688                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 689                         vcpu->arch.eff_db[dr] = val;
 690                 break;
 691         case 4:
 692                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 693                         return 1; /* #UD */
 694                 /* fall through */
 695         case 6:
 696                 if (val & 0xffffffff00000000ULL)
 697                         return -1; /* #GP */
 698                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 699                 break;
 700         case 5:
 701                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 702                         return 1; /* #UD */
 703                 /* fall through */
 704         default: /* 7 */
 705                 if (val & 0xffffffff00000000ULL)
 706                         return -1; /* #GP */
 707                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 708                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 709                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 710                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 711                 }
 712                 break;
 713         }
 714
 715         return 0;
 716 }
 717
 718 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 719 {
 720         int res;
 721
 722         res = __kvm_set_dr(vcpu, dr, val);
 723         if (res > 0)
 724                 kvm_queue_exception(vcpu, UD_VECTOR);
 725         else if (res < 0)
 726                 kvm_inject_gp(vcpu, 0);
 727
 728         return res;
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_set_dr);
 731
 732 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 733 {
 734         switch (dr) {
 735         case 0 ... 3:
 736                 *val = vcpu->arch.db[dr];
 737                 break;
 738         case 4:
 739                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 740                         return 1;
 741                 /* fall through */
 742         case 6:
 743                 *val = vcpu->arch.dr6;
 744                 break;
 745         case 5:
 746                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 747                         return 1;
 748                 /* fall through */
 749         default: /* 7 */
 750                 *val = vcpu->arch.dr7;
 751                 break;
 752         }
 753
 754         return 0;
 755 }
 756
 757 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 758 {
 759         if (_kvm_get_dr(vcpu, dr, val)) {
 760                 kvm_queue_exception(vcpu, UD_VECTOR);
 761                 return 1;
 762         }
 763         return 0;
 764 }
 765 EXPORT_SYMBOL_GPL(kvm_get_dr);
 766
 767 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 768 {
 769         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 770         u64 data;
 771         int err;
 772
 773         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 774         if (err)
 775                 return err;
 776         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 777         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 778         return err;
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 781
 782 /*
 783  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 784  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 785  *
 786  * This list is modified at module load time to reflect the
 787  * capabilities of the host cpu. This capabilities test skips MSRs that are
 788  * kvm-specific. Those are put in the beginning of the list.
 789  */
 790
 791 #define KVM_SAVE_MSRS_BEGIN     9
 792 static u32 msrs_to_save[] = {
 793         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 794         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 795         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 796         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 797         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 798         MSR_STAR,
 799 #ifdef CONFIG_X86_64
 800         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 801 #endif
 802         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 803 };
 804
 805 static unsigned num_msrs_to_save;
 806
 807 static u32 emulated_msrs[] = {
 808         MSR_IA32_TSCDEADLINE,
 809         MSR_IA32_MISC_ENABLE,
 810         MSR_IA32_MCG_STATUS,
 811         MSR_IA32_MCG_CTL,
 812 };
 813
 814 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 815 {
 816         u64 old_efer = vcpu->arch.efer;
 817
 818         if (efer & efer_reserved_bits)
 819                 return 1;
 820
 821         if (is_paging(vcpu)
 822             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 823                 return 1;
 824
 825         if (efer & EFER_FFXSR) {
 826                 struct kvm_cpuid_entry2 *feat;
 827
 828                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 829                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 830                         return 1;
 831         }
 832
 833         if (efer & EFER_SVME) {
 834                 struct kvm_cpuid_entry2 *feat;
 835
 836                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 837                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 838                         return 1;
 839         }
 840
 841         efer &= ~EFER_LMA;
 842         efer |= vcpu->arch.efer & EFER_LMA;
 843
 844         kvm_x86_ops->set_efer(vcpu, efer);
 845
 846         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 847
 848         /* Update reserved bits */
 849         if ((efer ^ old_efer) & EFER_NX)
 850                 kvm_mmu_reset_context(vcpu);
 851
 852         return 0;
 853 }
 854
 855 void kvm_enable_efer_bits(u64 mask)
 856 {
 857        efer_reserved_bits &= ~mask;
 858 }
 859 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 860
 861
 862 /*
 863  * Writes msr value into into the appropriate "register".
 864  * Returns 0 on success, non-0 otherwise.
 865  * Assumes vcpu_load() was already called.
 866  */
 867 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 868 {
 869         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 870 }
 871
 872 /*
 873  * Adapt set_msr() to msr_io()'s calling convention
 874  */
 875 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 876 {
 877         return kvm_set_msr(vcpu, index, *data);
 878 }
 879
 880 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 881 {
 882         int version;
 883         int r;
 884         struct pvclock_wall_clock wc;
 885         struct timespec boot;
 886
 887         if (!wall_clock)
 888                 return;
 889
 890         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 891         if (r)
 892                 return;
 893
 894         if (version & 1)
 895                 ++version;  /* first time write, random junk */
 896
 897         ++version;
 898
 899         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 900
 901         /*
 902          * The guest calculates current wall clock time by adding
 903          * system time (updated by kvm_guest_time_update below) to the
 904          * wall clock specified here.  guest system time equals host
 905          * system time for us, thus we must fill in host boot time here.
 906          */
 907         getboottime(&boot);
 908
 909         wc.sec = boot.tv_sec;
 910         wc.nsec = boot.tv_nsec;
 911         wc.version = version;
 912
 913         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 914
 915         version++;
 916         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 917 }
 918
 919 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 920 {
 921         uint32_t quotient, remainder;
 922
 923         /* Don't try to replace with do_div(), this one calculates
 924          * "(dividend << 32) / divisor" */
 925         __asm__ ( "divl %4"
 926                   : "=a" (quotient), "=d" (remainder)
 927                   : "0" (0), "1" (dividend), "r" (divisor) );
 928         return quotient;
 929 }
 930
 931 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 932                                s8 *pshift, u32 *pmultiplier)
 933 {
 934         uint64_t scaled64;
 935         int32_t  shift = 0;
 936         uint64_t tps64;
 937         uint32_t tps32;
 938
 939         tps64 = base_khz * 1000LL;
 940         scaled64 = scaled_khz * 1000LL;
 941         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 942                 tps64 >>= 1;
 943                 shift--;
 944         }
 945
 946         tps32 = (uint32_t)tps64;
 947         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 948                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 949                         scaled64 >>= 1;
 950                 else
 951                         tps32 <<= 1;
 952                 shift++;
 953         }
 954
 955         *pshift = shift;
 956         *pmultiplier = div_frac(scaled64, tps32);
 957
 958         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 959                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 960 }
 961
 962 static inline u64 get_kernel_ns(void)
 963 {
 964         struct timespec ts;
 965
 966         WARN_ON(preemptible());
 967         ktime_get_ts(&ts);
 968         monotonic_to_bootbased(&ts);
 969         return timespec_to_ns(&ts);
 970 }
 971
 972 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 973 unsigned long max_tsc_khz;
 974
 975 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 976 {
 977         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
 978                                    vcpu->arch.virtual_tsc_shift);
 979 }
 980
 981 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
 982 {
 983         u64 v = (u64)khz * (1000000 + ppm);
 984         do_div(v, 1000000);
 985         return v;
 986 }
 987
 988 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
 989 {
 990         u32 thresh_lo, thresh_hi;
 991         int use_scaling = 0;
 992
 993         /* Compute a scale to convert nanoseconds in TSC cycles */
 994         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 995                            &vcpu->arch.virtual_tsc_shift,
 996                            &vcpu->arch.virtual_tsc_mult);
 997         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
 998
 999         /*
1000          * Compute the variation in TSC rate which is acceptable
1001          * within the range of tolerance and decide if the
1002          * rate being applied is within that bounds of the hardware
1003          * rate.  If so, no scaling or compensation need be done.
1004          */
1005         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1006         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1007         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1008                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1009                 use_scaling = 1;
1010         }
1011         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1012 }
1013
1014 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1015 {
1016         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1017                                       vcpu->arch.virtual_tsc_mult,
1018                                       vcpu->arch.virtual_tsc_shift);
1019         tsc += vcpu->arch.this_tsc_write;
1020         return tsc;
1021 }
1022
1023 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1024 {
1025         struct kvm *kvm = vcpu->kvm;
1026         u64 offset, ns, elapsed;
1027         unsigned long flags;
1028         s64 nsdiff;
1029
1030         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1031         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1032         ns = get_kernel_ns();
1033         elapsed = ns - kvm->arch.last_tsc_nsec;
1034
1035         /* n.b - signed multiplication and division required */
1036         nsdiff = data - kvm->arch.last_tsc_write;
1037 #ifdef CONFIG_X86_64
1038         nsdiff = (nsdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1039 #else
1040         /* do_div() only does unsigned */
1041         asm("idivl %2; xor %%edx, %%edx"
1042             : "=A"(nsdiff)
1043             : "A"(nsdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1044 #endif
1045         nsdiff -= elapsed;
1046         if (nsdiff < 0)
1047                 nsdiff = -nsdiff;
1048
1049         /*
1050          * Special case: TSC write with a small delta (1 second) of virtual
1051          * cycle time against real time is interpreted as an attempt to
1052          * synchronize the CPU.
1053          *
1054          * For a reliable TSC, we can match TSC offsets, and for an unstable
1055          * TSC, we add elapsed time in this computation.  We could let the
1056          * compensation code attempt to catch up if we fall behind, but
1057          * it's better to try to match offsets from the beginning.
1058          */
1059         if (nsdiff < NSEC_PER_SEC &&
1060             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1061                 if (!check_tsc_unstable()) {
1062                         offset = kvm->arch.cur_tsc_offset;
1063                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1064                 } else {
1065                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1066                         data += delta;
1067                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1068                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1069                 }
1070         } else {
1071                 /*
1072                  * We split periods of matched TSC writes into generations.
1073                  * For each generation, we track the original measured
1074                  * nanosecond time, offset, and write, so if TSCs are in
1075                  * sync, we can match exact offset, and if not, we can match
1076                  * exact software computaion in compute_guest_tsc()
1077                  *
1078                  * These values are tracked in kvm->arch.cur_xxx variables.
1079                  */
1080                 kvm->arch.cur_tsc_generation++;
1081                 kvm->arch.cur_tsc_nsec = ns;
1082                 kvm->arch.cur_tsc_write = data;
1083                 kvm->arch.cur_tsc_offset = offset;
1084                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1085                          kvm->arch.cur_tsc_generation, data);
1086         }
1087
1088         /*
1089          * We also track th most recent recorded KHZ, write and time to
1090          * allow the matching interval to be extended at each write.
1091          */
1092         kvm->arch.last_tsc_nsec = ns;
1093         kvm->arch.last_tsc_write = data;
1094         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1095
1096         /* Reset of TSC must disable overshoot protection below */
1097         vcpu->arch.hv_clock.tsc_timestamp = 0;
1098         vcpu->arch.last_guest_tsc = data;
1099
1100         /* Keep track of which generation this VCPU has synchronized to */
1101         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1102         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1103         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1104
1105         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1106         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1107 }
1108
1109 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1110
1111 static int kvm_guest_time_update(struct kvm_vcpu *v)
1112 {
1113         unsigned long flags;
1114         struct kvm_vcpu_arch *vcpu = &v->arch;
1115         void *shared_kaddr;
1116         unsigned long this_tsc_khz;
1117         s64 kernel_ns, max_kernel_ns;
1118         u64 tsc_timestamp;
1119
1120         /* Keep irq disabled to prevent changes to the clock */
1121         local_irq_save(flags);
1122         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1123         kernel_ns = get_kernel_ns();
1124         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1125         if (unlikely(this_tsc_khz == 0)) {
1126                 local_irq_restore(flags);
1127                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1128                 return 1;
1129         }
1130
1131         /*
1132          * We may have to catch up the TSC to match elapsed wall clock
1133          * time for two reasons, even if kvmclock is used.
1134          *   1) CPU could have been running below the maximum TSC rate
1135          *   2) Broken TSC compensation resets the base at each VCPU
1136          *      entry to avoid unknown leaps of TSC even when running
1137          *      again on the same CPU.  This may cause apparent elapsed
1138          *      time to disappear, and the guest to stand still or run
1139          *      very slowly.
1140          */
1141         if (vcpu->tsc_catchup) {
1142                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1143                 if (tsc > tsc_timestamp) {
1144                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1145                         tsc_timestamp = tsc;
1146                 }
1147         }
1148
1149         local_irq_restore(flags);
1150
1151         if (!vcpu->time_page)
1152                 return 0;
1153
1154         /*
1155          * Time as measured by the TSC may go backwards when resetting the base
1156          * tsc_timestamp.  The reason for this is that the TSC resolution is
1157          * higher than the resolution of the other clock scales.  Thus, many
1158          * possible measurments of the TSC correspond to one measurement of any
1159          * other clock, and so a spread of values is possible.  This is not a
1160          * problem for the computation of the nanosecond clock; with TSC rates
1161          * around 1GHZ, there can only be a few cycles which correspond to one
1162          * nanosecond value, and any path through this code will inevitably
1163          * take longer than that.  However, with the kernel_ns value itself,
1164          * the precision may be much lower, down to HZ granularity.  If the
1165          * first sampling of TSC against kernel_ns ends in the low part of the
1166          * range, and the second in the high end of the range, we can get:
1167          *
1168          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1169          *
1170          * As the sampling errors potentially range in the thousands of cycles,
1171          * it is possible such a time value has already been observed by the
1172          * guest.  To protect against this, we must compute the system time as
1173          * observed by the guest and ensure the new system time is greater.
1174          */
1175         max_kernel_ns = 0;
1176         if (vcpu->hv_clock.tsc_timestamp) {
1177                 max_kernel_ns = vcpu->last_guest_tsc -
1178                                 vcpu->hv_clock.tsc_timestamp;
1179                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1180                                     vcpu->hv_clock.tsc_to_system_mul,
1181                                     vcpu->hv_clock.tsc_shift);
1182                 max_kernel_ns += vcpu->last_kernel_ns;
1183         }
1184
1185         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1186                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1187                                    &vcpu->hv_clock.tsc_shift,
1188                                    &vcpu->hv_clock.tsc_to_system_mul);
1189                 vcpu->hw_tsc_khz = this_tsc_khz;
1190         }
1191
1192         if (max_kernel_ns > kernel_ns)
1193                 kernel_ns = max_kernel_ns;
1194
1195         /* With all the info we got, fill in the values */
1196         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1197         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1198         vcpu->last_kernel_ns = kernel_ns;
1199         vcpu->last_guest_tsc = tsc_timestamp;
1200         vcpu->hv_clock.flags = 0;
1201
1202         /*
1203          * The interface expects us to write an even number signaling that the
1204          * update is finished. Since the guest won't see the intermediate
1205          * state, we just increase by 2 at the end.
1206          */
1207         vcpu->hv_clock.version += 2;
1208
1209         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1210
1211         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1212                sizeof(vcpu->hv_clock));
1213
1214         kunmap_atomic(shared_kaddr, KM_USER0);
1215
1216         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1217         return 0;
1218 }
1219
1220 static bool msr_mtrr_valid(unsigned msr)
1221 {
1222         switch (msr) {
1223         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1224         case MSR_MTRRfix64K_00000:
1225         case MSR_MTRRfix16K_80000:
1226         case MSR_MTRRfix16K_A0000:
1227         case MSR_MTRRfix4K_C0000:
1228         case MSR_MTRRfix4K_C8000:
1229         case MSR_MTRRfix4K_D0000:
1230         case MSR_MTRRfix4K_D8000:
1231         case MSR_MTRRfix4K_E0000:
1232         case MSR_MTRRfix4K_E8000:
1233         case MSR_MTRRfix4K_F0000:
1234         case MSR_MTRRfix4K_F8000:
1235         case MSR_MTRRdefType:
1236         case MSR_IA32_CR_PAT:
1237                 return true;
1238         case 0x2f8:
1239                 return true;
1240         }
1241         return false;
1242 }
1243
1244 static bool valid_pat_type(unsigned t)
1245 {
1246         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1247 }
1248
1249 static bool valid_mtrr_type(unsigned t)
1250 {
1251         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1252 }
1253
1254 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1255 {
1256         int i;
1257
1258         if (!msr_mtrr_valid(msr))
1259                 return false;
1260
1261         if (msr == MSR_IA32_CR_PAT) {
1262                 for (i = 0; i < 8; i++)
1263                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1264                                 return false;
1265                 return true;
1266         } else if (msr == MSR_MTRRdefType) {
1267                 if (data & ~0xcff)
1268                         return false;
1269                 return valid_mtrr_type(data & 0xff);
1270         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1271                 for (i = 0; i < 8 ; i++)
1272                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1273                                 return false;
1274                 return true;
1275         }
1276
1277         /* variable MTRRs */
1278         return valid_mtrr_type(data & 0xff);
1279 }
1280
1281 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1282 {
1283         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1284
1285         if (!mtrr_valid(vcpu, msr, data))
1286                 return 1;
1287
1288         if (msr == MSR_MTRRdefType) {
1289                 vcpu->arch.mtrr_state.def_type = data;
1290                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1291         } else if (msr == MSR_MTRRfix64K_00000)
1292                 p[0] = data;
1293         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1294                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1295         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1296                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1297         else if (msr == MSR_IA32_CR_PAT)
1298                 vcpu->arch.pat = data;
1299         else {  /* Variable MTRRs */
1300                 int idx, is_mtrr_mask;
1301                 u64 *pt;
1302
1303                 idx = (msr - 0x200) / 2;
1304                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1305                 if (!is_mtrr_mask)
1306                         pt =
1307                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1308                 else
1309                         pt =
1310                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1311                 *pt = data;
1312         }
1313
1314         kvm_mmu_reset_context(vcpu);
1315         return 0;
1316 }
1317
1318 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1319 {
1320         u64 mcg_cap = vcpu->arch.mcg_cap;
1321         unsigned bank_num = mcg_cap & 0xff;
1322
1323         switch (msr) {
1324         case MSR_IA32_MCG_STATUS:
1325                 vcpu->arch.mcg_status = data;
1326                 break;
1327         case MSR_IA32_MCG_CTL:
1328                 if (!(mcg_cap & MCG_CTL_P))
1329                         return 1;
1330                 if (data != 0 && data != ~(u64)0)
1331                         return -1;
1332                 vcpu->arch.mcg_ctl = data;
1333                 break;
1334         default:
1335                 if (msr >= MSR_IA32_MC0_CTL &&
1336                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1337                         u32 offset = msr - MSR_IA32_MC0_CTL;
1338                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1339                          * some Linux kernels though clear bit 10 in bank 4 to
1340                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1341                          * this to avoid an uncatched #GP in the guest
1342                          */
1343                         if ((offset & 0x3) == 0 &&
1344                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1345                                 return -1;
1346                         vcpu->arch.mce_banks[offset] = data;
1347                         break;
1348                 }
1349                 return 1;
1350         }
1351         return 0;
1352 }
1353
1354 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1355 {
1356         struct kvm *kvm = vcpu->kvm;
1357         int lm = is_long_mode(vcpu);
1358         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1359                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1360         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1361                 : kvm->arch.xen_hvm_config.blob_size_32;
1362         u32 page_num = data & ~PAGE_MASK;
1363         u64 page_addr = data & PAGE_MASK;
1364         u8 *page;
1365         int r;
1366
1367         r = -E2BIG;
1368         if (page_num >= blob_size)
1369                 goto out;
1370         r = -ENOMEM;
1371         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1372         if (IS_ERR(page)) {
1373                 r = PTR_ERR(page);
1374                 goto out;
1375         }
1376         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1377                 goto out_free;
1378         r = 0;
1379 out_free:
1380         kfree(page);
1381 out:
1382         return r;
1383 }
1384
1385 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1386 {
1387         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1388 }
1389
1390 static bool kvm_hv_msr_partition_wide(u32 msr)
1391 {
1392         bool r = false;
1393         switch (msr) {
1394         case HV_X64_MSR_GUEST_OS_ID:
1395         case HV_X64_MSR_HYPERCALL:
1396                 r = true;
1397                 break;
1398         }
1399
1400         return r;
1401 }
1402
1403 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1404 {
1405         struct kvm *kvm = vcpu->kvm;
1406
1407         switch (msr) {
1408         case HV_X64_MSR_GUEST_OS_ID:
1409                 kvm->arch.hv_guest_os_id = data;
1410                 /* setting guest os id to zero disables hypercall page */
1411                 if (!kvm->arch.hv_guest_os_id)
1412                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1413                 break;
1414         case HV_X64_MSR_HYPERCALL: {
1415                 u64 gfn;
1416                 unsigned long addr;
1417                 u8 instructions[4];
1418
1419                 /* if guest os id is not set hypercall should remain disabled */
1420                 if (!kvm->arch.hv_guest_os_id)
1421                         break;
1422                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1423                         kvm->arch.hv_hypercall = data;
1424                         break;
1425                 }
1426                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1427                 addr = gfn_to_hva(kvm, gfn);
1428                 if (kvm_is_error_hva(addr))
1429                         return 1;
1430                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1431                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1432                 if (__copy_to_user((void __user *)addr, instructions, 4))
1433                         return 1;
1434                 kvm->arch.hv_hypercall = data;
1435                 break;
1436         }
1437         default:
1438                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1439                           "data 0x%llx\n", msr, data);
1440                 return 1;
1441         }
1442         return 0;
1443 }
1444
1445 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1446 {
1447         switch (msr) {
1448         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1449                 unsigned long addr;
1450
1451                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1452                         vcpu->arch.hv_vapic = data;
1453                         break;
1454                 }
1455                 addr = gfn_to_hva(vcpu->kvm, data >>
1456                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1457                 if (kvm_is_error_hva(addr))
1458                         return 1;
1459                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1460                         return 1;
1461                 vcpu->arch.hv_vapic = data;
1462                 break;
1463         }
1464         case HV_X64_MSR_EOI:
1465                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1466         case HV_X64_MSR_ICR:
1467                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1468         case HV_X64_MSR_TPR:
1469                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1470         default:
1471                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1472                           "data 0x%llx\n", msr, data);
1473                 return 1;
1474         }
1475
1476         return 0;
1477 }
1478
1479 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1480 {
1481         gpa_t gpa = data & ~0x3f;
1482
1483         /* Bits 2:5 are resrved, Should be zero */
1484         if (data & 0x3c)
1485                 return 1;
1486
1487         vcpu->arch.apf.msr_val = data;
1488
1489         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1490                 kvm_clear_async_pf_completion_queue(vcpu);
1491                 kvm_async_pf_hash_reset(vcpu);
1492                 return 0;
1493         }
1494
1495         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1496                 return 1;
1497
1498         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1499         kvm_async_pf_wakeup_all(vcpu);
1500         return 0;
1501 }
1502
1503 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1504 {
1505         if (vcpu->arch.time_page) {
1506                 kvm_release_page_dirty(vcpu->arch.time_page);
1507                 vcpu->arch.time_page = NULL;
1508         }
1509 }
1510
1511 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1512 {
1513         u64 delta;
1514
1515         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1516                 return;
1517
1518         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1519         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1520         vcpu->arch.st.accum_steal = delta;
1521 }
1522
1523 static void record_steal_time(struct kvm_vcpu *vcpu)
1524 {
1525         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1526                 return;
1527
1528         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1529                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1530                 return;
1531
1532         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1533         vcpu->arch.st.steal.version += 2;
1534         vcpu->arch.st.accum_steal = 0;
1535
1536         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1537                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1538 }
1539
1540 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1541 {
1542         bool pr = false;
1543
1544         switch (msr) {
1545         case MSR_EFER:
1546                 return set_efer(vcpu, data);
1547         case MSR_K7_HWCR:
1548                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1549                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1550                 if (data != 0) {
1551                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1552                                 data);
1553                         return 1;
1554                 }
1555                 break;
1556         case MSR_FAM10H_MMIO_CONF_BASE:
1557                 if (data != 0) {
1558                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1559                                 "0x%llx\n", data);
1560                         return 1;
1561                 }
1562                 break;
1563         case MSR_AMD64_NB_CFG:
1564                 break;
1565         case MSR_IA32_DEBUGCTLMSR:
1566                 if (!data) {
1567                         /* We support the non-activated case already */
1568                         break;
1569                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1570                         /* Values other than LBR and BTF are vendor-specific,
1571                            thus reserved and should throw a #GP */
1572                         return 1;
1573                 }
1574                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1575                         __func__, data);
1576                 break;
1577         case MSR_IA32_UCODE_REV:
1578         case MSR_IA32_UCODE_WRITE:
1579         case MSR_VM_HSAVE_PA:
1580         case MSR_AMD64_PATCH_LOADER:
1581                 break;
1582         case 0x200 ... 0x2ff:
1583                 return set_msr_mtrr(vcpu, msr, data);
1584         case MSR_IA32_APICBASE:
1585                 kvm_set_apic_base(vcpu, data);
1586                 break;
1587         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1588                 return kvm_x2apic_msr_write(vcpu, msr, data);
1589         case MSR_IA32_TSCDEADLINE:
1590                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1591                 break;
1592         case MSR_IA32_MISC_ENABLE:
1593                 vcpu->arch.ia32_misc_enable_msr = data;
1594                 break;
1595         case MSR_KVM_WALL_CLOCK_NEW:
1596         case MSR_KVM_WALL_CLOCK:
1597                 vcpu->kvm->arch.wall_clock = data;
1598                 kvm_write_wall_clock(vcpu->kvm, data);
1599                 break;
1600         case MSR_KVM_SYSTEM_TIME_NEW:
1601         case MSR_KVM_SYSTEM_TIME: {
1602                 kvmclock_reset(vcpu);
1603
1604                 vcpu->arch.time = data;
1605                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1606
1607                 /* we verify if the enable bit is set... */
1608                 if (!(data & 1))
1609                         break;
1610
1611                 /* ...but clean it before doing the actual write */
1612                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1613
1614                 vcpu->arch.time_page =
1615                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1616
1617                 if (is_error_page(vcpu->arch.time_page)) {
1618                         kvm_release_page_clean(vcpu->arch.time_page);
1619                         vcpu->arch.time_page = NULL;
1620                 }
1621                 break;
1622         }
1623         case MSR_KVM_ASYNC_PF_EN:
1624                 if (kvm_pv_enable_async_pf(vcpu, data))
1625                         return 1;
1626                 break;
1627         case MSR_KVM_STEAL_TIME:
1628
1629                 if (unlikely(!sched_info_on()))
1630                         return 1;
1631
1632                 if (data & KVM_STEAL_RESERVED_MASK)
1633                         return 1;
1634
1635                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1636                                                         data & KVM_STEAL_VALID_BITS))
1637                         return 1;
1638
1639                 vcpu->arch.st.msr_val = data;
1640
1641                 if (!(data & KVM_MSR_ENABLED))
1642                         break;
1643
1644                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1645
1646                 preempt_disable();
1647                 accumulate_steal_time(vcpu);
1648                 preempt_enable();
1649
1650                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1651
1652                 break;
1653
1654         case MSR_IA32_MCG_CTL:
1655         case MSR_IA32_MCG_STATUS:
1656         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1657                 return set_msr_mce(vcpu, msr, data);
1658
1659         /* Performance counters are not protected by a CPUID bit,
1660          * so we should check all of them in the generic path for the sake of
1661          * cross vendor migration.
1662          * Writing a zero into the event select MSRs disables them,
1663          * which we perfectly emulate ;-). Any other value should be at least
1664          * reported, some guests depend on them.
1665          */
1666         case MSR_K7_EVNTSEL0:
1667         case MSR_K7_EVNTSEL1:
1668         case MSR_K7_EVNTSEL2:
1669         case MSR_K7_EVNTSEL3:
1670                 if (data != 0)
1671                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1672                                 "0x%x data 0x%llx\n", msr, data);
1673                 break;
1674         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1675          * so we ignore writes to make it happy.
1676          */
1677         case MSR_K7_PERFCTR0:
1678         case MSR_K7_PERFCTR1:
1679         case MSR_K7_PERFCTR2:
1680         case MSR_K7_PERFCTR3:
1681                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1682                         "0x%x data 0x%llx\n", msr, data);
1683                 break;
1684         case MSR_P6_PERFCTR0:
1685         case MSR_P6_PERFCTR1:
1686                 pr = true;
1687         case MSR_P6_EVNTSEL0:
1688         case MSR_P6_EVNTSEL1:
1689                 if (kvm_pmu_msr(vcpu, msr))
1690                         return kvm_pmu_set_msr(vcpu, msr, data);
1691
1692                 if (pr || data != 0)
1693                         pr_unimpl(vcpu, "disabled perfctr wrmsr: "
1694                                 "0x%x data 0x%llx\n", msr, data);
1695                 break;
1696         case MSR_K7_CLK_CTL:
1697                 /*
1698                  * Ignore all writes to this no longer documented MSR.
1699                  * Writes are only relevant for old K7 processors,
1700                  * all pre-dating SVM, but a recommended workaround from
1701                  * AMD for these chips. It is possible to speicify the
1702                  * affected processor models on the command line, hence
1703                  * the need to ignore the workaround.
1704                  */
1705                 break;
1706         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1707                 if (kvm_hv_msr_partition_wide(msr)) {
1708                         int r;
1709                         mutex_lock(&vcpu->kvm->lock);
1710                         r = set_msr_hyperv_pw(vcpu, msr, data);
1711                         mutex_unlock(&vcpu->kvm->lock);
1712                         return r;
1713                 } else
1714                         return set_msr_hyperv(vcpu, msr, data);
1715                 break;
1716         case MSR_IA32_BBL_CR_CTL3:
1717                 /* Drop writes to this legacy MSR -- see rdmsr
1718                  * counterpart for further detail.
1719                  */
1720                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1721                 break;
1722         case MSR_AMD64_OSVW_ID_LENGTH:
1723                 if (!guest_cpuid_has_osvw(vcpu))
1724                         return 1;
1725                 vcpu->arch.osvw.length = data;
1726                 break;
1727         case MSR_AMD64_OSVW_STATUS:
1728                 if (!guest_cpuid_has_osvw(vcpu))
1729                         return 1;
1730                 vcpu->arch.osvw.status = data;
1731                 break;
1732         default:
1733                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1734                         return xen_hvm_config(vcpu, data);
1735                 if (kvm_pmu_msr(vcpu, msr))
1736                         return kvm_pmu_set_msr(vcpu, msr, data);
1737                 if (!ignore_msrs) {
1738                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1739                                 msr, data);
1740                         return 1;
1741                 } else {
1742                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1743                                 msr, data);
1744                         break;
1745                 }
1746         }
1747         return 0;
1748 }
1749 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1750
1751
1752 /*
1753  * Reads an msr value (of 'msr_index') into 'pdata'.
1754  * Returns 0 on success, non-0 otherwise.
1755  * Assumes vcpu_load() was already called.
1756  */
1757 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1758 {
1759         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1760 }
1761
1762 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1763 {
1764         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1765
1766         if (!msr_mtrr_valid(msr))
1767                 return 1;
1768
1769         if (msr == MSR_MTRRdefType)
1770                 *pdata = vcpu->arch.mtrr_state.def_type +
1771                          (vcpu->arch.mtrr_state.enabled << 10);
1772         else if (msr == MSR_MTRRfix64K_00000)
1773                 *pdata = p[0];
1774         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1775                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1776         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1777                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1778         else if (msr == MSR_IA32_CR_PAT)
1779                 *pdata = vcpu->arch.pat;
1780         else {  /* Variable MTRRs */
1781                 int idx, is_mtrr_mask;
1782                 u64 *pt;
1783
1784                 idx = (msr - 0x200) / 2;
1785                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1786                 if (!is_mtrr_mask)
1787                         pt =
1788                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1789                 else
1790                         pt =
1791                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1792                 *pdata = *pt;
1793         }
1794
1795         return 0;
1796 }
1797
1798 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1799 {
1800         u64 data;
1801         u64 mcg_cap = vcpu->arch.mcg_cap;
1802         unsigned bank_num = mcg_cap & 0xff;
1803
1804         switch (msr) {
1805         case MSR_IA32_P5_MC_ADDR:
1806         case MSR_IA32_P5_MC_TYPE:
1807                 data = 0;
1808                 break;
1809         case MSR_IA32_MCG_CAP:
1810                 data = vcpu->arch.mcg_cap;
1811                 break;
1812         case MSR_IA32_MCG_CTL:
1813                 if (!(mcg_cap & MCG_CTL_P))
1814                         return 1;
1815                 data = vcpu->arch.mcg_ctl;
1816                 break;
1817         case MSR_IA32_MCG_STATUS:
1818                 data = vcpu->arch.mcg_status;
1819                 break;
1820         default:
1821                 if (msr >= MSR_IA32_MC0_CTL &&
1822                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1823                         u32 offset = msr - MSR_IA32_MC0_CTL;
1824                         data = vcpu->arch.mce_banks[offset];
1825                         break;
1826                 }
1827                 return 1;
1828         }
1829         *pdata = data;
1830         return 0;
1831 }
1832
1833 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1834 {
1835         u64 data = 0;
1836         struct kvm *kvm = vcpu->kvm;
1837
1838         switch (msr) {
1839         case HV_X64_MSR_GUEST_OS_ID:
1840                 data = kvm->arch.hv_guest_os_id;
1841                 break;
1842         case HV_X64_MSR_HYPERCALL:
1843                 data = kvm->arch.hv_hypercall;
1844                 break;
1845         default:
1846                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1847                 return 1;
1848         }
1849
1850         *pdata = data;
1851         return 0;
1852 }
1853
1854 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1855 {
1856         u64 data = 0;
1857
1858         switch (msr) {
1859         case HV_X64_MSR_VP_INDEX: {
1860                 int r;
1861                 struct kvm_vcpu *v;
1862                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1863                         if (v == vcpu)
1864                                 data = r;
1865                 break;
1866         }
1867         case HV_X64_MSR_EOI:
1868                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1869         case HV_X64_MSR_ICR:
1870                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1871         case HV_X64_MSR_TPR:
1872                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1873         case HV_X64_MSR_APIC_ASSIST_PAGE:
1874                 data = vcpu->arch.hv_vapic;
1875                 break;
1876         default:
1877                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1878                 return 1;
1879         }
1880         *pdata = data;
1881         return 0;
1882 }
1883
1884 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1885 {
1886         u64 data;
1887
1888         switch (msr) {
1889         case MSR_IA32_PLATFORM_ID:
1890         case MSR_IA32_EBL_CR_POWERON:
1891         case MSR_IA32_DEBUGCTLMSR:
1892         case MSR_IA32_LASTBRANCHFROMIP:
1893         case MSR_IA32_LASTBRANCHTOIP:
1894         case MSR_IA32_LASTINTFROMIP:
1895         case MSR_IA32_LASTINTTOIP:
1896         case MSR_K8_SYSCFG:
1897         case MSR_K7_HWCR:
1898         case MSR_VM_HSAVE_PA:
1899         case MSR_K7_EVNTSEL0:
1900         case MSR_K7_PERFCTR0:
1901         case MSR_K8_INT_PENDING_MSG:
1902         case MSR_AMD64_NB_CFG:
1903         case MSR_FAM10H_MMIO_CONF_BASE:
1904                 data = 0;
1905                 break;
1906         case MSR_P6_PERFCTR0:
1907         case MSR_P6_PERFCTR1:
1908         case MSR_P6_EVNTSEL0:
1909         case MSR_P6_EVNTSEL1:
1910                 if (kvm_pmu_msr(vcpu, msr))
1911                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1912                 data = 0;
1913                 break;
1914         case MSR_IA32_UCODE_REV:
1915                 data = 0x100000000ULL;
1916                 break;
1917         case MSR_MTRRcap:
1918                 data = 0x500 | KVM_NR_VAR_MTRR;
1919                 break;
1920         case 0x200 ... 0x2ff:
1921                 return get_msr_mtrr(vcpu, msr, pdata);
1922         case 0xcd: /* fsb frequency */
1923                 data = 3;
1924                 break;
1925                 /*
1926                  * MSR_EBC_FREQUENCY_ID
1927                  * Conservative value valid for even the basic CPU models.
1928                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1929                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1930                  * and 266MHz for model 3, or 4. Set Core Clock
1931                  * Frequency to System Bus Frequency Ratio to 1 (bits
1932                  * 31:24) even though these are only valid for CPU
1933                  * models > 2, however guests may end up dividing or
1934                  * multiplying by zero otherwise.
1935                  */
1936         case MSR_EBC_FREQUENCY_ID:
1937                 data = 1 << 24;
1938                 break;
1939         case MSR_IA32_APICBASE:
1940                 data = kvm_get_apic_base(vcpu);
1941                 break;
1942         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1943                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1944                 break;
1945         case MSR_IA32_TSCDEADLINE:
1946                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1947                 break;
1948         case MSR_IA32_MISC_ENABLE:
1949                 data = vcpu->arch.ia32_misc_enable_msr;
1950                 break;
1951         case MSR_IA32_PERF_STATUS:
1952                 /* TSC increment by tick */
1953                 data = 1000ULL;
1954                 /* CPU multiplier */
1955                 data |= (((uint64_t)4ULL) << 40);
1956                 break;
1957         case MSR_EFER:
1958                 data = vcpu->arch.efer;
1959                 break;
1960         case MSR_KVM_WALL_CLOCK:
1961         case MSR_KVM_WALL_CLOCK_NEW:
1962                 data = vcpu->kvm->arch.wall_clock;
1963                 break;
1964         case MSR_KVM_SYSTEM_TIME:
1965         case MSR_KVM_SYSTEM_TIME_NEW:
1966                 data = vcpu->arch.time;
1967                 break;
1968         case MSR_KVM_ASYNC_PF_EN:
1969                 data = vcpu->arch.apf.msr_val;
1970                 break;
1971         case MSR_KVM_STEAL_TIME:
1972                 data = vcpu->arch.st.msr_val;
1973                 break;
1974         case MSR_IA32_P5_MC_ADDR:
1975         case MSR_IA32_P5_MC_TYPE:
1976         case MSR_IA32_MCG_CAP:
1977         case MSR_IA32_MCG_CTL:
1978         case MSR_IA32_MCG_STATUS:
1979         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1980                 return get_msr_mce(vcpu, msr, pdata);
1981         case MSR_K7_CLK_CTL:
1982                 /*
1983                  * Provide expected ramp-up count for K7. All other
1984                  * are set to zero, indicating minimum divisors for
1985                  * every field.
1986                  *
1987                  * This prevents guest kernels on AMD host with CPU
1988                  * type 6, model 8 and higher from exploding due to
1989                  * the rdmsr failing.
1990                  */
1991                 data = 0x20000000;
1992                 break;
1993         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1994                 if (kvm_hv_msr_partition_wide(msr)) {
1995                         int r;
1996                         mutex_lock(&vcpu->kvm->lock);
1997                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1998                         mutex_unlock(&vcpu->kvm->lock);
1999                         return r;
2000                 } else
2001                         return get_msr_hyperv(vcpu, msr, pdata);
2002                 break;
2003         case MSR_IA32_BBL_CR_CTL3:
2004                 /* This legacy MSR exists but isn't fully documented in current
2005                  * silicon.  It is however accessed by winxp in very narrow
2006                  * scenarios where it sets bit #19, itself documented as
2007                  * a "reserved" bit.  Best effort attempt to source coherent
2008                  * read data here should the balance of the register be
2009                  * interpreted by the guest:
2010                  *
2011                  * L2 cache control register 3: 64GB range, 256KB size,
2012                  * enabled, latency 0x1, configured
2013                  */
2014                 data = 0xbe702111;
2015                 break;
2016         case MSR_AMD64_OSVW_ID_LENGTH:
2017                 if (!guest_cpuid_has_osvw(vcpu))
2018                         return 1;
2019                 data = vcpu->arch.osvw.length;
2020                 break;
2021         case MSR_AMD64_OSVW_STATUS:
2022                 if (!guest_cpuid_has_osvw(vcpu))
2023                         return 1;
2024                 data = vcpu->arch.osvw.status;
2025                 break;
2026         default:
2027                 if (kvm_pmu_msr(vcpu, msr))
2028                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2029                 if (!ignore_msrs) {
2030                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2031                         return 1;
2032                 } else {
2033                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2034                         data = 0;
2035                 }
2036                 break;
2037         }
2038         *pdata = data;
2039         return 0;
2040 }
2041 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2042
2043 /*
2044  * Read or write a bunch of msrs. All parameters are kernel addresses.
2045  *
2046  * @return number of msrs set successfully.
2047  */
2048 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2049                     struct kvm_msr_entry *entries,
2050                     int (*do_msr)(struct kvm_vcpu *vcpu,
2051                                   unsigned index, u64 *data))
2052 {
2053         int i, idx;
2054
2055         idx = srcu_read_lock(&vcpu->kvm->srcu);
2056         for (i = 0; i < msrs->nmsrs; ++i)
2057                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2058                         break;
2059         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2060
2061         return i;
2062 }
2063
2064 /*
2065  * Read or write a bunch of msrs. Parameters are user addresses.
2066  *
2067  * @return number of msrs set successfully.
2068  */
2069 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2070                   int (*do_msr)(struct kvm_vcpu *vcpu,
2071                                 unsigned index, u64 *data),
2072                   int writeback)
2073 {
2074         struct kvm_msrs msrs;
2075         struct kvm_msr_entry *entries;
2076         int r, n;
2077         unsigned size;
2078
2079         r = -EFAULT;
2080         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2081                 goto out;
2082
2083         r = -E2BIG;
2084         if (msrs.nmsrs >= MAX_IO_MSRS)
2085                 goto out;
2086
2087         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2088         entries = memdup_user(user_msrs->entries, size);
2089         if (IS_ERR(entries)) {
2090                 r = PTR_ERR(entries);
2091                 goto out;
2092         }
2093
2094         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2095         if (r < 0)
2096                 goto out_free;
2097
2098         r = -EFAULT;
2099         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2100                 goto out_free;
2101
2102         r = n;
2103
2104 out_free:
2105         kfree(entries);
2106 out:
2107         return r;
2108 }
2109
2110 int kvm_dev_ioctl_check_extension(long ext)
2111 {
2112         int r;
2113
2114         switch (ext) {
2115         case KVM_CAP_IRQCHIP:
2116         case KVM_CAP_HLT:
2117         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2118         case KVM_CAP_SET_TSS_ADDR:
2119         case KVM_CAP_EXT_CPUID:
2120         case KVM_CAP_CLOCKSOURCE:
2121         case KVM_CAP_PIT:
2122         case KVM_CAP_NOP_IO_DELAY:
2123         case KVM_CAP_MP_STATE:
2124         case KVM_CAP_SYNC_MMU:
2125         case KVM_CAP_USER_NMI:
2126         case KVM_CAP_REINJECT_CONTROL:
2127         case KVM_CAP_IRQ_INJECT_STATUS:
2128         case KVM_CAP_ASSIGN_DEV_IRQ:
2129         case KVM_CAP_IRQFD:
2130         case KVM_CAP_IOEVENTFD:
2131         case KVM_CAP_PIT2:
2132         case KVM_CAP_PIT_STATE2:
2133         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2134         case KVM_CAP_XEN_HVM:
2135         case KVM_CAP_ADJUST_CLOCK:
2136         case KVM_CAP_VCPU_EVENTS:
2137         case KVM_CAP_HYPERV:
2138         case KVM_CAP_HYPERV_VAPIC:
2139         case KVM_CAP_HYPERV_SPIN:
2140         case KVM_CAP_PCI_SEGMENT:
2141         case KVM_CAP_DEBUGREGS:
2142         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2143         case KVM_CAP_XSAVE:
2144         case KVM_CAP_ASYNC_PF:
2145         case KVM_CAP_GET_TSC_KHZ:
2146                 r = 1;
2147                 break;
2148         case KVM_CAP_COALESCED_MMIO:
2149                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2150                 break;
2151         case KVM_CAP_VAPIC:
2152                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2153                 break;
2154         case KVM_CAP_NR_VCPUS:
2155                 r = KVM_SOFT_MAX_VCPUS;
2156                 break;
2157         case KVM_CAP_MAX_VCPUS:
2158                 r = KVM_MAX_VCPUS;
2159                 break;
2160         case KVM_CAP_NR_MEMSLOTS:
2161                 r = KVM_MEMORY_SLOTS;
2162                 break;
2163         case KVM_CAP_PV_MMU:    /* obsolete */
2164                 r = 0;
2165                 break;
2166         case KVM_CAP_IOMMU:
2167                 r = iommu_present(&pci_bus_type);
2168                 break;
2169         case KVM_CAP_MCE:
2170                 r = KVM_MAX_MCE_BANKS;
2171                 break;
2172         case KVM_CAP_XCRS:
2173                 r = cpu_has_xsave;
2174                 break;
2175         case KVM_CAP_TSC_CONTROL:
2176                 r = kvm_has_tsc_control;
2177                 break;
2178         case KVM_CAP_TSC_DEADLINE_TIMER:
2179                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2180                 break;
2181         default:
2182                 r = 0;
2183                 break;
2184         }
2185         return r;
2186
2187 }
2188
2189 long kvm_arch_dev_ioctl(struct file *filp,
2190                         unsigned int ioctl, unsigned long arg)
2191 {
2192         void __user *argp = (void __user *)arg;
2193         long r;
2194
2195         switch (ioctl) {
2196         case KVM_GET_MSR_INDEX_LIST: {
2197                 struct kvm_msr_list __user *user_msr_list = argp;
2198                 struct kvm_msr_list msr_list;
2199                 unsigned n;
2200
2201                 r = -EFAULT;
2202                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2203                         goto out;
2204                 n = msr_list.nmsrs;
2205                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2206                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2207                         goto out;
2208                 r = -E2BIG;
2209                 if (n < msr_list.nmsrs)
2210                         goto out;
2211                 r = -EFAULT;
2212                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2213                                  num_msrs_to_save * sizeof(u32)))
2214                         goto out;
2215                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2216                                  &emulated_msrs,
2217                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2218                         goto out;
2219                 r = 0;
2220                 break;
2221         }
2222         case KVM_GET_SUPPORTED_CPUID: {
2223                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2224                 struct kvm_cpuid2 cpuid;
2225
2226                 r = -EFAULT;
2227                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2228                         goto out;
2229                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2230                                                       cpuid_arg->entries);
2231                 if (r)
2232                         goto out;
2233
2234                 r = -EFAULT;
2235                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2236                         goto out;
2237                 r = 0;
2238                 break;
2239         }
2240         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2241                 u64 mce_cap;
2242
2243                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2244                 r = -EFAULT;
2245                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2246                         goto out;
2247                 r = 0;
2248                 break;
2249         }
2250         default:
2251                 r = -EINVAL;
2252         }
2253 out:
2254         return r;
2255 }
2256
2257 static void wbinvd_ipi(void *garbage)
2258 {
2259         wbinvd();
2260 }
2261
2262 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2263 {
2264         return vcpu->kvm->arch.iommu_domain &&
2265                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2266 }
2267
2268 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2269 {
2270         /* Address WBINVD may be executed by guest */
2271         if (need_emulate_wbinvd(vcpu)) {
2272                 if (kvm_x86_ops->has_wbinvd_exit())
2273                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2274                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2275                         smp_call_function_single(vcpu->cpu,
2276                                         wbinvd_ipi, NULL, 1);
2277         }
2278
2279         kvm_x86_ops->vcpu_load(vcpu, cpu);
2280
2281         /* Apply any externally detected TSC adjustments (due to suspend) */
2282         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2283                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2284                 vcpu->arch.tsc_offset_adjustment = 0;
2285                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2286         }
2287
2288         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2289                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2290                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2291                 if (tsc_delta < 0)
2292                         mark_tsc_unstable("KVM discovered backwards TSC");
2293                 if (check_tsc_unstable()) {
2294                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2295                                                 vcpu->arch.last_guest_tsc);
2296                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2297                         vcpu->arch.tsc_catchup = 1;
2298                 }
2299                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2300                 if (vcpu->cpu != cpu)
2301                         kvm_migrate_timers(vcpu);
2302                 vcpu->cpu = cpu;
2303         }
2304
2305         accumulate_steal_time(vcpu);
2306         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2307 }
2308
2309 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2310 {
2311         kvm_x86_ops->vcpu_put(vcpu);
2312         kvm_put_guest_fpu(vcpu);
2313         vcpu->arch.last_host_tsc = native_read_tsc();
2314 }
2315
2316 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2317                                     struct kvm_lapic_state *s)
2318 {
2319         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2320
2321         return 0;
2322 }
2323
2324 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2325                                     struct kvm_lapic_state *s)
2326 {
2327         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2328         kvm_apic_post_state_restore(vcpu);
2329         update_cr8_intercept(vcpu);
2330
2331         return 0;
2332 }
2333
2334 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2335                                     struct kvm_interrupt *irq)
2336 {
2337         if (irq->irq < 0 || irq->irq >= 256)
2338                 return -EINVAL;
2339         if (irqchip_in_kernel(vcpu->kvm))
2340                 return -ENXIO;
2341
2342         kvm_queue_interrupt(vcpu, irq->irq, false);
2343         kvm_make_request(KVM_REQ_EVENT, vcpu);
2344
2345         return 0;
2346 }
2347
2348 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2349 {
2350         kvm_inject_nmi(vcpu);
2351
2352         return 0;
2353 }
2354
2355 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2356                                            struct kvm_tpr_access_ctl *tac)
2357 {
2358         if (tac->flags)
2359                 return -EINVAL;
2360         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2361         return 0;
2362 }
2363
2364 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2365                                         u64 mcg_cap)
2366 {
2367         int r;
2368         unsigned bank_num = mcg_cap & 0xff, bank;
2369
2370         r = -EINVAL;
2371         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2372                 goto out;
2373         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2374                 goto out;
2375         r = 0;
2376         vcpu->arch.mcg_cap = mcg_cap;
2377         /* Init IA32_MCG_CTL to all 1s */
2378         if (mcg_cap & MCG_CTL_P)
2379                 vcpu->arch.mcg_ctl = ~(u64)0;
2380         /* Init IA32_MCi_CTL to all 1s */
2381         for (bank = 0; bank < bank_num; bank++)
2382                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2383 out:
2384         return r;
2385 }
2386
2387 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2388                                       struct kvm_x86_mce *mce)
2389 {
2390         u64 mcg_cap = vcpu->arch.mcg_cap;
2391         unsigned bank_num = mcg_cap & 0xff;
2392         u64 *banks = vcpu->arch.mce_banks;
2393
2394         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2395                 return -EINVAL;
2396         /*
2397          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2398          * reporting is disabled
2399          */
2400         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2401             vcpu->arch.mcg_ctl != ~(u64)0)
2402                 return 0;
2403         banks += 4 * mce->bank;
2404         /*
2405          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2406          * reporting is disabled for the bank
2407          */
2408         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2409                 return 0;
2410         if (mce->status & MCI_STATUS_UC) {
2411                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2412                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2413                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2414                         return 0;
2415                 }
2416                 if (banks[1] & MCI_STATUS_VAL)
2417                         mce->status |= MCI_STATUS_OVER;
2418                 banks[2] = mce->addr;
2419                 banks[3] = mce->misc;
2420                 vcpu->arch.mcg_status = mce->mcg_status;
2421                 banks[1] = mce->status;
2422                 kvm_queue_exception(vcpu, MC_VECTOR);
2423         } else if (!(banks[1] & MCI_STATUS_VAL)
2424                    || !(banks[1] & MCI_STATUS_UC)) {
2425                 if (banks[1] & MCI_STATUS_VAL)
2426                         mce->status |= MCI_STATUS_OVER;
2427                 banks[2] = mce->addr;
2428                 banks[3] = mce->misc;
2429                 banks[1] = mce->status;
2430         } else
2431                 banks[1] |= MCI_STATUS_OVER;
2432         return 0;
2433 }
2434
2435 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2436                                                struct kvm_vcpu_events *events)
2437 {
2438         process_nmi(vcpu);
2439         events->exception.injected =
2440                 vcpu->arch.exception.pending &&
2441                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2442         events->exception.nr = vcpu->arch.exception.nr;
2443         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2444         events->exception.pad = 0;
2445         events->exception.error_code = vcpu->arch.exception.error_code;
2446
2447         events->interrupt.injected =
2448                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2449         events->interrupt.nr = vcpu->arch.interrupt.nr;
2450         events->interrupt.soft = 0;
2451         events->interrupt.shadow =
2452                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2453                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2454
2455         events->nmi.injected = vcpu->arch.nmi_injected;
2456         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2457         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2458         events->nmi.pad = 0;
2459
2460         events->sipi_vector = vcpu->arch.sipi_vector;
2461
2462         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2463                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2464                          | KVM_VCPUEVENT_VALID_SHADOW);
2465         memset(&events->reserved, 0, sizeof(events->reserved));
2466 }
2467
2468 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2469                                               struct kvm_vcpu_events *events)
2470 {
2471         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2472                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2473                               | KVM_VCPUEVENT_VALID_SHADOW))
2474                 return -EINVAL;
2475
2476         process_nmi(vcpu);
2477         vcpu->arch.exception.pending = events->exception.injected;
2478         vcpu->arch.exception.nr = events->exception.nr;
2479         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2480         vcpu->arch.exception.error_code = events->exception.error_code;
2481
2482         vcpu->arch.interrupt.pending = events->interrupt.injected;
2483         vcpu->arch.interrupt.nr = events->interrupt.nr;
2484         vcpu->arch.interrupt.soft = events->interrupt.soft;
2485         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2486                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2487                                                   events->interrupt.shadow);
2488
2489         vcpu->arch.nmi_injected = events->nmi.injected;
2490         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2491                 vcpu->arch.nmi_pending = events->nmi.pending;
2492         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2493
2494         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2495                 vcpu->arch.sipi_vector = events->sipi_vector;
2496
2497         kvm_make_request(KVM_REQ_EVENT, vcpu);
2498
2499         return 0;
2500 }
2501
2502 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2503                                              struct kvm_debugregs *dbgregs)
2504 {
2505         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2506         dbgregs->dr6 = vcpu->arch.dr6;
2507         dbgregs->dr7 = vcpu->arch.dr7;
2508         dbgregs->flags = 0;
2509         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2510 }
2511
2512 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2513                                             struct kvm_debugregs *dbgregs)
2514 {
2515         if (dbgregs->flags)
2516                 return -EINVAL;
2517
2518         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2519         vcpu->arch.dr6 = dbgregs->dr6;
2520         vcpu->arch.dr7 = dbgregs->dr7;
2521
2522         return 0;
2523 }
2524
2525 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2526                                          struct kvm_xsave *guest_xsave)
2527 {
2528         if (cpu_has_xsave)
2529                 memcpy(guest_xsave->region,
2530                         &vcpu->arch.guest_fpu.state->xsave,
2531                         xstate_size);
2532         else {
2533                 memcpy(guest_xsave->region,
2534                         &vcpu->arch.guest_fpu.state->fxsave,
2535                         sizeof(struct i387_fxsave_struct));
2536                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2537                         XSTATE_FPSSE;
2538         }
2539 }
2540
2541 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2542                                         struct kvm_xsave *guest_xsave)
2543 {
2544         u64 xstate_bv =
2545                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2546
2547         if (cpu_has_xsave)
2548                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2549                         guest_xsave->region, xstate_size);
2550         else {
2551                 if (xstate_bv & ~XSTATE_FPSSE)
2552                         return -EINVAL;
2553                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2554                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2555         }
2556         return 0;
2557 }
2558
2559 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2560                                         struct kvm_xcrs *guest_xcrs)
2561 {
2562         if (!cpu_has_xsave) {
2563                 guest_xcrs->nr_xcrs = 0;
2564                 return;
2565         }
2566
2567         guest_xcrs->nr_xcrs = 1;
2568         guest_xcrs->flags = 0;
2569         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2570         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2571 }
2572
2573 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2574                                        struct kvm_xcrs *guest_xcrs)
2575 {
2576         int i, r = 0;
2577
2578         if (!cpu_has_xsave)
2579                 return -EINVAL;
2580
2581         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2582                 return -EINVAL;
2583
2584         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2585                 /* Only support XCR0 currently */
2586                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2587                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2588                                 guest_xcrs->xcrs[0].value);
2589                         break;
2590                 }
2591         if (r)
2592                 r = -EINVAL;
2593         return r;
2594 }
2595
2596 long kvm_arch_vcpu_ioctl(struct file *filp,
2597                          unsigned int ioctl, unsigned long arg)
2598 {
2599         struct kvm_vcpu *vcpu = filp->private_data;
2600         void __user *argp = (void __user *)arg;
2601         int r;
2602         union {
2603                 struct kvm_lapic_state *lapic;
2604                 struct kvm_xsave *xsave;
2605                 struct kvm_xcrs *xcrs;
2606                 void *buffer;
2607         } u;
2608
2609         u.buffer = NULL;
2610         switch (ioctl) {
2611         case KVM_GET_LAPIC: {
2612                 r = -EINVAL;
2613                 if (!vcpu->arch.apic)
2614                         goto out;
2615                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2616
2617                 r = -ENOMEM;
2618                 if (!u.lapic)
2619                         goto out;
2620                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2621                 if (r)
2622                         goto out;
2623                 r = -EFAULT;
2624                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2625                         goto out;
2626                 r = 0;
2627                 break;
2628         }
2629         case KVM_SET_LAPIC: {
2630                 r = -EINVAL;
2631                 if (!vcpu->arch.apic)
2632                         goto out;
2633                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2634                 if (IS_ERR(u.lapic)) {
2635                         r = PTR_ERR(u.lapic);
2636                         goto out;
2637                 }
2638
2639                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2640                 if (r)
2641                         goto out;
2642                 r = 0;
2643                 break;
2644         }
2645         case KVM_INTERRUPT: {
2646                 struct kvm_interrupt irq;
2647
2648                 r = -EFAULT;
2649                 if (copy_from_user(&irq, argp, sizeof irq))
2650                         goto out;
2651                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2652                 if (r)
2653                         goto out;
2654                 r = 0;
2655                 break;
2656         }
2657         case KVM_NMI: {
2658                 r = kvm_vcpu_ioctl_nmi(vcpu);
2659                 if (r)
2660                         goto out;
2661                 r = 0;
2662                 break;
2663         }
2664         case KVM_SET_CPUID: {
2665                 struct kvm_cpuid __user *cpuid_arg = argp;
2666                 struct kvm_cpuid cpuid;
2667
2668                 r = -EFAULT;
2669                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2670                         goto out;
2671                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2672                 if (r)
2673                         goto out;
2674                 break;
2675         }
2676         case KVM_SET_CPUID2: {
2677                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2678                 struct kvm_cpuid2 cpuid;
2679
2680                 r = -EFAULT;
2681                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2682                         goto out;
2683                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2684                                               cpuid_arg->entries);
2685                 if (r)
2686                         goto out;
2687                 break;
2688         }
2689         case KVM_GET_CPUID2: {
2690                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2691                 struct kvm_cpuid2 cpuid;
2692
2693                 r = -EFAULT;
2694                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2695                         goto out;
2696                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2697                                               cpuid_arg->entries);
2698                 if (r)
2699                         goto out;
2700                 r = -EFAULT;
2701                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2702                         goto out;
2703                 r = 0;
2704                 break;
2705         }
2706         case KVM_GET_MSRS:
2707                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2708                 break;
2709         case KVM_SET_MSRS:
2710                 r = msr_io(vcpu, argp, do_set_msr, 0);
2711                 break;
2712         case KVM_TPR_ACCESS_REPORTING: {
2713                 struct kvm_tpr_access_ctl tac;
2714
2715                 r = -EFAULT;
2716                 if (copy_from_user(&tac, argp, sizeof tac))
2717                         goto out;
2718                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2719                 if (r)
2720                         goto out;
2721                 r = -EFAULT;
2722                 if (copy_to_user(argp, &tac, sizeof tac))
2723                         goto out;
2724                 r = 0;
2725                 break;
2726         };
2727         case KVM_SET_VAPIC_ADDR: {
2728                 struct kvm_vapic_addr va;
2729
2730                 r = -EINVAL;
2731                 if (!irqchip_in_kernel(vcpu->kvm))
2732                         goto out;
2733                 r = -EFAULT;
2734                 if (copy_from_user(&va, argp, sizeof va))
2735                         goto out;
2736                 r = 0;
2737                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2738                 break;
2739         }
2740         case KVM_X86_SETUP_MCE: {
2741                 u64 mcg_cap;
2742
2743                 r = -EFAULT;
2744                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2745                         goto out;
2746                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2747                 break;
2748         }
2749         case KVM_X86_SET_MCE: {
2750                 struct kvm_x86_mce mce;
2751
2752                 r = -EFAULT;
2753                 if (copy_from_user(&mce, argp, sizeof mce))
2754                         goto out;
2755                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2756                 break;
2757         }
2758         case KVM_GET_VCPU_EVENTS: {
2759                 struct kvm_vcpu_events events;
2760
2761                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2762
2763                 r = -EFAULT;
2764                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2765                         break;
2766                 r = 0;
2767                 break;
2768         }
2769         case KVM_SET_VCPU_EVENTS: {
2770                 struct kvm_vcpu_events events;
2771
2772                 r = -EFAULT;
2773                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2774                         break;
2775
2776                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2777                 break;
2778         }
2779         case KVM_GET_DEBUGREGS: {
2780                 struct kvm_debugregs dbgregs;
2781
2782                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2783
2784                 r = -EFAULT;
2785                 if (copy_to_user(argp, &dbgregs,
2786                                  sizeof(struct kvm_debugregs)))
2787                         break;
2788                 r = 0;
2789                 break;
2790         }
2791         case KVM_SET_DEBUGREGS: {
2792                 struct kvm_debugregs dbgregs;
2793
2794                 r = -EFAULT;
2795                 if (copy_from_user(&dbgregs, argp,
2796                                    sizeof(struct kvm_debugregs)))
2797                         break;
2798
2799                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2800                 break;
2801         }
2802         case KVM_GET_XSAVE: {
2803                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2804                 r = -ENOMEM;
2805                 if (!u.xsave)
2806                         break;
2807
2808                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2809
2810                 r = -EFAULT;
2811                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2812                         break;
2813                 r = 0;
2814                 break;
2815         }
2816         case KVM_SET_XSAVE: {
2817                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2818                 if (IS_ERR(u.xsave)) {
2819                         r = PTR_ERR(u.xsave);
2820                         goto out;
2821                 }
2822
2823                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2824                 break;
2825         }
2826         case KVM_GET_XCRS: {
2827                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2828                 r = -ENOMEM;
2829                 if (!u.xcrs)
2830                         break;
2831
2832                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2833
2834                 r = -EFAULT;
2835                 if (copy_to_user(argp, u.xcrs,
2836                                  sizeof(struct kvm_xcrs)))
2837                         break;
2838                 r = 0;
2839                 break;
2840         }
2841         case KVM_SET_XCRS: {
2842                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2843                 if (IS_ERR(u.xcrs)) {
2844                         r = PTR_ERR(u.xcrs);
2845                         goto out;
2846                 }
2847
2848                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2849                 break;
2850         }
2851         case KVM_SET_TSC_KHZ: {
2852                 u32 user_tsc_khz;
2853
2854                 r = -EINVAL;
2855                 user_tsc_khz = (u32)arg;
2856
2857                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2858                         goto out;
2859
2860                 if (user_tsc_khz == 0)
2861                         user_tsc_khz = tsc_khz;
2862
2863                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
2864
2865                 r = 0;
2866                 goto out;
2867         }
2868         case KVM_GET_TSC_KHZ: {
2869                 r = vcpu->arch.virtual_tsc_khz;
2870                 goto out;
2871         }
2872         default:
2873                 r = -EINVAL;
2874         }
2875 out:
2876         kfree(u.buffer);
2877         return r;
2878 }
2879
2880 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
2881 {
2882         return VM_FAULT_SIGBUS;
2883 }
2884
2885 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2886 {
2887         int ret;
2888
2889         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2890                 return -1;
2891         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2892         return ret;
2893 }
2894
2895 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2896                                               u64 ident_addr)
2897 {
2898         kvm->arch.ept_identity_map_addr = ident_addr;
2899         return 0;
2900 }
2901
2902 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2903                                           u32 kvm_nr_mmu_pages)
2904 {
2905         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2906                 return -EINVAL;
2907
2908         mutex_lock(&kvm->slots_lock);
2909         spin_lock(&kvm->mmu_lock);
2910
2911         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2912         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2913
2914         spin_unlock(&kvm->mmu_lock);
2915         mutex_unlock(&kvm->slots_lock);
2916         return 0;
2917 }
2918
2919 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2920 {
2921         return kvm->arch.n_max_mmu_pages;
2922 }
2923
2924 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2925 {
2926         int r;
2927
2928         r = 0;
2929         switch (chip->chip_id) {
2930         case KVM_IRQCHIP_PIC_MASTER:
2931                 memcpy(&chip->chip.pic,
2932                         &pic_irqchip(kvm)->pics[0],
2933                         sizeof(struct kvm_pic_state));
2934                 break;
2935         case KVM_IRQCHIP_PIC_SLAVE:
2936                 memcpy(&chip->chip.pic,
2937                         &pic_irqchip(kvm)->pics[1],
2938                         sizeof(struct kvm_pic_state));
2939                 break;
2940         case KVM_IRQCHIP_IOAPIC:
2941                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2942                 break;
2943         default:
2944                 r = -EINVAL;
2945                 break;
2946         }
2947         return r;
2948 }
2949
2950 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2951 {
2952         int r;
2953
2954         r = 0;
2955         switch (chip->chip_id) {
2956         case KVM_IRQCHIP_PIC_MASTER:
2957                 spin_lock(&pic_irqchip(kvm)->lock);
2958                 memcpy(&pic_irqchip(kvm)->pics[0],
2959                         &chip->chip.pic,
2960                         sizeof(struct kvm_pic_state));
2961                 spin_unlock(&pic_irqchip(kvm)->lock);
2962                 break;
2963         case KVM_IRQCHIP_PIC_SLAVE:
2964                 spin_lock(&pic_irqchip(kvm)->lock);
2965                 memcpy(&pic_irqchip(kvm)->pics[1],
2966                         &chip->chip.pic,
2967                         sizeof(struct kvm_pic_state));
2968                 spin_unlock(&pic_irqchip(kvm)->lock);
2969                 break;
2970         case KVM_IRQCHIP_IOAPIC:
2971                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2972                 break;
2973         default:
2974                 r = -EINVAL;
2975                 break;
2976         }
2977         kvm_pic_update_irq(pic_irqchip(kvm));
2978         return r;
2979 }
2980
2981 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2982 {
2983         int r = 0;
2984
2985         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2986         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2987         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2988         return r;
2989 }
2990
2991 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2992 {
2993         int r = 0;
2994
2995         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2996         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2997         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2998         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2999         return r;
3000 }
3001
3002 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3003 {
3004         int r = 0;
3005
3006         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3007         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3008                 sizeof(ps->channels));
3009         ps->flags = kvm->arch.vpit->pit_state.flags;
3010         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3011         memset(&ps->reserved, 0, sizeof(ps->reserved));
3012         return r;
3013 }
3014
3015 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3016 {
3017         int r = 0, start = 0;
3018         u32 prev_legacy, cur_legacy;
3019         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3020         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3021         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3022         if (!prev_legacy && cur_legacy)
3023                 start = 1;
3024         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3025                sizeof(kvm->arch.vpit->pit_state.channels));
3026         kvm->arch.vpit->pit_state.flags = ps->flags;
3027         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3028         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3029         return r;
3030 }
3031
3032 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3033                                  struct kvm_reinject_control *control)
3034 {
3035         if (!kvm->arch.vpit)
3036                 return -ENXIO;
3037         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3038         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3039         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3040         return 0;
3041 }
3042
3043 /**
3044  * write_protect_slot - write protect a slot for dirty logging
3045  * @kvm: the kvm instance
3046  * @memslot: the slot we protect
3047  * @dirty_bitmap: the bitmap indicating which pages are dirty
3048  * @nr_dirty_pages: the number of dirty pages
3049  *
3050  * We have two ways to find all sptes to protect:
3051  * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
3052  *    checks ones that have a spte mapping a page in the slot.
3053  * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
3054  *
3055  * Generally speaking, if there are not so many dirty pages compared to the
3056  * number of shadow pages, we should use the latter.
3057  *
3058  * Note that letting others write into a page marked dirty in the old bitmap
3059  * by using the remaining tlb entry is not a problem.  That page will become
3060  * write protected again when we flush the tlb and then be reported dirty to
3061  * the user space by copying the old bitmap.
3062  */
3063 static void write_protect_slot(struct kvm *kvm,
3064                                struct kvm_memory_slot *memslot,
3065                                unsigned long *dirty_bitmap,
3066                                unsigned long nr_dirty_pages)
3067 {
3068         /* Not many dirty pages compared to # of shadow pages. */
3069         if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
3070                 unsigned long gfn_offset;
3071
3072                 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
3073                         unsigned long gfn = memslot->base_gfn + gfn_offset;
3074
3075                         spin_lock(&kvm->mmu_lock);
3076                         kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
3077                         spin_unlock(&kvm->mmu_lock);
3078                 }
3079                 kvm_flush_remote_tlbs(kvm);
3080         } else {
3081                 spin_lock(&kvm->mmu_lock);
3082                 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
3083                 spin_unlock(&kvm->mmu_lock);
3084         }
3085 }
3086
3087 /*
3088  * Get (and clear) the dirty memory log for a memory slot.
3089  */
3090 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3091                                       struct kvm_dirty_log *log)
3092 {
3093         int r;
3094         struct kvm_memory_slot *memslot;
3095         unsigned long n, nr_dirty_pages;
3096
3097         mutex_lock(&kvm->slots_lock);
3098
3099         r = -EINVAL;
3100         if (log->slot >= KVM_MEMORY_SLOTS)
3101                 goto out;
3102
3103         memslot = id_to_memslot(kvm->memslots, log->slot);
3104         r = -ENOENT;
3105         if (!memslot->dirty_bitmap)
3106                 goto out;
3107
3108         n = kvm_dirty_bitmap_bytes(memslot);
3109         nr_dirty_pages = memslot->nr_dirty_pages;
3110
3111         /* If nothing is dirty, don't bother messing with page tables. */
3112         if (nr_dirty_pages) {
3113                 struct kvm_memslots *slots, *old_slots;
3114                 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3115
3116                 dirty_bitmap = memslot->dirty_bitmap;
3117                 dirty_bitmap_head = memslot->dirty_bitmap_head;
3118                 if (dirty_bitmap == dirty_bitmap_head)
3119                         dirty_bitmap_head += n / sizeof(long);
3120                 memset(dirty_bitmap_head, 0, n);
3121
3122                 r = -ENOMEM;
3123                 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3124                 if (!slots)
3125                         goto out;
3126
3127                 memslot = id_to_memslot(slots, log->slot);
3128                 memslot->nr_dirty_pages = 0;
3129                 memslot->dirty_bitmap = dirty_bitmap_head;
3130                 update_memslots(slots, NULL);
3131
3132                 old_slots = kvm->memslots;
3133                 rcu_assign_pointer(kvm->memslots, slots);
3134                 synchronize_srcu_expedited(&kvm->srcu);
3135                 kfree(old_slots);
3136
3137                 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3138
3139                 r = -EFAULT;
3140                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3141                         goto out;
3142         } else {
3143                 r = -EFAULT;
3144                 if (clear_user(log->dirty_bitmap, n))
3145                         goto out;
3146         }
3147
3148         r = 0;
3149 out:
3150         mutex_unlock(&kvm->slots_lock);
3151         return r;
3152 }
3153
3154 long kvm_arch_vm_ioctl(struct file *filp,
3155                        unsigned int ioctl, unsigned long arg)
3156 {
3157         struct kvm *kvm = filp->private_data;
3158         void __user *argp = (void __user *)arg;
3159         int r = -ENOTTY;
3160         /*
3161          * This union makes it completely explicit to gcc-3.x
3162          * that these two variables' stack usage should be
3163          * combined, not added together.
3164          */
3165         union {
3166                 struct kvm_pit_state ps;
3167                 struct kvm_pit_state2 ps2;
3168                 struct kvm_pit_config pit_config;
3169         } u;
3170
3171         switch (ioctl) {
3172         case KVM_SET_TSS_ADDR:
3173                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3174                 if (r < 0)
3175                         goto out;
3176                 break;
3177         case KVM_SET_IDENTITY_MAP_ADDR: {
3178                 u64 ident_addr;
3179
3180                 r = -EFAULT;
3181                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3182                         goto out;
3183                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3184                 if (r < 0)
3185                         goto out;
3186                 break;
3187         }
3188         case KVM_SET_NR_MMU_PAGES:
3189                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3190                 if (r)
3191                         goto out;
3192                 break;
3193         case KVM_GET_NR_MMU_PAGES:
3194                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3195                 break;
3196         case KVM_CREATE_IRQCHIP: {
3197                 struct kvm_pic *vpic;
3198
3199                 mutex_lock(&kvm->lock);
3200                 r = -EEXIST;
3201                 if (kvm->arch.vpic)
3202                         goto create_irqchip_unlock;
3203                 r = -ENOMEM;
3204                 vpic = kvm_create_pic(kvm);
3205                 if (vpic) {
3206                         r = kvm_ioapic_init(kvm);
3207                         if (r) {
3208                                 mutex_lock(&kvm->slots_lock);
3209                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3210                                                           &vpic->dev_master);
3211                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3212                                                           &vpic->dev_slave);
3213                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3214                                                           &vpic->dev_eclr);
3215                                 mutex_unlock(&kvm->slots_lock);
3216                                 kfree(vpic);
3217                                 goto create_irqchip_unlock;
3218                         }
3219                 } else
3220                         goto create_irqchip_unlock;
3221                 smp_wmb();
3222                 kvm->arch.vpic = vpic;
3223                 smp_wmb();
3224                 r = kvm_setup_default_irq_routing(kvm);
3225                 if (r) {
3226                         mutex_lock(&kvm->slots_lock);
3227                         mutex_lock(&kvm->irq_lock);
3228                         kvm_ioapic_destroy(kvm);
3229                         kvm_destroy_pic(kvm);
3230                         mutex_unlock(&kvm->irq_lock);
3231                         mutex_unlock(&kvm->slots_lock);
3232                 }
3233         create_irqchip_unlock:
3234                 mutex_unlock(&kvm->lock);
3235                 break;
3236         }
3237         case KVM_CREATE_PIT:
3238                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3239                 goto create_pit;
3240         case KVM_CREATE_PIT2:
3241                 r = -EFAULT;
3242                 if (copy_from_user(&u.pit_config, argp,
3243                                    sizeof(struct kvm_pit_config)))
3244                         goto out;
3245         create_pit:
3246                 mutex_lock(&kvm->slots_lock);
3247                 r = -EEXIST;
3248                 if (kvm->arch.vpit)
3249                         goto create_pit_unlock;
3250                 r = -ENOMEM;
3251                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3252                 if (kvm->arch.vpit)
3253                         r = 0;
3254         create_pit_unlock:
3255                 mutex_unlock(&kvm->slots_lock);
3256                 break;
3257         case KVM_IRQ_LINE_STATUS:
3258         case KVM_IRQ_LINE: {
3259                 struct kvm_irq_level irq_event;
3260
3261                 r = -EFAULT;
3262                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3263                         goto out;
3264                 r = -ENXIO;
3265                 if (irqchip_in_kernel(kvm)) {
3266                         __s32 status;
3267                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3268                                         irq_event.irq, irq_event.level);
3269                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3270                                 r = -EFAULT;
3271                                 irq_event.status = status;
3272                                 if (copy_to_user(argp, &irq_event,
3273                                                         sizeof irq_event))
3274                                         goto out;
3275                         }
3276                         r = 0;
3277                 }
3278                 break;
3279         }
3280         case KVM_GET_IRQCHIP: {
3281                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3282                 struct kvm_irqchip *chip;
3283
3284                 chip = memdup_user(argp, sizeof(*chip));
3285                 if (IS_ERR(chip)) {
3286                         r = PTR_ERR(chip);
3287                         goto out;
3288                 }
3289
3290                 r = -ENXIO;
3291                 if (!irqchip_in_kernel(kvm))
3292                         goto get_irqchip_out;
3293                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3294                 if (r)
3295                         goto get_irqchip_out;
3296                 r = -EFAULT;
3297                 if (copy_to_user(argp, chip, sizeof *chip))
3298                         goto get_irqchip_out;
3299                 r = 0;
3300         get_irqchip_out:
3301                 kfree(chip);
3302                 if (r)
3303                         goto out;
3304                 break;
3305         }
3306         case KVM_SET_IRQCHIP: {
3307                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3308                 struct kvm_irqchip *chip;
3309
3310                 chip = memdup_user(argp, sizeof(*chip));
3311                 if (IS_ERR(chip)) {
3312                         r = PTR_ERR(chip);
3313                         goto out;
3314                 }
3315
3316                 r = -ENXIO;
3317                 if (!irqchip_in_kernel(kvm))
3318                         goto set_irqchip_out;
3319                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3320                 if (r)
3321                         goto set_irqchip_out;
3322                 r = 0;
3323         set_irqchip_out:
3324                 kfree(chip);
3325                 if (r)
3326                         goto out;
3327                 break;
3328         }
3329         case KVM_GET_PIT: {
3330                 r = -EFAULT;
3331                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3332                         goto out;
3333                 r = -ENXIO;
3334                 if (!kvm->arch.vpit)
3335                         goto out;
3336                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3337                 if (r)
3338                         goto out;
3339                 r = -EFAULT;
3340                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3341                         goto out;
3342                 r = 0;
3343                 break;
3344         }
3345         case KVM_SET_PIT: {
3346                 r = -EFAULT;
3347                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3348                         goto out;
3349                 r = -ENXIO;
3350                 if (!kvm->arch.vpit)
3351                         goto out;
3352                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3353                 if (r)
3354                         goto out;
3355                 r = 0;
3356                 break;
3357         }
3358         case KVM_GET_PIT2: {
3359                 r = -ENXIO;
3360                 if (!kvm->arch.vpit)
3361                         goto out;
3362                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3363                 if (r)
3364                         goto out;
3365                 r = -EFAULT;
3366                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3367                         goto out;
3368                 r = 0;
3369                 break;
3370         }
3371         case KVM_SET_PIT2: {
3372                 r = -EFAULT;
3373                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3374                         goto out;
3375                 r = -ENXIO;
3376                 if (!kvm->arch.vpit)
3377                         goto out;
3378                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3379                 if (r)
3380                         goto out;
3381                 r = 0;
3382                 break;
3383         }
3384         case KVM_REINJECT_CONTROL: {
3385                 struct kvm_reinject_control control;
3386                 r =  -EFAULT;
3387                 if (copy_from_user(&control, argp, sizeof(control)))
3388                         goto out;
3389                 r = kvm_vm_ioctl_reinject(kvm, &control);
3390                 if (r)
3391                         goto out;
3392                 r = 0;
3393                 break;
3394         }
3395         case KVM_XEN_HVM_CONFIG: {
3396                 r = -EFAULT;
3397                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3398                                    sizeof(struct kvm_xen_hvm_config)))
3399                         goto out;
3400                 r = -EINVAL;
3401                 if (kvm->arch.xen_hvm_config.flags)
3402                         goto out;
3403                 r = 0;
3404                 break;
3405         }
3406         case KVM_SET_CLOCK: {
3407                 struct kvm_clock_data user_ns;
3408                 u64 now_ns;
3409                 s64 delta;
3410
3411                 r = -EFAULT;
3412                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3413                         goto out;
3414
3415                 r = -EINVAL;
3416                 if (user_ns.flags)
3417                         goto out;
3418
3419                 r = 0;
3420                 local_irq_disable();
3421                 now_ns = get_kernel_ns();
3422                 delta = user_ns.clock - now_ns;
3423                 local_irq_enable();
3424                 kvm->arch.kvmclock_offset = delta;
3425                 break;
3426         }
3427         case KVM_GET_CLOCK: {
3428                 struct kvm_clock_data user_ns;
3429                 u64 now_ns;
3430
3431                 local_irq_disable();
3432                 now_ns = get_kernel_ns();
3433                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3434                 local_irq_enable();
3435                 user_ns.flags = 0;
3436                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3437
3438                 r = -EFAULT;
3439                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3440                         goto out;
3441                 r = 0;
3442                 break;
3443         }
3444
3445         default:
3446                 ;
3447         }
3448 out:
3449         return r;
3450 }
3451
3452 static void kvm_init_msr_list(void)
3453 {
3454         u32 dummy[2];
3455         unsigned i, j;
3456
3457         /* skip the first msrs in the list. KVM-specific */
3458         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3459                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3460                         continue;
3461                 if (j < i)
3462                         msrs_to_save[j] = msrs_to_save[i];
3463                 j++;
3464         }
3465         num_msrs_to_save = j;
3466 }
3467
3468 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3469                            const void *v)
3470 {
3471         int handled = 0;
3472         int n;
3473
3474         do {
3475                 n = min(len, 8);
3476                 if (!(vcpu->arch.apic &&
3477                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3478                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3479                         break;
3480                 handled += n;
3481                 addr += n;
3482                 len -= n;
3483                 v += n;
3484         } while (len);
3485
3486         return handled;
3487 }
3488
3489 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3490 {
3491         int handled = 0;
3492         int n;
3493
3494         do {
3495                 n = min(len, 8);
3496                 if (!(vcpu->arch.apic &&
3497                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3498                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3499                         break;
3500                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3501                 handled += n;
3502                 addr += n;
3503                 len -= n;
3504                 v += n;
3505         } while (len);
3506
3507         return handled;
3508 }
3509
3510 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3511                         struct kvm_segment *var, int seg)
3512 {
3513         kvm_x86_ops->set_segment(vcpu, var, seg);
3514 }
3515
3516 void kvm_get_segment(struct kvm_vcpu *vcpu,
3517                      struct kvm_segment *var, int seg)
3518 {
3519         kvm_x86_ops->get_segment(vcpu, var, seg);
3520 }
3521
3522 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3523 {
3524         gpa_t t_gpa;
3525         struct x86_exception exception;
3526
3527         BUG_ON(!mmu_is_nested(vcpu));
3528
3529         /* NPT walks are always user-walks */
3530         access |= PFERR_USER_MASK;
3531         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3532
3533         return t_gpa;
3534 }
3535
3536 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3537                               struct x86_exception *exception)
3538 {
3539         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3540         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3541 }
3542
3543  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3544                                 struct x86_exception *exception)
3545 {
3546         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3547         access |= PFERR_FETCH_MASK;
3548         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3549 }
3550
3551 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3552                                struct x86_exception *exception)
3553 {
3554         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3555         access |= PFERR_WRITE_MASK;
3556         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3557 }
3558
3559 /* uses this to access any guest's mapped memory without checking CPL */
3560 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3561                                 struct x86_exception *exception)
3562 {
3563         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3564 }
3565
3566 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3567                                       struct kvm_vcpu *vcpu, u32 access,
3568                                       struct x86_exception *exception)
3569 {
3570         void *data = val;
3571         int r = X86EMUL_CONTINUE;
3572
3573         while (bytes) {
3574                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3575                                                             exception);
3576                 unsigned offset = addr & (PAGE_SIZE-1);
3577                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3578                 int ret;
3579
3580                 if (gpa == UNMAPPED_GVA)
3581                         return X86EMUL_PROPAGATE_FAULT;
3582                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3583                 if (ret < 0) {
3584                         r = X86EMUL_IO_NEEDED;
3585                         goto out;
3586                 }
3587
3588                 bytes -= toread;
3589                 data += toread;
3590                 addr += toread;
3591         }
3592 out:
3593         return r;
3594 }
3595
3596 /* used for instruction fetching */
3597 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3598                                 gva_t addr, void *val, unsigned int bytes,
3599                                 struct x86_exception *exception)
3600 {
3601         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3602         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3603
3604         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3605                                           access | PFERR_FETCH_MASK,
3606                                           exception);
3607 }
3608
3609 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3610                                gva_t addr, void *val, unsigned int bytes,
3611                                struct x86_exception *exception)
3612 {
3613         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3614         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3615
3616         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3617                                           exception);
3618 }
3619 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3620
3621 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3622                                       gva_t addr, void *val, unsigned int bytes,
3623                                       struct x86_exception *exception)
3624 {
3625         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3626         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3627 }
3628
3629 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3630                                        gva_t addr, void *val,
3631                                        unsigned int bytes,
3632                                        struct x86_exception *exception)
3633 {
3634         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3635         void *data = val;
3636         int r = X86EMUL_CONTINUE;
3637
3638         while (bytes) {
3639                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3640                                                              PFERR_WRITE_MASK,
3641                                                              exception);
3642                 unsigned offset = addr & (PAGE_SIZE-1);
3643                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3644                 int ret;
3645
3646                 if (gpa == UNMAPPED_GVA)
3647                         return X86EMUL_PROPAGATE_FAULT;
3648                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3649                 if (ret < 0) {
3650                         r = X86EMUL_IO_NEEDED;
3651                         goto out;
3652                 }
3653
3654                 bytes -= towrite;
3655                 data += towrite;
3656                 addr += towrite;
3657         }
3658 out:
3659         return r;
3660 }
3661 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3662
3663 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3664                                 gpa_t *gpa, struct x86_exception *exception,
3665                                 bool write)
3666 {
3667         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3668
3669         if (vcpu_match_mmio_gva(vcpu, gva) &&
3670                   check_write_user_access(vcpu, write, access,
3671                   vcpu->arch.access)) {
3672                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3673                                         (gva & (PAGE_SIZE - 1));
3674                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3675                 return 1;
3676         }
3677
3678         if (write)
3679                 access |= PFERR_WRITE_MASK;
3680
3681         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3682
3683         if (*gpa == UNMAPPED_GVA)
3684                 return -1;
3685
3686         /* For APIC access vmexit */
3687         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3688                 return 1;
3689
3690         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3691                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3692                 return 1;
3693         }
3694
3695         return 0;
3696 }
3697
3698 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3699                         const void *val, int bytes)
3700 {
3701         int ret;
3702
3703         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3704         if (ret < 0)
3705                 return 0;
3706         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3707         return 1;
3708 }
3709
3710 struct read_write_emulator_ops {
3711         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3712                                   int bytes);
3713         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3714                                   void *val, int bytes);
3715         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3716                                int bytes, void *val);
3717         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3718                                     void *val, int bytes);
3719         bool write;
3720 };
3721
3722 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3723 {
3724         if (vcpu->mmio_read_completed) {
3725                 memcpy(val, vcpu->mmio_data, bytes);
3726                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3727                                vcpu->mmio_phys_addr, *(u64 *)val);
3728                 vcpu->mmio_read_completed = 0;
3729                 return 1;
3730         }
3731
3732         return 0;
3733 }
3734
3735 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3736                         void *val, int bytes)
3737 {
3738         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3739 }
3740
3741 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3742                          void *val, int bytes)
3743 {
3744         return emulator_write_phys(vcpu, gpa, val, bytes);
3745 }
3746
3747 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3748 {
3749         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3750         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3751 }
3752
3753 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3754                           void *val, int bytes)
3755 {
3756         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3757         return X86EMUL_IO_NEEDED;
3758 }
3759
3760 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3761                            void *val, int bytes)
3762 {
3763         memcpy(vcpu->mmio_data, val, bytes);
3764         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3765         return X86EMUL_CONTINUE;
3766 }
3767
3768 static struct read_write_emulator_ops read_emultor = {
3769         .read_write_prepare = read_prepare,
3770         .read_write_emulate = read_emulate,
3771         .read_write_mmio = vcpu_mmio_read,
3772         .read_write_exit_mmio = read_exit_mmio,
3773 };
3774
3775 static struct read_write_emulator_ops write_emultor = {
3776         .read_write_emulate = write_emulate,
3777         .read_write_mmio = write_mmio,
3778         .read_write_exit_mmio = write_exit_mmio,
3779         .write = true,
3780 };
3781
3782 static int emulator_read_write_onepage(unsigned long addr, void *val,
3783                                        unsigned int bytes,
3784                                        struct x86_exception *exception,
3785                                        struct kvm_vcpu *vcpu,
3786                                        struct read_write_emulator_ops *ops)
3787 {
3788         gpa_t gpa;
3789         int handled, ret;
3790         bool write = ops->write;
3791
3792         if (ops->read_write_prepare &&
3793                   ops->read_write_prepare(vcpu, val, bytes))
3794                 return X86EMUL_CONTINUE;
3795
3796         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3797
3798         if (ret < 0)
3799                 return X86EMUL_PROPAGATE_FAULT;
3800
3801         /* For APIC access vmexit */
3802         if (ret)
3803                 goto mmio;
3804
3805         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3806                 return X86EMUL_CONTINUE;
3807
3808 mmio:
3809         /*
3810          * Is this MMIO handled locally?
3811          */
3812         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3813         if (handled == bytes)
3814                 return X86EMUL_CONTINUE;
3815
3816         gpa += handled;
3817         bytes -= handled;
3818         val += handled;
3819
3820         vcpu->mmio_needed = 1;
3821         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3822         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3823         vcpu->mmio_size = bytes;
3824         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3825         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3826         vcpu->mmio_index = 0;
3827
3828         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3829 }
3830
3831 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3832                         void *val, unsigned int bytes,
3833                         struct x86_exception *exception,
3834                         struct read_write_emulator_ops *ops)
3835 {
3836         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3837
3838         /* Crossing a page boundary? */
3839         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3840                 int rc, now;
3841
3842                 now = -addr & ~PAGE_MASK;
3843                 rc = emulator_read_write_onepage(addr, val, now, exception,
3844                                                  vcpu, ops);
3845
3846                 if (rc != X86EMUL_CONTINUE)
3847                         return rc;
3848                 addr += now;
3849                 val += now;
3850                 bytes -= now;
3851         }
3852
3853         return emulator_read_write_onepage(addr, val, bytes, exception,
3854                                            vcpu, ops);
3855 }
3856
3857 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3858                                   unsigned long addr,
3859                                   void *val,
3860                                   unsigned int bytes,
3861                                   struct x86_exception *exception)
3862 {
3863         return emulator_read_write(ctxt, addr, val, bytes,
3864                                    exception, &read_emultor);
3865 }
3866
3867 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3868                             unsigned long addr,
3869                             const void *val,
3870                             unsigned int bytes,
3871                             struct x86_exception *exception)
3872 {
3873         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3874                                    exception, &write_emultor);
3875 }
3876
3877 #define CMPXCHG_TYPE(t, ptr, old, new) \
3878         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3879
3880 #ifdef CONFIG_X86_64
3881 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3882 #else
3883 #  define CMPXCHG64(ptr, old, new) \
3884         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3885 #endif
3886
3887 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3888                                      unsigned long addr,
3889                                      const void *old,
3890                                      const void *new,
3891                                      unsigned int bytes,
3892                                      struct x86_exception *exception)
3893 {
3894         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3895         gpa_t gpa;
3896         struct page *page;
3897         char *kaddr;
3898         bool exchanged;
3899
3900         /* guests cmpxchg8b have to be emulated atomically */
3901         if (bytes > 8 || (bytes & (bytes - 1)))
3902                 goto emul_write;
3903
3904         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3905
3906         if (gpa == UNMAPPED_GVA ||
3907             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3908                 goto emul_write;
3909
3910         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3911                 goto emul_write;
3912
3913         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3914         if (is_error_page(page)) {
3915                 kvm_release_page_clean(page);
3916                 goto emul_write;
3917         }
3918
3919         kaddr = kmap_atomic(page, KM_USER0);
3920         kaddr += offset_in_page(gpa);
3921         switch (bytes) {
3922         case 1:
3923                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3924                 break;
3925         case 2:
3926                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3927                 break;
3928         case 4:
3929                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3930                 break;
3931         case 8:
3932                 exchanged = CMPXCHG64(kaddr, old, new);
3933                 break;
3934         default:
3935                 BUG();
3936         }
3937         kunmap_atomic(kaddr, KM_USER0);
3938         kvm_release_page_dirty(page);
3939
3940         if (!exchanged)
3941                 return X86EMUL_CMPXCHG_FAILED;
3942
3943         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3944
3945         return X86EMUL_CONTINUE;
3946
3947 emul_write:
3948         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3949
3950         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3951 }
3952
3953 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3954 {
3955         /* TODO: String I/O for in kernel device */
3956         int r;
3957
3958         if (vcpu->arch.pio.in)
3959                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3960                                     vcpu->arch.pio.size, pd);
3961         else
3962                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3963                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3964                                      pd);
3965         return r;
3966 }
3967
3968 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3969                                unsigned short port, void *val,
3970                                unsigned int count, bool in)
3971 {
3972         trace_kvm_pio(!in, port, size, count);
3973
3974         vcpu->arch.pio.port = port;
3975         vcpu->arch.pio.in = in;
3976         vcpu->arch.pio.count  = count;
3977         vcpu->arch.pio.size = size;
3978
3979         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3980                 vcpu->arch.pio.count = 0;
3981                 return 1;
3982         }
3983
3984         vcpu->run->exit_reason = KVM_EXIT_IO;
3985         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3986         vcpu->run->io.size = size;
3987         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3988         vcpu->run->io.count = count;
3989         vcpu->run->io.port = port;
3990
3991         return 0;
3992 }
3993
3994 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
3995                                     int size, unsigned short port, void *val,
3996                                     unsigned int count)
3997 {
3998         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3999         int ret;
4000
4001         if (vcpu->arch.pio.count)
4002                 goto data_avail;
4003
4004         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4005         if (ret) {
4006 data_avail:
4007                 memcpy(val, vcpu->arch.pio_data, size * count);
4008                 vcpu->arch.pio.count = 0;
4009                 return 1;
4010         }
4011
4012         return 0;
4013 }
4014
4015 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4016                                      int size, unsigned short port,
4017                                      const void *val, unsigned int count)
4018 {
4019         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4020
4021         memcpy(vcpu->arch.pio_data, val, size * count);
4022         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4023 }
4024
4025 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4026 {
4027         return kvm_x86_ops->get_segment_base(vcpu, seg);
4028 }
4029
4030 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4031 {
4032         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4033 }
4034
4035 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4036 {
4037         if (!need_emulate_wbinvd(vcpu))
4038                 return X86EMUL_CONTINUE;
4039
4040         if (kvm_x86_ops->has_wbinvd_exit()) {
4041                 int cpu = get_cpu();
4042
4043                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4044                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4045                                 wbinvd_ipi, NULL, 1);
4046                 put_cpu();
4047                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4048         } else
4049                 wbinvd();
4050         return X86EMUL_CONTINUE;
4051 }
4052 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4053
4054 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4055 {
4056         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4057 }
4058
4059 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4060 {
4061         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4062 }
4063
4064 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4065 {
4066
4067         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4068 }
4069
4070 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4071 {
4072         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4073 }
4074
4075 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4076 {
4077         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4078         unsigned long value;
4079
4080         switch (cr) {
4081         case 0:
4082                 value = kvm_read_cr0(vcpu);
4083                 break;
4084         case 2:
4085                 value = vcpu->arch.cr2;
4086                 break;
4087         case 3:
4088                 value = kvm_read_cr3(vcpu);
4089                 break;
4090         case 4:
4091                 value = kvm_read_cr4(vcpu);
4092                 break;
4093         case 8:
4094                 value = kvm_get_cr8(vcpu);
4095                 break;
4096         default:
4097                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4098                 return 0;
4099         }
4100
4101         return value;
4102 }
4103
4104 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4105 {
4106         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4107         int res = 0;
4108
4109         switch (cr) {
4110         case 0:
4111                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4112                 break;
4113         case 2:
4114                 vcpu->arch.cr2 = val;
4115                 break;
4116         case 3:
4117                 res = kvm_set_cr3(vcpu, val);
4118                 break;
4119         case 4:
4120                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4121                 break;
4122         case 8:
4123                 res = kvm_set_cr8(vcpu, val);
4124                 break;
4125         default:
4126                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4127                 res = -1;
4128         }
4129
4130         return res;
4131 }
4132
4133 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4134 {
4135         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4136 }
4137
4138 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4139 {
4140         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4141 }
4142
4143 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4144 {
4145         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4146 }
4147
4148 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4149 {
4150         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4151 }
4152
4153 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4154 {
4155         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4156 }
4157
4158 static unsigned long emulator_get_cached_segment_base(
4159         struct x86_emulate_ctxt *ctxt, int seg)
4160 {
4161         return get_segment_base(emul_to_vcpu(ctxt), seg);
4162 }
4163
4164 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4165                                  struct desc_struct *desc, u32 *base3,
4166                                  int seg)
4167 {
4168         struct kvm_segment var;
4169
4170         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4171         *selector = var.selector;
4172
4173         if (var.unusable)
4174                 return false;
4175
4176         if (var.g)
4177                 var.limit >>= 12;
4178         set_desc_limit(desc, var.limit);
4179         set_desc_base(desc, (unsigned long)var.base);
4180 #ifdef CONFIG_X86_64
4181         if (base3)
4182                 *base3 = var.base >> 32;
4183 #endif
4184         desc->type = var.type;
4185         desc->s = var.s;
4186         desc->dpl = var.dpl;
4187         desc->p = var.present;
4188         desc->avl = var.avl;
4189         desc->l = var.l;
4190         desc->d = var.db;
4191         desc->g = var.g;
4192
4193         return true;
4194 }
4195
4196 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4197                                  struct desc_struct *desc, u32 base3,
4198                                  int seg)
4199 {
4200         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4201         struct kvm_segment var;
4202
4203         var.selector = selector;
4204         var.base = get_desc_base(desc);
4205 #ifdef CONFIG_X86_64
4206         var.base |= ((u64)base3) << 32;
4207 #endif
4208         var.limit = get_desc_limit(desc);
4209         if (desc->g)
4210                 var.limit = (var.limit << 12) | 0xfff;
4211         var.type = desc->type;
4212         var.present = desc->p;
4213         var.dpl = desc->dpl;
4214         var.db = desc->d;
4215         var.s = desc->s;
4216         var.l = desc->l;
4217         var.g = desc->g;
4218         var.avl = desc->avl;
4219         var.present = desc->p;
4220         var.unusable = !var.present;
4221         var.padding = 0;
4222
4223         kvm_set_segment(vcpu, &var, seg);
4224         return;
4225 }
4226
4227 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4228                             u32 msr_index, u64 *pdata)
4229 {
4230         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4231 }
4232
4233 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4234                             u32 msr_index, u64 data)
4235 {
4236         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4237 }
4238
4239 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4240                              u32 pmc, u64 *pdata)
4241 {
4242         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4243 }
4244
4245 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4246 {
4247         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4248 }
4249
4250 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4251 {
4252         preempt_disable();
4253         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4254         /*
4255          * CR0.TS may reference the host fpu state, not the guest fpu state,
4256          * so it may be clear at this point.
4257          */
4258         clts();
4259 }
4260
4261 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4262 {
4263         preempt_enable();
4264 }
4265
4266 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4267                               struct x86_instruction_info *info,
4268                               enum x86_intercept_stage stage)
4269 {
4270         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4271 }
4272
4273 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4274                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4275 {
4276         struct kvm_cpuid_entry2 *cpuid = NULL;
4277
4278         if (eax && ecx)
4279                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4280                                             *eax, *ecx);
4281
4282         if (cpuid) {
4283                 *eax = cpuid->eax;
4284                 *ecx = cpuid->ecx;
4285                 if (ebx)
4286                         *ebx = cpuid->ebx;
4287                 if (edx)
4288                         *edx = cpuid->edx;
4289                 return true;
4290         }
4291
4292         return false;
4293 }
4294
4295 static struct x86_emulate_ops emulate_ops = {
4296         .read_std            = kvm_read_guest_virt_system,
4297         .write_std           = kvm_write_guest_virt_system,
4298         .fetch               = kvm_fetch_guest_virt,
4299         .read_emulated       = emulator_read_emulated,
4300         .write_emulated      = emulator_write_emulated,
4301         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4302         .invlpg              = emulator_invlpg,
4303         .pio_in_emulated     = emulator_pio_in_emulated,
4304         .pio_out_emulated    = emulator_pio_out_emulated,
4305         .get_segment         = emulator_get_segment,
4306         .set_segment         = emulator_set_segment,
4307         .get_cached_segment_base = emulator_get_cached_segment_base,
4308         .get_gdt             = emulator_get_gdt,
4309         .get_idt             = emulator_get_idt,
4310         .set_gdt             = emulator_set_gdt,
4311         .set_idt             = emulator_set_idt,
4312         .get_cr              = emulator_get_cr,
4313         .set_cr              = emulator_set_cr,
4314         .cpl                 = emulator_get_cpl,
4315         .get_dr              = emulator_get_dr,
4316         .set_dr              = emulator_set_dr,
4317         .set_msr             = emulator_set_msr,
4318         .get_msr             = emulator_get_msr,
4319         .read_pmc            = emulator_read_pmc,
4320         .halt                = emulator_halt,
4321         .wbinvd              = emulator_wbinvd,
4322         .fix_hypercall       = emulator_fix_hypercall,
4323         .get_fpu             = emulator_get_fpu,
4324         .put_fpu             = emulator_put_fpu,
4325         .intercept           = emulator_intercept,
4326         .get_cpuid           = emulator_get_cpuid,
4327 };
4328
4329 static void cache_all_regs(struct kvm_vcpu *vcpu)
4330 {
4331         kvm_register_read(vcpu, VCPU_REGS_RAX);
4332         kvm_register_read(vcpu, VCPU_REGS_RSP);
4333         kvm_register_read(vcpu, VCPU_REGS_RIP);
4334         vcpu->arch.regs_dirty = ~0;
4335 }
4336
4337 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4338 {
4339         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4340         /*
4341          * an sti; sti; sequence only disable interrupts for the first
4342          * instruction. So, if the last instruction, be it emulated or
4343          * not, left the system with the INT_STI flag enabled, it
4344          * means that the last instruction is an sti. We should not
4345          * leave the flag on in this case. The same goes for mov ss
4346          */
4347         if (!(int_shadow & mask))
4348                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4349 }
4350
4351 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4352 {
4353         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4354         if (ctxt->exception.vector == PF_VECTOR)
4355                 kvm_propagate_fault(vcpu, &ctxt->exception);
4356         else if (ctxt->exception.error_code_valid)
4357                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4358                                       ctxt->exception.error_code);
4359         else
4360                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4361 }
4362
4363 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4364                               const unsigned long *regs)
4365 {
4366         memset(&ctxt->twobyte, 0,
4367                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4368         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4369
4370         ctxt->fetch.start = 0;
4371         ctxt->fetch.end = 0;
4372         ctxt->io_read.pos = 0;
4373         ctxt->io_read.end = 0;
4374         ctxt->mem_read.pos = 0;
4375         ctxt->mem_read.end = 0;
4376 }
4377
4378 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4379 {
4380         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4381         int cs_db, cs_l;
4382
4383         /*
4384          * TODO: fix emulate.c to use guest_read/write_register
4385          * instead of direct ->regs accesses, can save hundred cycles
4386          * on Intel for instructions that don't read/change RSP, for
4387          * for example.
4388          */
4389         cache_all_regs(vcpu);
4390
4391         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4392
4393         ctxt->eflags = kvm_get_rflags(vcpu);
4394         ctxt->eip = kvm_rip_read(vcpu);
4395         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4396                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4397                      cs_l                               ? X86EMUL_MODE_PROT64 :
4398                      cs_db                              ? X86EMUL_MODE_PROT32 :
4399                                                           X86EMUL_MODE_PROT16;
4400         ctxt->guest_mode = is_guest_mode(vcpu);
4401
4402         init_decode_cache(ctxt, vcpu->arch.regs);
4403         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4404 }
4405
4406 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4407 {
4408         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4409         int ret;
4410
4411         init_emulate_ctxt(vcpu);
4412
4413         ctxt->op_bytes = 2;
4414         ctxt->ad_bytes = 2;
4415         ctxt->_eip = ctxt->eip + inc_eip;
4416         ret = emulate_int_real(ctxt, irq);
4417
4418         if (ret != X86EMUL_CONTINUE)
4419                 return EMULATE_FAIL;
4420
4421         ctxt->eip = ctxt->_eip;
4422         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4423         kvm_rip_write(vcpu, ctxt->eip);
4424         kvm_set_rflags(vcpu, ctxt->eflags);
4425
4426         if (irq == NMI_VECTOR)
4427                 vcpu->arch.nmi_pending = 0;
4428         else
4429                 vcpu->arch.interrupt.pending = false;
4430
4431         return EMULATE_DONE;
4432 }
4433 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4434
4435 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4436 {
4437         int r = EMULATE_DONE;
4438
4439         ++vcpu->stat.insn_emulation_fail;
4440         trace_kvm_emulate_insn_failed(vcpu);
4441         if (!is_guest_mode(vcpu)) {
4442                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4443                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4444                 vcpu->run->internal.ndata = 0;
4445                 r = EMULATE_FAIL;
4446         }
4447         kvm_queue_exception(vcpu, UD_VECTOR);
4448
4449         return r;
4450 }
4451
4452 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4453 {
4454         gpa_t gpa;
4455
4456         if (tdp_enabled)
4457                 return false;
4458
4459         /*
4460          * if emulation was due to access to shadowed page table
4461          * and it failed try to unshadow page and re-entetr the
4462          * guest to let CPU execute the instruction.
4463          */
4464         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4465                 return true;
4466
4467         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4468
4469         if (gpa == UNMAPPED_GVA)
4470                 return true; /* let cpu generate fault */
4471
4472         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4473                 return true;
4474
4475         return false;
4476 }
4477
4478 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4479                               unsigned long cr2,  int emulation_type)
4480 {
4481         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4482         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4483
4484         last_retry_eip = vcpu->arch.last_retry_eip;
4485         last_retry_addr = vcpu->arch.last_retry_addr;
4486
4487         /*
4488          * If the emulation is caused by #PF and it is non-page_table
4489          * writing instruction, it means the VM-EXIT is caused by shadow
4490          * page protected, we can zap the shadow page and retry this
4491          * instruction directly.
4492          *
4493          * Note: if the guest uses a non-page-table modifying instruction
4494          * on the PDE that points to the instruction, then we will unmap
4495          * the instruction and go to an infinite loop. So, we cache the
4496          * last retried eip and the last fault address, if we meet the eip
4497          * and the address again, we can break out of the potential infinite
4498          * loop.
4499          */
4500         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4501
4502         if (!(emulation_type & EMULTYPE_RETRY))
4503                 return false;
4504
4505         if (x86_page_table_writing_insn(ctxt))
4506                 return false;
4507
4508         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4509                 return false;
4510
4511         vcpu->arch.last_retry_eip = ctxt->eip;
4512         vcpu->arch.last_retry_addr = cr2;
4513
4514         if (!vcpu->arch.mmu.direct_map)
4515                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4516
4517         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4518
4519         return true;
4520 }
4521
4522 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4523                             unsigned long cr2,
4524                             int emulation_type,
4525                             void *insn,
4526                             int insn_len)
4527 {
4528         int r;
4529         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4530         bool writeback = true;
4531
4532         kvm_clear_exception_queue(vcpu);
4533
4534         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4535                 init_emulate_ctxt(vcpu);
4536                 ctxt->interruptibility = 0;
4537                 ctxt->have_exception = false;
4538                 ctxt->perm_ok = false;
4539
4540                 ctxt->only_vendor_specific_insn
4541                         = emulation_type & EMULTYPE_TRAP_UD;
4542
4543                 r = x86_decode_insn(ctxt, insn, insn_len);
4544
4545                 trace_kvm_emulate_insn_start(vcpu);
4546                 ++vcpu->stat.insn_emulation;
4547                 if (r != EMULATION_OK)  {
4548                         if (emulation_type & EMULTYPE_TRAP_UD)
4549                                 return EMULATE_FAIL;
4550                         if (reexecute_instruction(vcpu, cr2))
4551                                 return EMULATE_DONE;
4552                         if (emulation_type & EMULTYPE_SKIP)
4553                                 return EMULATE_FAIL;
4554                         return handle_emulation_failure(vcpu);
4555                 }
4556         }
4557
4558         if (emulation_type & EMULTYPE_SKIP) {
4559                 kvm_rip_write(vcpu, ctxt->_eip);
4560                 return EMULATE_DONE;
4561         }
4562
4563         if (retry_instruction(ctxt, cr2, emulation_type))
4564                 return EMULATE_DONE;
4565
4566         /* this is needed for vmware backdoor interface to work since it
4567            changes registers values  during IO operation */
4568         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4569                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4570                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4571         }
4572
4573 restart:
4574         r = x86_emulate_insn(ctxt);
4575
4576         if (r == EMULATION_INTERCEPTED)
4577                 return EMULATE_DONE;
4578
4579         if (r == EMULATION_FAILED) {
4580                 if (reexecute_instruction(vcpu, cr2))
4581                         return EMULATE_DONE;
4582
4583                 return handle_emulation_failure(vcpu);
4584         }
4585
4586         if (ctxt->have_exception) {
4587                 inject_emulated_exception(vcpu);
4588                 r = EMULATE_DONE;
4589         } else if (vcpu->arch.pio.count) {
4590                 if (!vcpu->arch.pio.in)
4591                         vcpu->arch.pio.count = 0;
4592                 else
4593                         writeback = false;
4594                 r = EMULATE_DO_MMIO;
4595         } else if (vcpu->mmio_needed) {
4596                 if (!vcpu->mmio_is_write)
4597                         writeback = false;
4598                 r = EMULATE_DO_MMIO;
4599         } else if (r == EMULATION_RESTART)
4600                 goto restart;
4601         else
4602                 r = EMULATE_DONE;
4603
4604         if (writeback) {
4605                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4606                 kvm_set_rflags(vcpu, ctxt->eflags);
4607                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4608                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4609                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4610                 kvm_rip_write(vcpu, ctxt->eip);
4611         } else
4612                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4613
4614         return r;
4615 }
4616 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4617
4618 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4619 {
4620         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4621         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4622                                             size, port, &val, 1);
4623         /* do not return to emulator after return from userspace */
4624         vcpu->arch.pio.count = 0;
4625         return ret;
4626 }
4627 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4628
4629 static void tsc_bad(void *info)
4630 {
4631         __this_cpu_write(cpu_tsc_khz, 0);
4632 }
4633
4634 static void tsc_khz_changed(void *data)
4635 {
4636         struct cpufreq_freqs *freq = data;
4637         unsigned long khz = 0;
4638
4639         if (data)
4640                 khz = freq->new;
4641         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4642                 khz = cpufreq_quick_get(raw_smp_processor_id());
4643         if (!khz)
4644                 khz = tsc_khz;
4645         __this_cpu_write(cpu_tsc_khz, khz);
4646 }
4647
4648 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4649                                      void *data)
4650 {
4651         struct cpufreq_freqs *freq = data;
4652         struct kvm *kvm;
4653         struct kvm_vcpu *vcpu;
4654         int i, send_ipi = 0;
4655
4656         /*
4657          * We allow guests to temporarily run on slowing clocks,
4658          * provided we notify them after, or to run on accelerating
4659          * clocks, provided we notify them before.  Thus time never
4660          * goes backwards.
4661          *
4662          * However, we have a problem.  We can't atomically update
4663          * the frequency of a given CPU from this function; it is
4664          * merely a notifier, which can be called from any CPU.
4665          * Changing the TSC frequency at arbitrary points in time
4666          * requires a recomputation of local variables related to
4667          * the TSC for each VCPU.  We must flag these local variables
4668          * to be updated and be sure the update takes place with the
4669          * new frequency before any guests proceed.
4670          *
4671          * Unfortunately, the combination of hotplug CPU and frequency
4672          * change creates an intractable locking scenario; the order
4673          * of when these callouts happen is undefined with respect to
4674          * CPU hotplug, and they can race with each other.  As such,
4675          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4676          * undefined; you can actually have a CPU frequency change take
4677          * place in between the computation of X and the setting of the
4678          * variable.  To protect against this problem, all updates of
4679          * the per_cpu tsc_khz variable are done in an interrupt
4680          * protected IPI, and all callers wishing to update the value
4681          * must wait for a synchronous IPI to complete (which is trivial
4682          * if the caller is on the CPU already).  This establishes the
4683          * necessary total order on variable updates.
4684          *
4685          * Note that because a guest time update may take place
4686          * anytime after the setting of the VCPU's request bit, the
4687          * correct TSC value must be set before the request.  However,
4688          * to ensure the update actually makes it to any guest which
4689          * starts running in hardware virtualization between the set
4690          * and the acquisition of the spinlock, we must also ping the
4691          * CPU after setting the request bit.
4692          *
4693          */
4694
4695         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4696                 return 0;
4697         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4698                 return 0;
4699
4700         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4701
4702         raw_spin_lock(&kvm_lock);
4703         list_for_each_entry(kvm, &vm_list, vm_list) {
4704                 kvm_for_each_vcpu(i, vcpu, kvm) {
4705                         if (vcpu->cpu != freq->cpu)
4706                                 continue;
4707                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4708                         if (vcpu->cpu != smp_processor_id())
4709                                 send_ipi = 1;
4710                 }
4711         }
4712         raw_spin_unlock(&kvm_lock);
4713
4714         if (freq->old < freq->new && send_ipi) {
4715                 /*
4716                  * We upscale the frequency.  Must make the guest
4717                  * doesn't see old kvmclock values while running with
4718                  * the new frequency, otherwise we risk the guest sees
4719                  * time go backwards.
4720                  *
4721                  * In case we update the frequency for another cpu
4722                  * (which might be in guest context) send an interrupt
4723                  * to kick the cpu out of guest context.  Next time
4724                  * guest context is entered kvmclock will be updated,
4725                  * so the guest will not see stale values.
4726                  */
4727                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4728         }
4729         return 0;
4730 }
4731
4732 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4733         .notifier_call  = kvmclock_cpufreq_notifier
4734 };
4735
4736 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4737                                         unsigned long action, void *hcpu)
4738 {
4739         unsigned int cpu = (unsigned long)hcpu;
4740
4741         switch (action) {
4742                 case CPU_ONLINE:
4743                 case CPU_DOWN_FAILED:
4744                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4745                         break;
4746                 case CPU_DOWN_PREPARE:
4747                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4748                         break;
4749         }
4750         return NOTIFY_OK;
4751 }
4752
4753 static struct notifier_block kvmclock_cpu_notifier_block = {
4754         .notifier_call  = kvmclock_cpu_notifier,
4755         .priority = -INT_MAX
4756 };
4757
4758 static void kvm_timer_init(void)
4759 {
4760         int cpu;
4761
4762         max_tsc_khz = tsc_khz;
4763         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4764         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4765 #ifdef CONFIG_CPU_FREQ
4766                 struct cpufreq_policy policy;
4767                 memset(&policy, 0, sizeof(policy));
4768                 cpu = get_cpu();
4769                 cpufreq_get_policy(&policy, cpu);
4770                 if (policy.cpuinfo.max_freq)
4771                         max_tsc_khz = policy.cpuinfo.max_freq;
4772                 put_cpu();
4773 #endif
4774                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4775                                           CPUFREQ_TRANSITION_NOTIFIER);
4776         }
4777         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4778         for_each_online_cpu(cpu)
4779                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4780 }
4781
4782 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4783
4784 int kvm_is_in_guest(void)
4785 {
4786         return __this_cpu_read(current_vcpu) != NULL;
4787 }
4788
4789 static int kvm_is_user_mode(void)
4790 {
4791         int user_mode = 3;
4792
4793         if (__this_cpu_read(current_vcpu))
4794                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4795
4796         return user_mode != 0;
4797 }
4798
4799 static unsigned long kvm_get_guest_ip(void)
4800 {
4801         unsigned long ip = 0;
4802
4803         if (__this_cpu_read(current_vcpu))
4804                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4805
4806         return ip;
4807 }
4808
4809 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4810         .is_in_guest            = kvm_is_in_guest,
4811         .is_user_mode           = kvm_is_user_mode,
4812         .get_guest_ip           = kvm_get_guest_ip,
4813 };
4814
4815 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4816 {
4817         __this_cpu_write(current_vcpu, vcpu);
4818 }
4819 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4820
4821 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4822 {
4823         __this_cpu_write(current_vcpu, NULL);
4824 }
4825 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4826
4827 static void kvm_set_mmio_spte_mask(void)
4828 {
4829         u64 mask;
4830         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4831
4832         /*
4833          * Set the reserved bits and the present bit of an paging-structure
4834          * entry to generate page fault with PFER.RSV = 1.
4835          */
4836         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4837         mask |= 1ull;
4838
4839 #ifdef CONFIG_X86_64
4840         /*
4841          * If reserved bit is not supported, clear the present bit to disable
4842          * mmio page fault.
4843          */
4844         if (maxphyaddr == 52)
4845                 mask &= ~1ull;
4846 #endif
4847
4848         kvm_mmu_set_mmio_spte_mask(mask);
4849 }
4850
4851 int kvm_arch_init(void *opaque)
4852 {
4853         int r;
4854         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4855
4856         if (kvm_x86_ops) {
4857                 printk(KERN_ERR "kvm: already loaded the other module\n");
4858                 r = -EEXIST;
4859                 goto out;
4860         }
4861
4862         if (!ops->cpu_has_kvm_support()) {
4863                 printk(KERN_ERR "kvm: no hardware support\n");
4864                 r = -EOPNOTSUPP;
4865                 goto out;
4866         }
4867         if (ops->disabled_by_bios()) {
4868                 printk(KERN_ERR "kvm: disabled by bios\n");
4869                 r = -EOPNOTSUPP;
4870                 goto out;
4871         }
4872
4873         r = kvm_mmu_module_init();
4874         if (r)
4875                 goto out;
4876
4877         kvm_set_mmio_spte_mask();
4878         kvm_init_msr_list();
4879
4880         kvm_x86_ops = ops;
4881         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4882                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4883
4884         kvm_timer_init();
4885
4886         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4887
4888         if (cpu_has_xsave)
4889                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4890
4891         return 0;
4892
4893 out:
4894         return r;
4895 }
4896
4897 void kvm_arch_exit(void)
4898 {
4899         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4900
4901         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4902                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4903                                             CPUFREQ_TRANSITION_NOTIFIER);
4904         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4905         kvm_x86_ops = NULL;
4906         kvm_mmu_module_exit();
4907 }
4908
4909 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4910 {
4911         ++vcpu->stat.halt_exits;
4912         if (irqchip_in_kernel(vcpu->kvm)) {
4913                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4914                 return 1;
4915         } else {
4916                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4917                 return 0;
4918         }
4919 }
4920 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4921
4922 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4923 {
4924         u64 param, ingpa, outgpa, ret;
4925         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4926         bool fast, longmode;
4927         int cs_db, cs_l;
4928
4929         /*
4930          * hypercall generates UD from non zero cpl and real mode
4931          * per HYPER-V spec
4932          */
4933         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4934                 kvm_queue_exception(vcpu, UD_VECTOR);
4935                 return 0;
4936         }
4937
4938         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4939         longmode = is_long_mode(vcpu) && cs_l == 1;
4940
4941         if (!longmode) {
4942                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4943                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4944                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4945                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4946                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4947                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4948         }
4949 #ifdef CONFIG_X86_64
4950         else {
4951                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4952                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4953                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4954         }
4955 #endif
4956
4957         code = param & 0xffff;
4958         fast = (param >> 16) & 0x1;
4959         rep_cnt = (param >> 32) & 0xfff;
4960         rep_idx = (param >> 48) & 0xfff;
4961
4962         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4963
4964         switch (code) {
4965         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4966                 kvm_vcpu_on_spin(vcpu);
4967                 break;
4968         default:
4969                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4970                 break;
4971         }
4972
4973         ret = res | (((u64)rep_done & 0xfff) << 32);
4974         if (longmode) {
4975                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4976         } else {
4977                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4978                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4979         }
4980
4981         return 1;
4982 }
4983
4984 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4985 {
4986         unsigned long nr, a0, a1, a2, a3, ret;
4987         int r = 1;
4988
4989         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4990                 return kvm_hv_hypercall(vcpu);
4991
4992         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4993         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4994         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4995         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4996         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4997
4998         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4999
5000         if (!is_long_mode(vcpu)) {
5001                 nr &= 0xFFFFFFFF;
5002                 a0 &= 0xFFFFFFFF;
5003                 a1 &= 0xFFFFFFFF;
5004                 a2 &= 0xFFFFFFFF;
5005                 a3 &= 0xFFFFFFFF;
5006         }
5007
5008         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5009                 ret = -KVM_EPERM;
5010                 goto out;
5011         }
5012
5013         switch (nr) {
5014         case KVM_HC_VAPIC_POLL_IRQ:
5015                 ret = 0;
5016                 break;
5017         default:
5018                 ret = -KVM_ENOSYS;
5019                 break;
5020         }
5021 out:
5022         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5023         ++vcpu->stat.hypercalls;
5024         return r;
5025 }
5026 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5027
5028 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5029 {
5030         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5031         char instruction[3];
5032         unsigned long rip = kvm_rip_read(vcpu);
5033
5034         /*
5035          * Blow out the MMU to ensure that no other VCPU has an active mapping
5036          * to ensure that the updated hypercall appears atomically across all
5037          * VCPUs.
5038          */
5039         kvm_mmu_zap_all(vcpu->kvm);
5040
5041         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5042
5043         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5044 }
5045
5046 /*
5047  * Check if userspace requested an interrupt window, and that the
5048  * interrupt window is open.
5049  *
5050  * No need to exit to userspace if we already have an interrupt queued.
5051  */
5052 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5053 {
5054         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5055                 vcpu->run->request_interrupt_window &&
5056                 kvm_arch_interrupt_allowed(vcpu));
5057 }
5058
5059 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5060 {
5061         struct kvm_run *kvm_run = vcpu->run;
5062
5063         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5064         kvm_run->cr8 = kvm_get_cr8(vcpu);
5065         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5066         if (irqchip_in_kernel(vcpu->kvm))
5067                 kvm_run->ready_for_interrupt_injection = 1;
5068         else
5069                 kvm_run->ready_for_interrupt_injection =
5070                         kvm_arch_interrupt_allowed(vcpu) &&
5071                         !kvm_cpu_has_interrupt(vcpu) &&
5072                         !kvm_event_needs_reinjection(vcpu);
5073 }
5074
5075 static void vapic_enter(struct kvm_vcpu *vcpu)
5076 {
5077         struct kvm_lapic *apic = vcpu->arch.apic;
5078         struct page *page;
5079
5080         if (!apic || !apic->vapic_addr)
5081                 return;
5082
5083         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5084
5085         vcpu->arch.apic->vapic_page = page;
5086 }
5087
5088 static void vapic_exit(struct kvm_vcpu *vcpu)
5089 {
5090         struct kvm_lapic *apic = vcpu->arch.apic;
5091         int idx;
5092
5093         if (!apic || !apic->vapic_addr)
5094                 return;
5095
5096         idx = srcu_read_lock(&vcpu->kvm->srcu);
5097         kvm_release_page_dirty(apic->vapic_page);
5098         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5099         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5100 }
5101
5102 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5103 {
5104         int max_irr, tpr;
5105
5106         if (!kvm_x86_ops->update_cr8_intercept)
5107                 return;
5108
5109         if (!vcpu->arch.apic)
5110                 return;
5111
5112         if (!vcpu->arch.apic->vapic_addr)
5113                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5114         else
5115                 max_irr = -1;
5116
5117         if (max_irr != -1)
5118                 max_irr >>= 4;
5119
5120         tpr = kvm_lapic_get_cr8(vcpu);
5121
5122         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5123 }
5124
5125 static void inject_pending_event(struct kvm_vcpu *vcpu)
5126 {
5127         /* try to reinject previous events if any */
5128         if (vcpu->arch.exception.pending) {
5129                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5130                                         vcpu->arch.exception.has_error_code,
5131                                         vcpu->arch.exception.error_code);
5132                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5133                                           vcpu->arch.exception.has_error_code,
5134                                           vcpu->arch.exception.error_code,
5135                                           vcpu->arch.exception.reinject);
5136                 return;
5137         }
5138
5139         if (vcpu->arch.nmi_injected) {
5140                 kvm_x86_ops->set_nmi(vcpu);
5141                 return;
5142         }
5143
5144         if (vcpu->arch.interrupt.pending) {
5145                 kvm_x86_ops->set_irq(vcpu);
5146                 return;
5147         }
5148
5149         /* try to inject new event if pending */
5150         if (vcpu->arch.nmi_pending) {
5151                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5152                         --vcpu->arch.nmi_pending;
5153                         vcpu->arch.nmi_injected = true;
5154                         kvm_x86_ops->set_nmi(vcpu);
5155                 }
5156         } else if (kvm_cpu_has_interrupt(vcpu)) {
5157                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5158                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5159                                             false);
5160                         kvm_x86_ops->set_irq(vcpu);
5161                 }
5162         }
5163 }
5164
5165 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5166 {
5167         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5168                         !vcpu->guest_xcr0_loaded) {
5169                 /* kvm_set_xcr() also depends on this */
5170                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5171                 vcpu->guest_xcr0_loaded = 1;
5172         }
5173 }
5174
5175 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5176 {
5177         if (vcpu->guest_xcr0_loaded) {
5178                 if (vcpu->arch.xcr0 != host_xcr0)
5179                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5180                 vcpu->guest_xcr0_loaded = 0;
5181         }
5182 }
5183
5184 static void process_nmi(struct kvm_vcpu *vcpu)
5185 {
5186         unsigned limit = 2;
5187
5188         /*
5189          * x86 is limited to one NMI running, and one NMI pending after it.
5190          * If an NMI is already in progress, limit further NMIs to just one.
5191          * Otherwise, allow two (and we'll inject the first one immediately).
5192          */
5193         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5194                 limit = 1;
5195
5196         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5197         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5198         kvm_make_request(KVM_REQ_EVENT, vcpu);
5199 }
5200
5201 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5202 {
5203         int r;
5204         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5205                 vcpu->run->request_interrupt_window;
5206         bool req_immediate_exit = 0;
5207
5208         if (vcpu->requests) {
5209                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5210                         kvm_mmu_unload(vcpu);
5211                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5212                         __kvm_migrate_timers(vcpu);
5213                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5214                         r = kvm_guest_time_update(vcpu);
5215                         if (unlikely(r))
5216                                 goto out;
5217                 }
5218                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5219                         kvm_mmu_sync_roots(vcpu);
5220                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5221                         kvm_x86_ops->tlb_flush(vcpu);
5222                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5223                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5224                         r = 0;
5225                         goto out;
5226                 }
5227                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5228                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5229                         r = 0;
5230                         goto out;
5231                 }
5232                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5233                         vcpu->fpu_active = 0;
5234                         kvm_x86_ops->fpu_deactivate(vcpu);
5235                 }
5236                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5237                         /* Page is swapped out. Do synthetic halt */
5238                         vcpu->arch.apf.halted = true;
5239                         r = 1;
5240                         goto out;
5241                 }
5242                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5243                         record_steal_time(vcpu);
5244                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5245                         process_nmi(vcpu);
5246                 req_immediate_exit =
5247                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5248                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5249                         kvm_handle_pmu_event(vcpu);
5250                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5251                         kvm_deliver_pmi(vcpu);
5252         }
5253
5254         r = kvm_mmu_reload(vcpu);
5255         if (unlikely(r))
5256                 goto out;
5257
5258         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5259                 inject_pending_event(vcpu);
5260
5261                 /* enable NMI/IRQ window open exits if needed */
5262                 if (vcpu->arch.nmi_pending)
5263                         kvm_x86_ops->enable_nmi_window(vcpu);
5264                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5265                         kvm_x86_ops->enable_irq_window(vcpu);
5266
5267                 if (kvm_lapic_enabled(vcpu)) {
5268                         update_cr8_intercept(vcpu);
5269                         kvm_lapic_sync_to_vapic(vcpu);
5270                 }
5271         }
5272
5273         preempt_disable();
5274
5275         kvm_x86_ops->prepare_guest_switch(vcpu);
5276         if (vcpu->fpu_active)
5277                 kvm_load_guest_fpu(vcpu);
5278         kvm_load_guest_xcr0(vcpu);
5279
5280         vcpu->mode = IN_GUEST_MODE;
5281
5282         /* We should set ->mode before check ->requests,
5283          * see the comment in make_all_cpus_request.
5284          */
5285         smp_mb();
5286
5287         local_irq_disable();
5288
5289         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5290             || need_resched() || signal_pending(current)) {
5291                 vcpu->mode = OUTSIDE_GUEST_MODE;
5292                 smp_wmb();
5293                 local_irq_enable();
5294                 preempt_enable();
5295                 kvm_x86_ops->cancel_injection(vcpu);
5296                 r = 1;
5297                 goto out;
5298         }
5299
5300         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5301
5302         if (req_immediate_exit)
5303                 smp_send_reschedule(vcpu->cpu);
5304
5305         kvm_guest_enter();
5306
5307         if (unlikely(vcpu->arch.switch_db_regs)) {
5308                 set_debugreg(0, 7);
5309                 set_debugreg(vcpu->arch.eff_db[0], 0);
5310                 set_debugreg(vcpu->arch.eff_db[1], 1);
5311                 set_debugreg(vcpu->arch.eff_db[2], 2);
5312                 set_debugreg(vcpu->arch.eff_db[3], 3);
5313         }
5314
5315         trace_kvm_entry(vcpu->vcpu_id);
5316         kvm_x86_ops->run(vcpu);
5317
5318         /*
5319          * If the guest has used debug registers, at least dr7
5320          * will be disabled while returning to the host.
5321          * If we don't have active breakpoints in the host, we don't
5322          * care about the messed up debug address registers. But if
5323          * we have some of them active, restore the old state.
5324          */
5325         if (hw_breakpoint_active())
5326                 hw_breakpoint_restore();
5327
5328         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5329
5330         vcpu->mode = OUTSIDE_GUEST_MODE;
5331         smp_wmb();
5332         local_irq_enable();
5333
5334         ++vcpu->stat.exits;
5335
5336         /*
5337          * We must have an instruction between local_irq_enable() and
5338          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5339          * the interrupt shadow.  The stat.exits increment will do nicely.
5340          * But we need to prevent reordering, hence this barrier():
5341          */
5342         barrier();
5343
5344         kvm_guest_exit();
5345
5346         preempt_enable();
5347
5348         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5349
5350         /*
5351          * Profile KVM exit RIPs:
5352          */
5353         if (unlikely(prof_on == KVM_PROFILING)) {
5354                 unsigned long rip = kvm_rip_read(vcpu);
5355                 profile_hit(KVM_PROFILING, (void *)rip);
5356         }
5357
5358         if (unlikely(vcpu->arch.tsc_always_catchup))
5359                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5360
5361         kvm_lapic_sync_from_vapic(vcpu);
5362
5363         r = kvm_x86_ops->handle_exit(vcpu);
5364 out:
5365         return r;
5366 }
5367
5368
5369 static int __vcpu_run(struct kvm_vcpu *vcpu)
5370 {
5371         int r;
5372         struct kvm *kvm = vcpu->kvm;
5373
5374         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5375                 pr_debug("vcpu %d received sipi with vector # %x\n",
5376                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5377                 kvm_lapic_reset(vcpu);
5378                 r = kvm_arch_vcpu_reset(vcpu);
5379                 if (r)
5380                         return r;
5381                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5382         }
5383
5384         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5385         vapic_enter(vcpu);
5386
5387         r = 1;
5388         while (r > 0) {
5389                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5390                     !vcpu->arch.apf.halted)
5391                         r = vcpu_enter_guest(vcpu);
5392                 else {
5393                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5394                         kvm_vcpu_block(vcpu);
5395                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5396                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5397                         {
5398                                 switch(vcpu->arch.mp_state) {
5399                                 case KVM_MP_STATE_HALTED:
5400                                         vcpu->arch.mp_state =
5401                                                 KVM_MP_STATE_RUNNABLE;
5402                                 case KVM_MP_STATE_RUNNABLE:
5403                                         vcpu->arch.apf.halted = false;
5404                                         break;
5405                                 case KVM_MP_STATE_SIPI_RECEIVED:
5406                                 default:
5407                                         r = -EINTR;
5408                                         break;
5409                                 }
5410                         }
5411                 }
5412
5413                 if (r <= 0)
5414                         break;
5415
5416                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5417                 if (kvm_cpu_has_pending_timer(vcpu))
5418                         kvm_inject_pending_timer_irqs(vcpu);
5419
5420                 if (dm_request_for_irq_injection(vcpu)) {
5421                         r = -EINTR;
5422                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5423                         ++vcpu->stat.request_irq_exits;
5424                 }
5425
5426                 kvm_check_async_pf_completion(vcpu);
5427
5428                 if (signal_pending(current)) {
5429                         r = -EINTR;
5430                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5431                         ++vcpu->stat.signal_exits;
5432                 }
5433                 if (need_resched()) {
5434                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5435                         kvm_resched(vcpu);
5436                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5437                 }
5438         }
5439
5440         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5441
5442         vapic_exit(vcpu);
5443
5444         return r;
5445 }
5446
5447 static int complete_mmio(struct kvm_vcpu *vcpu)
5448 {
5449         struct kvm_run *run = vcpu->run;
5450         int r;
5451
5452         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5453                 return 1;
5454
5455         if (vcpu->mmio_needed) {
5456                 vcpu->mmio_needed = 0;
5457                 if (!vcpu->mmio_is_write)
5458                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5459                                run->mmio.data, 8);
5460                 vcpu->mmio_index += 8;
5461                 if (vcpu->mmio_index < vcpu->mmio_size) {
5462                         run->exit_reason = KVM_EXIT_MMIO;
5463                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5464                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5465                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5466                         run->mmio.is_write = vcpu->mmio_is_write;
5467                         vcpu->mmio_needed = 1;
5468                         return 0;
5469                 }
5470                 if (vcpu->mmio_is_write)
5471                         return 1;
5472                 vcpu->mmio_read_completed = 1;
5473         }
5474         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5475         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5476         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5477         if (r != EMULATE_DONE)
5478                 return 0;
5479         return 1;
5480 }
5481
5482 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5483 {
5484         int r;
5485         sigset_t sigsaved;
5486
5487         if (!tsk_used_math(current) && init_fpu(current))
5488                 return -ENOMEM;
5489
5490         if (vcpu->sigset_active)
5491                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5492
5493         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5494                 kvm_vcpu_block(vcpu);
5495                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5496                 r = -EAGAIN;
5497                 goto out;
5498         }
5499
5500         /* re-sync apic's tpr */
5501         if (!irqchip_in_kernel(vcpu->kvm)) {
5502                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5503                         r = -EINVAL;
5504                         goto out;
5505                 }
5506         }
5507
5508         r = complete_mmio(vcpu);
5509         if (r <= 0)
5510                 goto out;
5511
5512         r = __vcpu_run(vcpu);
5513
5514 out:
5515         post_kvm_run_save(vcpu);
5516         if (vcpu->sigset_active)
5517                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5518
5519         return r;
5520 }
5521
5522 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5523 {
5524         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5525                 /*
5526                  * We are here if userspace calls get_regs() in the middle of
5527                  * instruction emulation. Registers state needs to be copied
5528                  * back from emulation context to vcpu. Usrapace shouldn't do
5529                  * that usually, but some bad designed PV devices (vmware
5530                  * backdoor interface) need this to work
5531                  */
5532                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5533                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5534                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5535         }
5536         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5537         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5538         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5539         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5540         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5541         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5542         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5543         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5544 #ifdef CONFIG_X86_64
5545         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5546         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5547         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5548         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5549         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5550         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5551         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5552         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5553 #endif
5554
5555         regs->rip = kvm_rip_read(vcpu);
5556         regs->rflags = kvm_get_rflags(vcpu);
5557
5558         return 0;
5559 }
5560
5561 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5562 {
5563         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5564         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5565
5566         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5567         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5568         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5569         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5570         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5571         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5572         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5573         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5574 #ifdef CONFIG_X86_64
5575         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5576         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5577         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5578         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5579         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5580         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5581         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5582         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5583 #endif
5584
5585         kvm_rip_write(vcpu, regs->rip);
5586         kvm_set_rflags(vcpu, regs->rflags);
5587
5588         vcpu->arch.exception.pending = false;
5589
5590         kvm_make_request(KVM_REQ_EVENT, vcpu);
5591
5592         return 0;
5593 }
5594
5595 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5596 {
5597         struct kvm_segment cs;
5598
5599         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5600         *db = cs.db;
5601         *l = cs.l;
5602 }
5603 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5604
5605 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5606                                   struct kvm_sregs *sregs)
5607 {
5608         struct desc_ptr dt;
5609
5610         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5611         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5612         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5613         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5614         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5615         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5616
5617         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5618         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5619
5620         kvm_x86_ops->get_idt(vcpu, &dt);
5621         sregs->idt.limit = dt.size;
5622         sregs->idt.base = dt.address;
5623         kvm_x86_ops->get_gdt(vcpu, &dt);
5624         sregs->gdt.limit = dt.size;
5625         sregs->gdt.base = dt.address;
5626
5627         sregs->cr0 = kvm_read_cr0(vcpu);
5628         sregs->cr2 = vcpu->arch.cr2;
5629         sregs->cr3 = kvm_read_cr3(vcpu);
5630         sregs->cr4 = kvm_read_cr4(vcpu);
5631         sregs->cr8 = kvm_get_cr8(vcpu);
5632         sregs->efer = vcpu->arch.efer;
5633         sregs->apic_base = kvm_get_apic_base(vcpu);
5634
5635         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5636
5637         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5638                 set_bit(vcpu->arch.interrupt.nr,
5639                         (unsigned long *)sregs->interrupt_bitmap);
5640
5641         return 0;
5642 }
5643
5644 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5645                                     struct kvm_mp_state *mp_state)
5646 {
5647         mp_state->mp_state = vcpu->arch.mp_state;
5648         return 0;
5649 }
5650
5651 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5652                                     struct kvm_mp_state *mp_state)
5653 {
5654         vcpu->arch.mp_state = mp_state->mp_state;
5655         kvm_make_request(KVM_REQ_EVENT, vcpu);
5656         return 0;
5657 }
5658
5659 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5660                     bool has_error_code, u32 error_code)
5661 {
5662         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5663         int ret;
5664
5665         init_emulate_ctxt(vcpu);
5666
5667         ret = emulator_task_switch(ctxt, tss_selector, reason,
5668                                    has_error_code, error_code);
5669
5670         if (ret)
5671                 return EMULATE_FAIL;
5672
5673         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5674         kvm_rip_write(vcpu, ctxt->eip);
5675         kvm_set_rflags(vcpu, ctxt->eflags);
5676         kvm_make_request(KVM_REQ_EVENT, vcpu);
5677         return EMULATE_DONE;
5678 }
5679 EXPORT_SYMBOL_GPL(kvm_task_switch);
5680
5681 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5682                                   struct kvm_sregs *sregs)
5683 {
5684         int mmu_reset_needed = 0;
5685         int pending_vec, max_bits, idx;
5686         struct desc_ptr dt;
5687
5688         dt.size = sregs->idt.limit;
5689         dt.address = sregs->idt.base;
5690         kvm_x86_ops->set_idt(vcpu, &dt);
5691         dt.size = sregs->gdt.limit;
5692         dt.address = sregs->gdt.base;
5693         kvm_x86_ops->set_gdt(vcpu, &dt);
5694
5695         vcpu->arch.cr2 = sregs->cr2;
5696         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5697         vcpu->arch.cr3 = sregs->cr3;
5698         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5699
5700         kvm_set_cr8(vcpu, sregs->cr8);
5701
5702         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5703         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5704         kvm_set_apic_base(vcpu, sregs->apic_base);
5705
5706         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5707         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5708         vcpu->arch.cr0 = sregs->cr0;
5709
5710         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5711         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5712         if (sregs->cr4 & X86_CR4_OSXSAVE)
5713                 kvm_update_cpuid(vcpu);
5714
5715         idx = srcu_read_lock(&vcpu->kvm->srcu);
5716         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5717                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5718                 mmu_reset_needed = 1;
5719         }
5720         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5721
5722         if (mmu_reset_needed)
5723                 kvm_mmu_reset_context(vcpu);
5724
5725         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5726         pending_vec = find_first_bit(
5727                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5728         if (pending_vec < max_bits) {
5729                 kvm_queue_interrupt(vcpu, pending_vec, false);
5730                 pr_debug("Set back pending irq %d\n", pending_vec);
5731         }
5732
5733         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5734         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5735         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5736         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5737         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5738         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5739
5740         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5741         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5742
5743         update_cr8_intercept(vcpu);
5744
5745         /* Older userspace won't unhalt the vcpu on reset. */
5746         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5747             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5748             !is_protmode(vcpu))
5749                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5750
5751         kvm_make_request(KVM_REQ_EVENT, vcpu);
5752
5753         return 0;
5754 }
5755
5756 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5757                                         struct kvm_guest_debug *dbg)
5758 {
5759         unsigned long rflags;
5760         int i, r;
5761
5762         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5763                 r = -EBUSY;
5764                 if (vcpu->arch.exception.pending)
5765                         goto out;
5766                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5767                         kvm_queue_exception(vcpu, DB_VECTOR);
5768                 else
5769                         kvm_queue_exception(vcpu, BP_VECTOR);
5770         }
5771
5772         /*
5773          * Read rflags as long as potentially injected trace flags are still
5774          * filtered out.
5775          */
5776         rflags = kvm_get_rflags(vcpu);
5777
5778         vcpu->guest_debug = dbg->control;
5779         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5780                 vcpu->guest_debug = 0;
5781
5782         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5783                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5784                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5785                 vcpu->arch.switch_db_regs =
5786                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5787         } else {
5788                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5789                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5790                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5791         }
5792
5793         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5794                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5795                         get_segment_base(vcpu, VCPU_SREG_CS);
5796
5797         /*
5798          * Trigger an rflags update that will inject or remove the trace
5799          * flags.
5800          */
5801         kvm_set_rflags(vcpu, rflags);
5802
5803         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5804
5805         r = 0;
5806
5807 out:
5808
5809         return r;
5810 }
5811
5812 /*
5813  * Translate a guest virtual address to a guest physical address.
5814  */
5815 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5816                                     struct kvm_translation *tr)
5817 {
5818         unsigned long vaddr = tr->linear_address;
5819         gpa_t gpa;
5820         int idx;
5821
5822         idx = srcu_read_lock(&vcpu->kvm->srcu);
5823         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5824         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5825         tr->physical_address = gpa;
5826         tr->valid = gpa != UNMAPPED_GVA;
5827         tr->writeable = 1;
5828         tr->usermode = 0;
5829
5830         return 0;
5831 }
5832
5833 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5834 {
5835         struct i387_fxsave_struct *fxsave =
5836                         &vcpu->arch.guest_fpu.state->fxsave;
5837
5838         memcpy(fpu->fpr, fxsave->st_space, 128);
5839         fpu->fcw = fxsave->cwd;
5840         fpu->fsw = fxsave->swd;
5841         fpu->ftwx = fxsave->twd;
5842         fpu->last_opcode = fxsave->fop;
5843         fpu->last_ip = fxsave->rip;
5844         fpu->last_dp = fxsave->rdp;
5845         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5846
5847         return 0;
5848 }
5849
5850 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5851 {
5852         struct i387_fxsave_struct *fxsave =
5853                         &vcpu->arch.guest_fpu.state->fxsave;
5854
5855         memcpy(fxsave->st_space, fpu->fpr, 128);
5856         fxsave->cwd = fpu->fcw;
5857         fxsave->swd = fpu->fsw;
5858         fxsave->twd = fpu->ftwx;
5859         fxsave->fop = fpu->last_opcode;
5860         fxsave->rip = fpu->last_ip;
5861         fxsave->rdp = fpu->last_dp;
5862         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5863
5864         return 0;
5865 }
5866
5867 int fx_init(struct kvm_vcpu *vcpu)
5868 {
5869         int err;
5870
5871         err = fpu_alloc(&vcpu->arch.guest_fpu);
5872         if (err)
5873                 return err;
5874
5875         fpu_finit(&vcpu->arch.guest_fpu);
5876
5877         /*
5878          * Ensure guest xcr0 is valid for loading
5879          */
5880         vcpu->arch.xcr0 = XSTATE_FP;
5881
5882         vcpu->arch.cr0 |= X86_CR0_ET;
5883
5884         return 0;
5885 }
5886 EXPORT_SYMBOL_GPL(fx_init);
5887
5888 static void fx_free(struct kvm_vcpu *vcpu)
5889 {
5890         fpu_free(&vcpu->arch.guest_fpu);
5891 }
5892
5893 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5894 {
5895         if (vcpu->guest_fpu_loaded)
5896                 return;
5897
5898         /*
5899          * Restore all possible states in the guest,
5900          * and assume host would use all available bits.
5901          * Guest xcr0 would be loaded later.
5902          */
5903         kvm_put_guest_xcr0(vcpu);
5904         vcpu->guest_fpu_loaded = 1;
5905         unlazy_fpu(current);
5906         fpu_restore_checking(&vcpu->arch.guest_fpu);
5907         trace_kvm_fpu(1);
5908 }
5909
5910 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5911 {
5912         kvm_put_guest_xcr0(vcpu);
5913
5914         if (!vcpu->guest_fpu_loaded)
5915                 return;
5916
5917         vcpu->guest_fpu_loaded = 0;
5918         fpu_save_init(&vcpu->arch.guest_fpu);
5919         ++vcpu->stat.fpu_reload;
5920         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5921         trace_kvm_fpu(0);
5922 }
5923
5924 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5925 {
5926         kvmclock_reset(vcpu);
5927
5928         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5929         fx_free(vcpu);
5930         kvm_x86_ops->vcpu_free(vcpu);
5931 }
5932
5933 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5934                                                 unsigned int id)
5935 {
5936         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5937                 printk_once(KERN_WARNING
5938                 "kvm: SMP vm created on host with unstable TSC; "
5939                 "guest TSC will not be reliable\n");
5940         return kvm_x86_ops->vcpu_create(kvm, id);
5941 }
5942
5943 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5944 {
5945         int r;
5946
5947         vcpu->arch.mtrr_state.have_fixed = 1;
5948         vcpu_load(vcpu);
5949         r = kvm_arch_vcpu_reset(vcpu);
5950         if (r == 0)
5951                 r = kvm_mmu_setup(vcpu);
5952         vcpu_put(vcpu);
5953
5954         return r;
5955 }
5956
5957 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5958 {
5959         vcpu->arch.apf.msr_val = 0;
5960
5961         vcpu_load(vcpu);
5962         kvm_mmu_unload(vcpu);
5963         vcpu_put(vcpu);
5964
5965         fx_free(vcpu);
5966         kvm_x86_ops->vcpu_free(vcpu);
5967 }
5968
5969 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5970 {
5971         atomic_set(&vcpu->arch.nmi_queued, 0);
5972         vcpu->arch.nmi_pending = 0;
5973         vcpu->arch.nmi_injected = false;
5974
5975         vcpu->arch.switch_db_regs = 0;
5976         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5977         vcpu->arch.dr6 = DR6_FIXED_1;
5978         vcpu->arch.dr7 = DR7_FIXED_1;
5979
5980         kvm_make_request(KVM_REQ_EVENT, vcpu);
5981         vcpu->arch.apf.msr_val = 0;
5982         vcpu->arch.st.msr_val = 0;
5983
5984         kvmclock_reset(vcpu);
5985
5986         kvm_clear_async_pf_completion_queue(vcpu);
5987         kvm_async_pf_hash_reset(vcpu);
5988         vcpu->arch.apf.halted = false;
5989
5990         kvm_pmu_reset(vcpu);
5991
5992         return kvm_x86_ops->vcpu_reset(vcpu);
5993 }
5994
5995 int kvm_arch_hardware_enable(void *garbage)
5996 {
5997         struct kvm *kvm;
5998         struct kvm_vcpu *vcpu;
5999         int i;
6000         int ret;
6001         u64 local_tsc;
6002         u64 max_tsc = 0;
6003         bool stable, backwards_tsc = false;
6004
6005         kvm_shared_msr_cpu_online();
6006         ret = kvm_x86_ops->hardware_enable(garbage);
6007         if (ret != 0)
6008                 return ret;
6009
6010         local_tsc = native_read_tsc();
6011         stable = !check_tsc_unstable();
6012         list_for_each_entry(kvm, &vm_list, vm_list) {
6013                 kvm_for_each_vcpu(i, vcpu, kvm) {
6014                         if (!stable && vcpu->cpu == smp_processor_id())
6015                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6016                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6017                                 backwards_tsc = true;
6018                                 if (vcpu->arch.last_host_tsc > max_tsc)
6019                                         max_tsc = vcpu->arch.last_host_tsc;
6020                         }
6021                 }
6022         }
6023
6024         /*
6025          * Sometimes, even reliable TSCs go backwards.  This happens on
6026          * platforms that reset TSC during suspend or hibernate actions, but
6027          * maintain synchronization.  We must compensate.  Fortunately, we can
6028          * detect that condition here, which happens early in CPU bringup,
6029          * before any KVM threads can be running.  Unfortunately, we can't
6030          * bring the TSCs fully up to date with real time, as we aren't yet far
6031          * enough into CPU bringup that we know how much real time has actually
6032          * elapsed; our helper function, get_kernel_ns() will be using boot
6033          * variables that haven't been updated yet.
6034          *
6035          * So we simply find the maximum observed TSC above, then record the
6036          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6037          * the adjustment will be applied.  Note that we accumulate
6038          * adjustments, in case multiple suspend cycles happen before some VCPU
6039          * gets a chance to run again.  In the event that no KVM threads get a
6040          * chance to run, we will miss the entire elapsed period, as we'll have
6041          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6042          * loose cycle time.  This isn't too big a deal, since the loss will be
6043          * uniform across all VCPUs (not to mention the scenario is extremely
6044          * unlikely). It is possible that a second hibernate recovery happens
6045          * much faster than a first, causing the observed TSC here to be
6046          * smaller; this would require additional padding adjustment, which is
6047          * why we set last_host_tsc to the local tsc observed here.
6048          *
6049          * N.B. - this code below runs only on platforms with reliable TSC,
6050          * as that is the only way backwards_tsc is set above.  Also note
6051          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6052          * have the same delta_cyc adjustment applied if backwards_tsc
6053          * is detected.  Note further, this adjustment is only done once,
6054          * as we reset last_host_tsc on all VCPUs to stop this from being
6055          * called multiple times (one for each physical CPU bringup).
6056          *
6057          * Platforms with unnreliable TSCs don't have to deal with this, they
6058          * will be compensated by the logic in vcpu_load, which sets the TSC to
6059          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6060          * guarantee that they stay in perfect synchronization.
6061          */
6062         if (backwards_tsc) {
6063                 u64 delta_cyc = max_tsc - local_tsc;
6064                 list_for_each_entry(kvm, &vm_list, vm_list) {
6065                         kvm_for_each_vcpu(i, vcpu, kvm) {
6066                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6067                                 vcpu->arch.last_host_tsc = local_tsc;
6068                         }
6069
6070                         /*
6071                          * We have to disable TSC offset matching.. if you were
6072                          * booting a VM while issuing an S4 host suspend....
6073                          * you may have some problem.  Solving this issue is
6074                          * left as an exercise to the reader.
6075                          */
6076                         kvm->arch.last_tsc_nsec = 0;
6077                         kvm->arch.last_tsc_write = 0;
6078                 }
6079
6080         }
6081         return 0;
6082 }
6083
6084 void kvm_arch_hardware_disable(void *garbage)
6085 {
6086         kvm_x86_ops->hardware_disable(garbage);
6087         drop_user_return_notifiers(garbage);
6088 }
6089
6090 int kvm_arch_hardware_setup(void)
6091 {
6092         return kvm_x86_ops->hardware_setup();
6093 }
6094
6095 void kvm_arch_hardware_unsetup(void)
6096 {
6097         kvm_x86_ops->hardware_unsetup();
6098 }
6099
6100 void kvm_arch_check_processor_compat(void *rtn)
6101 {
6102         kvm_x86_ops->check_processor_compatibility(rtn);
6103 }
6104
6105 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6106 {
6107         struct page *page;
6108         struct kvm *kvm;
6109         int r;
6110
6111         BUG_ON(vcpu->kvm == NULL);
6112         kvm = vcpu->kvm;
6113
6114         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6115         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6116                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6117         else
6118                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6119
6120         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6121         if (!page) {
6122                 r = -ENOMEM;
6123                 goto fail;
6124         }
6125         vcpu->arch.pio_data = page_address(page);
6126
6127         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6128
6129         r = kvm_mmu_create(vcpu);
6130         if (r < 0)
6131                 goto fail_free_pio_data;
6132
6133         if (irqchip_in_kernel(kvm)) {
6134                 r = kvm_create_lapic(vcpu);
6135                 if (r < 0)
6136                         goto fail_mmu_destroy;
6137         }
6138
6139         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6140                                        GFP_KERNEL);
6141         if (!vcpu->arch.mce_banks) {
6142                 r = -ENOMEM;
6143                 goto fail_free_lapic;
6144         }
6145         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6146
6147         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6148                 goto fail_free_mce_banks;
6149
6150         kvm_async_pf_hash_reset(vcpu);
6151         kvm_pmu_init(vcpu);
6152
6153         return 0;
6154 fail_free_mce_banks:
6155         kfree(vcpu->arch.mce_banks);
6156 fail_free_lapic:
6157         kvm_free_lapic(vcpu);
6158 fail_mmu_destroy:
6159         kvm_mmu_destroy(vcpu);
6160 fail_free_pio_data:
6161         free_page((unsigned long)vcpu->arch.pio_data);
6162 fail:
6163         return r;
6164 }
6165
6166 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6167 {
6168         int idx;
6169
6170         kvm_pmu_destroy(vcpu);
6171         kfree(vcpu->arch.mce_banks);
6172         kvm_free_lapic(vcpu);
6173         idx = srcu_read_lock(&vcpu->kvm->srcu);
6174         kvm_mmu_destroy(vcpu);
6175         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6176         free_page((unsigned long)vcpu->arch.pio_data);
6177 }
6178
6179 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6180 {
6181         if (type)
6182                 return -EINVAL;
6183
6184         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6185         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6186
6187         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6188         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6189
6190         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6191
6192         return 0;
6193 }
6194
6195 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6196 {
6197         vcpu_load(vcpu);
6198         kvm_mmu_unload(vcpu);
6199         vcpu_put(vcpu);
6200 }
6201
6202 static void kvm_free_vcpus(struct kvm *kvm)
6203 {
6204         unsigned int i;
6205         struct kvm_vcpu *vcpu;
6206
6207         /*
6208          * Unpin any mmu pages first.
6209          */
6210         kvm_for_each_vcpu(i, vcpu, kvm) {
6211                 kvm_clear_async_pf_completion_queue(vcpu);
6212                 kvm_unload_vcpu_mmu(vcpu);
6213         }
6214         kvm_for_each_vcpu(i, vcpu, kvm)
6215                 kvm_arch_vcpu_free(vcpu);
6216
6217         mutex_lock(&kvm->lock);
6218         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6219                 kvm->vcpus[i] = NULL;
6220
6221         atomic_set(&kvm->online_vcpus, 0);
6222         mutex_unlock(&kvm->lock);
6223 }
6224
6225 void kvm_arch_sync_events(struct kvm *kvm)
6226 {
6227         kvm_free_all_assigned_devices(kvm);
6228         kvm_free_pit(kvm);
6229 }
6230
6231 void kvm_arch_destroy_vm(struct kvm *kvm)
6232 {
6233         kvm_iommu_unmap_guest(kvm);
6234         kfree(kvm->arch.vpic);
6235         kfree(kvm->arch.vioapic);
6236         kvm_free_vcpus(kvm);
6237         if (kvm->arch.apic_access_page)
6238                 put_page(kvm->arch.apic_access_page);
6239         if (kvm->arch.ept_identity_pagetable)
6240                 put_page(kvm->arch.ept_identity_pagetable);
6241 }
6242
6243 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6244                                 struct kvm_memory_slot *memslot,
6245                                 struct kvm_memory_slot old,
6246                                 struct kvm_userspace_memory_region *mem,
6247                                 int user_alloc)
6248 {
6249         int npages = memslot->npages;
6250         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6251
6252         /* Prevent internal slot pages from being moved by fork()/COW. */
6253         if (memslot->id >= KVM_MEMORY_SLOTS)
6254                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6255
6256         /*To keep backward compatibility with older userspace,
6257          *x86 needs to hanlde !user_alloc case.
6258          */
6259         if (!user_alloc) {
6260                 if (npages && !old.rmap) {
6261                         unsigned long userspace_addr;
6262
6263                         down_write(&current->mm->mmap_sem);
6264                         userspace_addr = do_mmap(NULL, 0,
6265                                                  npages * PAGE_SIZE,
6266                                                  PROT_READ | PROT_WRITE,
6267                                                  map_flags,
6268                                                  0);
6269                         up_write(&current->mm->mmap_sem);
6270
6271                         if (IS_ERR((void *)userspace_addr))
6272                                 return PTR_ERR((void *)userspace_addr);
6273
6274                         memslot->userspace_addr = userspace_addr;
6275                 }
6276         }
6277
6278
6279         return 0;
6280 }
6281
6282 void kvm_arch_commit_memory_region(struct kvm *kvm,
6283                                 struct kvm_userspace_memory_region *mem,
6284                                 struct kvm_memory_slot old,
6285                                 int user_alloc)
6286 {
6287
6288         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6289
6290         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6291                 int ret;
6292
6293                 down_write(&current->mm->mmap_sem);
6294                 ret = do_munmap(current->mm, old.userspace_addr,
6295                                 old.npages * PAGE_SIZE);
6296                 up_write(&current->mm->mmap_sem);
6297                 if (ret < 0)
6298                         printk(KERN_WARNING
6299                                "kvm_vm_ioctl_set_memory_region: "
6300                                "failed to munmap memory\n");
6301         }
6302
6303         if (!kvm->arch.n_requested_mmu_pages)
6304                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6305
6306         spin_lock(&kvm->mmu_lock);
6307         if (nr_mmu_pages)
6308                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6309         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6310         spin_unlock(&kvm->mmu_lock);
6311 }
6312
6313 void kvm_arch_flush_shadow(struct kvm *kvm)
6314 {
6315         kvm_mmu_zap_all(kvm);
6316         kvm_reload_remote_mmus(kvm);
6317 }
6318
6319 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6320 {
6321         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6322                 !vcpu->arch.apf.halted)
6323                 || !list_empty_careful(&vcpu->async_pf.done)
6324                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6325                 || atomic_read(&vcpu->arch.nmi_queued) ||
6326                 (kvm_arch_interrupt_allowed(vcpu) &&
6327                  kvm_cpu_has_interrupt(vcpu));
6328 }
6329
6330 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6331 {
6332         int me;
6333         int cpu = vcpu->cpu;
6334
6335         if (waitqueue_active(&vcpu->wq)) {
6336                 wake_up_interruptible(&vcpu->wq);
6337                 ++vcpu->stat.halt_wakeup;
6338         }
6339
6340         me = get_cpu();
6341         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6342                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6343                         smp_send_reschedule(cpu);
6344         put_cpu();
6345 }
6346
6347 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6348 {
6349         return kvm_x86_ops->interrupt_allowed(vcpu);
6350 }
6351
6352 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6353 {
6354         unsigned long current_rip = kvm_rip_read(vcpu) +
6355                 get_segment_base(vcpu, VCPU_SREG_CS);
6356
6357         return current_rip == linear_rip;
6358 }
6359 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6360
6361 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6362 {
6363         unsigned long rflags;
6364
6365         rflags = kvm_x86_ops->get_rflags(vcpu);
6366         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6367                 rflags &= ~X86_EFLAGS_TF;
6368         return rflags;
6369 }
6370 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6371
6372 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6373 {
6374         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6375             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6376                 rflags |= X86_EFLAGS_TF;
6377         kvm_x86_ops->set_rflags(vcpu, rflags);
6378         kvm_make_request(KVM_REQ_EVENT, vcpu);
6379 }
6380 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6381
6382 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6383 {
6384         int r;
6385
6386         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6387               is_error_page(work->page))
6388                 return;
6389
6390         r = kvm_mmu_reload(vcpu);
6391         if (unlikely(r))
6392                 return;
6393
6394         if (!vcpu->arch.mmu.direct_map &&
6395               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6396                 return;
6397
6398         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6399 }
6400
6401 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6402 {
6403         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6404 }
6405
6406 static inline u32 kvm_async_pf_next_probe(u32 key)
6407 {
6408         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6409 }
6410
6411 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6412 {
6413         u32 key = kvm_async_pf_hash_fn(gfn);
6414
6415         while (vcpu->arch.apf.gfns[key] != ~0)
6416                 key = kvm_async_pf_next_probe(key);
6417
6418         vcpu->arch.apf.gfns[key] = gfn;
6419 }
6420
6421 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6422 {
6423         int i;
6424         u32 key = kvm_async_pf_hash_fn(gfn);
6425
6426         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6427                      (vcpu->arch.apf.gfns[key] != gfn &&
6428                       vcpu->arch.apf.gfns[key] != ~0); i++)
6429                 key = kvm_async_pf_next_probe(key);
6430
6431         return key;
6432 }
6433
6434 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6435 {
6436         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6437 }
6438
6439 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6440 {
6441         u32 i, j, k;
6442
6443         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6444         while (true) {
6445                 vcpu->arch.apf.gfns[i] = ~0;
6446                 do {
6447                         j = kvm_async_pf_next_probe(j);
6448                         if (vcpu->arch.apf.gfns[j] == ~0)
6449                                 return;
6450                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6451                         /*
6452                          * k lies cyclically in ]i,j]
6453                          * |    i.k.j |
6454                          * |....j i.k.| or  |.k..j i...|
6455                          */
6456                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6457                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6458                 i = j;
6459         }
6460 }
6461
6462 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6463 {
6464
6465         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6466                                       sizeof(val));
6467 }
6468
6469 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6470                                      struct kvm_async_pf *work)
6471 {
6472         struct x86_exception fault;
6473
6474         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6475         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6476
6477         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6478             (vcpu->arch.apf.send_user_only &&
6479              kvm_x86_ops->get_cpl(vcpu) == 0))
6480                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6481         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6482                 fault.vector = PF_VECTOR;
6483                 fault.error_code_valid = true;
6484                 fault.error_code = 0;
6485                 fault.nested_page_fault = false;
6486                 fault.address = work->arch.token;
6487                 kvm_inject_page_fault(vcpu, &fault);
6488         }
6489 }
6490
6491 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6492                                  struct kvm_async_pf *work)
6493 {
6494         struct x86_exception fault;
6495
6496         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6497         if (is_error_page(work->page))
6498                 work->arch.token = ~0; /* broadcast wakeup */
6499         else
6500                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6501
6502         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6503             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6504                 fault.vector = PF_VECTOR;
6505                 fault.error_code_valid = true;
6506                 fault.error_code = 0;
6507                 fault.nested_page_fault = false;
6508                 fault.address = work->arch.token;
6509                 kvm_inject_page_fault(vcpu, &fault);
6510         }
6511         vcpu->arch.apf.halted = false;
6512 }
6513
6514 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6515 {
6516         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6517                 return true;
6518         else
6519                 return !kvm_event_needs_reinjection(vcpu) &&
6520                         kvm_x86_ops->interrupt_allowed(vcpu);
6521 }
6522
6523 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6524 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6525 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6526 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6527 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6528 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6529 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6530 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6531 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6532 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6533 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6534 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);