2 * Intel SMP support routines.
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998-99, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * (c) 2002,2003 Andi Kleen, SuSE Labs.
8 * i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com>
10 * This code is released under the GNU General Public License version 2 or
14 #include <linux/init.h>
17 #include <linux/delay.h>
18 #include <linux/spinlock.h>
19 #include <linux/kernel_stat.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/cache.h>
22 #include <linux/interrupt.h>
23 #include <linux/cpu.h>
24 #include <linux/gfp.h>
27 #include <asm/tlbflush.h>
28 #include <asm/mmu_context.h>
29 #include <asm/proto.h>
31 #include <xen/evtchn.h>
33 static unsigned int __read_mostly reboot = NR_CPUS;
36 * Some notes on x86 processor bugs affecting SMP operation:
38 * Pentium, Pentium Pro, II, III (and all CPUs) have bugs.
39 * The Linux implications for SMP are handled as follows:
41 * Pentium III / [Xeon]
42 * None of the E1AP-E3AP errata are visible to the user.
49 * None of the A1AP-A3AP errata are visible to the user.
56 * None of 1AP-9AP errata are visible to the normal user,
57 * except occasional delivery of 'spurious interrupt' as trap #15.
58 * This is very rare and a non-problem.
60 * 1AP. Linux maps APIC as non-cacheable
61 * 2AP. worked around in hardware
62 * 3AP. fixed in C0 and above steppings microcode update.
63 * Linux does not use excessive STARTUP_IPIs.
64 * 4AP. worked around in hardware
65 * 5AP. symmetric IO mode (normal Linux operation) not affected.
66 * 'noapic' mode has vector 0xf filled out properly.
67 * 6AP. 'noapic' mode might be affected - fixed in later steppings
68 * 7AP. We do not assume writes to the LVT deassering IRQs
69 * 8AP. We do not enable low power mode (deep sleep) during MP bootup
70 * 9AP. We do not use mixed mode
73 * There is a marginal case where REP MOVS on 100MHz SMP
74 * machines with B stepping processors can fail. XXX should provide
75 * an L1cache=Writethrough or L1cache=off option.
77 * B stepping CPUs may hang. There are hardware work arounds
78 * for this. We warn about it in case your board doesn't have the work
79 * arounds. Basically that's so I can tell anyone with a B stepping
80 * CPU and SMP problems "tough".
82 * Specific items [From Pentium Processor Specification Update]
84 * 1AP. Linux doesn't use remote read
85 * 2AP. Linux doesn't trust APIC errors
86 * 3AP. We work around this
87 * 4AP. Linux never generated 3 interrupts of the same priority
88 * to cause a lost local interrupt.
89 * 5AP. Remote read is never used
90 * 6AP. not affected - worked around in hardware
91 * 7AP. not affected - worked around in hardware
92 * 8AP. worked around in hardware - we get explicit CS errors if not
93 * 9AP. only 'noapic' mode affected. Might generate spurious
94 * interrupts, we log only the first one and count the
96 * 10AP. not affected - worked around in hardware
97 * 11AP. Linux reads the APIC between writes to avoid this, as per
98 * the documentation. Make sure you preserve this as it affects
99 * the C stepping chips too.
100 * 12AP. not affected - worked around in hardware
101 * 13AP. not affected - worked around in hardware
102 * 14AP. we always deassert INIT during bootup
103 * 15AP. not affected - worked around in hardware
104 * 16AP. not affected - worked around in hardware
105 * 17AP. not affected - worked around in hardware
106 * 18AP. not affected - worked around in hardware
107 * 19AP. not affected - worked around in BIOS
109 * If this sounds worrying believe me these bugs are either ___RARE___,
110 * or are signal timing bugs worked around in hardware and there's
111 * about nothing of note with C stepping upwards.
115 * this function sends a 'reschedule' IPI to another CPU.
116 * it goes straight through and wastes no time serializing
117 * anything. Worst case is that we lose a reschedule ...
119 void xen_smp_send_reschedule(int cpu)
121 if (unlikely(cpu_is_offline(cpu))) {
125 xen_send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR);
128 void xen_send_call_func_single_ipi(int cpu)
130 xen_send_IPI_mask(cpumask_of(cpu), CALL_FUNC_SINGLE_VECTOR);
133 void xen_send_call_func_ipi(const struct cpumask *mask)
135 xen_send_IPI_mask_allbutself(mask, CALL_FUNCTION_VECTOR);
138 void xen_smp_send_stop(void)
144 * Use an own vector here because smp_call_function
145 * does lots of things not suitable in a panic situation.
146 * On most systems we could also use an NMI here,
147 * but there are a few systems around where NMI
148 * is problematic so stay with an non NMI for now
149 * (this implies we cannot stop CPUs spinning with irq off
152 reboot = raw_smp_processor_id();
154 if (num_online_cpus() > 1) {
155 xen_send_IPI_allbutself(RESCHEDULE_VECTOR);
157 /* Don't wait longer than a second */
159 while (num_online_cpus() > 1 && wait--)
163 local_irq_save(flags);
164 disable_all_local_evtchn();
165 local_irq_restore(flags);
169 * Reschedule call back. Nothing to do,
170 * all the work is done automatically when
171 * we return from the interrupt.
173 irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id)
175 if (likely(reboot >= NR_CPUS) || reboot == raw_smp_processor_id())
176 inc_irq_stat(irq_resched_count);
185 irqreturn_t smp_call_function_interrupt(int irq, void *dev_id)
188 generic_smp_call_function_interrupt();
189 inc_irq_stat(irq_call_count);
195 irqreturn_t smp_call_function_single_interrupt(int irq, void *dev_id)
198 generic_smp_call_function_single_interrupt();
199 inc_irq_stat(irq_call_count);