2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/kthread.h>
22 #include <linux/printk.h>
23 #include <linux/pci_ids.h>
24 #include <linux/netdevice.h>
25 #include <linux/interrupt.h>
26 #include <linux/sched.h>
27 #include <linux/mmc/sdio.h>
28 #include <linux/mmc/sdio_func.h>
29 #include <linux/mmc/card.h>
30 #include <linux/semaphore.h>
31 #include <linux/firmware.h>
32 #include <linux/module.h>
33 #include <linux/bcma/bcma.h>
34 #include <asm/unaligned.h>
36 #include <brcmu_wifi.h>
37 #include <brcmu_utils.h>
38 #include <brcm_hw_ids.h>
40 #include "sdio_host.h"
41 #include "sdio_chip.h"
43 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
47 #define BRCMF_TRAP_INFO_SIZE 80
49 #define CBUF_LEN (128)
52 __le32 buf; /* Can't be pointer on (64-bit) hosts */
55 char *_buf_compat; /* Redundant pointer for backward compat. */
60 * When there is no UART (e.g. Quickturn),
61 * the host should write a complete
62 * input line directly into cbuf and then write
63 * the length into vcons_in.
64 * This may also be used when there is a real UART
65 * (at risk of conflicting with
66 * the real UART). vcons_out is currently unused.
71 /* Output (logging) buffer
72 * Console output is written to a ring buffer log_buf at index log_idx.
73 * The host may read the output when it sees log_idx advance.
74 * Output will be lost if the output wraps around faster than the host
77 struct rte_log_le log_le;
79 /* Console input line buffer
80 * Characters are read one at a time into cbuf
81 * until <CR> is received, then
82 * the buffer is processed as a command line.
83 * Also used for virtual UART.
90 #include <chipcommon.h>
95 #define TXQLEN 2048 /* bulk tx queue length */
96 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
97 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
100 #define TXRETRIES 2 /* # of retries for tx frames */
102 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
105 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
108 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
110 #define MEMBLOCK 2048 /* Block size used for downloading
112 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
113 biggest possible glom */
115 #define BRCMF_FIRSTREAD (1 << 6)
118 /* SBSDIO_DEVICE_CTL */
120 /* 1: device will assert busy signal when receiving CMD53 */
121 #define SBSDIO_DEVCTL_SETBUSY 0x01
122 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
123 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
124 /* 1: mask all interrupts to host except the chipActive (rev 8) */
125 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
126 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
127 * sdio bus power cycle to clear (rev 9) */
128 #define SBSDIO_DEVCTL_PADS_ISO 0x08
129 /* Force SD->SB reset mapping (rev 11) */
130 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
131 /* Determined by CoreControl bit */
132 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
133 /* Force backplane reset */
134 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
135 /* Force no backplane reset */
136 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
138 /* direct(mapped) cis space */
140 /* MAPPED common CIS address */
141 #define SBSDIO_CIS_BASE_COMMON 0x1000
142 /* maximum bytes in one CIS */
143 #define SBSDIO_CIS_SIZE_LIMIT 0x200
144 /* cis offset addr is < 17 bits */
145 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
147 /* manfid tuple length, include tuple, link bytes */
148 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
151 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
152 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
153 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
154 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
155 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
156 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
157 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
158 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
159 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
160 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
161 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
162 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
163 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
164 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
165 #define I_PC (1 << 10) /* descriptor error */
166 #define I_PD (1 << 11) /* data error */
167 #define I_DE (1 << 12) /* Descriptor protocol Error */
168 #define I_RU (1 << 13) /* Receive descriptor Underflow */
169 #define I_RO (1 << 14) /* Receive fifo Overflow */
170 #define I_XU (1 << 15) /* Transmit fifo Underflow */
171 #define I_RI (1 << 16) /* Receive Interrupt */
172 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
173 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
174 #define I_XI (1 << 24) /* Transmit Interrupt */
175 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
176 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
177 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
178 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
179 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
180 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
181 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
182 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
183 #define I_DMA (I_RI | I_XI | I_ERRORS)
186 #define CC_CISRDY (1 << 0) /* CIS Ready */
187 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
188 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
189 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
190 #define CC_XMTDATAAVAIL_MODE (1 << 4)
191 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
194 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
195 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
196 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
197 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
200 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
202 /* Total length of frame header for dongle protocol */
203 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
204 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
207 * Software allocation of To SB Mailbox resources
210 /* tosbmailbox bits corresponding to intstatus bits */
211 #define SMB_NAK (1 << 0) /* Frame NAK */
212 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
213 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
214 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
216 /* tosbmailboxdata */
217 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
220 * Software allocation of To Host Mailbox resources
224 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
225 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
226 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
227 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
229 /* tohostmailboxdata */
230 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
231 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
232 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
233 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
235 #define HMB_DATA_FCDATA_MASK 0xff000000
236 #define HMB_DATA_FCDATA_SHIFT 24
238 #define HMB_DATA_VERSION_MASK 0x00ff0000
239 #define HMB_DATA_VERSION_SHIFT 16
242 * Software-defined protocol header
245 /* Current protocol version */
246 #define SDPCM_PROT_VERSION 4
248 /* SW frame header */
249 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
251 #define SDPCM_CHANNEL_MASK 0x00000f00
252 #define SDPCM_CHANNEL_SHIFT 8
253 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
255 #define SDPCM_NEXTLEN_OFFSET 2
257 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
258 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
259 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
260 #define SDPCM_DOFFSET_MASK 0xff000000
261 #define SDPCM_DOFFSET_SHIFT 24
262 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
263 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
264 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
265 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
267 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
269 /* logical channel numbers */
270 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
271 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
272 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
273 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
274 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
276 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
278 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
281 * Shared structure between dongle and the host.
282 * The structure contains pointers to trap or assert information.
284 #define SDPCM_SHARED_VERSION 0x0002
285 #define SDPCM_SHARED_VERSION_MASK 0x00FF
286 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
287 #define SDPCM_SHARED_ASSERT 0x0200
288 #define SDPCM_SHARED_TRAP 0x0400
290 /* Space for header read, limit for data packets */
291 #define MAX_HDR_READ (1 << 6)
292 #define MAX_RX_DATASZ 2048
294 /* Maximum milliseconds to wait for F2 to come up */
295 #define BRCMF_WAIT_F2RDY 3000
297 /* Bump up limit on waiting for HT to account for first startup;
298 * if the image is doing a CRC calculation before programming the PMU
299 * for HT availability, it could take a couple hundred ms more, so
300 * max out at a 1 second (1000000us).
302 #undef PMU_MAX_TRANSITION_DLY
303 #define PMU_MAX_TRANSITION_DLY 1000000
305 /* Value for ChipClockCSR during initial setup */
306 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
307 SBSDIO_ALP_AVAIL_REQ)
309 /* Flags for SDH calls */
310 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
312 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
313 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
314 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME);
315 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME);
317 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
318 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
321 #define BRCMF_IDLE_INTERVAL 1
324 * Conversion of 802.1D priority to precedence level
326 static uint prio2prec(u32 prio)
328 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
334 u32 corecontrol; /* 0x00, rev8 */
335 u32 corestatus; /* rev8 */
337 u32 biststatus; /* rev8 */
340 u16 pcmciamesportaladdr; /* 0x010, rev8 */
342 u16 pcmciamesportalmask; /* rev8 */
344 u16 pcmciawrframebc; /* rev8 */
346 u16 pcmciaunderflowtimer; /* rev8 */
350 u32 intstatus; /* 0x020, rev8 */
351 u32 hostintmask; /* rev8 */
352 u32 intmask; /* rev8 */
353 u32 sbintstatus; /* rev8 */
354 u32 sbintmask; /* rev8 */
355 u32 funcintmask; /* rev4 */
357 u32 tosbmailbox; /* 0x040, rev8 */
358 u32 tohostmailbox; /* rev8 */
359 u32 tosbmailboxdata; /* rev8 */
360 u32 tohostmailboxdata; /* rev8 */
362 /* synchronized access to registers in SDIO clock domain */
363 u32 sdioaccess; /* 0x050, rev8 */
366 /* PCMCIA frame control */
367 u8 pcmciaframectrl; /* 0x060, rev8 */
369 u8 pcmciawatermark; /* rev8 */
372 /* interrupt batching control */
373 u32 intrcvlazy; /* 0x100, rev8 */
377 u32 cmd52rd; /* 0x110, rev8 */
378 u32 cmd52wr; /* rev8 */
379 u32 cmd53rd; /* rev8 */
380 u32 cmd53wr; /* rev8 */
381 u32 abort; /* rev8 */
382 u32 datacrcerror; /* rev8 */
383 u32 rdoutofsync; /* rev8 */
384 u32 wroutofsync; /* rev8 */
385 u32 writebusy; /* rev8 */
386 u32 readwait; /* rev8 */
387 u32 readterm; /* rev8 */
388 u32 writeterm; /* rev8 */
390 u32 clockctlstatus; /* rev8 */
393 u32 PAD[128]; /* DMA engines */
395 /* SDIO/PCMCIA CIS region */
396 char cis[512]; /* 0x400-0x5ff, rev6 */
398 /* PCMCIA function control registers */
399 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
402 /* PCMCIA backplane access */
403 u16 backplanecsr; /* 0x76E, rev6 */
404 u16 backplaneaddr0; /* rev6 */
405 u16 backplaneaddr1; /* rev6 */
406 u16 backplaneaddr2; /* rev6 */
407 u16 backplaneaddr3; /* rev6 */
408 u16 backplanedata0; /* rev6 */
409 u16 backplanedata1; /* rev6 */
410 u16 backplanedata2; /* rev6 */
411 u16 backplanedata3; /* rev6 */
414 /* sprom "size" & "blank" info */
415 u16 spromstatus; /* 0x7BE, rev2 */
422 /* Device console log buffer state */
423 struct brcmf_console {
424 uint count; /* Poll interval msec counter */
425 uint log_addr; /* Log struct address (fixed) */
426 struct rte_log_le log_le; /* Log struct (host copy) */
427 uint bufsize; /* Size of log buffer */
428 u8 *buf; /* Log buffer (host copy) */
429 uint last; /* Last buffer read index */
433 struct sdpcm_shared {
437 u32 assert_file_addr;
439 u32 console_addr; /* Address of struct rte_console */
444 struct sdpcm_shared_le {
447 __le32 assert_exp_addr;
448 __le32 assert_file_addr;
450 __le32 console_addr; /* Address of struct rte_console */
451 __le32 msgtrace_addr;
456 /* misc chip info needed by some of the routines */
457 /* Private data for SDIO bus interaction */
459 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
460 struct chip_info *ci; /* Chip info struct */
461 char *vars; /* Variables (from CIS and/or other) */
462 uint varsz; /* Size of variables buffer */
464 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
466 u32 hostintmask; /* Copy of Host Interrupt Mask */
467 u32 intstatus; /* Intstatus bits (events) pending */
468 bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
469 bool fcstate; /* State of dongle flow-control */
471 uint blocksize; /* Block size of SDIO transfers */
472 uint roundup; /* Max roundup limit */
474 struct pktq txq; /* Queue length used for flow-control */
475 u8 flowcontrol; /* per prio flow control bitmask */
476 u8 tx_seq; /* Transmit sequence number (next) */
477 u8 tx_max; /* Maximum transmit sequence allowed */
479 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
480 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
481 u16 nextlen; /* Next Read Len from last header */
482 u8 rx_seq; /* Receive sequence number (expected) */
483 bool rxskip; /* Skip receive (awaiting NAK ACK) */
485 uint rxbound; /* Rx frames to read before resched */
486 uint txbound; /* Tx frames to send before resched */
489 struct sk_buff *glomd; /* Packet containing glomming descriptor */
490 struct sk_buff_head glom; /* Packet list for glommed superframe */
491 uint glomerr; /* Glom packet read errors */
493 u8 *rxbuf; /* Buffer for receiving control packets */
494 uint rxblen; /* Allocated length of rxbuf */
495 u8 *rxctl; /* Aligned pointer into rxbuf */
496 u8 *databuf; /* Buffer for receiving big glom packet */
497 u8 *dataptr; /* Aligned pointer into databuf */
498 uint rxlen; /* Length of valid data in buffer */
500 u8 sdpcm_ver; /* Bus protocol reported by dongle */
502 bool intr; /* Use interrupts */
503 bool poll; /* Use polling */
504 bool ipend; /* Device interrupt is pending */
505 uint intrcount; /* Count of device interrupt callbacks */
506 uint lastintrs; /* Count as of last watchdog timer */
507 uint spurious; /* Count of spurious interrupts */
508 uint pollrate; /* Ticks between device polls */
509 uint polltick; /* Tick counter */
510 uint pollcnt; /* Count of active polls */
513 uint console_interval;
514 struct brcmf_console console; /* Console output polling support */
515 uint console_addr; /* Console address from shared struct */
518 uint regfails; /* Count of R_REG failures */
520 uint clkstate; /* State of sd and backplane clock(s) */
521 bool activity; /* Activity flag for clock down */
522 s32 idletime; /* Control for activity timeout */
523 s32 idlecount; /* Activity timeout counter */
524 s32 idleclock; /* How to set bus driver when idle */
526 bool use_rxchain; /* If brcmf should use PKT chains */
527 bool sleeping; /* Is SDIO bus sleeping? */
528 bool rxflow_mode; /* Rx flow control mode */
529 bool rxflow; /* Is rx flow control on */
530 bool alp_only; /* Don't use HT clock (ALP only) */
531 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
534 /* Some additional counters */
535 uint tx_sderrs; /* Count of tx attempts with sd errors */
536 uint fcqueued; /* Tx packets that got queued */
537 uint rxrtx; /* Count of rtx requests (NAK to dongle) */
538 uint rx_toolong; /* Receive frames too long to receive */
539 uint rxc_errors; /* SDIO errors when reading control frames */
540 uint rx_hdrfail; /* SDIO errors on header reads */
541 uint rx_badhdr; /* Bad received headers (roosync?) */
542 uint rx_badseq; /* Mismatched rx sequence number */
543 uint fc_rcvd; /* Number of flow-control events received */
544 uint fc_xoff; /* Number which turned on flow-control */
545 uint fc_xon; /* Number which turned off flow-control */
546 uint rxglomfail; /* Failed deglom attempts */
547 uint rxglomframes; /* Number of glom frames (superframes) */
548 uint rxglompkts; /* Number of packets from glom frames */
549 uint f2rxhdrs; /* Number of header reads */
550 uint f2rxdata; /* Number of frame data reads */
551 uint f2txdata; /* Number of f2 frame writes */
552 uint f1regdata; /* Number of f1 register accesses */
553 uint tickcnt; /* Number of watchdog been schedule */
554 unsigned long tx_ctlerrs; /* Err of sending ctrl frames */
555 unsigned long tx_ctlpkts; /* Ctrl frames sent to dongle */
556 unsigned long rx_ctlerrs; /* Err of processing rx ctrl frames */
557 unsigned long rx_ctlpkts; /* Ctrl frames processed from dongle */
558 unsigned long rx_readahead_cnt; /* Number of packets where header
559 * read-ahead was used. */
563 bool ctrl_frame_stat;
566 wait_queue_head_t ctrl_wait;
567 wait_queue_head_t dcmd_resp_wait;
569 struct timer_list timer;
570 struct completion watchdog_wait;
571 struct task_struct *watchdog_tsk;
575 struct task_struct *dpc_tsk;
576 struct completion dpc_wait;
577 struct list_head dpc_tsklst;
578 spinlock_t dpc_tl_lock;
580 struct semaphore sdsem;
582 const struct firmware *firmware;
585 bool txoff; /* Transmit flow-controlled */
591 #define CLK_PENDING 2 /* Not used yet */
595 static int qcount[NUMPRIO];
596 static int tx_packets[NUMPRIO];
599 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
601 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
603 /* Retry count for register access failures */
604 static const uint retry_limit = 2;
606 /* Limit on rounding up frames */
607 static const uint max_roundup = 512;
611 static void pkt_align(struct sk_buff *p, int len, int align)
614 datalign = (unsigned long)(p->data);
615 datalign = roundup(datalign, (align)) - datalign;
617 skb_pull(p, datalign);
621 /* To check if there's window offered */
622 static bool data_ok(struct brcmf_sdio *bus)
624 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
625 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
629 * Reads a register in the SDIO hardware block. This block occupies a series of
630 * adresses on the 32 bit backplane bus.
633 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
635 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
638 *regvar = brcmf_sdcard_reg_read(bus->sdiodev,
639 bus->ci->c_inf[idx].base + reg_offset,
641 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
642 (++(*retryvar) <= retry_limit));
644 bus->regfails += (*retryvar-1);
645 if (*retryvar > retry_limit) {
646 brcmf_dbg(ERROR, "FAILED READ %Xh\n", reg_offset);
653 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset, u32 *retryvar)
655 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
658 brcmf_sdcard_reg_write(bus->sdiodev,
659 bus->ci->c_inf[idx].base + reg_offset,
660 sizeof(u32), regval);
661 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
662 (++(*retryvar) <= retry_limit));
664 bus->regfails += (*retryvar-1);
665 if (*retryvar > retry_limit)
666 brcmf_dbg(ERROR, "FAILED REGISTER WRITE %Xh\n",
671 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
673 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
675 /* Packet free applicable unconditionally for sdio and sdspi.
676 * Conditional if bufpool was present for gspi bus.
678 static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt)
681 brcmu_pkt_buf_free_skb(pkt);
684 /* Turn backplane clock on or off */
685 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
688 u8 clkctl, clkreq, devctl;
689 unsigned long timeout;
691 brcmf_dbg(TRACE, "Enter\n");
696 /* Request HT Avail */
698 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
700 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
701 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
703 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
707 /* Check current status */
708 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
709 SBSDIO_FUNC1_CHIPCLKCSR, &err);
711 brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
715 /* Go to pending and await interrupt if appropriate */
716 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
717 /* Allow only clock-available interrupt */
718 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
720 SBSDIO_DEVICE_CTL, &err);
722 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
727 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
728 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
729 SBSDIO_DEVICE_CTL, devctl, &err);
730 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
731 bus->clkstate = CLK_PENDING;
734 } else if (bus->clkstate == CLK_PENDING) {
735 /* Cancel CA-only interrupt filter */
737 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
738 SBSDIO_DEVICE_CTL, &err);
739 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
740 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
741 SBSDIO_DEVICE_CTL, devctl, &err);
744 /* Otherwise, wait here (polling) for HT Avail */
746 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
747 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
748 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev,
750 SBSDIO_FUNC1_CHIPCLKCSR,
752 if (time_after(jiffies, timeout))
755 usleep_range(5000, 10000);
758 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
761 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
762 brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
763 PMU_MAX_TRANSITION_DLY, clkctl);
767 /* Mark clock available */
768 bus->clkstate = CLK_AVAIL;
769 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
772 if (!bus->alp_only) {
773 if (SBSDIO_ALPONLY(clkctl))
774 brcmf_dbg(ERROR, "HT Clock should be on\n");
776 #endif /* defined (DEBUG) */
778 bus->activity = true;
782 if (bus->clkstate == CLK_PENDING) {
783 /* Cancel CA-only interrupt filter */
784 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
786 SBSDIO_DEVICE_CTL, &err);
787 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
788 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
789 SBSDIO_DEVICE_CTL, devctl, &err);
792 bus->clkstate = CLK_SDONLY;
793 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
794 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
795 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
797 brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
805 /* Change idle/active SD state */
806 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
808 brcmf_dbg(TRACE, "Enter\n");
811 bus->clkstate = CLK_SDONLY;
813 bus->clkstate = CLK_NONE;
818 /* Transition SD and backplane clock readiness */
819 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
822 uint oldstate = bus->clkstate;
825 brcmf_dbg(TRACE, "Enter\n");
827 /* Early exit if we're already there */
828 if (bus->clkstate == target) {
829 if (target == CLK_AVAIL) {
830 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
831 bus->activity = true;
838 /* Make sure SD clock is available */
839 if (bus->clkstate == CLK_NONE)
840 brcmf_sdbrcm_sdclk(bus, true);
841 /* Now request HT Avail on the backplane */
842 brcmf_sdbrcm_htclk(bus, true, pendok);
843 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
844 bus->activity = true;
848 /* Remove HT request, or bring up SD clock */
849 if (bus->clkstate == CLK_NONE)
850 brcmf_sdbrcm_sdclk(bus, true);
851 else if (bus->clkstate == CLK_AVAIL)
852 brcmf_sdbrcm_htclk(bus, false, false);
854 brcmf_dbg(ERROR, "request for %d -> %d\n",
855 bus->clkstate, target);
856 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
860 /* Make sure to remove HT request */
861 if (bus->clkstate == CLK_AVAIL)
862 brcmf_sdbrcm_htclk(bus, false, false);
863 /* Now remove the SD clock */
864 brcmf_sdbrcm_sdclk(bus, false);
865 brcmf_sdbrcm_wd_timer(bus, 0);
869 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
875 static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep)
879 brcmf_dbg(INFO, "request %s (currently %s)\n",
880 sleep ? "SLEEP" : "WAKE",
881 bus->sleeping ? "SLEEP" : "WAKE");
883 /* Done if we're already in the requested state */
884 if (sleep == bus->sleeping)
887 /* Going to sleep: set the alarm and turn off the lights... */
889 /* Don't sleep if something is pending */
890 if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
893 /* Make sure the controller has the bus up */
894 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
896 /* Tell device to start using OOB wakeup */
897 w_sdreg32(bus, SMB_USE_OOB,
898 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
899 if (retries > retry_limit)
900 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n");
902 /* Turn off our contribution to the HT clock request */
903 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
905 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
906 SBSDIO_FUNC1_CHIPCLKCSR,
907 SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
909 /* Isolate the bus */
910 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
912 SBSDIO_DEVCTL_PADS_ISO, NULL);
915 bus->sleeping = true;
918 /* Waking up: bus power up is ok, set local state */
920 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
921 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
923 /* Make sure the controller has the bus up */
924 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
926 /* Send misc interrupt to indicate OOB not needed */
927 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
929 if (retries <= retry_limit)
930 w_sdreg32(bus, SMB_DEV_INT,
931 offsetof(struct sdpcmd_regs, tosbmailbox),
934 if (retries > retry_limit)
935 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n");
937 /* Make sure we have SD bus access */
938 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
941 bus->sleeping = false;
947 static void bus_wake(struct brcmf_sdio *bus)
950 brcmf_sdbrcm_bussleep(bus, false);
953 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
960 brcmf_dbg(TRACE, "Enter\n");
962 /* Read mailbox data and ack that we did so */
963 r_sdreg32(bus, &hmb_data,
964 offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
966 if (retries <= retry_limit)
967 w_sdreg32(bus, SMB_INT_ACK,
968 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
971 /* Dongle recomposed rx frames, accept them again */
972 if (hmb_data & HMB_DATA_NAKHANDLED) {
973 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
976 brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
979 intstatus |= I_HMB_FRAME_IND;
983 * DEVREADY does not occur with gSPI.
985 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
987 (hmb_data & HMB_DATA_VERSION_MASK) >>
988 HMB_DATA_VERSION_SHIFT;
989 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
990 brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
992 bus->sdpcm_ver, SDPCM_PROT_VERSION);
994 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
999 * Flow Control has been moved into the RX headers and this out of band
1000 * method isn't used any more.
1001 * remaining backward compatible with older dongles.
1003 if (hmb_data & HMB_DATA_FC) {
1004 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1005 HMB_DATA_FCDATA_SHIFT;
1007 if (fcbits & ~bus->flowcontrol)
1010 if (bus->flowcontrol & ~fcbits)
1014 bus->flowcontrol = fcbits;
1017 /* Shouldn't be any others */
1018 if (hmb_data & ~(HMB_DATA_DEVREADY |
1019 HMB_DATA_NAKHANDLED |
1022 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1023 brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
1029 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1036 brcmf_dbg(ERROR, "%sterminate frame%s\n",
1037 abort ? "abort command, " : "",
1038 rtx ? ", send NAK" : "");
1041 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1043 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1044 SBSDIO_FUNC1_FRAMECTRL,
1048 /* Wait until the packet has been flushed (device/FIFO stable) */
1049 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1050 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1051 SBSDIO_FUNC1_RFRAMEBCHI, NULL);
1052 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1053 SBSDIO_FUNC1_RFRAMEBCLO, NULL);
1054 bus->f1regdata += 2;
1056 if ((hi == 0) && (lo == 0))
1059 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1060 brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
1061 lastrbc, (hi << 8) + lo);
1063 lastrbc = (hi << 8) + lo;
1067 brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
1069 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
1073 w_sdreg32(bus, SMB_NAK,
1074 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
1077 if (retries <= retry_limit)
1081 /* Clear partial in any case */
1084 /* If we can't reach the device, signal failure */
1085 if (err || brcmf_sdcard_regfail(bus->sdiodev))
1086 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1089 /* copy a buffer into a pkt buffer chain */
1090 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1099 skb_queue_walk(&bus->glom, p) {
1100 n = min_t(uint, p->len, len);
1101 memcpy(p->data, buf, n);
1112 /* return total length of buffer chain */
1113 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1119 skb_queue_walk(&bus->glom, p)
1124 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1126 struct sk_buff *cur, *next;
1128 skb_queue_walk_safe(&bus->glom, cur, next) {
1129 skb_unlink(cur, &bus->glom);
1130 brcmu_pkt_buf_free_skb(cur);
1134 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1140 struct sk_buff *pfirst, *pnext;
1143 u8 chan, seq, doff, sfdoff;
1147 bool usechain = bus->use_rxchain;
1149 /* If packets, issue read(s) and send up packet chain */
1150 /* Return sequence numbers consumed? */
1152 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1153 bus->glomd, skb_peek(&bus->glom));
1155 /* If there's a descriptor, generate the packet chain */
1157 pfirst = pnext = NULL;
1158 dlen = (u16) (bus->glomd->len);
1159 dptr = bus->glomd->data;
1160 if (!dlen || (dlen & 1)) {
1161 brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
1166 for (totlen = num = 0; dlen; num++) {
1167 /* Get (and move past) next length */
1168 sublen = get_unaligned_le16(dptr);
1169 dlen -= sizeof(u16);
1170 dptr += sizeof(u16);
1171 if ((sublen < SDPCM_HDRLEN) ||
1172 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1173 brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
1178 if (sublen % BRCMF_SDALIGN) {
1179 brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
1180 sublen, BRCMF_SDALIGN);
1185 /* For last frame, adjust read len so total
1186 is a block multiple */
1189 (roundup(totlen, bus->blocksize) - totlen);
1190 totlen = roundup(totlen, bus->blocksize);
1193 /* Allocate/chain packet for next subframe */
1194 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1195 if (pnext == NULL) {
1196 brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1200 skb_queue_tail(&bus->glom, pnext);
1202 /* Adhere to start alignment requirements */
1203 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1206 /* If all allocations succeeded, save packet chain
1209 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1211 if (BRCMF_GLOM_ON() && bus->nextlen &&
1212 totlen != bus->nextlen) {
1213 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1214 bus->nextlen, totlen, rxseq);
1216 pfirst = pnext = NULL;
1218 brcmf_sdbrcm_free_glom(bus);
1222 /* Done with descriptor packet */
1223 brcmu_pkt_buf_free_skb(bus->glomd);
1228 /* Ok -- either we just generated a packet chain,
1229 or had one from before */
1230 if (!skb_queue_empty(&bus->glom)) {
1231 if (BRCMF_GLOM_ON()) {
1232 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1233 skb_queue_walk(&bus->glom, pnext) {
1234 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1235 pnext, (u8 *) (pnext->data),
1236 pnext->len, pnext->len);
1240 pfirst = skb_peek(&bus->glom);
1241 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1243 /* Do an SDIO read for the superframe. Configurable iovar to
1244 * read directly into the chained packet, or allocate a large
1245 * packet and and copy into the chain.
1248 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1249 bus->sdiodev->sbwad,
1250 SDIO_FUNC_2, F2SYNC, &bus->glom);
1251 } else if (bus->dataptr) {
1252 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1253 bus->sdiodev->sbwad,
1254 SDIO_FUNC_2, F2SYNC,
1255 bus->dataptr, dlen);
1256 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1257 if (sublen != dlen) {
1258 brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
1264 brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1270 /* On failure, kill the superframe, allow a couple retries */
1272 brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
1274 bus->sdiodev->bus_if->dstats.rx_errors++;
1276 if (bus->glomerr++ < 3) {
1277 brcmf_sdbrcm_rxfail(bus, true, true);
1280 brcmf_sdbrcm_rxfail(bus, true, false);
1282 brcmf_sdbrcm_free_glom(bus);
1287 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1288 pfirst->data, min_t(int, pfirst->len, 48),
1291 /* Validate the superframe header */
1292 dptr = (u8 *) (pfirst->data);
1293 sublen = get_unaligned_le16(dptr);
1294 check = get_unaligned_le16(dptr + sizeof(u16));
1296 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1297 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1298 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1299 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1300 brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n",
1304 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1305 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1308 if ((u16)~(sublen ^ check)) {
1309 brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1312 } else if (roundup(sublen, bus->blocksize) != dlen) {
1313 brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1314 sublen, roundup(sublen, bus->blocksize),
1317 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
1318 SDPCM_GLOM_CHANNEL) {
1319 brcmf_dbg(ERROR, "(superframe): bad channel %d\n",
1320 SDPCM_PACKET_CHANNEL(
1321 &dptr[SDPCM_FRAMETAG_LEN]));
1323 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
1324 brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n");
1326 } else if ((doff < SDPCM_HDRLEN) ||
1327 (doff > (pfirst->len - SDPCM_HDRLEN))) {
1328 brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1329 doff, sublen, pfirst->len, SDPCM_HDRLEN);
1333 /* Check sequence number of superframe SW header */
1335 brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n",
1341 /* Check window for sanity */
1342 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1343 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1344 txmax, bus->tx_seq);
1345 txmax = bus->tx_seq + 2;
1347 bus->tx_max = txmax;
1349 /* Remove superframe header, remember offset */
1350 skb_pull(pfirst, doff);
1354 /* Validate all the subframe headers */
1355 skb_queue_walk(&bus->glom, pnext) {
1356 /* leave when invalid subframe is found */
1360 dptr = (u8 *) (pnext->data);
1361 dlen = (u16) (pnext->len);
1362 sublen = get_unaligned_le16(dptr);
1363 check = get_unaligned_le16(dptr + sizeof(u16));
1364 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1365 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1366 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1367 dptr, 32, "subframe:\n");
1369 if ((u16)~(sublen ^ check)) {
1370 brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1371 num, sublen, check);
1373 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
1374 brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1377 } else if ((chan != SDPCM_DATA_CHANNEL) &&
1378 (chan != SDPCM_EVENT_CHANNEL)) {
1379 brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n",
1382 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
1383 brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1384 num, doff, sublen, SDPCM_HDRLEN);
1387 /* increase the subframe count */
1392 /* Terminate frame on error, request
1394 if (bus->glomerr++ < 3) {
1395 /* Restore superframe header space */
1396 skb_push(pfirst, sfdoff);
1397 brcmf_sdbrcm_rxfail(bus, true, true);
1400 brcmf_sdbrcm_rxfail(bus, true, false);
1402 brcmf_sdbrcm_free_glom(bus);
1408 /* Basic SD framing looks ok - process each packet (header) */
1410 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1411 dptr = (u8 *) (pfirst->data);
1412 sublen = get_unaligned_le16(dptr);
1413 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1414 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1415 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1417 brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1418 num, pfirst, pfirst->data,
1419 pfirst->len, sublen, chan, seq);
1421 /* precondition: chan == SDPCM_DATA_CHANNEL ||
1422 chan == SDPCM_EVENT_CHANNEL */
1425 brcmf_dbg(GLOM, "rx_seq %d, expected %d\n",
1432 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1433 dptr, dlen, "Rx Subframe Data:\n");
1435 __skb_trim(pfirst, sublen);
1436 skb_pull(pfirst, doff);
1438 if (pfirst->len == 0) {
1439 skb_unlink(pfirst, &bus->glom);
1440 brcmu_pkt_buf_free_skb(pfirst);
1442 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
1443 &ifidx, pfirst) != 0) {
1444 brcmf_dbg(ERROR, "rx protocol error\n");
1445 bus->sdiodev->bus_if->dstats.rx_errors++;
1446 skb_unlink(pfirst, &bus->glom);
1447 brcmu_pkt_buf_free_skb(pfirst);
1451 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1453 min_t(int, pfirst->len, 32),
1454 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1455 bus->glom.qlen, pfirst, pfirst->data,
1456 pfirst->len, pfirst->next,
1459 /* sent any remaining packets up */
1460 if (bus->glom.qlen) {
1462 brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom);
1466 bus->rxglomframes++;
1467 bus->rxglompkts += bus->glom.qlen;
1472 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1475 DECLARE_WAITQUEUE(wait, current);
1476 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1478 /* Wait until control frame is available */
1479 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1480 set_current_state(TASK_INTERRUPTIBLE);
1482 while (!(*condition) && (!signal_pending(current) && timeout))
1483 timeout = schedule_timeout(timeout);
1485 if (signal_pending(current))
1488 set_current_state(TASK_RUNNING);
1489 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1494 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1496 if (waitqueue_active(&bus->dcmd_resp_wait))
1497 wake_up_interruptible(&bus->dcmd_resp_wait);
1502 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1508 brcmf_dbg(TRACE, "Enter\n");
1510 /* Set rxctl for frame (w/optional alignment) */
1511 bus->rxctl = bus->rxbuf;
1512 bus->rxctl += BRCMF_FIRSTREAD;
1513 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
1515 bus->rxctl += (BRCMF_SDALIGN - pad);
1516 bus->rxctl -= BRCMF_FIRSTREAD;
1518 /* Copy the already-read portion over */
1519 memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD);
1520 if (len <= BRCMF_FIRSTREAD)
1523 /* Raise rdlen to next SDIO block to avoid tail command */
1524 rdlen = len - BRCMF_FIRSTREAD;
1525 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1526 pad = bus->blocksize - (rdlen % bus->blocksize);
1527 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1528 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1530 } else if (rdlen % BRCMF_SDALIGN) {
1531 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1534 /* Satisfy length-alignment requirements */
1535 if (rdlen & (ALIGNMENT - 1))
1536 rdlen = roundup(rdlen, ALIGNMENT);
1538 /* Drop if the read is too big or it exceeds our maximum */
1539 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1540 brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
1541 rdlen, bus->sdiodev->bus_if->maxctl);
1542 bus->sdiodev->bus_if->dstats.rx_errors++;
1543 brcmf_sdbrcm_rxfail(bus, false, false);
1547 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1548 brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1549 len, len - doff, bus->sdiodev->bus_if->maxctl);
1550 bus->sdiodev->bus_if->dstats.rx_errors++;
1552 brcmf_sdbrcm_rxfail(bus, false, false);
1556 /* Read remainder of frame body into the rxctl buffer */
1557 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1558 bus->sdiodev->sbwad,
1560 F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen);
1563 /* Control frame failures need retransmission */
1565 brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
1568 brcmf_sdbrcm_rxfail(bus, true, true);
1574 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1575 bus->rxctl, len, "RxCtrl:\n");
1577 /* Point to valid data and indicate its length */
1579 bus->rxlen = len - doff;
1582 /* Awake any waiters */
1583 brcmf_sdbrcm_dcmd_resp_wake(bus);
1586 /* Pad read to blocksize for efficiency */
1587 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1589 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1590 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1591 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1592 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1594 } else if (*rdlen % BRCMF_SDALIGN) {
1595 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1600 brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen,
1601 struct sk_buff **pkt, u8 **rxbuf)
1603 int sdret; /* Return code from calls */
1605 *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
1609 pkt_align(*pkt, rdlen, BRCMF_SDALIGN);
1610 *rxbuf = (u8 *) ((*pkt)->data);
1611 /* Read the entire frame */
1612 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1613 SDIO_FUNC_2, F2SYNC, *pkt);
1617 brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
1619 brcmu_pkt_buf_free_skb(*pkt);
1620 bus->sdiodev->bus_if->dstats.rx_errors++;
1621 /* Force retry w/normal header read.
1622 * Don't attempt NAK for
1625 brcmf_sdbrcm_rxfail(bus, true, true);
1630 /* Checks the header */
1632 brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf,
1633 u8 rxseq, u16 nextlen, u16 *len)
1636 bool len_consistent; /* Result of comparing readahead len and
1639 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
1641 /* Extract hardware header fields */
1642 *len = get_unaligned_le16(bus->rxhdr);
1643 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1645 /* All zeros means readahead info was bad */
1646 if (!(*len | check)) {
1647 brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n");
1651 /* Validate check bytes */
1652 if ((u16)~(*len ^ check)) {
1653 brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
1654 nextlen, *len, check);
1656 brcmf_sdbrcm_rxfail(bus, false, false);
1660 /* Validate frame length */
1661 if (*len < SDPCM_HDRLEN) {
1662 brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n",
1667 /* Check for consistency with readahead info */
1668 len_consistent = (nextlen != (roundup(*len, 16) >> 4));
1669 if (len_consistent) {
1670 /* Mismatch, force retry w/normal
1671 header (may be >4K) */
1672 brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
1673 nextlen, *len, roundup(*len, 16),
1675 brcmf_sdbrcm_rxfail(bus, true, true);
1682 brcmf_sdbrcm_pktfree2(bus, pkt);
1686 /* Return true if there may be more frames to read */
1688 brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
1690 u16 len, check; /* Extracted hardware header fields */
1691 u8 chan, seq, doff; /* Extracted software header fields */
1692 u8 fcbits; /* Extracted fcbits from software header */
1694 struct sk_buff *pkt; /* Packet for event or data frames */
1695 u16 pad; /* Number of pad bytes to read */
1696 u16 rdlen; /* Total number of bytes to read */
1697 u8 rxseq; /* Next sequence number to expect */
1698 uint rxleft = 0; /* Remaining number of frames allowed */
1699 int sdret; /* Return code from calls */
1700 u8 txmax; /* Maximum tx sequence offered */
1703 uint rxcount = 0; /* Total frames read */
1705 brcmf_dbg(TRACE, "Enter\n");
1707 /* Not finished unless we encounter no more frames indication */
1710 for (rxseq = bus->rx_seq, rxleft = maxframes;
1711 !bus->rxskip && rxleft &&
1712 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1713 rxseq++, rxleft--) {
1715 /* Handle glomming separately */
1716 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1718 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1719 bus->glomd, skb_peek(&bus->glom));
1720 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
1721 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1723 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1727 /* Try doing single read if we can */
1729 u16 nextlen = bus->nextlen;
1732 rdlen = len = nextlen << 4;
1733 brcmf_pad(bus, &pad, &rdlen);
1736 * After the frame is received we have to
1737 * distinguish whether it is data
1738 * or non-data frame.
1740 brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf);
1742 /* Give up on data, request rtx of events */
1743 brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
1748 if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen,
1752 /* Extract software header fields */
1753 chan = SDPCM_PACKET_CHANNEL(
1754 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1755 seq = SDPCM_PACKET_SEQUENCE(
1756 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1757 doff = SDPCM_DOFFSET_VALUE(
1758 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1759 txmax = SDPCM_WINDOW_VALUE(
1760 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1763 bus->rxhdr[SDPCM_FRAMETAG_LEN +
1764 SDPCM_NEXTLEN_OFFSET];
1765 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1766 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1771 bus->rx_readahead_cnt++;
1773 /* Handle Flow Control */
1774 fcbits = SDPCM_FCMASK_VALUE(
1775 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1777 if (bus->flowcontrol != fcbits) {
1778 if (~bus->flowcontrol & fcbits)
1781 if (bus->flowcontrol & ~fcbits)
1785 bus->flowcontrol = fcbits;
1788 /* Check and update sequence number */
1790 brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n",
1796 /* Check window for sanity */
1797 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1798 brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n",
1799 txmax, bus->tx_seq);
1800 txmax = bus->tx_seq + 2;
1802 bus->tx_max = txmax;
1804 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1805 rxbuf, len, "Rx Data:\n");
1806 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1809 bus->rxhdr, SDPCM_HDRLEN,
1812 if (chan == SDPCM_CONTROL_CHANNEL) {
1813 brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n",
1815 /* Force retry w/normal header read */
1817 brcmf_sdbrcm_rxfail(bus, false, true);
1818 brcmf_sdbrcm_pktfree2(bus, pkt);
1822 /* Validate data offset */
1823 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1824 brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n",
1825 doff, len, SDPCM_HDRLEN);
1826 brcmf_sdbrcm_rxfail(bus, false, false);
1827 brcmf_sdbrcm_pktfree2(bus, pkt);
1831 /* All done with this one -- now deliver the packet */
1835 /* Read frame header (hardware and software) */
1836 sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1837 SDIO_FUNC_2, F2SYNC, bus->rxhdr,
1842 brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret);
1844 brcmf_sdbrcm_rxfail(bus, true, true);
1847 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1848 bus->rxhdr, SDPCM_HDRLEN, "RxHdr:\n");
1851 /* Extract hardware header fields */
1852 len = get_unaligned_le16(bus->rxhdr);
1853 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1855 /* All zeros means no more frames */
1856 if (!(len | check)) {
1861 /* Validate check bytes */
1862 if ((u16) ~(len ^ check)) {
1863 brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n",
1866 brcmf_sdbrcm_rxfail(bus, false, false);
1870 /* Validate frame length */
1871 if (len < SDPCM_HDRLEN) {
1872 brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len);
1876 /* Extract software header fields */
1877 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1878 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1879 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1880 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1882 /* Validate data offset */
1883 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1884 brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n",
1885 doff, len, SDPCM_HDRLEN, seq);
1887 brcmf_sdbrcm_rxfail(bus, false, false);
1891 /* Save the readahead length if there is one */
1893 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1894 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1895 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1900 /* Handle Flow Control */
1901 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1903 if (bus->flowcontrol != fcbits) {
1904 if (~bus->flowcontrol & fcbits)
1907 if (bus->flowcontrol & ~fcbits)
1911 bus->flowcontrol = fcbits;
1914 /* Check and update sequence number */
1916 brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq);
1921 /* Check window for sanity */
1922 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1923 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1924 txmax, bus->tx_seq);
1925 txmax = bus->tx_seq + 2;
1927 bus->tx_max = txmax;
1929 /* Call a separate function for control frames */
1930 if (chan == SDPCM_CONTROL_CHANNEL) {
1931 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
1935 /* precondition: chan is either SDPCM_DATA_CHANNEL,
1936 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
1937 SDPCM_GLOM_CHANNEL */
1939 /* Length to read */
1940 rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0;
1942 /* May pad read to blocksize for efficiency */
1943 if (bus->roundup && bus->blocksize &&
1944 (rdlen > bus->blocksize)) {
1945 pad = bus->blocksize - (rdlen % bus->blocksize);
1946 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1947 ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ))
1949 } else if (rdlen % BRCMF_SDALIGN) {
1950 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1953 /* Satisfy length-alignment requirements */
1954 if (rdlen & (ALIGNMENT - 1))
1955 rdlen = roundup(rdlen, ALIGNMENT);
1957 if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) {
1958 /* Too long -- skip this frame */
1959 brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
1961 bus->sdiodev->bus_if->dstats.rx_errors++;
1963 brcmf_sdbrcm_rxfail(bus, false, false);
1967 pkt = brcmu_pkt_buf_get_skb(rdlen +
1968 BRCMF_FIRSTREAD + BRCMF_SDALIGN);
1970 /* Give up on data, request rtx of events */
1971 brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
1973 bus->sdiodev->bus_if->dstats.rx_dropped++;
1974 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
1978 /* Leave room for what we already read, and align remainder */
1979 skb_pull(pkt, BRCMF_FIRSTREAD);
1980 pkt_align(pkt, rdlen, BRCMF_SDALIGN);
1982 /* Read the remaining frame data */
1983 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1984 SDIO_FUNC_2, F2SYNC, pkt);
1988 brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen,
1989 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
1990 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
1992 brcmu_pkt_buf_free_skb(pkt);
1993 bus->sdiodev->bus_if->dstats.rx_errors++;
1994 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
1998 /* Copy the already-read portion */
1999 skb_push(pkt, BRCMF_FIRSTREAD);
2000 memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD);
2002 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
2003 pkt->data, len, "Rx Data:\n");
2006 /* Save superframe descriptor and allocate packet frame */
2007 if (chan == SDPCM_GLOM_CHANNEL) {
2008 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
2009 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2011 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
2014 __skb_trim(pkt, len);
2015 skb_pull(pkt, SDPCM_HDRLEN);
2018 brcmf_dbg(ERROR, "%s: glom superframe w/o "
2019 "descriptor!\n", __func__);
2020 brcmf_sdbrcm_rxfail(bus, false, false);
2025 /* Fill in packet len and prio, deliver upward */
2026 __skb_trim(pkt, len);
2027 skb_pull(pkt, doff);
2029 if (pkt->len == 0) {
2030 brcmu_pkt_buf_free_skb(pkt);
2032 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
2034 brcmf_dbg(ERROR, "rx protocol error\n");
2035 brcmu_pkt_buf_free_skb(pkt);
2036 bus->sdiodev->bus_if->dstats.rx_errors++;
2040 /* Unlock during rx call */
2042 brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt);
2045 rxcount = maxframes - rxleft;
2046 /* Message if we hit the limit */
2048 brcmf_dbg(DATA, "hit rx limit of %d frames\n",
2051 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2052 /* Back off rxseq if awaiting rtx, update rx_seq */
2055 bus->rx_seq = rxseq;
2061 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
2064 wait_event_interruptible_timeout(bus->ctrl_wait, !*lockvar, HZ * 2);
2070 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
2072 if (waitqueue_active(&bus->ctrl_wait))
2073 wake_up_interruptible(&bus->ctrl_wait);
2077 /* Writes a HW/SW header into the packet and sends it. */
2078 /* Assumes: (a) header space already there, (b) caller holds lock */
2079 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
2080 uint chan, bool free_pkt)
2086 struct sk_buff *new;
2089 brcmf_dbg(TRACE, "Enter\n");
2091 frame = (u8 *) (pkt->data);
2093 /* Add alignment padding, allocate new packet if needed */
2094 pad = ((unsigned long)frame % BRCMF_SDALIGN);
2096 if (skb_headroom(pkt) < pad) {
2097 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
2098 skb_headroom(pkt), pad);
2099 bus->sdiodev->bus_if->tx_realloc++;
2100 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
2102 brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
2103 pkt->len + BRCMF_SDALIGN);
2108 pkt_align(new, pkt->len, BRCMF_SDALIGN);
2109 memcpy(new->data, pkt->data, pkt->len);
2111 brcmu_pkt_buf_free_skb(pkt);
2112 /* free the pkt if canned one is not used */
2115 frame = (u8 *) (pkt->data);
2116 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
2120 frame = (u8 *) (pkt->data);
2121 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
2122 memset(frame, 0, pad + SDPCM_HDRLEN);
2125 /* precondition: pad < BRCMF_SDALIGN */
2127 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2128 len = (u16) (pkt->len);
2129 *(__le16 *) frame = cpu_to_le16(len);
2130 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
2132 /* Software tag: channel, sequence number, data offset */
2134 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
2136 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
2138 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2139 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2142 tx_packets[pkt->priority]++;
2145 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
2146 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2147 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
2148 frame, len, "Tx Frame:\n");
2149 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
2151 chan == SDPCM_CONTROL_CHANNEL) ||
2153 chan != SDPCM_CONTROL_CHANNEL))) &&
2155 frame, min_t(u16, len, 16), "TxHdr:\n");
2157 /* Raise len to next SDIO block to eliminate tail command */
2158 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2159 u16 pad = bus->blocksize - (len % bus->blocksize);
2160 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2162 } else if (len % BRCMF_SDALIGN) {
2163 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2166 /* Some controllers have trouble with odd bytes -- round to even */
2167 if (len & (ALIGNMENT - 1))
2168 len = roundup(len, ALIGNMENT);
2170 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2171 SDIO_FUNC_2, F2SYNC, pkt);
2175 /* On failure, abort the command and terminate the frame */
2176 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2180 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2181 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2182 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2186 for (i = 0; i < 3; i++) {
2188 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2190 SBSDIO_FUNC1_WFRAMEBCHI,
2192 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2194 SBSDIO_FUNC1_WFRAMEBCLO,
2196 bus->f1regdata += 2;
2197 if ((hi == 0) && (lo == 0))
2203 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2206 /* restore pkt buffer pointer before calling tx complete routine */
2207 skb_pull(pkt, SDPCM_HDRLEN + pad);
2209 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
2213 brcmu_pkt_buf_free_skb(pkt);
2218 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2220 struct sk_buff *pkt;
2223 int ret = 0, prec_out;
2228 brcmf_dbg(TRACE, "Enter\n");
2230 tx_prec_map = ~bus->flowcontrol;
2232 /* Send frames until the limit or some other event */
2233 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2234 spin_lock_bh(&bus->txqlock);
2235 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2237 spin_unlock_bh(&bus->txqlock);
2240 spin_unlock_bh(&bus->txqlock);
2241 datalen = pkt->len - SDPCM_HDRLEN;
2243 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
2245 bus->sdiodev->bus_if->dstats.tx_errors++;
2247 bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
2249 /* In poll mode, need to check for other events */
2250 if (!bus->intr && cnt) {
2251 /* Check device status, signal pending interrupt */
2252 r_sdreg32(bus, &intstatus,
2253 offsetof(struct sdpcmd_regs, intstatus),
2256 if (brcmf_sdcard_regfail(bus->sdiodev))
2258 if (intstatus & bus->hostintmask)
2263 /* Deflow-control stack if needed */
2264 if (bus->sdiodev->bus_if->drvr_up &&
2265 (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2266 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2268 brcmf_txflowcontrol(bus->sdiodev->dev, 0, OFF);
2274 static void brcmf_sdbrcm_bus_stop(struct device *dev)
2276 u32 local_hostintmask;
2280 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2281 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2282 struct brcmf_sdio *bus = sdiodev->bus;
2284 brcmf_dbg(TRACE, "Enter\n");
2286 if (bus->watchdog_tsk) {
2287 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2288 kthread_stop(bus->watchdog_tsk);
2289 bus->watchdog_tsk = NULL;
2292 if (bus->dpc_tsk && bus->dpc_tsk != current) {
2293 send_sig(SIGTERM, bus->dpc_tsk, 1);
2294 kthread_stop(bus->dpc_tsk);
2295 bus->dpc_tsk = NULL;
2302 /* Enable clock for device interrupts */
2303 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2305 /* Disable and clear interrupts at the chip level also */
2306 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
2307 local_hostintmask = bus->hostintmask;
2308 bus->hostintmask = 0;
2310 /* Change our idea of bus state */
2311 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2313 /* Force clocks on backplane to be sure F2 interrupt propagates */
2314 saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2315 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2317 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2318 SBSDIO_FUNC1_CHIPCLKCSR,
2319 (saveclk | SBSDIO_FORCE_HT), &err);
2322 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
2324 /* Turn off the bus (F2), free any pending packets */
2325 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2326 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
2327 SDIO_FUNC_ENABLE_1, NULL);
2329 /* Clear any pending interrupts now that F2 is disabled */
2330 w_sdreg32(bus, local_hostintmask,
2331 offsetof(struct sdpcmd_regs, intstatus), &retries);
2333 /* Turn off the backplane clock (only) */
2334 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2336 /* Clear the data packet queues */
2337 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2339 /* Clear any held glomming stuff */
2341 brcmu_pkt_buf_free_skb(bus->glomd);
2342 brcmf_sdbrcm_free_glom(bus);
2344 /* Clear rx control and wake any waiters */
2346 brcmf_sdbrcm_dcmd_resp_wake(bus);
2348 /* Reset some F2 state stuff */
2349 bus->rxskip = false;
2350 bus->tx_seq = bus->rx_seq = 0;
2355 static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2357 u32 intstatus, newstatus = 0;
2359 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2360 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2361 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2362 bool rxdone = true; /* Flag for no more read data */
2363 bool resched = false; /* Flag indicating resched wanted */
2365 brcmf_dbg(TRACE, "Enter\n");
2367 /* Start with leftover status bits */
2368 intstatus = bus->intstatus;
2372 /* If waiting for HTAVAIL, check status */
2373 if (bus->clkstate == CLK_PENDING) {
2375 u8 clkctl, devctl = 0;
2378 /* Check for inconsistent device control */
2379 devctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2380 SBSDIO_DEVICE_CTL, &err);
2382 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
2383 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2387 /* Read CSR, if clock on switch to AVAIL, else ignore */
2388 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2389 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2391 brcmf_dbg(ERROR, "error reading CSR: %d\n",
2393 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2396 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2399 if (SBSDIO_HTAV(clkctl)) {
2400 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
2402 SBSDIO_DEVICE_CTL, &err);
2404 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
2406 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2408 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2409 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2410 SBSDIO_DEVICE_CTL, devctl, &err);
2412 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
2414 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2416 bus->clkstate = CLK_AVAIL;
2424 /* Make sure backplane clock is on */
2425 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2426 if (bus->clkstate == CLK_PENDING)
2429 /* Pending interrupt indicates new device status */
2432 r_sdreg32(bus, &newstatus,
2433 offsetof(struct sdpcmd_regs, intstatus), &retries);
2435 if (brcmf_sdcard_regfail(bus->sdiodev))
2437 newstatus &= bus->hostintmask;
2438 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
2440 w_sdreg32(bus, newstatus,
2441 offsetof(struct sdpcmd_regs, intstatus),
2447 /* Merge new bits with previous */
2448 intstatus |= newstatus;
2451 /* Handle flow-control change: read new state in case our ack
2452 * crossed another change interrupt. If change still set, assume
2453 * FC ON for safety, let next loop through do the debounce.
2455 if (intstatus & I_HMB_FC_CHANGE) {
2456 intstatus &= ~I_HMB_FC_CHANGE;
2457 w_sdreg32(bus, I_HMB_FC_CHANGE,
2458 offsetof(struct sdpcmd_regs, intstatus), &retries);
2460 r_sdreg32(bus, &newstatus,
2461 offsetof(struct sdpcmd_regs, intstatus), &retries);
2462 bus->f1regdata += 2;
2464 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
2465 intstatus |= (newstatus & bus->hostintmask);
2468 /* Handle host mailbox indication */
2469 if (intstatus & I_HMB_HOST_INT) {
2470 intstatus &= ~I_HMB_HOST_INT;
2471 intstatus |= brcmf_sdbrcm_hostmail(bus);
2474 /* Generally don't ask for these, can get CRC errors... */
2475 if (intstatus & I_WR_OOSYNC) {
2476 brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
2477 intstatus &= ~I_WR_OOSYNC;
2480 if (intstatus & I_RD_OOSYNC) {
2481 brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
2482 intstatus &= ~I_RD_OOSYNC;
2485 if (intstatus & I_SBINT) {
2486 brcmf_dbg(ERROR, "Dongle reports SBINT\n");
2487 intstatus &= ~I_SBINT;
2490 /* Would be active due to wake-wlan in gSPI */
2491 if (intstatus & I_CHIPACTIVE) {
2492 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2493 intstatus &= ~I_CHIPACTIVE;
2496 /* Ignore frame indications if rxskip is set */
2498 intstatus &= ~I_HMB_FRAME_IND;
2500 /* On frame indication, read available frames */
2501 if (PKT_AVAILABLE()) {
2502 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
2503 if (rxdone || bus->rxskip)
2504 intstatus &= ~I_HMB_FRAME_IND;
2505 rxlimit -= min(framecnt, rxlimit);
2508 /* Keep still-pending events for next scheduling */
2509 bus->intstatus = intstatus;
2512 if (data_ok(bus) && bus->ctrl_frame_stat &&
2513 (bus->clkstate == CLK_AVAIL)) {
2516 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2517 SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
2518 (u32) bus->ctrl_frame_len);
2521 /* On failure, abort the command and
2522 terminate the frame */
2523 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2527 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2529 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2530 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2534 for (i = 0; i < 3; i++) {
2536 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2538 SBSDIO_FUNC1_WFRAMEBCHI,
2540 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2542 SBSDIO_FUNC1_WFRAMEBCLO,
2544 bus->f1regdata += 2;
2545 if ((hi == 0) && (lo == 0))
2551 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2553 brcmf_dbg(INFO, "Return_dpc value is : %d\n", ret);
2554 bus->ctrl_frame_stat = false;
2555 brcmf_sdbrcm_wait_event_wakeup(bus);
2557 /* Send queued frames (limit 1 if rx may still be pending) */
2558 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
2559 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2561 framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax);
2562 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2563 txlimit -= framecnt;
2566 /* Resched if events or tx frames are pending,
2567 else await next interrupt */
2568 /* On failed register access, all bets are off:
2569 no resched or interrupts */
2570 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) ||
2571 brcmf_sdcard_regfail(bus->sdiodev)) {
2572 brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n",
2573 brcmf_sdcard_regfail(bus->sdiodev));
2574 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2576 } else if (bus->clkstate == CLK_PENDING) {
2577 brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n");
2579 } else if (bus->intstatus || bus->ipend ||
2580 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
2581 && data_ok(bus)) || PKT_AVAILABLE()) {
2585 bus->dpc_sched = resched;
2587 /* If we're done for now, turn off clock request. */
2588 if ((bus->clkstate != CLK_PENDING)
2589 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2590 bus->activity = false;
2591 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2599 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus)
2601 struct list_head *new_hd;
2602 unsigned long flags;
2605 new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC);
2607 new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL);
2611 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2612 list_add_tail(new_hd, &bus->dpc_tsklst);
2613 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2616 static int brcmf_sdbrcm_dpc_thread(void *data)
2618 struct brcmf_sdio *bus = (struct brcmf_sdio *) data;
2619 struct list_head *cur_hd, *tmp_hd;
2620 unsigned long flags;
2622 allow_signal(SIGTERM);
2623 /* Run until signal received */
2625 if (kthread_should_stop())
2628 if (list_empty(&bus->dpc_tsklst))
2629 if (wait_for_completion_interruptible(&bus->dpc_wait))
2632 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2633 list_for_each_safe(cur_hd, tmp_hd, &bus->dpc_tsklst) {
2634 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2636 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
2637 /* after stopping the bus, exit thread */
2638 brcmf_sdbrcm_bus_stop(bus->sdiodev->dev);
2639 bus->dpc_tsk = NULL;
2643 if (brcmf_sdbrcm_dpc(bus))
2644 brcmf_sdbrcm_adddpctsk(bus);
2646 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2650 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2655 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2659 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2660 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2661 struct brcmf_sdio *bus = sdiodev->bus;
2663 brcmf_dbg(TRACE, "Enter\n");
2667 /* Add space for the header */
2668 skb_push(pkt, SDPCM_HDRLEN);
2669 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2671 prec = prio2prec((pkt->priority & PRIOMASK));
2673 /* Check for existing queue, current flow-control,
2674 pending event, or pending clock */
2675 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2678 /* Priority based enq */
2679 spin_lock_bh(&bus->txqlock);
2680 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2681 skb_pull(pkt, SDPCM_HDRLEN);
2682 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2683 brcmu_pkt_buf_free_skb(pkt);
2684 brcmf_dbg(ERROR, "out of bus->txq !!!\n");
2689 spin_unlock_bh(&bus->txqlock);
2691 if (pktq_len(&bus->txq) >= TXHI) {
2693 brcmf_txflowcontrol(bus->sdiodev->dev, 0, ON);
2697 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2698 qcount[prec] = pktq_plen(&bus->txq, prec);
2700 /* Schedule DPC if needed to send queued packet(s) */
2701 if (!bus->dpc_sched) {
2702 bus->dpc_sched = true;
2704 brcmf_sdbrcm_adddpctsk(bus);
2705 complete(&bus->dpc_wait);
2713 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2720 /* Determine initial transfer parameters */
2721 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2722 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2723 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2727 /* Set the backplane window to include the start address */
2728 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2730 brcmf_dbg(ERROR, "window change failed\n");
2734 /* Do the transfer(s) */
2736 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2737 write ? "write" : "read", dsize,
2738 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2739 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2740 sdaddr, data, dsize);
2742 brcmf_dbg(ERROR, "membytes transfer failed\n");
2746 /* Adjust for next transfer (if any) */
2751 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2754 brcmf_dbg(ERROR, "window change failed\n");
2758 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2763 /* Return the window to backplane enumeration space for core access */
2764 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2765 brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
2766 bus->sdiodev->sbwad);
2772 #define CONSOLE_LINE_MAX 192
2774 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2776 struct brcmf_console *c = &bus->console;
2777 u8 line[CONSOLE_LINE_MAX], ch;
2781 /* Don't do anything until FWREADY updates console address */
2782 if (bus->console_addr == 0)
2785 /* Read console log struct */
2786 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2787 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2792 /* Allocate console buffer (one time only) */
2793 if (c->buf == NULL) {
2794 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2795 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2800 idx = le32_to_cpu(c->log_le.idx);
2802 /* Protect against corrupt value */
2803 if (idx > c->bufsize)
2806 /* Skip reading the console buffer if the index pointer
2811 /* Read the console buffer */
2812 addr = le32_to_cpu(c->log_le.buf);
2813 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2817 while (c->last != idx) {
2818 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2819 if (c->last == idx) {
2820 /* This would output a partial line.
2822 * the buffer pointer and output this
2823 * line next time around.
2828 c->last = c->bufsize - n;
2831 ch = c->buf[c->last];
2832 c->last = (c->last + 1) % c->bufsize;
2839 if (line[n - 1] == '\r')
2842 pr_debug("CONSOLE: %s\n", line);
2851 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2856 bus->ctrl_frame_stat = false;
2857 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2858 SDIO_FUNC_2, F2SYNC, frame, len);
2861 /* On failure, abort the command and terminate the frame */
2862 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2866 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2868 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2869 SBSDIO_FUNC1_FRAMECTRL,
2873 for (i = 0; i < 3; i++) {
2875 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2876 SBSDIO_FUNC1_WFRAMEBCHI,
2878 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2879 SBSDIO_FUNC1_WFRAMEBCLO,
2881 bus->f1regdata += 2;
2882 if (hi == 0 && lo == 0)
2888 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2894 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2902 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2903 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2904 struct brcmf_sdio *bus = sdiodev->bus;
2906 brcmf_dbg(TRACE, "Enter\n");
2908 /* Back the pointer to make a room for bus header */
2909 frame = msg - SDPCM_HDRLEN;
2910 len = (msglen += SDPCM_HDRLEN);
2912 /* Add alignment padding (optional for ctl frames) */
2913 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2918 memset(frame, 0, doff + SDPCM_HDRLEN);
2920 /* precondition: doff < BRCMF_SDALIGN */
2921 doff += SDPCM_HDRLEN;
2923 /* Round send length to next SDIO block */
2924 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2925 u16 pad = bus->blocksize - (len % bus->blocksize);
2926 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2928 } else if (len % BRCMF_SDALIGN) {
2929 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2932 /* Satisfy length-alignment requirements */
2933 if (len & (ALIGNMENT - 1))
2934 len = roundup(len, ALIGNMENT);
2936 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2938 /* Need to lock here to protect txseq and SDIO tx calls */
2943 /* Make sure backplane clock is on */
2944 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2946 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2947 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2948 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2950 /* Software tag: channel, sequence number, data offset */
2952 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2954 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2955 SDPCM_DOFFSET_MASK);
2956 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2957 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2959 if (!data_ok(bus)) {
2960 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2961 bus->tx_max, bus->tx_seq);
2962 bus->ctrl_frame_stat = true;
2964 bus->ctrl_frame_buf = frame;
2965 bus->ctrl_frame_len = len;
2967 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
2969 if (!bus->ctrl_frame_stat) {
2970 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2973 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2979 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2980 frame, len, "Tx Frame:\n");
2981 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2983 frame, min_t(u16, len, 16), "TxHdr:\n");
2986 ret = brcmf_tx_frame(bus, frame, len);
2987 } while (ret < 0 && retries++ < TXRETRIES);
2990 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2991 bus->activity = false;
2992 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
3002 return ret ? -EIO : 0;
3006 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3011 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3012 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3013 struct brcmf_sdio *bus = sdiodev->bus;
3015 brcmf_dbg(TRACE, "Enter\n");
3017 /* Wait until control frame is available */
3018 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3022 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3027 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3029 } else if (timeleft == 0) {
3030 brcmf_dbg(ERROR, "resumed on timeout\n");
3031 } else if (pending) {
3032 brcmf_dbg(CTL, "cancelled\n");
3033 return -ERESTARTSYS;
3035 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3043 return rxlen ? (int)rxlen : -ETIMEDOUT;
3046 static int brcmf_sdbrcm_downloadvars(struct brcmf_sdio *bus, void *arg, int len)
3050 brcmf_dbg(TRACE, "Enter\n");
3052 /* Basic sanity checks */
3053 if (bus->sdiodev->bus_if->drvr_up) {
3054 bcmerror = -EISCONN;
3058 bcmerror = -EOVERFLOW;
3062 /* Free the old ones and replace with passed variables */
3065 bus->vars = kmalloc(len, GFP_ATOMIC);
3066 bus->varsz = bus->vars ? len : 0;
3067 if (bus->vars == NULL) {
3072 /* Copy the passed variables, which should include the
3073 terminating double-null */
3074 memcpy(bus->vars, arg, bus->varsz);
3079 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3088 char *nvram_ularray;
3091 /* Even if there are no vars are to be written, we still
3092 need to set the ramsize. */
3093 varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
3094 varaddr = (bus->ramsize - 4) - varsize;
3097 vbuffer = kzalloc(varsize, GFP_ATOMIC);
3101 memcpy(vbuffer, bus->vars, bus->varsz);
3103 /* Write the vars list */
3105 brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
3107 /* Verify NVRAM bytes */
3108 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n", varsize);
3109 nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
3110 if (!nvram_ularray) {
3115 /* Upload image to verify downloaded contents. */
3116 memset(nvram_ularray, 0xaa, varsize);
3118 /* Read the vars list to temp buffer for comparison */
3120 brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
3123 brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
3124 bcmerror, varsize, varaddr);
3126 /* Compare the org NVRAM with the one read from RAM */
3127 if (memcmp(vbuffer, nvram_ularray, varsize))
3128 brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
3130 brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
3132 kfree(nvram_ularray);
3138 /* adjust to the user specified RAM */
3139 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3140 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3142 varsize = ((bus->ramsize - 4) - varaddr);
3145 * Determine the length token:
3146 * Varsize, converted to words, in lower 16-bits, checksum
3151 varsizew_le = cpu_to_le32(0);
3153 varsizew = varsize / 4;
3154 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3155 varsizew_le = cpu_to_le32(varsizew);
3158 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3161 /* Write the length token to the last word */
3162 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3163 (u8 *)&varsizew_le, 4);
3168 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3172 struct chip_info *ci = bus->ci;
3174 /* To enter download state, disable ARM and reset SOCRAM.
3175 * To exit download state, simply reset ARM (default is RAM boot).
3178 bus->alp_only = true;
3180 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3182 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3184 /* Clear the top bit of memory */
3187 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3191 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3192 brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
3197 bcmerror = brcmf_sdbrcm_write_vars(bus);
3199 brcmf_dbg(ERROR, "no vars written to RAM\n");
3203 w_sdreg32(bus, 0xFFFFFFFF,
3204 offsetof(struct sdpcmd_regs, intstatus), &retries);
3206 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3208 /* Allow HT Clock now that the ARM is running. */
3209 bus->alp_only = false;
3211 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3217 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3219 if (bus->firmware->size < bus->fw_ptr + len)
3220 len = bus->firmware->size - bus->fw_ptr;
3222 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3227 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3231 u8 *memblock = NULL, *memptr;
3234 brcmf_dbg(INFO, "Enter\n");
3236 ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME,
3237 &bus->sdiodev->func[2]->dev);
3239 brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
3244 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3245 if (memblock == NULL) {
3249 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3250 memptr += (BRCMF_SDALIGN -
3251 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3253 /* Download image */
3255 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3256 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3258 brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
3259 ret, MEMBLOCK, offset);
3269 release_firmware(bus->firmware);
3276 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3277 * and ending in a NUL.
3278 * Removes carriage returns, empty lines, comment lines, and converts
3280 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3284 static uint brcmf_process_nvram_vars(char *varbuf, uint len)
3293 findNewline = false;
3296 for (n = 0; n < len; n++) {
3299 if (varbuf[n] == '\r')
3301 if (findNewline && varbuf[n] != '\n')
3303 findNewline = false;
3304 if (varbuf[n] == '#') {
3308 if (varbuf[n] == '\n') {
3318 buf_len = dp - varbuf;
3320 while (dp < varbuf + n)
3326 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3329 char *memblock = NULL;
3333 ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME,
3334 &bus->sdiodev->func[2]->dev);
3336 brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
3341 memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
3342 if (memblock == NULL) {
3347 len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus);
3349 if (len > 0 && len < MEMBLOCK) {
3350 bufp = (char *)memblock;
3352 len = brcmf_process_nvram_vars(bufp, len);
3356 ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1);
3358 brcmf_dbg(ERROR, "error downloading vars: %d\n", ret);
3360 brcmf_dbg(ERROR, "error reading nvram file: %d\n", len);
3367 release_firmware(bus->firmware);
3373 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3377 /* Keep arm in reset */
3378 if (brcmf_sdbrcm_download_state(bus, true)) {
3379 brcmf_dbg(ERROR, "error placing ARM core in reset\n");
3383 /* External image takes precedence if specified */
3384 if (brcmf_sdbrcm_download_code_file(bus)) {
3385 brcmf_dbg(ERROR, "dongle image file download failed\n");
3389 /* External nvram takes precedence if specified */
3390 if (brcmf_sdbrcm_download_nvram(bus))
3391 brcmf_dbg(ERROR, "dongle nvram file download failed\n");
3393 /* Take arm out of reset */
3394 if (brcmf_sdbrcm_download_state(bus, false)) {
3395 brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
3406 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3410 /* Download the firmware */
3411 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3413 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3415 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3420 static int brcmf_sdbrcm_bus_init(struct device *dev)
3422 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3423 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3424 struct brcmf_sdio *bus = sdiodev->bus;
3425 unsigned long timeout;
3431 brcmf_dbg(TRACE, "Enter\n");
3433 /* try to download image and nvram to the dongle */
3434 if (bus_if->state == BRCMF_BUS_DOWN) {
3435 if (!(brcmf_sdbrcm_download_firmware(bus)))
3439 if (!bus->sdiodev->bus_if->drvr)
3442 /* Start the watchdog timer */
3444 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3448 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3449 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3450 if (bus->clkstate != CLK_AVAIL)
3453 /* Force clocks on backplane to be sure F2 interrupt propagates */
3455 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3456 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3458 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3459 SBSDIO_FUNC1_CHIPCLKCSR,
3460 (saveclk | SBSDIO_FORCE_HT), &err);
3463 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3467 /* Enable function 2 (frame transfers) */
3468 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3469 offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
3470 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3472 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3475 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3477 while (enable != ready) {
3478 ready = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_0,
3479 SDIO_CCCR_IORx, NULL);
3480 if (time_after(jiffies, timeout))
3482 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3483 /* prevent busy waiting if it takes too long */
3484 msleep_interruptible(20);
3487 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3489 /* If F2 successfully enabled, set core and enable interrupts */
3490 if (ready == enable) {
3491 /* Set up the interrupt mask and enable interrupts */
3492 bus->hostintmask = HOSTINTMASK;
3493 w_sdreg32(bus, bus->hostintmask,
3494 offsetof(struct sdpcmd_regs, hostintmask), &retries);
3496 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3497 SBSDIO_WATERMARK, 8, &err);
3499 /* Disable F2 again */
3500 enable = SDIO_FUNC_ENABLE_1;
3501 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0,
3502 SDIO_CCCR_IOEx, enable, NULL);
3506 /* Restore previous clock setting */
3507 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3508 SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3510 /* If we didn't come up, turn off backplane clock */
3512 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3520 void brcmf_sdbrcm_isr(void *arg)
3522 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3524 brcmf_dbg(TRACE, "Enter\n");
3527 brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
3531 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3532 brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
3535 /* Count the interrupt call */
3539 /* Shouldn't get this interrupt if we're sleeping? */
3540 if (bus->sleeping) {
3541 brcmf_dbg(ERROR, "INTERRUPT WHILE SLEEPING??\n");
3545 /* Disable additional interrupts (is this needed now)? */
3547 brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
3549 bus->dpc_sched = true;
3551 brcmf_sdbrcm_adddpctsk(bus);
3552 complete(&bus->dpc_wait);
3556 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3559 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3562 brcmf_dbg(TIMER, "Enter\n");
3564 /* Ignore the timer if simulating bus down */
3570 /* Poll period: check device if appropriate. */
3571 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3574 /* Reset poll tick */
3577 /* Check device if no interrupts */
3578 if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
3580 if (!bus->dpc_sched) {
3582 devpend = brcmf_sdcard_cfg_read(bus->sdiodev,
3583 SDIO_FUNC_0, SDIO_CCCR_INTx,
3586 devpend & (INTR_STATUS_FUNC1 |
3590 /* If there is something, make like the ISR and
3596 bus->dpc_sched = true;
3598 brcmf_sdbrcm_adddpctsk(bus);
3599 complete(&bus->dpc_wait);
3604 /* Update interrupt tracking */
3605 bus->lastintrs = bus->intrcount;
3608 /* Poll for console output periodically */
3609 if (bus_if->state == BRCMF_BUS_DATA &&
3610 bus->console_interval != 0) {
3611 bus->console.count += BRCMF_WD_POLL_MS;
3612 if (bus->console.count >= bus->console_interval) {
3613 bus->console.count -= bus->console_interval;
3614 /* Make sure backplane clock is on */
3615 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3616 if (brcmf_sdbrcm_readconsole(bus) < 0)
3618 bus->console_interval = 0;
3623 /* On idle timeout clear activity flag and/or turn off clock */
3624 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3625 if (++bus->idlecount >= bus->idletime) {
3627 if (bus->activity) {
3628 bus->activity = false;
3629 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3631 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3641 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3643 if (chipid == BCM4329_CHIP_ID)
3645 if (chipid == BCM4330_CHIP_ID)
3650 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3652 brcmf_dbg(TRACE, "Enter\n");
3655 bus->rxctl = bus->rxbuf = NULL;
3658 kfree(bus->databuf);
3659 bus->databuf = NULL;
3662 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3664 brcmf_dbg(TRACE, "Enter\n");
3666 if (bus->sdiodev->bus_if->maxctl) {
3668 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3669 ALIGNMENT) + BRCMF_SDALIGN;
3670 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3675 /* Allocate buffer to receive glomed packet */
3676 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3677 if (!(bus->databuf)) {
3678 /* release rxbuf which was already located as above */
3684 /* Align the buffer */
3685 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3686 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3687 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3689 bus->dataptr = bus->databuf;
3698 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3706 bus->alp_only = true;
3708 /* Return the window to backplane enumeration space for core access */
3709 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, SI_ENUM_BASE))
3710 brcmf_dbg(ERROR, "FAILED to return to SI_ENUM_BASE\n");
3712 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3713 brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE, 4));
3716 * Force PLL off until brcmf_sdio_chip_attach()
3717 * programs PLL control regs
3720 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3721 SBSDIO_FUNC1_CHIPCLKCSR,
3722 BRCMF_INIT_CLKCTL1, &err);
3725 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3726 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3728 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3729 brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3730 err, BRCMF_INIT_CLKCTL1, clkctl);
3734 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3735 brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
3739 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3740 brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
3744 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3745 SDIO_DRIVE_STRENGTH);
3747 /* Get info on the SOCRAM cores... */
3748 bus->ramsize = bus->ci->ramsize;
3749 if (!(bus->ramsize)) {
3750 brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
3754 /* Set core control so an SDIO reset does a backplane reset */
3755 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3756 reg_addr = bus->ci->c_inf[idx].base +
3757 offsetof(struct sdpcmd_regs, corecontrol);
3758 reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr, sizeof(u32));
3759 brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32),
3760 reg_val | CC_BPRESEN);
3762 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3764 /* Locate an appropriately-aligned portion of hdrbuf */
3765 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3768 /* Set the poll and/or interrupt flags */
3780 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3782 brcmf_dbg(TRACE, "Enter\n");
3784 /* Disable F2 to clear any intermediate frame state on the dongle */
3785 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3786 SDIO_FUNC_ENABLE_1, NULL);
3788 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3789 bus->sleeping = false;
3790 bus->rxflow = false;
3792 /* Done with backplane-dependent accesses, can drop clock... */
3793 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3794 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3796 /* ...and initialize clock/power states */
3797 bus->clkstate = CLK_SDONLY;
3798 bus->idletime = BRCMF_IDLE_INTERVAL;
3799 bus->idleclock = BRCMF_IDLE_ACTIVE;
3801 /* Query the F2 block size, set roundup accordingly */
3802 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3803 bus->roundup = min(max_roundup, bus->blocksize);
3805 /* bus module does not support packet chaining */
3806 bus->use_rxchain = false;
3807 bus->sd_rxchain = false;
3813 brcmf_sdbrcm_watchdog_thread(void *data)
3815 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3817 allow_signal(SIGTERM);
3818 /* Run until signal received */
3820 if (kthread_should_stop())
3822 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3823 brcmf_sdbrcm_bus_watchdog(bus);
3824 /* Count the tick for reference */
3833 brcmf_sdbrcm_watchdog(unsigned long data)
3835 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3837 if (bus->watchdog_tsk) {
3838 complete(&bus->watchdog_wait);
3839 /* Reschedule the watchdog */
3840 if (bus->wd_timer_valid)
3841 mod_timer(&bus->timer,
3842 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3846 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3848 brcmf_dbg(TRACE, "Enter\n");
3851 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3852 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3853 brcmf_sdio_chip_detach(&bus->ci);
3854 if (bus->vars && bus->varsz)
3859 brcmf_dbg(TRACE, "Disconnected\n");
3862 /* Detach and free everything */
3863 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3865 brcmf_dbg(TRACE, "Enter\n");
3868 /* De-register interrupt handler */
3869 brcmf_sdcard_intr_dereg(bus->sdiodev);
3871 if (bus->sdiodev->bus_if->drvr) {
3872 brcmf_detach(bus->sdiodev->dev);
3873 brcmf_sdbrcm_release_dongle(bus);
3876 brcmf_sdbrcm_release_malloc(bus);
3881 brcmf_dbg(TRACE, "Disconnected\n");
3884 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3887 struct brcmf_sdio *bus;
3889 brcmf_dbg(TRACE, "Enter\n");
3891 /* We make an assumption about address window mappings:
3892 * regsva == SI_ENUM_BASE*/
3894 /* Allocate private bus interface state */
3895 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3899 bus->sdiodev = sdiodev;
3901 skb_queue_head_init(&bus->glom);
3902 bus->txbound = BRCMF_TXBOUND;
3903 bus->rxbound = BRCMF_RXBOUND;
3904 bus->txminmax = BRCMF_TXMINMAX;
3905 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3906 bus->usebufpool = false; /* Use bufpool if allocated,
3907 else use locally malloced rxbuf */
3909 /* attempt to attach to the dongle */
3910 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3911 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
3915 spin_lock_init(&bus->txqlock);
3916 init_waitqueue_head(&bus->ctrl_wait);
3917 init_waitqueue_head(&bus->dcmd_resp_wait);
3919 /* Set up the watchdog timer */
3920 init_timer(&bus->timer);
3921 bus->timer.data = (unsigned long)bus;
3922 bus->timer.function = brcmf_sdbrcm_watchdog;
3924 /* Initialize thread based operation and lock */
3925 sema_init(&bus->sdsem, 1);
3927 /* Initialize watchdog thread */
3928 init_completion(&bus->watchdog_wait);
3929 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3930 bus, "brcmf_watchdog");
3931 if (IS_ERR(bus->watchdog_tsk)) {
3932 pr_warn("brcmf_watchdog thread failed to start\n");
3933 bus->watchdog_tsk = NULL;
3935 /* Initialize DPC thread */
3936 init_completion(&bus->dpc_wait);
3937 INIT_LIST_HEAD(&bus->dpc_tsklst);
3938 spin_lock_init(&bus->dpc_tl_lock);
3939 bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
3941 if (IS_ERR(bus->dpc_tsk)) {
3942 pr_warn("brcmf_dpc thread failed to start\n");
3943 bus->dpc_tsk = NULL;
3946 /* Assign bus interface call back */
3947 bus->sdiodev->bus_if->brcmf_bus_stop = brcmf_sdbrcm_bus_stop;
3948 bus->sdiodev->bus_if->brcmf_bus_init = brcmf_sdbrcm_bus_init;
3949 bus->sdiodev->bus_if->brcmf_bus_txdata = brcmf_sdbrcm_bus_txdata;
3950 bus->sdiodev->bus_if->brcmf_bus_txctl = brcmf_sdbrcm_bus_txctl;
3951 bus->sdiodev->bus_if->brcmf_bus_rxctl = brcmf_sdbrcm_bus_rxctl;
3952 /* Attach to the brcmf/OS/network interface */
3953 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
3955 brcmf_dbg(ERROR, "brcmf_attach failed\n");
3959 /* Allocate buffers */
3960 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3961 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
3965 if (!(brcmf_sdbrcm_probe_init(bus))) {
3966 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
3970 /* Register interrupt callback, but mask it (not operational yet). */
3971 brcmf_dbg(INTR, "disable SDIO interrupts (not interested yet)\n");
3972 ret = brcmf_sdcard_intr_reg(bus->sdiodev);
3974 brcmf_dbg(ERROR, "FAILED: sdcard_intr_reg returned %d\n", ret);
3977 brcmf_dbg(INTR, "registered SDIO interrupt function ok\n");
3979 brcmf_dbg(INFO, "completed!!\n");
3981 /* if firmware path present try to download and bring up bus */
3982 ret = brcmf_bus_start(bus->sdiodev->dev);
3984 if (ret == -ENOLINK) {
3985 brcmf_dbg(ERROR, "dongle is not responding\n");
3990 /* add interface and open for business */
3991 if (brcmf_add_if(bus->sdiodev->dev, 0, "wlan%d", NULL)) {
3992 brcmf_dbg(ERROR, "Add primary net device interface failed!!\n");
3999 brcmf_sdbrcm_release(bus);
4003 void brcmf_sdbrcm_disconnect(void *ptr)
4005 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4007 brcmf_dbg(TRACE, "Enter\n");
4010 brcmf_sdbrcm_release(bus);
4012 brcmf_dbg(TRACE, "Disconnected\n");
4016 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4018 /* Totally stop the timer */
4019 if (!wdtick && bus->wd_timer_valid) {
4020 del_timer_sync(&bus->timer);
4021 bus->wd_timer_valid = false;
4022 bus->save_ms = wdtick;
4026 /* don't start the wd until fw is loaded */
4027 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4031 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4032 if (bus->wd_timer_valid)
4033 /* Stop timer and restart at new value */
4034 del_timer_sync(&bus->timer);
4036 /* Create timer again when watchdog period is
4037 dynamically changed or in the first instance
4039 bus->timer.expires =
4040 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4041 add_timer(&bus->timer);
4044 /* Re arm the timer, at last watchdog period */
4045 mod_timer(&bus->timer,
4046 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4049 bus->wd_timer_valid = true;
4050 bus->save_ms = wdtick;
projects / linux-flexiantxendom0-3.2.10.git / blob