drivers/net/wireless/brcm80211/brcmsmac/main.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18
  19 #include <linux/pci_ids.h>
  20 #include <linux/if_ether.h>
  21 #include <net/mac80211.h>
  22 #include <brcm_hw_ids.h>
  23 #include <aiutils.h>
  24 #include <chipcommon.h>
  25 #include "rate.h"
  26 #include "scb.h"
  27 #include "phy/phy_hal.h"
  28 #include "channel.h"
  29 #include "antsel.h"
  30 #include "stf.h"
  31 #include "ampdu.h"
  32 #include "mac80211_if.h"
  33 #include "ucode_loader.h"
  34 #include "main.h"
  35 #include "soc.h"
  36
  37 /*
  38  * Indication for txflowcontrol that all priority bits in
  39  * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
  40  */
  41 #define ALLPRIO                         -1
  42
  43 /* watchdog timer, in unit of ms */
  44 #define TIMER_INTERVAL_WATCHDOG         1000
  45 /* radio monitor timer, in unit of ms */
  46 #define TIMER_INTERVAL_RADIOCHK         800
  47
  48 /* beacon interval, in unit of 1024TU */
  49 #define BEACON_INTERVAL_DEFAULT         100
  50
  51 /* n-mode support capability */
  52 /* 2x2 includes both 1x1 & 2x2 devices
  53  * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
  54  * control it independently
  55  */
  56 #define WL_11N_2x2                      1
  57 #define WL_11N_3x3                      3
  58 #define WL_11N_4x4                      4
  59
  60 #define EDCF_ACI_MASK                   0x60
  61 #define EDCF_ACI_SHIFT                  5
  62 #define EDCF_ECWMIN_MASK                0x0f
  63 #define EDCF_ECWMAX_SHIFT               4
  64 #define EDCF_AIFSN_MASK                 0x0f
  65 #define EDCF_AIFSN_MAX                  15
  66 #define EDCF_ECWMAX_MASK                0xf0
  67
  68 #define EDCF_AC_BE_TXOP_STA             0x0000
  69 #define EDCF_AC_BK_TXOP_STA             0x0000
  70 #define EDCF_AC_VO_ACI_STA              0x62
  71 #define EDCF_AC_VO_ECW_STA              0x32
  72 #define EDCF_AC_VI_ACI_STA              0x42
  73 #define EDCF_AC_VI_ECW_STA              0x43
  74 #define EDCF_AC_BK_ECW_STA              0xA4
  75 #define EDCF_AC_VI_TXOP_STA             0x005e
  76 #define EDCF_AC_VO_TXOP_STA             0x002f
  77 #define EDCF_AC_BE_ACI_STA              0x03
  78 #define EDCF_AC_BE_ECW_STA              0xA4
  79 #define EDCF_AC_BK_ACI_STA              0x27
  80 #define EDCF_AC_VO_TXOP_AP              0x002f
  81
  82 #define EDCF_TXOP2USEC(txop)            ((txop) << 5)
  83 #define EDCF_ECW2CW(exp)                ((1 << (exp)) - 1)
  84
  85 #define APHY_SYMBOL_TIME                4
  86 #define APHY_PREAMBLE_TIME              16
  87 #define APHY_SIGNAL_TIME                4
  88 #define APHY_SIFS_TIME                  16
  89 #define APHY_SERVICE_NBITS              16
  90 #define APHY_TAIL_NBITS                 6
  91 #define BPHY_SIFS_TIME                  10
  92 #define BPHY_PLCP_SHORT_TIME            96
  93
  94 #define PREN_PREAMBLE                   24
  95 #define PREN_MM_EXT                     12
  96 #define PREN_PREAMBLE_EXT               4
  97
  98 #define DOT11_MAC_HDR_LEN               24
  99 #define DOT11_ACK_LEN                   10
 100 #define DOT11_BA_LEN                    4
 101 #define DOT11_OFDM_SIGNAL_EXTENSION     6
 102 #define DOT11_MIN_FRAG_LEN              256
 103 #define DOT11_RTS_LEN                   16
 104 #define DOT11_CTS_LEN                   10
 105 #define DOT11_BA_BITMAP_LEN             128
 106 #define DOT11_MIN_BEACON_PERIOD         1
 107 #define DOT11_MAX_BEACON_PERIOD         0xFFFF
 108 #define DOT11_MAXNUMFRAGS               16
 109 #define DOT11_MAX_FRAG_LEN              2346
 110
 111 #define BPHY_PLCP_TIME                  192
 112 #define RIFS_11N_TIME                   2
 113
 114 /* length of the BCN template area */
 115 #define BCN_TMPL_LEN                    512
 116
 117 /* brcms_bss_info flag bit values */
 118 #define BRCMS_BSS_HT                    0x0020  /* BSS is HT (MIMO) capable */
 119
 120 /* chip rx buffer offset */
 121 #define BRCMS_HWRXOFF                   38
 122
 123 /* rfdisable delay timer 500 ms, runs of ALP clock */
 124 #define RFDISABLE_DEFAULT               10000000
 125
 126 #define BRCMS_TEMPSENSE_PERIOD          10      /* 10 second timeout */
 127
 128 /* precedences numbers for wlc queues. These are twice as may levels as
 129  * 802.1D priorities.
 130  * Odd numbers are used for HI priority traffic at same precedence levels
 131  * These constants are used ONLY by wlc_prio2prec_map.  Do not use them
 132  * elsewhere.
 133  */
 134 #define _BRCMS_PREC_NONE                0       /* None = - */
 135 #define _BRCMS_PREC_BK                  2       /* BK - Background */
 136 #define _BRCMS_PREC_BE                  4       /* BE - Best-effort */
 137 #define _BRCMS_PREC_EE                  6       /* EE - Excellent-effort */
 138 #define _BRCMS_PREC_CL                  8       /* CL - Controlled Load */
 139 #define _BRCMS_PREC_VI                  10      /* Vi - Video */
 140 #define _BRCMS_PREC_VO                  12      /* Vo - Voice */
 141 #define _BRCMS_PREC_NC                  14      /* NC - Network Control */
 142
 143 /* synthpu_dly times in us */
 144 #define SYNTHPU_DLY_APHY_US             3700
 145 #define SYNTHPU_DLY_BPHY_US             1050
 146 #define SYNTHPU_DLY_NPHY_US             2048
 147 #define SYNTHPU_DLY_LPPHY_US            300
 148
 149 #define ANTCNT                          10      /* vanilla M_MAX_ANTCNT val */
 150
 151 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
 152 #define EDCF_SHORT_S                    0
 153 #define EDCF_SFB_S                      4
 154 #define EDCF_LONG_S                     8
 155 #define EDCF_LFB_S                      12
 156 #define EDCF_SHORT_M                    BITFIELD_MASK(4)
 157 #define EDCF_SFB_M                      BITFIELD_MASK(4)
 158 #define EDCF_LONG_M                     BITFIELD_MASK(4)
 159 #define EDCF_LFB_M                      BITFIELD_MASK(4)
 160
 161 #define RETRY_SHORT_DEF                 7       /* Default Short retry Limit */
 162 #define RETRY_SHORT_MAX                 255     /* Maximum Short retry Limit */
 163 #define RETRY_LONG_DEF                  4       /* Default Long retry count */
 164 #define RETRY_SHORT_FB                  3       /* Short count for fb rate */
 165 #define RETRY_LONG_FB                   2       /* Long count for fb rate */
 166
 167 #define APHY_CWMIN                      15
 168 #define PHY_CWMAX                       1023
 169
 170 #define EDCF_AIFSN_MIN                  1
 171
 172 #define FRAGNUM_MASK                    0xF
 173
 174 #define APHY_SLOT_TIME                  9
 175 #define BPHY_SLOT_TIME                  20
 176
 177 #define WL_SPURAVOID_OFF                0
 178 #define WL_SPURAVOID_ON1                1
 179 #define WL_SPURAVOID_ON2                2
 180
 181 /* invalid core flags, use the saved coreflags */
 182 #define BRCMS_USE_COREFLAGS             0xffffffff
 183
 184 /* values for PLCPHdr_override */
 185 #define BRCMS_PLCP_AUTO                 -1
 186 #define BRCMS_PLCP_SHORT                0
 187 #define BRCMS_PLCP_LONG                 1
 188
 189 /* values for g_protection_override and n_protection_override */
 190 #define BRCMS_PROTECTION_AUTO           -1
 191 #define BRCMS_PROTECTION_OFF            0
 192 #define BRCMS_PROTECTION_ON             1
 193 #define BRCMS_PROTECTION_MMHDR_ONLY     2
 194 #define BRCMS_PROTECTION_CTS_ONLY       3
 195
 196 /* values for g_protection_control and n_protection_control */
 197 #define BRCMS_PROTECTION_CTL_OFF        0
 198 #define BRCMS_PROTECTION_CTL_LOCAL      1
 199 #define BRCMS_PROTECTION_CTL_OVERLAP    2
 200
 201 /* values for n_protection */
 202 #define BRCMS_N_PROTECTION_OFF          0
 203 #define BRCMS_N_PROTECTION_OPTIONAL     1
 204 #define BRCMS_N_PROTECTION_20IN40       2
 205 #define BRCMS_N_PROTECTION_MIXEDMODE    3
 206
 207 /* values for band specific 40MHz capabilities */
 208 #define BRCMS_N_BW_20ALL                0
 209 #define BRCMS_N_BW_40ALL                1
 210 #define BRCMS_N_BW_20IN2G_40IN5G        2
 211
 212 /* bitflags for SGI support (sgi_rx iovar) */
 213 #define BRCMS_N_SGI_20                  0x01
 214 #define BRCMS_N_SGI_40                  0x02
 215
 216 /* defines used by the nrate iovar */
 217 /* MSC in use,indicates b0-6 holds an mcs */
 218 #define NRATE_MCS_INUSE                 0x00000080
 219 /* rate/mcs value */
 220 #define NRATE_RATE_MASK                 0x0000007f
 221 /* stf mode mask: siso, cdd, stbc, sdm */
 222 #define NRATE_STF_MASK                  0x0000ff00
 223 /* stf mode shift */
 224 #define NRATE_STF_SHIFT                 8
 225 /* bit indicate to override mcs only */
 226 #define NRATE_OVERRIDE_MCS_ONLY         0x40000000
 227 #define NRATE_SGI_MASK                  0x00800000      /* sgi mode */
 228 #define NRATE_SGI_SHIFT                 23              /* sgi mode */
 229 #define NRATE_LDPC_CODING               0x00400000      /* adv coding in use */
 230 #define NRATE_LDPC_SHIFT                22              /* ldpc shift */
 231
 232 #define NRATE_STF_SISO                  0               /* stf mode SISO */
 233 #define NRATE_STF_CDD                   1               /* stf mode CDD */
 234 #define NRATE_STF_STBC                  2               /* stf mode STBC */
 235 #define NRATE_STF_SDM                   3               /* stf mode SDM */
 236
 237 #define MAX_DMA_SEGS                    4
 238
 239 /* Max # of entries in Tx FIFO based on 4kb page size */
 240 #define NTXD                            256
 241 /* Max # of entries in Rx FIFO based on 4kb page size */
 242 #define NRXD                            256
 243
 244 /* try to keep this # rbufs posted to the chip */
 245 #define NRXBUFPOST                      32
 246
 247 /* data msg txq hiwat mark */
 248 #define BRCMS_DATAHIWAT                 50
 249
 250 /* max # frames to process in brcms_c_recv() */
 251 #define RXBND                           8
 252 /* max # tx status to process in wlc_txstatus() */
 253 #define TXSBND                          8
 254
 255 /* brcmu_format_flags() bit description structure */
 256 struct brcms_c_bit_desc {
 257         u32 bit;
 258         const char *name;
 259 };
 260
 261 /*
 262  * The following table lists the buffer memory allocated to xmt fifos in HW.
 263  * the size is in units of 256bytes(one block), total size is HW dependent
 264  * ucode has default fifo partition, sw can overwrite if necessary
 265  *
 266  * This is documented in twiki under the topic UcodeTxFifo. Please ensure
 267  * the twiki is updated before making changes.
 268  */
 269
 270 /* Starting corerev for the fifo size table */
 271 #define XMTFIFOTBL_STARTREV     20
 272
 273 struct d11init {
 274         __le16 addr;
 275         __le16 size;
 276         __le32 value;
 277 };
 278
 279 struct edcf_acparam {
 280         u8 ACI;
 281         u8 ECW;
 282         u16 TXOP;
 283 } __packed;
 284
 285 const u8 prio2fifo[NUMPRIO] = {
 286         TX_AC_BE_FIFO,          /* 0    BE      AC_BE   Best Effort */
 287         TX_AC_BK_FIFO,          /* 1    BK      AC_BK   Background */
 288         TX_AC_BK_FIFO,          /* 2    --      AC_BK   Background */
 289         TX_AC_BE_FIFO,          /* 3    EE      AC_BE   Best Effort */
 290         TX_AC_VI_FIFO,          /* 4    CL      AC_VI   Video */
 291         TX_AC_VI_FIFO,          /* 5    VI      AC_VI   Video */
 292         TX_AC_VO_FIFO,          /* 6    VO      AC_VO   Voice */
 293         TX_AC_VO_FIFO           /* 7    NC      AC_VO   Voice */
 294 };
 295
 296 /* debug/trace */
 297 uint brcm_msg_level =
 298 #if defined(DEBUG)
 299         LOG_ERROR_VAL;
 300 #else
 301         0;
 302 #endif                          /* DEBUG */
 303
 304 /* TX FIFO number to WME/802.1E Access Category */
 305 static const u8 wme_fifo2ac[] = {
 306         IEEE80211_AC_BK,
 307         IEEE80211_AC_BE,
 308         IEEE80211_AC_VI,
 309         IEEE80211_AC_VO,
 310         IEEE80211_AC_BE,
 311         IEEE80211_AC_BE
 312 };
 313
 314 /* ieee80211 Access Category to TX FIFO number */
 315 static const u8 wme_ac2fifo[] = {
 316         TX_AC_VO_FIFO,
 317         TX_AC_VI_FIFO,
 318         TX_AC_BE_FIFO,
 319         TX_AC_BK_FIFO
 320 };
 321
 322 /* 802.1D Priority to precedence queue mapping */
 323 const u8 wlc_prio2prec_map[] = {
 324         _BRCMS_PREC_BE,         /* 0 BE - Best-effort */
 325         _BRCMS_PREC_BK,         /* 1 BK - Background */
 326         _BRCMS_PREC_NONE,               /* 2 None = - */
 327         _BRCMS_PREC_EE,         /* 3 EE - Excellent-effort */
 328         _BRCMS_PREC_CL,         /* 4 CL - Controlled Load */
 329         _BRCMS_PREC_VI,         /* 5 Vi - Video */
 330         _BRCMS_PREC_VO,         /* 6 Vo - Voice */
 331         _BRCMS_PREC_NC,         /* 7 NC - Network Control */
 332 };
 333
 334 static const u16 xmtfifo_sz[][NFIFO] = {
 335         /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
 336         {20, 192, 192, 21, 17, 5},
 337         /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
 338         {9, 58, 22, 14, 14, 5},
 339         /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
 340         {20, 192, 192, 21, 17, 5},
 341         /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
 342         {20, 192, 192, 21, 17, 5},
 343         /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
 344         {9, 58, 22, 14, 14, 5},
 345 };
 346
 347 #ifdef DEBUG
 348 static const char * const fifo_names[] = {
 349         "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
 350 #else
 351 static const char fifo_names[6][0];
 352 #endif
 353
 354 #ifdef DEBUG
 355 /* pointer to most recently allocated wl/wlc */
 356 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
 357 #endif
 358
 359 /* Find basic rate for a given rate */
 360 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
 361 {
 362         if (is_mcs_rate(rspec))
 363                 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
 364                        .leg_ofdm];
 365         return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
 366 }
 367
 368 static u16 frametype(u32 rspec, u8 mimoframe)
 369 {
 370         if (is_mcs_rate(rspec))
 371                 return mimoframe;
 372         return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
 373 }
 374
 375 /* currently the best mechanism for determining SIFS is the band in use */
 376 static u16 get_sifs(struct brcms_band *band)
 377 {
 378         return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
 379                                  BPHY_SIFS_TIME;
 380 }
 381
 382 /*
 383  * Detect Card removed.
 384  * Even checking an sbconfig register read will not false trigger when the core
 385  * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
 386  * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
 387  * reg with fixed 0/1 pattern (some platforms return all 0).
 388  * If clocks are present, call the sb routine which will figure out if the
 389  * device is removed.
 390  */
 391 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
 392 {
 393         u32 macctrl;
 394
 395         if (!wlc->hw->clk)
 396                 return ai_deviceremoved(wlc->hw->sih);
 397         macctrl = bcma_read32(wlc->hw->d11core,
 398                               D11REGOFFS(maccontrol));
 399         return (macctrl & (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
 400 }
 401
 402 /* sum the individual fifo tx pending packet counts */
 403 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
 404 {
 405         return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
 406                wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
 407 }
 408
 409 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
 410 {
 411         return wlc->pub->_nbands > 1 && !wlc->bandlocked;
 412 }
 413
 414 static int brcms_chspec_bw(u16 chanspec)
 415 {
 416         if (CHSPEC_IS40(chanspec))
 417                 return BRCMS_40_MHZ;
 418         if (CHSPEC_IS20(chanspec))
 419                 return BRCMS_20_MHZ;
 420
 421         return BRCMS_10_MHZ;
 422 }
 423
 424 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
 425 {
 426         if (cfg == NULL)
 427                 return;
 428
 429         kfree(cfg->current_bss);
 430         kfree(cfg);
 431 }
 432
 433 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
 434 {
 435         if (wlc == NULL)
 436                 return;
 437
 438         brcms_c_bsscfg_mfree(wlc->bsscfg);
 439         kfree(wlc->pub);
 440         kfree(wlc->modulecb);
 441         kfree(wlc->default_bss);
 442         kfree(wlc->protection);
 443         kfree(wlc->stf);
 444         kfree(wlc->bandstate[0]);
 445         kfree(wlc->corestate->macstat_snapshot);
 446         kfree(wlc->corestate);
 447         kfree(wlc->hw->bandstate[0]);
 448         kfree(wlc->hw);
 449
 450         /* free the wlc */
 451         kfree(wlc);
 452         wlc = NULL;
 453 }
 454
 455 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
 456 {
 457         struct brcms_bss_cfg *cfg;
 458
 459         cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
 460         if (cfg == NULL)
 461                 goto fail;
 462
 463         cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
 464         if (cfg->current_bss == NULL)
 465                 goto fail;
 466
 467         return cfg;
 468
 469  fail:
 470         brcms_c_bsscfg_mfree(cfg);
 471         return NULL;
 472 }
 473
 474 static struct brcms_c_info *
 475 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
 476 {
 477         struct brcms_c_info *wlc;
 478
 479         wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
 480         if (wlc == NULL) {
 481                 *err = 1002;
 482                 goto fail;
 483         }
 484
 485         /* allocate struct brcms_c_pub state structure */
 486         wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
 487         if (wlc->pub == NULL) {
 488                 *err = 1003;
 489                 goto fail;
 490         }
 491         wlc->pub->wlc = wlc;
 492
 493         /* allocate struct brcms_hardware state structure */
 494
 495         wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
 496         if (wlc->hw == NULL) {
 497                 *err = 1005;
 498                 goto fail;
 499         }
 500         wlc->hw->wlc = wlc;
 501
 502         wlc->hw->bandstate[0] =
 503                 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
 504         if (wlc->hw->bandstate[0] == NULL) {
 505                 *err = 1006;
 506                 goto fail;
 507         } else {
 508                 int i;
 509
 510                 for (i = 1; i < MAXBANDS; i++)
 511                         wlc->hw->bandstate[i] = (struct brcms_hw_band *)
 512                             ((unsigned long)wlc->hw->bandstate[0] +
 513                              (sizeof(struct brcms_hw_band) * i));
 514         }
 515
 516         wlc->modulecb =
 517                 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
 518         if (wlc->modulecb == NULL) {
 519                 *err = 1009;
 520                 goto fail;
 521         }
 522
 523         wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
 524         if (wlc->default_bss == NULL) {
 525                 *err = 1010;
 526                 goto fail;
 527         }
 528
 529         wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
 530         if (wlc->bsscfg == NULL) {
 531                 *err = 1011;
 532                 goto fail;
 533         }
 534
 535         wlc->protection = kzalloc(sizeof(struct brcms_protection),
 536                                   GFP_ATOMIC);
 537         if (wlc->protection == NULL) {
 538                 *err = 1016;
 539                 goto fail;
 540         }
 541
 542         wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
 543         if (wlc->stf == NULL) {
 544                 *err = 1017;
 545                 goto fail;
 546         }
 547
 548         wlc->bandstate[0] =
 549                 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
 550         if (wlc->bandstate[0] == NULL) {
 551                 *err = 1025;
 552                 goto fail;
 553         } else {
 554                 int i;
 555
 556                 for (i = 1; i < MAXBANDS; i++)
 557                         wlc->bandstate[i] = (struct brcms_band *)
 558                                 ((unsigned long)wlc->bandstate[0]
 559                                 + (sizeof(struct brcms_band)*i));
 560         }
 561
 562         wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
 563         if (wlc->corestate == NULL) {
 564                 *err = 1026;
 565                 goto fail;
 566         }
 567
 568         wlc->corestate->macstat_snapshot =
 569                 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
 570         if (wlc->corestate->macstat_snapshot == NULL) {
 571                 *err = 1027;
 572                 goto fail;
 573         }
 574
 575         return wlc;
 576
 577  fail:
 578         brcms_c_detach_mfree(wlc);
 579         return NULL;
 580 }
 581
 582 /*
 583  * Update the slot timing for standard 11b/g (20us slots)
 584  * or shortslot 11g (9us slots)
 585  * The PSM needs to be suspended for this call.
 586  */
 587 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
 588                                         bool shortslot)
 589 {
 590         struct bcma_device *core = wlc_hw->d11core;
 591
 592         if (shortslot) {
 593                 /* 11g short slot: 11a timing */
 594                 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0207);
 595                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
 596         } else {
 597                 /* 11g long slot: 11b timing */
 598                 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0212);
 599                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
 600         }
 601 }
 602
 603 /*
 604  * calculate frame duration of a given rate and length, return
 605  * time in usec unit
 606  */
 607 static uint brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
 608                                     u8 preamble_type, uint mac_len)
 609 {
 610         uint nsyms, dur = 0, Ndps, kNdps;
 611         uint rate = rspec2rate(ratespec);
 612
 613         if (rate == 0) {
 614                 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
 615                           wlc->pub->unit);
 616                 rate = BRCM_RATE_1M;
 617         }
 618
 619         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
 620                  wlc->pub->unit, ratespec, preamble_type, mac_len);
 621
 622         if (is_mcs_rate(ratespec)) {
 623                 uint mcs = ratespec & RSPEC_RATE_MASK;
 624                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
 625
 626                 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
 627                 if (preamble_type == BRCMS_MM_PREAMBLE)
 628                         dur += PREN_MM_EXT;
 629                 /* 1000Ndbps = kbps * 4 */
 630                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
 631                                    rspec_issgi(ratespec)) * 4;
 632
 633                 if (rspec_stc(ratespec) == 0)
 634                         nsyms =
 635                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
 636                                   APHY_TAIL_NBITS) * 1000, kNdps);
 637                 else
 638                         /* STBC needs to have even number of symbols */
 639                         nsyms =
 640                             2 *
 641                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
 642                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
 643
 644                 dur += APHY_SYMBOL_TIME * nsyms;
 645                 if (wlc->band->bandtype == BRCM_BAND_2G)
 646                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
 647         } else if (is_ofdm_rate(rate)) {
 648                 dur = APHY_PREAMBLE_TIME;
 649                 dur += APHY_SIGNAL_TIME;
 650                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
 651                 Ndps = rate * 2;
 652                 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
 653                 nsyms =
 654                     CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
 655                          Ndps);
 656                 dur += APHY_SYMBOL_TIME * nsyms;
 657                 if (wlc->band->bandtype == BRCM_BAND_2G)
 658                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
 659         } else {
 660                 /*
 661                  * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
 662                  * will divide out
 663                  */
 664                 mac_len = mac_len * 8 * 2;
 665                 /* calc ceiling of bits/rate = microseconds of air time */
 666                 dur = (mac_len + rate - 1) / rate;
 667                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
 668                         dur += BPHY_PLCP_SHORT_TIME;
 669                 else
 670                         dur += BPHY_PLCP_TIME;
 671         }
 672         return dur;
 673 }
 674
 675 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
 676                                 const struct d11init *inits)
 677 {
 678         struct bcma_device *core = wlc_hw->d11core;
 679         int i;
 680         uint offset;
 681         u16 size;
 682         u32 value;
 683
 684         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
 685
 686         for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
 687                 size = le16_to_cpu(inits[i].size);
 688                 offset = le16_to_cpu(inits[i].addr);
 689                 value = le32_to_cpu(inits[i].value);
 690                 if (size == 2)
 691                         bcma_write16(core, offset, value);
 692                 else if (size == 4)
 693                         bcma_write32(core, offset, value);
 694                 else
 695                         break;
 696         }
 697 }
 698
 699 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
 700 {
 701         u8 idx;
 702         u16 addr[] = {
 703                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
 704                 M_HOST_FLAGS5
 705         };
 706
 707         for (idx = 0; idx < MHFMAX; idx++)
 708                 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
 709 }
 710
 711 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
 712 {
 713         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
 714         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
 715
 716         /* init microcode host flags */
 717         brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
 718
 719         /* do band-specific ucode IHR, SHM, and SCR inits */
 720         if (D11REV_IS(wlc_hw->corerev, 23)) {
 721                 if (BRCMS_ISNPHY(wlc_hw->band))
 722                         brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
 723                 else
 724                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
 725                                   " %d\n", __func__, wlc_hw->unit,
 726                                   wlc_hw->corerev);
 727         } else {
 728                 if (D11REV_IS(wlc_hw->corerev, 24)) {
 729                         if (BRCMS_ISLCNPHY(wlc_hw->band))
 730                                 brcms_c_write_inits(wlc_hw,
 731                                                     ucode->d11lcn0bsinitvals24);
 732                         else
 733                                 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
 734                                           " core rev %d\n", __func__,
 735                                           wlc_hw->unit, wlc_hw->corerev);
 736                 } else {
 737                         wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
 738                                 __func__, wlc_hw->unit, wlc_hw->corerev);
 739                 }
 740         }
 741 }
 742
 743 static void brcms_b_core_ioctl(struct brcms_hardware *wlc_hw, u32 m, u32 v)
 744 {
 745         struct bcma_device *core = wlc_hw->d11core;
 746         u32 ioctl = bcma_aread32(core, BCMA_IOCTL) & ~m;
 747
 748         bcma_awrite32(core, BCMA_IOCTL, ioctl | v);
 749 }
 750
 751 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
 752 {
 753         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
 754
 755         wlc_hw->phyclk = clk;
 756
 757         if (OFF == clk) {       /* clear gmode bit, put phy into reset */
 758
 759                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC | SICF_GMODE),
 760                                    (SICF_PRST | SICF_FGC));
 761                 udelay(1);
 762                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_PRST);
 763                 udelay(1);
 764
 765         } else {                /* take phy out of reset */
 766
 767                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_FGC);
 768                 udelay(1);
 769                 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
 770                 udelay(1);
 771
 772         }
 773 }
 774
 775 /* low-level band switch utility routine */
 776 static void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
 777 {
 778         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
 779                 bandunit);
 780
 781         wlc_hw->band = wlc_hw->bandstate[bandunit];
 782
 783         /*
 784          * BMAC_NOTE:
 785          *   until we eliminate need for wlc->band refs in low level code
 786          */
 787         wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
 788
 789         /* set gmode core flag */
 790         if (wlc_hw->sbclk && !wlc_hw->noreset) {
 791                 u32 gmode = 0;
 792
 793                 if (bandunit == 0)
 794                         gmode = SICF_GMODE;
 795
 796                 brcms_b_core_ioctl(wlc_hw, SICF_GMODE, gmode);
 797         }
 798 }
 799
 800 /* switch to new band but leave it inactive */
 801 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
 802 {
 803         struct brcms_hardware *wlc_hw = wlc->hw;
 804         u32 macintmask;
 805         u32 macctrl;
 806
 807         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
 808         macctrl = bcma_read32(wlc_hw->d11core,
 809                               D11REGOFFS(maccontrol));
 810         WARN_ON((macctrl & MCTL_EN_MAC) != 0);
 811
 812         /* disable interrupts */
 813         macintmask = brcms_intrsoff(wlc->wl);
 814
 815         /* radio off */
 816         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
 817
 818         brcms_b_core_phy_clk(wlc_hw, OFF);
 819
 820         brcms_c_setxband(wlc_hw, bandunit);
 821
 822         return macintmask;
 823 }
 824
 825 /* process an individual struct tx_status */
 826 static bool
 827 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
 828 {
 829         struct sk_buff *p;
 830         uint queue;
 831         struct d11txh *txh;
 832         struct scb *scb = NULL;
 833         bool free_pdu;
 834         int tx_rts, tx_frame_count, tx_rts_count;
 835         uint totlen, supr_status;
 836         bool lastframe;
 837         struct ieee80211_hdr *h;
 838         u16 mcl;
 839         struct ieee80211_tx_info *tx_info;
 840         struct ieee80211_tx_rate *txrate;
 841         int i;
 842
 843         /* discard intermediate indications for ucode with one legitimate case:
 844          *   e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
 845          *   but the subsequent tx of DATA failed. so it will start rts/cts
 846          *   from the beginning (resetting the rts transmission count)
 847          */
 848         if (!(txs->status & TX_STATUS_AMPDU)
 849             && (txs->status & TX_STATUS_INTERMEDIATE)) {
 850                 wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n",
 851                           __func__);
 852                 return false;
 853         }
 854
 855         queue = txs->frameid & TXFID_QUEUE_MASK;
 856         if (queue >= NFIFO) {
 857                 p = NULL;
 858                 goto fatal;
 859         }
 860
 861         p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
 862         if (p == NULL)
 863                 goto fatal;
 864
 865         txh = (struct d11txh *) (p->data);
 866         mcl = le16_to_cpu(txh->MacTxControlLow);
 867
 868         if (txs->phyerr) {
 869                 if (brcm_msg_level & LOG_ERROR_VAL) {
 870                         wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
 871                                   txs->phyerr, txh->MainRates);
 872                         brcms_c_print_txdesc(txh);
 873                 }
 874                 brcms_c_print_txstatus(txs);
 875         }
 876
 877         if (txs->frameid != le16_to_cpu(txh->TxFrameID))
 878                 goto fatal;
 879         tx_info = IEEE80211_SKB_CB(p);
 880         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
 881
 882         if (tx_info->control.sta)
 883                 scb = &wlc->pri_scb;
 884
 885         if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
 886                 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
 887                 return false;
 888         }
 889
 890         supr_status = txs->status & TX_STATUS_SUPR_MASK;
 891         if (supr_status == TX_STATUS_SUPR_BADCH)
 892                 BCMMSG(wlc->wiphy,
 893                        "%s: Pkt tx suppressed, possibly channel %d\n",
 894                        __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
 895
 896         tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
 897         tx_frame_count =
 898             (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
 899         tx_rts_count =
 900             (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
 901
 902         lastframe = !ieee80211_has_morefrags(h->frame_control);
 903
 904         if (!lastframe) {
 905                 wiphy_err(wlc->wiphy, "Not last frame!\n");
 906         } else {
 907                 /*
 908                  * Set information to be consumed by Minstrel ht.
 909                  *
 910                  * The "fallback limit" is the number of tx attempts a given
 911                  * MPDU is sent at the "primary" rate. Tx attempts beyond that
 912                  * limit are sent at the "secondary" rate.
 913                  * A 'short frame' does not exceed RTS treshold.
 914                  */
 915                 u16 sfbl,       /* Short Frame Rate Fallback Limit */
 916                     lfbl,       /* Long Frame Rate Fallback Limit */
 917                     fbl;
 918
 919                 if (queue < IEEE80211_NUM_ACS) {
 920                         sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
 921                                       EDCF_SFB);
 922                         lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
 923                                       EDCF_LFB);
 924                 } else {
 925                         sfbl = wlc->SFBL;
 926                         lfbl = wlc->LFBL;
 927                 }
 928
 929                 txrate = tx_info->status.rates;
 930                 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
 931                         fbl = lfbl;
 932                 else
 933                         fbl = sfbl;
 934
 935                 ieee80211_tx_info_clear_status(tx_info);
 936
 937                 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
 938                         /*
 939                          * rate selection requested a fallback rate
 940                          * and we used it
 941                          */
 942                         txrate[0].count = fbl;
 943                         txrate[1].count = tx_frame_count - fbl;
 944                 } else {
 945                         /*
 946                          * rate selection did not request fallback rate, or
 947                          * we didn't need it
 948                          */
 949                         txrate[0].count = tx_frame_count;
 950                         /*
 951                          * rc80211_minstrel.c:minstrel_tx_status() expects
 952                          * unused rates to be marked with idx = -1
 953                          */
 954                         txrate[1].idx = -1;
 955                         txrate[1].count = 0;
 956                 }
 957
 958                 /* clear the rest of the rates */
 959                 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
 960                         txrate[i].idx = -1;
 961                         txrate[i].count = 0;
 962                 }
 963
 964                 if (txs->status & TX_STATUS_ACK_RCV)
 965                         tx_info->flags |= IEEE80211_TX_STAT_ACK;
 966         }
 967
 968         totlen = p->len;
 969         free_pdu = true;
 970
 971         brcms_c_txfifo_complete(wlc, queue, 1);
 972
 973         if (lastframe) {
 974                 /* remove PLCP & Broadcom tx descriptor header */
 975                 skb_pull(p, D11_PHY_HDR_LEN);
 976                 skb_pull(p, D11_TXH_LEN);
 977                 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
 978         } else {
 979                 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
 980                           "tx_status\n", __func__);
 981         }
 982
 983         return false;
 984
 985  fatal:
 986         if (p)
 987                 brcmu_pkt_buf_free_skb(p);
 988
 989         return true;
 990
 991 }
 992
 993 /* process tx completion events in BMAC
 994  * Return true if more tx status need to be processed. false otherwise.
 995  */
 996 static bool
 997 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
 998 {
 999         bool morepending = false;
1000         struct brcms_c_info *wlc = wlc_hw->wlc;
1001         struct bcma_device *core;
1002         struct tx_status txstatus, *txs;
1003         u32 s1, s2;
1004         uint n = 0;
1005         /*
1006          * Param 'max_tx_num' indicates max. # tx status to process before
1007          * break out.
1008          */
1009         uint max_tx_num = bound ? TXSBND : -1;
1010
1011         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1012
1013         txs = &txstatus;
1014         core = wlc_hw->d11core;
1015         *fatal = false;
1016         s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1017         while (!(*fatal)
1018                && (s1 & TXS_V)) {
1019
1020                 if (s1 == 0xffffffff) {
1021                         wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1022                                 wlc_hw->unit, __func__);
1023                         return morepending;
1024                 }
1025                 s2 = bcma_read32(core, D11REGOFFS(frmtxstatus2));
1026
1027                 txs->status = s1 & TXS_STATUS_MASK;
1028                 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1029                 txs->sequence = s2 & TXS_SEQ_MASK;
1030                 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1031                 txs->lasttxtime = 0;
1032
1033                 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1034
1035                 /* !give others some time to run! */
1036                 if (++n >= max_tx_num)
1037                         break;
1038                 s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1039         }
1040
1041         if (*fatal)
1042                 return 0;
1043
1044         if (n >= max_tx_num)
1045                 morepending = true;
1046
1047         if (!pktq_empty(&wlc->pkt_queue->q))
1048                 brcms_c_send_q(wlc);
1049
1050         return morepending;
1051 }
1052
1053 static void brcms_c_tbtt(struct brcms_c_info *wlc)
1054 {
1055         if (!wlc->bsscfg->BSS)
1056                 /*
1057                  * DirFrmQ is now valid...defer setting until end
1058                  * of ATIM window
1059                  */
1060                 wlc->qvalid |= MCMD_DIRFRMQVAL;
1061 }
1062
1063 /* set initial host flags value */
1064 static void
1065 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1066 {
1067         struct brcms_hardware *wlc_hw = wlc->hw;
1068
1069         memset(mhfs, 0, MHFMAX * sizeof(u16));
1070
1071         mhfs[MHF2] |= mhf2_init;
1072
1073         /* prohibit use of slowclock on multifunction boards */
1074         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1075                 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1076
1077         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1078                 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1079                 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1080         }
1081 }
1082
1083 static uint
1084 dmareg(uint direction, uint fifonum)
1085 {
1086         if (direction == DMA_TX)
1087                 return offsetof(struct d11regs, fifo64regs[fifonum].dmaxmt);
1088         return offsetof(struct d11regs, fifo64regs[fifonum].dmarcv);
1089 }
1090
1091 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1092 {
1093         uint i;
1094         char name[8];
1095         /*
1096          * ucode host flag 2 needed for pio mode, independent of band and fifo
1097          */
1098         u16 pio_mhf2 = 0;
1099         struct brcms_hardware *wlc_hw = wlc->hw;
1100         uint unit = wlc_hw->unit;
1101         struct wiphy *wiphy = wlc->wiphy;
1102
1103         /* name and offsets for dma_attach */
1104         snprintf(name, sizeof(name), "wl%d", unit);
1105
1106         if (wlc_hw->di[0] == NULL) {    /* Init FIFOs */
1107                 int dma_attach_err = 0;
1108
1109                 /*
1110                  * FIFO 0
1111                  * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1112                  * RX: RX_FIFO (RX data packets)
1113                  */
1114                 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1115                                            (wme ? dmareg(DMA_TX, 0) : 0),
1116                                            dmareg(DMA_RX, 0),
1117                                            (wme ? NTXD : 0), NRXD,
1118                                            RXBUFSZ, -1, NRXBUFPOST,
1119                                            BRCMS_HWRXOFF, &brcm_msg_level);
1120                 dma_attach_err |= (NULL == wlc_hw->di[0]);
1121
1122                 /*
1123                  * FIFO 1
1124                  * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1125                  *   (legacy) TX_DATA_FIFO (TX data packets)
1126                  * RX: UNUSED
1127                  */
1128                 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1129                                            dmareg(DMA_TX, 1), 0,
1130                                            NTXD, 0, 0, -1, 0, 0,
1131                                            &brcm_msg_level);
1132                 dma_attach_err |= (NULL == wlc_hw->di[1]);
1133
1134                 /*
1135                  * FIFO 2
1136                  * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1137                  * RX: UNUSED
1138                  */
1139                 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1140                                            dmareg(DMA_TX, 2), 0,
1141                                            NTXD, 0, 0, -1, 0, 0,
1142                                            &brcm_msg_level);
1143                 dma_attach_err |= (NULL == wlc_hw->di[2]);
1144                 /*
1145                  * FIFO 3
1146                  * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1147                  *   (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1148                  */
1149                 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1150                                            dmareg(DMA_TX, 3),
1151                                            0, NTXD, 0, 0, -1,
1152                                            0, 0, &brcm_msg_level);
1153                 dma_attach_err |= (NULL == wlc_hw->di[3]);
1154 /* Cleaner to leave this as if with AP defined */
1155
1156                 if (dma_attach_err) {
1157                         wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1158                                   "\n", unit);
1159                         return false;
1160                 }
1161
1162                 /* get pointer to dma engine tx flow control variable */
1163                 for (i = 0; i < NFIFO; i++)
1164                         if (wlc_hw->di[i])
1165                                 wlc_hw->txavail[i] =
1166                                     (uint *) dma_getvar(wlc_hw->di[i],
1167                                                         "&txavail");
1168         }
1169
1170         /* initial ucode host flags */
1171         brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1172
1173         return true;
1174 }
1175
1176 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1177 {
1178         uint j;
1179
1180         for (j = 0; j < NFIFO; j++) {
1181                 if (wlc_hw->di[j]) {
1182                         dma_detach(wlc_hw->di[j]);
1183                         wlc_hw->di[j] = NULL;
1184                 }
1185         }
1186 }
1187
1188 /*
1189  * Initialize brcms_c_info default values ...
1190  * may get overrides later in this function
1191  *  BMAC_NOTES, move low out and resolve the dangling ones
1192  */
1193 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1194 {
1195         struct brcms_c_info *wlc = wlc_hw->wlc;
1196
1197         /* set default sw macintmask value */
1198         wlc->defmacintmask = DEF_MACINTMASK;
1199
1200         /* various 802.11g modes */
1201         wlc_hw->shortslot = false;
1202
1203         wlc_hw->SFBL = RETRY_SHORT_FB;
1204         wlc_hw->LFBL = RETRY_LONG_FB;
1205
1206         /* default mac retry limits */
1207         wlc_hw->SRL = RETRY_SHORT_DEF;
1208         wlc_hw->LRL = RETRY_LONG_DEF;
1209         wlc_hw->chanspec = ch20mhz_chspec(1);
1210 }
1211
1212 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1213 {
1214         /* delay before first read of ucode state */
1215         udelay(40);
1216
1217         /* wait until ucode is no longer asleep */
1218         SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1219                   DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1220 }
1221
1222 /* control chip clock to save power, enable dynamic clock or force fast clock */
1223 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1224 {
1225         if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU) {
1226                 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1227                  * on backplane, but mac core will still run on ALP(not HT) when
1228                  * it enters powersave mode, which means the FCA bit may not be
1229                  * set. Should wakeup mac if driver wants it to run on HT.
1230                  */
1231
1232                 if (wlc_hw->clk) {
1233                         if (mode == CLK_FAST) {
1234                                 bcma_set32(wlc_hw->d11core,
1235                                            D11REGOFFS(clk_ctl_st),
1236                                            CCS_FORCEHT);
1237
1238                                 udelay(64);
1239
1240                                 SPINWAIT(
1241                                     ((bcma_read32(wlc_hw->d11core,
1242                                       D11REGOFFS(clk_ctl_st)) &
1243                                       CCS_HTAVAIL) == 0),
1244                                       PMU_MAX_TRANSITION_DLY);
1245                                 WARN_ON(!(bcma_read32(wlc_hw->d11core,
1246                                         D11REGOFFS(clk_ctl_st)) &
1247                                         CCS_HTAVAIL));
1248                         } else {
1249                                 if ((ai_get_pmurev(wlc_hw->sih) == 0) &&
1250                                     (bcma_read32(wlc_hw->d11core,
1251                                         D11REGOFFS(clk_ctl_st)) &
1252                                         (CCS_FORCEHT | CCS_HTAREQ)))
1253                                         SPINWAIT(
1254                                             ((bcma_read32(wlc_hw->d11core,
1255                                               offsetof(struct d11regs,
1256                                                        clk_ctl_st)) &
1257                                               CCS_HTAVAIL) == 0),
1258                                               PMU_MAX_TRANSITION_DLY);
1259                                 bcma_mask32(wlc_hw->d11core,
1260                                         D11REGOFFS(clk_ctl_st),
1261                                         ~CCS_FORCEHT);
1262                         }
1263                 }
1264                 wlc_hw->forcefastclk = (mode == CLK_FAST);
1265         } else {
1266
1267                 /* old chips w/o PMU, force HT through cc,
1268                  * then use FCA to verify mac is running fast clock
1269                  */
1270
1271                 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1272
1273                 /* check fast clock is available (if core is not in reset) */
1274                 if (wlc_hw->forcefastclk && wlc_hw->clk)
1275                         WARN_ON(!(bcma_aread32(wlc_hw->d11core, BCMA_IOST) &
1276                                   SISF_FCLKA));
1277
1278                 /*
1279                  * keep the ucode wake bit on if forcefastclk is on since we
1280                  * do not want ucode to put us back to slow clock when it dozes
1281                  * for PM mode. Code below matches the wake override bit with
1282                  * current forcefastclk state. Only setting bit in wake_override
1283                  * instead of waking ucode immediately since old code had this
1284                  * behavior. Older code set wlc->forcefastclk but only had the
1285                  * wake happen if the wakup_ucode work (protected by an up
1286                  * check) was executed just below.
1287                  */
1288                 if (wlc_hw->forcefastclk)
1289                         mboolset(wlc_hw->wake_override,
1290                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1291                 else
1292                         mboolclr(wlc_hw->wake_override,
1293                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1294         }
1295 }
1296
1297 /* set or clear ucode host flag bits
1298  * it has an optimization for no-change write
1299  * it only writes through shared memory when the core has clock;
1300  * pre-CLK changes should use wlc_write_mhf to get around the optimization
1301  *
1302  *
1303  * bands values are: BRCM_BAND_AUTO <--- Current band only
1304  *                   BRCM_BAND_5G   <--- 5G band only
1305  *                   BRCM_BAND_2G   <--- 2G band only
1306  *                   BRCM_BAND_ALL  <--- All bands
1307  */
1308 void
1309 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1310              int bands)
1311 {
1312         u16 save;
1313         u16 addr[MHFMAX] = {
1314                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1315                 M_HOST_FLAGS5
1316         };
1317         struct brcms_hw_band *band;
1318
1319         if ((val & ~mask) || idx >= MHFMAX)
1320                 return; /* error condition */
1321
1322         switch (bands) {
1323                 /* Current band only or all bands,
1324                  * then set the band to current band
1325                  */
1326         case BRCM_BAND_AUTO:
1327         case BRCM_BAND_ALL:
1328                 band = wlc_hw->band;
1329                 break;
1330         case BRCM_BAND_5G:
1331                 band = wlc_hw->bandstate[BAND_5G_INDEX];
1332                 break;
1333         case BRCM_BAND_2G:
1334                 band = wlc_hw->bandstate[BAND_2G_INDEX];
1335                 break;
1336         default:
1337                 band = NULL;    /* error condition */
1338         }
1339
1340         if (band) {
1341                 save = band->mhfs[idx];
1342                 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1343
1344                 /* optimization: only write through if changed, and
1345                  * changed band is the current band
1346                  */
1347                 if (wlc_hw->clk && (band->mhfs[idx] != save)
1348                     && (band == wlc_hw->band))
1349                         brcms_b_write_shm(wlc_hw, addr[idx],
1350                                            (u16) band->mhfs[idx]);
1351         }
1352
1353         if (bands == BRCM_BAND_ALL) {
1354                 wlc_hw->bandstate[0]->mhfs[idx] =
1355                     (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1356                 wlc_hw->bandstate[1]->mhfs[idx] =
1357                     (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1358         }
1359 }
1360
1361 /* set the maccontrol register to desired reset state and
1362  * initialize the sw cache of the register
1363  */
1364 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1365 {
1366         /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1367         wlc_hw->maccontrol = 0;
1368         wlc_hw->suspended_fifos = 0;
1369         wlc_hw->wake_override = 0;
1370         wlc_hw->mute_override = 0;
1371         brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1372 }
1373
1374 /*
1375  * write the software state of maccontrol and
1376  * overrides to the maccontrol register
1377  */
1378 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1379 {
1380         u32 maccontrol = wlc_hw->maccontrol;
1381
1382         /* OR in the wake bit if overridden */
1383         if (wlc_hw->wake_override)
1384                 maccontrol |= MCTL_WAKE;
1385
1386         /* set AP and INFRA bits for mute if needed */
1387         if (wlc_hw->mute_override) {
1388                 maccontrol &= ~(MCTL_AP);
1389                 maccontrol |= MCTL_INFRA;
1390         }
1391
1392         bcma_write32(wlc_hw->d11core, D11REGOFFS(maccontrol),
1393                      maccontrol);
1394 }
1395
1396 /* set or clear maccontrol bits */
1397 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1398 {
1399         u32 maccontrol;
1400         u32 new_maccontrol;
1401
1402         if (val & ~mask)
1403                 return; /* error condition */
1404         maccontrol = wlc_hw->maccontrol;
1405         new_maccontrol = (maccontrol & ~mask) | val;
1406
1407         /* if the new maccontrol value is the same as the old, nothing to do */
1408         if (new_maccontrol == maccontrol)
1409                 return;
1410
1411         /* something changed, cache the new value */
1412         wlc_hw->maccontrol = new_maccontrol;
1413
1414         /* write the new values with overrides applied */
1415         brcms_c_mctrl_write(wlc_hw);
1416 }
1417
1418 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1419                                  u32 override_bit)
1420 {
1421         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1422                 mboolset(wlc_hw->wake_override, override_bit);
1423                 return;
1424         }
1425
1426         mboolset(wlc_hw->wake_override, override_bit);
1427
1428         brcms_c_mctrl_write(wlc_hw);
1429         brcms_b_wait_for_wake(wlc_hw);
1430 }
1431
1432 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1433                                    u32 override_bit)
1434 {
1435         mboolclr(wlc_hw->wake_override, override_bit);
1436
1437         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1438                 return;
1439
1440         brcms_c_mctrl_write(wlc_hw);
1441 }
1442
1443 /* When driver needs ucode to stop beaconing, it has to make sure that
1444  * MCTL_AP is clear and MCTL_INFRA is set
1445  * Mode           MCTL_AP        MCTL_INFRA
1446  * AP                1              1
1447  * STA               0              1 <--- This will ensure no beacons
1448  * IBSS              0              0
1449  */
1450 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1451 {
1452         wlc_hw->mute_override = 1;
1453
1454         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1455          * override, then there is no change to write
1456          */
1457         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1458                 return;
1459
1460         brcms_c_mctrl_write(wlc_hw);
1461 }
1462
1463 /* Clear the override on AP and INFRA bits */
1464 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1465 {
1466         if (wlc_hw->mute_override == 0)
1467                 return;
1468
1469         wlc_hw->mute_override = 0;
1470
1471         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1472          * override, then there is no change to write
1473          */
1474         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1475                 return;
1476
1477         brcms_c_mctrl_write(wlc_hw);
1478 }
1479
1480 /*
1481  * Write a MAC address to the given match reg offset in the RXE match engine.
1482  */
1483 static void
1484 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1485                        const u8 *addr)
1486 {
1487         struct bcma_device *core = wlc_hw->d11core;
1488         u16 mac_l;
1489         u16 mac_m;
1490         u16 mac_h;
1491
1492         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1493                  wlc_hw->unit);
1494
1495         mac_l = addr[0] | (addr[1] << 8);
1496         mac_m = addr[2] | (addr[3] << 8);
1497         mac_h = addr[4] | (addr[5] << 8);
1498
1499         /* enter the MAC addr into the RXE match registers */
1500         bcma_write16(core, D11REGOFFS(rcm_ctl),
1501                      RCM_INC_DATA | match_reg_offset);
1502         bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_l);
1503         bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_m);
1504         bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_h);
1505 }
1506
1507 void
1508 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1509                             void *buf)
1510 {
1511         struct bcma_device *core = wlc_hw->d11core;
1512         u32 word;
1513         __le32 word_le;
1514         __be32 word_be;
1515         bool be_bit;
1516         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1517
1518         bcma_write32(core, D11REGOFFS(tplatewrptr), offset);
1519
1520         /* if MCTL_BIGEND bit set in mac control register,
1521          * the chip swaps data in fifo, as well as data in
1522          * template ram
1523          */
1524         be_bit = (bcma_read32(core, D11REGOFFS(maccontrol)) & MCTL_BIGEND) != 0;
1525
1526         while (len > 0) {
1527                 memcpy(&word, buf, sizeof(u32));
1528
1529                 if (be_bit) {
1530                         word_be = cpu_to_be32(word);
1531                         word = *(u32 *)&word_be;
1532                 } else {
1533                         word_le = cpu_to_le32(word);
1534                         word = *(u32 *)&word_le;
1535                 }
1536
1537                 bcma_write32(core, D11REGOFFS(tplatewrdata), word);
1538
1539                 buf = (u8 *) buf + sizeof(u32);
1540                 len -= sizeof(u32);
1541         }
1542 }
1543
1544 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1545 {
1546         wlc_hw->band->CWmin = newmin;
1547
1548         bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1549                      OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1550         (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1551         bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmin);
1552 }
1553
1554 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1555 {
1556         wlc_hw->band->CWmax = newmax;
1557
1558         bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1559                      OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1560         (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1561         bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmax);
1562 }
1563
1564 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1565 {
1566         bool fastclk;
1567
1568         /* request FAST clock if not on */
1569         fastclk = wlc_hw->forcefastclk;
1570         if (!fastclk)
1571                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1572
1573         wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1574
1575         brcms_b_phy_reset(wlc_hw);
1576         wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1577
1578         /* restore the clk */
1579         if (!fastclk)
1580                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1581 }
1582
1583 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1584 {
1585         u16 v;
1586         struct brcms_c_info *wlc = wlc_hw->wlc;
1587         /* update SYNTHPU_DLY */
1588
1589         if (BRCMS_ISLCNPHY(wlc->band))
1590                 v = SYNTHPU_DLY_LPPHY_US;
1591         else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1592                 v = SYNTHPU_DLY_NPHY_US;
1593         else
1594                 v = SYNTHPU_DLY_BPHY_US;
1595
1596         brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1597 }
1598
1599 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1600 {
1601         u16 phyctl;
1602         u16 phytxant = wlc_hw->bmac_phytxant;
1603         u16 mask = PHY_TXC_ANT_MASK;
1604
1605         /* set the Probe Response frame phy control word */
1606         phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1607         phyctl = (phyctl & ~mask) | phytxant;
1608         brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1609
1610         /* set the Response (ACK/CTS) frame phy control word */
1611         phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1612         phyctl = (phyctl & ~mask) | phytxant;
1613         brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1614 }
1615
1616 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1617                                          u8 rate)
1618 {
1619         uint i;
1620         u8 plcp_rate = 0;
1621         struct plcp_signal_rate_lookup {
1622                 u8 rate;
1623                 u8 signal_rate;
1624         };
1625         /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1626         const struct plcp_signal_rate_lookup rate_lookup[] = {
1627                 {BRCM_RATE_6M, 0xB},
1628                 {BRCM_RATE_9M, 0xF},
1629                 {BRCM_RATE_12M, 0xA},
1630                 {BRCM_RATE_18M, 0xE},
1631                 {BRCM_RATE_24M, 0x9},
1632                 {BRCM_RATE_36M, 0xD},
1633                 {BRCM_RATE_48M, 0x8},
1634                 {BRCM_RATE_54M, 0xC}
1635         };
1636
1637         for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1638                 if (rate == rate_lookup[i].rate) {
1639                         plcp_rate = rate_lookup[i].signal_rate;
1640                         break;
1641                 }
1642         }
1643
1644         /* Find the SHM pointer to the rate table entry by looking in the
1645          * Direct-map Table
1646          */
1647         return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1648 }
1649
1650 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1651 {
1652         u8 rate;
1653         u8 rates[8] = {
1654                 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1655                 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1656         };
1657         u16 entry_ptr;
1658         u16 pctl1;
1659         uint i;
1660
1661         if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1662                 return;
1663
1664         /* walk the phy rate table and update the entries */
1665         for (i = 0; i < ARRAY_SIZE(rates); i++) {
1666                 rate = rates[i];
1667
1668                 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1669
1670                 /* read the SHM Rate Table entry OFDM PCTL1 values */
1671                 pctl1 =
1672                     brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1673
1674                 /* modify the value */
1675                 pctl1 &= ~PHY_TXC1_MODE_MASK;
1676                 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1677
1678                 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1679                 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1680                                    pctl1);
1681         }
1682 }
1683
1684 /* band-specific init */
1685 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1686 {
1687         struct brcms_hardware *wlc_hw = wlc->hw;
1688
1689         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1690                 wlc_hw->band->bandunit);
1691
1692         brcms_c_ucode_bsinit(wlc_hw);
1693
1694         wlc_phy_init(wlc_hw->band->pi, chanspec);
1695
1696         brcms_c_ucode_txant_set(wlc_hw);
1697
1698         /*
1699          * cwmin is band-specific, update hardware
1700          * with value for current band
1701          */
1702         brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1703         brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1704
1705         brcms_b_update_slot_timing(wlc_hw,
1706                                    wlc_hw->band->bandtype == BRCM_BAND_5G ?
1707                                    true : wlc_hw->shortslot);
1708
1709         /* write phytype and phyvers */
1710         brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1711         brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1712
1713         /*
1714          * initialize the txphyctl1 rate table since
1715          * shmem is shared between bands
1716          */
1717         brcms_upd_ofdm_pctl1_table(wlc_hw);
1718
1719         brcms_b_upd_synthpu(wlc_hw);
1720 }
1721
1722 /* Perform a soft reset of the PHY PLL */
1723 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1724 {
1725         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1726
1727         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_addr),
1728                   ~0, 0);
1729         udelay(1);
1730         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1731                   0x4, 0);
1732         udelay(1);
1733         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1734                   0x4, 4);
1735         udelay(1);
1736         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1737                   0x4, 0);
1738         udelay(1);
1739 }
1740
1741 /* light way to turn on phy clock without reset for NPHY only
1742  *  refer to brcms_b_core_phy_clk for full version
1743  */
1744 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1745 {
1746         /* support(necessary for NPHY and HYPHY) only */
1747         if (!BRCMS_ISNPHY(wlc_hw->band))
1748                 return;
1749
1750         if (ON == clk)
1751                 brcms_b_core_ioctl(wlc_hw, SICF_FGC, SICF_FGC);
1752         else
1753                 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
1754
1755 }
1756
1757 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1758 {
1759         if (ON == clk)
1760                 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, SICF_MPCLKE);
1761         else
1762                 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, 0);
1763 }
1764
1765 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1766 {
1767         struct brcms_phy_pub *pih = wlc_hw->band->pi;
1768         u32 phy_bw_clkbits;
1769         bool phy_in_reset = false;
1770
1771         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1772
1773         if (pih == NULL)
1774                 return;
1775
1776         phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1777
1778         /* Specific reset sequence required for NPHY rev 3 and 4 */
1779         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1780             NREV_LE(wlc_hw->band->phyrev, 4)) {
1781                 /* Set the PHY bandwidth */
1782                 brcms_b_core_ioctl(wlc_hw, SICF_BWMASK, phy_bw_clkbits);
1783
1784                 udelay(1);
1785
1786                 /* Perform a soft reset of the PHY PLL */
1787                 brcms_b_core_phypll_reset(wlc_hw);
1788
1789                 /* reset the PHY */
1790                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_PCLKE),
1791                                    (SICF_PRST | SICF_PCLKE));
1792                 phy_in_reset = true;
1793         } else {
1794                 brcms_b_core_ioctl(wlc_hw,
1795                                    (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1796                                    (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1797         }
1798
1799         udelay(2);
1800         brcms_b_core_phy_clk(wlc_hw, ON);
1801
1802         if (pih)
1803                 wlc_phy_anacore(pih, ON);
1804 }
1805
1806 /* switch to and initialize new band */
1807 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1808                             u16 chanspec) {
1809         struct brcms_c_info *wlc = wlc_hw->wlc;
1810         u32 macintmask;
1811
1812         /* Enable the d11 core before accessing it */
1813         if (!bcma_core_is_enabled(wlc_hw->d11core)) {
1814                 bcma_core_enable(wlc_hw->d11core, 0);
1815                 brcms_c_mctrl_reset(wlc_hw);
1816         }
1817
1818         macintmask = brcms_c_setband_inact(wlc, bandunit);
1819
1820         if (!wlc_hw->up)
1821                 return;
1822
1823         brcms_b_core_phy_clk(wlc_hw, ON);
1824
1825         /* band-specific initializations */
1826         brcms_b_bsinit(wlc, chanspec);
1827
1828         /*
1829          * If there are any pending software interrupt bits,
1830          * then replace these with a harmless nonzero value
1831          * so brcms_c_dpc() will re-enable interrupts when done.
1832          */
1833         if (wlc->macintstatus)
1834                 wlc->macintstatus = MI_DMAINT;
1835
1836         /* restore macintmask */
1837         brcms_intrsrestore(wlc->wl, macintmask);
1838
1839         /* ucode should still be suspended.. */
1840         WARN_ON((bcma_read32(wlc_hw->d11core, D11REGOFFS(maccontrol)) &
1841                  MCTL_EN_MAC) != 0);
1842 }
1843
1844 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1845 {
1846
1847         /* reject unsupported corerev */
1848         if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1849                 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1850                           wlc_hw->corerev);
1851                 return false;
1852         }
1853
1854         return true;
1855 }
1856
1857 /* Validate some board info parameters */
1858 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1859 {
1860         uint boardrev = wlc_hw->boardrev;
1861
1862         /* 4 bits each for board type, major, minor, and tiny version */
1863         uint brt = (boardrev & 0xf000) >> 12;
1864         uint b0 = (boardrev & 0xf00) >> 8;
1865         uint b1 = (boardrev & 0xf0) >> 4;
1866         uint b2 = boardrev & 0xf;
1867
1868         /* voards from other vendors are always considered valid */
1869         if (ai_get_boardvendor(wlc_hw->sih) != PCI_VENDOR_ID_BROADCOM)
1870                 return true;
1871
1872         /* do some boardrev sanity checks when boardvendor is Broadcom */
1873         if (boardrev == 0)
1874                 return false;
1875
1876         if (boardrev <= 0xff)
1877                 return true;
1878
1879         if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1880                 || (b2 > 9))
1881                 return false;
1882
1883         return true;
1884 }
1885
1886 static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
1887 {
1888         enum brcms_srom_id var_id = BRCMS_SROM_MACADDR;
1889         char *macaddr;
1890
1891         /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1892         macaddr = getvar(wlc_hw->sih, var_id);
1893         if (macaddr != NULL)
1894                 return macaddr;
1895
1896         if (wlc_hw->_nbands > 1)
1897                 var_id = BRCMS_SROM_ET1MACADDR;
1898         else
1899                 var_id = BRCMS_SROM_IL0MACADDR;
1900
1901         macaddr = getvar(wlc_hw->sih, var_id);
1902         if (macaddr == NULL)
1903                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
1904                           "getvar(%d) not found\n", wlc_hw->unit, var_id);
1905
1906         return macaddr;
1907 }
1908
1909 /* power both the pll and external oscillator on/off */
1910 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
1911 {
1912         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
1913
1914         /*
1915          * dont power down if plldown is false or
1916          * we must poll hw radio disable
1917          */
1918         if (!want && wlc_hw->pllreq)
1919                 return;
1920
1921         if (wlc_hw->sih)
1922                 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
1923
1924         wlc_hw->sbclk = want;
1925         if (!wlc_hw->sbclk) {
1926                 wlc_hw->clk = false;
1927                 if (wlc_hw->band && wlc_hw->band->pi)
1928                         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
1929         }
1930 }
1931
1932 /*
1933  * Return true if radio is disabled, otherwise false.
1934  * hw radio disable signal is an external pin, users activate it asynchronously
1935  * this function could be called when driver is down and w/o clock
1936  * it operates on different registers depending on corerev and boardflag.
1937  */
1938 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
1939 {
1940         bool v, clk, xtal;
1941         u32 flags = 0;
1942
1943         xtal = wlc_hw->sbclk;
1944         if (!xtal)
1945                 brcms_b_xtal(wlc_hw, ON);
1946
1947         /* may need to take core out of reset first */
1948         clk = wlc_hw->clk;
1949         if (!clk) {
1950                 /*
1951                  * mac no longer enables phyclk automatically when driver
1952                  * accesses phyreg throughput mac. This can be skipped since
1953                  * only mac reg is accessed below
1954                  */
1955                 flags |= SICF_PCLKE;
1956
1957                 /*
1958                  * TODO: test suspend/resume
1959                  *
1960                  * AI chip doesn't restore bar0win2 on
1961                  * hibernation/resume, need sw fixup
1962                  */
1963
1964                 bcma_core_enable(wlc_hw->d11core, flags);
1965                 brcms_c_mctrl_reset(wlc_hw);
1966         }
1967
1968         v = ((bcma_read32(wlc_hw->d11core,
1969                           D11REGOFFS(phydebug)) & PDBG_RFD) != 0);
1970
1971         /* put core back into reset */
1972         if (!clk)
1973                 bcma_core_disable(wlc_hw->d11core, 0);
1974
1975         if (!xtal)
1976                 brcms_b_xtal(wlc_hw, OFF);
1977
1978         return v;
1979 }
1980
1981 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
1982 {
1983         struct dma_pub *di = wlc_hw->di[fifo];
1984         return dma_rxreset(di);
1985 }
1986
1987 /* d11 core reset
1988  *   ensure fask clock during reset
1989  *   reset dma
1990  *   reset d11(out of reset)
1991  *   reset phy(out of reset)
1992  *   clear software macintstatus for fresh new start
1993  * one testing hack wlc_hw->noreset will bypass the d11/phy reset
1994  */
1995 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
1996 {
1997         uint i;
1998         bool fastclk;
1999
2000         if (flags == BRCMS_USE_COREFLAGS)
2001                 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
2002
2003         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2004
2005         /* request FAST clock if not on  */
2006         fastclk = wlc_hw->forcefastclk;
2007         if (!fastclk)
2008                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2009
2010         /* reset the dma engines except first time thru */
2011         if (bcma_core_is_enabled(wlc_hw->d11core)) {
2012                 for (i = 0; i < NFIFO; i++)
2013                         if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2014                                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2015                                           "dma_txreset[%d]: cannot stop dma\n",
2016                                            wlc_hw->unit, __func__, i);
2017
2018                 if ((wlc_hw->di[RX_FIFO])
2019                     && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2020                         wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2021                                   "[%d]: cannot stop dma\n",
2022                                   wlc_hw->unit, __func__, RX_FIFO);
2023         }
2024         /* if noreset, just stop the psm and return */
2025         if (wlc_hw->noreset) {
2026                 wlc_hw->wlc->macintstatus = 0;  /* skip wl_dpc after down */
2027                 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2028                 return;
2029         }
2030
2031         /*
2032          * mac no longer enables phyclk automatically when driver accesses
2033          * phyreg throughput mac, AND phy_reset is skipped at early stage when
2034          * band->pi is invalid. need to enable PHY CLK
2035          */
2036         flags |= SICF_PCLKE;
2037
2038         /*
2039          * reset the core
2040          * In chips with PMU, the fastclk request goes through d11 core
2041          * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2042          *
2043          * This adds some delay and we can optimize it by also requesting
2044          * fastclk through chipcommon during this period if necessary. But
2045          * that has to work coordinate with other driver like mips/arm since
2046          * they may touch chipcommon as well.
2047          */
2048         wlc_hw->clk = false;
2049         bcma_core_enable(wlc_hw->d11core, flags);
2050         wlc_hw->clk = true;
2051         if (wlc_hw->band && wlc_hw->band->pi)
2052                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2053
2054         brcms_c_mctrl_reset(wlc_hw);
2055
2056         if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU)
2057                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2058
2059         brcms_b_phy_reset(wlc_hw);
2060
2061         /* turn on PHY_PLL */
2062         brcms_b_core_phypll_ctl(wlc_hw, true);
2063
2064         /* clear sw intstatus */
2065         wlc_hw->wlc->macintstatus = 0;
2066
2067         /* restore the clk setting */
2068         if (!fastclk)
2069                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2070 }
2071
2072 /* txfifo sizes needs to be modified(increased) since the newer cores
2073  * have more memory.
2074  */
2075 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2076 {
2077         struct bcma_device *core = wlc_hw->d11core;
2078         u16 fifo_nu;
2079         u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2080         u16 txfifo_def, txfifo_def1;
2081         u16 txfifo_cmd;
2082
2083         /* tx fifos start at TXFIFO_START_BLK from the Base address */
2084         txfifo_startblk = TXFIFO_START_BLK;
2085
2086         /* sequence of operations:  reset fifo, set fifo size, reset fifo */
2087         for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2088
2089                 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2090                 txfifo_def = (txfifo_startblk & 0xff) |
2091                     (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2092                 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2093                     ((((txfifo_endblk -
2094                         1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2095                 txfifo_cmd =
2096                     TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2097
2098                 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2099                 bcma_write16(core, D11REGOFFS(xmtfifodef), txfifo_def);
2100                 bcma_write16(core, D11REGOFFS(xmtfifodef1), txfifo_def1);
2101
2102                 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2103
2104                 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2105         }
2106         /*
2107          * need to propagate to shm location to be in sync since ucode/hw won't
2108          * do this
2109          */
2110         brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2111                            wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2112         brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2113                            wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2114         brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2115                            ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2116                             xmtfifo_sz[TX_AC_BK_FIFO]));
2117         brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2118                            ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2119                             xmtfifo_sz[TX_BCMC_FIFO]));
2120 }
2121
2122 /* This function is used for changing the tsf frac register
2123  * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2124  * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2125  * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2126  * HTPHY Formula is 2^26/freq(MHz) e.g.
2127  * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2128  *  - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2129  * For spuron: 123MHz -> 2^26/123    = 545600.5
2130  *  - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2131  * For spur off: 120MHz -> 2^26/120    = 559240.5
2132  *  - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2133  */
2134
2135 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2136 {
2137         struct bcma_device *core = wlc_hw->d11core;
2138
2139         if ((ai_get_chip_id(wlc_hw->sih) == BCM43224_CHIP_ID) ||
2140             (ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID)) {
2141                 if (spurmode == WL_SPURAVOID_ON2) {     /* 126Mhz */
2142                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x2082);
2143                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2144                 } else if (spurmode == WL_SPURAVOID_ON1) {      /* 123Mhz */
2145                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x5341);
2146                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2147                 } else {        /* 120Mhz */
2148                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x8889);
2149                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2150                 }
2151         } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2152                 if (spurmode == WL_SPURAVOID_ON1) {     /* 82Mhz */
2153                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x7CE0);
2154                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2155                 } else {        /* 80Mhz */
2156                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0xCCCD);
2157                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2158                 }
2159         }
2160 }
2161
2162 /* Initialize GPIOs that are controlled by D11 core */
2163 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2164 {
2165         struct brcms_hardware *wlc_hw = wlc->hw;
2166         u32 gc, gm;
2167
2168         /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2169         brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2170
2171         /*
2172          * Common GPIO setup:
2173          *      G0 = LED 0 = WLAN Activity
2174          *      G1 = LED 1 = WLAN 2.4 GHz Radio State
2175          *      G2 = LED 2 = WLAN 5 GHz Radio State
2176          *      G4 = radio disable input (HI enabled, LO disabled)
2177          */
2178
2179         gc = gm = 0;
2180
2181         /* Allocate GPIOs for mimo antenna diversity feature */
2182         if (wlc_hw->antsel_type == ANTSEL_2x3) {
2183                 /* Enable antenna diversity, use 2x3 mode */
2184                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2185                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2186                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2187                              MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2188
2189                 /* init superswitch control */
2190                 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2191
2192         } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2193                 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2194                 /*
2195                  * The board itself is powered by these GPIOs
2196                  * (when not sending pattern) so set them high
2197                  */
2198                 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_oe),
2199                            (BOARD_GPIO_12 | BOARD_GPIO_13));
2200                 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_out),
2201                            (BOARD_GPIO_12 | BOARD_GPIO_13));
2202
2203                 /* Enable antenna diversity, use 2x4 mode */
2204                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2205                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2206                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2207                              BRCM_BAND_ALL);
2208
2209                 /* Configure the desired clock to be 4Mhz */
2210                 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2211                                    ANTSEL_CLKDIV_4MHZ);
2212         }
2213
2214         /*
2215          * gpio 9 controls the PA. ucode is responsible
2216          * for wiggling out and oe
2217          */
2218         if (wlc_hw->boardflags & BFL_PACTRL)
2219                 gm |= gc |= BOARD_GPIO_PACTRL;
2220
2221         /* apply to gpiocontrol register */
2222         ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2223 }
2224
2225 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2226                               const __le32 ucode[], const size_t nbytes)
2227 {
2228         struct bcma_device *core = wlc_hw->d11core;
2229         uint i;
2230         uint count;
2231
2232         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2233
2234         count = (nbytes / sizeof(u32));
2235
2236         bcma_write32(core, D11REGOFFS(objaddr),
2237                      OBJADDR_AUTO_INC | OBJADDR_UCM_SEL);
2238         (void)bcma_read32(core, D11REGOFFS(objaddr));
2239         for (i = 0; i < count; i++)
2240                 bcma_write32(core, D11REGOFFS(objdata), le32_to_cpu(ucode[i]));
2241
2242 }
2243
2244 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2245 {
2246         struct brcms_c_info *wlc;
2247         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2248
2249         wlc = wlc_hw->wlc;
2250
2251         if (wlc_hw->ucode_loaded)
2252                 return;
2253
2254         if (D11REV_IS(wlc_hw->corerev, 23)) {
2255                 if (BRCMS_ISNPHY(wlc_hw->band)) {
2256                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2257                                           ucode->bcm43xx_16_mimosz);
2258                         wlc_hw->ucode_loaded = true;
2259                 } else
2260                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2261                                   "corerev %d\n",
2262                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2263         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2264                 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2265                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2266                                           ucode->bcm43xx_24_lcnsz);
2267                         wlc_hw->ucode_loaded = true;
2268                 } else {
2269                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2270                                   "corerev %d\n",
2271                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2272                 }
2273         }
2274 }
2275
2276 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2277 {
2278         /* update sw state */
2279         wlc_hw->bmac_phytxant = phytxant;
2280
2281         /* push to ucode if up */
2282         if (!wlc_hw->up)
2283                 return;
2284         brcms_c_ucode_txant_set(wlc_hw);
2285
2286 }
2287
2288 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2289 {
2290         return (u16) wlc_hw->wlc->stf->txant;
2291 }
2292
2293 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2294 {
2295         wlc_hw->antsel_type = antsel_type;
2296
2297         /* Update the antsel type for phy module to use */
2298         wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2299 }
2300
2301 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2302 {
2303         bool fatal = false;
2304         uint unit;
2305         uint intstatus, idx;
2306         struct bcma_device *core = wlc_hw->d11core;
2307         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2308
2309         unit = wlc_hw->unit;
2310
2311         for (idx = 0; idx < NFIFO; idx++) {
2312                 /* read intstatus register and ignore any non-error bits */
2313                 intstatus =
2314                         bcma_read32(core,
2315                                     D11REGOFFS(intctrlregs[idx].intstatus)) &
2316                         I_ERRORS;
2317                 if (!intstatus)
2318                         continue;
2319
2320                 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2321                         unit, idx, intstatus);
2322
2323                 if (intstatus & I_RO) {
2324                         wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2325                                   "overflow\n", unit, idx);
2326                         fatal = true;
2327                 }
2328
2329                 if (intstatus & I_PC) {
2330                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2331                                  unit, idx);
2332                         fatal = true;
2333                 }
2334
2335                 if (intstatus & I_PD) {
2336                         wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2337                                   idx);
2338                         fatal = true;
2339                 }
2340
2341                 if (intstatus & I_DE) {
2342                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2343                                   "error\n", unit, idx);
2344                         fatal = true;
2345                 }
2346
2347                 if (intstatus & I_RU)
2348                         wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2349                                   "underflow\n", idx, unit);
2350
2351                 if (intstatus & I_XU) {
2352                         wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2353                                   "underflow\n", idx, unit);
2354                         fatal = true;
2355                 }
2356
2357                 if (fatal) {
2358                         brcms_fatal_error(wlc_hw->wlc->wl); /* big hammer */
2359                         break;
2360                 } else
2361                         bcma_write32(core,
2362                                      D11REGOFFS(intctrlregs[idx].intstatus),
2363                                      intstatus);
2364         }
2365 }
2366
2367 void brcms_c_intrson(struct brcms_c_info *wlc)
2368 {
2369         struct brcms_hardware *wlc_hw = wlc->hw;
2370         wlc->macintmask = wlc->defmacintmask;
2371         bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2372 }
2373
2374 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2375 {
2376         struct brcms_hardware *wlc_hw = wlc->hw;
2377         u32 macintmask;
2378
2379         if (!wlc_hw->clk)
2380                 return 0;
2381
2382         macintmask = wlc->macintmask;   /* isr can still happen */
2383
2384         bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), 0);
2385         (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(macintmask));
2386         udelay(1);              /* ensure int line is no longer driven */
2387         wlc->macintmask = 0;
2388
2389         /* return previous macintmask; resolve race between us and our isr */
2390         return wlc->macintstatus ? 0 : macintmask;
2391 }
2392
2393 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2394 {
2395         struct brcms_hardware *wlc_hw = wlc->hw;
2396         if (!wlc_hw->clk)
2397                 return;
2398
2399         wlc->macintmask = macintmask;
2400         bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2401 }
2402
2403 /* assumes that the d11 MAC is enabled */
2404 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2405                                     uint tx_fifo)
2406 {
2407         u8 fifo = 1 << tx_fifo;
2408
2409         /* Two clients of this code, 11h Quiet period and scanning. */
2410
2411         /* only suspend if not already suspended */
2412         if ((wlc_hw->suspended_fifos & fifo) == fifo)
2413                 return;
2414
2415         /* force the core awake only if not already */
2416         if (wlc_hw->suspended_fifos == 0)
2417                 brcms_c_ucode_wake_override_set(wlc_hw,
2418                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2419
2420         wlc_hw->suspended_fifos |= fifo;
2421
2422         if (wlc_hw->di[tx_fifo]) {
2423                 /*
2424                  * Suspending AMPDU transmissions in the middle can cause
2425                  * underflow which may result in mismatch between ucode and
2426                  * driver so suspend the mac before suspending the FIFO
2427                  */
2428                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2429                         brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2430
2431                 dma_txsuspend(wlc_hw->di[tx_fifo]);
2432
2433                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2434                         brcms_c_enable_mac(wlc_hw->wlc);
2435         }
2436 }
2437
2438 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2439                                    uint tx_fifo)
2440 {
2441         /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2442          * but need to be done here for PIO otherwise the watchdog will catch
2443          * the inconsistency and fire
2444          */
2445         /* Two clients of this code, 11h Quiet period and scanning. */
2446         if (wlc_hw->di[tx_fifo])
2447                 dma_txresume(wlc_hw->di[tx_fifo]);
2448
2449         /* allow core to sleep again */
2450         if (wlc_hw->suspended_fifos == 0)
2451                 return;
2452         else {
2453                 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2454                 if (wlc_hw->suspended_fifos == 0)
2455                         brcms_c_ucode_wake_override_clear(wlc_hw,
2456                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2457         }
2458 }
2459
2460 /* precondition: requires the mac core to be enabled */
2461 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool mute_tx)
2462 {
2463         static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2464
2465         if (mute_tx) {
2466                 /* suspend tx fifos */
2467                 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2468                 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2469                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2470                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2471
2472                 /* zero the address match register so we do not send ACKs */
2473                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2474                                        null_ether_addr);
2475         } else {
2476                 /* resume tx fifos */
2477                 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2478                 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2479                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2480                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2481
2482                 /* Restore address */
2483                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2484                                        wlc_hw->etheraddr);
2485         }
2486
2487         wlc_phy_mute_upd(wlc_hw->band->pi, mute_tx, 0);
2488
2489         if (mute_tx)
2490                 brcms_c_ucode_mute_override_set(wlc_hw);
2491         else
2492                 brcms_c_ucode_mute_override_clear(wlc_hw);
2493 }
2494
2495 void
2496 brcms_c_mute(struct brcms_c_info *wlc, bool mute_tx)
2497 {
2498         brcms_b_mute(wlc->hw, mute_tx);
2499 }
2500
2501 /*
2502  * Read and clear macintmask and macintstatus and intstatus registers.
2503  * This routine should be called with interrupts off
2504  * Return:
2505  *   -1 if brcms_deviceremoved(wlc) evaluates to true;
2506  *   0 if the interrupt is not for us, or we are in some special cases;
2507  *   device interrupt status bits otherwise.
2508  */
2509 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2510 {
2511         struct brcms_hardware *wlc_hw = wlc->hw;
2512         struct bcma_device *core = wlc_hw->d11core;
2513         u32 macintstatus;
2514
2515         /* macintstatus includes a DMA interrupt summary bit */
2516         macintstatus = bcma_read32(core, D11REGOFFS(macintstatus));
2517
2518         BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2519                  macintstatus);
2520
2521         /* detect cardbus removed, in power down(suspend) and in reset */
2522         if (brcms_deviceremoved(wlc))
2523                 return -1;
2524
2525         /* brcms_deviceremoved() succeeds even when the core is still resetting,
2526          * handle that case here.
2527          */
2528         if (macintstatus == 0xffffffff)
2529                 return 0;
2530
2531         /* defer unsolicited interrupts */
2532         macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2533
2534         /* if not for us */
2535         if (macintstatus == 0)
2536                 return 0;
2537
2538         /* interrupts are already turned off for CFE build
2539          * Caution: For CFE Turning off the interrupts again has some undesired
2540          * consequences
2541          */
2542         /* turn off the interrupts */
2543         bcma_write32(core, D11REGOFFS(macintmask), 0);
2544         (void)bcma_read32(core, D11REGOFFS(macintmask));
2545         wlc->macintmask = 0;
2546
2547         /* clear device interrupts */
2548         bcma_write32(core, D11REGOFFS(macintstatus), macintstatus);
2549
2550         /* MI_DMAINT is indication of non-zero intstatus */
2551         if (macintstatus & MI_DMAINT)
2552                 /*
2553                  * only fifo interrupt enabled is I_RI in
2554                  * RX_FIFO. If MI_DMAINT is set, assume it
2555                  * is set and clear the interrupt.
2556                  */
2557                 bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intstatus),
2558                              DEF_RXINTMASK);
2559
2560         return macintstatus;
2561 }
2562
2563 /* Update wlc->macintstatus and wlc->intstatus[]. */
2564 /* Return true if they are updated successfully. false otherwise */
2565 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2566 {
2567         u32 macintstatus;
2568
2569         /* read and clear macintstatus and intstatus registers */
2570         macintstatus = wlc_intstatus(wlc, false);
2571
2572         /* device is removed */
2573         if (macintstatus == 0xffffffff)
2574                 return false;
2575
2576         /* update interrupt status in software */
2577         wlc->macintstatus |= macintstatus;
2578
2579         return true;
2580 }
2581
2582 /*
2583  * First-level interrupt processing.
2584  * Return true if this was our interrupt, false otherwise.
2585  * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2586  * false otherwise.
2587  */
2588 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2589 {
2590         struct brcms_hardware *wlc_hw = wlc->hw;
2591         u32 macintstatus;
2592
2593         *wantdpc = false;
2594
2595         if (!wlc_hw->up || !wlc->macintmask)
2596                 return false;
2597
2598         /* read and clear macintstatus and intstatus registers */
2599         macintstatus = wlc_intstatus(wlc, true);
2600
2601         if (macintstatus == 0xffffffff)
2602                 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2603                           " path\n");
2604
2605         /* it is not for us */
2606         if (macintstatus == 0)
2607                 return false;
2608
2609         *wantdpc = true;
2610
2611         /* save interrupt status bits */
2612         wlc->macintstatus = macintstatus;
2613
2614         return true;
2615
2616 }
2617
2618 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2619 {
2620         struct brcms_hardware *wlc_hw = wlc->hw;
2621         struct bcma_device *core = wlc_hw->d11core;
2622         u32 mc, mi;
2623         struct wiphy *wiphy = wlc->wiphy;
2624
2625         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2626                 wlc_hw->band->bandunit);
2627
2628         /*
2629          * Track overlapping suspend requests
2630          */
2631         wlc_hw->mac_suspend_depth++;
2632         if (wlc_hw->mac_suspend_depth > 1)
2633                 return;
2634
2635         /* force the core awake */
2636         brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2637
2638         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2639
2640         if (mc == 0xffffffff) {
2641                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2642                           __func__);
2643                 brcms_down(wlc->wl);
2644                 return;
2645         }
2646         WARN_ON(mc & MCTL_PSM_JMP_0);
2647         WARN_ON(!(mc & MCTL_PSM_RUN));
2648         WARN_ON(!(mc & MCTL_EN_MAC));
2649
2650         mi = bcma_read32(core, D11REGOFFS(macintstatus));
2651         if (mi == 0xffffffff) {
2652                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2653                           __func__);
2654                 brcms_down(wlc->wl);
2655                 return;
2656         }
2657         WARN_ON(mi & MI_MACSSPNDD);
2658
2659         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2660
2661         SPINWAIT(!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD),
2662                  BRCMS_MAX_MAC_SUSPEND);
2663
2664         if (!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD)) {
2665                 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2666                           " and MI_MACSSPNDD is still not on.\n",
2667                           wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2668                 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2669                           "psm_brc 0x%04x\n", wlc_hw->unit,
2670                           bcma_read32(core, D11REGOFFS(psmdebug)),
2671                           bcma_read32(core, D11REGOFFS(phydebug)),
2672                           bcma_read16(core, D11REGOFFS(psm_brc)));
2673         }
2674
2675         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2676         if (mc == 0xffffffff) {
2677                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2678                           __func__);
2679                 brcms_down(wlc->wl);
2680                 return;
2681         }
2682         WARN_ON(mc & MCTL_PSM_JMP_0);
2683         WARN_ON(!(mc & MCTL_PSM_RUN));
2684         WARN_ON(mc & MCTL_EN_MAC);
2685 }
2686
2687 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2688 {
2689         struct brcms_hardware *wlc_hw = wlc->hw;
2690         struct bcma_device *core = wlc_hw->d11core;
2691         u32 mc, mi;
2692
2693         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2694                 wlc->band->bandunit);
2695
2696         /*
2697          * Track overlapping suspend requests
2698          */
2699         wlc_hw->mac_suspend_depth--;
2700         if (wlc_hw->mac_suspend_depth > 0)
2701                 return;
2702
2703         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2704         WARN_ON(mc & MCTL_PSM_JMP_0);
2705         WARN_ON(mc & MCTL_EN_MAC);
2706         WARN_ON(!(mc & MCTL_PSM_RUN));
2707
2708         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2709         bcma_write32(core, D11REGOFFS(macintstatus), MI_MACSSPNDD);
2710
2711         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2712         WARN_ON(mc & MCTL_PSM_JMP_0);
2713         WARN_ON(!(mc & MCTL_EN_MAC));
2714         WARN_ON(!(mc & MCTL_PSM_RUN));
2715
2716         mi = bcma_read32(core, D11REGOFFS(macintstatus));
2717         WARN_ON(mi & MI_MACSSPNDD);
2718
2719         brcms_c_ucode_wake_override_clear(wlc_hw,
2720                                           BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2721 }
2722
2723 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2724 {
2725         wlc_hw->hw_stf_ss_opmode = stf_mode;
2726
2727         if (wlc_hw->clk)
2728                 brcms_upd_ofdm_pctl1_table(wlc_hw);
2729 }
2730
2731 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2732 {
2733         struct bcma_device *core = wlc_hw->d11core;
2734         u32 w, val;
2735         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2736
2737         BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2738
2739         /* Validate dchip register access */
2740
2741         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2742         (void)bcma_read32(core, D11REGOFFS(objaddr));
2743         w = bcma_read32(core, D11REGOFFS(objdata));
2744
2745         /* Can we write and read back a 32bit register? */
2746         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2747         (void)bcma_read32(core, D11REGOFFS(objaddr));
2748         bcma_write32(core, D11REGOFFS(objdata), (u32) 0xaa5555aa);
2749
2750         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2751         (void)bcma_read32(core, D11REGOFFS(objaddr));
2752         val = bcma_read32(core, D11REGOFFS(objdata));
2753         if (val != (u32) 0xaa5555aa) {
2754                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2755                           "expected 0xaa5555aa\n", wlc_hw->unit, val);
2756                 return false;
2757         }
2758
2759         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2760         (void)bcma_read32(core, D11REGOFFS(objaddr));
2761         bcma_write32(core, D11REGOFFS(objdata), (u32) 0x55aaaa55);
2762
2763         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2764         (void)bcma_read32(core, D11REGOFFS(objaddr));
2765         val = bcma_read32(core, D11REGOFFS(objdata));
2766         if (val != (u32) 0x55aaaa55) {
2767                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2768                           "expected 0x55aaaa55\n", wlc_hw->unit, val);
2769                 return false;
2770         }
2771
2772         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2773         (void)bcma_read32(core, D11REGOFFS(objaddr));
2774         bcma_write32(core, D11REGOFFS(objdata), w);
2775
2776         /* clear CFPStart */
2777         bcma_write32(core, D11REGOFFS(tsf_cfpstart), 0);
2778
2779         w = bcma_read32(core, D11REGOFFS(maccontrol));
2780         if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2781             (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2782                 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2783                           "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2784                           (MCTL_IHR_EN | MCTL_WAKE),
2785                           (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2786                 return false;
2787         }
2788
2789         return true;
2790 }
2791
2792 #define PHYPLL_WAIT_US  100000
2793
2794 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2795 {
2796         struct bcma_device *core = wlc_hw->d11core;
2797         u32 tmp;
2798
2799         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2800
2801         tmp = 0;
2802
2803         if (on) {
2804                 if ((ai_get_chip_id(wlc_hw->sih) == BCM4313_CHIP_ID)) {
2805                         bcma_set32(core, D11REGOFFS(clk_ctl_st),
2806                                    CCS_ERSRC_REQ_HT |
2807                                    CCS_ERSRC_REQ_D11PLL |
2808                                    CCS_ERSRC_REQ_PHYPLL);
2809                         SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2810                                   CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT,
2811                                  PHYPLL_WAIT_US);
2812
2813                         tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2814                         if ((tmp & CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT)
2815                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2816                                           " PLL failed\n", __func__);
2817                 } else {
2818                         bcma_set32(core, D11REGOFFS(clk_ctl_st),
2819                                    tmp | CCS_ERSRC_REQ_D11PLL |
2820                                    CCS_ERSRC_REQ_PHYPLL);
2821                         SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2822                                   (CCS_ERSRC_AVAIL_D11PLL |
2823                                    CCS_ERSRC_AVAIL_PHYPLL)) !=
2824                                  (CCS_ERSRC_AVAIL_D11PLL |
2825                                   CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2826
2827                         tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2828                         if ((tmp &
2829                              (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2830                             !=
2831                             (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2832                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2833                                           "PHY PLL failed\n", __func__);
2834                 }
2835         } else {
2836                 /*
2837                  * Since the PLL may be shared, other cores can still
2838                  * be requesting it; so we'll deassert the request but
2839                  * not wait for status to comply.
2840                  */
2841                 bcma_mask32(core, D11REGOFFS(clk_ctl_st),
2842                             ~CCS_ERSRC_REQ_PHYPLL);
2843                 (void)bcma_read32(core, D11REGOFFS(clk_ctl_st));
2844         }
2845 }
2846
2847 static void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2848 {
2849         bool dev_gone;
2850
2851         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2852
2853         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2854
2855         if (dev_gone)
2856                 return;
2857
2858         if (wlc_hw->noreset)
2859                 return;
2860
2861         /* radio off */
2862         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2863
2864         /* turn off analog core */
2865         wlc_phy_anacore(wlc_hw->band->pi, OFF);
2866
2867         /* turn off PHYPLL to save power */
2868         brcms_b_core_phypll_ctl(wlc_hw, false);
2869
2870         wlc_hw->clk = false;
2871         bcma_core_disable(wlc_hw->d11core, 0);
2872         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2873 }
2874
2875 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2876 {
2877         struct brcms_hardware *wlc_hw = wlc->hw;
2878         uint i;
2879
2880         /* free any posted tx packets */
2881         for (i = 0; i < NFIFO; i++)
2882                 if (wlc_hw->di[i]) {
2883                         dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
2884                         wlc->core->txpktpend[i] = 0;
2885                         BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
2886                 }
2887
2888         /* free any posted rx packets */
2889         dma_rxreclaim(wlc_hw->di[RX_FIFO]);
2890 }
2891
2892 static u16
2893 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
2894 {
2895         struct bcma_device *core = wlc_hw->d11core;
2896         u16 objoff = D11REGOFFS(objdata);
2897
2898         bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2899         (void)bcma_read32(core, D11REGOFFS(objaddr));
2900         if (offset & 2)
2901                 objoff += 2;
2902
2903         return bcma_read16(core, objoff);
2904 }
2905
2906 static void
2907 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
2908                      u32 sel)
2909 {
2910         struct bcma_device *core = wlc_hw->d11core;
2911         u16 objoff = D11REGOFFS(objdata);
2912
2913         bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2914         (void)bcma_read32(core, D11REGOFFS(objaddr));
2915         if (offset & 2)
2916                 objoff += 2;
2917
2918         bcma_write16(core, objoff, v);
2919 }
2920
2921 /*
2922  * Read a single u16 from shared memory.
2923  * SHM 'offset' needs to be an even address
2924  */
2925 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
2926 {
2927         return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
2928 }
2929
2930 /*
2931  * Write a single u16 to shared memory.
2932  * SHM 'offset' needs to be an even address
2933  */
2934 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
2935 {
2936         brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
2937 }
2938
2939 /*
2940  * Copy a buffer to shared memory of specified type .
2941  * SHM 'offset' needs to be an even address and
2942  * Buffer length 'len' must be an even number of bytes
2943  * 'sel' selects the type of memory
2944  */
2945 void
2946 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
2947                       const void *buf, int len, u32 sel)
2948 {
2949         u16 v;
2950         const u8 *p = (const u8 *)buf;
2951         int i;
2952
2953         if (len <= 0 || (offset & 1) || (len & 1))
2954                 return;
2955
2956         for (i = 0; i < len; i += 2) {
2957                 v = p[i] | (p[i + 1] << 8);
2958                 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
2959         }
2960 }
2961
2962 /*
2963  * Copy a piece of shared memory of specified type to a buffer .
2964  * SHM 'offset' needs to be an even address and
2965  * Buffer length 'len' must be an even number of bytes
2966  * 'sel' selects the type of memory
2967  */
2968 void
2969 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
2970                          int len, u32 sel)
2971 {
2972         u16 v;
2973         u8 *p = (u8 *) buf;
2974         int i;
2975
2976         if (len <= 0 || (offset & 1) || (len & 1))
2977                 return;
2978
2979         for (i = 0; i < len; i += 2) {
2980                 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
2981                 p[i] = v & 0xFF;
2982                 p[i + 1] = (v >> 8) & 0xFF;
2983         }
2984 }
2985
2986 /* Copy a buffer to shared memory.
2987  * SHM 'offset' needs to be an even address and
2988  * Buffer length 'len' must be an even number of bytes
2989  */
2990 static void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset,
2991                         const void *buf, int len)
2992 {
2993         brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
2994 }
2995
2996 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
2997                                    u16 SRL, u16 LRL)
2998 {
2999         wlc_hw->SRL = SRL;
3000         wlc_hw->LRL = LRL;
3001
3002         /* write retry limit to SCR, shouldn't need to suspend */
3003         if (wlc_hw->up) {
3004                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3005                              OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3006                 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3007                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->SRL);
3008                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3009                              OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3010                 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3011                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->LRL);
3012         }
3013 }
3014
3015 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3016 {
3017         if (set) {
3018                 if (mboolisset(wlc_hw->pllreq, req_bit))
3019                         return;
3020
3021                 mboolset(wlc_hw->pllreq, req_bit);
3022
3023                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3024                         if (!wlc_hw->sbclk)
3025                                 brcms_b_xtal(wlc_hw, ON);
3026                 }
3027         } else {
3028                 if (!mboolisset(wlc_hw->pllreq, req_bit))
3029                         return;
3030
3031                 mboolclr(wlc_hw->pllreq, req_bit);
3032
3033                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3034                         if (wlc_hw->sbclk)
3035                                 brcms_b_xtal(wlc_hw, OFF);
3036                 }
3037         }
3038 }
3039
3040 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3041 {
3042         wlc_hw->antsel_avail = antsel_avail;
3043 }
3044
3045 /*
3046  * conditions under which the PM bit should be set in outgoing frames
3047  * and STAY_AWAKE is meaningful
3048  */
3049 static bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3050 {
3051         struct brcms_bss_cfg *cfg = wlc->bsscfg;
3052
3053         /* disallow PS when one of the following global conditions meets */
3054         if (!wlc->pub->associated)
3055                 return false;
3056
3057         /* disallow PS when one of these meets when not scanning */
3058         if (wlc->filter_flags & FIF_PROMISC_IN_BSS)
3059                 return false;
3060
3061         if (cfg->associated) {
3062                 /*
3063                  * disallow PS when one of the following
3064                  * bsscfg specific conditions meets
3065                  */
3066                 if (!cfg->BSS)
3067                         return false;
3068
3069                 return false;
3070         }
3071
3072         return true;
3073 }
3074
3075 static void brcms_c_statsupd(struct brcms_c_info *wlc)
3076 {
3077         int i;
3078         struct macstat macstats;
3079 #ifdef DEBUG
3080         u16 delta;
3081         u16 rxf0ovfl;
3082         u16 txfunfl[NFIFO];
3083 #endif                          /* DEBUG */
3084
3085         /* if driver down, make no sense to update stats */
3086         if (!wlc->pub->up)
3087                 return;
3088
3089 #ifdef DEBUG
3090         /* save last rx fifo 0 overflow count */
3091         rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
3092
3093         /* save last tx fifo  underflow count */
3094         for (i = 0; i < NFIFO; i++)
3095                 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
3096 #endif                          /* DEBUG */
3097
3098         /* Read mac stats from contiguous shared memory */
3099         brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
3100                                 sizeof(struct macstat), OBJADDR_SHM_SEL);
3101
3102 #ifdef DEBUG
3103         /* check for rx fifo 0 overflow */
3104         delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
3105         if (delta)
3106                 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
3107                           wlc->pub->unit, delta);
3108
3109         /* check for tx fifo underflows */
3110         for (i = 0; i < NFIFO; i++) {
3111                 delta =
3112                     (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
3113                               txfunfl[i]);
3114                 if (delta)
3115                         wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
3116                                   "\n", wlc->pub->unit, delta, i);
3117         }
3118 #endif                          /* DEBUG */
3119
3120         /* merge counters from dma module */
3121         for (i = 0; i < NFIFO; i++) {
3122                 if (wlc->hw->di[i])
3123                         dma_counterreset(wlc->hw->di[i]);
3124         }
3125 }
3126
3127 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3128 {
3129         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3130
3131         /* reset the core */
3132         if (!brcms_deviceremoved(wlc_hw->wlc))
3133                 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3134
3135         /* purge the dma rings */
3136         brcms_c_flushqueues(wlc_hw->wlc);
3137 }
3138
3139 void brcms_c_reset(struct brcms_c_info *wlc)
3140 {
3141         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3142
3143         /* slurp up hw mac counters before core reset */
3144         brcms_c_statsupd(wlc);
3145
3146         /* reset our snapshot of macstat counters */
3147         memset((char *)wlc->core->macstat_snapshot, 0,
3148                 sizeof(struct macstat));
3149
3150         brcms_b_reset(wlc->hw);
3151 }
3152
3153 /* Return the channel the driver should initialize during brcms_c_init.
3154  * the channel may have to be changed from the currently configured channel
3155  * if other configurations are in conflict (bandlocked, 11n mode disabled,
3156  * invalid channel for current country, etc.)
3157  */
3158 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3159 {
3160         u16 chanspec =
3161             1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3162             WL_CHANSPEC_BAND_2G;
3163
3164         return chanspec;
3165 }
3166
3167 void brcms_c_init_scb(struct scb *scb)
3168 {
3169         int i;
3170
3171         memset(scb, 0, sizeof(struct scb));
3172         scb->flags = SCB_WMECAP | SCB_HTCAP;
3173         for (i = 0; i < NUMPRIO; i++) {
3174                 scb->seqnum[i] = 0;
3175                 scb->seqctl[i] = 0xFFFF;
3176         }
3177
3178         scb->seqctl_nonqos = 0xFFFF;
3179         scb->magic = SCB_MAGIC;
3180 }
3181
3182 /* d11 core init
3183  *   reset PSM
3184  *   download ucode/PCM
3185  *   let ucode run to suspended
3186  *   download ucode inits
3187  *   config other core registers
3188  *   init dma
3189  */
3190 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3191 {
3192         struct brcms_hardware *wlc_hw = wlc->hw;
3193         struct bcma_device *core = wlc_hw->d11core;
3194         u32 sflags;
3195         u32 bcnint_us;
3196         uint i = 0;
3197         bool fifosz_fixup = false;
3198         int err = 0;
3199         u16 buf[NFIFO];
3200         struct wiphy *wiphy = wlc->wiphy;
3201         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3202
3203         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3204
3205         /* reset PSM */
3206         brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3207
3208         brcms_ucode_download(wlc_hw);
3209         /*
3210          * FIFOSZ fixup. driver wants to controls the fifo allocation.
3211          */
3212         fifosz_fixup = true;
3213
3214         /* let the PSM run to the suspended state, set mode to BSS STA */
3215         bcma_write32(core, D11REGOFFS(macintstatus), -1);
3216         brcms_b_mctrl(wlc_hw, ~0,
3217                        (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3218
3219         /* wait for ucode to self-suspend after auto-init */
3220         SPINWAIT(((bcma_read32(core, D11REGOFFS(macintstatus)) &
3221                    MI_MACSSPNDD) == 0), 1000 * 1000);
3222         if ((bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD) == 0)
3223                 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3224                           "suspend!\n", wlc_hw->unit);
3225
3226         brcms_c_gpio_init(wlc);
3227
3228         sflags = bcma_aread32(core, BCMA_IOST);
3229
3230         if (D11REV_IS(wlc_hw->corerev, 23)) {
3231                 if (BRCMS_ISNPHY(wlc_hw->band))
3232                         brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3233                 else
3234                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3235                                   " %d\n", __func__, wlc_hw->unit,
3236                                   wlc_hw->corerev);
3237         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3238                 if (BRCMS_ISLCNPHY(wlc_hw->band))
3239                         brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3240                 else
3241                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3242                                   " %d\n", __func__, wlc_hw->unit,
3243                                   wlc_hw->corerev);
3244         } else {
3245                 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3246                           __func__, wlc_hw->unit, wlc_hw->corerev);
3247         }
3248
3249         /* For old ucode, txfifo sizes needs to be modified(increased) */
3250         if (fifosz_fixup)
3251                 brcms_b_corerev_fifofixup(wlc_hw);
3252
3253         /* check txfifo allocations match between ucode and driver */
3254         buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3255         if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3256                 i = TX_AC_BE_FIFO;
3257                 err = -1;
3258         }
3259         buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3260         if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3261                 i = TX_AC_VI_FIFO;
3262                 err = -1;
3263         }
3264         buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3265         buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3266         buf[TX_AC_BK_FIFO] &= 0xff;
3267         if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3268                 i = TX_AC_BK_FIFO;
3269                 err = -1;
3270         }
3271         if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3272                 i = TX_AC_VO_FIFO;
3273                 err = -1;
3274         }
3275         buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3276         buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3277         buf[TX_BCMC_FIFO] &= 0xff;
3278         if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3279                 i = TX_BCMC_FIFO;
3280                 err = -1;
3281         }
3282         if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3283                 i = TX_ATIM_FIFO;
3284                 err = -1;
3285         }
3286         if (err != 0)
3287                 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3288                           " driver size %d index %d\n", buf[i],
3289                           wlc_hw->xmtfifo_sz[i], i);
3290
3291         /* make sure we can still talk to the mac */
3292         WARN_ON(bcma_read32(core, D11REGOFFS(maccontrol)) == 0xffffffff);
3293
3294         /* band-specific inits done by wlc_bsinit() */
3295
3296         /* Set up frame burst size and antenna swap threshold init values */
3297         brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3298         brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3299
3300         /* enable one rx interrupt per received frame */
3301         bcma_write32(core, D11REGOFFS(intrcvlazy[0]), (1 << IRL_FC_SHIFT));
3302
3303         /* set the station mode (BSS STA) */
3304         brcms_b_mctrl(wlc_hw,
3305                        (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3306                        (MCTL_INFRA | MCTL_DISCARD_PMQ));
3307
3308         /* set up Beacon interval */
3309         bcnint_us = 0x8000 << 10;
3310         bcma_write32(core, D11REGOFFS(tsf_cfprep),
3311                      (bcnint_us << CFPREP_CBI_SHIFT));
3312         bcma_write32(core, D11REGOFFS(tsf_cfpstart), bcnint_us);
3313         bcma_write32(core, D11REGOFFS(macintstatus), MI_GP1);
3314
3315         /* write interrupt mask */
3316         bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intmask),
3317                      DEF_RXINTMASK);
3318
3319         /* allow the MAC to control the PHY clock (dynamic on/off) */
3320         brcms_b_macphyclk_set(wlc_hw, ON);
3321
3322         /* program dynamic clock control fast powerup delay register */
3323         wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3324         bcma_write16(core, D11REGOFFS(scc_fastpwrup_dly), wlc->fastpwrup_dly);
3325
3326         /* tell the ucode the corerev */
3327         brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3328
3329         /* tell the ucode MAC capabilities */
3330         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3331                            (u16) (wlc_hw->machwcap & 0xffff));
3332         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3333                            (u16) ((wlc_hw->
3334                                       machwcap >> 16) & 0xffff));
3335
3336         /* write retry limits to SCR, this done after PSM init */
3337         bcma_write32(core, D11REGOFFS(objaddr),
3338                      OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3339         (void)bcma_read32(core, D11REGOFFS(objaddr));
3340         bcma_write32(core, D11REGOFFS(objdata), wlc_hw->SRL);
3341         bcma_write32(core, D11REGOFFS(objaddr),
3342                      OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3343         (void)bcma_read32(core, D11REGOFFS(objaddr));
3344         bcma_write32(core, D11REGOFFS(objdata), wlc_hw->LRL);
3345
3346         /* write rate fallback retry limits */
3347         brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3348         brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3349
3350         bcma_mask16(core, D11REGOFFS(ifs_ctl), 0x0FFF);
3351         bcma_write16(core, D11REGOFFS(ifs_aifsn), EDCF_AIFSN_MIN);
3352
3353         /* init the tx dma engines */
3354         for (i = 0; i < NFIFO; i++) {
3355                 if (wlc_hw->di[i])
3356                         dma_txinit(wlc_hw->di[i]);
3357         }
3358
3359         /* init the rx dma engine(s) and post receive buffers */
3360         dma_rxinit(wlc_hw->di[RX_FIFO]);
3361         dma_rxfill(wlc_hw->di[RX_FIFO]);
3362 }
3363
3364 void
3365 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec) {
3366         u32 macintmask;
3367         bool fastclk;
3368         struct brcms_c_info *wlc = wlc_hw->wlc;
3369
3370         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3371
3372         /* request FAST clock if not on */
3373         fastclk = wlc_hw->forcefastclk;
3374         if (!fastclk)
3375                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3376
3377         /* disable interrupts */
3378         macintmask = brcms_intrsoff(wlc->wl);
3379
3380         /* set up the specified band and chanspec */
3381         brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3382         wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3383
3384         /* do one-time phy inits and calibration */
3385         wlc_phy_cal_init(wlc_hw->band->pi);
3386
3387         /* core-specific initialization */
3388         brcms_b_coreinit(wlc);
3389
3390         /* band-specific inits */
3391         brcms_b_bsinit(wlc, chanspec);
3392
3393         /* restore macintmask */
3394         brcms_intrsrestore(wlc->wl, macintmask);
3395
3396         /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3397          * is suspended and brcms_c_enable_mac() will clear this override bit.
3398          */
3399         mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3400
3401         /*
3402          * initialize mac_suspend_depth to 1 to match ucode
3403          * initial suspended state
3404          */
3405         wlc_hw->mac_suspend_depth = 1;
3406
3407         /* restore the clk */
3408         if (!fastclk)
3409                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3410 }
3411
3412 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3413                                      u16 chanspec)
3414 {
3415         /* Save our copy of the chanspec */
3416         wlc->chanspec = chanspec;
3417
3418         /* Set the chanspec and power limits for this locale */
3419         brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3420
3421         if (wlc->stf->ss_algosel_auto)
3422                 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3423                                             chanspec);
3424
3425         brcms_c_stf_ss_update(wlc, wlc->band);
3426 }
3427
3428 static void
3429 brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
3430 {
3431         brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
3432                 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
3433                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
3434                 brcms_chspec_bw(wlc->default_bss->chanspec),
3435                 wlc->stf->txstreams);
3436 }
3437
3438 /* derive wlc->band->basic_rate[] table from 'rateset' */
3439 static void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
3440                               struct brcms_c_rateset *rateset)
3441 {
3442         u8 rate;
3443         u8 mandatory;
3444         u8 cck_basic = 0;
3445         u8 ofdm_basic = 0;
3446         u8 *br = wlc->band->basic_rate;
3447         uint i;
3448
3449         /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3450         memset(br, 0, BRCM_MAXRATE + 1);
3451
3452         /* For each basic rate in the rates list, make an entry in the
3453          * best basic lookup.
3454          */
3455         for (i = 0; i < rateset->count; i++) {
3456                 /* only make an entry for a basic rate */
3457                 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
3458                         continue;
3459
3460                 /* mask off basic bit */
3461                 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
3462
3463                 if (rate > BRCM_MAXRATE) {
3464                         wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
3465                                   "invalid rate 0x%X in rate set\n",
3466                                   rateset->rates[i]);
3467                         continue;
3468                 }
3469
3470                 br[rate] = rate;
3471         }
3472
3473         /* The rate lookup table now has non-zero entries for each
3474          * basic rate, equal to the basic rate: br[basicN] = basicN
3475          *
3476          * To look up the best basic rate corresponding to any
3477          * particular rate, code can use the basic_rate table
3478          * like this
3479          *
3480          * basic_rate = wlc->band->basic_rate[tx_rate]
3481          *
3482          * Make sure there is a best basic rate entry for
3483          * every rate by walking up the table from low rates
3484          * to high, filling in holes in the lookup table
3485          */
3486
3487         for (i = 0; i < wlc->band->hw_rateset.count; i++) {
3488                 rate = wlc->band->hw_rateset.rates[i];
3489
3490                 if (br[rate] != 0) {
3491                         /* This rate is a basic rate.
3492                          * Keep track of the best basic rate so far by
3493                          * modulation type.
3494                          */
3495                         if (is_ofdm_rate(rate))
3496                                 ofdm_basic = rate;
3497                         else
3498                                 cck_basic = rate;
3499
3500                         continue;
3501                 }
3502
3503                 /* This rate is not a basic rate so figure out the
3504                  * best basic rate less than this rate and fill in
3505                  * the hole in the table
3506                  */
3507
3508                 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
3509
3510                 if (br[rate] != 0)
3511                         continue;
3512
3513                 if (is_ofdm_rate(rate)) {
3514                         /*
3515                          * In 11g and 11a, the OFDM mandatory rates
3516                          * are 6, 12, and 24 Mbps
3517                          */
3518                         if (rate >= BRCM_RATE_24M)
3519                                 mandatory = BRCM_RATE_24M;
3520                         else if (rate >= BRCM_RATE_12M)
3521                                 mandatory = BRCM_RATE_12M;
3522                         else
3523                                 mandatory = BRCM_RATE_6M;
3524                 } else {
3525                         /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3526                         mandatory = rate;
3527                 }
3528
3529                 br[rate] = mandatory;
3530         }
3531 }
3532
3533 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3534                                      u16 chanspec)
3535 {
3536         struct brcms_c_rateset default_rateset;
3537         uint parkband;
3538         uint i, band_order[2];
3539
3540         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3541         /*
3542          * We might have been bandlocked during down and the chip
3543          * power-cycled (hibernate). Figure out the right band to park on
3544          */
3545         if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3546                 /* updated in brcms_c_bandlock() */
3547                 parkband = wlc->band->bandunit;
3548                 band_order[0] = band_order[1] = parkband;
3549         } else {
3550                 /* park on the band of the specified chanspec */
3551                 parkband = chspec_bandunit(chanspec);
3552
3553                 /* order so that parkband initialize last */
3554                 band_order[0] = parkband ^ 1;
3555                 band_order[1] = parkband;
3556         }
3557
3558         /* make each band operational, software state init */
3559         for (i = 0; i < wlc->pub->_nbands; i++) {
3560                 uint j = band_order[i];
3561
3562                 wlc->band = wlc->bandstate[j];
3563
3564                 brcms_default_rateset(wlc, &default_rateset);
3565
3566                 /* fill in hw_rate */
3567                 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3568                                    false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3569                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3570
3571                 /* init basic rate lookup */
3572                 brcms_c_rate_lookup_init(wlc, &default_rateset);
3573         }
3574
3575         /* sync up phy/radio chanspec */
3576         brcms_c_set_phy_chanspec(wlc, chanspec);
3577 }
3578
3579 /*
3580  * Set or clear filtering related maccontrol bits based on
3581  * specified filter flags
3582  */
3583 void brcms_c_mac_promisc(struct brcms_c_info *wlc, uint filter_flags)
3584 {
3585         u32 promisc_bits = 0;
3586
3587         wlc->filter_flags = filter_flags;
3588
3589         if (filter_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS))
3590                 promisc_bits |= MCTL_PROMISC;
3591
3592         if (filter_flags & FIF_BCN_PRBRESP_PROMISC)
3593                 promisc_bits |= MCTL_BCNS_PROMISC;
3594
3595         if (filter_flags & FIF_FCSFAIL)
3596                 promisc_bits |= MCTL_KEEPBADFCS;
3597
3598         if (filter_flags & (FIF_CONTROL | FIF_PSPOLL))
3599                 promisc_bits |= MCTL_KEEPCONTROL;
3600
3601         brcms_b_mctrl(wlc->hw,
3602                 MCTL_PROMISC | MCTL_BCNS_PROMISC |
3603                 MCTL_KEEPCONTROL | MCTL_KEEPBADFCS,
3604                 promisc_bits);
3605 }
3606
3607 /*
3608  * ucode, hwmac update
3609  *    Channel dependent updates for ucode and hw
3610  */
3611 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3612 {
3613         /* enable or disable any active IBSSs depending on whether or not
3614          * we are on the home channel
3615          */
3616         if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3617                 if (wlc->pub->associated) {
3618                         /*
3619                          * BMAC_NOTE: This is something that should be fixed
3620                          * in ucode inits. I think that the ucode inits set
3621                          * up the bcn templates and shm values with a bogus
3622                          * beacon. This should not be done in the inits. If
3623                          * ucode needs to set up a beacon for testing, the
3624                          * test routines should write it down, not expect the
3625                          * inits to populate a bogus beacon.
3626                          */
3627                         if (BRCMS_PHY_11N_CAP(wlc->band))
3628                                 brcms_b_write_shm(wlc->hw,
3629                                                 M_BCN_TXTSF_OFFSET, 0);
3630                 }
3631         } else {
3632                 /* disable an active IBSS if we are not on the home channel */
3633         }
3634 }
3635
3636 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
3637                                    u8 basic_rate)
3638 {
3639         u8 phy_rate, index;
3640         u8 basic_phy_rate, basic_index;
3641         u16 dir_table, basic_table;
3642         u16 basic_ptr;
3643
3644         /* Shared memory address for the table we are reading */
3645         dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
3646
3647         /* Shared memory address for the table we are writing */
3648         basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
3649
3650         /*
3651          * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3652          * the index into the rate table.
3653          */
3654         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
3655         basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
3656         index = phy_rate & 0xf;
3657         basic_index = basic_phy_rate & 0xf;
3658
3659         /* Find the SHM pointer to the ACK rate entry by looking in the
3660          * Direct-map Table
3661          */
3662         basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
3663
3664         /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3665          * to the correct basic rate for the given incoming rate
3666          */
3667         brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
3668 }
3669
3670 static const struct brcms_c_rateset *
3671 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
3672 {
3673         const struct brcms_c_rateset *rs_dflt;
3674
3675         if (BRCMS_PHY_11N_CAP(wlc->band)) {
3676                 if (wlc->band->bandtype == BRCM_BAND_5G)
3677                         rs_dflt = &ofdm_mimo_rates;
3678                 else
3679                         rs_dflt = &cck_ofdm_mimo_rates;
3680         } else if (wlc->band->gmode)
3681                 rs_dflt = &cck_ofdm_rates;
3682         else
3683                 rs_dflt = &cck_rates;
3684
3685         return rs_dflt;
3686 }
3687
3688 static void brcms_c_set_ratetable(struct brcms_c_info *wlc)
3689 {
3690         const struct brcms_c_rateset *rs_dflt;
3691         struct brcms_c_rateset rs;
3692         u8 rate, basic_rate;
3693         uint i;
3694
3695         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
3696
3697         brcms_c_rateset_copy(rs_dflt, &rs);
3698         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
3699
3700         /* walk the phy rate table and update SHM basic rate lookup table */
3701         for (i = 0; i < rs.count; i++) {
3702                 rate = rs.rates[i] & BRCMS_RATE_MASK;
3703
3704                 /* for a given rate brcms_basic_rate returns the rate at
3705                  * which a response ACK/CTS should be sent.
3706                  */
3707                 basic_rate = brcms_basic_rate(wlc, rate);
3708                 if (basic_rate == 0)
3709                         /* This should only happen if we are using a
3710                          * restricted rateset.
3711                          */
3712                         basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
3713
3714                 brcms_c_write_rate_shm(wlc, rate, basic_rate);
3715         }
3716 }
3717
3718 /* band-specific init */
3719 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3720 {
3721         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3722                  wlc->pub->unit, wlc->band->bandunit);
3723
3724         /* write ucode ACK/CTS rate table */
3725         brcms_c_set_ratetable(wlc);
3726
3727         /* update some band specific mac configuration */
3728         brcms_c_ucode_mac_upd(wlc);
3729
3730         /* init antenna selection */
3731         brcms_c_antsel_init(wlc->asi);
3732
3733 }
3734
3735 /* formula:  IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3736 static int
3737 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3738                    bool writeToShm)
3739 {
3740         int idle_busy_ratio_x_16 = 0;
3741         uint offset =
3742             isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3743             M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3744         if (duty_cycle > 100 || duty_cycle < 0) {
3745                 wiphy_err(wlc->wiphy, "wl%d:  duty cycle value off limit\n",
3746                           wlc->pub->unit);
3747                 return -EINVAL;
3748         }
3749         if (duty_cycle)
3750                 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3751         /* Only write to shared memory  when wl is up */
3752         if (writeToShm)
3753                 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3754
3755         if (isOFDM)
3756                 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3757         else
3758                 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3759
3760         return 0;
3761 }
3762
3763 /*
3764  * Initialize the base precedence map for dequeueing
3765  * from txq based on WME settings
3766  */
3767 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3768 {
3769         wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3770         memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3771
3772         wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3773         wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3774         wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3775         wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3776 }
3777
3778 static void
3779 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3780                              struct brcms_txq_info *qi, bool on, int prio)
3781 {
3782         /* transmit flowcontrol is not yet implemented */
3783 }
3784
3785 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3786 {
3787         struct brcms_txq_info *qi;
3788
3789         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3790                 if (qi->stopped) {
3791                         brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3792                         qi->stopped = 0;
3793                 }
3794         }
3795 }
3796
3797 /* push sw hps and wake state through hardware */
3798 static void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3799 {
3800         u32 v1, v2;
3801         bool hps;
3802         bool awake_before;
3803
3804         hps = brcms_c_ps_allowed(wlc);
3805
3806         BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3807
3808         v1 = bcma_read32(wlc->hw->d11core, D11REGOFFS(maccontrol));
3809         v2 = MCTL_WAKE;
3810         if (hps)
3811                 v2 |= MCTL_HPS;
3812
3813         brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3814
3815         awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3816
3817         if (!awake_before)
3818                 brcms_b_wait_for_wake(wlc->hw);
3819 }
3820
3821 /*
3822  * Write this BSS config's MAC address to core.
3823  * Updates RXE match engine.
3824  */
3825 static int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3826 {
3827         int err = 0;
3828         struct brcms_c_info *wlc = bsscfg->wlc;
3829
3830         /* enter the MAC addr into the RXE match registers */
3831         brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3832
3833         brcms_c_ampdu_macaddr_upd(wlc);
3834
3835         return err;
3836 }
3837
3838 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3839  * Updates RXE match engine.
3840  */
3841 static void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3842 {
3843         /* we need to update BSSID in RXE match registers */
3844         brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3845 }
3846
3847 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3848 {
3849         wlc_hw->shortslot = shortslot;
3850
3851         if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3852                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3853                 brcms_b_update_slot_timing(wlc_hw, shortslot);
3854                 brcms_c_enable_mac(wlc_hw->wlc);
3855         }
3856 }
3857
3858 /*
3859  * Suspend the the MAC and update the slot timing
3860  * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3861  */
3862 static void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3863 {
3864         /* use the override if it is set */
3865         if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3866                 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3867
3868         if (wlc->shortslot == shortslot)
3869                 return;
3870
3871         wlc->shortslot = shortslot;
3872
3873         brcms_b_set_shortslot(wlc->hw, shortslot);
3874 }
3875
3876 static void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3877 {
3878         if (wlc->home_chanspec != chanspec) {
3879                 wlc->home_chanspec = chanspec;
3880
3881                 if (wlc->bsscfg->associated)
3882                         wlc->bsscfg->current_bss->chanspec = chanspec;
3883         }
3884 }
3885
3886 void
3887 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3888                       bool mute_tx, struct txpwr_limits *txpwr)
3889 {
3890         uint bandunit;
3891
3892         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3893
3894         wlc_hw->chanspec = chanspec;
3895
3896         /* Switch bands if necessary */
3897         if (wlc_hw->_nbands > 1) {
3898                 bandunit = chspec_bandunit(chanspec);
3899                 if (wlc_hw->band->bandunit != bandunit) {
3900                         /* brcms_b_setband disables other bandunit,
3901                          *  use light band switch if not up yet
3902                          */
3903                         if (wlc_hw->up) {
3904                                 wlc_phy_chanspec_radio_set(wlc_hw->
3905                                                            bandstate[bandunit]->
3906                                                            pi, chanspec);
3907                                 brcms_b_setband(wlc_hw, bandunit, chanspec);
3908                         } else {
3909                                 brcms_c_setxband(wlc_hw, bandunit);
3910                         }
3911                 }
3912         }
3913
3914         wlc_phy_initcal_enable(wlc_hw->band->pi, !mute_tx);
3915
3916         if (!wlc_hw->up) {
3917                 if (wlc_hw->clk)
3918                         wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3919                                                   chanspec);
3920                 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3921         } else {
3922                 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3923                 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3924
3925                 /* Update muting of the channel */
3926                 brcms_b_mute(wlc_hw, mute_tx);
3927         }
3928 }
3929
3930 /* switch to and initialize new band */
3931 static void brcms_c_setband(struct brcms_c_info *wlc,
3932                                            uint bandunit)
3933 {
3934         wlc->band = wlc->bandstate[bandunit];
3935
3936         if (!wlc->pub->up)
3937                 return;
3938
3939         /* wait for at least one beacon before entering sleeping state */
3940         brcms_c_set_ps_ctrl(wlc);
3941
3942         /* band-specific initializations */
3943         brcms_c_bsinit(wlc);
3944 }
3945
3946 static void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3947 {
3948         uint bandunit;
3949         bool switchband = false;
3950         u16 old_chanspec = wlc->chanspec;
3951
3952         if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3953                 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3954                           wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3955                 return;
3956         }
3957
3958         /* Switch bands if necessary */
3959         if (wlc->pub->_nbands > 1) {
3960                 bandunit = chspec_bandunit(chanspec);
3961                 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3962                         switchband = true;
3963                         if (wlc->bandlocked) {
3964                                 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3965                                           "band is locked!\n",
3966                                           wlc->pub->unit, __func__,
3967                                           CHSPEC_CHANNEL(chanspec));
3968                                 return;
3969                         }
3970                         /*
3971                          * should the setband call come after the
3972                          * brcms_b_chanspec() ? if the setband updates
3973                          * (brcms_c_bsinit) use low level calls to inspect and
3974                          * set state, the state inspected may be from the wrong
3975                          * band, or the following brcms_b_set_chanspec() may
3976                          * undo the work.
3977                          */
3978                         brcms_c_setband(wlc, bandunit);
3979                 }
3980         }
3981
3982         /* sync up phy/radio chanspec */
3983         brcms_c_set_phy_chanspec(wlc, chanspec);
3984
3985         /* init antenna selection */
3986         if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
3987                 brcms_c_antsel_init(wlc->asi);
3988
3989                 /* Fix the hardware rateset based on bw.
3990                  * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
3991                  */
3992                 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
3993                         wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
3994         }
3995
3996         /* update some mac configuration since chanspec changed */
3997         brcms_c_ucode_mac_upd(wlc);
3998 }
3999
4000 /*
4001  * This function changes the phytxctl for beacon based on current
4002  * beacon ratespec AND txant setting as per this table:
4003  *  ratespec     CCK            ant = wlc->stf->txant
4004  *              OFDM            ant = 3
4005  */
4006 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4007                                        u32 bcn_rspec)
4008 {
4009         u16 phyctl;
4010         u16 phytxant = wlc->stf->phytxant;
4011         u16 mask = PHY_TXC_ANT_MASK;
4012
4013         /* for non-siso rates or default setting, use the available chains */
4014         if (BRCMS_PHY_11N_CAP(wlc->band))
4015                 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4016
4017         phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4018         phyctl = (phyctl & ~mask) | phytxant;
4019         brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4020 }
4021
4022 /*
4023  * centralized protection config change function to simplify debugging, no
4024  * consistency checking this should be called only on changes to avoid overhead
4025  * in periodic function
4026  */
4027 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4028 {
4029         BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4030
4031         switch (idx) {
4032         case BRCMS_PROT_G_SPEC:
4033                 wlc->protection->_g = (bool) val;
4034                 break;
4035         case BRCMS_PROT_G_OVR:
4036                 wlc->protection->g_override = (s8) val;
4037                 break;
4038         case BRCMS_PROT_G_USER:
4039                 wlc->protection->gmode_user = (u8) val;
4040                 break;
4041         case BRCMS_PROT_OVERLAP:
4042                 wlc->protection->overlap = (s8) val;
4043                 break;
4044         case BRCMS_PROT_N_USER:
4045                 wlc->protection->nmode_user = (s8) val;
4046                 break;
4047         case BRCMS_PROT_N_CFG:
4048                 wlc->protection->n_cfg = (s8) val;
4049                 break;
4050         case BRCMS_PROT_N_CFG_OVR:
4051                 wlc->protection->n_cfg_override = (s8) val;
4052                 break;
4053         case BRCMS_PROT_N_NONGF:
4054                 wlc->protection->nongf = (bool) val;
4055                 break;
4056         case BRCMS_PROT_N_NONGF_OVR:
4057                 wlc->protection->nongf_override = (s8) val;
4058                 break;
4059         case BRCMS_PROT_N_PAM_OVR:
4060                 wlc->protection->n_pam_override = (s8) val;
4061                 break;
4062         case BRCMS_PROT_N_OBSS:
4063                 wlc->protection->n_obss = (bool) val;
4064                 break;
4065
4066         default:
4067                 break;
4068         }
4069
4070 }
4071
4072 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4073 {
4074         if (wlc->pub->up) {
4075                 brcms_c_update_beacon(wlc);
4076                 brcms_c_update_probe_resp(wlc, true);
4077         }
4078 }
4079
4080 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4081 {
4082         wlc->stf->ldpc = val;
4083
4084         if (wlc->pub->up) {
4085                 brcms_c_update_beacon(wlc);
4086                 brcms_c_update_probe_resp(wlc, true);
4087                 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4088         }
4089 }
4090
4091 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4092                        const struct ieee80211_tx_queue_params *params,
4093                        bool suspend)
4094 {
4095         int i;
4096         struct shm_acparams acp_shm;
4097         u16 *shm_entry;
4098
4099         /* Only apply params if the core is out of reset and has clocks */
4100         if (!wlc->clk) {
4101                 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4102                           __func__);
4103                 return;
4104         }
4105
4106         memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4107         /* fill in shm ac params struct */
4108         acp_shm.txop = params->txop;
4109         /* convert from units of 32us to us for ucode */
4110         wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4111             EDCF_TXOP2USEC(acp_shm.txop);
4112         acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4113
4114         if (aci == IEEE80211_AC_VI && acp_shm.txop == 0
4115             && acp_shm.aifs < EDCF_AIFSN_MAX)
4116                 acp_shm.aifs++;
4117
4118         if (acp_shm.aifs < EDCF_AIFSN_MIN
4119             || acp_shm.aifs > EDCF_AIFSN_MAX) {
4120                 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4121                           "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4122         } else {
4123                 acp_shm.cwmin = params->cw_min;
4124                 acp_shm.cwmax = params->cw_max;
4125                 acp_shm.cwcur = acp_shm.cwmin;
4126                 acp_shm.bslots =
4127                         bcma_read16(wlc->hw->d11core, D11REGOFFS(tsf_random)) &
4128                         acp_shm.cwcur;
4129                 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4130                 /* Indicate the new params to the ucode */
4131                 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4132                                                   wme_ac2fifo[aci] *
4133                                                   M_EDCF_QLEN +
4134                                                   M_EDCF_STATUS_OFF));
4135                 acp_shm.status |= WME_STATUS_NEWAC;
4136
4137                 /* Fill in shm acparam table */
4138                 shm_entry = (u16 *) &acp_shm;
4139                 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4140                         brcms_b_write_shm(wlc->hw,
4141                                           M_EDCF_QINFO +
4142                                           wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4143                                           *shm_entry++);
4144         }
4145
4146         if (suspend) {
4147                 brcms_c_suspend_mac_and_wait(wlc);
4148                 brcms_c_enable_mac(wlc);
4149         }
4150 }
4151
4152 static void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4153 {
4154         u16 aci;
4155         int i_ac;
4156         struct ieee80211_tx_queue_params txq_pars;
4157         static const struct edcf_acparam default_edcf_acparams[] = {
4158                  {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4159                  {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4160                  {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4161                  {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4162         }; /* ucode needs these parameters during its initialization */
4163         const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4164
4165         for (i_ac = 0; i_ac < IEEE80211_NUM_ACS; i_ac++, edcf_acp++) {
4166                 /* find out which ac this set of params applies to */
4167                 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4168
4169                 /* fill in shm ac params struct */
4170                 txq_pars.txop = edcf_acp->TXOP;
4171                 txq_pars.aifs = edcf_acp->ACI;
4172
4173                 /* CWmin = 2^(ECWmin) - 1 */
4174                 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4175                 /* CWmax = 2^(ECWmax) - 1 */
4176                 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4177                                             >> EDCF_ECWMAX_SHIFT);
4178                 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4179         }
4180
4181         if (suspend) {
4182                 brcms_c_suspend_mac_and_wait(wlc);
4183                 brcms_c_enable_mac(wlc);
4184         }
4185 }
4186
4187 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4188 {
4189         /* Don't start the timer if HWRADIO feature is disabled */
4190         if (wlc->radio_monitor)
4191                 return;
4192
4193         wlc->radio_monitor = true;
4194         brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4195         brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
4196 }
4197
4198 static bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4199 {
4200         if (!wlc->radio_monitor)
4201                 return true;
4202
4203         wlc->radio_monitor = false;
4204         brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4205         return brcms_del_timer(wlc->radio_timer);
4206 }
4207
4208 /* read hwdisable state and propagate to wlc flag */
4209 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4210 {
4211         if (wlc->pub->hw_off)
4212                 return;
4213
4214         if (brcms_b_radio_read_hwdisabled(wlc->hw))
4215                 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4216         else
4217                 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4218 }
4219
4220 /* update hwradio status and return it */
4221 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4222 {
4223         brcms_c_radio_hwdisable_upd(wlc);
4224
4225         return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4226                         true : false;
4227 }
4228
4229 /* periodical query hw radio button while driver is "down" */
4230 static void brcms_c_radio_timer(void *arg)
4231 {
4232         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4233
4234         if (brcms_deviceremoved(wlc)) {
4235                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4236                         __func__);
4237                 brcms_down(wlc->wl);
4238                 return;
4239         }
4240
4241         brcms_c_radio_hwdisable_upd(wlc);
4242 }
4243
4244 /* common low-level watchdog code */
4245 static void brcms_b_watchdog(void *arg)
4246 {
4247         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4248         struct brcms_hardware *wlc_hw = wlc->hw;
4249
4250         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4251
4252         if (!wlc_hw->up)
4253                 return;
4254
4255         /* increment second count */
4256         wlc_hw->now++;
4257
4258         /* Check for FIFO error interrupts */
4259         brcms_b_fifoerrors(wlc_hw);
4260
4261         /* make sure RX dma has buffers */
4262         dma_rxfill(wlc->hw->di[RX_FIFO]);
4263
4264         wlc_phy_watchdog(wlc_hw->band->pi);
4265 }
4266
4267 /* common watchdog code */
4268 static void brcms_c_watchdog(void *arg)
4269 {
4270         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4271
4272         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4273
4274         if (!wlc->pub->up)
4275                 return;
4276
4277         if (brcms_deviceremoved(wlc)) {
4278                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4279                           __func__);
4280                 brcms_down(wlc->wl);
4281                 return;
4282         }
4283
4284         /* increment second count */
4285         wlc->pub->now++;
4286
4287         brcms_c_radio_hwdisable_upd(wlc);
4288         /* if radio is disable, driver may be down, quit here */
4289         if (wlc->pub->radio_disabled)
4290                 return;
4291
4292         brcms_b_watchdog(wlc);
4293
4294         /*
4295          * occasionally sample mac stat counters to
4296          * detect 16-bit counter wrap
4297          */
4298         if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4299                 brcms_c_statsupd(wlc);
4300
4301         if (BRCMS_ISNPHY(wlc->band) &&
4302             ((wlc->pub->now - wlc->tempsense_lasttime) >=
4303              BRCMS_TEMPSENSE_PERIOD)) {
4304                 wlc->tempsense_lasttime = wlc->pub->now;
4305                 brcms_c_tempsense_upd(wlc);
4306         }
4307 }
4308
4309 static void brcms_c_watchdog_by_timer(void *arg)
4310 {
4311         brcms_c_watchdog(arg);
4312 }
4313
4314 static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4315 {
4316         wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4317                 wlc, "watchdog");
4318         if (!wlc->wdtimer) {
4319                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for wdtimer "
4320                           "failed\n", unit);
4321                 goto fail;
4322         }
4323
4324         wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4325                 wlc, "radio");
4326         if (!wlc->radio_timer) {
4327                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for radio_timer "
4328                           "failed\n", unit);
4329                 goto fail;
4330         }
4331
4332         return true;
4333
4334  fail:
4335         return false;
4336 }
4337
4338 /*
4339  * Initialize brcms_c_info default values ...
4340  * may get overrides later in this function
4341  */
4342 static void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4343 {
4344         int i;
4345
4346         /* Save our copy of the chanspec */
4347         wlc->chanspec = ch20mhz_chspec(1);
4348
4349         /* various 802.11g modes */
4350         wlc->shortslot = false;
4351         wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4352
4353         brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4354         brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4355
4356         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4357                                BRCMS_PROTECTION_AUTO);
4358         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4359         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4360                                BRCMS_PROTECTION_AUTO);
4361         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4362         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4363
4364         brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4365                                BRCMS_PROTECTION_CTL_OVERLAP);
4366
4367         /* 802.11g draft 4.0 NonERP elt advertisement */
4368         wlc->include_legacy_erp = true;
4369
4370         wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4371         wlc->stf->txant = ANT_TX_DEF;
4372
4373         wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4374
4375         wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4376         for (i = 0; i < NFIFO; i++)
4377                 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4378         wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4379
4380         /* default rate fallback retry limits */
4381         wlc->SFBL = RETRY_SHORT_FB;
4382         wlc->LFBL = RETRY_LONG_FB;
4383
4384         /* default mac retry limits */
4385         wlc->SRL = RETRY_SHORT_DEF;
4386         wlc->LRL = RETRY_LONG_DEF;
4387
4388         /* WME QoS mode is Auto by default */
4389         wlc->pub->_ampdu = AMPDU_AGG_HOST;
4390         wlc->pub->bcmerror = 0;
4391 }
4392
4393 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4394 {
4395         uint err = 0;
4396         uint unit;
4397         unit = wlc->pub->unit;
4398
4399         wlc->asi = brcms_c_antsel_attach(wlc);
4400         if (wlc->asi == NULL) {
4401                 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4402                           "failed\n", unit);
4403                 err = 44;
4404                 goto fail;
4405         }
4406
4407         wlc->ampdu = brcms_c_ampdu_attach(wlc);
4408         if (wlc->ampdu == NULL) {
4409                 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4410                           "failed\n", unit);
4411                 err = 50;
4412                 goto fail;
4413         }
4414
4415         if ((brcms_c_stf_attach(wlc) != 0)) {
4416                 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4417                           "failed\n", unit);
4418                 err = 68;
4419                 goto fail;
4420         }
4421  fail:
4422         return err;
4423 }
4424
4425 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4426 {
4427         return wlc->pub;
4428 }
4429
4430 /* low level attach
4431  *    run backplane attach, init nvram
4432  *    run phy attach
4433  *    initialize software state for each core and band
4434  *    put the whole chip in reset(driver down state), no clock
4435  */
4436 static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,
4437                           uint unit, bool piomode)
4438 {
4439         struct brcms_hardware *wlc_hw;
4440         char *macaddr = NULL;
4441         uint err = 0;
4442         uint j;
4443         bool wme = false;
4444         struct shared_phy_params sha_params;
4445         struct wiphy *wiphy = wlc->wiphy;
4446         struct pci_dev *pcidev = core->bus->host_pci;
4447
4448         BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit,
4449                pcidev->vendor,
4450                pcidev->device);
4451
4452         wme = true;
4453
4454         wlc_hw = wlc->hw;
4455         wlc_hw->wlc = wlc;
4456         wlc_hw->unit = unit;
4457         wlc_hw->band = wlc_hw->bandstate[0];
4458         wlc_hw->_piomode = piomode;
4459
4460         /* populate struct brcms_hardware with default values  */
4461         brcms_b_info_init(wlc_hw);
4462
4463         /*
4464          * Do the hardware portion of the attach. Also initialize software
4465          * state that depends on the particular hardware we are running.
4466          */
4467         wlc_hw->sih = ai_attach(core->bus);
4468         if (wlc_hw->sih == NULL) {
4469                 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4470                           unit);
4471                 err = 11;
4472                 goto fail;
4473         }
4474
4475         /* verify again the device is supported */
4476         if (!brcms_c_chipmatch(pcidev->vendor, pcidev->device)) {
4477                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4478                         "vendor/device (0x%x/0x%x)\n",
4479                          unit, pcidev->vendor, pcidev->device);
4480                 err = 12;
4481                 goto fail;
4482         }
4483
4484         wlc_hw->vendorid = pcidev->vendor;
4485         wlc_hw->deviceid = pcidev->device;
4486
4487         wlc_hw->d11core = core;
4488         wlc_hw->corerev = core->id.rev;
4489
4490         /* validate chip, chiprev and corerev */
4491         if (!brcms_c_isgoodchip(wlc_hw)) {
4492                 err = 13;
4493                 goto fail;
4494         }
4495
4496         /* initialize power control registers */
4497         ai_clkctl_init(wlc_hw->sih);
4498
4499         /* request fastclock and force fastclock for the rest of attach
4500          * bring the d11 core out of reset.
4501          *   For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4502          *   is still false; But it will be called again inside wlc_corereset,
4503          *   after d11 is out of reset.
4504          */
4505         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4506         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4507
4508         if (!brcms_b_validate_chip_access(wlc_hw)) {
4509                 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4510                         "failed\n", unit);
4511                 err = 14;
4512                 goto fail;
4513         }
4514
4515         /* get the board rev, used just below */
4516         j = getintvar(wlc_hw->sih, BRCMS_SROM_BOARDREV);
4517         /* promote srom boardrev of 0xFF to 1 */
4518         if (j == BOARDREV_PROMOTABLE)
4519                 j = BOARDREV_PROMOTED;
4520         wlc_hw->boardrev = (u16) j;
4521         if (!brcms_c_validboardtype(wlc_hw)) {
4522                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4523                           "board type (0x%x)" " or revision level (0x%x)\n",
4524                           unit, ai_get_boardtype(wlc_hw->sih),
4525                           wlc_hw->boardrev);
4526                 err = 15;
4527                 goto fail;
4528         }
4529         wlc_hw->sromrev = (u8) getintvar(wlc_hw->sih, BRCMS_SROM_REV);
4530         wlc_hw->boardflags = (u32) getintvar(wlc_hw->sih,
4531                                              BRCMS_SROM_BOARDFLAGS);
4532         wlc_hw->boardflags2 = (u32) getintvar(wlc_hw->sih,
4533                                               BRCMS_SROM_BOARDFLAGS2);
4534
4535         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4536                 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4537
4538         /* check device id(srom, nvram etc.) to set bands */
4539         if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4540             wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4541                 /* Dualband boards */
4542                 wlc_hw->_nbands = 2;
4543         else
4544                 wlc_hw->_nbands = 1;
4545
4546         if ((ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID))
4547                 wlc_hw->_nbands = 1;
4548
4549         /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4550          * unconditionally does the init of these values
4551          */
4552         wlc->vendorid = wlc_hw->vendorid;
4553         wlc->deviceid = wlc_hw->deviceid;
4554         wlc->pub->sih = wlc_hw->sih;
4555         wlc->pub->corerev = wlc_hw->corerev;
4556         wlc->pub->sromrev = wlc_hw->sromrev;
4557         wlc->pub->boardrev = wlc_hw->boardrev;
4558         wlc->pub->boardflags = wlc_hw->boardflags;
4559         wlc->pub->boardflags2 = wlc_hw->boardflags2;
4560         wlc->pub->_nbands = wlc_hw->_nbands;
4561
4562         wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4563
4564         if (wlc_hw->physhim == NULL) {
4565                 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4566                         "failed\n", unit);
4567                 err = 25;
4568                 goto fail;
4569         }
4570
4571         /* pass all the parameters to wlc_phy_shared_attach in one struct */
4572         sha_params.sih = wlc_hw->sih;
4573         sha_params.physhim = wlc_hw->physhim;
4574         sha_params.unit = unit;
4575         sha_params.corerev = wlc_hw->corerev;
4576         sha_params.vid = wlc_hw->vendorid;
4577         sha_params.did = wlc_hw->deviceid;
4578         sha_params.chip = ai_get_chip_id(wlc_hw->sih);
4579         sha_params.chiprev = ai_get_chiprev(wlc_hw->sih);
4580         sha_params.chippkg = ai_get_chippkg(wlc_hw->sih);
4581         sha_params.sromrev = wlc_hw->sromrev;
4582         sha_params.boardtype = ai_get_boardtype(wlc_hw->sih);
4583         sha_params.boardrev = wlc_hw->boardrev;
4584         sha_params.boardflags = wlc_hw->boardflags;
4585         sha_params.boardflags2 = wlc_hw->boardflags2;
4586
4587         /* alloc and save pointer to shared phy state area */
4588         wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4589         if (!wlc_hw->phy_sh) {
4590                 err = 16;
4591                 goto fail;
4592         }
4593
4594         /* initialize software state for each core and band */
4595         for (j = 0; j < wlc_hw->_nbands; j++) {
4596                 /*
4597                  * band0 is always 2.4Ghz
4598                  * band1, if present, is 5Ghz
4599                  */
4600
4601                 brcms_c_setxband(wlc_hw, j);
4602
4603                 wlc_hw->band->bandunit = j;
4604                 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4605                 wlc->band->bandunit = j;
4606                 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4607                 wlc->core->coreidx = core->core_index;
4608
4609                 wlc_hw->machwcap = bcma_read32(core, D11REGOFFS(machwcap));
4610                 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4611
4612                 /* init tx fifo size */
4613                 wlc_hw->xmtfifo_sz =
4614                     xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4615
4616                 /* Get a phy for this band */
4617                 wlc_hw->band->pi =
4618                         wlc_phy_attach(wlc_hw->phy_sh, core,
4619                                        wlc_hw->band->bandtype,
4620                                        wlc->wiphy);
4621                 if (wlc_hw->band->pi == NULL) {
4622                         wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4623                                   "attach failed\n", unit);
4624                         err = 17;
4625                         goto fail;
4626                 }
4627
4628                 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4629
4630                 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4631                                        &wlc_hw->band->phyrev,
4632                                        &wlc_hw->band->radioid,
4633                                        &wlc_hw->band->radiorev);
4634                 wlc_hw->band->abgphy_encore =
4635                     wlc_phy_get_encore(wlc_hw->band->pi);
4636                 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4637                 wlc_hw->band->core_flags =
4638                     wlc_phy_get_coreflags(wlc_hw->band->pi);
4639
4640                 /* verify good phy_type & supported phy revision */
4641                 if (BRCMS_ISNPHY(wlc_hw->band)) {
4642                         if (NCONF_HAS(wlc_hw->band->phyrev))
4643                                 goto good_phy;
4644                         else
4645                                 goto bad_phy;
4646                 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4647                         if (LCNCONF_HAS(wlc_hw->band->phyrev))
4648                                 goto good_phy;
4649                         else
4650                                 goto bad_phy;
4651                 } else {
4652  bad_phy:
4653                         wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4654                                   "phy type/rev (%d/%d)\n", unit,
4655                                   wlc_hw->band->phytype, wlc_hw->band->phyrev);
4656                         err = 18;
4657                         goto fail;
4658                 }
4659
4660  good_phy:
4661                 /*
4662                  * BMAC_NOTE: wlc->band->pi should not be set below and should
4663                  * be done in the high level attach. However we can not make
4664                  * that change until all low level access is changed to
4665                  * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4666                  * keeping wlc_hw->band->pi as well for incremental update of
4667                  * low level fns, and cut over low only init when all fns
4668                  * updated.
4669                  */
4670                 wlc->band->pi = wlc_hw->band->pi;
4671                 wlc->band->phytype = wlc_hw->band->phytype;
4672                 wlc->band->phyrev = wlc_hw->band->phyrev;
4673                 wlc->band->radioid = wlc_hw->band->radioid;
4674                 wlc->band->radiorev = wlc_hw->band->radiorev;
4675
4676                 /* default contention windows size limits */
4677                 wlc_hw->band->CWmin = APHY_CWMIN;
4678                 wlc_hw->band->CWmax = PHY_CWMAX;
4679
4680                 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4681                         err = 19;
4682                         goto fail;
4683                 }
4684         }
4685
4686         /* disable core to match driver "down" state */
4687         brcms_c_coredisable(wlc_hw);
4688
4689         /* Match driver "down" state */
4690         ai_pci_down(wlc_hw->sih);
4691
4692         /* turn off pll and xtal to match driver "down" state */
4693         brcms_b_xtal(wlc_hw, OFF);
4694
4695         /* *******************************************************************
4696          * The hardware is in the DOWN state at this point. D11 core
4697          * or cores are in reset with clocks off, and the board PLLs
4698          * are off if possible.
4699          *
4700          * Beyond this point, wlc->sbclk == false and chip registers
4701          * should not be touched.
4702          *********************************************************************
4703          */
4704
4705         /* init etheraddr state variables */
4706         macaddr = brcms_c_get_macaddr(wlc_hw);
4707         if (macaddr == NULL) {
4708                 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4709                           unit);
4710                 err = 21;
4711                 goto fail;
4712         }
4713         if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4714             is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4715             is_zero_ether_addr(wlc_hw->etheraddr)) {
4716                 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
4717                           unit, macaddr);
4718                 err = 22;
4719                 goto fail;
4720         }
4721
4722         BCMMSG(wlc->wiphy, "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4723                wlc_hw->deviceid, wlc_hw->_nbands, ai_get_boardtype(wlc_hw->sih),
4724                macaddr);
4725
4726         return err;
4727
4728  fail:
4729         wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4730                   err);
4731         return err;
4732 }
4733
4734 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4735 {
4736         uint unit;
4737         unit = wlc->pub->unit;
4738
4739         if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4740                 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4741                 wlc->band->antgain = 8;
4742         } else if (wlc->band->antgain == -1) {
4743                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4744                           " srom, using 2dB\n", unit, __func__);
4745                 wlc->band->antgain = 8;
4746         } else {
4747                 s8 gain, fract;
4748                 /* Older sroms specified gain in whole dbm only.  In order
4749                  * be able to specify qdbm granularity and remain backward
4750                  * compatible the whole dbms are now encoded in only
4751                  * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4752                  * 6 bit signed number ranges from -32 - 31.
4753                  *
4754                  * Examples:
4755                  * 0x1 = 1 db,
4756                  * 0xc1 = 1.75 db (1 + 3 quarters),
4757                  * 0x3f = -1 (-1 + 0 quarters),
4758                  * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4759                  * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4760                  */
4761                 gain = wlc->band->antgain & 0x3f;
4762                 gain <<= 2;     /* Sign extend */
4763                 gain >>= 2;
4764                 fract = (wlc->band->antgain & 0xc0) >> 6;
4765                 wlc->band->antgain = 4 * gain + fract;
4766         }
4767 }
4768
4769 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4770 {
4771         int aa;
4772         uint unit;
4773         int bandtype;
4774         struct si_pub *sih = wlc->hw->sih;
4775
4776         unit = wlc->pub->unit;
4777         bandtype = wlc->band->bandtype;
4778
4779         /* get antennas available */
4780         if (bandtype == BRCM_BAND_5G)
4781                 aa = (s8) getintvar(sih, BRCMS_SROM_AA5G);
4782         else
4783                 aa = (s8) getintvar(sih, BRCMS_SROM_AA2G);
4784
4785         if ((aa < 1) || (aa > 15)) {
4786                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4787                           " srom (0x%x), using 3\n", unit, __func__, aa);
4788                 aa = 3;
4789         }
4790
4791         /* reset the defaults if we have a single antenna */
4792         if (aa == 1) {
4793                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4794                 wlc->stf->txant = ANT_TX_FORCE_0;
4795         } else if (aa == 2) {
4796                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4797                 wlc->stf->txant = ANT_TX_FORCE_1;
4798         } else {
4799         }
4800
4801         /* Compute Antenna Gain */
4802         if (bandtype == BRCM_BAND_5G)
4803                 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG1);
4804         else
4805                 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG0);
4806
4807         brcms_c_attach_antgain_init(wlc);
4808
4809         return true;
4810 }
4811
4812 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4813 {
4814         u16 chanspec;
4815         struct brcms_band *band;
4816         struct brcms_bss_info *bi = wlc->default_bss;
4817
4818         /* init default and target BSS with some sane initial values */
4819         memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4820         bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4821
4822         /* fill the default channel as the first valid channel
4823          * starting from the 2G channels
4824          */
4825         chanspec = ch20mhz_chspec(1);
4826         wlc->home_chanspec = bi->chanspec = chanspec;
4827
4828         /* find the band of our default channel */
4829         band = wlc->band;
4830         if (wlc->pub->_nbands > 1 &&
4831             band->bandunit != chspec_bandunit(chanspec))
4832                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4833
4834         /* init bss rates to the band specific default rate set */
4835         brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4836                 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4837                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4838                 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4839
4840         if (wlc->pub->_n_enab & SUPPORT_11N)
4841                 bi->flags |= BRCMS_BSS_HT;
4842 }
4843
4844 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
4845 {
4846         struct brcms_txq_info *qi, *p;
4847
4848         qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
4849         if (qi != NULL) {
4850                 /*
4851                  * Have enough room for control packets along with HI watermark
4852                  * Also, add room to txq for total psq packets if all the SCBs
4853                  * leave PS mode. The watermark for flowcontrol to OS packets
4854                  * will remain the same
4855                  */
4856                 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
4857                           2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
4858
4859                 /* add this queue to the the global list */
4860                 p = wlc->tx_queues;
4861                 if (p == NULL) {
4862                         wlc->tx_queues = qi;
4863                 } else {
4864                         while (p->next != NULL)
4865                                 p = p->next;
4866                         p->next = qi;
4867                 }
4868         }
4869         return qi;
4870 }
4871
4872 static void brcms_c_txq_free(struct brcms_c_info *wlc,
4873                              struct brcms_txq_info *qi)
4874 {
4875         struct brcms_txq_info *p;
4876
4877         if (qi == NULL)
4878                 return;
4879
4880         /* remove the queue from the linked list */
4881         p = wlc->tx_queues;
4882         if (p == qi)
4883                 wlc->tx_queues = p->next;
4884         else {
4885                 while (p != NULL && p->next != qi)
4886                         p = p->next;
4887                 if (p != NULL)
4888                         p->next = p->next->next;
4889         }
4890
4891         kfree(qi);
4892 }
4893
4894 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
4895 {
4896         uint i;
4897         struct brcms_band *band;
4898
4899         for (i = 0; i < wlc->pub->_nbands; i++) {
4900                 band = wlc->bandstate[i];
4901                 if (band->bandtype == BRCM_BAND_5G) {
4902                         if ((bwcap == BRCMS_N_BW_40ALL)
4903                             || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
4904                                 band->mimo_cap_40 = true;
4905                         else
4906                                 band->mimo_cap_40 = false;
4907                 } else {
4908                         if (bwcap == BRCMS_N_BW_40ALL)
4909                                 band->mimo_cap_40 = true;
4910                         else
4911                                 band->mimo_cap_40 = false;
4912                 }
4913         }
4914 }
4915
4916 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
4917 {
4918         /* free timer state */
4919         if (wlc->wdtimer) {
4920                 brcms_free_timer(wlc->wdtimer);
4921                 wlc->wdtimer = NULL;
4922         }
4923         if (wlc->radio_timer) {
4924                 brcms_free_timer(wlc->radio_timer);
4925                 wlc->radio_timer = NULL;
4926         }
4927 }
4928
4929 static void brcms_c_detach_module(struct brcms_c_info *wlc)
4930 {
4931         if (wlc->asi) {
4932                 brcms_c_antsel_detach(wlc->asi);
4933                 wlc->asi = NULL;
4934         }
4935
4936         if (wlc->ampdu) {
4937                 brcms_c_ampdu_detach(wlc->ampdu);
4938                 wlc->ampdu = NULL;
4939         }
4940
4941         brcms_c_stf_detach(wlc);
4942 }
4943
4944 /*
4945  * low level detach
4946  */
4947 static int brcms_b_detach(struct brcms_c_info *wlc)
4948 {
4949         uint i;
4950         struct brcms_hw_band *band;
4951         struct brcms_hardware *wlc_hw = wlc->hw;
4952         int callbacks;
4953
4954         callbacks = 0;
4955
4956         if (wlc_hw->sih) {
4957                 /*
4958                  * detach interrupt sync mechanism since interrupt is disabled
4959                  * and per-port interrupt object may has been freed. this must
4960                  * be done before sb core switch
4961                  */
4962                 ai_pci_sleep(wlc_hw->sih);
4963         }
4964
4965         brcms_b_detach_dmapio(wlc_hw);
4966
4967         band = wlc_hw->band;
4968         for (i = 0; i < wlc_hw->_nbands; i++) {
4969                 if (band->pi) {
4970                         /* Detach this band's phy */
4971                         wlc_phy_detach(band->pi);
4972                         band->pi = NULL;
4973                 }
4974                 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
4975         }
4976
4977         /* Free shared phy state */
4978         kfree(wlc_hw->phy_sh);
4979
4980         wlc_phy_shim_detach(wlc_hw->physhim);
4981
4982         if (wlc_hw->sih) {
4983                 ai_detach(wlc_hw->sih);
4984                 wlc_hw->sih = NULL;
4985         }
4986
4987         return callbacks;
4988
4989 }
4990
4991 /*
4992  * Return a count of the number of driver callbacks still pending.
4993  *
4994  * General policy is that brcms_c_detach can only dealloc/free software states.
4995  * It can NOT touch hardware registers since the d11core may be in reset and
4996  * clock may not be available.
4997  * One exception is sb register access, which is possible if crystal is turned
4998  * on after "down" state, driver should avoid software timer with the exception
4999  * of radio_monitor.
5000  */
5001 uint brcms_c_detach(struct brcms_c_info *wlc)
5002 {
5003         uint callbacks = 0;
5004
5005         if (wlc == NULL)
5006                 return 0;
5007
5008         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5009
5010         callbacks += brcms_b_detach(wlc);
5011
5012         /* delete software timers */
5013         if (!brcms_c_radio_monitor_stop(wlc))
5014                 callbacks++;
5015
5016         brcms_c_channel_mgr_detach(wlc->cmi);
5017
5018         brcms_c_timers_deinit(wlc);
5019
5020         brcms_c_detach_module(wlc);
5021
5022
5023         while (wlc->tx_queues != NULL)
5024                 brcms_c_txq_free(wlc, wlc->tx_queues);
5025
5026         brcms_c_detach_mfree(wlc);
5027         return callbacks;
5028 }
5029
5030 /* update state that depends on the current value of "ap" */
5031 static void brcms_c_ap_upd(struct brcms_c_info *wlc)
5032 {
5033         /* STA-BSS; short capable */
5034         wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5035 }
5036
5037 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5038 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5039 {
5040         if (wlc_hw->wlc->pub->hw_up)
5041                 return;
5042
5043         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5044
5045         /*
5046          * Enable pll and xtal, initialize the power control registers,
5047          * and force fastclock for the remainder of brcms_c_up().
5048          */
5049         brcms_b_xtal(wlc_hw, ON);
5050         ai_clkctl_init(wlc_hw->sih);
5051         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5052
5053         ai_pci_fixcfg(wlc_hw->sih);
5054
5055         /*
5056          * TODO: test suspend/resume
5057          *
5058          * AI chip doesn't restore bar0win2 on
5059          * hibernation/resume, need sw fixup
5060          */
5061
5062         /*
5063          * Inform phy that a POR reset has occurred so
5064          * it does a complete phy init
5065          */
5066         wlc_phy_por_inform(wlc_hw->band->pi);
5067
5068         wlc_hw->ucode_loaded = false;
5069         wlc_hw->wlc->pub->hw_up = true;
5070
5071         if ((wlc_hw->boardflags & BFL_FEM)
5072             && (ai_get_chip_id(wlc_hw->sih) == BCM4313_CHIP_ID)) {
5073                 if (!
5074                     (wlc_hw->boardrev >= 0x1250
5075                      && (wlc_hw->boardflags & BFL_FEM_BT)))
5076                         ai_epa_4313war(wlc_hw->sih);
5077         }
5078 }
5079
5080 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5081 {
5082         uint coremask;
5083
5084         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5085
5086         /*
5087          * Enable pll and xtal, initialize the power control registers,
5088          * and force fastclock for the remainder of brcms_c_up().
5089          */
5090         brcms_b_xtal(wlc_hw, ON);
5091         ai_clkctl_init(wlc_hw->sih);
5092         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5093
5094         /*
5095          * Configure pci/pcmcia here instead of in brcms_c_attach()
5096          * to allow mfg hotswap:  down, hotswap (chip power cycle), up.
5097          */
5098         coremask = (1 << wlc_hw->wlc->core->coreidx);
5099
5100         ai_pci_setup(wlc_hw->sih, coremask);
5101
5102         /*
5103          * Need to read the hwradio status here to cover the case where the
5104          * system is loaded with the hw radio disabled. We do not want to
5105          * bring the driver up in this case.
5106          */
5107         if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5108                 /* put SB PCI in down state again */
5109                 ai_pci_down(wlc_hw->sih);
5110                 brcms_b_xtal(wlc_hw, OFF);
5111                 return -ENOMEDIUM;
5112         }
5113
5114         ai_pci_up(wlc_hw->sih);
5115
5116         /* reset the d11 core */
5117         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5118
5119         return 0;
5120 }
5121
5122 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5123 {
5124         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5125
5126         wlc_hw->up = true;
5127         wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5128
5129         /* FULLY enable dynamic power control and d11 core interrupt */
5130         brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5131         brcms_intrson(wlc_hw->wlc->wl);
5132         return 0;
5133 }
5134
5135 /*
5136  * Write WME tunable parameters for retransmit/max rate
5137  * from wlc struct to ucode
5138  */
5139 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5140 {
5141         int ac;
5142
5143         /* Need clock to do this */
5144         if (!wlc->clk)
5145                 return;
5146
5147         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
5148                 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5149                                   wlc->wme_retries[ac]);
5150 }
5151
5152 /* make interface operational */
5153 int brcms_c_up(struct brcms_c_info *wlc)
5154 {
5155         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5156
5157         /* HW is turned off so don't try to access it */
5158         if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5159                 return -ENOMEDIUM;
5160
5161         if (!wlc->pub->hw_up) {
5162                 brcms_b_hw_up(wlc->hw);
5163                 wlc->pub->hw_up = true;
5164         }
5165
5166         if ((wlc->pub->boardflags & BFL_FEM)
5167             && (ai_get_chip_id(wlc->hw->sih) == BCM4313_CHIP_ID)) {
5168                 if (wlc->pub->boardrev >= 0x1250
5169                     && (wlc->pub->boardflags & BFL_FEM_BT))
5170                         brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5171                                 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5172                 else
5173                         brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5174                                     MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5175         }
5176
5177         /*
5178          * Need to read the hwradio status here to cover the case where the
5179          * system is loaded with the hw radio disabled. We do not want to bring
5180          * the driver up in this case. If radio is disabled, abort up, lower
5181          * power, start radio timer and return 0(for NDIS) don't call
5182          * radio_update to avoid looping brcms_c_up.
5183          *
5184          * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5185          */
5186         if (!wlc->pub->radio_disabled) {
5187                 int status = brcms_b_up_prep(wlc->hw);
5188                 if (status == -ENOMEDIUM) {
5189                         if (!mboolisset
5190                             (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5191                                 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5192                                 mboolset(wlc->pub->radio_disabled,
5193                                          WL_RADIO_HW_DISABLE);
5194
5195                                 if (bsscfg->enable && bsscfg->BSS)
5196                                         wiphy_err(wlc->wiphy, "wl%d: up"
5197                                                   ": rfdisable -> "
5198                                                   "bsscfg_disable()\n",
5199                                                    wlc->pub->unit);
5200                         }
5201                 }
5202         }
5203
5204         if (wlc->pub->radio_disabled) {
5205                 brcms_c_radio_monitor_start(wlc);
5206                 return 0;
5207         }
5208
5209         /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5210         wlc->clk = true;
5211
5212         brcms_c_radio_monitor_stop(wlc);
5213
5214         /* Set EDCF hostflags */
5215         brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5216
5217         brcms_init(wlc->wl);
5218         wlc->pub->up = true;
5219
5220         if (wlc->bandinit_pending) {
5221                 brcms_c_suspend_mac_and_wait(wlc);
5222                 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5223                 wlc->bandinit_pending = false;
5224                 brcms_c_enable_mac(wlc);
5225         }
5226
5227         brcms_b_up_finish(wlc->hw);
5228
5229         /* Program the TX wme params with the current settings */
5230         brcms_c_wme_retries_write(wlc);
5231
5232         /* start one second watchdog timer */
5233         brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5234         wlc->WDarmed = true;
5235
5236         /* ensure antenna config is up to date */
5237         brcms_c_stf_phy_txant_upd(wlc);
5238         /* ensure LDPC config is in sync */
5239         brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5240
5241         return 0;
5242 }
5243
5244 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5245 {
5246         uint callbacks = 0;
5247
5248         return callbacks;
5249 }
5250
5251 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5252 {
5253         bool dev_gone;
5254         uint callbacks = 0;
5255
5256         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5257
5258         if (!wlc_hw->up)
5259                 return callbacks;
5260
5261         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5262
5263         /* disable interrupts */
5264         if (dev_gone)
5265                 wlc_hw->wlc->macintmask = 0;
5266         else {
5267                 /* now disable interrupts */
5268                 brcms_intrsoff(wlc_hw->wlc->wl);
5269
5270                 /* ensure we're running on the pll clock again */
5271                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5272         }
5273         /* down phy at the last of this stage */
5274         callbacks += wlc_phy_down(wlc_hw->band->pi);
5275
5276         return callbacks;
5277 }
5278
5279 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5280 {
5281         uint callbacks = 0;
5282         bool dev_gone;
5283
5284         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5285
5286         if (!wlc_hw->up)
5287                 return callbacks;
5288
5289         wlc_hw->up = false;
5290         wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5291
5292         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5293
5294         if (dev_gone) {
5295                 wlc_hw->sbclk = false;
5296                 wlc_hw->clk = false;
5297                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5298
5299                 /* reclaim any posted packets */
5300                 brcms_c_flushqueues(wlc_hw->wlc);
5301         } else {
5302
5303                 /* Reset and disable the core */
5304                 if (bcma_core_is_enabled(wlc_hw->d11core)) {
5305                         if (bcma_read32(wlc_hw->d11core,
5306                                         D11REGOFFS(maccontrol)) & MCTL_EN_MAC)
5307                                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5308                         callbacks += brcms_reset(wlc_hw->wlc->wl);
5309                         brcms_c_coredisable(wlc_hw);
5310                 }
5311
5312                 /* turn off primary xtal and pll */
5313                 if (!wlc_hw->noreset) {
5314                         ai_pci_down(wlc_hw->sih);
5315                         brcms_b_xtal(wlc_hw, OFF);
5316                 }
5317         }
5318
5319         return callbacks;
5320 }
5321
5322 /*
5323  * Mark the interface nonoperational, stop the software mechanisms,
5324  * disable the hardware, free any transient buffer state.
5325  * Return a count of the number of driver callbacks still pending.
5326  */
5327 uint brcms_c_down(struct brcms_c_info *wlc)
5328 {
5329
5330         uint callbacks = 0;
5331         int i;
5332         bool dev_gone = false;
5333         struct brcms_txq_info *qi;
5334
5335         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5336
5337         /* check if we are already in the going down path */
5338         if (wlc->going_down) {
5339                 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5340                           "\n", wlc->pub->unit, __func__);
5341                 return 0;
5342         }
5343         if (!wlc->pub->up)
5344                 return callbacks;
5345
5346         wlc->going_down = true;
5347
5348         callbacks += brcms_b_bmac_down_prep(wlc->hw);
5349
5350         dev_gone = brcms_deviceremoved(wlc);
5351
5352         /* Call any registered down handlers */
5353         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5354                 if (wlc->modulecb[i].down_fn)
5355                         callbacks +=
5356                             wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5357         }
5358
5359         /* cancel the watchdog timer */
5360         if (wlc->WDarmed) {
5361                 if (!brcms_del_timer(wlc->wdtimer))
5362                         callbacks++;
5363                 wlc->WDarmed = false;
5364         }
5365         /* cancel all other timers */
5366         callbacks += brcms_c_down_del_timer(wlc);
5367
5368         wlc->pub->up = false;
5369
5370         wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5371
5372         /* clear txq flow control */
5373         brcms_c_txflowcontrol_reset(wlc);
5374
5375         /* flush tx queues */
5376         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5377                 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5378
5379         callbacks += brcms_b_down_finish(wlc->hw);
5380
5381         /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5382         wlc->clk = false;
5383
5384         wlc->going_down = false;
5385         return callbacks;
5386 }
5387
5388 /* Set the current gmode configuration */
5389 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5390 {
5391         int ret = 0;
5392         uint i;
5393         struct brcms_c_rateset rs;
5394         /* Default to 54g Auto */
5395         /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5396         s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5397         bool shortslot_restrict = false; /* Restrict association to stations
5398                                           * that support shortslot
5399                                           */
5400         bool ofdm_basic = false;        /* Make 6, 12, and 24 basic rates */
5401         /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5402         int preamble = BRCMS_PLCP_LONG;
5403         bool preamble_restrict = false; /* Restrict association to stations
5404                                          * that support short preambles
5405                                          */
5406         struct brcms_band *band;
5407
5408         /* if N-support is enabled, allow Gmode set as long as requested
5409          * Gmode is not GMODE_LEGACY_B
5410          */
5411         if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5412                 return -ENOTSUPP;
5413
5414         /* verify that we are dealing with 2G band and grab the band pointer */
5415         if (wlc->band->bandtype == BRCM_BAND_2G)
5416                 band = wlc->band;
5417         else if ((wlc->pub->_nbands > 1) &&
5418                  (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5419                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5420         else
5421                 return -EINVAL;
5422
5423         /* Legacy or bust when no OFDM is supported by regulatory */
5424         if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5425              BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5426                 return -EINVAL;
5427
5428         /* update configuration value */
5429         if (config)
5430                 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5431
5432         /* Clear rateset override */
5433         memset(&rs, 0, sizeof(struct brcms_c_rateset));
5434
5435         switch (gmode) {
5436         case GMODE_LEGACY_B:
5437                 shortslot = BRCMS_SHORTSLOT_OFF;
5438                 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5439
5440                 break;
5441
5442         case GMODE_LRS:
5443                 break;
5444
5445         case GMODE_AUTO:
5446                 /* Accept defaults */
5447                 break;
5448
5449         case GMODE_ONLY:
5450                 ofdm_basic = true;
5451                 preamble = BRCMS_PLCP_SHORT;
5452                 preamble_restrict = true;
5453                 break;
5454
5455         case GMODE_PERFORMANCE:
5456                 shortslot = BRCMS_SHORTSLOT_ON;
5457                 shortslot_restrict = true;
5458                 ofdm_basic = true;
5459                 preamble = BRCMS_PLCP_SHORT;
5460                 preamble_restrict = true;
5461                 break;
5462
5463         default:
5464                 /* Error */
5465                 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5466                           wlc->pub->unit, __func__, gmode);
5467                 return -ENOTSUPP;
5468         }
5469
5470         band->gmode = gmode;
5471
5472         wlc->shortslot_override = shortslot;
5473
5474         /* Use the default 11g rateset */
5475         if (!rs.count)
5476                 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5477
5478         if (ofdm_basic) {
5479                 for (i = 0; i < rs.count; i++) {
5480                         if (rs.rates[i] == BRCM_RATE_6M
5481                             || rs.rates[i] == BRCM_RATE_12M
5482                             || rs.rates[i] == BRCM_RATE_24M)
5483                                 rs.rates[i] |= BRCMS_RATE_FLAG;
5484                 }
5485         }
5486
5487         /* Set default bss rateset */
5488         wlc->default_bss->rateset.count = rs.count;
5489         memcpy(wlc->default_bss->rateset.rates, rs.rates,
5490                sizeof(wlc->default_bss->rateset.rates));
5491
5492         return ret;
5493 }
5494
5495 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5496 {
5497         uint i;
5498         s32 nmode = AUTO;
5499
5500         if (wlc->stf->txstreams == WL_11N_3x3)
5501                 nmode = WL_11N_3x3;
5502         else
5503                 nmode = WL_11N_2x2;
5504
5505         /* force GMODE_AUTO if NMODE is ON */
5506         brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5507         if (nmode == WL_11N_3x3)
5508                 wlc->pub->_n_enab = SUPPORT_HT;
5509         else
5510                 wlc->pub->_n_enab = SUPPORT_11N;
5511         wlc->default_bss->flags |= BRCMS_BSS_HT;
5512         /* add the mcs rates to the default and hw ratesets */
5513         brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5514                               wlc->stf->txstreams);
5515         for (i = 0; i < wlc->pub->_nbands; i++)
5516                 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5517                        wlc->default_bss->rateset.mcs, MCSSET_LEN);
5518
5519         return 0;
5520 }
5521
5522 static int
5523 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5524                              struct brcms_c_rateset *rs_arg)
5525 {
5526         struct brcms_c_rateset rs, new;
5527         uint bandunit;
5528
5529         memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5530
5531         /* check for bad count value */
5532         if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5533                 return -EINVAL;
5534
5535         /* try the current band */
5536         bandunit = wlc->band->bandunit;
5537         memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5538         if (brcms_c_rate_hwrs_filter_sort_validate
5539             (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5540              wlc->stf->txstreams))
5541                 goto good;
5542
5543         /* try the other band */
5544         if (brcms_is_mband_unlocked(wlc)) {
5545                 bandunit = OTHERBANDUNIT(wlc);
5546                 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5547                 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5548                                                        &wlc->
5549                                                        bandstate[bandunit]->
5550                                                        hw_rateset, true,
5551                                                        wlc->stf->txstreams))
5552                         goto good;
5553         }
5554
5555         return -EBADE;
5556
5557  good:
5558         /* apply new rateset */
5559         memcpy(&wlc->default_bss->rateset, &new,
5560                sizeof(struct brcms_c_rateset));
5561         memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5562                sizeof(struct brcms_c_rateset));
5563         return 0;
5564 }
5565
5566 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5567 {
5568         u8 r;
5569         bool war = false;
5570
5571         if (wlc->bsscfg->associated)
5572                 r = wlc->bsscfg->current_bss->rateset.rates[0];
5573         else
5574                 r = wlc->default_bss->rateset.rates[0];
5575
5576         wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5577 }
5578
5579 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
5580 {
5581         u16 chspec = ch20mhz_chspec(channel);
5582
5583         if (channel < 0 || channel > MAXCHANNEL)
5584                 return -EINVAL;
5585
5586         if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5587                 return -EINVAL;
5588
5589
5590         if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5591                 if (wlc->band->bandunit != chspec_bandunit(chspec))
5592                         wlc->bandinit_pending = true;
5593                 else
5594                         wlc->bandinit_pending = false;
5595         }
5596
5597         wlc->default_bss->chanspec = chspec;
5598         /* brcms_c_BSSinit() will sanitize the rateset before
5599          * using it.. */
5600         if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5601                 brcms_c_set_home_chanspec(wlc, chspec);
5602                 brcms_c_suspend_mac_and_wait(wlc);
5603                 brcms_c_set_chanspec(wlc, chspec);
5604                 brcms_c_enable_mac(wlc);
5605         }
5606         return 0;
5607 }
5608
5609 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
5610 {
5611         int ac;
5612
5613         if (srl < 1 || srl > RETRY_SHORT_MAX ||
5614             lrl < 1 || lrl > RETRY_SHORT_MAX)
5615                 return -EINVAL;
5616
5617         wlc->SRL = srl;
5618         wlc->LRL = lrl;
5619
5620         brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
5621
5622         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
5623                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5624                                                EDCF_SHORT,  wlc->SRL);
5625                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5626                                                EDCF_LONG, wlc->LRL);
5627         }
5628         brcms_c_wme_retries_write(wlc);
5629
5630         return 0;
5631 }
5632
5633 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
5634                                  struct brcm_rateset *currs)
5635 {
5636         struct brcms_c_rateset *rs;
5637
5638         if (wlc->pub->associated)
5639                 rs = &wlc->bsscfg->current_bss->rateset;
5640         else
5641                 rs = &wlc->default_bss->rateset;
5642
5643         /* Copy only legacy rateset section */
5644         currs->count = rs->count;
5645         memcpy(&currs->rates, &rs->rates, rs->count);
5646 }
5647
5648 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
5649 {
5650         struct brcms_c_rateset internal_rs;
5651         int bcmerror;
5652
5653         if (rs->count > BRCMS_NUMRATES)
5654                 return -ENOBUFS;
5655
5656         memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
5657
5658         /* Copy only legacy rateset section */
5659         internal_rs.count = rs->count;
5660         memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
5661
5662         /* merge rateset coming in with the current mcsset */
5663         if (wlc->pub->_n_enab & SUPPORT_11N) {
5664                 struct brcms_bss_info *mcsset_bss;
5665                 if (wlc->bsscfg->associated)
5666                         mcsset_bss = wlc->bsscfg->current_bss;
5667                 else
5668                         mcsset_bss = wlc->default_bss;
5669                 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
5670                        MCSSET_LEN);
5671         }
5672
5673         bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
5674         if (!bcmerror)
5675                 brcms_c_ofdm_rateset_war(wlc);
5676
5677         return bcmerror;
5678 }
5679
5680 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
5681 {
5682         if (period < DOT11_MIN_BEACON_PERIOD ||
5683             period > DOT11_MAX_BEACON_PERIOD)
5684                 return -EINVAL;
5685
5686         wlc->default_bss->beacon_period = period;
5687         return 0;
5688 }
5689
5690 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
5691 {
5692         return wlc->band->phytype;
5693 }
5694
5695 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
5696 {
5697         wlc->shortslot_override = sslot_override;
5698
5699         /*
5700          * shortslot is an 11g feature, so no more work if we are
5701          * currently on the 5G band
5702          */
5703         if (wlc->band->bandtype == BRCM_BAND_5G)
5704                 return;
5705
5706         if (wlc->pub->up && wlc->pub->associated) {
5707                 /* let watchdog or beacon processing update shortslot */
5708         } else if (wlc->pub->up) {
5709                 /* unassociated shortslot is off */
5710                 brcms_c_switch_shortslot(wlc, false);
5711         } else {
5712                 /* driver is down, so just update the brcms_c_info
5713                  * value */
5714                 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
5715                         wlc->shortslot = false;
5716                 else
5717                         wlc->shortslot =
5718                             (wlc->shortslot_override ==
5719                              BRCMS_SHORTSLOT_ON);
5720         }
5721 }
5722
5723 /*
5724  * register watchdog and down handlers.
5725  */
5726 int brcms_c_module_register(struct brcms_pub *pub,
5727                             const char *name, struct brcms_info *hdl,
5728                             int (*d_fn)(void *handle))
5729 {
5730         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5731         int i;
5732
5733         /* find an empty entry and just add, no duplication check! */
5734         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5735                 if (wlc->modulecb[i].name[0] == '\0') {
5736                         strncpy(wlc->modulecb[i].name, name,
5737                                 sizeof(wlc->modulecb[i].name) - 1);
5738                         wlc->modulecb[i].hdl = hdl;
5739                         wlc->modulecb[i].down_fn = d_fn;
5740                         return 0;
5741                 }
5742         }
5743
5744         return -ENOSR;
5745 }
5746
5747 /* unregister module callbacks */
5748 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
5749                               struct brcms_info *hdl)
5750 {
5751         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5752         int i;
5753
5754         if (wlc == NULL)
5755                 return -ENODATA;
5756
5757         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5758                 if (!strcmp(wlc->modulecb[i].name, name) &&
5759                     (wlc->modulecb[i].hdl == hdl)) {
5760                         memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
5761                         return 0;
5762                 }
5763         }
5764
5765         /* table not found! */
5766         return -ENODATA;
5767 }
5768
5769 void brcms_c_print_txstatus(struct tx_status *txs)
5770 {
5771         pr_debug("\ntxpkt (MPDU) Complete\n");
5772
5773         pr_debug("FrameID: %04x   TxStatus: %04x\n", txs->frameid, txs->status);
5774
5775         pr_debug("[15:12]  %d  frame attempts\n",
5776                   (txs->status & TX_STATUS_FRM_RTX_MASK) >>
5777                  TX_STATUS_FRM_RTX_SHIFT);
5778         pr_debug(" [11:8]  %d  rts attempts\n",
5779                  (txs->status & TX_STATUS_RTS_RTX_MASK) >>
5780                  TX_STATUS_RTS_RTX_SHIFT);
5781         pr_debug("    [7]  %d  PM mode indicated\n",
5782                  txs->status & TX_STATUS_PMINDCTD ? 1 : 0);
5783         pr_debug("    [6]  %d  intermediate status\n",
5784                  txs->status & TX_STATUS_INTERMEDIATE ? 1 : 0);
5785         pr_debug("    [5]  %d  AMPDU\n",
5786                  txs->status & TX_STATUS_AMPDU ? 1 : 0);
5787         pr_debug("  [4:2]  %d  Frame Suppressed Reason (%s)\n",
5788                  (txs->status & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT,
5789                  (const char *[]) {
5790                         "None",
5791                         "PMQ Entry",
5792                         "Flush request",
5793                         "Previous frag failure",
5794                         "Channel mismatch",
5795                         "Lifetime Expiry",
5796                         "Underflow"
5797                  } [(txs->status & TX_STATUS_SUPR_MASK) >>
5798                     TX_STATUS_SUPR_SHIFT]);
5799         pr_debug("    [1]  %d  acked\n",
5800                  txs->status & TX_STATUS_ACK_RCV ? 1 : 0);
5801
5802         pr_debug("LastTxTime: %04x Seq: %04x PHYTxStatus: %04x RxAckRSSI: %04x RxAckSQ: %04x\n",
5803                  txs->lasttxtime, txs->sequence, txs->phyerr,
5804                  (txs->ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT,
5805                  (txs->ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
5806 }
5807
5808 bool brcms_c_chipmatch(u16 vendor, u16 device)
5809 {
5810         if (vendor != PCI_VENDOR_ID_BROADCOM) {
5811                 pr_err("unknown vendor id %04x\n", vendor);
5812                 return false;
5813         }
5814
5815         if (device == BCM43224_D11N_ID_VEN1)
5816                 return true;
5817         if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
5818                 return true;
5819         if (device == BCM4313_D11N2G_ID)
5820                 return true;
5821         if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
5822                 return true;
5823
5824         pr_err("unknown device id %04x\n", device);
5825         return false;
5826 }
5827
5828 #if defined(DEBUG)
5829 void brcms_c_print_txdesc(struct d11txh *txh)
5830 {
5831         u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
5832         u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
5833         u16 mfc = le16_to_cpu(txh->MacFrameControl);
5834         u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
5835         u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
5836         u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
5837         u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
5838         u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
5839         u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
5840         u16 mainrates = le16_to_cpu(txh->MainRates);
5841         u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
5842         u8 *iv = txh->IV;
5843         u8 *ra = txh->TxFrameRA;
5844         u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
5845         u8 *rtspfb = txh->RTSPLCPFallback;
5846         u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
5847         u8 *fragpfb = txh->FragPLCPFallback;
5848         u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
5849         u16 mmodelen = le16_to_cpu(txh->MModeLen);
5850         u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
5851         u16 tfid = le16_to_cpu(txh->TxFrameID);
5852         u16 txs = le16_to_cpu(txh->TxStatus);
5853         u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
5854         u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
5855         u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
5856         u16 mmbyte = le16_to_cpu(txh->MinMBytes);
5857
5858         u8 *rtsph = txh->RTSPhyHeader;
5859         struct ieee80211_rts rts = txh->rts_frame;
5860
5861         /* add plcp header along with txh descriptor */
5862         brcmu_dbg_hex_dump(txh, sizeof(struct d11txh) + 48,
5863                            "Raw TxDesc + plcp header:\n");
5864
5865         pr_debug("TxCtlLow: %04x ", mtcl);
5866         pr_debug("TxCtlHigh: %04x ", mtch);
5867         pr_debug("FC: %04x ", mfc);
5868         pr_debug("FES Time: %04x\n", tfest);
5869         pr_debug("PhyCtl: %04x%s ", ptcw,
5870                (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
5871         pr_debug("PhyCtl_1: %04x ", ptcw_1);
5872         pr_debug("PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
5873         pr_debug("PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
5874         pr_debug("PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
5875         pr_debug("MainRates: %04x ", mainrates);
5876         pr_debug("XtraFrameTypes: %04x ", xtraft);
5877         pr_debug("\n");
5878
5879         print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET, iv, sizeof(txh->IV));
5880         print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET,
5881                              ra, sizeof(txh->TxFrameRA));
5882
5883         pr_debug("Fb FES Time: %04x ", tfestfb);
5884         print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET,
5885                              rtspfb, sizeof(txh->RTSPLCPFallback));
5886         pr_debug("RTS DUR: %04x ", rtsdfb);
5887         print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET,
5888                              fragpfb, sizeof(txh->FragPLCPFallback));
5889         pr_debug("DUR: %04x", fragdfb);
5890         pr_debug("\n");
5891
5892         pr_debug("MModeLen: %04x ", mmodelen);
5893         pr_debug("MModeFbrLen: %04x\n", mmodefbrlen);
5894
5895         pr_debug("FrameID:     %04x\n", tfid);
5896         pr_debug("TxStatus:    %04x\n", txs);
5897
5898         pr_debug("MaxNumMpdu:  %04x\n", mnmpdu);
5899         pr_debug("MaxAggbyte:  %04x\n", mabyte);
5900         pr_debug("MaxAggbyte_fb:  %04x\n", mabyte_f);
5901         pr_debug("MinByte:     %04x\n", mmbyte);
5902
5903         print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET,
5904                              rtsph, sizeof(txh->RTSPhyHeader));
5905         print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET,
5906                              (u8 *)&rts, sizeof(txh->rts_frame));
5907         pr_debug("\n");
5908 }
5909 #endif                          /* defined(DEBUG) */
5910
5911 #if defined(DEBUG)
5912 static int
5913 brcms_c_format_flags(const struct brcms_c_bit_desc *bd, u32 flags, char *buf,
5914                      int len)
5915 {
5916         int i;
5917         char *p = buf;
5918         char hexstr[16];
5919         int slen = 0, nlen = 0;
5920         u32 bit;
5921         const char *name;
5922
5923         if (len < 2 || !buf)
5924                 return 0;
5925
5926         buf[0] = '\0';
5927
5928         for (i = 0; flags != 0; i++) {
5929                 bit = bd[i].bit;
5930                 name = bd[i].name;
5931                 if (bit == 0 && flags != 0) {
5932                         /* print any unnamed bits */
5933                         snprintf(hexstr, 16, "0x%X", flags);
5934                         name = hexstr;
5935                         flags = 0;      /* exit loop */
5936                 } else if ((flags & bit) == 0)
5937                         continue;
5938                 flags &= ~bit;
5939                 nlen = strlen(name);
5940                 slen += nlen;
5941                 /* count btwn flag space */
5942                 if (flags != 0)
5943                         slen += 1;
5944                 /* need NULL char as well */
5945                 if (len <= slen)
5946                         break;
5947                 /* copy NULL char but don't count it */
5948                 strncpy(p, name, nlen + 1);
5949                 p += nlen;
5950                 /* copy btwn flag space and NULL char */
5951                 if (flags != 0)
5952                         p += snprintf(p, 2, " ");
5953                 len -= slen;
5954         }
5955
5956         /* indicate the str was too short */
5957         if (flags != 0) {
5958                 if (len < 2)
5959                         p -= 2 - len;   /* overwrite last char */
5960                 p += snprintf(p, 2, ">");
5961         }
5962
5963         return (int)(p - buf);
5964 }
5965 #endif                          /* defined(DEBUG) */
5966
5967 #if defined(DEBUG)
5968 void brcms_c_print_rxh(struct d11rxhdr *rxh)
5969 {
5970         u16 len = rxh->RxFrameSize;
5971         u16 phystatus_0 = rxh->PhyRxStatus_0;
5972         u16 phystatus_1 = rxh->PhyRxStatus_1;
5973         u16 phystatus_2 = rxh->PhyRxStatus_2;
5974         u16 phystatus_3 = rxh->PhyRxStatus_3;
5975         u16 macstatus1 = rxh->RxStatus1;
5976         u16 macstatus2 = rxh->RxStatus2;
5977         char flagstr[64];
5978         char lenbuf[20];
5979         static const struct brcms_c_bit_desc macstat_flags[] = {
5980                 {RXS_FCSERR, "FCSErr"},
5981                 {RXS_RESPFRAMETX, "Reply"},
5982                 {RXS_PBPRES, "PADDING"},
5983                 {RXS_DECATMPT, "DeCr"},
5984                 {RXS_DECERR, "DeCrErr"},
5985                 {RXS_BCNSENT, "Bcn"},
5986                 {0, NULL}
5987         };
5988
5989         brcmu_dbg_hex_dump(rxh, sizeof(struct d11rxhdr), "Raw RxDesc:\n");
5990
5991         brcms_c_format_flags(macstat_flags, macstatus1, flagstr, 64);
5992
5993         snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
5994
5995         pr_debug("RxFrameSize:     %6s (%d)%s\n", lenbuf, len,
5996                (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
5997         pr_debug("RxPHYStatus:     %04x %04x %04x %04x\n",
5998                phystatus_0, phystatus_1, phystatus_2, phystatus_3);
5999         pr_debug("RxMACStatus:     %x %s\n", macstatus1, flagstr);
6000         pr_debug("RXMACaggtype:    %x\n",
6001                (macstatus2 & RXS_AGGTYPE_MASK));
6002         pr_debug("RxTSFTime:       %04x\n", rxh->RxTSFTime);
6003 }
6004 #endif                          /* defined(DEBUG) */
6005
6006 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6007 {
6008         u16 table_ptr;
6009         u8 phy_rate, index;
6010
6011         /* get the phy specific rate encoding for the PLCP SIGNAL field */
6012         if (is_ofdm_rate(rate))
6013                 table_ptr = M_RT_DIRMAP_A;
6014         else
6015                 table_ptr = M_RT_DIRMAP_B;
6016
6017         /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6018          * the index into the rate table.
6019          */
6020         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6021         index = phy_rate & 0xf;
6022
6023         /* Find the SHM pointer to the rate table entry by looking in the
6024          * Direct-map Table
6025          */
6026         return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6027 }
6028
6029 static bool
6030 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6031                       struct sk_buff *pkt, int prec, bool head)
6032 {
6033         struct sk_buff *p;
6034         int eprec = -1;         /* precedence to evict from */
6035
6036         /* Determine precedence from which to evict packet, if any */
6037         if (pktq_pfull(q, prec))
6038                 eprec = prec;
6039         else if (pktq_full(q)) {
6040                 p = brcmu_pktq_peek_tail(q, &eprec);
6041                 if (eprec > prec) {
6042                         wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6043                                   "\n", __func__, eprec, prec);
6044                         return false;
6045                 }
6046         }
6047
6048         /* Evict if needed */
6049         if (eprec >= 0) {
6050                 bool discard_oldest;
6051
6052                 discard_oldest = ac_bitmap_tst(0, eprec);
6053
6054                 /* Refuse newer packet unless configured to discard oldest */
6055                 if (eprec == prec && !discard_oldest) {
6056                         wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6057                                   "\n", __func__, prec);
6058                         return false;
6059                 }
6060
6061                 /* Evict packet according to discard policy */
6062                 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6063                         brcmu_pktq_pdeq_tail(q, eprec);
6064                 brcmu_pkt_buf_free_skb(p);
6065         }
6066
6067         /* Enqueue */
6068         if (head)
6069                 p = brcmu_pktq_penq_head(q, prec, pkt);
6070         else
6071                 p = brcmu_pktq_penq(q, prec, pkt);
6072
6073         return true;
6074 }
6075
6076 /*
6077  * Attempts to queue a packet onto a multiple-precedence queue,
6078  * if necessary evicting a lower precedence packet from the queue.
6079  *
6080  * 'prec' is the precedence number that has already been mapped
6081  * from the packet priority.
6082  *
6083  * Returns true if packet consumed (queued), false if not.
6084  */
6085 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6086                       struct sk_buff *pkt, int prec)
6087 {
6088         return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6089 }
6090
6091 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6092                      struct sk_buff *sdu, uint prec)
6093 {
6094         struct brcms_txq_info *qi = wlc->pkt_queue;     /* Check me */
6095         struct pktq *q = &qi->q;
6096         int prio;
6097
6098         prio = sdu->priority;
6099
6100         if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6101                 /*
6102                  * we might hit this condtion in case
6103                  * packet flooding from mac80211 stack
6104                  */
6105                 brcmu_pkt_buf_free_skb(sdu);
6106         }
6107 }
6108
6109 /*
6110  * bcmc_fid_generate:
6111  * Generate frame ID for a BCMC packet.  The frag field is not used
6112  * for MC frames so is used as part of the sequence number.
6113  */
6114 static inline u16
6115 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6116                   struct d11txh *txh)
6117 {
6118         u16 frameid;
6119
6120         frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6121                                                   TXFID_QUEUE_MASK);
6122         frameid |=
6123             (((wlc->
6124                mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6125             TX_BCMC_FIFO;
6126
6127         return frameid;
6128 }
6129
6130 static uint
6131 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6132                       u8 preamble_type)
6133 {
6134         uint dur = 0;
6135
6136         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6137                 wlc->pub->unit, rspec, preamble_type);
6138         /*
6139          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6140          * is less than or equal to the rate of the immediately previous
6141          * frame in the FES
6142          */
6143         rspec = brcms_basic_rate(wlc, rspec);
6144         /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6145         dur =
6146             brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6147                                 (DOT11_ACK_LEN + FCS_LEN));
6148         return dur;
6149 }
6150
6151 static uint
6152 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6153                       u8 preamble_type)
6154 {
6155         BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6156                 wlc->pub->unit, rspec, preamble_type);
6157         return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6158 }
6159
6160 static uint
6161 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6162                      u8 preamble_type)
6163 {
6164         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6165                  "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6166         /*
6167          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6168          * is less than or equal to the rate of the immediately previous
6169          * frame in the FES
6170          */
6171         rspec = brcms_basic_rate(wlc, rspec);
6172         /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6173         return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6174                                    (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6175                                     FCS_LEN));
6176 }
6177
6178 /* brcms_c_compute_frame_dur()
6179  *
6180  * Calculate the 802.11 MAC header DUR field for MPDU
6181  * DUR for a single frame = 1 SIFS + 1 ACK
6182  * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6183  *
6184  * rate                 MPDU rate in unit of 500kbps
6185  * next_frag_len        next MPDU length in bytes
6186  * preamble_type        use short/GF or long/MM PLCP header
6187  */
6188 static u16
6189 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6190                       u8 preamble_type, uint next_frag_len)
6191 {
6192         u16 dur, sifs;
6193
6194         sifs = get_sifs(wlc->band);
6195
6196         dur = sifs;
6197         dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6198
6199         if (next_frag_len) {
6200                 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6201                 dur *= 2;
6202                 /* add another SIFS and the frag time */
6203                 dur += sifs;
6204                 dur +=
6205                     (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6206                                                  next_frag_len);
6207         }
6208         return dur;
6209 }
6210
6211 /* The opposite of brcms_c_calc_frame_time */
6212 static uint
6213 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6214                    u8 preamble_type, uint dur)
6215 {
6216         uint nsyms, mac_len, Ndps, kNdps;
6217         uint rate = rspec2rate(ratespec);
6218
6219         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6220                  wlc->pub->unit, ratespec, preamble_type, dur);
6221
6222         if (is_mcs_rate(ratespec)) {
6223                 uint mcs = ratespec & RSPEC_RATE_MASK;
6224                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6225                 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6226                 /* payload calculation matches that of regular ofdm */
6227                 if (wlc->band->bandtype == BRCM_BAND_2G)
6228                         dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6229                 /* kNdbps = kbps * 4 */
6230                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6231                                    rspec_issgi(ratespec)) * 4;
6232                 nsyms = dur / APHY_SYMBOL_TIME;
6233                 mac_len =
6234                     ((nsyms * kNdps) -
6235                      ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6236         } else if (is_ofdm_rate(ratespec)) {
6237                 dur -= APHY_PREAMBLE_TIME;
6238                 dur -= APHY_SIGNAL_TIME;
6239                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6240                 Ndps = rate * 2;
6241                 nsyms = dur / APHY_SYMBOL_TIME;
6242                 mac_len =
6243                     ((nsyms * Ndps) -
6244                      (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6245         } else {
6246                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6247                         dur -= BPHY_PLCP_SHORT_TIME;
6248                 else
6249                         dur -= BPHY_PLCP_TIME;
6250                 mac_len = dur * rate;
6251                 /* divide out factor of 2 in rate (1/2 mbps) */
6252                 mac_len = mac_len / 8 / 2;
6253         }
6254         return mac_len;
6255 }
6256
6257 /*
6258  * Return true if the specified rate is supported by the specified band.
6259  * BRCM_BAND_AUTO indicates the current band.
6260  */
6261 static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
6262                     bool verbose)
6263 {
6264         struct brcms_c_rateset *hw_rateset;
6265         uint i;
6266
6267         if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
6268                 hw_rateset = &wlc->band->hw_rateset;
6269         else if (wlc->pub->_nbands > 1)
6270                 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
6271         else
6272                 /* other band specified and we are a single band device */
6273                 return false;
6274
6275         /* check if this is a mimo rate */
6276         if (is_mcs_rate(rspec)) {
6277                 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
6278                         goto error;
6279
6280                 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
6281         }
6282
6283         for (i = 0; i < hw_rateset->count; i++)
6284                 if (hw_rateset->rates[i] == rspec2rate(rspec))
6285                         return true;
6286  error:
6287         if (verbose)
6288                 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
6289                           "not in hw_rateset\n", wlc->pub->unit, rspec);
6290
6291         return false;
6292 }
6293
6294 static u32
6295 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6296                        u32 int_val)
6297 {
6298         u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6299         u8 rate = int_val & NRATE_RATE_MASK;
6300         u32 rspec;
6301         bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6302         bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6303         bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6304                                   == NRATE_OVERRIDE_MCS_ONLY);
6305         int bcmerror = 0;
6306
6307         if (!ismcs)
6308                 return (u32) rate;
6309
6310         /* validate the combination of rate/mcs/stf is allowed */
6311         if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6312                 /* mcs only allowed when nmode */
6313                 if (stf > PHY_TXC1_MODE_SDM) {
6314                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6315                                   wlc->pub->unit, __func__);
6316                         bcmerror = -EINVAL;
6317                         goto done;
6318                 }
6319
6320                 /* mcs 32 is a special case, DUP mode 40 only */
6321                 if (rate == 32) {
6322                         if (!CHSPEC_IS40(wlc->home_chanspec) ||
6323                             ((stf != PHY_TXC1_MODE_SISO)
6324                              && (stf != PHY_TXC1_MODE_CDD))) {
6325                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6326                                           "32\n", wlc->pub->unit, __func__);
6327                                 bcmerror = -EINVAL;
6328                                 goto done;
6329                         }
6330                         /* mcs > 7 must use stf SDM */
6331                 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6332                         /* mcs > 7 must use stf SDM */
6333                         if (stf != PHY_TXC1_MODE_SDM) {
6334                                 BCMMSG(wlc->wiphy, "wl%d: enabling "
6335                                        "SDM mode for mcs %d\n",
6336                                        wlc->pub->unit, rate);
6337                                 stf = PHY_TXC1_MODE_SDM;
6338                         }
6339                 } else {
6340                         /*
6341                          * MCS 0-7 may use SISO, CDD, and for
6342                          * phy_rev >= 3 STBC
6343                          */
6344                         if ((stf > PHY_TXC1_MODE_STBC) ||
6345                             (!BRCMS_STBC_CAP_PHY(wlc)
6346                              && (stf == PHY_TXC1_MODE_STBC))) {
6347                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6348                                           "\n", wlc->pub->unit, __func__);
6349                                 bcmerror = -EINVAL;
6350                                 goto done;
6351                         }
6352                 }
6353         } else if (is_ofdm_rate(rate)) {
6354                 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6355                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6356                                   wlc->pub->unit, __func__);
6357                         bcmerror = -EINVAL;
6358                         goto done;
6359                 }
6360         } else if (is_cck_rate(rate)) {
6361                 if ((cur_band->bandtype != BRCM_BAND_2G)
6362                     || (stf != PHY_TXC1_MODE_SISO)) {
6363                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6364                                   wlc->pub->unit, __func__);
6365                         bcmerror = -EINVAL;
6366                         goto done;
6367                 }
6368         } else {
6369                 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6370                           wlc->pub->unit, __func__);
6371                 bcmerror = -EINVAL;
6372                 goto done;
6373         }
6374         /* make sure multiple antennae are available for non-siso rates */
6375         if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6376                 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6377                           "request\n", wlc->pub->unit, __func__);
6378                 bcmerror = -EINVAL;
6379                 goto done;
6380         }
6381
6382         rspec = rate;
6383         if (ismcs) {
6384                 rspec |= RSPEC_MIMORATE;
6385                 /* For STBC populate the STC field of the ratespec */
6386                 if (stf == PHY_TXC1_MODE_STBC) {
6387                         u8 stc;
6388                         stc = 1;        /* Nss for single stream is always 1 */
6389                         rspec |= (stc << RSPEC_STC_SHIFT);
6390                 }
6391         }
6392
6393         rspec |= (stf << RSPEC_STF_SHIFT);
6394
6395         if (override_mcs_only)
6396                 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6397
6398         if (issgi)
6399                 rspec |= RSPEC_SHORT_GI;
6400
6401         if ((rate != 0)
6402             && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6403                 return rate;
6404
6405         return rspec;
6406 done:
6407         return rate;
6408 }
6409
6410 /*
6411  * Compute PLCP, but only requires actual rate and length of pkt.
6412  * Rate is given in the driver standard multiple of 500 kbps.
6413  * le is set for 11 Mbps rate if necessary.
6414  * Broken out for PRQ.
6415  */
6416
6417 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
6418                              uint length, u8 *plcp)
6419 {
6420         u16 usec = 0;
6421         u8 le = 0;
6422
6423         switch (rate_500) {
6424         case BRCM_RATE_1M:
6425                 usec = length << 3;
6426                 break;
6427         case BRCM_RATE_2M:
6428                 usec = length << 2;
6429                 break;
6430         case BRCM_RATE_5M5:
6431                 usec = (length << 4) / 11;
6432                 if ((length << 4) - (usec * 11) > 0)
6433                         usec++;
6434                 break;
6435         case BRCM_RATE_11M:
6436                 usec = (length << 3) / 11;
6437                 if ((length << 3) - (usec * 11) > 0) {
6438                         usec++;
6439                         if ((usec * 11) - (length << 3) >= 8)
6440                                 le = D11B_PLCP_SIGNAL_LE;
6441                 }
6442                 break;
6443
6444         default:
6445                 wiphy_err(wlc->wiphy,
6446                           "brcms_c_cck_plcp_set: unsupported rate %d\n",
6447                           rate_500);
6448                 rate_500 = BRCM_RATE_1M;
6449                 usec = length << 3;
6450                 break;
6451         }
6452         /* PLCP signal byte */
6453         plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
6454         /* PLCP service byte */
6455         plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
6456         /* PLCP length u16, little endian */
6457         plcp[2] = usec & 0xff;
6458         plcp[3] = (usec >> 8) & 0xff;
6459         /* PLCP CRC16 */
6460         plcp[4] = 0;
6461         plcp[5] = 0;
6462 }
6463
6464 /* Rate: 802.11 rate code, length: PSDU length in octets */
6465 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
6466 {
6467         u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
6468         plcp[0] = mcs;
6469         if (rspec_is40mhz(rspec) || (mcs == 32))
6470                 plcp[0] |= MIMO_PLCP_40MHZ;
6471         BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
6472         plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
6473         plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
6474         plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
6475         plcp[5] = 0;
6476 }
6477
6478 /* Rate: 802.11 rate code, length: PSDU length in octets */
6479 static void
6480 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
6481 {
6482         u8 rate_signal;
6483         u32 tmp = 0;
6484         int rate = rspec2rate(rspec);
6485
6486         /*
6487          * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6488          * transmitted first
6489          */
6490         rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
6491         memset(plcp, 0, D11_PHY_HDR_LEN);
6492         D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
6493
6494         tmp = (length & 0xfff) << 5;
6495         plcp[2] |= (tmp >> 16) & 0xff;
6496         plcp[1] |= (tmp >> 8) & 0xff;
6497         plcp[0] |= tmp & 0xff;
6498 }
6499
6500 /* Rate: 802.11 rate code, length: PSDU length in octets */
6501 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
6502                                  uint length, u8 *plcp)
6503 {
6504         int rate = rspec2rate(rspec);
6505
6506         brcms_c_cck_plcp_set(wlc, rate, length, plcp);
6507 }
6508
6509 static void
6510 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
6511                      uint length, u8 *plcp)
6512 {
6513         if (is_mcs_rate(rspec))
6514                 brcms_c_compute_mimo_plcp(rspec, length, plcp);
6515         else if (is_ofdm_rate(rspec))
6516                 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
6517         else
6518                 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
6519 }
6520
6521 /* brcms_c_compute_rtscts_dur()
6522  *
6523  * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
6524  * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
6525  * DUR for CTS-TO-SELF w/ frame    = 2 SIFS         + next frame time + 1 ACK
6526  *
6527  * cts                  cts-to-self or rts/cts
6528  * rts_rate             rts or cts rate in unit of 500kbps
6529  * rate                 next MPDU rate in unit of 500kbps
6530  * frame_len            next MPDU frame length in bytes
6531  */
6532 u16
6533 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
6534                            u32 rts_rate,
6535                            u32 frame_rate, u8 rts_preamble_type,
6536                            u8 frame_preamble_type, uint frame_len, bool ba)
6537 {
6538         u16 dur, sifs;
6539
6540         sifs = get_sifs(wlc->band);
6541
6542         if (!cts_only) {
6543                 /* RTS/CTS */
6544                 dur = 3 * sifs;
6545                 dur +=
6546                     (u16) brcms_c_calc_cts_time(wlc, rts_rate,
6547                                                rts_preamble_type);
6548         } else {
6549                 /* CTS-TO-SELF */
6550                 dur = 2 * sifs;
6551         }
6552
6553         dur +=
6554             (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
6555                                          frame_len);
6556         if (ba)
6557                 dur +=
6558                     (u16) brcms_c_calc_ba_time(wlc, frame_rate,
6559                                               BRCMS_SHORT_PREAMBLE);
6560         else
6561                 dur +=
6562                     (u16) brcms_c_calc_ack_time(wlc, frame_rate,
6563                                                frame_preamble_type);
6564         return dur;
6565 }
6566
6567 static u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
6568 {
6569         u16 phyctl1 = 0;
6570         u16 bw;
6571
6572         if (BRCMS_ISLCNPHY(wlc->band)) {
6573                 bw = PHY_TXC1_BW_20MHZ;
6574         } else {
6575                 bw = rspec_get_bw(rspec);
6576                 /* 10Mhz is not supported yet */
6577                 if (bw < PHY_TXC1_BW_20MHZ) {
6578                         wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
6579                                   "not supported yet, set to 20L\n", bw);
6580                         bw = PHY_TXC1_BW_20MHZ;
6581                 }
6582         }
6583
6584         if (is_mcs_rate(rspec)) {
6585                 uint mcs = rspec & RSPEC_RATE_MASK;
6586
6587                 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6588                 phyctl1 = rspec_phytxbyte2(rspec);
6589                 /* set the upper byte of phyctl1 */
6590                 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
6591         } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
6592                    && !BRCMS_ISSSLPNPHY(wlc->band)) {
6593                 /*
6594                  * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6595                  * Data Rate. Eventually MIMOPHY would also be converted to
6596                  * this format
6597                  */
6598                 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
6599                 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6600         } else {                /* legacy OFDM/CCK */
6601                 s16 phycfg;
6602                 /* get the phyctl byte from rate phycfg table */
6603                 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
6604                 if (phycfg == -1) {
6605                         wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
6606                                   "legacy OFDM/CCK rate\n");
6607                         phycfg = 0;
6608                 }
6609                 /* set the upper byte of phyctl1 */
6610                 phyctl1 =
6611                     (bw | (phycfg << 8) |
6612                      (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6613         }
6614         return phyctl1;
6615 }
6616
6617 /*
6618  * Add struct d11txh, struct cck_phy_hdr.
6619  *
6620  * 'p' data must start with 802.11 MAC header
6621  * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6622  *
6623  * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6624  *
6625  */
6626 static u16
6627 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6628                      struct sk_buff *p, struct scb *scb, uint frag,
6629                      uint nfrags, uint queue, uint next_frag_len)
6630 {
6631         struct ieee80211_hdr *h;
6632         struct d11txh *txh;
6633         u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6634         int len, phylen, rts_phylen;
6635         u16 mch, phyctl, xfts, mainrates;
6636         u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6637         u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6638         u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6639         bool use_rts = false;
6640         bool use_cts = false;
6641         bool use_rifs = false;
6642         bool short_preamble[2] = { false, false };
6643         u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6644         u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6645         u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6646         struct ieee80211_rts *rts = NULL;
6647         bool qos;
6648         uint ac;
6649         bool hwtkmic = false;
6650         u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6651 #define ANTCFG_NONE 0xFF
6652         u8 antcfg = ANTCFG_NONE;
6653         u8 fbantcfg = ANTCFG_NONE;
6654         uint phyctl1_stf = 0;
6655         u16 durid = 0;
6656         struct ieee80211_tx_rate *txrate[2];
6657         int k;
6658         struct ieee80211_tx_info *tx_info;
6659         bool is_mcs;
6660         u16 mimo_txbw;
6661         u8 mimo_preamble_type;
6662
6663         /* locate 802.11 MAC header */
6664         h = (struct ieee80211_hdr *)(p->data);
6665         qos = ieee80211_is_data_qos(h->frame_control);
6666
6667         /* compute length of frame in bytes for use in PLCP computations */
6668         len = p->len;
6669         phylen = len + FCS_LEN;
6670
6671         /* Get tx_info */
6672         tx_info = IEEE80211_SKB_CB(p);
6673
6674         /* add PLCP */
6675         plcp = skb_push(p, D11_PHY_HDR_LEN);
6676
6677         /* add Broadcom tx descriptor header */
6678         txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6679         memset(txh, 0, D11_TXH_LEN);
6680
6681         /* setup frameid */
6682         if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6683                 /* non-AP STA should never use BCMC queue */
6684                 if (queue == TX_BCMC_FIFO) {
6685                         wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6686                                   "TX_BCMC!\n", wlc->pub->unit, __func__);
6687                         frameid = bcmc_fid_generate(wlc, NULL, txh);
6688                 } else {
6689                         /* Increment the counter for first fragment */
6690                         if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6691                                 scb->seqnum[p->priority]++;
6692
6693                         /* extract fragment number from frame first */
6694                         seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6695                         seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6696                         h->seq_ctrl = cpu_to_le16(seq);
6697
6698                         frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6699                             (queue & TXFID_QUEUE_MASK);
6700                 }
6701         }
6702         frameid |= queue & TXFID_QUEUE_MASK;
6703
6704         /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6705         if (ieee80211_is_beacon(h->frame_control))
6706                 mcl |= TXC_IGNOREPMQ;
6707
6708         txrate[0] = tx_info->control.rates;
6709         txrate[1] = txrate[0] + 1;
6710
6711         /*
6712          * if rate control algorithm didn't give us a fallback
6713          * rate, use the primary rate
6714          */
6715         if (txrate[1]->idx < 0)
6716                 txrate[1] = txrate[0];
6717
6718         for (k = 0; k < hw->max_rates; k++) {
6719                 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6720                 if (!is_mcs) {
6721                         if ((txrate[k]->idx >= 0)
6722                             && (txrate[k]->idx <
6723                                 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6724                                 rspec[k] =
6725                                     hw->wiphy->bands[tx_info->band]->
6726                                     bitrates[txrate[k]->idx].hw_value;
6727                                 short_preamble[k] =
6728                                     txrate[k]->
6729                                     flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6730                                     true : false;
6731                         } else {
6732                                 rspec[k] = BRCM_RATE_1M;
6733                         }
6734                 } else {
6735                         rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6736                                         NRATE_MCS_INUSE | txrate[k]->idx);
6737                 }
6738
6739                 /*
6740                  * Currently only support same setting for primay and
6741                  * fallback rates. Unify flags for each rate into a
6742                  * single value for the frame
6743                  */
6744                 use_rts |=
6745                     txrate[k]->
6746                     flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6747                 use_cts |=
6748                     txrate[k]->
6749                     flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6750
6751
6752                 /*
6753                  * (1) RATE:
6754                  *   determine and validate primary rate
6755                  *   and fallback rates
6756                  */
6757                 if (!rspec_active(rspec[k])) {
6758                         rspec[k] = BRCM_RATE_1M;
6759                 } else {
6760                         if (!is_multicast_ether_addr(h->addr1)) {
6761                                 /* set tx antenna config */
6762                                 brcms_c_antsel_antcfg_get(wlc->asi, false,
6763                                         false, 0, 0, &antcfg, &fbantcfg);
6764                         }
6765                 }
6766         }
6767
6768         phyctl1_stf = wlc->stf->ss_opmode;
6769
6770         if (wlc->pub->_n_enab & SUPPORT_11N) {
6771                 for (k = 0; k < hw->max_rates; k++) {
6772                         /*
6773                          * apply siso/cdd to single stream mcs's or ofdm
6774                          * if rspec is auto selected
6775                          */
6776                         if (((is_mcs_rate(rspec[k]) &&
6777                               is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
6778                              is_ofdm_rate(rspec[k]))
6779                             && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
6780                                 || !(rspec[k] & RSPEC_OVERRIDE))) {
6781                                 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
6782
6783                                 /* For SISO MCS use STBC if possible */
6784                                 if (is_mcs_rate(rspec[k])
6785                                     && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
6786                                         u8 stc;
6787
6788                                         /* Nss for single stream is always 1 */
6789                                         stc = 1;
6790                                         rspec[k] |= (PHY_TXC1_MODE_STBC <<
6791                                                         RSPEC_STF_SHIFT) |
6792                                                     (stc << RSPEC_STC_SHIFT);
6793                                 } else
6794                                         rspec[k] |=
6795                                             (phyctl1_stf << RSPEC_STF_SHIFT);
6796                         }
6797
6798                         /*
6799                          * Is the phy configured to use 40MHZ frames? If
6800                          * so then pick the desired txbw
6801                          */
6802                         if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6803                                 /* default txbw is 20in40 SB */
6804                                 mimo_ctlchbw = mimo_txbw =
6805                                    CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6806                                                                  wlc->band->pi))
6807                                    ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
6808
6809                                 if (is_mcs_rate(rspec[k])) {
6810                                         /* mcs 32 must be 40b/w DUP */
6811                                         if ((rspec[k] & RSPEC_RATE_MASK)
6812                                             == 32) {
6813                                                 mimo_txbw =
6814                                                     PHY_TXC1_BW_40MHZ_DUP;
6815                                                 /* use override */
6816                                         } else if (wlc->mimo_40txbw != AUTO)
6817                                                 mimo_txbw = wlc->mimo_40txbw;
6818                                         /* else check if dst is using 40 Mhz */
6819                                         else if (scb->flags & SCB_IS40)
6820                                                 mimo_txbw = PHY_TXC1_BW_40MHZ;
6821                                 } else if (is_ofdm_rate(rspec[k])) {
6822                                         if (wlc->ofdm_40txbw != AUTO)
6823                                                 mimo_txbw = wlc->ofdm_40txbw;
6824                                 } else if (wlc->cck_40txbw != AUTO) {
6825                                         mimo_txbw = wlc->cck_40txbw;
6826                                 }
6827                         } else {
6828                                 /*
6829                                  * mcs32 is 40 b/w only.
6830                                  * This is possible for probe packets on
6831                                  * a STA during SCAN
6832                                  */
6833                                 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
6834                                         /* mcs 0 */
6835                                         rspec[k] = RSPEC_MIMORATE;
6836
6837                                 mimo_txbw = PHY_TXC1_BW_20MHZ;
6838                         }
6839
6840                         /* Set channel width */
6841                         rspec[k] &= ~RSPEC_BW_MASK;
6842                         if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
6843                                 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
6844                         else
6845                                 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
6846
6847                         /* Disable short GI, not supported yet */
6848                         rspec[k] &= ~RSPEC_SHORT_GI;
6849
6850                         mimo_preamble_type = BRCMS_MM_PREAMBLE;
6851                         if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
6852                                 mimo_preamble_type = BRCMS_GF_PREAMBLE;
6853
6854                         if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
6855                             && (!is_mcs_rate(rspec[k]))) {
6856                                 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
6857                                           "RC_MCS != is_mcs_rate(rspec)\n",
6858                                           wlc->pub->unit, __func__);
6859                         }
6860
6861                         if (is_mcs_rate(rspec[k])) {
6862                                 preamble_type[k] = mimo_preamble_type;
6863
6864                                 /*
6865                                  * if SGI is selected, then forced mm
6866                                  * for single stream
6867                                  */
6868                                 if ((rspec[k] & RSPEC_SHORT_GI)
6869                                     && is_single_stream(rspec[k] &
6870                                                         RSPEC_RATE_MASK))
6871                                         preamble_type[k] = BRCMS_MM_PREAMBLE;
6872                         }
6873
6874                         /* should be better conditionalized */
6875                         if (!is_mcs_rate(rspec[0])
6876                             && (tx_info->control.rates[0].
6877                                 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
6878                                 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
6879                 }
6880         } else {
6881                 for (k = 0; k < hw->max_rates; k++) {
6882                         /* Set ctrlchbw as 20Mhz */
6883                         rspec[k] &= ~RSPEC_BW_MASK;
6884                         rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
6885
6886                         /* for nphy, stf of ofdm frames must follow policies */
6887                         if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
6888                                 rspec[k] &= ~RSPEC_STF_MASK;
6889                                 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
6890                         }
6891                 }
6892         }
6893
6894         /* Reset these for use with AMPDU's */
6895         txrate[0]->count = 0;
6896         txrate[1]->count = 0;
6897
6898         /* (2) PROTECTION, may change rspec */
6899         if ((ieee80211_is_data(h->frame_control) ||
6900             ieee80211_is_mgmt(h->frame_control)) &&
6901             (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
6902                 use_rts = true;
6903
6904         /* (3) PLCP: determine PLCP header and MAC duration,
6905          * fill struct d11txh */
6906         brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
6907         brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
6908         memcpy(&txh->FragPLCPFallback,
6909                plcp_fallback, sizeof(txh->FragPLCPFallback));
6910
6911         /* Length field now put in CCK FBR CRC field */
6912         if (is_cck_rate(rspec[1])) {
6913                 txh->FragPLCPFallback[4] = phylen & 0xff;
6914                 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
6915         }
6916
6917         /* MIMO-RATE: need validation ?? */
6918         mainrates = is_ofdm_rate(rspec[0]) ?
6919                         D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
6920                         plcp[0];
6921
6922         /* DUR field for main rate */
6923         if (!ieee80211_is_pspoll(h->frame_control) &&
6924             !is_multicast_ether_addr(h->addr1) && !use_rifs) {
6925                 durid =
6926                     brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
6927                                           next_frag_len);
6928                 h->duration_id = cpu_to_le16(durid);
6929         } else if (use_rifs) {
6930                 /* NAV protect to end of next max packet size */
6931                 durid =
6932                     (u16) brcms_c_calc_frame_time(wlc, rspec[0],
6933                                                  preamble_type[0],
6934                                                  DOT11_MAX_FRAG_LEN);
6935                 durid += RIFS_11N_TIME;
6936                 h->duration_id = cpu_to_le16(durid);
6937         }
6938
6939         /* DUR field for fallback rate */
6940         if (ieee80211_is_pspoll(h->frame_control))
6941                 txh->FragDurFallback = h->duration_id;
6942         else if (is_multicast_ether_addr(h->addr1) || use_rifs)
6943                 txh->FragDurFallback = 0;
6944         else {
6945                 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
6946                                               preamble_type[1], next_frag_len);
6947                 txh->FragDurFallback = cpu_to_le16(durid);
6948         }
6949
6950         /* (4) MAC-HDR: MacTxControlLow */
6951         if (frag == 0)
6952                 mcl |= TXC_STARTMSDU;
6953
6954         if (!is_multicast_ether_addr(h->addr1))
6955                 mcl |= TXC_IMMEDACK;
6956
6957         if (wlc->band->bandtype == BRCM_BAND_5G)
6958                 mcl |= TXC_FREQBAND_5G;
6959
6960         if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
6961                 mcl |= TXC_BW_40;
6962
6963         /* set AMIC bit if using hardware TKIP MIC */
6964         if (hwtkmic)
6965                 mcl |= TXC_AMIC;
6966
6967         txh->MacTxControlLow = cpu_to_le16(mcl);
6968
6969         /* MacTxControlHigh */
6970         mch = 0;
6971
6972         /* Set fallback rate preamble type */
6973         if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
6974             (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
6975                 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
6976                         mch |= TXC_PREAMBLE_DATA_FB_SHORT;
6977         }
6978
6979         /* MacFrameControl */
6980         memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
6981         txh->TxFesTimeNormal = cpu_to_le16(0);
6982
6983         txh->TxFesTimeFallback = cpu_to_le16(0);
6984
6985         /* TxFrameRA */
6986         memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
6987
6988         /* TxFrameID */
6989         txh->TxFrameID = cpu_to_le16(frameid);
6990
6991         /*
6992          * TxStatus, Note the case of recreating the first frag of a suppressed
6993          * frame then we may need to reset the retry cnt's via the status reg
6994          */
6995         txh->TxStatus = cpu_to_le16(status);
6996
6997         /*
6998          * extra fields for ucode AMPDU aggregation, the new fields are added to
6999          * the END of previous structure so that it's compatible in driver.
7000          */
7001         txh->MaxNMpdus = cpu_to_le16(0);
7002         txh->MaxABytes_MRT = cpu_to_le16(0);
7003         txh->MaxABytes_FBR = cpu_to_le16(0);
7004         txh->MinMBytes = cpu_to_le16(0);
7005
7006         /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7007          * furnish struct d11txh */
7008         /* RTS PLCP header and RTS frame */
7009         if (use_rts || use_cts) {
7010                 if (use_rts && use_cts)
7011                         use_cts = false;
7012
7013                 for (k = 0; k < 2; k++) {
7014                         rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7015                                                               false,
7016                                                               mimo_ctlchbw);
7017                 }
7018
7019                 if (!is_ofdm_rate(rts_rspec[0]) &&
7020                     !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7021                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7022                         rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7023                         mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7024                 }
7025
7026                 if (!is_ofdm_rate(rts_rspec[1]) &&
7027                     !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7028                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7029                         rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7030                         mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7031                 }
7032
7033                 /* RTS/CTS additions to MacTxControlLow */
7034                 if (use_cts) {
7035                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7036                 } else {
7037                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7038                         txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7039                 }
7040
7041                 /* RTS PLCP header */
7042                 rts_plcp = txh->RTSPhyHeader;
7043                 if (use_cts)
7044                         rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7045                 else
7046                         rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7047
7048                 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7049
7050                 /* fallback rate version of RTS PLCP header */
7051                 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7052                                  rts_plcp_fallback);
7053                 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7054                        sizeof(txh->RTSPLCPFallback));
7055
7056                 /* RTS frame fields... */
7057                 rts = (struct ieee80211_rts *)&txh->rts_frame;
7058
7059                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7060                                                rspec[0], rts_preamble_type[0],
7061                                                preamble_type[0], phylen, false);
7062                 rts->duration = cpu_to_le16(durid);
7063                 /* fallback rate version of RTS DUR field */
7064                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7065                                                rts_rspec[1], rspec[1],
7066                                                rts_preamble_type[1],
7067                                                preamble_type[1], phylen, false);
7068                 txh->RTSDurFallback = cpu_to_le16(durid);
7069
7070                 if (use_cts) {
7071                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7072                                                          IEEE80211_STYPE_CTS);
7073
7074                         memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7075                 } else {
7076                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7077                                                          IEEE80211_STYPE_RTS);
7078
7079                         memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7080                 }
7081
7082                 /* mainrate
7083                  *    low 8 bits: main frag rate/mcs,
7084                  *    high 8 bits: rts/cts rate/mcs
7085                  */
7086                 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7087                                 D11A_PHY_HDR_GRATE(
7088                                         (struct ofdm_phy_hdr *) rts_plcp) :
7089                                 rts_plcp[0]) << 8;
7090         } else {
7091                 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7092                 memset((char *)&txh->rts_frame, 0,
7093                         sizeof(struct ieee80211_rts));
7094                 memset((char *)txh->RTSPLCPFallback, 0,
7095                       sizeof(txh->RTSPLCPFallback));
7096                 txh->RTSDurFallback = 0;
7097         }
7098
7099 #ifdef SUPPORT_40MHZ
7100         /* add null delimiter count */
7101         if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7102                 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7103                    brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7104
7105 #endif
7106
7107         /*
7108          * Now that RTS/RTS FB preamble types are updated, write
7109          * the final value
7110          */
7111         txh->MacTxControlHigh = cpu_to_le16(mch);
7112
7113         /*
7114          * MainRates (both the rts and frag plcp rates have
7115          * been calculated now)
7116          */
7117         txh->MainRates = cpu_to_le16(mainrates);
7118
7119         /* XtraFrameTypes */
7120         xfts = frametype(rspec[1], wlc->mimoft);
7121         xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7122         xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7123         xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7124                                                              XFTS_CHANNEL_SHIFT;
7125         txh->XtraFrameTypes = cpu_to_le16(xfts);
7126
7127         /* PhyTxControlWord */
7128         phyctl = frametype(rspec[0], wlc->mimoft);
7129         if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7130             (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7131                 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7132                         phyctl |= PHY_TXC_SHORT_HDR;
7133         }
7134
7135         /* phytxant is properly bit shifted */
7136         phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7137         txh->PhyTxControlWord = cpu_to_le16(phyctl);
7138
7139         /* PhyTxControlWord_1 */
7140         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7141                 u16 phyctl1 = 0;
7142
7143                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7144                 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7145                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7146                 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7147
7148                 if (use_rts || use_cts) {
7149                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7150                         txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7151                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7152                         txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7153                 }
7154
7155                 /*
7156                  * For mcs frames, if mixedmode(overloaded with long preamble)
7157                  * is going to be set, fill in non-zero MModeLen and/or
7158                  * MModeFbrLen it will be unnecessary if they are separated
7159                  */
7160                 if (is_mcs_rate(rspec[0]) &&
7161                     (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7162                         u16 mmodelen =
7163                             brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7164                         txh->MModeLen = cpu_to_le16(mmodelen);
7165                 }
7166
7167                 if (is_mcs_rate(rspec[1]) &&
7168                     (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7169                         u16 mmodefbrlen =
7170                             brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7171                         txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7172                 }
7173         }
7174
7175         ac = skb_get_queue_mapping(p);
7176         if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7177                 uint frag_dur, dur, dur_fallback;
7178
7179                 /* WME: Update TXOP threshold */
7180                 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7181                         frag_dur =
7182                             brcms_c_calc_frame_time(wlc, rspec[0],
7183                                         preamble_type[0], phylen);
7184
7185                         if (rts) {
7186                                 /* 1 RTS or CTS-to-self frame */
7187                                 dur =
7188                                     brcms_c_calc_cts_time(wlc, rts_rspec[0],
7189                                                       rts_preamble_type[0]);
7190                                 dur_fallback =
7191                                     brcms_c_calc_cts_time(wlc, rts_rspec[1],
7192                                                       rts_preamble_type[1]);
7193                                 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7194                                 dur += le16_to_cpu(rts->duration);
7195                                 dur_fallback +=
7196                                         le16_to_cpu(txh->RTSDurFallback);
7197                         } else if (use_rifs) {
7198                                 dur = frag_dur;
7199                                 dur_fallback = 0;
7200                         } else {
7201                                 /* frame + SIFS + ACK */
7202                                 dur = frag_dur;
7203                                 dur +=
7204                                     brcms_c_compute_frame_dur(wlc, rspec[0],
7205                                                           preamble_type[0], 0);
7206
7207                                 dur_fallback =
7208                                     brcms_c_calc_frame_time(wlc, rspec[1],
7209                                                         preamble_type[1],
7210                                                         phylen);
7211                                 dur_fallback +=
7212                                     brcms_c_compute_frame_dur(wlc, rspec[1],
7213                                                           preamble_type[1], 0);
7214                         }
7215                         /* NEED to set TxFesTimeNormal (hard) */
7216                         txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7217                         /*
7218                          * NEED to set fallback rate version of
7219                          * TxFesTimeNormal (hard)
7220                          */
7221                         txh->TxFesTimeFallback =
7222                                 cpu_to_le16((u16) dur_fallback);
7223
7224                         /*
7225                          * update txop byte threshold (txop minus intraframe
7226                          * overhead)
7227                          */
7228                         if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7229                                 uint newfragthresh;
7230
7231                                 newfragthresh =
7232                                     brcms_c_calc_frame_len(wlc,
7233                                         rspec[0], preamble_type[0],
7234                                         (wlc->edcf_txop[ac] -
7235                                                 (dur - frag_dur)));
7236                                 /* range bound the fragthreshold */
7237                                 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7238                                         newfragthresh =
7239                                             DOT11_MIN_FRAG_LEN;
7240                                 else if (newfragthresh >
7241                                          wlc->usr_fragthresh)
7242                                         newfragthresh =
7243                                             wlc->usr_fragthresh;
7244                                 /* update the fragthresh and do txc update */
7245                                 if (wlc->fragthresh[queue] !=
7246                                     (u16) newfragthresh)
7247                                         wlc->fragthresh[queue] =
7248                                             (u16) newfragthresh;
7249                         } else {
7250                                 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7251                                           "for rate %d\n",
7252                                           wlc->pub->unit, fifo_names[queue],
7253                                           rspec2rate(rspec[0]));
7254                         }
7255
7256                         if (dur > wlc->edcf_txop[ac])
7257                                 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7258                                           "exceeded phylen %d/%d dur %d/%d\n",
7259                                           wlc->pub->unit, __func__,
7260                                           fifo_names[queue],
7261                                           phylen, wlc->fragthresh[queue],
7262                                           dur, wlc->edcf_txop[ac]);
7263                 }
7264         }
7265
7266         return 0;
7267 }
7268
7269 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7270                               struct ieee80211_hw *hw)
7271 {
7272         u8 prio;
7273         uint fifo;
7274         struct scb *scb = &wlc->pri_scb;
7275         struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7276
7277         /*
7278          * 802.11 standard requires management traffic
7279          * to go at highest priority
7280          */
7281         prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7282                 MAXPRIO;
7283         fifo = prio2fifo[prio];
7284         if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7285                 return;
7286         brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7287         brcms_c_send_q(wlc);
7288 }
7289
7290 void brcms_c_send_q(struct brcms_c_info *wlc)
7291 {
7292         struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7293         int prec;
7294         u16 prec_map;
7295         int err = 0, i, count;
7296         uint fifo;
7297         struct brcms_txq_info *qi = wlc->pkt_queue;
7298         struct pktq *q = &qi->q;
7299         struct ieee80211_tx_info *tx_info;
7300
7301         prec_map = wlc->tx_prec_map;
7302
7303         /* Send all the enq'd pkts that we can.
7304          * Dequeue packets with precedence with empty HW fifo only
7305          */
7306         while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7307                 tx_info = IEEE80211_SKB_CB(pkt[0]);
7308                 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7309                         err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7310                 } else {
7311                         count = 1;
7312                         err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7313                         if (!err) {
7314                                 for (i = 0; i < count; i++)
7315                                         brcms_c_txfifo(wlc, fifo, pkt[i], true,
7316                                                        1);
7317                         }
7318                 }
7319
7320                 if (err == -EBUSY) {
7321                         brcmu_pktq_penq_head(q, prec, pkt[0]);
7322                         /*
7323                          * If send failed due to any other reason than a
7324                          * change in HW FIFO condition, quit. Otherwise,
7325                          * read the new prec_map!
7326                          */
7327                         if (prec_map == wlc->tx_prec_map)
7328                                 break;
7329                         prec_map = wlc->tx_prec_map;
7330                 }
7331         }
7332 }
7333
7334 void
7335 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7336                bool commit, s8 txpktpend)
7337 {
7338         u16 frameid = INVALIDFID;
7339         struct d11txh *txh;
7340
7341         txh = (struct d11txh *) (p->data);
7342
7343         /* When a BC/MC frame is being committed to the BCMC fifo
7344          * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7345          */
7346         if (fifo == TX_BCMC_FIFO)
7347                 frameid = le16_to_cpu(txh->TxFrameID);
7348
7349         /*
7350          * Bump up pending count for if not using rpc. If rpc is
7351          * used, this will be handled in brcms_b_txfifo()
7352          */
7353         if (commit) {
7354                 wlc->core->txpktpend[fifo] += txpktpend;
7355                 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7356                          txpktpend, wlc->core->txpktpend[fifo]);
7357         }
7358
7359         /* Commit BCMC sequence number in the SHM frame ID location */
7360         if (frameid != INVALIDFID) {
7361                 /*
7362                  * To inform the ucode of the last mcast frame posted
7363                  * so that it can clear moredata bit
7364                  */
7365                 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7366         }
7367
7368         if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7369                 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7370 }
7371
7372 u32
7373 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7374                            bool use_rspec, u16 mimo_ctlchbw)
7375 {
7376         u32 rts_rspec = 0;
7377
7378         if (use_rspec)
7379                 /* use frame rate as rts rate */
7380                 rts_rspec = rspec;
7381         else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7382                 /* Use 11Mbps as the g protection RTS target rate and fallback.
7383                  * Use the brcms_basic_rate() lookup to find the best basic rate
7384                  * under the target in case 11 Mbps is not Basic.
7385                  * 6 and 9 Mbps are not usually selected by rate selection, but
7386                  * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7387                  * is more robust.
7388                  */
7389                 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7390         else
7391                 /* calculate RTS rate and fallback rate based on the frame rate
7392                  * RTS must be sent at a basic rate since it is a
7393                  * control frame, sec 9.6 of 802.11 spec
7394                  */
7395                 rts_rspec = brcms_basic_rate(wlc, rspec);
7396
7397         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7398                 /* set rts txbw to correct side band */
7399                 rts_rspec &= ~RSPEC_BW_MASK;
7400
7401                 /*
7402                  * if rspec/rspec_fallback is 40MHz, then send RTS on both
7403                  * 20MHz channel (DUP), otherwise send RTS on control channel
7404                  */
7405                 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7406                         rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7407                 else
7408                         rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7409
7410                 /* pick siso/cdd as default for ofdm */
7411                 if (is_ofdm_rate(rts_rspec)) {
7412                         rts_rspec &= ~RSPEC_STF_MASK;
7413                         rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7414                 }
7415         }
7416         return rts_rspec;
7417 }
7418
7419 void
7420 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7421 {
7422         wlc->core->txpktpend[fifo] -= txpktpend;
7423         BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7424                wlc->core->txpktpend[fifo]);
7425
7426         /* There is more room; mark precedences related to this FIFO sendable */
7427         wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7428
7429         /* figure out which bsscfg is being worked on... */
7430 }
7431
7432 /* Update beacon listen interval in shared memory */
7433 static void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7434 {
7435         /* wake up every DTIM is the default */
7436         if (wlc->bcn_li_dtim == 1)
7437                 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7438         else
7439                 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7440                               (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7441 }
7442
7443 static void
7444 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7445                   u32 *tsf_h_ptr)
7446 {
7447         struct bcma_device *core = wlc_hw->d11core;
7448
7449         /* read the tsf timer low, then high to get an atomic read */
7450         *tsf_l_ptr = bcma_read32(core, D11REGOFFS(tsf_timerlow));
7451         *tsf_h_ptr = bcma_read32(core, D11REGOFFS(tsf_timerhigh));
7452 }
7453
7454 /*
7455  * recover 64bit TSF value from the 16bit TSF value in the rx header
7456  * given the assumption that the TSF passed in header is within 65ms
7457  * of the current tsf.
7458  *
7459  * 6       5       4       4       3       2       1
7460  * 3.......6.......8.......0.......2.......4.......6.......8......0
7461  * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7462  *
7463  * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7464  * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7465  * receive call sequence after rx interrupt. Only the higher 16 bits
7466  * are used. Finally, the tsf_h is read from the tsf register.
7467  */
7468 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7469                                  struct d11rxhdr *rxh)
7470 {
7471         u32 tsf_h, tsf_l;
7472         u16 rx_tsf_0_15, rx_tsf_16_31;
7473
7474         brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7475
7476         rx_tsf_16_31 = (u16)(tsf_l >> 16);
7477         rx_tsf_0_15 = rxh->RxTSFTime;
7478
7479         /*
7480          * a greater tsf time indicates the low 16 bits of
7481          * tsf_l wrapped, so decrement the high 16 bits.
7482          */
7483         if ((u16)tsf_l < rx_tsf_0_15) {
7484                 rx_tsf_16_31 -= 1;
7485                 if (rx_tsf_16_31 == 0xffff)
7486                         tsf_h -= 1;
7487         }
7488
7489         return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7490 }
7491
7492 static void
7493 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7494                      struct sk_buff *p,
7495                      struct ieee80211_rx_status *rx_status)
7496 {
7497         int preamble;
7498         int channel;
7499         u32 rspec;
7500         unsigned char *plcp;
7501
7502         /* fill in TSF and flag its presence */
7503         rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7504         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7505
7506         channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7507
7508         if (channel > 14) {
7509                 rx_status->band = IEEE80211_BAND_5GHZ;
7510                 rx_status->freq = ieee80211_ofdm_chan_to_freq(
7511                                         WF_CHAN_FACTOR_5_G/2, channel);
7512
7513         } else {
7514                 rx_status->band = IEEE80211_BAND_2GHZ;
7515                 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
7516         }
7517
7518         rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7519
7520         /* noise */
7521         /* qual */
7522         rx_status->antenna =
7523                 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7524
7525         plcp = p->data;
7526
7527         rspec = brcms_c_compute_rspec(rxh, plcp);
7528         if (is_mcs_rate(rspec)) {
7529                 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7530                 rx_status->flag |= RX_FLAG_HT;
7531                 if (rspec_is40mhz(rspec))
7532                         rx_status->flag |= RX_FLAG_40MHZ;
7533         } else {
7534                 switch (rspec2rate(rspec)) {
7535                 case BRCM_RATE_1M:
7536                         rx_status->rate_idx = 0;
7537                         break;
7538                 case BRCM_RATE_2M:
7539                         rx_status->rate_idx = 1;
7540                         break;
7541                 case BRCM_RATE_5M5:
7542                         rx_status->rate_idx = 2;
7543                         break;
7544                 case BRCM_RATE_11M:
7545                         rx_status->rate_idx = 3;
7546                         break;
7547                 case BRCM_RATE_6M:
7548                         rx_status->rate_idx = 4;
7549                         break;
7550                 case BRCM_RATE_9M:
7551                         rx_status->rate_idx = 5;
7552                         break;
7553                 case BRCM_RATE_12M:
7554                         rx_status->rate_idx = 6;
7555                         break;
7556                 case BRCM_RATE_18M:
7557                         rx_status->rate_idx = 7;
7558                         break;
7559                 case BRCM_RATE_24M:
7560                         rx_status->rate_idx = 8;
7561                         break;
7562                 case BRCM_RATE_36M:
7563                         rx_status->rate_idx = 9;
7564                         break;
7565                 case BRCM_RATE_48M:
7566                         rx_status->rate_idx = 10;
7567                         break;
7568                 case BRCM_RATE_54M:
7569                         rx_status->rate_idx = 11;
7570                         break;
7571                 default:
7572                         wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7573                 }
7574
7575                 /*
7576                  * For 5GHz, we should decrease the index as it is
7577                  * a subset of the 2.4G rates. See bitrates field
7578                  * of brcms_band_5GHz_nphy (in mac80211_if.c).
7579                  */
7580                 if (rx_status->band == IEEE80211_BAND_5GHZ)
7581                         rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7582
7583                 /* Determine short preamble and rate_idx */
7584                 preamble = 0;
7585                 if (is_cck_rate(rspec)) {
7586                         if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7587                                 rx_status->flag |= RX_FLAG_SHORTPRE;
7588                 } else if (is_ofdm_rate(rspec)) {
7589                         rx_status->flag |= RX_FLAG_SHORTPRE;
7590                 } else {
7591                         wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
7592                                   __func__);
7593                 }
7594         }
7595
7596         if (plcp3_issgi(plcp[3]))
7597                 rx_status->flag |= RX_FLAG_SHORT_GI;
7598
7599         if (rxh->RxStatus1 & RXS_DECERR) {
7600                 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7601                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_PLCP_CRC\n",
7602                           __func__);
7603         }
7604         if (rxh->RxStatus1 & RXS_FCSERR) {
7605                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7606                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_FCS_CRC\n",
7607                           __func__);
7608         }
7609 }
7610
7611 static void
7612 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7613                 struct sk_buff *p)
7614 {
7615         int len_mpdu;
7616         struct ieee80211_rx_status rx_status;
7617
7618         memset(&rx_status, 0, sizeof(rx_status));
7619         prep_mac80211_status(wlc, rxh, p, &rx_status);
7620
7621         /* mac header+body length, exclude CRC and plcp header */
7622         len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7623         skb_pull(p, D11_PHY_HDR_LEN);
7624         __skb_trim(p, len_mpdu);
7625
7626         memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
7627         ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7628 }
7629
7630 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7631  * number of bytes goes in the length field
7632  *
7633  * Formula given by HT PHY Spec v 1.13
7634  *   len = 3(nsyms + nstream + 3) - 3
7635  */
7636 u16
7637 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
7638                       uint mac_len)
7639 {
7640         uint nsyms, len = 0, kNdps;
7641
7642         BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
7643                  wlc->pub->unit, rspec2rate(ratespec), mac_len);
7644
7645         if (is_mcs_rate(ratespec)) {
7646                 uint mcs = ratespec & RSPEC_RATE_MASK;
7647                 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
7648                                   rspec_stc(ratespec);
7649
7650                 /*
7651                  * the payload duration calculation matches that
7652                  * of regular ofdm
7653                  */
7654                 /* 1000Ndbps = kbps * 4 */
7655                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
7656                                    rspec_issgi(ratespec)) * 4;
7657
7658                 if (rspec_stc(ratespec) == 0)
7659                         nsyms =
7660                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7661                                   APHY_TAIL_NBITS) * 1000, kNdps);
7662                 else
7663                         /* STBC needs to have even number of symbols */
7664                         nsyms =
7665                             2 *
7666                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7667                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
7668
7669                 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7670                 nsyms += (tot_streams + 3);
7671                 /*
7672                  * 3 bytes/symbol @ legacy 6Mbps rate
7673                  * (-3) excluding service bits and tail bits
7674                  */
7675                 len = (3 * nsyms) - 3;
7676         }
7677
7678         return (u16) len;
7679 }
7680
7681 static void
7682 brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
7683 {
7684         const struct brcms_c_rateset *rs_dflt;
7685         struct brcms_c_rateset rs;
7686         u8 rate;
7687         u16 entry_ptr;
7688         u8 plcp[D11_PHY_HDR_LEN];
7689         u16 dur, sifs;
7690         uint i;
7691
7692         sifs = get_sifs(wlc->band);
7693
7694         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
7695
7696         brcms_c_rateset_copy(rs_dflt, &rs);
7697         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
7698
7699         /*
7700          * walk the phy rate table and update MAC core SHM
7701          * basic rate table entries
7702          */
7703         for (i = 0; i < rs.count; i++) {
7704                 rate = rs.rates[i] & BRCMS_RATE_MASK;
7705
7706                 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
7707
7708                 /* Calculate the Probe Response PLCP for the given rate */
7709                 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
7710
7711                 /*
7712                  * Calculate the duration of the Probe Response
7713                  * frame plus SIFS for the MAC
7714                  */
7715                 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
7716                                                 BRCMS_LONG_PREAMBLE, frame_len);
7717                 dur += sifs;
7718
7719                 /* Update the SHM Rate Table entry Probe Response values */
7720                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
7721                               (u16) (plcp[0] + (plcp[1] << 8)));
7722                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
7723                               (u16) (plcp[2] + (plcp[3] << 8)));
7724                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
7725         }
7726 }
7727
7728 /*      Max buffering needed for beacon template/prb resp template is 142 bytes.
7729  *
7730  *      PLCP header is 6 bytes.
7731  *      802.11 A3 header is 24 bytes.
7732  *      Max beacon frame body template length is 112 bytes.
7733  *      Max probe resp frame body template length is 110 bytes.
7734  *
7735  *      *len on input contains the max length of the packet available.
7736  *
7737  *      The *len value is set to the number of bytes in buf used, and starts
7738  *      with the PLCP and included up to, but not including, the 4 byte FCS.
7739  */
7740 static void
7741 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
7742                          u32 bcn_rspec,
7743                          struct brcms_bss_cfg *cfg, u16 *buf, int *len)
7744 {
7745         static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
7746         struct cck_phy_hdr *plcp;
7747         struct ieee80211_mgmt *h;
7748         int hdr_len, body_len;
7749
7750         hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
7751
7752         /* calc buffer size provided for frame body */
7753         body_len = *len - hdr_len;
7754         /* return actual size */
7755         *len = hdr_len + body_len;
7756
7757         /* format PHY and MAC headers */
7758         memset((char *)buf, 0, hdr_len);
7759
7760         plcp = (struct cck_phy_hdr *) buf;
7761
7762         /*
7763          * PLCP for Probe Response frames are filled in from
7764          * core's rate table
7765          */
7766         if (type == IEEE80211_STYPE_BEACON)
7767                 /* fill in PLCP */
7768                 brcms_c_compute_plcp(wlc, bcn_rspec,
7769                                  (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
7770                                  (u8 *) plcp);
7771
7772         /* "Regular" and 16 MBSS but not for 4 MBSS */
7773         /* Update the phytxctl for the beacon based on the rspec */
7774         brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
7775
7776         h = (struct ieee80211_mgmt *)&plcp[1];
7777
7778         /* fill in 802.11 header */
7779         h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
7780
7781         /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
7782         /* A1 filled in by MAC for prb resp, broadcast for bcn */
7783         if (type == IEEE80211_STYPE_BEACON)
7784                 memcpy(&h->da, &ether_bcast, ETH_ALEN);
7785         memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
7786         memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
7787
7788         /* SEQ filled in by MAC */
7789 }
7790
7791 int brcms_c_get_header_len(void)
7792 {
7793         return TXOFF;
7794 }
7795
7796 /*
7797  * Update all beacons for the system.
7798  */
7799 void brcms_c_update_beacon(struct brcms_c_info *wlc)
7800 {
7801         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7802
7803         if (bsscfg->up && !bsscfg->BSS)
7804                 /* Clear the soft intmask */
7805                 wlc->defmacintmask &= ~MI_BCNTPL;
7806 }
7807
7808 /* Write ssid into shared memory */
7809 static void
7810 brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
7811 {
7812         u8 *ssidptr = cfg->SSID;
7813         u16 base = M_SSID;
7814         u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
7815
7816         /* padding the ssid with zero and copy it into shm */
7817         memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
7818         memcpy(ssidbuf, ssidptr, cfg->SSID_len);
7819
7820         brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
7821         brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
7822 }
7823
7824 static void
7825 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
7826                               struct brcms_bss_cfg *cfg,
7827                               bool suspend)
7828 {
7829         u16 prb_resp[BCN_TMPL_LEN / 2];
7830         int len = BCN_TMPL_LEN;
7831
7832         /*
7833          * write the probe response to hardware, or save in
7834          * the config structure
7835          */
7836
7837         /* create the probe response template */
7838         brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
7839                                  cfg, prb_resp, &len);
7840
7841         if (suspend)
7842                 brcms_c_suspend_mac_and_wait(wlc);
7843
7844         /* write the probe response into the template region */
7845         brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
7846                                     (len + 3) & ~3, prb_resp);
7847
7848         /* write the length of the probe response frame (+PLCP/-FCS) */
7849         brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
7850
7851         /* write the SSID and SSID length */
7852         brcms_c_shm_ssid_upd(wlc, cfg);
7853
7854         /*
7855          * Write PLCP headers and durations for probe response frames
7856          * at all rates. Use the actual frame length covered by the
7857          * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
7858          * by subtracting the PLCP len and adding the FCS.
7859          */
7860         len += (-D11_PHY_HDR_LEN + FCS_LEN);
7861         brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
7862
7863         if (suspend)
7864                 brcms_c_enable_mac(wlc);
7865 }
7866
7867 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
7868 {
7869         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7870
7871         /* update AP or IBSS probe responses */
7872         if (bsscfg->up && !bsscfg->BSS)
7873                 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
7874 }
7875
7876 /* prepares pdu for transmission. returns BCM error codes */
7877 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
7878 {
7879         uint fifo;
7880         struct d11txh *txh;
7881         struct ieee80211_hdr *h;
7882         struct scb *scb;
7883
7884         txh = (struct d11txh *) (pdu->data);
7885         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
7886
7887         /* get the pkt queue info. This was put at brcms_c_sendctl or
7888          * brcms_c_send for PDU */
7889         fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
7890
7891         scb = NULL;
7892
7893         *fifop = fifo;
7894
7895         /* return if insufficient dma resources */
7896         if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
7897                 /* Mark precedences related to this FIFO, unsendable */
7898                 /* A fifo is full. Clear precedences related to that FIFO */
7899                 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
7900                 return -EBUSY;
7901         }
7902         return 0;
7903 }
7904
7905 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
7906                            uint *blocks)
7907 {
7908         if (fifo >= NFIFO)
7909                 return -EINVAL;
7910
7911         *blocks = wlc_hw->xmtfifo_sz[fifo];
7912
7913         return 0;
7914 }
7915
7916 void
7917 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
7918                   const u8 *addr)
7919 {
7920         brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
7921         if (match_reg_offset == RCM_BSSID_OFFSET)
7922                 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
7923 }
7924
7925 /*
7926  * Flag 'scan in progress' to withhold dynamic phy calibration
7927  */
7928 void brcms_c_scan_start(struct brcms_c_info *wlc)
7929 {
7930         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
7931 }
7932
7933 void brcms_c_scan_stop(struct brcms_c_info *wlc)
7934 {
7935         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
7936 }
7937
7938 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
7939 {
7940         wlc->pub->associated = state;
7941         wlc->bsscfg->associated = state;
7942 }
7943
7944 /*
7945  * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
7946  * AMPDU traffic, packets pending in hardware have to be invalidated so that
7947  * when later on hardware releases them, they can be handled appropriately.
7948  */
7949 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
7950                                struct ieee80211_sta *sta,
7951                                void (*dma_callback_fn))
7952 {
7953         struct dma_pub *dmah;
7954         int i;
7955         for (i = 0; i < NFIFO; i++) {
7956                 dmah = hw->di[i];
7957                 if (dmah != NULL)
7958                         dma_walk_packets(dmah, dma_callback_fn, sta);
7959         }
7960 }
7961
7962 int brcms_c_get_curband(struct brcms_c_info *wlc)
7963 {
7964         return wlc->band->bandunit;
7965 }
7966
7967 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
7968 {
7969         int timeout = 20;
7970
7971         /* flush packet queue when requested */
7972         if (drop)
7973                 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
7974
7975         /* wait for queue and DMA fifos to run dry */
7976         while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0) {
7977                 brcms_msleep(wlc->wl, 1);
7978
7979                 if (--timeout == 0)
7980                         break;
7981         }
7982
7983         WARN_ON_ONCE(timeout == 0);
7984 }
7985
7986 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
7987 {
7988         wlc->bcn_li_bcn = interval;
7989         if (wlc->pub->up)
7990                 brcms_c_bcn_li_upd(wlc);
7991 }
7992
7993 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
7994 {
7995         uint qdbm;
7996
7997         /* Remove override bit and clip to max qdbm value */
7998         qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
7999         return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
8000 }
8001
8002 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
8003 {
8004         uint qdbm;
8005         bool override;
8006
8007         wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
8008
8009         /* Return qdbm units */
8010         return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
8011 }
8012
8013 /* Process received frames */
8014 /*
8015  * Return true if more frames need to be processed. false otherwise.
8016  * Param 'bound' indicates max. # frames to process before break out.
8017  */
8018 static void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8019 {
8020         struct d11rxhdr *rxh;
8021         struct ieee80211_hdr *h;
8022         uint len;
8023         bool is_amsdu;
8024
8025         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8026
8027         /* frame starts with rxhdr */
8028         rxh = (struct d11rxhdr *) (p->data);
8029
8030         /* strip off rxhdr */
8031         skb_pull(p, BRCMS_HWRXOFF);
8032
8033         /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8034         if (rxh->RxStatus1 & RXS_PBPRES) {
8035                 if (p->len < 2) {
8036                         wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8037                                   "len %d\n", wlc->pub->unit, p->len);
8038                         goto toss;
8039                 }
8040                 skb_pull(p, 2);
8041         }
8042
8043         h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8044         len = p->len;
8045
8046         if (rxh->RxStatus1 & RXS_FCSERR) {
8047                 if (!(wlc->filter_flags & FIF_FCSFAIL))
8048                         goto toss;
8049         }
8050
8051         /* check received pkt has at least frame control field */
8052         if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8053                 goto toss;
8054
8055         /* not supporting A-MSDU */
8056         is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8057         if (is_amsdu)
8058                 goto toss;
8059
8060         brcms_c_recvctl(wlc, rxh, p);
8061         return;
8062
8063  toss:
8064         brcmu_pkt_buf_free_skb(p);
8065 }
8066
8067 /* Process received frames */
8068 /*
8069  * Return true if more frames need to be processed. false otherwise.
8070  * Param 'bound' indicates max. # frames to process before break out.
8071  */
8072 static bool
8073 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
8074 {
8075         struct sk_buff *p;
8076         struct sk_buff *next = NULL;
8077         struct sk_buff_head recv_frames;
8078
8079         uint n = 0;
8080         uint bound_limit = bound ? RXBND : -1;
8081
8082         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
8083         skb_queue_head_init(&recv_frames);
8084
8085         /* gather received frames */
8086         while (dma_rx(wlc_hw->di[fifo], &recv_frames)) {
8087
8088                 /* !give others some time to run! */
8089                 if (++n >= bound_limit)
8090                         break;
8091         }
8092
8093         /* post more rbufs */
8094         dma_rxfill(wlc_hw->di[fifo]);
8095
8096         /* process each frame */
8097         skb_queue_walk_safe(&recv_frames, p, next) {
8098                 struct d11rxhdr_le *rxh_le;
8099                 struct d11rxhdr *rxh;
8100
8101                 skb_unlink(p, &recv_frames);
8102                 rxh_le = (struct d11rxhdr_le *)p->data;
8103                 rxh = (struct d11rxhdr *)p->data;
8104
8105                 /* fixup rx header endianness */
8106                 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
8107                 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
8108                 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
8109                 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
8110                 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
8111                 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
8112                 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
8113                 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
8114                 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
8115                 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
8116                 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
8117
8118                 brcms_c_recv(wlc_hw->wlc, p);
8119         }
8120
8121         return n >= bound_limit;
8122 }
8123
8124 /* second-level interrupt processing
8125  *   Return true if another dpc needs to be re-scheduled. false otherwise.
8126  *   Param 'bounded' indicates if applicable loops should be bounded.
8127  */
8128 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
8129 {
8130         u32 macintstatus;
8131         struct brcms_hardware *wlc_hw = wlc->hw;
8132         struct bcma_device *core = wlc_hw->d11core;
8133         struct wiphy *wiphy = wlc->wiphy;
8134
8135         if (brcms_deviceremoved(wlc)) {
8136                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
8137                           __func__);
8138                 brcms_down(wlc->wl);
8139                 return false;
8140         }
8141
8142         /* grab and clear the saved software intstatus bits */
8143         macintstatus = wlc->macintstatus;
8144         wlc->macintstatus = 0;
8145
8146         BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
8147                wlc_hw->unit, macintstatus);
8148
8149         WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
8150
8151         /* tx status */
8152         if (macintstatus & MI_TFS) {
8153                 bool fatal;
8154                 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
8155                         wlc->macintstatus |= MI_TFS;
8156                 if (fatal) {
8157                         wiphy_err(wiphy, "MI_TFS: fatal\n");
8158                         goto fatal;
8159                 }
8160         }
8161
8162         if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
8163                 brcms_c_tbtt(wlc);
8164
8165         /* ATIM window end */
8166         if (macintstatus & MI_ATIMWINEND) {
8167                 BCMMSG(wlc->wiphy, "end of ATIM window\n");
8168                 bcma_set32(core, D11REGOFFS(maccommand), wlc->qvalid);
8169                 wlc->qvalid = 0;
8170         }
8171
8172         /*
8173          * received data or control frame, MI_DMAINT is
8174          * indication of RX_FIFO interrupt
8175          */
8176         if (macintstatus & MI_DMAINT)
8177                 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
8178                         wlc->macintstatus |= MI_DMAINT;
8179
8180         /* noise sample collected */
8181         if (macintstatus & MI_BG_NOISE)
8182                 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
8183
8184         if (macintstatus & MI_GP0) {
8185                 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
8186                           "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
8187
8188                 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
8189                             __func__, ai_get_chip_id(wlc_hw->sih),
8190                             ai_get_chiprev(wlc_hw->sih));
8191                 brcms_fatal_error(wlc_hw->wlc->wl);
8192         }
8193
8194         /* gptimer timeout */
8195         if (macintstatus & MI_TO)
8196                 bcma_write32(core, D11REGOFFS(gptimer), 0);
8197
8198         if (macintstatus & MI_RFDISABLE) {
8199                 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
8200                        " RF Disable Input\n", wlc_hw->unit);
8201                 brcms_rfkill_set_hw_state(wlc->wl);
8202         }
8203
8204         /* send any enq'd tx packets. Just makes sure to jump start tx */
8205         if (!pktq_empty(&wlc->pkt_queue->q))
8206                 brcms_c_send_q(wlc);
8207
8208         /* it isn't done and needs to be resched if macintstatus is non-zero */
8209         return wlc->macintstatus != 0;
8210
8211  fatal:
8212         brcms_fatal_error(wlc_hw->wlc->wl);
8213         return wlc->macintstatus != 0;
8214 }
8215
8216 void brcms_c_init(struct brcms_c_info *wlc, bool mute_tx)
8217 {
8218         struct bcma_device *core = wlc->hw->d11core;
8219         u16 chanspec;
8220
8221         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8222
8223         /*
8224          * This will happen if a big-hammer was executed. In
8225          * that case, we want to go back to the channel that
8226          * we were on and not new channel
8227          */
8228         if (wlc->pub->associated)
8229                 chanspec = wlc->home_chanspec;
8230         else
8231                 chanspec = brcms_c_init_chanspec(wlc);
8232
8233         brcms_b_init(wlc->hw, chanspec);
8234
8235         /* update beacon listen interval */
8236         brcms_c_bcn_li_upd(wlc);
8237
8238         /* write ethernet address to core */
8239         brcms_c_set_mac(wlc->bsscfg);
8240         brcms_c_set_bssid(wlc->bsscfg);
8241
8242         /* Update tsf_cfprep if associated and up */
8243         if (wlc->pub->associated && wlc->bsscfg->up) {
8244                 u32 bi;
8245
8246                 /* get beacon period and convert to uS */
8247                 bi = wlc->bsscfg->current_bss->beacon_period << 10;
8248                 /*
8249                  * update since init path would reset
8250                  * to default value
8251                  */
8252                 bcma_write32(core, D11REGOFFS(tsf_cfprep),
8253                              bi << CFPREP_CBI_SHIFT);
8254
8255                 /* Update maccontrol PM related bits */
8256                 brcms_c_set_ps_ctrl(wlc);
8257         }
8258
8259         brcms_c_bandinit_ordered(wlc, chanspec);
8260
8261         /* init probe response timeout */
8262         brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
8263
8264         /* init max burst txop (framebursting) */
8265         brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
8266                       (wlc->
8267                        _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
8268
8269         /* initialize maximum allowed duty cycle */
8270         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
8271         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
8272
8273         /*
8274          * Update some shared memory locations related to
8275          * max AMPDU size allowed to received
8276          */
8277         brcms_c_ampdu_shm_upd(wlc->ampdu);
8278
8279         /* band-specific inits */
8280         brcms_c_bsinit(wlc);
8281
8282         /* Enable EDCF mode (while the MAC is suspended) */
8283         bcma_set16(core, D11REGOFFS(ifs_ctl), IFS_USEEDCF);
8284         brcms_c_edcf_setparams(wlc, false);
8285
8286         /* Init precedence maps for empty FIFOs */
8287         brcms_c_tx_prec_map_init(wlc);
8288
8289         /* read the ucode version if we have not yet done so */
8290         if (wlc->ucode_rev == 0) {
8291                 wlc->ucode_rev =
8292                     brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
8293                 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
8294         }
8295
8296         /* ..now really unleash hell (allow the MAC out of suspend) */
8297         brcms_c_enable_mac(wlc);
8298
8299         /* suspend the tx fifos and mute the phy for preism cac time */
8300         if (mute_tx)
8301                 brcms_b_mute(wlc->hw, true);
8302
8303         /* clear tx flow control */
8304         brcms_c_txflowcontrol_reset(wlc);
8305
8306         /* enable the RF Disable Delay timer */
8307         bcma_write32(core, D11REGOFFS(rfdisabledly), RFDISABLE_DEFAULT);
8308
8309         /*
8310          * Initialize WME parameters; if they haven't been set by some other
8311          * mechanism (IOVar, etc) then read them from the hardware.
8312          */
8313         if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
8314                 /* Uninitialized; read from HW */
8315                 int ac;
8316
8317                 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
8318                         wlc->wme_retries[ac] =
8319                             brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
8320         }
8321 }
8322
8323 /*
8324  * The common driver entry routine. Error codes should be unique
8325  */
8326 struct brcms_c_info *
8327 brcms_c_attach(struct brcms_info *wl, struct bcma_device *core, uint unit,
8328                bool piomode, uint *perr)
8329 {
8330         struct brcms_c_info *wlc;
8331         uint err = 0;
8332         uint i, j;
8333         struct brcms_pub *pub;
8334
8335         /* allocate struct brcms_c_info state and its substructures */
8336         wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, 0);
8337         if (wlc == NULL)
8338                 goto fail;
8339         wlc->wiphy = wl->wiphy;
8340         pub = wlc->pub;
8341
8342 #if defined(DEBUG)
8343         wlc_info_dbg = wlc;
8344 #endif
8345
8346         wlc->band = wlc->bandstate[0];
8347         wlc->core = wlc->corestate;
8348         wlc->wl = wl;
8349         pub->unit = unit;
8350         pub->_piomode = piomode;
8351         wlc->bandinit_pending = false;
8352
8353         /* populate struct brcms_c_info with default values  */
8354         brcms_c_info_init(wlc, unit);
8355
8356         /* update sta/ap related parameters */
8357         brcms_c_ap_upd(wlc);
8358
8359         /*
8360          * low level attach steps(all hw accesses go
8361          * inside, no more in rest of the attach)
8362          */
8363         err = brcms_b_attach(wlc, core, unit, piomode);
8364         if (err)
8365                 goto fail;
8366
8367         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
8368
8369         pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
8370
8371         /* disable allowed duty cycle */
8372         wlc->tx_duty_cycle_ofdm = 0;
8373         wlc->tx_duty_cycle_cck = 0;
8374
8375         brcms_c_stf_phy_chain_calc(wlc);
8376
8377         /* txchain 1: txant 0, txchain 2: txant 1 */
8378         if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
8379                 wlc->stf->txant = wlc->stf->hw_txchain - 1;
8380
8381         /* push to BMAC driver */
8382         wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
8383                                wlc->stf->hw_rxchain);
8384
8385         /* pull up some info resulting from the low attach */
8386         for (i = 0; i < NFIFO; i++)
8387                 wlc->core->txavail[i] = wlc->hw->txavail[i];
8388
8389         memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8390         memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8391
8392         for (j = 0; j < wlc->pub->_nbands; j++) {
8393                 wlc->band = wlc->bandstate[j];
8394
8395                 if (!brcms_c_attach_stf_ant_init(wlc)) {
8396                         err = 24;
8397                         goto fail;
8398                 }
8399
8400                 /* default contention windows size limits */
8401                 wlc->band->CWmin = APHY_CWMIN;
8402                 wlc->band->CWmax = PHY_CWMAX;
8403
8404                 /* init gmode value */
8405                 if (wlc->band->bandtype == BRCM_BAND_2G) {
8406                         wlc->band->gmode = GMODE_AUTO;
8407                         brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
8408                                            wlc->band->gmode);
8409                 }
8410
8411                 /* init _n_enab supported mode */
8412                 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8413                         pub->_n_enab = SUPPORT_11N;
8414                         brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
8415                                                    ((pub->_n_enab ==
8416                                                      SUPPORT_11N) ? WL_11N_2x2 :
8417                                                     WL_11N_3x3));
8418                 }
8419
8420                 /* init per-band default rateset, depend on band->gmode */
8421                 brcms_default_rateset(wlc, &wlc->band->defrateset);
8422
8423                 /* fill in hw_rateset */
8424                 brcms_c_rateset_filter(&wlc->band->defrateset,
8425                                    &wlc->band->hw_rateset, false,
8426                                    BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
8427                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
8428         }
8429
8430         /*
8431          * update antenna config due to
8432          * wlc->stf->txant/txchain/ant_rx_ovr change
8433          */
8434         brcms_c_stf_phy_txant_upd(wlc);
8435
8436         /* attach each modules */
8437         err = brcms_c_attach_module(wlc);
8438         if (err != 0)
8439                 goto fail;
8440
8441         if (!brcms_c_timers_init(wlc, unit)) {
8442                 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
8443                           __func__);
8444                 err = 32;
8445                 goto fail;
8446         }
8447
8448         /* depend on rateset, gmode */
8449         wlc->cmi = brcms_c_channel_mgr_attach(wlc);
8450         if (!wlc->cmi) {
8451                 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
8452                           "\n", unit, __func__);
8453                 err = 33;
8454                 goto fail;
8455         }
8456
8457         /* init default when all parameters are ready, i.e. ->rateset */
8458         brcms_c_bss_default_init(wlc);
8459
8460         /*
8461          * Complete the wlc default state initializations..
8462          */
8463
8464         /* allocate our initial queue */
8465         wlc->pkt_queue = brcms_c_txq_alloc(wlc);
8466         if (wlc->pkt_queue == NULL) {
8467                 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
8468                           unit, __func__);
8469                 err = 100;
8470                 goto fail;
8471         }
8472
8473         wlc->bsscfg->wlc = wlc;
8474
8475         wlc->mimoft = FT_HT;
8476         wlc->mimo_40txbw = AUTO;
8477         wlc->ofdm_40txbw = AUTO;
8478         wlc->cck_40txbw = AUTO;
8479         brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
8480
8481         /* Set default values of SGI */
8482         if (BRCMS_SGI_CAP_PHY(wlc)) {
8483                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8484                                                BRCMS_N_SGI_40));
8485         } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
8486                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8487                                                BRCMS_N_SGI_40));
8488         } else {
8489                 brcms_c_ht_update_sgi_rx(wlc, 0);
8490         }
8491
8492         brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
8493
8494         if (perr)
8495                 *perr = 0;
8496
8497         return wlc;
8498
8499  fail:
8500         wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
8501                   unit, __func__, err);
8502         if (wlc)
8503                 brcms_c_detach(wlc);
8504
8505         if (perr)
8506                 *perr = err;
8507         return NULL;
8508 }